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[bsp] add new bsp for lpc824

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This commit is contained in:
tanek liang
2017-07-29 14:07:30 +08:00
parent d4de2c53e3
commit db1cd8830a
84 changed files with 25045 additions and 0 deletions
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bsp/lpc824/Libraries/SConscript
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# RT-Thread building script for component
Import('rtconfig')
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
src = Glob('peri_driver/*/*.c')
src += Glob('common/board/*.c')
src += Glob('common/chip/*.c')
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
print "not gcc startup file"
exit(0)
elif rtconfig.CROSS_TOOL == 'keil':
src += [cwd + '/common/startup/keil_startup_lpc82x.s']
elif rtconfig.CROSS_TOOL == 'iar':
src += [cwd + '/common/startup/iar_startup_lpc82x.s']
CPPPATH = [ cwd + '/peri_driver', cwd + '/common/board',
cwd + '/common/chip', cwd + '/common/CMSIS']
if GetDepend(['RT_USING_BSP_CMSIS']):
CPPPATH += [cwd + '/common/CMSIS/']
elif GetDepend(['RT_USING_RTT_CMSIS']):
CPPPATH += [RTT_ROOT + '/components/CMSIS/Include']
CPPDEFINES = ['CORE_M0PLUS']
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
Return('group')
bsp/lpc824/Libraries/common/CMSIS/cmsis_armcc.h
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bsp/lpc824/Libraries/common/CMSIS/cmsis_armcc_V6.h
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bsp/lpc824/Libraries/common/CMSIS/core_cm0plus.h
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bsp/lpc824/Libraries/common/CMSIS/core_cmFunc.h
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/**************************************************************************//**
* @file core_cmFunc.h
* @brief CMSIS Cortex-M Core Function Access Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
#endif /* __CORE_CMFUNC_H */
bsp/lpc824/Libraries/common/CMSIS/core_cmInstr.h
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/**************************************************************************//**
* @file core_cmInstr.h
* @brief CMSIS Cortex-M Core Instruction Access Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
#endif /* __CORE_CMINSTR_H */
bsp/lpc824/Libraries/common/board/board_api.h
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bsp/lpc824/Libraries/common/board/board_lpc.c
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bsp/lpc824/Libraries/common/board/board_lpc.h
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/*
* @brief NXP LPCXpresso LPC824 board file
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __BOARD_H_
#define __BOARD_H_
#include "chip.h"
/* board_api.h is included at the bottom of this file after DEBUG setup */
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup BOARD_NXP_LPCXPRESSO_824 NXP LPC824 LPCXpresso board support software API functions
* @ingroup LPCOPEN_8XX_BOARD_LPCXPRESSO_824
* The board support software API functions provide some simple abstracted
* functions used across multiple LPCOpen board examples. See @ref BOARD_COMMON_API
* for the functions defined by this board support layer.<br>
* @{
*/
/** @defgroup LPCOPEN_8XX_BOARD_LPCXPRESSO_824_OPTIONS BOARD: LPC824 LPCXpresso board build options
* This board has options that configure its operation at build-time.<br>
* @{
*/
/** Define the frequency in Hz, of the main oscillator (from Xtal)
* Note that it only takes effect if main oscillator is selected as clock source
*/
#define MAIN_OSC_XTAL_FREQ_HZ 12000000
/** Define the frequency in Hz, of the external clock input.
* Note that it only takes effect if external clock is selected as clock source
*/
#define EXT_CLOCK_IN_FREQ_HZ 0
//#define USE_IRC_AS_ROOT_CLOCK /*注释掉使用外部晶体 打开定义则是使用内部IRC*/
#define BOARD_LED_CNT 8
#define BOARD_KEY_CNT 3
typedef enum _enum_boardKeys
{
BOARD_KEY_0 = 0,
BOARD_KEY_1 = 1,
BOARD_KEY_2 = 2,
}enum_boardKeys;
// define LED bits (bit <--> pin on port 0) only if in board.c file
#ifdef _BOARD_C_
static const uint8_t ledBits[BOARD_LED_CNT] = {7, 13, 16, 17, 19, 27, 28, 18};
static const uint8_t cs_keyBits[BOARD_KEY_CNT] = {12, 4 , 1};
static const uint8_t cs_keyIoConNdce[BOARD_KEY_CNT] = {IOCON_PIO12, IOCON_PIO4, IOCON_PIO1};
#endif
/** Define DEBUG_ENABLE to enable IO via the DEBUGSTR, DEBUGOUT, and
DEBUGIN macros. If not defined, DEBUG* functions will be optimized
out of the code at build time.
*/
#define DEBUG_ENABLE
/** Define DEBUG_SEMIHOSTING along with DEBUG_ENABLE to enable IO support
via semihosting. You may need to use a C library that supports
semihosting with this option.
*/
//#define DEBUG_SEMIHOSTING
/** Board UART used for debug output and input using the DEBUG* macros. This
is also the port used for Board_UARTPutChar, Board_UARTGetChar, and
Board_UARTPutSTR functions. Although you can setup multiple UARTs here,
the board code only supoprts UART0 in the Board_UART_Init() fucntion,
so be sure to change it there too if not using UART0.
*/
#define DEBUG_UART LPC_USART1
/**
* @}
*/
/* Board name */
#define BOARD_NXP_LPCXPRESSO_824
#include "board_api.h"
#ifdef __cplusplus
}
#endif
#endif /* __BOARD_H_ */
bsp/lpc824/Libraries/common/chip/chip.h
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bsp/lpc824/Libraries/common/chip/clock_8xx.c
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bsp/lpc824/Libraries/common/chip/clock_8xx.h
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bsp/lpc824/Libraries/common/chip/cmsis.h
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/*
* @brief Basic CMSIS include file
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __CMSIS_H_
#define __CMSIS_H_
#include "lpc_types.h"
// >>> system config
#define CHIP_LPC8XX
#define CHIP_LPC82X
// <<<
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup CMSIS_8XX_ALL CHIP: LPC8xx CMSIS include file
* @ingroup CHIP_8XX_Drivers
* @{
*/
#if defined(__ARMCC_VERSION)
// Kill warning "#pragma push with no matching #pragma pop"
#pragma diag_suppress 2525
#pragma push
#pragma anon_unions
#elif defined(__CWCC__)
#pragma push
#pragma cpp_extensions on
#elif defined(__GNUC__)
/* anonymous unions are enabled by default */
#elif defined(__IAR_SYSTEMS_ICC__)
// #pragma push // FIXME not usable for IAR
#pragma language=extended
#else
#error Not supported compiler type
#endif
#if !defined(CORE_M0PLUS)
#error Please #define CORE_M0PLUS
#endif
/** @defgroup CMSIS_8XX CHIP: LPC8xx Cortex CMSIS definitions
* @ingroup CMSIS_8XX_ALL
* @{
*/
/* Configuration of the Cortex-M0+ Processor and Core Peripherals */
#define __CM0PLUS_REV 0x0001 /*!< Cortex-M0+ Core Revision */
#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __VTOR_PRESENT 1 /*!< VTOR is present in this implementation */
#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
/**
* @}
*/
/** @defgroup CMSIS_8XX_IRQ CHIP: LPC8xx peripheral interrupt numbers
* @ingroup CMSIS_8XX_ALL
* @{
*/
typedef enum {
/****** Cortex-M0 Processor Exceptions Numbers ***************************************************/
Reset_IRQn = -15, /*!< 1 Reset Vector, invoked on Power up and warm reset */
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0 Hard Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt */
/****** LPC8xx Specific Interrupt Numbers ********************************************************/
SPI0_IRQn = 0, /*!< SPI0 */
SPI1_IRQn = 1, /*!< SPI1 */
Reserved0_IRQn = 2, /*!< Reserved Interrupt */
UART0_IRQn = 3, /*!< USART0 */
UART1_IRQn = 4, /*!< USART1 */
UART2_IRQn = 5, /*!< USART2 */
Reserved1_IRQn = 6, /*!< Reserved Interrupt */
I2C1_IRQn = 7, /*!< I2C1 */
I2C0_IRQn = 8, /*!< I2C0 */
I2C_IRQn = 8, /*!< Alias for I2C0 */
SCT_IRQn = 9, /*!< SCT */
MRT_IRQn = 10, /*!< MRT */
CMP_IRQn = 11, /*!< CMP */
WDT_IRQn = 12, /*!< WDT */
BOD_IRQn = 13, /*!< BOD */
FLASH_IRQn = 14, /*!< Flash interrupt */
WKT_IRQn = 15, /*!< WKT Interrupt */
ADC_SEQA_IRQn = 16, /*!< ADC sequence A completion */
ADC_SEQB_IRQn = 17, /*!< ADC sequence B completion */
ADC_THCMP_IRQn = 18, /*!< ADC threshold compare */
ADC_OVR_IRQn = 19, /*!< ADC overrun */
DMA_IRQn = 20, /*!< Reserved Interrupt */
I2C2_IRQn = 21, /*!< Reserved Interrupt */
I2C3_IRQn = 22, /*!< Reserved Interrupt */
Reserved2_IRQn = 23, /*!< Reserved Interrupt */
PININT0_IRQn = 24, /*!< External Interrupt 0 */
PIN_INT0_IRQn = 24, /*!< External Interrupt 0 (alias) */
PININT1_IRQn = 25, /*!< External Interrupt 1 */
PIN_INT1_IRQn = 25, /*!< External Interrupt 1 (alias) */
PININT2_IRQn = 26, /*!< External Interrupt 2 */
PIN_INT2_IRQn = 26, /*!< External Interrupt 2 (alias) */
PININT3_IRQn = 27, /*!< External Interrupt 3 */
PIN_INT3_IRQn = 27, /*!< External Interrupt 3 (alias) */
PININT4_IRQn = 28, /*!< External Interrupt 4 */
PIN_INT4_IRQn = 28, /*!< External Interrupt 4 (alias) */
PININT5_IRQn = 29, /*!< External Interrupt 5 */
PIN_INT5_IRQn = 29, /*!< External Interrupt 5 (alias) */
PININT6_IRQn = 30, /*!< External Interrupt 6 */
PIN_INT6_IRQn = 30, /*!< External Interrupt 6 (alias) */
PININT7_IRQn = 31, /*!< External Interrupt 7 */
PIN_INT7_IRQn = 31, /*!< External Interrupt 7 (alias) */
} IRQn_Type;
/**
* @}
*/
#include "core_cm0plus.h" /*!< Cortex-M0+ processor and core peripherals */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __CMSIS_H_ */
bsp/lpc824/Libraries/common/chip/error_8xx.h
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/*
* @brief Error code returned by LPC8xx Boot ROM drivers/library functions
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __ERROR_8XX_H__
#define __ERROR_8XX_H__
/** @defgroup ROMAPI_ERRORCODES_8XX CHIP: LPC8xx ROM API error codes
* @ingroup ROMAPI_8XX
* @{
*/
/** Error code returned by Boot ROM drivers/library functions
*
* Error codes are a 32-bit value with :
* - The 16 MSB contains the peripheral code number
* - The 16 LSB contains an error code number associated to that peripheral
*
*/
typedef enum
{
/**\b 0x00000000*/ LPC_OK = 0, /**< enum value returned on Successful completion */
/**\b 0x00000001*/ LPC_ERROR, /**< enum value returned on general error (I2C) */
/* ISP related errors */
ERR_ISP_BASE = 0x00000000,
/**\b 0x00000001*/ ERR_ISP_INVALID_COMMAND = ERR_ISP_BASE + 1,
/**\b 0x00000002*/ ERR_ISP_SRC_ADDR_ERROR, /*!< Source address not on word boundary */
/**\b 0x00000003*/ ERR_ISP_DST_ADDR_ERROR, /*!< Destination address not on word or 256 byte boundary */
/**\b 0x00000004*/ ERR_ISP_SRC_ADDR_NOT_MAPPED,
/**\b 0x00000005*/ ERR_ISP_DST_ADDR_NOT_MAPPED,
/**\b 0x00000006*/ ERR_ISP_COUNT_ERROR, /*!< Byte count is not multiple of 4 or is not a permitted value */
/**\b 0x00000007*/ ERR_ISP_INVALID_SECTOR,
/**\b 0x00000008*/ ERR_ISP_SECTOR_NOT_BLANK,
/**\b 0x00000009*/ ERR_ISP_SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION,
/**\b 0x0000000A*/ ERR_ISP_COMPARE_ERROR,
/**\b 0x0000000B*/ ERR_ISP_BUSY, /*!< Flash programming hardware interface is busy */
/**\b 0x0000000C*/ ERR_ISP_PARAM_ERROR, /*!< Insufficient number of parameters */
/**\b 0x0000000D*/ ERR_ISP_ADDR_ERROR, /*!< Address not on word boundary */
/**\b 0x0000000E*/ ERR_ISP_ADDR_NOT_MAPPED,
/**\b 0x0000000F*/ ERR_ISP_CMD_LOCKED, /*!< Command is locked */
/**\b 0x00000010*/ ERR_ISP_INVALID_CODE, /*!< Unlock code is invalid */
/**\b 0x00000011*/ ERR_ISP_INVALID_BAUD_RATE,
/**\b 0x00000012*/ ERR_ISP_INVALID_STOP_BIT,
/**\b 0x00000013*/ ERR_ISP_CODE_READ_PROTECTION_ENABLED,
/* I2C related errors */
ERR_I2C_BASE = 0x00060000,
/**\b 0x00060001*/ ERR_I2C_NAK = ERR_I2C_BASE + 1, /*!< NAK */
/**\b 0x00060002*/ ERR_I2C_BUFFER_OVERFLOW, /*!< Buffer overflow */
/**\b 0x00060003*/ ERR_I2C_BYTE_COUNT_ERR, /*!< Byte count error */
/**\b 0x00060004*/ ERR_I2C_LOSS_OF_ARBRITRATION, /*!< Loss of arbitration */
/**\b 0x00060005*/ ERR_I2C_SLAVE_NOT_ADDRESSED, /*!< Slave not addressed */
/**\b 0x00060006*/ ERR_I2C_LOSS_OF_ARBRITRATION_NAK_BIT, /*!< Loss arbritation NAK */
/**\b 0x00060007*/ ERR_I2C_GENERAL_FAILURE, /*!< General failure */
/**\b 0x00060008*/ ERR_I2C_REGS_SET_TO_DEFAULT, /*!< Set to default */
/**\b 0x00060009*/ ERR_I2C_TIMEOUT, /*!< I2C Timeout */
/* UART related errors */
/**\b 0x00080001*/ ERR_NO_ERROR = LPC_OK, /*!< Receive is busy */
ERR_UART_BASE = 0x00080000,
/**\b 0x00080001*/ ERR_UART_RXD_BUSY = ERR_UART_BASE + 1, /*!< Receive is busy */
/**\b 0x00080002*/ ERR_UART_TXD_BUSY, /*!< Transmit is busy */
/**\b 0x00080003*/ ERR_UART_OVERRUN_FRAME_PARITY_NOISE, /*!< Overrun, Frame, Parity , Receive Noise error */
/**\b 0x00080004*/ ERR_UART_UNDERRUN, /*!< Underrun */
/**\b 0x00080005*/ ERR_UART_PARAM, /*!< Parameter error */
} ErrorCode_t;
/**
* @}
*/
#endif /* __ERROR_8XX_H__ */
bsp/lpc824/Libraries/common/chip/fmc_8xx.h
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/*
* @brief LPC8xx FLASH Memory Controller (FMC) driver
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __FMC_8XX_H_
#define __FMC_8XX_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup FMC_8XX CHIP: LPC8xx FLASH Memory Controller driver
* @ingroup CHIP_8XX_Drivers
* @{
*/
/**
* @brief FLASH Memory Controller Unit register block structure
*/
typedef struct {
__I uint32_t RESERVED1[4];
__IO uint32_t FLASHCFG; /*!< Flash Configuration register */
__I uint32_t RESERVED2[3];
__IO uint32_t FMSSTART; /*!< Signature start address register */
__IO uint32_t FMSSTOP; /*!< Signature stop address register */
__I uint32_t RESERVED3;
__I uint32_t FMSW[1]; /*!< Signature word regsiter */
} LPC_FMC_T;
/* Reserved bits masks for registers */
#define FMC_FLASHCFG_RESERVED (~3)
#define FMC_FMSSTART_RESERVED 0xfffe0000
#define FMC_FMSSTOP_RESERVED 0x7ffe0000
/**
* @brief FLASH Access time definitions
*/
typedef enum {
FLASHTIM_20MHZ_CPU = 0, /*!< Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock*/
FLASHTIM_30MHZ_CPU = 1, /*!< Flash accesses use 2 CPU clocks. Use for up to 30 MHz CPU clock*/
} FMC_FLASHTIM_T;
/**
* @brief Set FLASH memory access time in clocks
* @param clks : Clock cycles for FLASH access
* @return Nothing
* @note For CPU speed up to 20MHz, use a value of 0. For up to 30MHz, use
* a value of 1
*/
STATIC INLINE void Chip_FMC_SetFLASHAccess(FMC_FLASHTIM_T clks)
{
uint32_t tmp = LPC_FMC->FLASHCFG & (~((0x3)|FMC_FLASHCFG_RESERVED));
/* Don't alter upper bits */
LPC_FMC->FLASHCFG = tmp | clks;
}
/* Flash signature start and busy status bit */
#define FMC_FLASHSIG_BUSY (1UL << 31)
/**
* @brief Start computation of a signature for a FLASH memory range
* @param start : Starting FLASH address for computation, must be aligned on 16 byte boundary
* @param stop : Ending FLASH address for computation, must be aligned on 16 byte boundary
* @return Nothing
* @note Only bits 20..4 are used for the FLASH signature computation.
* Use the Chip_FMC_IsSignatureBusy() function to determine when the
* signature computation operation is complete and the
* Chip_FMC_GetSignature() function to get the computed signature.
*/
STATIC INLINE void Chip_FMC_ComputeSignature(uint32_t start, uint32_t stop)
{
LPC_FMC->FMSSTART = (start >> 4);
LPC_FMC->FMSSTOP = (stop >> 4) | FMC_FLASHSIG_BUSY;
}
/**
* @brief Start computation of a signature for a FLASH memory address and block count
* @param start : Starting FLASH address for computation, must be aligned on 16 byte boundary
* @param blocks : Number of 16 byte blocks used for computation
* @return Nothing
* @note Only bits 20..4 are used for the FLASH signature computation.
* Use the Chip_FMC_IsSignatureBusy() function to determine when the
* signature computation operation is complete and the
* Chip_FMC_GetSignature() function to get the computed signature.
*/
STATIC INLINE void Chip_FMC_ComputeSignatureBlocks(uint32_t start, uint32_t blocks)
{
Chip_FMC_ComputeSignature(start, (start + (blocks * 16)));
}
/**
* @brief Check for signature geenration completion
* @return true if the signature computation is running, false if finished
*/
STATIC INLINE bool Chip_FMC_IsSignatureBusy(void)
{
return (bool) ((LPC_FMC->FMSSTOP & FMC_FLASHSIG_BUSY) != 0);
}
/**
* @brief Returns the generated FLASH signature value
* @param index : Signature index, must be 0
* @return the generated FLASH signature value
*/
STATIC INLINE uint32_t Chip_FMC_GetSignature(int index)
{
return LPC_FMC->FMSW[index];
}
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __FMC_8XX_H_ */
bsp/lpc824/Libraries/common/chip/ioswm_8xx.c
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/*
* @brief LPC8xx IOCON driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licenser disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#define _CHIP_COMMON_
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
#define PINASSIGN_IDX(movable) (((movable) >> 4))
#define PINSHIFT(movable) (((movable) & 0xF) << 3)
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Set the pin mode (pull-up/pull-down). */
void Chip_IOCON_PinSetMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_MODE_T mode)
{
uint32_t reg;
reg = pIOCON->PIO0[pin] & ~(PIN_MODE_MASK);
pIOCON->PIO0[pin] = reg | (mode << PIN_MODE_BITNUM);
}
/* Enables/disables the pin hysteresis. */
void Chip_IOCON_PinSetHysteresis(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool enable)
{
if (enable == true) {
Chip_IOCON_PinEnableHysteresis(pIOCON, pin);
}
else {
Chip_IOCON_PinDisableHysteresis(pIOCON, pin);
}
}
/*Inverts (or not) the input seen by a pin. */
void Chip_IOCON_PinSetInputInverted(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool invert)
{
if (invert == true) {
Chip_IOCON_PinEnableInputInverted(pIOCON, pin);
}
else {
Chip_IOCON_PinDisableInputInverted(pIOCON, pin);
}
}
/* Enables/disables Open-Drain mode for a pin. */
void Chip_IOCON_PinSetOpenDrainMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, bool open_drain)
{
if (open_drain == true) {
Chip_IOCON_PinEnableOpenDrainMode(pIOCON, pin);
}
else {
Chip_IOCON_PinDisableOpenDrainMode(pIOCON, pin);
}
}
/* Enable/configure digital filter sample mode for a pin. */
void Chip_IOCON_PinSetSampleMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_SMODE_T smode)
{
uint32_t reg;
reg = pIOCON->PIO0[pin] & ~(PIN_SMODE_MASK);
pIOCON->PIO0[pin] = reg | (smode << PIN_SMODE_BITNUM);
}
/* Set the peripheral clock divisor for a pin. */
void Chip_IOCON_PinSetClockDivisor(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_CLKDIV_T clkdiv)
{
uint32_t reg;
reg = pIOCON->PIO0[pin] & ~(PIN_CLKDIV_MASK);
pIOCON->PIO0[pin] = reg | (clkdiv << PIN_CLKDIV_BITNUM);
}
/* Set the I2C mode for a pin. */
void Chip_IOCON_PinSetI2CMode(LPC_IOCON_T *pIOCON, CHIP_PINx_T pin, CHIP_PIN_I2CMODE_T mode)
{
uint32_t reg;
/* I2C mode bits only for I2C pins */
reg = pIOCON->PIO0[pin] & ~(PIN_I2CMODE_MASK);
pIOCON->PIO0[pin] = reg | (mode << PIN_I2CMODE_BITNUM);
}
/* Set all I/O Control pin muxing */
void Chip_IOCON_SetPinMuxing(LPC_IOCON_T *pIOCON, const PINMUX_GRP_T* pinArray, uint32_t arrayLength)
{
uint32_t ix;
for (ix = 0; ix < arrayLength; ix++ ) {
Chip_IOCON_PinMuxSet(pIOCON, pinArray[ix].pin, pinArray[ix].modefunc);
}
}
/* assign a movable pin function to a physical pin */
void Chip_SWM_MovablePinAssign(CHIP_SWM_PIN_MOVABLE_T movable, uint8_t pin)
{
uint32_t temp;
int pinshift = PINSHIFT(movable), regIndex = PINASSIGN_IDX(movable);
temp = LPC_SWM->PINASSIGN[regIndex] & (~(0xFF << pinshift));
LPC_SWM->PINASSIGN[regIndex] = temp | (pin << pinshift);
}
/* true enables, false disables a Switch Matrix fixed-pin Function */
void Chip_SWM_FixedPinEnable(CHIP_SWM_PIN_FIXED_T pin, bool enable)
{
if (enable) {
Chip_SWM_EnableFixedPin(pin);
}
else {
Chip_SWM_DisableFixedPin(pin);
}
}
bsp/lpc824/Libraries/common/chip/ioswm_8xx.h
+601
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bsp/lpc824/Libraries/common/chip/lpc_types.h
+216
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bsp/lpc824/Libraries/common/chip/syscon_8xx.c
+107
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/*
* @brief LPC8xx System & Control driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licenser disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#define _CHIP_COMMON_
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/* PDSLEEPCFG register mask */
#define PDSLEEPWRMASK (0x0000FFB7)
#define PDSLEEPDATMASK (0x00000048)
#if defined(CHIP_LPC82X)
/* PDWAKECFG and PDRUNCFG register masks */
#define PDWAKEUPWRMASK (0x00006D00)
#define PDWAKEUPDATMASK (0x000080FF)
#else
/* PDWAKECFG and PDRUNCFG register masks */
#define PDWAKEUPWRMASK (0x00006D10)
#define PDWAKEUPDATMASK (0x000080EF)
#endif
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Setup deep sleep behaviour for power down */
void Chip_SYSCTL_SetDeepSleepPD(uint32_t sleepmask)
{
/* Update new value */
LPC_SYSCTL->PDSLEEPCFG = PDSLEEPWRMASK | (sleepmask & PDSLEEPDATMASK);
}
/* Setup wakeup behaviour from deep sleep */
void Chip_SYSCTL_SetWakeup(uint32_t wakeupmask)
{
/* Update new value */
LPC_SYSCTL->PDAWAKECFG = PDWAKEUPWRMASK | (wakeupmask & PDWAKEUPDATMASK);
}
/* Power down one or more blocks or peripherals */
void Chip_SYSCTL_PowerDown(uint32_t powerdownmask)
{
uint32_t pdrun;
/* Get current power states */
pdrun = LPC_SYSCTL->PDRUNCFG & PDWAKEUPDATMASK;
/* Disable peripheral states by setting high */
pdrun |= (powerdownmask & PDWAKEUPDATMASK);
/* Update power states with required register bits */
LPC_SYSCTL->PDRUNCFG = (PDWAKEUPWRMASK | pdrun);
}
/* Power up one or more blocks or peripherals */
void Chip_SYSCTL_PowerUp(uint32_t powerupmask)
{
uint32_t pdrun;
/* Get current power states */
pdrun = LPC_SYSCTL->PDRUNCFG & PDWAKEUPDATMASK;
/* Enable peripheral states by setting low */
pdrun &= ~(powerupmask & PDWAKEUPDATMASK);
/* Update power states with required register bits */
LPC_SYSCTL->PDRUNCFG = (PDWAKEUPWRMASK | pdrun);
}
bsp/lpc824/Libraries/common/chip/syscon_8xx.h
+573
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bsp/lpc824/Libraries/common/chip/sysinit_8xx.c
+115
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/*
* @brief LPC8xx Chip specific SystemInit
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#define _CHIP_COMMON_
#include "board_lpc.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
#define CONFIG_MAIN_FREQ 60000000
#define CONFIG_SYS_FREQ MAX_CLOCK_FREQ
/*****************************************************************************
* Public functions
****************************************************************************/
/* Setup system clocking */
void Chip_SetupXtalClocking(void)
{
/* EXT oscillator < 15MHz */
Chip_Clock_SetPLLBypass(false, false);
/* Turn on the SYSOSC by clearing the power down bit */
Chip_SYSCTL_PowerUp(SYSCTL_SLPWAKE_SYSOSC_PD);
/* Select the PLL input to the external oscillator */
Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_SYSOSC);
/* Setup FLASH access to 2 clocks (up to 30MHz) */
Chip_FMC_SetFLASHAccess(FLASHTIM_30MHZ_CPU);
/* Power down PLL to change the PLL divider ratio */
Chip_SYSCTL_PowerDown(SYSCTL_SLPWAKE_SYSPLL_PD);
/* Configure the PLL M and P dividers */
/* Setup PLL for main oscillator rate ((FCLKIN = 12MHz) * 5)/2 = 30MHz */
Chip_Clock_SetupSystemPLL(4, 1);
/* Turn on the PLL by clearing the power down bit */
Chip_SYSCTL_PowerUp(SYSCTL_SLPWAKE_SYSPLL_PD);
/* Enable the clock to the Switch Matrix */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
/* Wait for PLL to lock */
while (!Chip_Clock_IsSystemPLLLocked()) {}
Chip_Clock_SetSysClockDiv(2);
/* Set main clock source to the system PLL. This will drive 24MHz
for the main clock and 24MHz for the system clock */
Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT);
}
/* Set up and initialize hardware prior to call to main */
void Chip_SetupIrcClocking(void)
{
Chip_IRC_SetFreq(CONFIG_MAIN_FREQ, CONFIG_SYS_FREQ);
}
/* Set up and initialize hardware prior to call to main */
/* 在main()函数之前调用此函数做基本的初始化工作 */
void SystemInit(void)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
#ifdef USE_IRC_AS_ROOT_CLOCK
/* Use 12MHz IRC as clock source */
Chip_SetupIrcClocking();
#else
/* Use Xtal or external clock_in as clock source*/
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
Chip_SWM_EnableFixedPin(SWM_FIXED_XTALIN);
Chip_SWM_EnableFixedPin(SWM_FIXED_XTALOUT);
// Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);
Chip_IOCON_PinSetMode(LPC_IOCON, IOCON_PIO8, PIN_MODE_INACTIVE);
Chip_IOCON_PinSetMode(LPC_IOCON, IOCON_PIO9, PIN_MODE_INACTIVE);
Chip_SetupXtalClocking();
#endif
}
bsp/lpc824/Libraries/common/startup/iar_startup_lpc82x.s
+188
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/**************************************************
*
* Part one of the system initialization code, contains low-level
* initialization, plain thumb variant.
*
* Copyright 2009 IAR Systems. All rights reserved.
*
* $Revision: 33183 $
*
**************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
EXTERN IRC_Only_SystemInit
PUBLIC __vector_table
PUBLIC __vector_table_0x1c
DATA
__vector_table
DCD sfe(CSTACK) ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
__vector_table_0x1c
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD SPI0_IRQHandler ; SPI0 controller
DCD SPI1_IRQHandler ; SPI1 controller
DCD 0 ; Reserved
DCD UART0_IRQHandler ; UART0
DCD UART1_IRQHandler ; UART1
DCD UART2_IRQHandler ; UART2
DCD 0 ; Reserved
DCD I2C1_IRQHandler ; I2C1
DCD I2C0_IRQHandler ; I2C0 controller
DCD SCT_IRQHandler ; Smart Counter Timer
DCD MRT_IRQHandler ; Multi-Rate Timer
DCD CMP_IRQHandler ; Comparator
DCD WDT_IRQHandler ; PIO1 (0:11)
DCD BOD_IRQHandler ; Brown Out Detect
DCD FLASH_IRQHandler ; Flash interrupt
DCD WKT_IRQHandler ; Wakeup timer
DCD ADC_SEQA_IRQHandler ; ADC sequence A completeion
DCD ADC_SEQB_IRQHandler ; ADC sequence B completeion
DCD ADC_THCMP_IRQHandler ; ADC threshold compare
DCD ADC_OVR_IRQHandler ; ADC overrun
DCD DMA_IRQHandler ; DMA
DCD I2C2_IRQHandler ; I2C2
DCD I2C3_IRQHandler ; I2C3
DCD 0 ; Reserved
DCD PININT0_IRQHandler ; PIO INT0
DCD PININT1_IRQHandler ; PIO INT1
DCD PININT2_IRQHandler ; PIO INT2
DCD PININT3_IRQHandler ; PIO INT3
DCD PININT4_IRQHandler ; PIO INT4
DCD PININT5_IRQHandler ; PIO INT5
DCD PININT6_IRQHandler ; PIO INT6
DCD PININT7_IRQHandler ; PIO INT7
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
SECTION .text:CODE:REORDER:NOROOT(1)
PUBWEAK NMI_Handler
PUBWEAK HardFault_Handler
PUBWEAK SVC_Handler
PUBWEAK DebugMon_Handler
PUBWEAK PendSV_Handler
PUBWEAK SysTick_Handler
PUBWEAK SPI0_IRQHandler
PUBWEAK SPI1_IRQHandler
PUBWEAK UART0_IRQHandler
PUBWEAK UART1_IRQHandler
PUBWEAK UART2_IRQHandler
PUBWEAK I2C1_IRQHandler
PUBWEAK I2C0_IRQHandler
PUBWEAK SCT_IRQHandler
PUBWEAK MRT_IRQHandler
PUBWEAK CMP_IRQHandler
PUBWEAK WDT_IRQHandler
PUBWEAK BOD_IRQHandler
PUBWEAK FLASH_IRQHandler
PUBWEAK WKT_IRQHandler
PUBWEAK ADC_SEQA_IRQHandler
PUBWEAK ADC_SEQB_IRQHandler
PUBWEAK ADC_THCMP_IRQHandler
PUBWEAK ADC_OVR_IRQHandler
PUBWEAK DMA_IRQHandler
PUBWEAK I2C2_IRQHandler
PUBWEAK I2C3_IRQHandler
PUBWEAK PININT0_IRQHandler
PUBWEAK PININT1_IRQHandler
PUBWEAK PININT2_IRQHandler
PUBWEAK PININT3_IRQHandler
PUBWEAK PININT4_IRQHandler
PUBWEAK PININT5_IRQHandler
PUBWEAK PININT6_IRQHandler
PUBWEAK PININT7_IRQHandler
NMI_Handler:
HardFault_Handler:
SVC_Handler:
DebugMon_Handler:
PendSV_Handler:
SysTick_Handler:
SPI0_IRQHandler:
SPI1_IRQHandler:
UART0_IRQHandler:
UART1_IRQHandler:
UART2_IRQHandler:
I2C1_IRQHandler:
I2C0_IRQHandler:
SCT_IRQHandler:
MRT_IRQHandler:
CMP_IRQHandler:
WDT_IRQHandler:
BOD_IRQHandler:
FLASH_IRQHandler:
WKT_IRQHandler:
ADC_SEQA_IRQHandler:
ADC_SEQB_IRQHandler:
ADC_THCMP_IRQHandler:
ADC_OVR_IRQHandler:
DMA_IRQHandler:
I2C2_IRQHandler:
I2C3_IRQHandler:
PININT0_IRQHandler:
PININT1_IRQHandler:
PININT2_IRQHandler:
PININT3_IRQHandler:
PININT4_IRQHandler:
PININT5_IRQHandler:
PININT6_IRQHandler:
PININT7_IRQHandler:
Default_Handler:
B Default_Handler
END
bsp/lpc824/Libraries/common/startup/keil_startup_lpc82x.s
+260
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bsp/lpc824/Libraries/peri_driver/acmp/acmp_8xx.c
+130
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/*
* @brief LPC8xx Analog comparator driver
*
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Initializes the ACMP */
void Chip_ACMP_Init(LPC_CMP_T *pACMP)
{
Chip_SYSCTL_PowerUp(SYSCTL_SLPWAKE_ACMP_PD);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ACOMP);
}
/* De-initializes the ACMP */
void Chip_ACMP_Deinit(LPC_CMP_T *pACMP)
{
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_ACOMP);
Chip_SYSCTL_PowerDown(SYSCTL_SLPWAKE_ACMP_PD);
}
/* Clears the ACMP interrupt (EDGECLR bit) */
void Chip_ACMP_EdgeClear(LPC_CMP_T *pACMP)
{
uint32_t reg = pACMP->CTRL & ~ACMP_CTRL_RESERVED;
/* Toggle EDGECLR bit high and then low */
pACMP->CTRL = reg | ACMP_EDGECLR_BIT;
pACMP->CTRL = reg & ~ACMP_EDGECLR_BIT;
}
/* Sets up ACMP edge selection */
void Chip_ACMP_SetEdgeSelection(LPC_CMP_T *pACMP, ACMP_EDGESEL_T edgeSel)
{
uint32_t reg = pACMP->CTRL & ~(ACMP_EDGESEL_MASK | ACMP_CTRL_RESERVED);
/* Select edge for COMPEDGE */
pACMP->CTRL = reg | (uint32_t) edgeSel;
}
/* Selects positive voltage input */
void Chip_ACMP_SetPosVoltRef(LPC_CMP_T *pACMP, ACMP_POS_INPUT_T Posinput)
{
uint32_t reg = pACMP->CTRL & ~(ACMP_COMPVPSEL_MASK | ACMP_CTRL_RESERVED);
/* Select positive input */
pACMP->CTRL = reg | (uint32_t) Posinput;
}
/* Selects negative voltage input */
void Chip_ACMP_SetNegVoltRef(LPC_CMP_T *pACMP, ACMP_NEG_INPUT_T Neginput)
{
uint32_t reg = pACMP->CTRL & ~(ACMP_COMPVMSEL_MASK | ACMP_CTRL_RESERVED);
/* Select negative input */
pACMP->CTRL = reg | (uint32_t) Neginput;
}
/* Selects hysteresis level */
void Chip_ACMP_SetHysteresis(LPC_CMP_T *pACMP, ACMP_HYS_T hys)
{
uint32_t reg = pACMP->CTRL & ~(ACMP_HYSTERESIS_MASK | ACMP_CTRL_RESERVED);
/* Select negative input */
pACMP->CTRL = reg | (uint32_t) hys;
}
/* Helper function for setting up ACMP control */
void Chip_ACMP_SetupAMCPRefs(LPC_CMP_T *pACMP, ACMP_EDGESEL_T edgeSel,
ACMP_POS_INPUT_T Posinput, ACMP_NEG_INPUT_T Neginput,
ACMP_HYS_T hys)
{
uint32_t reg = pACMP->CTRL & ~(ACMP_HYSTERESIS_MASK | ACMP_CTRL_RESERVED |
ACMP_COMPVMSEL_MASK | ACMP_COMPVPSEL_MASK | ACMP_EDGESEL_MASK);
/* Select negative input */
pACMP->CTRL = reg | (uint32_t) edgeSel | (uint32_t) Posinput |
(uint32_t) Neginput | (uint32_t) hys;
}
/* Sets up voltage ladder */
void Chip_ACMP_SetupVoltLadder(LPC_CMP_T *pACMP, uint32_t ladsel, bool ladrefVDDCMP)
{
uint32_t reg = pACMP->LAD & ~(ACMP_LADSEL_MASK | ACMP_LADREF_MASK | ACMP_LAD_RESERVED);
/* Setup voltage ladder and ladder reference */
if (ladrefVDDCMP) {
reg |= ACMP_LADREF_MASK;
}
pACMP->LAD = reg | (ladsel << 1);
}
bsp/lpc824/Libraries/peri_driver/acmp/acmp_8xx.h
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bsp/lpc824/Libraries/peri_driver/adc/adc_8xx.c
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/*
* @brief LPC82x ADC driver
*
* @note
* Copyright(C) NXP Semiconductors, 2014
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
#include "adc_8xx.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Initialize the ADC peripheral */
void Chip_ADC_Init(LPC_ADC_T *pADC, uint32_t flags)
{
/* Power up ADC and enable ADC base clock */
Chip_SYSCTL_PowerUp(SYSCTL_SLPWAKE_ADC_PD);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC);
/* Disable ADC interrupts */
pADC->INTEN = 0;
/* Set ADC control options */
pADC->CTRL = flags;
}
/* Shutdown ADC */
void Chip_ADC_DeInit(LPC_ADC_T *pADC)
{
pADC->INTEN = 0;
pADC->CTRL = 0;
/* Stop ADC clock and then power down ADC */
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_ADC);
Chip_SYSCTL_PowerDown(SYSCTL_SLPWAKE_ADC_PD);
}
/* Start ADC calibration */
void Chip_ADC_StartCalibration(LPC_ADC_T *pADC)
{
/* Set calibration mode */
pADC->CTRL |= ADC_CR_CALMODEBIT;
/* Clear ASYNC bit */
pADC->CTRL &= ~ADC_CR_ASYNMODE;
/* Setup ADC for about 500KHz (per UM) */
Chip_ADC_SetClockRate(pADC, 500000);
/* Clearn low power bit */
pADC->CTRL &= ~ADC_CR_LPWRMODEBIT;
/* Calibration is only complete when ADC_CR_CALMODEBIT bit has cleared */
}
bsp/lpc824/Libraries/peri_driver/adc/adc_8xx.h
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bsp/lpc824/Libraries/peri_driver/crc/crc_8xx.c
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/*
* @brief LPC8xx Cyclic Redundancy Check (CRC) Engine driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licenser disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Initialize CRC engine */
void Chip_CRC_Init(void)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_CRC);
}
/* De-initialize CRC engine */
void Chip_CRC_Deinit(void)
{
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_CRC);
}
/* Sets up the CRC engine with defaults based on the polynomial to be used */
void Chip_CRC_UseDefaultConfig(CRC_POLY_T poly)
{
switch (poly) {
case CRC_POLY_CRC16:
Chip_CRC_UseCRC16();
break;
case CRC_POLY_CRC32:
Chip_CRC_UseCRC32();
break;
case CRC_POLY_CCITT:
default:
Chip_CRC_UseCCITT();
break;
}
}
/* configure CRC engine and compute CCITT checksum from 8-bit data */
uint32_t Chip_CRC_CRC8(const uint8_t *data, uint32_t bytes)
{
Chip_CRC_UseCCITT();
while (bytes > 0) {
Chip_CRC_Write8(*data);
data++;
bytes--;
}
return Chip_CRC_Sum();
}
/* Convenience function for computing a standard CRC16 checksum from 16-bit data block */
uint32_t Chip_CRC_CRC16(const uint16_t *data, uint32_t hwords)
{
Chip_CRC_UseCRC16();
while (hwords > 0) {
Chip_CRC_Write16(*data);
data++;
hwords--;
}
return Chip_CRC_Sum();
}
/* Convenience function for computing a standard CRC32 checksum from 32-bit data block */
uint32_t Chip_CRC_CRC32(const uint32_t *data, uint32_t words)
{
Chip_CRC_UseCRC32();
while (words > 0) {
Chip_CRC_Write32(*data);
data++;
words--;
}
return Chip_CRC_Sum();
}
bsp/lpc824/Libraries/peri_driver/crc/crc_8xx.h
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bsp/lpc824/Libraries/peri_driver/dma/dma_8xx.c
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/*
* @brief LPC82x DMA chip driver
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/* DMA SRAM table - this can be optionally used with the Chip_DMA_SetSRAMBase()
function if a DMA SRAM table is needed. This table is correctly aligned for
the DMA controller. */
#ifdef __ICCARM__
#define ASTR(str) #str
#define ALIGN(x) _Pragma(ASTR(data_alignment=##x))
#else
#define ALIGN(x) __attribute__((aligned(x)))
#endif
/* Alignment of 512 bytes */
#define DMA_ALIGN ALIGN(512)
DMA_ALIGN DMA_CHDESC_T Chip_DMA_Table[MAX_DMA_CHANNEL];
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
void ChipEz_DMA_Init(uint32_t isEnableIRQ)
{
Chip_DMA_Init(LPC_DMA);
Chip_DMA_Enable(LPC_DMA);
Chip_DMA_SetSRAMBase(LPC_DMA, DMA_ADDR(Chip_DMA_Table));
if (isEnableIRQ)
NVIC_EnableIRQ(DMA_IRQn);
}
/**
* Initialize DMA parameters specific to a channel
*
* @param channel
* @param src_address
* @param dst_address
* @param xfr_width
* @param length_bytes
*/
void ChipEz_DMA_InitChannel( DMA_CHID_T channel, uint32_t src_address, uint32_t src_increment,
uint32_t dst_address, uint32_t dst_increment, uint32_t xfr_width, uint32_t length_bytes, uint32_t priority)
{
Chip_DMA_EnableChannel(LPC_DMA, channel);
Chip_DMA_EnableIntChannel(LPC_DMA, channel);
Chip_DMA_SetupChannelConfig(LPC_DMA, channel, DMA_CFG_PERIPHREQEN |
DMA_CFG_CHPRIORITY(priority));
if (src_increment != DMA_XFERCFG_SRCINC_0) {
Chip_DMA_Table[channel].source = DMA_ADDR((src_address + length_bytes)
- (1UL << xfr_width));
} else {
Chip_DMA_Table[channel].source = DMA_ADDR(src_address);
}
if (dst_increment != DMA_XFERCFG_DSTINC_0) {
Chip_DMA_Table[channel].dest = DMA_ADDR((dst_address + length_bytes)
- (1UL << xfr_width));
} else {
Chip_DMA_Table[channel].dest = DMA_ADDR(dst_address);
}
Chip_DMA_Table[channel].next = DMA_ADDR(0);
}
/**
* Start the DMA transfer
*
* @param channel
* @param src_increment
* @param dst_increment
* @param xfr_width
* @param length_bytes
*/
void ChipEz_DMA_StartTransfer(DMA_CHID_T channel, uint32_t src_increment, uint32_t dst_increment, uint32_t xfr_width, uint32_t length_bytes)
{
uint32_t xfer_count;
/* Calculate transfer_count ( length in terms of transfers) */
xfer_count = (xfr_width == DMA_XFERCFG_WIDTH_8) ? length_bytes :
(xfr_width == DMA_XFERCFG_WIDTH_16) ? (length_bytes >> 1) :
(length_bytes >> 2);
Chip_DMA_SetupChannelTransfer(LPC_DMA, channel,
(DMA_XFERCFG_CFGVALID | DMA_XFERCFG_SETINTA | DMA_XFERCFG_SWTRIG |
xfr_width | src_increment | dst_increment |
DMA_XFERCFG_XFERCOUNT(xfer_count)));
}
bool ChipEzr_DMA_Transfer( DMA_CHID_T channel, uint32_t src_address, uint32_t src_increment,
uint32_t dst_address, uint32_t dst_increment, uint32_t xfr_width, uint32_t length_bytes, uint32_t priority)
{
if ((Chip_DMA_GetBusyChannels(LPC_DMA) & (1 << channel)) != 0)
return FALSE;
ChipEz_DMA_InitChannel(channel, src_address, src_increment, dst_address, dst_increment, xfr_width, length_bytes, priority);
ChipEz_DMA_StartTransfer(channel, src_increment, dst_increment, xfr_width, length_bytes);
return TRUE;
}
void ChipEz_DMA_AbortChannel(DMA_CHID_T ch) {
Chip_DMA_DisableChannel(LPC_DMA, ch);
while ((Chip_DMA_GetBusyChannels(LPC_DMA) & (1 << ch)) != 0) {}
Chip_DMA_AbortChannel(LPC_DMA, ch);
Chip_DMA_ClearErrorIntChannel(LPC_DMA, ch);
}
bsp/lpc824/Libraries/peri_driver/dma/dma_8xx.h
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bsp/lpc824/Libraries/peri_driver/gpio/gpio_8xx.c
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/*
* @brief LPC8xx GPIO driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
#include "gpio_8xx.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
///* GPIO initilisation function */
//void Chip_GPIO_Init(LPC_GPIO_T *pGPIO)
//{
// Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO);
//}
///* GPIO deinitialisation function */
//void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO)
//{
// Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_GPIO);
//}
bsp/lpc824/Libraries/peri_driver/gpio/gpio_8xx.h
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bsp/lpc824/Libraries/peri_driver/i2c/i2c_8xx.c
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bsp/lpc824/Libraries/peri_driver/i2c/i2c_8xx.h
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bsp/lpc824/Libraries/peri_driver/iap/iap.c
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/*
* @brief Common FLASH support functions
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Prepare sector for write operation */
uint8_t Chip_IAP_PreSectorForReadWrite(uint32_t strSector, uint32_t endSector)
{
uint32_t command[5], result[5];
command[0] = IAP_PREWRRITE_CMD;
command[1] = strSector;
command[2] = endSector;
iap_entry(command, result);
return result[0];
}
/* Copy RAM to flash */
uint8_t Chip_IAP_CopyRamToFlash(uint32_t dstAdd, uint32_t *srcAdd, uint32_t byteswrt)
{
uint32_t command[5], result[5];
command[0] = IAP_WRISECTOR_CMD;
command[1] = dstAdd;
command[2] = (uint32_t) srcAdd;
command[3] = byteswrt;
command[4] = SystemCoreClock / 1000;
iap_entry(command, result);
return result[0];
}
/* Erase sector */
uint8_t Chip_IAP_EraseSector(uint32_t strSector, uint32_t endSector)
{
uint32_t command[5], result[5];
command[0] = IAP_ERSSECTOR_CMD;
command[1] = strSector;
command[2] = endSector;
command[3] = SystemCoreClock / 1000;
iap_entry(command, result);
return result[0];
}
/* Blank check sector */
uint8_t Chip_IAP_BlankCheckSector(uint32_t strSector, uint32_t endSector)
{
uint32_t command[5], result[5];
command[0] = IAP_BLANK_CHECK_SECTOR_CMD;
command[1] = strSector;
command[2] = endSector;
iap_entry(command, result);
return result[0];
}
/* Read part identification number */
uint32_t Chip_IAP_ReadPID(void)
{
uint32_t command[5], result[5];
command[0] = IAP_REPID_CMD;
iap_entry(command, result);
return result[1];
}
/* Read boot code version number */
uint32_t Chip_IAP_ReadBootCode(void)
{
uint32_t command[5], result[5];
command[0] = IAP_READ_BOOT_CODE_CMD;
iap_entry(command, result);
return result[1] & 0xffff;
}
/* IAP compare */
uint8_t Chip_IAP_Compare(uint32_t dstAdd, uint32_t srcAdd, uint32_t bytescmp)
{
uint32_t command[5], result[5];
command[0] = IAP_COMPARE_CMD;
command[1] = dstAdd;
command[2] = srcAdd;
command[3] = bytescmp;
iap_entry(command, result);
return result[0];
}
/* Reinvoke ISP */
uint8_t Chip_IAP_ReinvokeISP(void)
{
uint32_t command[5], result[5];
command[0] = IAP_REINVOKE_ISP_CMD;
iap_entry(command, result);
return result[0];
}
/* Read the unique ID */
uint32_t Chip_IAP_ReadUID(uint32_t* uid)
{
uint32_t command[5], result[5];
uint32_t i;
command[0] = IAP_READ_UID_CMD;
iap_entry(command, result);
for (i=0; i<4; i++)
*(uid+i) = result[i+1];
return result[0];
}
/* Erase page */
uint8_t Chip_IAP_ErasePage(uint32_t strPage, uint32_t endPage)
{
uint32_t command[5], result[5];
command[0] = IAP_ERASE_PAGE_CMD;
command[1] = strPage;
command[2] = endPage;
command[3] = SystemCoreClock / 1000;
iap_entry(command, result);
return result[0];
}
bsp/lpc824/Libraries/peri_driver/iap/iap.h
+184
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/*
* @brief Common IAP support functions
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licenser disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __IAP_H_
#define __IAP_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup COMMON_IAP CHIP: Common Chip ISP/IAP commands and return codes
* @ingroup CHIP_Common
* @{
*/
/* IAP command definitions */
#define IAP_PREWRRITE_CMD 50 /*!< Prepare sector for write operation command */
#define IAP_WRISECTOR_CMD 51 /*!< Write Sector command */
#define IAP_ERSSECTOR_CMD 52 /*!< Erase Sector command */
#define IAP_BLANK_CHECK_SECTOR_CMD 53 /*!< Blank check sector */
#define IAP_REPID_CMD 54 /*!< Read PartID command */
#define IAP_READ_BOOT_CODE_CMD 55 /*!< Read Boot code version */
#define IAP_COMPARE_CMD 56 /*!< Compare two RAM address locations */
#define IAP_REINVOKE_ISP_CMD 57 /*!< Reinvoke ISP */
#define IAP_READ_UID_CMD 58 /*!< Read UID */
#define IAP_ERASE_PAGE_CMD 59 /*!< Erase page */
#define IAP_EEPROM_WRITE 61 /*!< EEPROM Write command */
#define IAP_EEPROM_READ 62 /*!< EEPROM READ command */
/* IAP response definitions */
#define IAP_CMD_SUCCESS 0 /*!< Command is executed successfully */
#define IAP_INVALID_COMMAND 1 /*!< Invalid command */
#define IAP_SRC_ADDR_ERROR 2 /*!< Source address is not on word boundary */
#define IAP_DST_ADDR_ERROR 3 /*!< Destination address is not on a correct boundary */
#define IAP_SRC_ADDR_NOT_MAPPED 4 /*!< Source address is not mapped in the memory map */
#define IAP_DST_ADDR_NOT_MAPPED 5 /*!< Destination address is not mapped in the memory map */
#define IAP_COUNT_ERROR 6 /*!< Byte count is not multiple of 4 or is not a permitted value */
#define IAP_INVALID_SECTOR 7 /*!< Sector number is invalid or end sector number is greater than start sector number */
#define IAP_SECTOR_NOT_BLANK 8 /*!< Sector is not blank */
#define IAP_SECTOR_NOT_PREPARED 9 /*!< Command to prepare sector for write operation was not executed */
#define IAP_COMPARE_ERROR 10 /*!< Source and destination data not equal */
#define IAP_BUSY 11 /*!< Flash programming hardware interface is busy */
#define IAP_PARAM_ERROR 12 /*!< nsufficient number of parameters or invalid parameter */
#define IAP_ADDR_ERROR 13 /*!< Address is not on word boundary */
#define IAP_ADDR_NOT_MAPPED 14 /*!< Address is not mapped in the memory map */
#define IAP_CMD_LOCKED 15 /*!< Command is locked */
#define IAP_INVALID_CODE 16 /*!< Unlock code is invalid */
#define IAP_INVALID_BAUD_RATE 17 /*!< Invalid baud rate setting */
#define IAP_INVALID_STOP_BIT 18 /*!< Invalid stop bit setting */
#define IAP_CRP_ENABLED 19 /*!< Code read protection enabled */
/* IAP_ENTRY API function type */
typedef void (*IAP_ENTRY_T)(unsigned int[], unsigned int[]);
/**
* @brief Prepare sector for write operation
* @param strSector : Start sector number
* @param endSector : End sector number
* @return Status code to indicate the command is executed successfully or not
* @note This command must be executed before executing "Copy RAM to flash"
* or "Erase Sector" command.
* The end sector must be greater than or equal to start sector number
*/
uint8_t Chip_IAP_PreSectorForReadWrite(uint32_t strSector, uint32_t endSector);
/**
* @brief Copy RAM to flash
* @param dstAdd : Destination FLASH address where data bytes are to be written
* @param srcAdd : Source RAM address where data bytes are to be read
* @param byteswrt : Number of bytes to be written
* @return Status code to indicate the command is executed successfully or not
* @note The addresses should be a 256 byte boundary and the number of bytes
* should be 256 | 512 | 1024 | 4096
*/
uint8_t Chip_IAP_CopyRamToFlash(uint32_t dstAdd, uint32_t *srcAdd, uint32_t byteswrt);
/**
* @brief Erase sector
* @param strSector : Start sector number
* @param endSector : End sector number
* @return Status code to indicate the command is executed successfully or not
* @note The end sector must be greater than or equal to start sector number
*/
uint8_t Chip_IAP_EraseSector(uint32_t strSector, uint32_t endSector);
/**
* @brief Blank check a sector or multiples sector of on-chip flash memory
* @param strSector : Start sector number
* @param endSector : End sector number
* @return Offset of the first non blank word location if the status code is SECTOR_NOT_BLANK
* @note The end sector must be greater than or equal to start sector number
*/
// FIXME - There are two return value (result[0] & result[1]
// Result0:Offset of the first non blank word location if the Status Code is
// SECTOR_NOT_BLANK.
// Result1:Contents of non blank word location.
uint8_t Chip_IAP_BlankCheckSector(uint32_t strSector, uint32_t endSector);
/**
* @brief Read part identification number
* @return Part identification number
*/
uint32_t Chip_IAP_ReadPID(void);
/**
* @brief Read boot code version number
* @return Boot code version number
*/
uint32_t Chip_IAP_ReadBootCode(void);
/**
* @brief Compare the memory contents at two locations
* @param dstAdd : Destination of the RAM address of data bytes to be compared
* @param srcAdd : Source of the RAM address of data bytes to be compared
* @param bytescmp : Number of bytes to be compared
* @return Offset of the first mismatch of the status code is COMPARE_ERROR
* @note The addresses should be a word boundary and number of bytes should be
* a multiply of 4
*/
uint8_t Chip_IAP_Compare(uint32_t dstAdd, uint32_t srcAdd, uint32_t bytescmp);
/**
* @brief IAP reinvoke ISP to invoke the bootloader in ISP mode
* @return none
*/
uint8_t Chip_IAP_ReinvokeISP(void);
/**
* @brief Read the unique ID
* @return Status code to indicate the command is executed successfully or not
*/
uint32_t Chip_IAP_ReadUID(uint32_t* uid);
/**
* @brief Erase a page or multiple papers of on-chip flash memory
* @param strPage : Start page number
* @param endPage : End page number
* @return Status code to indicate the command is executed successfully or not
* @note The page number must be greater than or equal to start page number
*/
// FIXME - There are four return value
// Result0:The first 32-bit word (at the lowest address)
// Result1:The second 32-bit word.
// Result2:The third 32-bit word.
// Result3:The fourth 32-bit word.
uint8_t Chip_IAP_ErasePage(uint32_t strPage, uint32_t endPage);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __IAP_H_ */
bsp/lpc824/Libraries/peri_driver/inmux/inmux_8xx.h
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/*
* @brief LPC8xx INPUT MUX chip driver
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __INMUX_8XX_H_
#define __INMUX_8XX_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup INMUX_8XX CHIP: LPC8xx INPUT Mux Controller driver
* @ingroup CHIP_8XX_Drivers
* @{
*/
typedef struct {
__IO uint32_t DMA_INMUX_INMUX[2]; /*!< DMA Trigger Input 20 & 21 PINMUX 0-1 */
__O uint32_t RESERVED[6]; /*!< Reserved; Should not be used */
__IO uint32_t SCT0_INMUX[4]; /*!< Input mux register for SCT0; INPUT0-3 */
} LPC_INMUX_T;
/**
* @brief DMA INPUT MUX Index see Chip_INMUX_SetDMAOTrig()
*/
typedef enum {
DMA_INMUX_0, /*!< MUX for DMA input trigger 20 */
DMA_INMUX_1, /*!< MUX for DMA input trigger 21 */
}DMA_INMUX_T;
/**
* @brief SCT Input Mux Index; See Chip_INMUX_SetSCTInMux()
*/
typedef enum {
SCT_INMUX_0, /*!< Input mux for SCT0; INPUT 0 */
SCT_INMUX_1, /*!< Input mux for SCT0; INPUT 1 */
SCT_INMUX_2, /*!< Input mux for SCT0; INPUT 2 */
SCT_INMUX_3, /*!< Input mux for SCT0; INPUT 3 */
} SCT_INMUX_T;
/**
* @brief SCT INPUT triggers
*/
typedef enum {
SCT_INP_IN0, /*!< SCT0_IN0 selected by Pin Matrix */ /* FIXME: UM hints about changes */
SCT_INP_IN1, /*!< SCT0_IN1 selected by Pin Matrix */
SCT_INP_IN2, /*!< SCT0_IN2 selected by Pin Matrix */
SCT_INP_IN3, /*!< SCT0_IN3 selected by Pin Matrix */
SCT_INP_ADC_THCMP_IRQ, /*!< ADC Threshold compare IRQ */
SCT_INP_ACMP_O, /*!< Analog comparator output */
SCT_INP_ARM_TXEV, /*!< ARM TX Event */
SCT_INP_DEBUG_HALTED, /*!< Debug halted event */
} SCT_INP_T;
/**
* @brief Select a trigger source for a DMA channel
* @param pINMUX : The base of INPUT MUX register block
* @param imux : Index of DMA input mux
* @param ch : DMA channel ID
* @return Nothing
*/
STATIC INLINE void Chip_INMUX_SetDMAOTrig(LPC_INMUX_T *pINMUX, DMA_INMUX_T imux, DMA_CHID_T ch)
{
pINMUX->DMA_INMUX_INMUX[imux] = ch;
}
/**
* @brief Select a trigger source SCT module
* @param pINMUX : The base of INPUT MUX register block
* @param isct : Index of SCT input mux
* @param trig : SCT Input function that will cause the trigger
* @return Nothing
*/
STATIC INLINE void Chip_INMUX_SetSCTInMux(LPC_INMUX_T *pINMUX, SCT_INMUX_T isct, SCT_INP_T trig)
{
pINMUX->SCT0_INMUX[isct] = trig;
}
/** @defgroup DMATRIGMUX_8XX CHIP: LPC8xx DMA trigger selection driver
* @{
*/
/**
* @brief DMA trigger pin muxing structure
*/
typedef struct { /*!< DMA trigger pin muxing register structure */
__IO uint32_t DMA_ITRIG_INMUX[MAX_DMA_CHANNEL]; /*!< Trigger input select register for DMA channels */
} LPC_DMATRIGMUX_T;
/* DMA triggers that can mapped to DMA channels */
typedef enum {
DMATRIG_ADC_SEQA_IRQ = 0, /*!< ADC0 sequencer A interrupt as trigger */
DMATRIG_ADC_SEQB_IRQ, /*!< ADC0 sequencer B interrupt as trigger */
DMATRIG_SCT0_DMA0, /*!< SCT 0, DMA 0 as trigger */
DMATRIG_SCT0_DMA1, /*!< SCT 1, DMA 1 as trigger */
DMATRIG_ACMP_O, /*!< Analog comparator output */
DMATRIG_PINT0, /*!< Pin interrupt 0 as trigger */
DMATRIG_PINT1, /*!< Pin interrupt 1 as trigger */
DMATRIG_DMA_INMUX0, /*!< DMA Trigger MUX0 */
DMATRIG_DMA_INMUX1, /*!< DMA Trigger MUX1 */
} DMA_TRIGSRC_T;
/**
* @brief Select a trigger source for a DMA channel
* @param pDMATRIG : The base of DMA trigger setup block on the chip
* @param ch : DMA channel ID
* @param trig : Trigger source for the DMA channel
* @return Nothing
* @note A DMA trigger source only needs to be setup when the DMA is setup
* for hardware trigger mode (when Chip_DMA_SetupChannelConfig() is
* called with DMA_CFG_HWTRIGEN as OR'ed option).
*/
STATIC INLINE void Chip_DMATRIGMUX_SetInputTrig(LPC_DMATRIGMUX_T *pDMATRIG, DMA_CHID_T ch, DMA_TRIGSRC_T trig)
{
pDMATRIG->DMA_ITRIG_INMUX[ch] = (uint32_t) trig;
}
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __INMUX_8XX_H_ */
bsp/lpc824/Libraries/peri_driver/mrt/mrt_8xx.h
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bsp/lpc824/Libraries/peri_driver/mrt/stopwatch.c
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/*
* @brief LPC8xx specific stopwatch implementation
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
#include "stopwatch.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/* Precompute these to optimize runtime */
static uint32_t ticksPerSecond;
static uint32_t ticksPerMs;
static uint32_t ticksPerUs;
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Initialize stopwatch */
void StopWatch_Init(void)
{
Chip_MRT_Init();
Chip_MRT_SetMode(LPC_MRT_CH1, MRT_MODE_REPEAT);
Chip_MRT_SetInterval(LPC_MRT_CH1, 0x7ffffff | MRT_INTVAL_LOAD);
Chip_MRT_GetEnabled(LPC_MRT_CH1);
/* Pre-compute tick rate. */
ticksPerSecond = Chip_Clock_GetSystemClockRate();
ticksPerMs = ticksPerSecond / 1000;
ticksPerUs = ticksPerSecond / 1000000;
}
/* reset stopwatch */
void StopWatch_Reset(void)
{
Chip_MRT_SetInterval(LPC_MRT_CH1, 0x7ffffff | MRT_INTVAL_LOAD);
}
/* Start a stopwatch */
uint32_t StopWatch_Start(void)
{
/* Return the current timer count. */
return 0x7ffffff - Chip_MRT_GetTimer(LPC_MRT_CH1);
}
/* Returns number of ticks per second of the stopwatch timer */
uint32_t StopWatch_TicksPerSecond(void)
{
return ticksPerSecond;
}
/* Converts from stopwatch ticks to mS. */
uint32_t StopWatch_TicksToMs(uint32_t ticks)
{
return ticks / ticksPerMs;
}
/* Converts from stopwatch ticks to uS. */
uint32_t StopWatch_TicksToUs(uint32_t ticks)
{
return ticks / ticksPerUs;
}
/* Converts from mS to stopwatch ticks. */
uint32_t StopWatch_MsToTicks(uint32_t mS)
{
return mS * ticksPerMs;
}
/* Converts from uS to stopwatch ticks. */
uint32_t StopWatch_UsToTicks(uint32_t uS)
{
return uS * ticksPerUs;
}
bsp/lpc824/Libraries/peri_driver/mrt/stopwatch.h
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/*
* @brief Common stopwatch support
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __STOPWATCH_H_
#define __STOPWATCH_H_
#include "cmsis.h"
/** @defgroup Stop_Watch CHIP: Stopwatch primitives.
* @ingroup CHIP_Common
* @{
*/
/**
* @brief Initialize stopwatch
* @return Nothing
*/
void StopWatch_Init(void);
/**
* @brief reset stopwatch
* @return Nothing
*/
void StopWatch_Reset(void);
/**
* @brief Start a stopwatch
* @return Current cycle count
*/
uint32_t StopWatch_Start(void);
/**
* @brief Returns number of ticks elapsed since stopwatch was started
* @param startTime : Time returned by StopWatch_Start().
* @return Number of ticks elapsed since stopwatch was started
*/
STATIC INLINE uint32_t StopWatch_Elapsed(uint32_t startTime)
{
return StopWatch_Start() - startTime;
}
/**
* @brief Returns number of ticks per second of the stopwatch timer
* @return Number of ticks per second of the stopwatch timer
*/
uint32_t StopWatch_TicksPerSecond(void);
/**
* @brief Converts from stopwatch ticks to mS.
* @param ticks : Duration in ticks to convert to mS.
* @return Number of mS in given number of ticks
*/
uint32_t StopWatch_TicksToMs(uint32_t ticks);
/**
* @brief Converts from stopwatch ticks to uS.
* @param ticks : Duration in ticks to convert to uS.
* @return Number of uS in given number of ticks
*/
uint32_t StopWatch_TicksToUs(uint32_t ticks);
/**
* @brief Converts from mS to stopwatch ticks.
* @param mS : Duration in mS to convert to ticks.
* @return Number of ticks in given number of mS
*/
uint32_t StopWatch_MsToTicks(uint32_t mS);
/**
* @brief Converts from uS to stopwatch ticks.
* @param uS : Duration in uS to convert to ticks.
* @return Number of ticks in given number of uS
*/
uint32_t StopWatch_UsToTicks(uint32_t uS);
/**
* @brief Delays the given number of ticks using stopwatch primitives
* @param ticks : Number of ticks to delay
* @return Nothing
*/
STATIC INLINE void StopWatch_DelayTicks(uint32_t ticks)
{
uint32_t startTime = StopWatch_Start();
while (StopWatch_Elapsed(startTime) < ticks) {}
}
/**
* @brief Delays the given number of mS using stopwatch primitives
* @param mS : Number of mS to delay
* @return Nothing
*/
STATIC INLINE void StopWatch_DelayMs(uint32_t mS)
{
uint32_t ticks = StopWatch_MsToTicks(mS);
uint32_t startTime = StopWatch_Start();
while (StopWatch_Elapsed(startTime) < ticks) {}
}
/**
* @brief Delays the given number of uS using stopwatch primitives
* @param uS : Number of uS to delay
* @return Nothing
*/
STATIC INLINE void StopWatch_DelayUs(uint32_t uS)
{
uint32_t ticks = StopWatch_UsToTicks(uS);
uint32_t startTime = StopWatch_Start();
while (StopWatch_Elapsed(startTime) < ticks) {}
}
/**
* @}
*/
#endif /* __STOPWATCH_H_ */
bsp/lpc824/Libraries/peri_driver/peri_driver.h
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#ifndef _PERI_DRIVER_H_
#define _PERI_DRIVER_H_
#include "chip.h"
#include "rom/romapi_8xx.h"
#include "acmp/acmp_8xx.h"
#if defined(CHIP_LPC82X)
#include "adc/adc_8xx.h"
#endif
#include "crc/crc_8xx.h"
#if defined(CHIP_LPC82X)
#include "dma/dma_8xx.h"
#endif
#include "gpio/gpio_8xx.h"
#include "i2c/i2c_8xx.h"
#include "iap/iap.h"
#include "crc/crc_8xx.h"
#if defined(CHIP_LPC82X)
#include "inmux/inmux_8xx.h"
#endif
#include "mrt/mrt_8xx.h"
#include "mrt/stopwatch.h"
#include "pinint/pinint_8xx.h"
#include "pmu/pmu_8xx.h"
#include "sctimer/sct_8xx.h"
#include "sctimer/sct_pwm_8xx.h"
#include "spi/spi_8xx.h"
#include "uart/uart_8xx.h"
#include "wkt/wkt_8xx.h"
#include "wwdt/wwdt_8xx.h"
#include "iap/iap.h"
#endif
bsp/lpc824/Libraries/peri_driver/pinint/pinint_8xx.c
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/*
* @brief LPC8xx Pin Interrupt and Pattern Match driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licenser disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Set source for pattern match engine */
void Chip_PININT_SetPatternMatchSrc(LPC_PININT_T *pPININT, uint8_t chan, Chip_PININT_BITSLICE_T slice)
{
uint32_t pmsrc_reg;
/* Source source for pattern matching */
pmsrc_reg = pPININT->PMSRC & ~((PININT_SRC_BITSOURCE_MASK << (PININT_SRC_BITSOURCE_START + (slice * 3)))
| PININT_PMSRC_RESERVED);
pPININT->PMSRC = pmsrc_reg | (chan << (PININT_SRC_BITSOURCE_START + (slice * 3)));
}
/* Configure Pattern match engine */
void Chip_PININT_SetPatternMatchConfig(LPC_PININT_T *pPININT, Chip_PININT_BITSLICE_T slice,
Chip_PININT_BITSLICE_CFG_T slice_cfg, bool end_point)
{
uint32_t pmcfg_reg;
/* Configure bit slice configuration */
pmcfg_reg = pPININT->PMCFG & ~((PININT_SRC_BITCFG_MASK << (PININT_SRC_BITCFG_START + (slice * 3)))
| PININT_PMCFG_RESERVED);
pPININT->PMCFG = pmcfg_reg | (slice_cfg << (PININT_SRC_BITCFG_START + (slice * 3)));
/* If end point is true, enable the bits */
if (end_point == true)
{
/* By default slice 7 is final component */
if (slice != PININTBITSLICE7)
{
pPININT->PMCFG = (0x1 << slice) | (pPININT->PMCFG & ~PININT_PMCFG_RESERVED);
}
}
}
bsp/lpc824/Libraries/peri_driver/pinint/pinint_8xx.h
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bsp/lpc824/Libraries/peri_driver/pmu/pmu_8xx.c
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/*
* @brief LPC8xx PMU chip driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/* Reserved bits mask for SCR register */
#define SCB_SCR_RESERVED (~(SCB_SCR_SLEEPONEXIT_Msk|SCB_SCR_SLEEPDEEP_Msk|SCB_SCR_SEVONPEND_Msk))
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Enter MCU Sleep mode */
void Chip_PMU_SleepState(LPC_PMU_T *pPMU)
{
SCB->SCR = ~(1UL << SCB_SCR_SLEEPDEEP_Pos) & (SCB->SCR & ~SCB_SCR_RESERVED);
pPMU->PCON = PMU_PCON_PM_SLEEP;
/* Enter sleep mode */
__WFI();
}
/* Enter MCU Deep Sleep mode */
void Chip_PMU_DeepSleepState(LPC_PMU_T *pPMU)
{
SCB->SCR = (1UL << SCB_SCR_SLEEPDEEP_Pos) | (SCB->SCR & ~SCB_SCR_RESERVED);
pPMU->PCON = PMU_PCON_PM_DEEPSLEEP;
/* Enter sleep mode */
__WFI();
}
/* Enter MCU Power down mode */
void Chip_PMU_PowerDownState(LPC_PMU_T *pPMU)
{
SCB->SCR = (1UL << SCB_SCR_SLEEPDEEP_Pos) | (SCB->SCR & ~SCB_SCR_RESERVED);
pPMU->PCON = PMU_PCON_PM_POWERDOWN;
/* Enter sleep mode */
__WFI();
}
/* Enter MCU Deep Power down mode */
void Chip_PMU_DeepPowerDownState(LPC_PMU_T *pPMU)
{
SCB->SCR = (1UL << SCB_SCR_SLEEPDEEP_Pos) | (SCB->SCR & ~SCB_SCR_RESERVED);
pPMU->PCON = PMU_PCON_PM_DEEPPOWERDOWN;
/* Enter sleep mode */
__WFI();
}
/* Put some of the peripheral in sleep mode */
void Chip_PMU_Sleep(LPC_PMU_T *pPMU, CHIP_PMU_MCUPOWER_T SleepMode)
{
if (SleepMode == PMU_MCU_DEEP_SLEEP) {
Chip_PMU_DeepSleepState(pPMU);
}
else if (SleepMode == PMU_MCU_POWER_DOWN) {
Chip_PMU_PowerDownState(pPMU);
}
else if (SleepMode == PMU_MCU_DEEP_PWRDOWN) {
Chip_PMU_DeepPowerDownState(pPMU);
}
else {
/* PMU_MCU_SLEEP */
Chip_PMU_SleepState(pPMU);
}
}
bsp/lpc824/Libraries/peri_driver/pmu/pmu_8xx.h
+237
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bsp/lpc824/Libraries/peri_driver/rom/rom_i2c_8xx.h
+125
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/*
* @brief LPC8xx I2C ROM API declarations and functions
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __ROM_I2C_8XX_H_
#define __ROM_I2C_8XX_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup CHIP_I2CROM_8XX CHIP: LPC8xx I2C ROM API declarations and functions
* @ingroup CHIP_8XX_Drivers
* @{
*/
/**
* @brief LPC8xx I2C ROM driver handle structure
*/
typedef void *I2C_HANDLE_T;
/**
* @brief LPC8xx I2C ROM driver callback function
*/
typedef void (*I2C_CALLBK_T)(uint32_t err_code, uint32_t n);
/**
* LPC8xx I2C ROM driver parameter structure
*/
typedef struct I2C_PARAM {
uint32_t num_bytes_send; /*!< No. of bytes to send */
uint32_t num_bytes_rec; /*!< No. of bytes to receive */
uint8_t *buffer_ptr_send; /*!< Pointer to send buffer */
uint8_t *buffer_ptr_rec; /*!< Pointer to receive buffer */
I2C_CALLBK_T func_pt; /*!< Callback function */
uint8_t stop_flag; /*!< Stop flag */
uint8_t dummy[3];
} I2C_PARAM_T;
/**
* LPC8xx I2C ROM driver result structure
*/
typedef struct I2C_RESULT {
uint32_t n_bytes_sent; /*!< No. of bytes sent */
uint32_t n_bytes_recd; /*!< No. of bytes received */
} I2C_RESULT_T;
/**
* LPC8xx I2C ROM driver modes enum
*/
typedef enum CHIP_I2C_MODE {
IDLE, /*!< IDLE state */
MASTER_SEND, /*!< Master send state */
MASTER_RECEIVE, /*!< Master Receive state */
SLAVE_SEND, /*!< Slave send state */
SLAVE_RECEIVE /*!< Slave receive state */
} CHIP_I2C_MODE_T;
/**
* LPC8xx I2C ROM driver APIs structure
*/
typedef struct I2CD_API {
/*!< Interrupt Support Routine */
void (*i2c_isr_handler)(I2C_HANDLE_T *handle);
/*!< MASTER functions */
ErrorCode_t (*i2c_master_transmit_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_master_receive_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_master_tx_rx_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_master_transmit_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_master_receive_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_master_tx_rx_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
/*!< SLAVE functions */
ErrorCode_t (*i2c_slave_receive_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_slave_transmit_poll)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_slave_receive_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_slave_transmit_intr)(I2C_HANDLE_T *handle, I2C_PARAM_T *param, I2C_RESULT_T *result);
ErrorCode_t (*i2c_set_slave_addr)(I2C_HANDLE_T *handle, uint32_t slave_addr_0_3, uint32_t slave_mask_0_3);
/*!< OTHER support functions */
uint32_t (*i2c_get_mem_size)(void);
I2C_HANDLE_T * (*i2c_setup)( uint32_t i2c_base_addr, uint32_t * start_of_ram);
ErrorCode_t (*i2c_set_bitrate)(I2C_HANDLE_T *handle, uint32_t p_clk_in_hz, uint32_t bitrate_in_bps);
uint32_t (*i2c_get_firmware_version)(void);
CHIP_I2C_MODE_T (*i2c_get_status)(I2C_HANDLE_T *handle);
ErrorCode_t (*i2c_set_timeout)(I2C_HANDLE_T *handle, uint32_t timeout);
} I2CD_API_T;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __ROM_I2C_8XX_H_ */
bsp/lpc824/Libraries/peri_driver/rom/rom_pwr_8xx.h
+92
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/*
* @brief LPC8xx Power ROM API declarations and functions
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __ROM_PWR_8XX_H_
#define __ROM_PWR_8XX_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup PWRD_8XX CHIP: LPC8xx Power ROM API declarations and functions
* @ingroup CHIP_8XX_Drivers
* @{
*/
/**
* @brief LPC8xx Power ROM APIs - set_pll mode options
*/
#define CPU_FREQ_EQU 0
#define CPU_FREQ_LTE 1
#define CPU_FREQ_GTE 2
#define CPU_FREQ_APPROX 3
/**
* @brief LPC8xx Power ROM APIs - set_pll response0 options
*/
#define PLL_CMD_SUCCESS 0
#define PLL_INVALID_FREQ 1
#define PLL_INVALID_MODE 2
#define PLL_FREQ_NOT_FOUND 3
#define PLL_NOT_LOCKED 4
/**
* @brief LPC8xx Power ROM APIs - set_power mode options
*/
#define PWR_DEFAULT 0
#define PWR_CPU_PERFORMANCE 1
#define PWR_EFFICIENCY 2
#define PWR_LOW_CURRENT 3
/**
* @brief LPC8xx Power ROM APIs - set_power response0 options
*/
#define PWR_CMD_SUCCESS 0
#define PWR_INVALID_FREQ 1
#define PWR_INVALID_MODE 2
/**
* @brief LPC8XX Power ROM API structure
*/
typedef struct PWRD_API {
void (*set_pll)(uint32_t cmd[], uint32_t resp[]); /*!< Set PLL function */
void (*set_power)(uint32_t cmd[], uint32_t resp[]); /*!< Set power function */
} PWRD_API_T;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __ROM_PWR_8XX_H_ */
bsp/lpc824/Libraries/peri_driver/rom/rom_uart_8xx.h
+180
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/*
* @brief LPC8xx UART ROM API declarations and functions
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __ROM_UART_8XX_H_
#define __ROM_UART_8XX_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup UARTROM_8XX CHIP: LPC8xx UART ROM API declarations and functions
* @ingroup CHIP_8XX_Drivers
* @{
*/
/**
* @brief UART ROM driver - UART errors in UART configuration used in uart_init function
*/
#define OVERRUN_ERR_EN (1 << 0) /*!< Bit 0: Enable overrun error */
#define UNDERRUN_ERR_EN (1 << 1) /*!< Bit 1: Enable underrun error */
#define FRAME_ERR_EN (1 << 2) /*!< Bit 2: enable frame error */
#define PARITY_ERR_EN (1 << 3) /*!< Bit 3: enable parity error */
#define RXNOISE_ERR_EN (1 << 4) /*!< Bit 4: enable receive noise error */
/**
* Macros for UART errors
*/
/*!< Enable all the UART errors */
#define ALL_ERR_EN (OVERRUN_ERR_EN | UNDERRUN_ERR_EN | FRAME_ERR_EN | PARITY_ERR_EN | \
RXNOISE_ERR_EN)
/*!< Disable all the errors */
#define NO_ERR_EN (0)
/**
* Transfer mode values in UART parameter structure.
* Used in uart_get_line & uart_put_line function
*/
/*!< 0x00: uart_get_line: stop transfer when the buffer is full */
/*!< 0x00: uart_put_line: stop transfer when the buffer is empty */
#define TX_MODE_BUF_EMPTY (0x00)
#define RX_MODE_BUF_FULL (0x00)
/*!< 0x01: uart_get_line: stop transfer when CRLF are received */
/*!< 0x01: uart_put_line: transfer stopped after reaching \0 and CRLF is sent out after that */
#define TX_MODE_SZERO_SEND_CRLF (0x01)
#define RX_MODE_CRLF_RECVD (0x01)
/*!< 0x02: uart_get_line: stop transfer when LF are received */
/*!< 0x02: uart_put_line: transfer stopped after reaching \0. And LF is sent out after that */
#define TX_MODE_SZERO_SEND_LF (0x02)
#define RX_MODE_LF_RECVD (0x02)
/*!< 0x03: uart_get_line: RESERVED */
/*!< 0x03: uart_put_line: transfer stopped after reaching \0 */
#define TX_MODE_SZERO (0x03)
/**
* @brief UART ROM driver modes
*/
#define DRIVER_MODE_POLLING (0x00) /*!< Polling mode */
#define DRIVER_MODE_INTERRUPT (0x01) /*!< Interrupt mode */
#define DRIVER_MODE_DMA (0x02) /*!< DMA mode */
/**
* @brief UART ROM driver UART handle
*/
typedef void UART_HANDLE_T;
/**
* @brief UART ROM driver UART callback function
*/
typedef void (*UART_CALLBK_T)(uint32_t err_code, uint32_t n);
/**
* @brief UART ROM driver UART DMA callback function
*/
typedef void (*UART_DMA_REQ_T)(uint32_t src_adr, uint32_t dst_adr, uint32_t size);
/**
* @brief UART ROM driver configutaion structure
*/
typedef struct {
uint32_t sys_clk_in_hz; /*!< main clock in Hz */
uint32_t baudrate_in_hz; /*!< Baud rate in Hz */
uint8_t config; /*!< Configuration value */
/*!< bit1:0 Data Length: 00: 7 bits length, 01: 8 bits length, others: reserved */
/*!< bit3:2 Parity: 00: No Parity, 01: reserved, 10: Even, 11: Odd */
/*!< bit4: Stop Bit(s): 0: 1 Stop bit, 1: 2 Stop bits */
uint8_t sync_mod; /*!< Sync mode settings */
/*!< bit0: Mode: 0: Asynchronous mode, 1: Synchronous mode */
/*!< bit1: 0: Un_RXD is sampled on the falling edge of SCLK */
/*!< 1: Un_RXD is sampled on the rising edge of SCLK */
/*!< bit2: 0: Start and stop bits are transmitted as in asynchronous mode) */
/*!< 1: Start and stop bits are not transmitted) */
/*!< bit3: 0: The UART is a slave in Synchronous mode */
/*!< 1: The UART is a master in Synchronous mode */
uint16_t error_en; /*!< Errors to be enabled */
/*!< bit0: Overrun Errors Enabled */
/*!< bit1: Underrun Errors Enabled */
/*!< bit2: FrameErr Errors Enabled */
/*!< bit3: ParityErr Errors Enabled */
/*!< bit4: RxNoise Errors Enabled */
} UART_CONFIG_T;
/**
* @brief UART ROM driver parameter structure
*/
typedef struct {
uint8_t *buffer; /*!< Pointer to data buffer */
uint32_t size; /*!< Size of the buffer */
uint16_t transfer_mode; /*!< Transfer mode settings */
/*!< 0x00: uart_get_line: stop transfer when the buffer is full */
/*!< 0x00: uart_put_line: stop transfer when the buffer is empty */
/*!< 0x01: uart_get_line: stop transfer when CRLF are received */
/*!< 0x01: uart_put_line: transfer stopped after reaching \0 and CRLF is sent out after that */
/*!< 0x02: uart_get_line: stop transfer when LF are received */
/*!< 0x02: uart_put_line: transfer stopped after reaching \0 and LF is sent out after that */
/*!< 0x03: uart_get_line: RESERVED */
/*!< 0x03: uart_put_line: transfer stopped after reaching \0 */
uint16_t driver_mode; /*!< Driver mode */
/*!< 0x00: Polling mode, function blocked until transfer completes */
/*!< 0x01: Interrupt mode, function immediately returns, callback invoked when transfer completes */
/*!< 0x02: DMA mode, in case DMA block is available, DMA req function is called for UART DMA channel setup, then callback function indicate that transfer completes */
UART_CALLBK_T callback_func_pt; /*!< callback function pointer */
UART_DMA_REQ_T dma_req_func_pt; /*!< UART DMA channel setup function pointer, not applicable on LPC8xx */
} UART_PARAM_T;
/**
* @brief UART ROM driver APIs structure
*/
typedef struct UARTD_API {
/*!< UART Configuration functions */
uint32_t (*uart_get_mem_size)(void); /*!< Get the memory size needed by one Min UART instance */
UART_HANDLE_T * (*uart_setup)(uint32_t base_addr, uint8_t * ram); /*!< Setup Min UART instance with provided memory and return the handle to this instance */
uint32_t (*uart_init)(UART_HANDLE_T *handle, UART_CONFIG_T *set); /*!< Setup baud rate and operation mode for uart, then enable uart */
/*!< UART polling functions block until completed */
uint8_t (*uart_get_char)(UART_HANDLE_T *handle); /*!< Receive one Char from uart. This functions is only returned after Char is received. In case Echo is enabled, the received data is sent out immediately */
void (*uart_put_char)(UART_HANDLE_T *handle, uint8_t data); /*!< Send one Char through uart. This function is only returned after data is sent */
uint32_t (*uart_get_line)(UART_HANDLE_T *handle, UART_PARAM_T *param); /*!< Receive multiple bytes from UART */
uint32_t (*uart_put_line)(UART_HANDLE_T *handle, UART_PARAM_T *param); /*!< Send string (end with \0) or raw data through UART */
/*!< UART interrupt functions return immediately and callback when completed */
void (*uart_isr)(UART_HANDLE_T *handle); /*!< UART interrupt service routine. To use this routine, the corresponding USART interrupt must be enabled. This function is invoked by the user ISR */
} UARTD_API_T;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __ROM_UART_8XX_H_ */
bsp/lpc824/Libraries/peri_driver/rom/romapi_8xx.h
+96
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/*
* @brief LPC8xx ROM API declarations and functions
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __ROMAPI_8XX_H_
#define __ROMAPI_8XX_H_
#include "../iap/iap.h"
#include "../../common/chip/error_8xx.h"
#include "rom_i2c_8xx.h"
#include "rom_pwr_8xx.h"
#include "rom_uart_8xx.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup ROMAPI_8XX CHIP: LPC8xx ROM API declarations and functions
* @ingroup CHIP_8XX_Drivers
* @{
*/
/**
* @brief LPC8XX High level ROM API structure
*/
typedef struct ROM_API {
const uint32_t unused[3];
const PWRD_API_T *pPWRD; /*!< Power profiles API function table */
const uint32_t p_dev1;
const I2CD_API_T *pI2CD; /*!< I2C driver routines functions table */
const uint32_t p_dev3;
const uint32_t p_dev4;
const uint32_t p_dev5;
const UARTD_API_T *pUARTD; /*!< UART driver routines function table */
} LPC_ROM_API_T;
/* Pointer to ROM API function address */
#define LPC_ROM_API_BASE_LOC 0x1FFF1FF8UL
#define LPC_ROM_API (*(LPC_ROM_API_T * *) LPC_ROM_API_BASE_LOC)
/* Pointer to @ref PWRD_API_T functions in ROM */
#define LPC_PWRD_API ((LPC_ROM_API)->pPWRD)
/* Pointer to @ref I2CD_API_T functions in ROM */
#define LPC_I2CD_API ((LPC_ROM_API)->pI2CD)
/* Pointer to @ref UARTD_API_T functions in ROM */
#define LPC_UARTD_API ((LPC_ROM_API)->pUARTD)
/* Pointer to ROM IAP entry functions */
#define IAP_ENTRY_LOCATION 0X1FFF1FF1UL
/**
* @brief LPC8XX IAP_ENTRY API function type
*/
static INLINE void iap_entry(unsigned int cmd_param[], unsigned int status_result[])
{
((IAP_ENTRY_T) IAP_ENTRY_LOCATION)(cmd_param, status_result);
}
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __ROMAPI_8XX_H_ */
bsp/lpc824/Libraries/peri_driver/sctimer/sct_8xx.c
+81
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/*
* @brief LPC8xx State Configurable Timer driver
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Initialize SCT */
void Chip_SCT_Init(LPC_SCT_T *pSCT)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SCT);
Chip_SYSCTL_PeriphReset(RESET_SCT);
}
/* Shutdown SCT */
void Chip_SCT_DeInit(LPC_SCT_T *pSCT)
{
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SCT);
}
/* Set/Clear SCT control register */
void Chip_SCT_SetClrControl(LPC_SCT_T *pSCT, uint32_t value, FunctionalState ena)
{
if (ena == ENABLE) {
Chip_SCT_SetControl(pSCT, value);
}
else {
Chip_SCT_ClearControl(pSCT, value);
}
}
/* Set Conflict resolution */
void Chip_SCT_SetConflictResolution(LPC_SCT_T *pSCT, uint8_t outnum, uint8_t value)
{
uint32_t tem;
tem = pSCT->RES & ~((0x03 << (2 * outnum))|SCT_RES_RESERVED);
pSCT->RES = tem | (value << (2 * outnum));
}
bsp/lpc824/Libraries/peri_driver/sctimer/sct_8xx.h
+458
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bsp/lpc824/Libraries/peri_driver/sctimer/sct_pwm_8xx.c
+85
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/*
* @brief LPC8xx State Configurable Timer driver
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Setup the OUTPUT pin corresponding to the PWM index */
void Chip_SCTPWM_SetOutPin(LPC_SCT_T *pSCT, uint8_t index, uint8_t pin)
{
int ix = (int) index;
pSCT->EV[ix].CTRL = index | (1 << 12);
pSCT->EV[ix].STATE = 1;
pSCT->OUT[pin].SET = 1;
pSCT->OUT[pin].CLR = 1 << ix;
/* Clear the output in-case of conflict */
pSCT->RES = (pSCT->RES & ~(3 << (pin << 1))) | (0x01 << (pin << 1));
/* Set and Clear do not depend on direction */
pSCT->OUTPUTDIRCTRL = (pSCT->OUTPUTDIRCTRL & ~((3 << (pin << 1))|SCT_OUTPUTDIRCTRL_RESERVED));
}
/* Set the PWM frequency */
void Chip_SCTPWM_SetRate(LPC_SCT_T *pSCT, uint32_t freq)
{
uint32_t rate;
rate = Chip_Clock_GetSystemClockRate() / freq;;
/* Stop the SCT before configuration */
Chip_SCTPWM_Stop(pSCT);
/* Set MATCH0 for max limit */
pSCT->REGMODE_U = 0;
Chip_SCT_SetMatchCount(pSCT, SCT_MATCH_0, 0);
Chip_SCT_SetMatchReload(pSCT, SCT_MATCH_0, rate);
pSCT->EV[0].CTRL = 1 << 12;
pSCT->EV[0].STATE = 1;
/* Set SCT Counter to count 32-bits and reset to 0 after reaching MATCH0 */
Chip_SCT_Config(pSCT, SCT_CONFIG_32BIT_COUNTER | SCT_CONFIG_AUTOLIMIT_L);
}
bsp/lpc824/Libraries/peri_driver/sctimer/sct_pwm_8xx.h
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/*
* @brief LPC8xx State Configurable Timer (SCT/PWM) Chip driver
*
* @note
* Copyright(C) NXP Semiconductors, 2013
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licenser disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __SCT_PWM_8XX_H_
#define __SCT_PWM_8XX_H_
#include "sct_8xx.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup SCT_PWM_8XX CHIP: LPC15XX State Configurable Timer PWM driver
*
* For more information on how to use the driver please visit the FAQ page at
* <a href="http://www.lpcware.com/content/faq/how-use-sct-standard-pwm-using-lpcopen">
* www.lpcware.com</a>
*
* @ingroup CHIP_8XX_Drivers
* @{
*/
/**
* @brief Get number of ticks per PWM cycle
* @param pSCT : The base of SCT peripheral on the chip
* @return Number ot ticks that will be counted per cycle
* @note Return value of this function will be vaild only
* after calling Chip_SCTPWM_SetRate()
*/
STATIC INLINE uint32_t Chip_SCTPWM_GetTicksPerCycle(LPC_SCT_T *pSCT)
{
return pSCT->MATCHREL[0].U;
}
/**
* @brief Converts a percentage to ticks
* @param pSCT : The base of SCT peripheral on the chip
* @param percent : Percentage to convert (0 - 100)
* @return Number ot ticks corresponding to given percentage
* @note Do not use this function when using very low
* pwm rate (like 100Hz or less), on a chip that has
* very high frequency as the calculation might
* cause integer overflow
*/
STATIC INLINE uint32_t Chip_SCTPWM_PercentageToTicks(LPC_SCT_T *pSCT, uint8_t percent)
{
return (Chip_SCTPWM_GetTicksPerCycle(pSCT) * percent) / 100;
}
/**
* @brief Get number of ticks on per PWM cycle
* @param pSCT : The base of SCT peripheral on the chip
* @param index : Index of the PWM 1 to N (see notes)
* @return Number ot ticks for which the output will be ON per cycle
* @note @a index will be 1 to N where N is the "Number of
* match registers available in the SCT - 1" or
* "Number of OUTPUT pins available in the SCT" whichever
* is minimum.
*/
STATIC INLINE uint32_t Chip_SCTPWM_GetDutyCycle(LPC_SCT_T *pSCT, uint8_t index)
{
return pSCT->MATCHREL[index].U;
}
/**
* @brief Get number of ticks on per PWM cycle
* @param pSCT : The base of SCT peripheral on the chip
* @param index : Index of the PWM 1 to N (see notes)
* @param ticks : Number of ticks the output should say ON
* @return None
* @note @a index will be 1 to N where N is the "Number of
* match registers available in the SCT - 1" or
* "Number of OUTPUT pins available in the SCT" whichever
* is minimum. The new duty cycle will be effective only
* after completion of current PWM cycle.
*/
STATIC INLINE void Chip_SCTPWM_SetDutyCycle(LPC_SCT_T *pSCT, uint8_t index, uint32_t ticks)
{
Chip_SCT_SetMatchReload(pSCT, (CHIP_SCT_MATCH_REG_T)index, ticks);
}
/**
* @brief Initialize the SCT/PWM clock and reset
* @param pSCT : The base of SCT peripheral on the chip
* @return None
*/
STATIC INLINE void Chip_SCTPWM_Init(LPC_SCT_T *pSCT)
{
Chip_SCT_Init(pSCT);
}
/**
* @brief Start the SCT PWM
* @param pSCT : The base of SCT peripheral on the chip
* @return None
* @note This function must be called after all the
* configuration is completed. Do not call Chip_SCTPWM_SetRate()
* or Chip_SCTPWM_SetOutPin() after the SCT/PWM is started. Use
* Chip_SCTPWM_Stop() to stop the SCT/PWM before reconfiguring,
* Chip_SCTPWM_SetDutyCycle() can be called when the SCT/PWM is
* running to change the DutyCycle.
*/
STATIC INLINE void Chip_SCTPWM_Start(LPC_SCT_T *pSCT)
{
Chip_SCT_ClearControl(pSCT, SCT_CTRL_HALT_L | SCT_CTRL_HALT_H);
}
/**
* @brief Stop the SCT PWM
* @param pSCT : The base of SCT peripheral on the chip
* @return None
*/
STATIC INLINE void Chip_SCTPWM_Stop(LPC_SCT_T *pSCT)
{
/* Stop SCT */
Chip_SCT_SetControl(pSCT, SCT_CTRL_HALT_L | SCT_CTRL_HALT_H);
/* Clear the counter */
Chip_SCT_SetControl(pSCT, SCT_CTRL_CLRCTR_L | SCT_CTRL_CLRCTR_H);
}
/**
* @brief Sets the frequency of the generated PWM wave
* @param pSCT : The base of SCT peripheral on the chip
* @param freq : Frequency in Hz
* @return None
*/
void Chip_SCTPWM_SetRate(LPC_SCT_T *pSCT, uint32_t freq);
/**
* @brief Setup the OUTPUT pin and associate it with an index
* @param pSCT : The base of the SCT peripheral on the chip
* @param index : Index of PWM 1 to N (see notes)
* @param pin : COUT pin to be associated with the index
* @return None
* @note @a index will be 1 to N where N is the "Number of
* match registers available in the SCT - 1" or
* "Number of OUTPUT pins available in the SCT" whichever
* is minimum.
*/
void Chip_SCTPWM_SetOutPin(LPC_SCT_T *pSCT, uint8_t index, uint8_t pin);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __SCT_PWM_8XX_H_ */
bsp/lpc824/Libraries/peri_driver/spi/spi_8xx.c
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bsp/lpc824/Libraries/peri_driver/spi/spi_8xx.h
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bsp/lpc824/Libraries/peri_driver/uart/ring_buffer.c
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/*
* @brief Common ring buffer support functions
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "ring_buffer.h"
int32_t RingBuf_Init(ring_buffer_t* pRB, uint8_t* buffer, uint32_t size )
{
pRB->pBuf = (uint8_t*)buffer;
pRB->size = size;
pRB->rNdx = 0;
pRB->wNdx = 0;
pRB->cnt = 0;
return 0;
}
int32_t RingBuf_Deinit(ring_buffer_t* pRB )
{
pRB = pRB;;
return 0;
}
int32_t RingBuf_GetFreeBytes(ring_buffer_t* pRB )
{
return pRB->size - pRB->cnt;
}
int32_t RingBuf_GetUsedBytes(ring_buffer_t* pRB)
{
return pRB->cnt;
}
int32_t RingBuf_Write(ring_buffer_t* pRB, const uint8_t* data, uint32_t dataBytes)
{
uint32_t writeToEnd, bytesToCopy;
INIT_CRITICAL();
ENTER_CRITICAL();
/* Calculate the maximum amount we can copy */
writeToEnd = pRB->size - pRB->wNdx;
bytesToCopy = MIN(dataBytes, pRB->size - pRB->cnt);
if (bytesToCopy != 0)
{
/* Copy as much as we can until we fall off the end of the buffer */
memcpy(&pRB->pBuf[pRB->wNdx], data, MIN(bytesToCopy, writeToEnd));
/* Check if we have more to copy to the front of the buffer */
if (writeToEnd < bytesToCopy)
{
memcpy(pRB->pBuf, data + writeToEnd, bytesToCopy - writeToEnd);
}
/* Update the wNdx */
pRB->wNdx = (pRB->wNdx + bytesToCopy) % pRB->size;
pRB->cnt += dataBytes;
}
LEAVE_CRITICAL();
return bytesToCopy;
}
int32_t RingBuf_Write1Byte(ring_buffer_t* pRB, const uint8_t *pcData)
{
uint32_t ret = 0;
INIT_CRITICAL();
ENTER_CRITICAL();
if (pRB->cnt < pRB->size)
{
pRB->pBuf[pRB->wNdx] = pcData[0];
pRB->wNdx = (pRB->wNdx + 1) % pRB->size;
pRB->cnt++;
ret = 1;
}
LEAVE_CRITICAL();
return ret;
}
int32_t _prvRingBuf_Read(ring_buffer_t* pRB, uint8_t* data, uint32_t dataBytes, uint32_t isToFree)
{
uint32_t readToEnd, bytesToCopy;
INIT_CRITICAL();
ENTER_CRITICAL();
readToEnd = pRB->size - pRB->rNdx;
bytesToCopy = MIN(dataBytes, pRB->cnt);
if (bytesToCopy != 0)
{
memcpy(data, &pRB->pBuf[pRB->rNdx], MIN(bytesToCopy, readToEnd));
if (readToEnd < bytesToCopy)
memcpy(data + readToEnd, &pRB->pBuf[0], bytesToCopy - readToEnd);
if (isToFree)
{
pRB->rNdx = (pRB->rNdx + bytesToCopy) % pRB->size;
pRB->cnt -= bytesToCopy;
}
}
LEAVE_CRITICAL();
return bytesToCopy;
}
int32_t RingBuf_Read(ring_buffer_t* pRB, uint8_t* data, uint32_t dataBytes)
{
return _prvRingBuf_Read(pRB, data, dataBytes, 1);
}
int32_t RingBuf_Copy(ring_buffer_t* pRB, uint8_t* data, uint32_t dataBytes)
{
return _prvRingBuf_Read(pRB, data, dataBytes, 0);
}
int32_t RingBuf_Read1Byte(ring_buffer_t* pRB, uint8_t *pData)
{
uint32_t ret = 0;
INIT_CRITICAL();
ENTER_CRITICAL();
if (pRB->cnt != 0)
{
pData[0] = pRB->pBuf[pRB->rNdx];
pRB->rNdx = (pRB->rNdx + 1) % pRB->size;
pRB->cnt--;
ret = 1;
}
LEAVE_CRITICAL();
return ret;
}
int32_t RingBuf_Peek(ring_buffer_t* pRB, uint8_t **ppData)
{
uint32_t readToEnd = pRB->size - pRB->rNdx;
uint32_t contiguousBytes;
*ppData = &(pRB->pBuf[pRB->rNdx]);
contiguousBytes = MIN(readToEnd, (readToEnd + pRB->wNdx) % pRB->size);
return contiguousBytes;
}
int32_t RingBuf_Free(ring_buffer_t* pRB, uint32_t bytesToFree)
{
INIT_CRITICAL();
ENTER_CRITICAL();
pRB->rNdx = (pRB->rNdx + bytesToFree) % pRB->size;
pRB->cnt -= bytesToFree;
LEAVE_CRITICAL();
return bytesToFree;
}
bsp/lpc824/Libraries/peri_driver/uart/ring_buffer.h
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/*
* @brief Common ring buffer support functions
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __RING_BUFFER_H_
#define __RING_BUFFER_H_
#include <stdint.h>
#include <string.h>
#define RINGBUF_IRQ_SAFE
#ifdef RINGBUF_IRQ_SAFE
#include <cmsis.h>
#define INIT_CRITICAL() uint32_t priMask = __get_PRIMASK()
#define ENTER_CRITICAL() __set_PRIMASK(1)
#define LEAVE_CRITICAL() __set_PRIMASK(priMask)
#else
#define INIT_CRITICAL()
#define ENTER_CRITICAL()
#define LEAVE_CRITICAL()
#endif
typedef struct
{
uint8_t *pBuf;
uint32_t size;
uint32_t cnt;
uint32_t rNdx;
uint32_t wNdx;
} ring_buffer_t, RINGBUFF_T;
#ifndef MIN
#define MIN(x,y) ((x) < (y) ? (x) : (y))
#endif /* ifndef MIN */
/**
* @brief Create and initialize a ring buffer
* @param pRB : pointer to ring buffer instance
* @param pBuffer: pointer to the buffer for ring buffer data
* @param size: The size of buffer pointed by pBuffer
* @return >=0:Success ; <0:Failed
*/
int32_t RingBuf_Init(ring_buffer_t *pRB, uint8_t *pBuffer, uint32_t size);
/**
* @brief Write new data to buffer
* @param pRB : pointer to the ring buffer instance
* @param pcData: point to data array that will be written to ring buffer
* @param dataBytes: bytes to write
* @return >=0:Bytes written ; <0:Failed
* @remark This function updates the ring buffer
*/
int32_t RingBuf_Write(ring_buffer_t* pRB, const uint8_t *pcData, uint32_t dataBytes);
/**
* @brief Write 1 new byte data to buffer
* @param pRB : pointer to the ring buffer instance
* @param pcData: point to data byte that will be written to ring buffer
* @return 1:success; otherwise failed
* @remark This function updates the ring buffer. Optimized for byte-by-byte write
*/
int32_t RingBuf_Write1Byte(ring_buffer_t* pRB, const uint8_t *pcData);
/**
* @brief Read (copy and remove) data from ring buffer
* @param pRB : pointer to the ring buffer instance
* @param pData : pointer to data array that receives read data
* @param dataBytes: bytes to copy
* @return >=0:Bytes read ; <0:Failed
* @remark This function updates the ring buffer.
*/
int32_t RingBuf_Read(ring_buffer_t* pRB, uint8_t *pData, uint32_t dataBytes);
/**
* @brief Read (copy and remove) 1 oldest byte data from buffer
* @param pRB : pointer to the ring buffer instance
* @param pData: point to data byte that will receive the oldest byte
* @return 1:success ; otherwise failed
* @remark This function updates the ring buffer. Optimized for byte-by-byte read
*/
int32_t RingBuf_Read1Byte(ring_buffer_t* pRB, uint8_t *pData);
/**
* @brief Copy but does NOT remove data from ring buffer
* @param pRB : pointer to the ring buffer instance
* @param pData : pointer to data array that receives read data
* @param dataBytes: bytes to read
* @return >=0:Read bytes ; <0:Failed
*/
int32_t RingBuf_Copy(ring_buffer_t* pRB, uint8_t *pData, uint32_t dataBytes);
/**
* @brief Get data pointer to oldest byte in ring buffer, and contigous byte count
* @param pRB : pointer to the ring buffer instance
* @param ppData : pointer to pointer variable that will be updated to point to oldest byte
* @param contiguous_bytes: Congigous bytes until roll back
* @return >=0:Contiuous bytes until roll back or whole data (if roll back won't happen) ; <0:Failed
* @remak Use this function if performance is critical since it does NOT copy data
* Use RingBuf_Free() to free (remove) data after use
*/
int32_t RingBuf_Peek(ring_buffer_t* pRB, uint8_t **ppData);
/**
* @brief Free (remove) data from ring buffer
* @param pRB : pointer to the ring buffer instance
* @param bytesToFree : Bytes to free (remove)
* @remak Use this function to free data after data get from RingBuf_Peek() is used
*/
int32_t RingBuf_Free(ring_buffer_t* pRB, uint32_t bytesToFree);
/**
* @brief Get free bytes of ring buffer
* @param pRB : pointer to the ring buffer instance
* @return >=0:Free bytes ; <0:Failed
*/
int32_t RingBuf_GetFreeBytes(ring_buffer_t* pRB);
/**
* @brief Get free bytes of ring buffer
* @param pRB : pointer to the ring buffer instance
* @return >=0:Used bytes ; <0:Failed
*/
int32_t RingBuf_GetUsedBytes(ring_buffer_t* pRB);
/**
* @}
*/
#endif /* __RING_BUFFER_H_ */
bsp/lpc824/Libraries/peri_driver/uart/uart_8xx.c
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bsp/lpc824/Libraries/peri_driver/uart/uart_8xx.h
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bsp/lpc824/Libraries/peri_driver/wkt/wkt_8xx.c
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/*
* @brief LPC8xx Self Wakeup Timer (WKT) chip driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Set clock source for WKT */
void Chip_WKT_SetClockSource(LPC_WKT_T *pWKT, WKT_CLKSRC_T clkSrc)
{
if (clkSrc == WKT_CLKSRC_10KHZ) {
pWKT->CTRL |= WKT_CTRL_CLKSEL; /* using Low Power clock 10kHz */
}
else {
pWKT->CTRL &= ~WKT_CTRL_CLKSEL; /* using Divided IRC clock 750kHz */
}
}
/* Return approximate rate for the selected clock source */
uint32_t Chip_WKT_GetClockRate(LPC_WKT_T *pWKT)
{
if (Chip_WKT_GetClockSource(pWKT) == WKT_CLKSRC_DIVIRC) {
/* Approximately 750KHz */
return (750 * 1000);
}
else {
/* Approximately 10KHz */
return (10 * 1000);
}
}
/* Start wake-up timer interrupt, set clock source, set timer interval */
void Chip_WKT_Start(LPC_WKT_T *pWKT, WKT_CLKSRC_T clkSrc, uint32_t cntVal)
{
/* Set the WKT clock source */
Chip_WKT_SetClockSource(pWKT, (WKT_CLKSRC_T) clkSrc);
/* Set the WKT counter & start it */
pWKT->COUNT = cntVal;
}
bsp/lpc824/Libraries/peri_driver/wkt/wkt_8xx.h
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/*
* @brief LPC8xx Self Wakeup Timer (WKT) chip driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#ifndef __WKT_8XX_H_
#define __WKT_8XX_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup WKT_8XX CHIP: LPC8xx Self Wakeup Timer driver
* @ingroup CHIP_8XX_Drivers
* @{
*/
/**
* @brief Self wake-up timer register block structure
*/
typedef struct {
__IO uint32_t CTRL; /*!< Offset: 0x000 Alarm/Wakeup Timer Control register */
uint32_t Reserved[2];
__IO uint32_t COUNT; /*!< Offset: 0x000C Alarm/Wakeup Timer Counter register */
} LPC_WKT_T;
#define WKT_CTRL_RESERVED (~7)
/**
* WKT Control register bit fields & masks
*/
#define WKT_CTRL_CLKSEL ((uint32_t) (1 << 0)) /*!< Select the self wake-up timer clock source */
#define WKT_CTRL_ALARMFLAG ((uint32_t) (1 << 1)) /*!< Wake-up or alarm timer flag */
#define WKT_CTRL_CLEARCTR ((uint32_t) (1 << 2)) /*!< Clears the self wake-up timer */
/**
* WKT Clock source values enum
*/
typedef enum {
WKT_CLKSRC_DIVIRC = 0, /*!< Divided IRC clock - runs at 750kHz */
WKT_CLKSRC_10KHZ = 1 /*!< Low power clock - runs at 10kHz */
} WKT_CLKSRC_T;
/**
* @brief Get clock source for WKT
* @param pWKT : Pointer to WKT register block
* @return Clock source for the WKT
*/
STATIC INLINE WKT_CLKSRC_T Chip_WKT_GetClockSource(LPC_WKT_T *pWKT)
{
return (WKT_CLKSRC_T) (pWKT->CTRL & WKT_CTRL_CLKSEL);
}
/**
* @brief Set clock source for WKT
* @param pWKT : Pointer to WKT register block
* @param clkSrc : Clock source for the WKT
* @return Nothing
*/
void Chip_WKT_SetClockSource(LPC_WKT_T *pWKT, WKT_CLKSRC_T clkSrc);
/**
* @brief Return approximate rate for the selected clock source
* @param pWKT : Pointer to WKT register block
* @return Clock rate of the selected clock source for WKT
*/
uint32_t Chip_WKT_GetClockRate(LPC_WKT_T *pWKT);
/**
* @brief Get WKT interrupt pending status (ALARMFLAG)
* @param pWKT : Pointer to WKT register block
* @return True if the interrupt is pending, otherwise false
*/
STATIC INLINE bool Chip_WKT_GetIntStatus(LPC_WKT_T *pWKT)
{
return (bool) ((pWKT->CTRL & WKT_CTRL_ALARMFLAG) != 0);
}
/**
* @brief Clear WKT interrupt status (ALARMFLAG)
* @param pWKT : Pointer to WKT register block
* @return Nothing
*/
STATIC INLINE void Chip_WKT_ClearIntStatus(LPC_WKT_T *pWKT)
{
pWKT->CTRL = WKT_CTRL_ALARMFLAG | (pWKT->CTRL & ~WKT_CTRL_RESERVED);
}
/**
* @brief Clear and stop WKT counter
* @param pWKT : Pointer to WKT register block
* @return Nothing
*/
STATIC INLINE void Chip_WKT_Stop(LPC_WKT_T *pWKT)
{
pWKT->CTRL = WKT_CTRL_CLEARCTR | (pWKT->CTRL & ~WKT_CTRL_RESERVED);
}
/**
* @brief Load count register and start count-down sequence
* @param pWKT : Pointer to WKT register block
* @param count : Count to load in the WKT
* @return Nothing
* @note This function should not be called if the WKT is already counting.
*/
STATIC INLINE void Chip_WKT_LoadCount(LPC_WKT_T *pWKT, uint32_t count)
{
pWKT->COUNT = count;
}
/**
* @brief Start wake-up timer interrupt, set clock source, set timer interval
* @param pWKT : Pointer to WKT register block
* @param clkSrc : Clock source
* @param cntVal : Timer interval
* @return None
* @note This function should not be called if the WKT is already counting.
*/
void Chip_WKT_Start(LPC_WKT_T *pWKT, WKT_CLKSRC_T clkSrc, uint32_t cntVal);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __WKT_8XX_H_ */
bsp/lpc824/Libraries/peri_driver/wwdt/wwdt_8xx.c
+78
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@@ -0,0 +1,78 @@
/*
* @brief LPC8xx WWDT chip driver
*
* @note
* Copyright(C) NXP Semiconductors, 2012
* All rights reserved.
*
* @par
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* LPC products. This software is supplied "AS IS" without any warranties of
* any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights under any
* patent, copyright, mask work right, or any other intellectual property rights in
* or to any products. NXP Semiconductors reserves the right to make changes
* in the software without notification. NXP Semiconductors also makes no
* representation or warranty that such application will be suitable for the
* specified use without further testing or modification.
*
* @par
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers. This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
*/
#include "chip.h"
/*****************************************************************************
* Private types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Public types/enumerations/variables
****************************************************************************/
/*****************************************************************************
* Private functions
****************************************************************************/
/*****************************************************************************
* Public functions
****************************************************************************/
/* Initialize the Watchdog timer */
void Chip_WWDT_Init(LPC_WWDT_T *pWWDT)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_WWDT);
/* Disable watchdog */
pWWDT->MOD = 0;
pWWDT->TC = 0xFF;
pWWDT->WARNINT = 0xFFFF;
pWWDT->WINDOW = 0xFFFFFF;
}
/* Shutdown the Watchdog timer */
void Chip_WWDT_DeInit(LPC_WWDT_T *pWWDT)
{
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_WWDT);
}
/* Clear WWDT interrupt status flags */
void Chip_WWDT_ClearStatusFlag(LPC_WWDT_T *pWWDT, uint32_t status)
{
if (status & WWDT_WDMOD_WDTOF) {
pWWDT->MOD &= (~WWDT_WDMOD_WDTOF) & WWDT_WDMOD_BITMASK;
}
if (status & WWDT_WDMOD_WDINT) {
pWWDT->MOD = WWDT_WDMOD_WDINT | (pWWDT->MOD & ~WWDT_MOD_RESERVED);
}
}
bsp/lpc824/Libraries/peri_driver/wwdt/wwdt_8xx.h
+226
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bsp/lpc824/SConscript
+14
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@@ -0,0 +1,14 @@
# for module compiling
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
bsp/lpc824/SConstruct
+37
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@@ -0,0 +1,37 @@
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
#RTT_ROOT = os.path.join(Dir('#').get_abspath(), 'rt-thread')
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
print RTT_ROOT
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread-lpc842.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)
bsp/lpc824/applications/SConscript
+11
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@@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lpc824/applications/application.c
+57
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@@ -0,0 +1,57 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
* 2014-04-27 Bernard make code cleanup.
*/
#include <board.h>
#include <rtthread.h>
#ifndef RT_USING_HEAP
/* if there is not enable heap, we should use static thread and stack. */
ALIGN(8)
static rt_uint8_t init_stack[512];
static struct rt_thread init_thread;
#endif
void rt_init_thread_entry(void* parameter)
{
/* initialization RT-Thread Components */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_init();
#endif
}
int rt_application_init()
{
rt_thread_t tid;
#ifdef RT_USING_HEAP
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX/3, 20);
#else
{
rt_err_t result;
tid = &init_thread;
result = rt_thread_init(tid, "init", rt_init_thread_entry, RT_NULL,
init_stack, sizeof(init_stack), RT_THREAD_PRIORITY_MAX / 3, 20);
RT_ASSERT(result == RT_EOK);
}
#endif
if (tid != RT_NULL)
rt_thread_startup(tid);
return 0;
}
bsp/lpc824/applications/startup.c
+107
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@@ -0,0 +1,107 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-31 Bernard first implementation
* 2011-06-05 Bernard modify for STM32F107 version
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
/**
* @addtogroup STM32
*/
/*@{*/
extern int rt_application_init(void);
#ifdef RT_USING_FINSH
extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
/*******************************************************************************
* Function Name : assert_failed
* Description : Reports the name of the source file and the source line number
* where the assert error has occurred.
* Input : - file: pointer to the source file name
* - line: assert error line source number
* Output : None
* Return : None
*******************************************************************************/
void assert_failed(uint8_t* file, uint32_t line)
{
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line);
while (1) ;
}
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_HEAP
rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
#endif
/* init scheduler system */
rt_system_scheduler_init();
/* init application */
rt_application_init();
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/*@}*/
bsp/lpc824/drivers/SConscript
+17
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@@ -0,0 +1,17 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'drivers')
# add the general drivers.
src = Split("""
board.c
usart.c
""")
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lpc824/drivers/board.c
+75
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@@ -0,0 +1,75 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first implementation
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "board_lpc.h"
#include "usart.h"
void _init(void)
{
}
/**
* @brief This function is executed in case of error occurrence.
* @param None
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler */
/* User can add his own implementation to report the HAL error return state */
while(1)
{
}
/* USER CODE END Error_Handler */
}
/**
* This is the timer interrupt service routine.
*
*/
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
/* re-implement tick interface for STM32 HAL */
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
SysTick_Config(SystemCoreClock / RT_TIMER_TICK_PER_SECOND);
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
}
/*@}*/
bsp/lpc824/drivers/board.h
+42
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@@ -0,0 +1,42 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-09-22 Bernard add board.h to this bsp
*/
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef __BOARD_H__
#define __BOARD_H__
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define HEAP_BEGIN (&__bss_end)
#endif
#define LPC824_SRAM_SIZE 8
#define LPC824_SRAM_END (0x10000000 + LPC824_SRAM_SIZE * 1024)
#define HEAP_END LPC824_SRAM_END
void rt_hw_board_init(void);
void Error_Handler(void);
#endif
//*** <<< end of configuration section >>> ***
bsp/lpc824/drivers/usart.c
+337
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bsp/lpc824/drivers/usart.h
+23
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@@ -0,0 +1,23 @@
/*
* File : usart.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2013-11-15 bright the first version
*/
#ifndef __USART_H__
#define __USART_H__
#include <rthw.h>
#include <rtthread.h>
int rt_hw_usart_init(void);
#endif
bsp/lpc824/lpc824_rom.icf
+34
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@@ -0,0 +1,34 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00007FFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x1000FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
define symbol __ICFEDIT_size_heap__ = 0x000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block RTT_INIT_FUNC with fixed order { readonly section .rti_fn* };
initialize by copy { readwrite };
do not initialize { section .noinit };
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly, block RTT_INIT_FUNC };
place in RAM_region { readwrite, block CSTACK, last block HEAP};
bsp/lpc824/lpc824_rom.ld
+141
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@@ -0,0 +1,141 @@
/*
* linker script for LPC842 with GNU ld
*/
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 32k /* 32k flash */
DATA (rw) : ORIGIN = 0x10000000, LENGTH = 8k /* 8k sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x100;
SECTIONS
{
.text :
{
. = ALIGN(4);
_stext = .;
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
. = ALIGN(4);
_etext = .;
} > CODE = 0
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
} > CODE
__exidx_end = .;
/* .data section which is used for initialized data */
.data : AT (_sidata)
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_sdata = . ;
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >DATA
.stack :
{
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >DATA
__bss_start = .;
.bss :
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_ebss = . ;
*(.bss.init)
} > DATA
__bss_end = .;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}
bsp/lpc824/lpc824_rom.sct
+15
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@@ -0,0 +1,15 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x00008000 { ; load region size_region
ER_IROM1 0x00000000 0x00008000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x10000000 0x00002000 { ; RW data
.ANY (+RW +ZI)
}
}
bsp/lpc824/project.ewp
+2247
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bsp/lpc824/project.eww
+10
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@@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>
bsp/lpc824/project.uvprojx
+714
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bsp/lpc824/rtconfig.h
+188
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@@ -0,0 +1,188 @@
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
// <<< Use Configuration Wizard in Context Menu >>>
// <h>Basic Configuration
// <o>Maximal level of thread priority <8-256>
// <i>Default: 32
#define RT_THREAD_PRIORITY_MAX 8
// <o>OS tick per second
// <i>Default: 1000 (1ms)
#define RT_TICK_PER_SECOND 100
// <o>Alignment size for CPU architecture data access
// <i>Default: 4
#define RT_ALIGN_SIZE 4
// <o>the max length of object name<2-16>
// <i>Default: 8
#define RT_NAME_MAX 8
// <c1>Using RT-Thread components initialization
// <i>Using RT-Thread components initialization
#define RT_USING_COMPONENTS_INIT
// </c>
// <c1>Using user main
// <i>Using user main
//#define RT_USING_USER_MAIN
// </c>
// <o>the size of main thread<1-4086>
// <i>Default: 512
#define RT_MAIN_THREAD_STACK_SIZE 256
// </h>
// <h>Debug Configuration
// <c1>enable kernel debug configuration
// <i>Default: enable kernel debug configuration
//#define RT_DEBUG
// </c>
// <o>enable components initialization debug configuration<0-1>
// <i>Default: 0
#define RT_DEBUG_INIT 0
// <c1>thread stack over flow detect
// <i> Diable Thread stack over flow detect
//#define RT_USING_OVERFLOW_CHECK
// </c>
// </h>
// <h>Hook Configuration
// <c1>using hook
// <i>using hook
//#define RT_USING_HOOK
// </c>
// <c1>using idle hook
// <i>using idle hook
//#define RT_USING_IDLE_HOOK
// </c>
// </h>
// <e>Software timers Configuration
// <i> Enables user timers
#define RT_USING_TIMER_SOFT 0
#if RT_USING_TIMER_SOFT == 0
#undef RT_USING_TIMER_SOFT
#endif
// <o>The priority level of timer thread <0-31>
// <i>Default: 4
#define RT_TIMER_THREAD_PRIO 4
// <o>The stack size of timer thread <0-8192>
// <i>Default: 512
#define RT_TIMER_THREAD_STACK_SIZE 512
// <o>The soft-timer tick per second <0-1000>
// <i>Default: 100
#define RT_TIMER_TICK_PER_SECOND 100
// </e>
// <h>IPC(Inter-process communication) Configuration
// <c1>Using Semaphore
// <i>Using Semaphore
#define RT_USING_SEMAPHORE
// </c>
// <c1>Using Mutex
// <i>Using Mutex
//#define RT_USING_MUTEX
// </c>
// <c1>Using Event
// <i>Using Event
//#define RT_USING_EVENT
// </c>
// <c1>Using MailBox
// <i>Using MailBox
#define RT_USING_MAILBOX
// </c>
// <c1>Using Message Queue
// <i>Using Message Queue
//#define RT_USING_MESSAGEQUEUE
// </c>
// </h>
// <h>Memory Management Configuration
// <c1>Using Memory Pool Management
// <i>Using Memory Pool Management
//#define RT_USING_MEMPOOL
// </c>
// <c1>Dynamic Heap Management
// <i>Dynamic Heap Management
#define RT_USING_HEAP
// </c>
// <c1>using small memory
// <i>using small memory
#define RT_USING_SMALL_MEM
// </c>
// <c1>using tiny size of memory
// <i>using tiny size of memory
#define RT_USING_TINY_SIZE
// </c>
// </h>
// <h>Device System Configuration
// <c1>Using Device System
// <i>Using Device System
#define RT_USING_DEVICE
// </c>
// <c1>Using device communication
// <i>Using device communication
#define RT_USING_DEVICE_IPC
// </c>
// <c1>Using Serial
// <i>Using Serial
//#define RT_USING_SERIAL
// </c>
// </h>
// <h>Console Configuration
// <c1>Using console
// <i>Using console
#define RT_USING_CONSOLE
// </c>
// <o>the buffer size of console <1-1024>
// <i>the buffer size of console
// <i>Default: 128 (128Byte)
#define RT_CONSOLEBUF_SIZE 128
// <s>The device name for console
// <i>The device name for console
// <i>Default: uart1
#define RT_CONSOLE_DEVICE_NAME "uart1"
// </h>
// <h>Finsh Configuration
// <c1>Using finsh as shell, which is a C-Express shell
// <i>Using finsh as shell, which is a C-Express shell
#define RT_USING_FINSH
// </c>
// <o>the priority of finsh thread <1-7>
// <i>the priority of finsh thread
// <i>Default: 6
#define FINSH_THREAD_PRIORITY (RT_THREAD_PRIORITY_MAX / 8 * 5 + 1)
// <o>the stack of finsh thread <1-4096>
// <i>the stack of finsh thread
// <i>Default: 4096 (4096Byte)
#define FINSH_THREAD_STACK_SIZE 512
// <o>the history lines of finsh thread <1-32>
// <i>the history lines of finsh thread
// <i>Default: 5
#define FINSH_HISTORY_LINES 1
// <c1>Using symbol table in finsh shell
// <i>Using symbol table in finsh shell
#define FINSH_USING_SYMTAB
// </c>
// <c1>Using module shell in finsh
// <i>Using module shell in finsh
#define FINSH_USING_MSH
// </c>
// <c1>Only using module shell in finsh
// <i>Only using module shell in finsh
#define FINSH_USING_MSH_ONLY
// </c>
// </h>
// <<< end of configuration section >>>
#define RT_USING_UART
#define RT_USING_UART1
#define RT_USING_RTT_CMSIS
#endif
bsp/lpc824/rtconfig.py
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import os
# toolchains options
ARCH='arm'
CPU='cortex-m0'
CROSS_TOOL='keil'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
print '================ERROR============================'
print 'Not support gcc yet!'
print '================================================='
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
IAR_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
#BUILD = 'debug'
BUILD = 'release'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'axf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
CFLAGS = DEVICE
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-lpc824.map,-cref,-u,Reset_Handler -T lpc824_rom.ld'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
DEVICE = ' --cpu Cortex-M0+'
CFLAGS = DEVICE + ' --apcs=interwork'
AFLAGS = DEVICE
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-lpc824.map --scatter lpc824_rom.sct'
CFLAGS += ' -I./'
EXEC_PATH += '/ARM/ARMCC/bin/'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
CFLAGS += ' --split_sections'
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
elif PLATFORM == 'iar':
# toolchains
CC = 'iccarm'
AS = 'iasmarm'
AR = 'iarchive'
LINK = 'ilinkarm'
TARGET_EXT = 'out'
DEVICE = ' -D USE_STDPERIPH_DRIVER'
CFLAGS = DEVICE
CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling'
CFLAGS += ' --debug'
CFLAGS += ' --endian=little'
CFLAGS += ' --cpu=Cortex-M0'
CFLAGS += ' -e'
CFLAGS += ' --fpu=None'
CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' -Ol'
CFLAGS += ' --use_c++_inline'
AFLAGS = ''
AFLAGS += ' -s+'
AFLAGS += ' -w+'
AFLAGS += ' -r'
AFLAGS += ' --cpu Cortex-M0'
AFLAGS += ' --fpu None'
LFLAGS = ' --config lpc824_rom.icf'
LFLAGS += ' --redirect _Printf=_PrintfTiny'
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
LFLAGS += ' --entry __iar_program_start'
EXEC_PATH = IAR_PATH + '/arm/bin/'
POST_ACTION = ''
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