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Merge pull request #1463 from TanekLiang/gd32450-update

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[bsp][gd32450z-eval] update bsp:
This commit is contained in:
Bernard Xiong
2018-05-23 09:18:11 +08:00
committed by GitHub
parent eb0ce51171 e43200fa09
commit da6f9e2dc0
24 changed files with 6370 additions and 3961 deletions
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336
bsp/gd32450z-eval/.config Normal file
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#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_DEBUG=y
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_DEBUG_INIT=0
CONFIG_RT_DEBUG_THREAD=0
CONFIG_RT_USING_HOOK=y
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
# CONFIG_RT_USING_MODULE is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
#
# Device virtual file system
#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=4
CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
CONFIG_DFS_FD_MAX=8
CONFIG_RT_USING_DFS_ELMFAT=y
#
# elm-chan's FatFs, Generic FAT Filesystem Module
#
CONFIG_RT_DFS_ELM_CODE_PAGE=437
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
CONFIG_RT_DFS_ELM_USE_LFN_0=y
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
CONFIG_RT_DFS_ELM_USE_LFN=0
CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
CONFIG_RT_USING_DFS_NET=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_AIO is not set
#
# Network stack
#
#
# light weight TCP/IP stack
#
CONFIG_RT_USING_LWIP=y
CONFIG_RT_USING_LWIP141=y
# CONFIG_RT_USING_LWIP202 is not set
CONFIG_RT_LWIP_IGMP=y
CONFIG_RT_LWIP_ICMP=y
# CONFIG_RT_LWIP_SNMP is not set
CONFIG_RT_LWIP_DNS=y
CONFIG_RT_LWIP_DHCP=y
CONFIG_IP_SOF_BROADCAST=1
CONFIG_IP_SOF_BROADCAST_RECV=1
#
# Static IPv4 Address
#
CONFIG_RT_LWIP_IPADDR="192.168.1.30"
CONFIG_RT_LWIP_GWADDR="192.168.1.1"
CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
CONFIG_RT_LWIP_UDP=y
CONFIG_RT_LWIP_TCP=y
# CONFIG_RT_LWIP_RAW is not set
# CONFIG_RT_LWIP_PPP is not set
CONFIG_RT_MEMP_NUM_NETCONN=8
CONFIG_RT_LWIP_PBUF_NUM=16
CONFIG_RT_LWIP_RAW_PCB_NUM=4
CONFIG_RT_LWIP_UDP_PCB_NUM=4
CONFIG_RT_LWIP_TCP_PCB_NUM=4
CONFIG_RT_LWIP_TCP_SEG_NUM=40
CONFIG_RT_LWIP_TCP_SND_BUF=8196
CONFIG_RT_LWIP_TCP_WND=8196
CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=1024
CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=1024
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
CONFIG_SO_REUSE=1
CONFIG_LWIP_SO_RCVTIMEO=1
CONFIG_LWIP_SO_SNDTIMEO=1
CONFIG_LWIP_SO_RCVBUF=1
# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set
CONFIG_LWIP_NETIF_LOOPBACK=0
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
# CONFIG_LWIP_USING_DHCPD is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
#
# RT-Thread online packages
#
#
# system packages
#
#
# RT-Thread GUI Engine
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_ONENET is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_IPERF is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_SAMPLES is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
#
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set
#
# Privated Packages of RealThread
#
# CONFIG_PKG_USING_CODEC is not set
# CONFIG_PKG_USING_PLAYER is not set
# CONFIG_PKG_USING_PERSIMMON_SRC is not set
#
# Network Utilities
#
# CONFIG_PKG_USING_MDNS is not set
# CONFIG_PKG_USING_UPNP is not set
# CONFIG_PKG_USING_WLAN_WICED_SRC is not set
# CONFIG_PKG_USING_CLOUDSDK is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_POWER_MANAGER is not set
# CONFIG_PKG_USING_RT_OTA is not set
# CONFIG_PKG_USING_RT_AT is not set
CONFIG_BSP_USING_SDRAM=y
CONFIG_BSP_USING_UART0=y
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set
# CONFIG_BSP_USING_UART5 is not set
# CONFIG_BSP_USING_LPUART1 is not set

55
bsp/gd32450z-eval/Kconfig Normal file
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mainmenu "RT-Thread Configuration"
config $BSP_DIR
string
option env="BSP_ROOT"
default "."
config $RTT_DIR
string
option env="RTT_ROOT"
default: "rt-thread"
# you can change the RTT_ROOT default: "rt-thread"
# example : default "F:/git_repositories/rt-thread"
config $PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config BSP_USING_SDRAM
bool "Using sdram"
default y
config BSP_USING_UART0
bool "using uart0"
select RT_USING_SERIAL
default n
config BSP_USING_UART1
bool "using uart1"
select RT_USING_SERIAL
default n
config BSP_USING_UART2
bool "using uart2"
select RT_USING_SERIAL
default y
config BSP_USING_UART3
bool "using uart3"
select RT_USING_SERIAL
default n
config BSP_USING_UART4
bool "using uart4"
select RT_USING_SERIAL
default n
config BSP_USING_UART5
bool "using uart5"
select RT_USING_SERIAL
default n
config BSP_USING_LPUART1
bool "using lpuart1"
select RT_USING_SERIAL
default n

329
bsp/gd32450z-eval/Libraries/CMSIS/GD/GD32F4xx/Source/GCC/startup_gd32f4xx.S Normal file
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;/*
; * File : startup_gd32f4xx.c
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
; *
; * This program is free software; you can redistribute it and/or modify
; * it under the terms of the GNU General Public License as published by
; * the Free Software Foundation; either version 2 of the License, or
; * (at your option) any later version.
; *
; * This program is distributed in the hope that it will be useful,
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; * GNU General Public License for more details.
; *
; * You should have received a copy of the GNU General Public License along
; * with this program; if not, write to the Free Software Foundation, Inc.,
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
; *
; * Change Logs:
; * Date Author Notes
; * 2018-05-22 tanek first implementation
; */
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
g_pfnVectors:
.word _estack // Top of Stack
.word Reset_Handler // Reset Handler
.word NMI_Handler // NMI Handler
.word HardFault_Handler // Hard Fault Handler
.word MemManage_Handler // MPU Fault Handler
.word BusFault_Handler // Bus Fault Handler
.word UsageFault_Handler // Usage Fault Handler
.word 0 // Reserved
.word 0 // Reserved
.word 0 // Reserved
.word 0 // Reserved
.word SVC_Handler // SVCall Handler
.word DebugMon_Handler // Debug Monitor Handler
.word 0 // Reserved
.word PendSV_Handler // PendSV Handler
.word SysTick_Handler // SysTick Handler
// external interrupts handler
.word WWDGT_IRQHandler // 16:Window Watchdog Timer
.word LVD_IRQHandler // 17:LVD through EXTI Line detect
.word TAMPER_STAMP_IRQHandler // 18:Tamper and TimeStamp through EXTI Line detect
.word RTC_WKUP_IRQHandler // 19:RTC Wakeup through EXTI Line
.word FMC_IRQHandler // 20:FMC
.word RCU_CTC_IRQHandler // 21:RCU and CTC
.word EXTI0_IRQHandler // 22:EXTI Line 0
.word EXTI1_IRQHandler // 23:EXTI Line 1
.word EXTI2_IRQHandler // 24:EXTI Line 2
.word EXTI3_IRQHandler // 25:EXTI Line 3
.word EXTI4_IRQHandler // 26:EXTI Line 4
.word DMA0_Channel0_IRQHandler // 27:DMA0 Channel0
.word DMA0_Channel1_IRQHandler // 28:DMA0 Channel1
.word DMA0_Channel2_IRQHandler // 29:DMA0 Channel2
.word DMA0_Channel3_IRQHandler // 30:DMA0 Channel3
.word DMA0_Channel4_IRQHandler // 31:DMA0 Channel4
.word DMA0_Channel5_IRQHandler // 32:DMA0 Channel5
.word DMA0_Channel6_IRQHandler // 33:DMA0 Channel6
.word ADC_IRQHandler // 34:ADC
.word CAN0_TX_IRQHandler // 35:CAN0 TX
.word CAN0_RX0_IRQHandler // 36:CAN0 RX0
.word CAN0_RX1_IRQHandler // 37:CAN0 RX1
.word CAN0_EWMC_IRQHandler // 38:CAN0 EWMC
.word EXTI5_9_IRQHandler // 39:EXTI5 to EXTI9
.word TIMER0_BRK_TIMER8_IRQHandler // 40:TIMER0 Break and TIMER8
.word TIMER0_UP_TIMER9_IRQHandler // 41:TIMER0 Update and TIMER9
.word TIMER0_TRG_CMT_TIMER10_IRQHandler // 42:TIMER0 Trigger and Commutation and TIMER10
.word TIMER0_CC_IRQHandler // 43:TIMER0 Capture Compare
.word TIMER1_IRQHandler // 44:TIMER1
.word TIMER2_IRQHandler // 45:TIMER2
.word TIMER3_IRQHandler // 46:TIMER3
.word I2C0_EV_IRQHandler // 47:I2C0 Event
.word I2C0_ER_IRQHandler // 48:I2C0 Error
.word I2C1_EV_IRQHandler // 49:I2C1 Event
.word I2C1_ER_IRQHandler // 50:I2C1 Error
.word SPI0_IRQHandler // 51:SPI0
.word SPI1_IRQHandler // 52:SPI1
.word USART0_IRQHandler // 53:USART0
.word USART1_IRQHandler // 54:USART1
.word USART2_IRQHandler // 55:USART2
.word EXTI10_15_IRQHandler // 56:EXTI10 to EXTI15
.word RTC_Alarm_IRQHandler // 57:RTC Alarm
.word USBFS_WKUP_IRQHandler // 58:USBFS Wakeup
.word TIMER7_BRK_TIMER11_IRQHandler // 59:TIMER7 Break and TIMER11
.word TIMER7_UP_TIMER12_IRQHandler // 60:TIMER7 Update and TIMER12
.word TIMER7_TRG_CMT_TIMER13_IRQHandler // 61:TIMER7 Trigger and Commutation and TIMER13
.word TIMER7_CC_IRQHandler // 62:TIMER7 Capture Compare
.word DMA0_Channel7_IRQHandler // 63:DMA0 Channel7
.word EXMC_IRQHandler // 64:EXMC
.word SDIO_IRQHandler // 65:SDIO
.word TIMER4_IRQHandler // 66:TIMER4
.word SPI2_IRQHandler // 67:SPI2
.word UART3_IRQHandler // 68:UART3
.word UART4_IRQHandler // 69:UART4
.word TIMER5_DAC_IRQHandler // 70:TIMER5 and DAC0 DAC1 Underrun error
.word TIMER6_IRQHandler // 71:TIMER6
.word DMA1_Channel0_IRQHandler // 72:DMA1 Channel0
.word DMA1_Channel1_IRQHandler // 73:DMA1 Channel1
.word DMA1_Channel2_IRQHandler // 74:DMA1 Channel2
.word DMA1_Channel3_IRQHandler // 75:DMA1 Channel3
.word DMA1_Channel4_IRQHandler // 76:DMA1 Channel4
.word ENET_IRQHandler // 77:Ethernet
.word ENET_WKUP_IRQHandler // 78:Ethernet Wakeup through EXTI Line
.word CAN1_TX_IRQHandler // 79:CAN1 TX
.word CAN1_RX0_IRQHandler // 80:CAN1 RX0
.word CAN1_RX1_IRQHandler // 81:CAN1 RX1
.word USBFS_IRQHandler // 83:USBFS
.word DMA1_Channel5_IRQHandler // 84:DMA1 Channel5
.word DMA1_Channel6_IRQHandler // 85:DMA1 Channel6
.word DMA1_Channel7_IRQHandler // 86:DMA1 Channel7
.word USART5_IRQHandler // 87:USART5
.word I2C2_EV_IRQHandler // 88:I2C2 Event
.word I2C2_ER_IRQHandler // 89:I2C2 Error
.word USBHS_EP1_Out_IRQHandler // 90:USBHS Endpoint 1 Out
.word USBHS_EP1_In_IRQHandler // 91:USBHS Endpoint 1 in
.word USBHS_WKUP_IRQHandler // 92:USBHS Wakeup through EXTI Line
.word USBHS_IRQHandler // 93:USBHS
.word DCI_IRQHandler // 94:DCI
.word 0 // 95:Reserved
.word TRNG_IRQHandler // 96:TRNG
.word FPU_IRQHandler // 97:FPU
.word UART6_IRQHandler // 98:UART6
.word UART7_IRQHandler // 98:UART7
.word SPI3_IRQHandler // 100:SPI3
.word SPI4_IRQHandler // 101:SPI4
.word SPI5_IRQHandler // 102:SPI5
.word TLI_IRQHandler // 104:TLI
.word TLI_ER_IRQHandler // 105:TLI Error
.word IPA_IRQHandler // 106:IPA
.size g_pfnVectors, .-g_pfnVectors
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r1, =_sidata
ldr r2, =_sdata
ldr r3, =_edata
subs r3, r2
ble fill_bss_start
loop_copy_data:
subs r3, #4
ldr r0, [r1,r3]
str r0, [r2,r3]
bgt loop_copy_data
fill_bss_start:
ldr r1, =__bss_start
ldr r2, =__bss_end
movs r0, 0
subs r2, r1
ble startup_enter
loop_fill_bss:
subs r2, #4
str r0, [r1, r2]
bgt loop_fill_bss
startup_enter:
bl SystemInit
bl entry
/* Exception Handlers */
.weak NMI_Handler
.type NMI_Handler, %function
NMI_Handler:
b .
.size NMI_Handler, . - NMI_Handler
.weak MemManage_Handler
.type MemManage_Handler, %function
MemManage_Handler:
b .
.size MemManage_Handler, . - MemManage_Handler
.weak BusFault_Handler
.type BusFault_Handler, %function
BusFault_Handler:
b .
.size BusFault_Handler, . - BusFault_Handler
.weak UsageFault_Handler
.type UsageFault_Handler, %function
UsageFault_Handler:
b .
.size UsageFault_Handler, . - UsageFault_Handler
.weak SVC_Handler
.type SVC_Handler, %function
SVC_Handler:
b .
.size SVC_Handler, . - SVC_Handler
.weak DebugMon_Handler
.type DebugMon_Handler, %function
DebugMon_Handler:
b .
.size DebugMon_Handler, . - DebugMon_Handler
.weak PendSV_Handler
.type PendSV_Handler, %function
PendSV_Handler:
b .
.size PendSV_Handler, . - PendSV_Handler
.weak SysTick_Handler
.type SysTick_Handler, %function
SysTick_Handler:
b .
.size SysTick_Handler, . - SysTick_Handler
/* IQR Handler */
.section .text.Default_Handler,"ax",%progbits
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
IRQ WWDGT_IRQHandler
IRQ LVD_IRQHandler
IRQ TAMPER_STAMP_IRQHandler
IRQ RTC_WKUP_IRQHandler
IRQ FMC_IRQHandler
IRQ RCU_CTC_IRQHandler
IRQ EXTI0_IRQHandler
IRQ EXTI1_IRQHandler
IRQ EXTI2_IRQHandler
IRQ EXTI3_IRQHandler
IRQ EXTI4_IRQHandler
IRQ DMA0_Channel0_IRQHandler
IRQ DMA0_Channel1_IRQHandler
IRQ DMA0_Channel2_IRQHandler
IRQ DMA0_Channel3_IRQHandler
IRQ DMA0_Channel4_IRQHandler
IRQ DMA0_Channel5_IRQHandler
IRQ DMA0_Channel6_IRQHandler
IRQ ADC_IRQHandler
IRQ CAN0_TX_IRQHandler
IRQ CAN0_RX0_IRQHandler
IRQ CAN0_RX1_IRQHandler
IRQ CAN0_EWMC_IRQHandler
IRQ EXTI5_9_IRQHandler
IRQ TIMER0_BRK_TIMER8_IRQHandler
IRQ TIMER0_UP_TIMER9_IRQHandler
IRQ TIMER0_TRG_CMT_TIMER10_IRQHandler
IRQ TIMER0_CC_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ TIMER3_IRQHandler
IRQ I2C0_EV_IRQHandler
IRQ I2C0_ER_IRQHandler
IRQ I2C1_EV_IRQHandler
IRQ I2C1_ER_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPI1_IRQHandler
IRQ USART0_IRQHandler
IRQ USART1_IRQHandler
IRQ USART2_IRQHandler
IRQ EXTI10_15_IRQHandler
IRQ RTC_Alarm_IRQHandler
IRQ USBFS_WKUP_IRQHandler
IRQ TIMER7_BRK_TIMER11_IRQHandler
IRQ TIMER7_UP_TIMER12_IRQHandler
IRQ TIMER7_TRG_CMT_TIMER13_IRQHandler
IRQ TIMER7_CC_IRQHandler
IRQ DMA0_Channel7_IRQHandler
IRQ EXMC_IRQHandler
IRQ SDIO_IRQHandler
IRQ TIMER4_IRQHandler
IRQ SPI2_IRQHandler
IRQ UART3_IRQHandler
IRQ UART4_IRQHandler
IRQ TIMER5_DAC_IRQHandler
IRQ TIMER6_IRQHandler
IRQ DMA1_Channel0_IRQHandler
IRQ DMA1_Channel1_IRQHandler
IRQ DMA1_Channel2_IRQHandler
IRQ DMA1_Channel3_IRQHandler
IRQ DMA1_Channel4_IRQHandler
IRQ ENET_IRQHandler
IRQ ENET_WKUP_IRQHandler
IRQ CAN1_TX_IRQHandler
IRQ CAN1_RX0_IRQHandler
IRQ CAN1_RX1_IRQHandler
IRQ CAN1_EWMC_IRQHandler
IRQ USBFS_IRQHandler
IRQ DMA1_Channel5_IRQHandler
IRQ DMA1_Channel6_IRQHandler
IRQ DMA1_Channel7_IRQHandler
IRQ USART5_IRQHandler
IRQ I2C2_EV_IRQHandler
IRQ I2C2_ER_IRQHandler
IRQ USBHS_EP1_Out_IRQHandler
IRQ USBHS_EP1_In_IRQHandler
IRQ USBHS_WKUP_IRQHandler
IRQ USBHS_IRQHandler
IRQ DCI_IRQHandler
IRQ TRNG_IRQHandler
IRQ FPU_IRQHandler
IRQ UART6_IRQHandler
IRQ UART7_IRQHandler
IRQ SPI3_IRQHandler
IRQ SPI4_IRQHandler
IRQ SPI5_IRQHandler
IRQ TLI_IRQHandler
IRQ TLI_ER_IRQHandler
IRQ IPA_IRQHandler

10
bsp/gd32450z-eval/Libraries/GD32F4xx_standard_peripheral/Source/gd32f4xx_enet.c
View File

@@ -31,6 +31,16 @@ uint8_t rx_buff[ENET_RXBUF_NUM][ENET_RXBUF_SIZE]; /*!< ENET receive bu
#pragma data_alignment=4
uint8_t tx_buff[ENET_TXBUF_NUM][ENET_TXBUF_SIZE]; /*!< ENET transmit buffer */
#elif defined ( __GNUC__ )
__attribute__((aligned(4)))
enet_descriptors_struct rxdesc_tab[ENET_RXBUF_NUM]; /*!< ENET RxDMA descriptor */
__attribute__((aligned(4)))
enet_descriptors_struct txdesc_tab[ENET_TXBUF_NUM]; /*!< ENET TxDMA descriptor */
__attribute__((aligned(4)))
uint8_t rx_buff[ENET_RXBUF_NUM][ENET_RXBUF_SIZE]; /*!< ENET receive buffer */
__attribute__((aligned(4)))
uint8_t tx_buff[ENET_TXBUF_NUM][ENET_TXBUF_SIZE]; /*!< ENET transmit buffer */
#endif /* __CC_ARM */
/* global transmit and receive descriptors pointers */

5
bsp/gd32450z-eval/Libraries/SConscript
View File

@@ -11,10 +11,7 @@ src += [cwd + '/CMSIS/GD/GD32F4xx/Source/system_gd32f4xx.c']
#add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
print('=================================================')
print('Not support gcc yet!')
print('=================================================')
exit(0)
src += [cwd + '/CMSIS/GD/GD32F4xx/Source/GCC/startup_gd32f4xx.s']
elif rtconfig.CROSS_TOOL == 'keil':
src += [cwd + '/CMSIS/GD/GD32F4xx/Source/ARM/startup_gd32f4xx.s']
elif rtconfig.CROSS_TOOL == 'iar':

73
bsp/gd32450z-eval/README.md Normal file
View File

@@ -0,0 +1,73 @@
# GD32450Z-EVAL
## 简介
GD32450Z-EVAL是-兆易创新推出的一款GD32F450系列的评估板，板载资源主要如下：
| 硬件 | 描述 |
| --------- | ------------- |
| 芯片型号 | GD32F450ZKT6 |
| CPU | ARM Cortex M4 |
| 主频 | 200M |
| 片内SRAM | 256K |
| 片外SDRAM | 32M |
| 片内FLASH | 3072K |
## 编译说明
GD32450Z-EVAL板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
| IDE/编译器 | 已测试版本 |
| ---------- | ---------------------------- |
| MDK4 | MDK4.74 |
| MDK5 | MDK524a |
| IAR | IAR 7.60~IAR8.20 |
| GCC | GCC 5.4.1 20160919 (release) |
## 烧写及执行
供电方式：开发板使用 Mini USB 接口或者 DC-005 连接器提供 5V 电源。
下载程序：下载程序到开发板需要一套 JLink 或者使用 GD-Link 工具。
串口连接：使用串口线连接到COM1(UART0)，或者使用USB转TTL模块连接PA9(MCU TX)和PA10(MCU RX)。
### 运行结果
如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息：
```bash
\ | /
- RT - Thread Operating System
/ | \ 3.0.4 build May 22 2018
2006 - 2018 Copyright by rt-thread team
finsh />
```
## 驱动支持情况及计划
| 驱动 | 支持情况 | 备注 |
| --------- | -------- | :------------------------: |
| UART | 支持 | UART0~7 |
| GPIO | 未支持 | |
| IIC | 未支持 | |
| SPI | 支持 | SPI0~5 |
| ETH | 支持 | |
| LCD | 支持 | 支持FrameBuffer模式LCD显示 |
| SDRAM | 支持 | |
| SPI FLASH | 支持 | |
### IO在板级支持包中的映射情况
| IO号 | 板级包中的定义 |
| ---- | -------------- |
| PD4 | LED1 |
| PD5 | LED2 |
| PG3 | LED3 |
| PA9 | KEY1 |
| PC13 | KEY2 |
| PB14 | KEY3 |
## 联系人信息
维护人：[tanek](https://github.com/TanekLiang)

83
bsp/gd32450z-eval/applications/application.c
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@@ -1,83 +0,0 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
* 2014-04-27 Bernard make code cleanup.
*/
#include <board.h>
#include <rtthread.h>
#include <finsh.h>
#ifdef PKG_USING_GUIENGINE
#include "rtgui_demo.h"
#include <rtgui/driver.h>
#endif
#ifdef RT_USING_DFS
/* dfs init */
#include <dfs.h>
/* dfs filesystem:ELM filesystem init */
#include <dfs_elm.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#include <dfs_posix.h>
#endif
#include <gd32f4xx.h>
void rt_init_thread_entry(void* parameter)
{
/* initialization RT-Thread Components */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_init();
#endif
#ifdef PKG_USING_GUIENGINE
{
rt_device_t device;
device = rt_device_find("lcd");
/* re-set graphic device */
rtgui_graphic_set_device(device);
rt_gui_demo_init();
}
#endif
#ifdef RT_USING_DFS
#ifdef RT_USING_DFS_ELMFAT
/* mount sd card fat partition 0 as root directory */
if (dfs_mount("gd25q16", "/", "elm", 0, 0) == 0)
{
rt_kprintf("spi flash mount to / !\n");
}
else
{
rt_kprintf("spi flash mount to / failed!\n");
}
#endif /* RT_USING_DFS_ELMFAT */
#endif /* DFS */
}
int rt_application_init()
{
rt_thread_t tid;
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid != RT_NULL)
rt_thread_startup(tid);
return 0;
}

31
bsp/gd32450z-eval/applications/main.c Normal file
View File

@@ -0,0 +1,31 @@
/*
* File : main.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-05-18 tanek first implementation
*/
#include <stdio.h>
#include <rtthread.h>
int main(void)
{
return 0;
}

125
bsp/gd32450z-eval/applications/rtgui_demo.c
View File

@@ -1,125 +0,0 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
*/
#include <rtthread.h>
#include <finsh.h>
#include "rtgui_demo.h"
#define DEBUG
#ifdef DEBUG
#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
#else
#define DEBUG_PRINTF(...)
#endif
#ifdef PKG_USING_GUIENGINE
#include <rtgui/rtgui.h>
#include <rtgui/rtgui_system.h>
#include <rtgui/rtgui_app.h>
#include <rtgui/widgets/window.h>
#include <rtgui/dc.h>
struct rtgui_win *main_win;
rt_bool_t dc_event_handler(struct rtgui_object *object, rtgui_event_t *event);
static void rt_gui_demo_entry(void *parameter)
{
struct rtgui_app *app;
//struct rtgui_dc *dc;
DEBUG_PRINTF("gui demo entry\n");
/* create gui app */
app = rtgui_app_create("gui_demo");
if (app == RT_NULL)
{
DEBUG_PRINTF("rtgui_app_create faild\n");
return;
}
/* create main window */
main_win = rtgui_mainwin_create(RT_NULL,
"UiWindow", RTGUI_WIN_STYLE_NO_TITLE | RTGUI_WIN_STYLE_NO_BORDER);
if (main_win == RT_NULL)
{
DEBUG_PRINTF("main_win is null\n");
rtgui_app_destroy(app);
return;
}
rtgui_object_set_event_handler(RTGUI_OBJECT(main_win), dc_event_handler);
DEBUG_PRINTF("rtgui_win_show\n");
rtgui_win_show(main_win, RT_FALSE);
DEBUG_PRINTF("rtgui_app_run\n");
rtgui_app_run(app);
DEBUG_PRINTF("rtgui_win_destroy\n");
rtgui_win_destroy(main_win);
DEBUG_PRINTF("rtgui_app_destroy\n");
rtgui_app_destroy(app);
}
rt_bool_t dc_event_handler(struct rtgui_object *object, rtgui_event_t *event)
{
struct rtgui_widget *widget = RTGUI_WIDGET(object);
if (event->type == RTGUI_EVENT_PAINT)
{
struct rtgui_dc *dc;
rtgui_rect_t rect;
rt_kprintf("\r\n RTGUI_EVENT_PAINT \r\n");
rtgui_win_event_handler(RTGUI_OBJECT(widget), event);
rtgui_widget_get_rect(widget, &rect);
DEBUG_PRINTF("widget react x1: %d, y1: %d, x2: %d, y2: %d\r\n",
rect.x1, rect.y1, rect.x2, rect.y2);
dc = rtgui_dc_begin_drawing(widget);
if(dc == RT_NULL)
{
DEBUG_PRINTF("\r\n dc is null \r\n");
return RT_FALSE;
}
rtgui_dc_draw_line(dc, rect.x1, rect.y1, rect.x2, rect.y2);
rtgui_dc_draw_line(dc, rect.x1, rect.y2, rect.x2, rect.y1);
rect.x1 += (rect.x2 - rect.x1) / 2;
rect.y1 += (rect.y2 - rect.y1) / 2;
rtgui_dc_draw_text_stroke(dc, __DATE__"--"__TIME__, &rect, HIGH_LIGHT, BLUE);
rtgui_dc_end_drawing(dc,RT_TRUE);
}
return RT_FALSE;
}
int rt_gui_demo_init(void)
{
rt_thread_t tid;
tid = rt_thread_create("mygui",
rt_gui_demo_entry, RT_NULL,
2048, 25, 10);
if (tid != RT_NULL)
rt_thread_startup(tid);
return 0;
}
#endif /* PKG_USING_GUIENGINE */

107
bsp/gd32450z-eval/applications/startup.c
View File

@@ -1,107 +0,0 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-31 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include <gd32f4xx.h>
#include "board.h"
/**
* @addtogroup GD32F4xx
*/
/*@{*/
extern int rt_application_init(void);
#ifdef RT_USING_FINSH
extern int finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
/*******************************************************************************
* Function Name : assert_failed
* Description : Reports the name of the source file and the source line number
* where the assert error has occurred.
* Input : - file: pointer to the source file name
* - line: assert error line source number
* Output : None
* Return : None
*******************************************************************************/
void assert_failed(uint8_t* file, uint32_t line)
{
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
rt_kprintf(" file %s\r\n", file);
rt_kprintf(" line %d\r\n", line);
while (1) ;
}
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_EXT_SDRAM
rt_system_heap_init((void*)EXT_SDRAM_BEGIN, (void*)EXT_SDRAM_END);
#else
rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
#endif
/* init scheduler system */
rt_system_scheduler_init();
/* init application */
rt_application_init();
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/*@}*/

11
bsp/gd32450z-eval/drivers/SConscript
View File

@@ -7,12 +7,18 @@ cwd = os.path.join(str(Dir('#')), 'drivers')
# add the general drivers.
src = Split("""
board.c
drv_exmc_sdram.c
drv_usart.c
""")
CPPPATH = [cwd]
# add uart drivers.
if GetDepend('RT_USING_SERIAL'):
src += ['drv_usart.c']
# add sdram drivers.
if GetDepend('BSP_USING_SDRAM'):
src += ['drv_exmc_sdram.c']
# add Ethernet drivers.
if GetDepend('RT_USING_LWIP'):
src += ['drv_enet.c', 'synopsys_emac.c']
@@ -27,7 +33,6 @@ if GetDepend('RT_USING_SFUD'):
elif GetDepend('RT_USING_SPI'):
src += ['drv_spi.c']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

27
bsp/gd32450z-eval/drivers/board.c
View File

@@ -26,12 +26,12 @@
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler */
/* User can add his own implementation to report the HAL error return state */
while(1)
{
}
/* USER CODE END Error_Handler */
/* USER CODE BEGIN Error_Handler */
/* User can add his own implementation to report the HAL error return state */
while (1)
{
}
/* USER CODE END Error_Handler */
}
/** System Clock Configuration
@@ -57,13 +57,12 @@ void SysTick_Handler(void)
rt_interrupt_leave();
}
/**
* This function will initial GD32 board.
*/
void rt_hw_board_init()
{
/* NVIC Configuration */
/* NVIC Configuration */
#define NVIC_VTOR_MASK 0x3FFFFF80
#ifdef VECT_TAB_RAM
/* Set the Vector Table base location at 0x10000000 */
@@ -72,15 +71,21 @@ void rt_hw_board_init()
/* Set the Vector Table base location at 0x08000000 */
SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK);
#endif
SystemClock_Config();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(CONSOLE_DEVICE);
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef BSP_USING_SDRAM
rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END);
#else
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
}

34
bsp/gd32450z-eval/drivers/board.h
View File

@@ -18,7 +18,6 @@
#include <gd32f4xx.h>
#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */
#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */
@@ -46,39 +45,6 @@ extern int __bss_end;
#define HEAP_END GD32_SRAM_END
// <o> Console on USART:
// <127=> no console
// <0=>USART 0 <1=>USART 1 <2=>USART 2 <3=> USART 3
// <4=>USART 4 <5=>USART 5 <6=>USART 6 <7=> USART 7
// <i>Default: 1
#define GD32_CONSOLE_USART 0
void rt_hw_board_init(void);
#if GD32_CONSOLE_USART == 127
#define CONSOLE_DEVICE "no"
#elif GD32_CONSOLE_USART == 0
#define CONSOLE_DEVICE "uart0"
#elif GD32_CONSOLE_USART == 1
#define CONSOLE_DEVICE "uart1"
#elif GD32_CONSOLE_USART == 2
#define CONSOLE_DEVICE "uart2"
#elif GD32_CONSOLE_USART == 3
#define CONSOLE_DEVICE "uart3"
#elif GD32_CONSOLE_USART == 4
#define CONSOLE_DEVICE "uart4"
#elif GD32_CONSOLE_USART == 5
#define CONSOLE_DEVICE "uart5"
#elif GD32_CONSOLE_USART == 6
#define CONSOLE_DEVICE "uart6"
#elif GD32_CONSOLE_USART == 7
#define CONSOLE_DEVICE "uart7"
#endif
#define FINSH_DEVICE_NAME CONSOLE_DEVICE
void Error_Handler(void);
#endif
//*** <<< end of configuration section >>> ***

56
bsp/gd32450z-eval/drivers/drv_usart.c
View File

@@ -22,10 +22,10 @@
#ifdef RT_USING_SERIAL
#if !defined(RT_USING_USART0) && !defined(RT_USING_USART1) && \
!defined(RT_USING_USART2) && !defined(RT_USING_UART3) && \
!defined(RT_USING_UART4) && !defined(RT_USING_USART5) && \
!defined(RT_USING_UART6) && !defined(RT_USING_UART7)
#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && \
!defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
!defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && \
!defined(BSP_USING_UART6) && !defined(BSP_USING_UART7)
#error "Please define at least one UARTx"
#endif
@@ -54,7 +54,7 @@ struct gd32_uart
static void uart_isr(struct rt_serial_device *serial);
#if defined(RT_USING_USART0)
#if defined(BSP_USING_UART0)
struct rt_serial_device serial0;
void USART0_IRQHandler(void)
@@ -68,9 +68,9 @@ void USART0_IRQHandler(void)
rt_interrupt_leave();
}
#endif /* RT_USING_USART0 */
#endif /* BSP_USING_UART0 */
#if defined(RT_USING_USART1)
#if defined(BSP_USING_UART1)
struct rt_serial_device serial1;
void USART1_IRQHandler(void)
@@ -84,9 +84,9 @@ void USART1_IRQHandler(void)
rt_interrupt_leave();
}
#endif /* RT_USING_UART1 */
#endif /* BSP_USING_UART1 */
#if defined(RT_USING_USART2)
#if defined(BSP_USING_UART2)
struct rt_serial_device serial2;
void USART2_IRQHandler(void)
@@ -100,9 +100,9 @@ void USART2_IRQHandler(void)
rt_interrupt_leave();
}
#endif /* RT_USING_UART2 */
#endif /* BSP_USING_UART2 */
#if defined(RT_USING_UART3)
#if defined(BSP_USING_UART3)
struct rt_serial_device serial3;
void UART3_IRQHandler(void)
@@ -116,9 +116,9 @@ void UART3_IRQHandler(void)
rt_interrupt_leave();
}
#endif /* RT_USING_UART3 */
#endif /* BSP_USING_UART3 */
#if defined(RT_USING_UART4)
#if defined(BSP_USING_UART4)
struct rt_serial_device serial4;
void UART4_IRQHandler(void)
@@ -131,9 +131,9 @@ void UART4_IRQHandler(void)
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART4 */
#endif /* BSP_USING_UART4 */
#if defined(RT_USING_USART5)
#if defined(BSP_USING_UART5)
struct rt_serial_device serial5;
void USART5_IRQHandler(void)
@@ -147,9 +147,9 @@ void USART5_IRQHandler(void)
rt_interrupt_leave();
}
#endif /* RT_USING_UART5 */
#endif /* BSP_USING_UART5 */
#if defined(RT_USING_UART6)
#if defined(BSP_USING_UART6)
struct rt_serial_device serial6;
void UART6_IRQHandler(void)
@@ -163,9 +163,9 @@ void UART6_IRQHandler(void)
rt_interrupt_leave();
}
#endif /* RT_USING_UART6 */
#endif /* BSP_USING_UART6 */
#if defined(RT_USING_UART7)
#if defined(BSP_USING_UART7)
struct rt_serial_device serial7;
void UART7_IRQHandler(void)
@@ -179,10 +179,10 @@ void UART7_IRQHandler(void)
rt_interrupt_leave();
}
#endif /* RT_USING_UART7 */
#endif /* BSP_USING_UART7 */
static const struct gd32_uart uarts[] = {
#ifdef RT_USING_USART0
#ifdef BSP_USING_UART0
{
USART0, // uart peripheral index
USART0_IRQn, // uart iqrn
@@ -194,7 +194,7 @@ static const struct gd32_uart uarts[] = {
},
#endif
#ifdef RT_USING_USART1
#ifdef BSP_USING_UART1
{
USART1, // uart peripheral index
USART1_IRQn, // uart iqrn
@@ -206,7 +206,7 @@ static const struct gd32_uart uarts[] = {
},
#endif
#ifdef RT_USING_USART2
#ifdef BSP_USING_UART2
{
USART2, // uart peripheral index
USART2_IRQn, // uart iqrn
@@ -218,7 +218,7 @@ static const struct gd32_uart uarts[] = {
},
#endif
#ifdef RT_USING_UART3
#ifdef BSP_USING_UART3
{
UART3, // uart peripheral index
UART3_IRQn, // uart iqrn
@@ -230,7 +230,7 @@ static const struct gd32_uart uarts[] = {
},
#endif
#ifdef RT_USING_UART4
#ifdef BSP_USING_UART4
{
UART4, // uart peripheral index
UART4_IRQn, // uart iqrn
@@ -242,7 +242,7 @@ static const struct gd32_uart uarts[] = {
},
#endif
#ifdef RT_USING_USART5
#ifdef BSP_USING_UART5
{
USART5, // uart peripheral index
USART5_IRQn, // uart iqrn
@@ -254,7 +254,7 @@ static const struct gd32_uart uarts[] = {
},
#endif
#ifdef RT_USING_UART6
#ifdef BSP_USING_UART6
{
UART6, // uart peripheral index
UART6_IRQn, // uart iqrn
@@ -266,7 +266,7 @@ static const struct gd32_uart uarts[] = {
},
#endif
#ifdef RT_USING_UART7
#ifdef BSP_USING_UART7
{
UART7, // uart peripheral index
UART7_IRQn, // uart iqrn

3
bsp/gd32450z-eval/drivers/synopsys_emac.c
View File

@@ -1,7 +1,7 @@
/*
* File : rthw.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
* COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -23,7 +23,6 @@
extern EMAC_DMADESCTypeDef *DMATxDescToSet;
extern EMAC_DMADESCTypeDef *DMARxDescToGet;
/**
* Initializes the ETHERNET peripheral according to the specified
*/

4900
bsp/gd32450z-eval/project.ewp
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File diff suppressed because it is too large Load Diff

1849
bsp/gd32450z-eval/project.uvoptx Normal file
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File diff suppressed because it is too large Load Diff

542
bsp/gd32450z-eval/project.uvproj
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File diff suppressed because it is too large Load Diff

1177
bsp/gd32450z-eval/project.uvprojx
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File diff suppressed because it is too large Load Diff

336
bsp/gd32450z-eval/rtconfig.h
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@@ -1,239 +1,195 @@
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 4
/* RT-Thread Kernel */
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second */
#define RT_TICK_PER_SECOND 1000
/* SECTION: RT_DEBUG */
/* Thread Debug */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_DEBUG
#define RT_DEBUG_INIT 1
#define RT_USING_OVERFLOW_CHECK
/* Using Hook */
#define RT_DEBUG_INIT 0
#define RT_DEBUG_THREAD 0
#define RT_USING_HOOK
//#define RT_USING_TRACE
#define IDLE_THREAD_STACK_SIZE 256
#define IDLE_THREAD_STACK_SIZE 1024
/* Inter-Thread communication */
/* Using Software Timer */
/* #define RT_USING_TIMER_SOFT */
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
// <bool name="RT_USING_MODULE" description="Using Application Module" default="true" />
#define RT_USING_MODULE
/* SECTION: IPC */
/* Using Semaphore*/
#define RT_USING_SEMAPHORE
/* Using Mutex */
#define RT_USING_MUTEX
/* Using Event */
#define RT_USING_EVENT
/* Using MailBox */
#define RT_USING_MAILBOX
/* Using Message Queue */
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
#define RT_USING_MEMPOOL
/* Memory Management */
/* Using Dynamic Heap Management */
#define RT_USING_HEAP
#define RT_USING_MEMHEAP
/* Using Small MM */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
/* SECTION: Device System */
/* Using Device System */
#define RT_USING_DEVICE
#define RT_USING_DEVICE_IPC
/* C++ features */
/* SECTION: RTGUI support */
/* using RTGUI support */
// #define PKG_USING_GUIENGINE
/* name length of RTGUI object */
#define RTGUI_NAME_MAX 16
/* support 16 weight font */
#define RTGUI_USING_FONT16
/* support 16 weight font */
#define RTGUI_USING_FONT12
/* support Chinese font */
#define RTGUI_USING_FONTHZ
/* use DFS as file interface */
#define RTGUI_USING_DFS_FILERW
/* use font file as Chinese font */
/* #define RTGUI_USING_HZ_FILE */
/* use Chinese bitmap font */
#define RTGUI_USING_HZ_BMP
/* use small size in RTGUI */
/* #define RTGUI_USING_SMALL_SIZE */
/* use mouse cursor */
/* #define RTGUI_USING_MOUSE_CURSOR */
/* Command shell */
/* Using serial framework */
#define RT_USING_SERIAL
#define RT_USING_USART0
#define RT_USING_USART1
#define RT_USING_USART2
#define RT_USING_UART3
#define RT_USING_UART4
#define RT_USING_USART5
#define RT_USING_UART6
#define RT_USING_UART7
/* Using GPIO pin framework */
//#define RT_USING_PIN
/* Using Hardware Timer framework */
//#define RT_USING_HWTIMER
#define RT_USING_EXT_SDRAM
/* SECTION: Console options */
#define RT_USING_CONSOLE
/* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128
/* SECTION: finsh, a C-Express shell */
#define RT_USING_FINSH
/* Using symbol table */
#define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
//#define FINSH_USING_MSH
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
#define RT_USING_RTC
#ifdef RT_USING_RTC
#define RT_RTC_NAME "rtc"
#endif
/* Device virtual file system */
// <section name="LIBC" description="C Runtime library setting" default="always" >
// <bool name="RT_USING_LIBC" description="Using libc library" default="true" />
//#define RT_USING_LIBC
/* SECTION: device filesystem */
/* Using Device file system */
#define RT_USING_DFS /**/
// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />
#define RT_USING_DFS_DEVFS
//// <integer name="DFS_FILESYSTEM_TYPES_MAX" description="The maximal number of the supported file system type" default="4" />
//#define DFS_FILESYSTEM_TYPES_MAX 2
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
//#define DFS_USING_WORKDIR
/* Using ELM FATFS */
#define RT_USING_DFS
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 8
#define RT_USING_DFS_ELMFAT
////#define RT_DFS_ELM_WORD_ACCESS
///* Reentrancy (thread safe) of the FatFs module. */
//#define RT_DFS_ELM_REENTRANT
///* Number of volumes (logical drives) to be used. */
#define RT_DFS_ELM_DRIVES 2
//#define RT_DFS_ELM_USE_LFN 3 /* */
#define RT_DFS_ELM_MAX_LFN 255
///* Maximum sector size to be handled. */
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_0
#define RT_DFS_ELM_USE_LFN 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_USING_DFS_DEVFS
#define RT_USING_DFS_NET
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_USING_SERIAL
#define RT_USING_PIN
/* Using USB */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
#define RT_USING_POSIX
/* Network stack */
/* light weight TCP/IP stack */
#define RT_USING_LWIP
/* Enable ICMP protocol*/
#define RT_USING_LWIP141
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
/* Enable UDP protocol*/
#define RT_LWIP_UDP
/* Enable TCP protocol*/
#define RT_LWIP_TCP
/* Enable DNS */
#define RT_LWIP_DNS
/* Enable DHCP */
#define RT_LWIP_DHCP
/* Enable DEBUG */
#define RT_LWIP_DEBUG
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* the number of simulatenously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* Static IPv4 Address */
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 10
#define RT_LWIP_IPADDR3 241
#define RT_LWIP_IPADDR "192.168.1.30"
#define RT_LWIP_GWADDR "192.168.1.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 16
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 4
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8196
#define RT_LWIP_TCP_WND 8196
#define RT_LWIP_TCPTHREAD_PRIORITY 10
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_PRIORITY 12
#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
#define LWIP_NETIF_STATUS_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_NETIF_LOOPBACK 0
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 10
#define RT_LWIP_GWADDR3 1
/* Modbus master and slave stack */
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* tcp thread options */
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
/* VBUS(Virtual Software BUS) */
/* ethernet if thread options */
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
/* TCP sender buffer space */
#define RT_LWIP_TCP_SND_BUF 8192
/* TCP receive window. */
#define RT_LWIP_TCP_WND 8192
/* Utilities */
#define CHECKSUM_CHECK_TCP 0
#define CHECKSUM_CHECK_IP 0
#define CHECKSUM_CHECK_UDP 0
//#define CHECKSUM_GEN_TCP 0
//#define CHECKSUM_GEN_IP 0
//#define CHECKSUM_GEN_UDP 0
/* RT-Thread online packages */
/* RT_GDB_STUB */
//#define RT_USING_GDB
/* system packages */
/* spi driver */
#define RT_USING_SPI
#define RT_USING_SPI0
#define RT_USING_SPI1
#define RT_USING_SPI2
#define RT_USING_SPI3
#define RT_USING_SPI4
#define RT_USING_SPI5
//#define RT_USING_W25QXX
//#define FLASH_DEBUG
/* RT-Thread GUI Engine */
#define RT_USING_SFUD
//#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
/* IoT - internet of things */
//#define RT_USING_CPU_FFS
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* security packages */
/* language packages */
/* multimedia packages */
/* tools packages */
/* miscellaneous packages */
/* example package: hello */
/* Privated Packages of RealThread */
/* Network Utilities */
#define BSP_USING_SDRAM
#define BSP_USING_UART0
#endif

37
bsp/gd32450z-eval/rtconfig.py
View File

@@ -11,25 +11,50 @@ if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
print('================ERROR============================')
print('Not support gcc yet!')
print('=================================================')
PLATFORM = 'gcc'
EXEC_PATH = r'D:/toolchain/gnu_tools_arm_embedded/5.4_2016q3/bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = r'C:/Keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
EXEC_PATH = r'D:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
if PLATFORM == 'armcc':
if PLATFORM == 'gcc':
# tool-chains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -std=c99 -Dgcc' # -D' + PART_TYPE
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-gd32.map,-cref,-u,Reset_Handler -T gd32_rom.ld'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2 -g'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
AS = 'armasm'

185
bsp/gd32450z-eval/template.uvoptx Normal file
View File

@@ -0,0 +1,185 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rt-thread_gd32f4xx</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>4</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U59401765 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB.FLM -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_3MB -FS08000000 -FL0300000 -FP0($$Device:GD32F450ZK$Flash\GD32F4xx_3MB.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>

18
bsp/gd32450z-eval/template.uvproj
View File

@@ -10,6 +10,7 @@
<TargetName>rt-thread_gd32f4xx</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>GD32F450ZK</Device>
@@ -72,6 +73,8 @@
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
@@ -80,6 +83,8 @@
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
@@ -141,10 +146,9 @@
<RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>0</RestoreTracepoints>
<RestoreSysVw>1</RestoreSysVw>
<UsePdscDebugDescription>0</UsePdscDebugDescription>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>12</TargetSelection>
<TargetSelection>3</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
@@ -224,6 +228,7 @@
<useUlib>1</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
@@ -357,7 +362,15 @@
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
@@ -375,6 +388,7 @@
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>

2
bsp/gd32450z-eval/template.uvprojx
View File

@@ -10,6 +10,7 @@
<TargetName>rt-thread_gd32f4xx</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>GD32F450ZK</Device>
@@ -322,6 +323,7 @@
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>