[bsp]update x1000 bsp driver

bsp/x1000/Kconfig

@@ -0,0 +1,24 @@
+mainmenu "RT-Thread Configuration"
+
+config $BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config $RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "E:/rt-thread"
+    
+# you can change the RTT_ROOT default "../.." to your rtthread_root,
+# example : default "F:/git_repositories/rt-thread"
+
+config $PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/KConfig"
+source "$PKGS_DIR/KConfig"
+source "$BSP_DIR/drivers/Kconfig"
+

bsp/x1000/SConstruct

@@ -1,8 +1,12 @@
 import os
 import sys
 import rtconfig
-from rtconfig import RTT_ROOT
 
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.join(Dir('#').get_abspath(), 'rt-thread')
+    
 sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
 from building import *
 
@@ -11,16 +15,19 @@ TARGET = 'rtthread-x1000.' + rtconfig.TARGET_EXT
 env = Environment(tools = ['mingw'],
     AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
     CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-    CXX = rtconfig.CC, CXXFLAGS = rtconfig.CXXFLAGS,
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
     AR = rtconfig.AR, ARFLAGS = '-rc',
     LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
 env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
 
+# add --start-group and --end-group for GNU GCC
+env['LINKCOM'] = '$LINK -o $TARGET $LINKFLAGS $__RPATH $SOURCES $_LIBDIRFLAGS -Wl,--start-group $_LIBFLAGS -Wl,--end-group'
+
 Export('RTT_ROOT')
 Export('rtconfig')
 
 # prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
 
 # make a building
 DoBuilding(TARGET, objs)

bsp/x1000/applications/SConscript

@@ -1,13 +1,10 @@
 from building import *
 
 cwd = GetCurrentDir()
-src = Glob('*.c')
+src = Glob('*.c') + Glob('*.cpp')
 
 CPPPATH = [cwd, str(Dir('#'))]
 
-if not GetDepend("RT_USING_DFS_ROMFS"):
-    SrcRemove(src, "romfs.c")
-
 group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

bsp/x1000/applications/blink.c

@@ -0,0 +1,74 @@
+/*
+ * File      : blink.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2008 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-11-8      Tangyuxin    first version
+ */
+
+#include <rtthread.h>
+
+#include <board.h>
+#include <drv_gpio.h>
+
+void blink_task(void* param)
+{
+    rt_uint8_t cnt = 0;
+    
+    while(1)
+    {
+        rt_thread_delay(RT_TICK_PER_SECOND / 4);
+
+        if(cnt & 0x01)
+            gpio_set_value(BLINK_LED0_PORT,BLINK_LED0_PIN,0);
+        else
+            gpio_set_value(BLINK_LED0_PORT,BLINK_LED0_PIN,1);
+
+        if(cnt & 0x02)
+            gpio_set_value(BLINK_LED1_PORT,BLINK_LED1_PIN,0);
+        else
+            gpio_set_value(BLINK_LED1_PORT,BLINK_LED1_PIN,1);
+
+        if(cnt & 0x04)
+            gpio_set_value(BLINK_LED2_PORT,BLINK_LED2_PIN,0);
+        else
+            gpio_set_value(BLINK_LED2_PORT,BLINK_LED2_PIN,1);
+
+        if(cnt & 0x08)
+            gpio_set_value(BLINK_LED3_PORT,BLINK_LED3_PIN,0);
+        else
+            gpio_set_value(BLINK_LED3_PORT,BLINK_LED3_PIN,1);
+
+        cnt ++;
+    }
+}
+
+int blink_init(void)
+{
+    rt_thread_t tid;
+
+    tid = rt_thread_create("blink",
+                           blink_task, RT_NULL,
+                           512,
+                           RT_THREAD_PRIORITY_MAX - 2,
+                           10);
+    if (tid != RT_NULL)
+        rt_thread_startup(tid);
+}
+INIT_APP_EXPORT(blink_init);

bsp/x1000/applications/main.c

@@ -1,7 +1,7 @@
 /*
- * File      : _main.c
+ * File      : main.c
  * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ * COPYRIGHT (C) 2008 - 2017, RT-Thread Development Team
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -19,14 +19,12 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2015-11-19     Urey         the first version
+ * 2017-11-8      Tangyuxin    first version
  */
-#include <stdio.h>
-#include <stdlib.h>
+
+#include <rtthread.h>
 
 int main(int argc, char** argv)
-{
-    printf("Hello RT-Thread!\n");
-
+{   
     return 0;
 }

bsp/x1000/applications/mnt_init.c

@@ -0,0 +1,72 @@
+/*
+ * File      : mnt_init.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2008 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-11-8      Tangyuxin    first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#ifdef RT_USING_DFS
+#include <dfs_fs.h>
+
+int mnt_init(void)
+{
+    rt_kprintf("init filesystem...\n");
+#ifdef RT_USING_MTD_NOR
+    //mount rootfs
+    if (dfs_mount("rootfs", "/", "elm", 0, 0) == 0)
+    {
+        rt_kprintf("File System on root initialized!\n");
+    }
+    else
+    {
+        rt_kprintf("File System on root initialization failed!\n");
+    }
+
+    //mount appfs
+    if (dfs_mount("appfs", "/appfs", "elm", 0, 0) == 0)
+    {
+        rt_kprintf("File System on appfs initialized!\n");
+    }
+    else
+    {
+        rt_kprintf("File System on appfs initialization failed!\n");
+    }
+#endif
+
+#if (defined(RT_USING_SDIO) && defined(RT_USING_MSC0))
+    rt_thread_delay(RT_TICK_PER_SECOND/5);
+    if (dfs_mount("sd0", "/sd", "elm", 0, 0) == 0)
+    {
+        rt_kprintf("File System on TF initialized!\n");
+    }
+    else
+    {
+        rt_kprintf("File System on TF fail!\n");
+    }
+#endif
+
+    return 0;
+}
+INIT_ENV_EXPORT(mnt_init);
+
+#endif

bsp/x1000/applications/rtgui_demo.c

@@ -0,0 +1,154 @@
+/*
+ * File      : rtgui_demo.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2008 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-11-8      Tangyuxin    first version
+ */
+
+#include <rtthread.h>
+
+// #define DEBUG
+
+#ifdef DEBUG
+#define DEBUG_PRINTF(...)   rt_kprintf(__VA_ARGS__)
+#else
+#define DEBUG_PRINTF(...)   
+#endif
+
+#ifdef RT_USING_GUIENGINE
+
+#include <rtgui/rtgui.h>
+#include <rtgui/rtgui_system.h>
+#include <rtgui/rtgui_app.h>
+
+#include <rtgui/widgets/window.h>
+#include <rtgui/dc.h>
+
+struct rtgui_win *main_win;
+rt_bool_t dc_event_handler(struct rtgui_object *object, rtgui_event_t *event);
+
+static void rt_gui_demo_entry(void *parameter)
+{    
+    struct rtgui_app *app;
+    
+    DEBUG_PRINTF("gui demo entry\n");
+	
+	/* create gui app */
+    app = rtgui_app_create("gui_demo");
+    if (app == RT_NULL)
+    {
+        DEBUG_PRINTF("rtgui_app_create faild\n");
+        return;	
+    }
+    
+	/* create main window */
+	main_win = rtgui_mainwin_create(RT_NULL, 
+									"UiWindow", RTGUI_WIN_STYLE_NO_TITLE | RTGUI_WIN_STYLE_NO_BORDER);
+    if (main_win == RT_NULL)
+    {
+        DEBUG_PRINTF("main_win is null\n");
+        rtgui_app_destroy(app);
+        return;
+    }
+    
+	rtgui_object_set_event_handler(RTGUI_OBJECT(main_win), dc_event_handler);
+	
+    DEBUG_PRINTF("rtgui_win_show\n");
+	rtgui_win_show(main_win, RT_FALSE);
+    
+    DEBUG_PRINTF("rtgui_app_run\n");
+	rtgui_app_run(app);
+    
+    DEBUG_PRINTF("rtgui_win_destroy\n");
+	rtgui_win_destroy(main_win);
+    
+    DEBUG_PRINTF("rtgui_app_destroy\n");
+	rtgui_app_destroy(app);	
+}
+
+rt_bool_t dc_event_handler(struct rtgui_object *object, rtgui_event_t *event)
+{
+    struct rtgui_widget *widget = RTGUI_WIDGET(object);
+
+    if (event->type == RTGUI_EVENT_PAINT)
+    {
+        struct rtgui_dc *dc;
+        rtgui_rect_t rect;
+		
+		rt_kprintf("\r\n RTGUI_EVENT_PAINT \r\n");
+		rtgui_win_event_handler(RTGUI_OBJECT(widget), event);
+        
+        rtgui_widget_get_rect(widget, &rect);
+        DEBUG_PRINTF("widget react x1: %d, y1: %d, x2: %d, y2: %d\r\n",
+                                rect.x1, rect.y1, rect.x2, rect.y2);
+
+		dc = rtgui_dc_begin_drawing(widget);
+		if(dc == RT_NULL)
+		{
+			DEBUG_PRINTF("\r\n dc is null \r\n");
+			return RT_FALSE;
+		}
+
+		rtgui_dc_draw_line(dc, rect.x1, rect.y1, rect.x2, rect.y2);
+		rtgui_dc_draw_line(dc, rect.x1, rect.y2, rect.x2, rect.y1);
+        
+        rect.x1 += (rect.x2 - rect.x1) / 2;
+        rect.y1 += (rect.y2 - rect.y1) / 2;
+        rtgui_dc_draw_text_stroke(dc, __DATE__"--"__TIME__, &rect, HIGH_LIGHT, BLUE);
+               
+		rtgui_dc_end_drawing(dc,RT_TRUE);
+    }
+	return RT_FALSE;
+}
+
+int rt_gui_demo_init(void)
+{
+    rt_thread_t tid;
+    rt_device_t device;
+    rt_err_t  err;
+    
+    device = rt_device_find("lcd");
+    if(device == RT_NULL)
+    {
+        rt_kprintf("Not found LCD driver\n");
+        return RT_ERROR;
+    }
+    
+    err = rt_device_open(device, RT_DEVICE_OFLAG_RDWR);
+    if (err != RT_EOK)
+    {
+        rt_kprintf("Open LCD driver fail\n");
+        return RT_ERROR;
+    }
+    
+    /* set graphic device */
+    rtgui_graphic_set_device(device);
+    
+    tid = rt_thread_create("mygui",
+        rt_gui_demo_entry, RT_NULL,
+        2048, 25, 10);
+
+    if (tid != RT_NULL)
+        rt_thread_startup(tid);
+    
+    return 0;
+}
+INIT_APP_EXPORT(rt_gui_demo_init);
+#endif /* RT_USING_GUIENGINE */

bsp/x1000/driver/board.h

@@ -1,63 +0,0 @@
-/*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Change Logs:
- * Date           Author       Notes
- * 2015-11-19     Urey         the first version
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include <stdint.h>
-
-#include "x1000.h"
-
-#define RT_USING_JZ_X1000
-
-// #define BOARD_PHOENIX
-// #define BOARD_CANNA
-
-#ifdef BOARD_PHOENIX
-#define RT_USING_EMAC
-#endif
-
-/*********************************************************************************************************
-**   Clock for Board
-*********************************************************************************************************/
-#define BOARD_EXTAL_CLK     24000000
-#define BOARD_RTC_CLK       32768
-#define BOARD_CPU_CLK       (1008 * 1000 * 1000UL)
-
-
-/*********************************************************************************************************
-**   HEAP Setting
-*********************************************************************************************************/
-extern unsigned char __bss_start;
-extern unsigned char __bss_end;
-
-#define RT_HW_HEAP_BEGIN    (void*)&__bss_end
-#define RT_HW_HEAP_END      (void*)(0x80000000 + 32 * 1024 * 1024)
-
-/*********************************************************************************************************
-**   UART Setting
-*********************************************************************************************************/
-#define RT_USING_UART2
-
-#endif

bsp/x1000/drivers/Kconfig

@@ -0,0 +1,131 @@
+choice
+    prompt "Choice bsp board"
+    default BOARD_HALLEY2_REALBOARD_V2
+    
+    config BOARD_HALLEY2
+        bool "Using haller2 board"
+        
+    config BOARD_PHOENIX
+        bool "Using phoenix board"
+
+    config BOARD_CANNA
+        bool "Using canna board"
+    
+    config BOARD_HALLEY2_FIR
+        bool "Using haller2 fir board"
+    
+    config BOARD_HALLEY2_REALBOARD
+        bool "Using haller2 realboard board"
+        
+    config BOARD_HALLEY2_REALBOARD_V2
+        bool "Using haller2 realboard v2 board"
+    
+    config BOARD_HALLEY2_IDELAN
+        bool "Using haller2 idelan board"
+endchoice
+
+if RT_USING_SERIAL
+    config RT_USING_UART0
+        bool "Using UART0"
+        default n
+
+    config RT_USING_UART1
+        bool "Using UART1"
+        default n    
+        
+    config RT_USING_UART2
+        bool "Using UART2"
+        default y
+endif
+
+if RT_USING_SDIO
+    config RT_USING_MSC0
+        bool "Using MSC0 for sd card"
+        default y
+        
+    config RT_USING_MSC1
+        bool "Using MSC1 for wifi"
+        default y
+
+    config RT_MMCSD_STACK_SIZE
+    int "Set mmc thread stack size"
+    default 2048
+endif
+
+if RT_USING_GUIENGINE
+    config RT_USING_SLCD
+        bool "Using lcd display"
+        default y
+        
+    if RT_USING_SLCD
+        choice
+            prompt "Choice LCD controller"
+            default RT_USING_ILI9488
+            
+            config RT_USING_ILI9488
+                bool "Using  ILI9488 controller"
+                
+            config RT_USING_ILI9341
+                bool "Using  ILI9341 controller"
+
+            config RT_USING_OTM4802
+                bool "Using  OTM4802 controller"
+            
+            config RT_USING_TRULY_TFT240240
+                bool "Using  TFT240240 controller"
+        endchoice
+    endif
+
+    if RT_USING_I2C
+        config RT_USING_TOUCH
+            bool "Using touch"
+            default y
+            
+        if RT_USING_TOUCH
+            choice
+                prompt "Choice touch controller"
+                default RT_USING_GT9XX
+                
+                config RT_USING_GT9XX
+                    bool "Using  GT9XX controller"
+                    
+                config RT_USING_FT6x06
+                    bool "Using  FT6x06 controller"
+            endchoice
+            
+            config RT_TOUCH_THREAD_PRIORITY
+                int "Set touch thread priority"
+                range 2 32
+                default 10
+        endif
+    endif
+endif
+
+if RT_USING_I2C
+    config RT_USING_I2C0
+        bool "Using iic0 bus"
+        default y
+        
+    config RT_USING_I2C1
+        bool "Using iic1 bus"
+        default n
+
+    config RT_USING_I2C2
+        bool "Using iic2 bus"
+        default n
+endif
+
+config RT_USING_AUDIO
+    bool "Using audio"
+    default n
+if RT_USING_AUDIO
+    config RT_USING_ICODEC
+    bool "Using icodec"
+    default n
+endif
+
+config RT_USING_CPU_FFS
+    bool "Using CPU FFS"
+    default y
+
+

bsp/x1000/drivers/SConscript

@@ -0,0 +1,28 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c') + Glob('*.S')
+CPPPATH = [cwd, str(Dir('#'))]
+
+if not GetDepend('RT_USING_I2C'):
+    SrcRemove(src, ['drv_i2c.c'])
+if not GetDepend('RT_USING_SPI'):
+    SrcRemove(src, ['drv_spi.c'])
+if not GetDepend('RT_USING_WDT'):
+    SrcRemove(src, ['drv_reset.c'])
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+# build for sub-directory
+list = os.listdir(cwd)
+objs = []
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+group = group + objs
+
+Return('group')

bsp/x1000/drivers/audio/SConscript

@@ -0,0 +1,11 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c') + Glob('*.S')
+CPPPATH = [cwd]
+
+group = DefineGroup('drv_audio', src, depend = ['RT_USING_AUDIO'], CPPPATH = CPPPATH)
+
+Return('group')

bsp/x1000/drivers/audio/drv_aic_i2s.h

@@ -0,0 +1,94 @@
+/*
+ * drv_aic_i2s.h
+ *
+ *  Created on: 2016年4月1日
+ *      Author: Urey
+ */
+
+#ifndef DRIVER_DRV_AIC_I2S_H_
+#define DRIVER_DRV_AIC_I2S_H_
+
+#include "board.h"
+
+
+#ifdef RT_USING_ICODEC
+#	define CODEC_AS_MASTER
+
+#define CODEC_DEF_RATE    (24000000)
+#else
+//#	undef CODEC_AS_MASTER
+//#	define CODEC_AS_MASTER
+
+#define CODEC_DEF_RATE    (44100)
+#endif
+
+#ifdef RT_USING_ECODEC_WM8978
+#	define CFG_AIC_I2S_EXT_CODEC
+#endif
+
+#define CFG_AIC_SOC_CLKOUT
+//#define CFG_AIC_SOC_CLKIN
+
+#define CFG_I2S_DMA_PAGE_SIZE	(32 * 1024)
+#define CFG_I2S_DMA_PAGE_NUM	8
+
+enum
+{
+    I2S_TRIGGER_STOP  = 0,
+    I2S_TRIGGER_START ,
+	I2S_TRIGGER_PAUSE_PUSH ,
+	I2S_TRIGGER_PAUSE_RELEASE ,
+    I2S_TRIGGER_SUSPEND ,
+    I2S_TRIGGER_RESUME,
+};
+
+
+
+/*********************************************************************************************************
+**   数据结构
+*********************************************************************************************************/
+struct jz_i2s
+{
+    struct jz_aic   *aic;
+    int i2s_init;
+#define I2S_WRITE 0x1
+#define I2S_READ  0x2
+#define I2S_INCODEC (0x1 <<4)
+#define I2S_EXCODEC (0x2 <<4)
+#define I2S_SLAVE (0x1 << 8)
+#define I2S_MASTER (0x2 << 8)
+    int i2s_mode;
+    uint32_t    tx_dr_base;
+
+	int channels;
+	int fmt_width;
+	int rates;
+
+    /* used for DMA transform */
+    struct rt_dma_channel *tx_dmac;
+    struct rt_dma_channel *rx_dmac;
+};
+
+/*********************************************************************************************************
+**   函数申明
+*********************************************************************************************************/
+int aic_set_rate(struct jz_aic *aic, uint32_t freq);
+
+struct jz_i2s *rt_hw_aic_i2s_init(void);
+
+//void aic_i2s_start_substream(struct jz_i2s *i2s,int stream);
+//void aic_i2s_stop_substream(struct jz_i2s *i2s,int stream);
+int aic_i2s_set_sysclk(struct jz_i2s *i2s,uint32_t freq);
+int aic_i2s_set_clkdiv(struct jz_i2s *i2s,int div_id, int div);
+int aic_i2s_startup(struct jz_i2s *i2s,int stream);
+int aic_i2s_trigger(struct jz_i2s* i2s,int cmd,int stream);
+
+int aic_i2s_hw_params(struct jz_i2s* i2s,int stream);
+void aic_i2s_shutdown(struct jz_i2s *i2s,int stream);
+
+rt_size_t aic_i2s_send(struct jz_i2s *i2s, const void* buffer, rt_size_t size,void (*tx_callback)(void *,void *), void *tx_arg);
+rt_size_t aic_i2s_recv(struct jz_i2s *i2s,        void* buffer, rt_size_t size,void (*rx_callback)(void *,void *), void *rx_arg);
+
+
+void aic_i2s_set_rate(struct jz_i2s *i2s,int rate);
+#endif /* DRIVER_DRV_AIC_I2S_H_ */

bsp/x1000/drivers/board.c

@@ -24,6 +24,7 @@
 
 #include <rthw.h>
 #include <rtthread.h>
+#include <string.h>
 
 #include "board.h"
 #include "drv_clock.h"
@@ -32,12 +33,38 @@
 
 extern void rt_hw_cache_init(void);
 
+extern unsigned char _iramcopy;
+extern unsigned char _iramstart;
+extern unsigned char _iramend;
+
+#ifdef RT_USING_CPLUSPLUS
+int cplusplus_system_init(void)
+{
+    typedef void (*pfunc) ();
+    extern pfunc __ctors_start__[];
+    extern pfunc __ctors_end__[];
+    pfunc *p;
+    for (p = __ctors_end__ - 2; p > __ctors_start__; )
+    {
+        (*p)();
+        p--;
+    }
+    return 0;
+}
+#endif
+
 void rt_hw_board_init(void)
 {
+    memcpy((void*)&_iramstart, (void*)&_iramcopy, (rt_uint32_t)&_iramend - (rt_uint32_t)&_iramstart);
+    memset((void*)&__bss_start, 0x0, (rt_uint32_t)&__bss_end - (rt_uint32_t)&__bss_start);
+
     rt_hw_cache_init();
+    rt_hw_exception_init();
+
     /* init hardware interrupt */
     rt_hw_interrupt_init();
     rt_hw_uart_init();
+
 #ifdef RT_USING_CONSOLE
     /* set console device */
     rt_console_set_device(RT_CONSOLE_DEVICE_NAME);

bsp/x1000/drivers/board.h

@@ -0,0 +1,102 @@
+/*
+ * File      : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-11-19     Urey         the first version
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#include <rtthread.h>
+#include <stdint.h>
+#include "x1000.h"
+
+#define RT_USING_JZ_X1000
+#define X1000
+
+#ifdef BOARD_HALLEY2_FIR
+#include "board/halley2_fir/board_halley2_fir.h"
+#endif
+
+#ifdef BOARD_HALLEY2_REALBOARD
+#include "board/halley2_realboard/board_halley2_readboard.h"
+#endif
+
+#ifdef BOARD_HALLEY2_REALBOARD_V2
+#include "board/halley2_realboard_v2/board_halley2_readboard_v2.h"
+#endif
+
+#ifdef BOARD_HALLEY2_IDELAN
+#include "board/halley2_idelan/board_halley2_idelan.h"
+#endif
+
+#ifdef BOARD_HALLEY2
+#include "board/halley2/board_halley2.h"
+#endif
+
+#ifdef BOARD_PHOENIX
+#include "board/phoenix/board_phoenix.h"
+#endif
+
+#ifdef BOARD_CANNA
+#include "board/canna/board_canna.h"
+#endif
+
+/*
+ * Clock setting
+ */
+#define BOARD_EXTAL_CLK     24000000
+#define BOARD_RTC_CLK       32768
+#define BOARD_CPU_CLK       (1008 * 1000 * 1000UL)
+
+#define BOARD_APLL_FREQ     1008000000  /*If APLL not use mast be set 0*/
+#define BOARD_MPLL_FREQ     600000000   /*If MPLL not use mast be set 0*/
+
+/*
+ * Heap setting
+ */
+extern unsigned char __bss_start;
+extern unsigned char __bss_end;
+
+#define RT_HW_HEAP_BEGIN    (void*)&__bss_end
+#define RT_HW_HEAP_END      (void*)(0x80000000 + 32 * 1024 * 1024)
+
+/* HW EVENT */
+#define EVENT_NONE                  0x0000
+
+#define EVENT_TYPE_MSK              0xFF00
+#define EVENT_VALUE_MSK             0x00FF
+
+#define EVENT_LINEIN                0x0100
+#define EVENT_LINEIN_INSERT         0x0101
+#define EVENT_LINEIN_REMOVE         0x0102
+#define EVENT_LINEIN_SHUTDOWN       0x0103
+
+#define EVENT_BAT                   0x0200
+#define EVENT_BAT_ALONE             0x0201
+#define EVENT_BAT_CHARGE_IN         0x0202
+#define EVENT_BAT_CHARGE_FULL       0x0203
+#define EVENT_BAT_ERROR             0x0204
+
+#define EVENT_KEY_DOWN              0x0300
+#define EVENT_KEY_UP                0x0400
+
+#endif /* _BOARD_H_ */

bsp/x1000/drivers/board/canna/board_canna.h

@@ -0,0 +1,6 @@
+#ifndef BOARD_CANNA_H__
+#define BOARD_CANNA_H__
+
+
+#endif
+

bsp/x1000/drivers/board/halley2/board_halley2.h

@@ -0,0 +1,14 @@
+#ifndef BOARD_HALLEY2_H__
+#define BOARD_HALLEY2_H__
+
+#define LCD_RST_PORT            GPIO_PORT_D
+#define LCD_RST_PIN             GPIO_Pin_0
+
+#define LCD_BLPWM_PORT          GPIO_PORT_C
+#define LCD_BLPWM_PIN           GPIO_Pin_25
+
+#define LCD_BLEN_PORT           GPIO_PORT_A
+#define LCD_BLEN_PIN            GPIO_Pin_25
+
+#endif
+

bsp/x1000/drivers/board/halley2_fir/board_halley2_fir.h

@@ -0,0 +1,80 @@
+#ifndef BOARD_HALLEY2_IDELAN_H__
+#define BOARD_HALLEY2_IDELAN_H__
+
+#define AUDIO_SHUTDOWN_PORT     GPIO_PORT_B
+#define AUDIO_SHUTDOWN_PIN      GPIO_Pin_7
+#define AUDIO_SHUTDOWN_MUTE     1
+
+/*
+ * IO LCD
+ */
+#define LCD_PWEN_PORT           GPIO_PORT_B
+#define LCD_PWEN_PIN            GPIO_Pin_19 //原理图不对，实际连接到LCD_TE
+
+#define LCD_RST_PORT            GPIO_PORT_B
+#define LCD_RST_PIN             GPIO_Pin_14
+
+#define LCD_BL_PORT             GPIO_PORT_B
+#define LCD_BL_PIN              GPIO_Pin_9
+
+/*
+ * IO Touch
+ */
+#define TP_INT_PORT             GPIO_PORT_B
+#define TP_INT_PIN              GPIO_Pin_11
+
+#define TP_RST_PORT             GPIO_PORT_B
+#define TP_RST_PIN              GPIO_Pin_12
+
+#define TP_PWEN_PORT            GPIO_PORT_B
+#define TP_PWEN_PIN             GPIO_Pin_15
+
+
+/*
+ * IO KeyBoard:
+ */
+#define KEY_WIFI_PORT           GPIO_PORT_A
+#define KEY_WIFI_PIN            GPIO_Pin_20
+
+#define KEY_BT_PORT             GPIO_PORT_A
+#define KEY_BT_PIN              GPIO_Pin_21
+
+#define KEY_VOLD_PORT           GPIO_PORT_A
+#define KEY_VOLD_PIN            GPIO_Pin_22
+
+#define KEY_VOLU_PORT           GPIO_PORT_B
+#define KEY_VOLU_PIN            GPIO_Pin_28
+
+#define KEY_WKUP_PORT           GPIO_PORT_B
+#define KEY_WKUP_PIN            GPIO_Pin_31
+
+/*
+ * IO Camera
+ */
+#define CIM_PWDN_PORT           GPIO_PORT_A
+#define CIM_PWDN_PIN            GPIO_Pin_25
+#define CIM_RST_PORT            GPIO_PORT_A
+#define CIM_RST_PIN             GPIO_Pin_24
+#define CIM_PWEN_PORT           GPIO_PORT_A
+#define CIM_PWEN_PIN            GPIO_Pin_23
+/*
+ * IO LED Config
+ */
+#define LED_BT_PORT             GPIO_PORT_B
+#define LED_BT_PIN              GPIO_Pin_6
+
+#define LED_WIFI_PORT           GPIO_PORT_B
+#define LED_WIFI_PIN            GPIO_Pin_24
+
+#define LED_ZB_PORT             GPIO_PORT_C
+#define LED_ZB_PIN              GPIO_Pin_27
+
+/*
+ * Others
+ */
+
+#define IO_IRQ_FG_PORT          GPIO_PORT_B
+#define IO_IRQ_FG_PIN           GPIO_Pin_13
+
+
+#endif

bsp/x1000/drivers/board/halley2_idelan/README_20160819.txt

@@ -0,0 +1,6 @@
+2016/08/29发布
+已知的硬件错误：
+-I2S 信号分配错误 I2SDI I2SDO反了  核心板的DO是输出  Codec的DO也是输出，核心板的DO需要接到Codec的SDI0上
+-X1 12.288晶振不焊接，R13 需要焊接，核心板提供时钟（layout的时候，晶振保留）
+-
+-layout问题，整个板子GND走线 很多实连接，手工焊接质量不保证

bsp/x1000/drivers/board/halley2_idelan/board_halley2_idelan.h

@@ -0,0 +1,5 @@
+#ifndef BOARD_HALLEY2_IDELAN_H__
+#define BOARD_HALLEY2_IDELAN_H__
+
+
+#endif

bsp/x1000/drivers/board/halley2_realboard/board_halley2_readboard.h

@@ -0,0 +1,14 @@
+#ifndef BOARD_HALLEY2_IDELAN_H__
+#define BOARD_HALLEY2_IDELAN_H__
+
+#define AUDIO_SHUTDOWN_PORT     GPIO_PORT_B
+#define AUDIO_SHUTDOWN_PIN      GPIO_Pin_6
+#define AUDIO_SHUTDOWN_MUTE     1
+
+#define LCD_RST_PORT            GPIO_PORT_C
+#define LCD_RST_PIN             GPIO_Pin_25
+
+#define LCD_BL_PORT             GPIO_PORT_B
+#define LCD_BL_PIN              GPIO_Pin_19
+
+#endif

bsp/x1000/drivers/board/halley2_realboard_v2/board_halley2_readboard_v2.h

@@ -0,0 +1,61 @@
+/*
+ * File      : board_halley2_readboard_v2.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-01-01     Urey      first version
+ */
+#ifndef DRIVER_BOARD_HALLEY2_REALBOARD_V2_BOARD_HALLEY2_READBOARD_V2_H_
+#define DRIVER_BOARD_HALLEY2_REALBOARD_V2_BOARD_HALLEY2_READBOARD_V2_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AUDIO_SHUTDOWN_PORT     GPIO_PORT_C
+#define AUDIO_SHUTDOWN_PIN      GPIO_Pin_26
+#define AUDIO_SHUTDOWN_MUTE     0
+
+#define LCD_RST_PORT            GPIO_PORT_C
+#define LCD_RST_PIN             GPIO_Pin_23
+
+#define LCD_BL_PORT             GPIO_PORT_D
+#define LCD_BL_PIN              GPIO_Pin_1
+
+#define LCD_TP_INT_PORT         GPIO_PORT_C
+#define LCD_TP_INT_PIN          GPIO_Pin_25
+
+/* BLINK LED */
+#define BLINK_LED0_PORT         GPIO_PORT_B
+#define BLINK_LED0_PIN          GPIO_Pin_9
+
+#define BLINK_LED1_PORT         GPIO_PORT_B
+#define BLINK_LED1_PIN          GPIO_Pin_8
+
+#define BLINK_LED2_PORT         GPIO_PORT_B
+#define BLINK_LED2_PIN          GPIO_Pin_13
+
+#define BLINK_LED3_PORT         GPIO_PORT_B
+#define BLINK_LED3_PIN          GPIO_Pin_11
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* DRIVER_BOARD_HALLEY2_REALBOARD_V2_BOARD_HALLEY2_READBOARD_V2_H_ */

bsp/x1000/drivers/board/phoenix/board_phoenix.h

@@ -0,0 +1,4 @@
+#ifndef BOARD_HALLEY2_H__
+#define BOARD_HALLEY2_H__
+
+#endif

bsp/x1000/drivers/board/phoenix/jz-x1000.gdbinit

@@ -0,0 +1,11 @@
+#connect to the JDI gdb server
+target remote 169.28.23.51:2823
+
+#set remote write size
+set remotewritesize fixed
+set remotewritesize 8192
+
+#load the debug image
+load
+
+#debug begin

bsp/x1000/drivers/board_key.h

@@ -0,0 +1,48 @@
+#ifndef BOARD_KEY_H__
+#define BOARD_KEY_H__
+
+#ifndef RT_USING_AUDIO_PLAYER
+enum KEY_VALUE
+{
+    KEY_VOLINC,
+    KEY_VOLDEC,
+    KEY_NEXT,
+    KEY_PREV,
+
+    KEY_PAUSE,
+    KEY_PLAY,
+    KEY_PLAY_PAUSE,
+
+    KEY_MUTE,
+
+    KEY_MIC,
+    KEY_EQ,
+    KEY_MENU,
+    KEY_CHANNEL,
+    KEY_FAVORITE,
+
+    //system shutdown, wifi config...
+    KEY_PWROFF,
+    KEY_CONFIG,
+    KEY_NETWORK_MODE,
+
+    KEY_SOURCE,
+    KEY_UNKNOWN,
+};
+#endif
+
+struct keyboard_io_def
+{
+    enum gpio_port  port;
+    enum gpio_pin   pin;
+
+    int  longKey;
+    int  shortKey;
+};
+
+typedef void (*keyboard_event_handler_t)(uint32_t event);
+
+void rt_hw_keyboard_init(void);
+void rt_hw_keyboard_set_handler(keyboard_event_handler_t handler);
+
+#endif

bsp/x1000/drivers/board_led.c

@@ -0,0 +1,104 @@
+/*
+ * File      : drv_gpio_led.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2016/05/13     Urey         the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#include "board.h"
+#include "drv_gpio.h"
+
+#if 0
+#include "board_led.h"
+
+#if defined(BOARD_CANNA)
+
+#define MAX_LED_NBR     3
+
+struct led_io_def led_io_tbl[MAX_LED_NBR] =
+{
+    //LED_POWER
+    {
+        GPIO_PORT_C,
+        GPIO_Pin_24
+    },
+
+    //LED_WIFI
+    {
+        GPIO_PORT_D,
+        GPIO_Pin_5
+    },
+
+    //LED_CHARGING
+    {
+        GPIO_PORT_A,
+        GPIO_Pin_0
+    },
+
+};
+
+#else
+#define MAX_LED_NBR     0
+struct led_io_def led_io_tbl[] =
+{
+    //LED_POWER
+    {
+        GPIO_PORT_B,
+        GPIO_Pin_6
+    },
+};
+#endif
+
+void rt_hw_led_on(int led)
+{
+    if((led >= LED_LAST) || (led > MAX_LED_NBR))
+        return;
+
+    gpio_set_value(led_io_tbl[led].port,led_io_tbl[led].pin,0);
+}
+
+void rt_hw_led_off(int led)
+{
+    if((led >= LED_LAST) || (led > MAX_LED_NBR))
+        return;
+
+    gpio_set_value(led_io_tbl[led].port,led_io_tbl[led].pin,1);
+}
+
+int rt_hw_led_init(void)
+{
+    rt_uint8_t  i;
+
+    /* Init all IO for keyboard */
+    for (i = 0; i < MAX_LED_NBR; ++i)
+    {
+        gpio_set_func(led_io_tbl[i].port,led_io_tbl[i].pin,GPIO_OUTPUT1);
+    }
+
+    return 0;
+}
+INIT_DEVICE_EXPORT(rt_hw_led_init);
+
+
+#endif

bsp/x1000/drivers/board_led.h

@@ -0,0 +1,13 @@
+#ifndef BOARD_LED_H__
+#define BOARD_LED_H__
+
+struct led_io_def
+{
+    enum gpio_port  port;
+    enum gpio_pin   pin;
+};
+
+void rt_hw_led_off(int led);
+void rt_hw_led_on (int led);
+
+#endif

bsp/x1000/drivers/dma.h

@@ -0,0 +1,155 @@
+/*
+ * File      : dma.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2015-11-19     Urey         the first version
+ */
+
+#ifndef _DMA_H_
+#define _DMA_H_
+/*********************************************************************************************************
+**   头文件
+*********************************************************************************************************/
+#include <stdlib.h>
+#include <rtdef.h>
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+#define RT_DMA_CHANNEL(n)       (n)
+#ifndef RT_DMA_MAX_NODES
+#	define RT_DMA_MAX_NODES        8
+#endif
+
+/*********************************************************************************************************
+**   DMA 状态定义
+*********************************************************************************************************/
+#define RT_DMA_STATUS_IDLE     0                                        /*  DMA 处于空闲模式            */
+#define RT_DMA_STATUS_BUSY     1                                        /*  DMA 处于正在工作            */
+#define RT_DMA_STATUS_ERROR    2                                        /*  DMA 处于错误状态            */
+
+/*********************************************************************************************************
+**   DMA 地址方向定义
+*********************************************************************************************************/
+#define RT_DMA_ADDR_INC        0                                        /*  地址增长方式                */
+#define RT_DMA_ADDR_FIX        1                                        /*  地址不变                    */
+#define RT_DMA_ADDR_DEC        2                                        /*  地址减少方式                */
+
+/*********************************************************************************************************
+**   DMA 传输方向定义
+*********************************************************************************************************/
+#define RT_DMA_MEM_TO_MEM       0
+#define RT_DMA_MEM_TO_DEV       1
+#define RT_DMA_DEV_TO_MEM       2
+#define RT_DMA_DEV_TO_DEV       3
+#define RT_DMA_TRANS_NONE       4
+
+/*********************************************************************************************************
+**   DMA 总线宽度
+*********************************************************************************************************/
+#define RT_DMA_BUSWIDTH_UNDEFINED   0
+#define RT_DMA_BUSWIDTH_1_BYTE      1
+#define RT_DMA_BUSWIDTH_2_BYTES     2
+#define RT_DMA_BUSWIDTH_4_BYTES     4
+#define RT_DMA_BUSWIDTH_8_BYTES     8
+
+/*********************************************************************************************************
+**   DMA 传输 时间
+*********************************************************************************************************/
+#define RT_DMA_EVENT_COMPLETE   0x01
+#define RT_DMA_EVENT_ERROR      0x02
+
+
+/*********************************************************************************************************
+**   数据结构
+*********************************************************************************************************/
+struct rt_dma_channel;
+struct dma_message;
+struct dma_config;
+struct dma_ops
+{
+    void        (*reset)(struct rt_dma_channel *dmac);
+    rt_size_t   (*trans)(struct rt_dma_channel *dmac,struct dma_message *message);
+    int         (*status)(struct rt_dma_channel *dmac);
+    int         (*configure)(struct rt_dma_channel *dmac,struct dma_config *config);
+};
+
+struct dma_message
+{
+    rt_uint8_t  *src_addr;                          /*  源端缓冲区地址              */
+    rt_uint8_t  *dst_addr;                          /*  目的端缓冲区地址            */
+    rt_uint8_t  src_option;                         /*  源端地址方向控制            */
+    rt_uint8_t  dst_option;                         /*  目的地址方向控制            */
+    rt_size_t   t_size;                             /*  传输的字节数                */
+
+    rt_uint32_t t_mode;                             /*  传输模式, 自定义            */
+
+    void 	(*complete_cb)(void *data,void *pbuf);
+    void	*complete_arg;
+};
+
+
+struct dma_config
+{
+    rt_uint32_t direction;
+    rt_uint32_t src_addr_width;
+    rt_uint32_t dst_addr_width;
+    rt_uint32_t src_maxburst;
+    rt_uint32_t dst_maxburst;
+};
+
+struct rt_dma_channel
+{
+    int ch;
+    rt_list_t               list;               /* channel list     */
+
+    struct dma_config       config;
+    struct dma_ops         *ops;
+
+    struct dma_message      msg_list[RT_DMA_MAX_NODES];
+    rt_uint16_t get_index;
+    rt_uint16_t put_index;
+
+    void       (*start)(struct rt_dma_channel *dmac,struct dma_message *msg);        /* 启动传输 回调函数 */
+    void       (*complete)(struct rt_dma_channel *dmac,struct dma_message *msg);     /* 传输完成 回调函数 */
+
+    void       *user_data;          /* 自定义数据   */
+};
+
+
+/*********************************************************************************************************
+**   函数申明
+*********************************************************************************************************/
+rt_err_t rt_dma_drv_install(struct rt_dma_channel *dmac, struct dma_ops *ops,struct dma_config *config,void* user_data);
+struct rt_dma_channel   *rt_dma_get_channel(int id);
+struct dma_message      *rt_dma_get_current_message (struct rt_dma_channel *dmac);
+rt_err_t  rt_dma_reset (struct rt_dma_channel *dmac);
+rt_err_t  rt_dma_trans_message (struct rt_dma_channel *dmac,struct dma_message* message);
+rt_err_t  rt_dma_configture (struct rt_dma_channel *dmac,struct dma_config *config);
+rt_err_t rt_dma_contex_service (struct rt_dma_channel *dmac,rt_uint32_t event);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DMA_H_ */

bsp/x1000/drivers/drv_clock.c

@@ -21,16 +21,16 @@
  * Date           Author       Notes
  * 2015-11-19     Urey         the first version
  */
+#include <string.h>
 
 #include <rthw.h>
 #include <rtthread.h>
 #include <rtdevice.h>
 
-#include <x1000.h>
-
 #include "board.h"
 #include "drv_clock.h"
 
+
 #define DEBUG   0
 #if DEBUG
 #define PRINT(...)     rt_kprintf(__VA_ARGS__)
@@ -834,8 +834,42 @@ const struct clk_selectors audio_selector[] =
     [SELECTOR_AUDIO].route = {CLK(EXT1),CLK(SCLKA),CLK(EXT1),CLK(MPLL)},
 #undef CLK
 };
-static int audio_div_apll[64];
-static int audio_div_mpll[64];
+static int audio_div_apll[64] =
+{
+     8000 , 1 , 126000 ,
+     11025 , 2 , 182857 ,
+     12000 , 1 , 84000 ,
+     16000 , 1 , 63000 ,
+     22050 , 4 , 182857 ,
+     24000 , 1 , 42000 ,
+     32000 , 1 , 31500 ,
+     44100 , 7 , 160000 ,
+     48000 , 1 , 21000 ,
+     88200 , 21 , 240000 ,
+     96000 , 1 , 10500 ,
+     176400 , 42 , 240000 ,
+     192000 , 1 , 5250 ,
+
+ 0
+};
+static int audio_div_mpll[64] =
+{
+     8000 , 1 , 75000 ,
+     11025 , 4 , 217687 ,
+     12000 , 1 , 50000 ,
+     16000 , 1 , 37500 ,
+     22050 , 8 , 217687 ,
+     24000 , 1 , 25000 ,
+     32000 , 1 , 18750 ,
+     44100 , 16 , 217687 ,
+     48000 , 1 , 12500 ,
+     88200 , 25 , 170068 ,
+     96000 , 1 , 6250 ,
+     176400 , 75 , 255102 ,
+     192000 , 1 , 3125 ,
+
+     0
+};
 
 struct cgu_audio_clk
 {
@@ -920,13 +954,14 @@ static int get_div_val(int max1,int max2,int machval, int* res1, int* res2)
     *res2 = tmp2;
     return 0;
 }
-static int cgu_audio_calculate_set_rate(struct clk* clk, uint32_t rate, uint32_t pid){
+
+static int cgu_audio_calculate_set_rate(struct clk* clk, uint32_t rate, uint32_t pid)
+{
     int i,m,n,d,sync,tmp_val,d_max,sync_max;
     int no = CLK_CGU_AUDIO_NO(clk->flags);
     int n_max = cgu_audio_clks[no].maskn >> cgu_audio_clks[no].bitn;
     int *audio_div;
 
-
     if(pid == CLK_ID_MPLL)
     {
         audio_div = (int*)audio_div_mpll;
@@ -946,7 +981,8 @@ static int cgu_audio_calculate_set_rate(struct clk* clk, uint32_t rate, uint32_t
         PRINT("cgu aduio set rate err!\n");
         return -1;
     }
-    else{
+    else
+    {
         m = audio_div[i+1];
         if(no == CGU_AUDIO_I2S)
         {
@@ -954,7 +990,7 @@ static int cgu_audio_calculate_set_rate(struct clk* clk, uint32_t rate, uint32_t
             m*=2;
 #endif
             d_max = 0x1ff;
-            tmp_val = audio_div[i+2]/64;
+            tmp_val = audio_div[i + 2] / 64;
             if (tmp_val > n_max)
             {
                 if (get_div_val(n_max, d_max, tmp_val, &n, &d))
@@ -962,8 +998,8 @@ static int cgu_audio_calculate_set_rate(struct clk* clk, uint32_t rate, uint32_t
             }
             else
             {
-                n = tmp_val;
-                d = 1;
+                n = tmp_val / 4;
+                d = 4;
             }
             tmp_val = cpm_inl(cgu_audio_clks[no].off)&(~(cgu_audio_clks[no].maskm|cgu_audio_clks[no].maskn));
             tmp_val |= (m<<cgu_audio_clks[no].bitm)|(n<<cgu_audio_clks[no].bitn);
@@ -975,8 +1011,9 @@ static int cgu_audio_calculate_set_rate(struct clk* clk, uint32_t rate, uint32_t
             {
                 cgu_audio_clks[no].cache = tmp_val;
             }
-            writel(d - 1,I2S_PRI_DIV);
 
+            cpm_outl(0,CPM_I2SCDR1);
+            writel(d - 1,I2S_PRI_DIV);
         }
         else if (no == CGU_AUDIO_PCM)
         {
@@ -1094,10 +1131,12 @@ static int cgu_audio_set_rate(struct clk *clk, uint32_t rate)
     }
     else
     {
-        cgu_audio_calculate_set_rate(clk,rate,CLK_ID_MPLL);
         if(get_clk_id(clk->parent) == CLK_ID_EXT1)
-            cgu_audio_set_parent(clk,get_clk_from_id(CLK_ID_MPLL));
-        clk->parent = get_clk_from_id(CLK_ID_MPLL);
+            cgu_audio_set_parent(clk,get_clk_from_id(CLK_ID_SCLKA));
+
+        cgu_audio_calculate_set_rate(clk,rate,CLK_ID_SCLKA);
+
+        clk->parent = get_clk_from_id(CLK_ID_SCLKA);
     }
     return 0;
 }
@@ -1124,9 +1163,6 @@ void init_cgu_audio_clk(struct clk *clk)
 {
     int no,id,tmp_val;
 
-    rt_memcpy(audio_div_apll,(void*)(0xf4000000),256);
-    rt_memcpy(audio_div_mpll,(void*)(0xf4000000)+256,256);
-
     if (clk->flags & CLK_FLG_PARENT)
     {
         id = CLK_PARENT(clk->flags);
@@ -1461,3 +1497,61 @@ int init_all_clk(void)
     return 0;
 }
 INIT_BOARD_EXPORT(init_all_clk);
+
+#ifdef RT_USING_FINSH
+#include <finsh.h>
+#endif
+
+int clk_dump(int argc, char** argv)
+{
+    // dump = 1;
+    rt_kprintf("CCLK:%luMHz L2CLK:%luMhz H0CLK:%luMHz H2CLK:%luMhz PCLK:%luMhz\n",
+            clk_srcs[CLK_ID_CCLK].rate/1000/1000,
+            clk_srcs[CLK_ID_L2CLK].rate/1000/1000,
+            clk_srcs[CLK_ID_H0CLK].rate/1000/1000,
+            clk_srcs[CLK_ID_H2CLK].rate/1000/1000,
+            clk_srcs[CLK_ID_PCLK].rate/1000/1000);
+
+    return 0;
+}
+MSH_CMD_EXPORT(clk_dump, dump clock debug log);
+
+int clk(int argc, char**argv)
+{
+    uint32_t value;
+
+    value = cpm_inl(CPM_CLKGR);
+    rt_kprintf("CLKGR = 0x%08x\n", value);
+
+    value &= ~(1 << 14);
+    cpm_outl(value, CPM_CLKGR);
+
+    value = cpm_inl(CPM_CLKGR);
+    rt_kprintf("CLKGR = 0x%08x\n", value);
+
+    return 0;
+}
+MSH_CMD_EXPORT(clk, clock information dump);
+
+int uart0_clk(void)
+{
+    uint32_t value;
+
+    value = cpm_inl(CPM_CLKGR);
+    value &= ~(1 << 14);
+    cpm_outl(value, CPM_CLKGR);
+
+    return 0;
+}
+
+int uart1_clk(void)
+{
+    uint32_t value;
+
+    value = cpm_inl(CPM_CLKGR);
+    value &= ~(1 << 15);
+    cpm_outl(value, CPM_CLKGR);
+
+    return 0;
+}
+

bsp/x1000/drivers/drv_clock.h

@@ -27,66 +27,6 @@
 
 #include "board.h"
 
-#define CPM_CPCCR   (0x00)
-#define CPM_CPCSR   (0xd4)
-
-#define CPM_DDRCDR  (0x2c)
-#define CPM_I2SCDR  (0x60)
-#define CPM_I2SCDR1 (0x70)
-#define CPM_LPCDR   (0x64)
-#define CPM_MSC0CDR (0x68)
-#define CPM_MSC1CDR (0xa4)
-#define CPM_USBCDR  (0x50)
-#define CPM_MACCDR  (0x54)
-#define CPM_UHCCDR  (0x6c)
-#define CPM_SFCCDR  (0x74)
-#define CPM_CIMCDR  (0x7c)
-#define CPM_PCMCDR  (0x84)
-#define CPM_PCMCDR1 (0xe0)
-#define CPM_MPHYC   (0xe8)
-
-#define CPM_INTR    (0xb0)
-#define CPM_INTRE   (0xb4)
-#define CPM_DRCG    (0xd0)
-#define CPM_CPSPPR  (0x38)
-#define CPM_CPPSR   (0x34)
-
-#define CPM_USBPCR  (0x3c)
-#define CPM_USBRDT  (0x40)
-#define CPM_USBVBFIL    (0x44)
-#define CPM_USBPCR1 (0x48)
-
-#define CPM_CPAPCR  (0x10)
-#define CPM_CPMPCR  (0x14)
-
-#define CPM_LCR     (0x04)
-#define CPM_PSWC0ST     (0x90)
-#define CPM_PSWC1ST     (0x94)
-#define CPM_PSWC2ST     (0x98)
-#define CPM_PSWC3ST     (0x9c)
-#define CPM_CLKGR   (0x20)
-#define CPM_MESTSEL (0xec)
-#define CPM_SRBC    (0xc4)
-#define CPM_ERNG    (0xd8)
-#define CPM_RNG         (0xdc)
-#define CPM_SLBC    (0xc8)
-#define CPM_SLPC    (0xcc)
-#define CPM_OPCR    (0x24)
-#define CPM_RSR     (0x08)
-
-#define LCR_LPM_MASK        (0x3)
-#define LCR_LPM_SLEEP       (0x1)
-
-#define OPCR_ERCS       (0x1<<2)
-#define OPCR_PD         (0x1<<3)
-#define OPCR_IDLE       (0x1<<31)
-
-#define cpm_inl(off)            readl(CPM_BASE + (off))
-#define cpm_outl(val,off)       writel(val, CPM_BASE + (off))
-#define cpm_test_bit(bit,off)   (cpm_inl(off) & 0x1<<(bit))
-#define cpm_set_bit(bit,off)    (cpm_outl((cpm_inl(off) | 0x1<<(bit)),off))
-#define cpm_clear_bit(bit,off)  (cpm_outl(cpm_inl(off) & ~(0x1 << bit), off))
-
 
 #define I2S_PRI_DIV 0xb0020030
 #define PCM_PRI_DIV 0xb0030014

bsp/x1000/drivers/drv_gpio.c

@@ -50,15 +50,19 @@ void gpio_set_func(enum gpio_port port, uint32_t pins, enum gpio_function func)
 {
     RT_ASSERT(IS_GPIO_ALL_PORT(port));
 
-    writel(func & 0x8 ? pins : 0, GPIO_PXINTS(port));
-    writel(func & 0x4 ? pins : 0, GPIO_PXMSKS(port));
-    writel(func & 0x2 ? pins : 0, GPIO_PXPAT1S(port));
-    writel(func & 0x1 ? pins : 0, GPIO_PXPAT0S(port));
+    // Write to shadow register
+    writel(func & 0x8 ? pins : 0, GPIO_PXINTS(GPIO_PORT_Z));
+    writel(func & 0x4 ? pins : 0, GPIO_PXMSKS(GPIO_PORT_Z));
+    writel(func & 0x2 ? pins : 0, GPIO_PXPAT1S(GPIO_PORT_Z));
+    writel(func & 0x1 ? pins : 0, GPIO_PXPAT0S(GPIO_PORT_Z));
 
-    writel(func & 0x8 ? 0 : pins, GPIO_PXINTC(port));
-    writel(func & 0x4 ? 0 : pins, GPIO_PXMSKC(port));
-    writel(func & 0x2 ? 0 : pins, GPIO_PXPAT1C(port));
-    writel(func & 0x1 ? 0 : pins, GPIO_PXPAT0C(port));
+    writel(func & 0x8 ? 0 : pins, GPIO_PXINTC(GPIO_PORT_Z));
+    writel(func & 0x4 ? 0 : pins, GPIO_PXMSKC(GPIO_PORT_Z));
+    writel(func & 0x2 ? 0 : pins, GPIO_PXPAT1C(GPIO_PORT_Z));
+    writel(func & 0x1 ? 0 : pins, GPIO_PXPAT0C(GPIO_PORT_Z));
+
+    //Load shadown reigster
+    writel(port,GPIO_PZGID2LD(GPIO_PORT_Z));
 
     writel(func & 0x10 ? pins : 0, GPIO_PXPENC(port));
     writel(func & 0x10 ? 0 : pins, GPIO_PXPENS(port));
@@ -147,7 +151,7 @@ void gpio_mask_irq(enum gpio_port port,  enum gpio_pin pin)
 {
     RT_ASSERT(IS_GPIO_ALL_PORT(port));
 
-    writel(BIT(pin), GPIO_PXMSKS(port));
+    writel(pin, GPIO_PXMSKS(port));
 }
 
 int gpio_set_irq_type(enum gpio_port port,  enum gpio_pin pin, enum gpio_irq_type irq_type)

bsp/x1000/drivers/drv_gpio.h

@@ -27,13 +27,13 @@
 
 #include <stdint.h>
 
-#define GPIO_PA(n)  (0*32 + n)
-#define GPIO_PB(n)  (1*32 + n)
-#define GPIO_PC(n)  (2*32 + n)
-#define GPIO_PD(n)  (3*32 + n)
-#define GPIO_PE(n)  (4*32 + n)
-#define GPIO_PF(n)  (5*32 + n)
-#define GPIO_PG(n)  (6*32 + n)
+//#define GPIO_PA(n)  (0*32 + n)
+//#define GPIO_PB(n)  (1*32 + n)
+//#define GPIO_PC(n)  (2*32 + n)
+//#define GPIO_PD(n)  (3*32 + n)
+//#define GPIO_PE(n)  (4*32 + n)
+//#define GPIO_PF(n)  (5*32 + n)
+//#define GPIO_PG(n)  (6*32 + n)
 
 #define GPIO_PIN(n) (0x01 << n)
 
@@ -142,8 +142,13 @@ enum gpio_port {
     GPIO_PORT_D,
     /* this must be last */
     GPIO_NR_PORTS,
+	GPIO_PORT_Z = 7,
 };
 
+//#define IS_GPIO_ALL_PORT(PORT) (   ((PORT) == GPIO_PORT_A) || \
+//                                    ((PORT) == GPIO_PORT_B) || \
+//                                    ((PORT) == GPIO_PORT_C) || \
+//                                    ((PORT) == GPIO_PORT_D) )
 #define IS_GPIO_ALL_PORT(PORT) (   (PORT) < GPIO_NR_PORTS )
 
 enum gpio_pin {
@@ -203,6 +208,8 @@ void    gpio_as_irq_high_level      (enum gpio_port port, enum gpio_pin pin);
 void    gpio_as_irq_rise_edge       (enum gpio_port port, enum gpio_pin pin);
 void    gpio_as_irq_fall_edge       (enum gpio_port port, enum gpio_pin pin);
 void    gpio_ack_irq                (enum gpio_port port, enum gpio_pin pin);
-void gpio_set_irq_callback(enum gpio_port port, enum gpio_pin pin, void (*irq_cb)(void *),void *irq_arg);
+void    gpio_set_irq_callback(enum gpio_port port, enum gpio_pin pin, void (*irq_cb)(void *),void *irq_arg);
+void    gpio_mask_irq(enum gpio_port port,  enum gpio_pin pin);
+void    gpio_unmask_irq(enum gpio_port port,  enum gpio_pin pin);
 
 #endif /* _BOARD_GPIO_H_ */

bsp/x1000/drivers/drv_i2c.h

@@ -0,0 +1,4 @@
+#ifndef DRV_I2C_H__
+#define DRV_I2C_H__
+
+#endif

bsp/x1000/drivers/drv_ost.c

@@ -44,7 +44,7 @@ void rt_hw_ost_handler(void)
     REG_OSTFR = 0;
 }
 
-void rt_hw_ost_init(void)
+int rt_hw_ost_init(void)
 {
     rt_uint32_t cnt, div;
     struct clk  *clk;
@@ -76,4 +76,19 @@ void rt_hw_ost_init(void)
     REG_OSTESR = 0x01;
 
     clk_put(clk);
+
+    return 0;
 }
+
+#include <finsh.h>
+int ost(int argc, char** argv)
+{
+    rt_kprintf("OSTCCR = 0x%08x\n", REG_OSTCCR);
+    rt_kprintf("OSTER = 0x%08x\n", REG_OSTER);
+    rt_kprintf("count = 0x%08x\n", REG_OST1CNT);
+
+    rt_kprintf("TCU_TER = 0x%08x\n", REG_TCU_TER);
+
+    return 0;
+}
+MSH_CMD_EXPORT(ost, ost debug);

bsp/x1000/drivers/drv_ost.h

@@ -137,6 +137,6 @@
 #define OST_DIV4    (0x1)
 #define OST_DIV16   (0x2)
 
-void rt_hw_ost_init(void);
+int rt_hw_ost_init(void);
 
 #endif

bsp/x1000/drivers/drv_pin.c

@@ -0,0 +1,97 @@
+/*
+ * File      : drv_pin.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-01-01     Urey      first version
+ */
+
+#include <rthw.h>
+#include <rtdevice.h>
+#include <board.h>
+#include "drv_gpio.h"
+
+#define CORE_BOARD_PIN_NUMBERS  94      //Halley2
+
+#define __X1000_PIN(index, port, pin) { 0, GPIO_PORT_##port, GPIO_Pin_##pin}
+#define __X1000_PIN_DEFAULT {-1, 0, 0}
+
+
+struct pin_index
+{
+    int         index;
+    uint32_t    port;
+    uint32_t    pin;
+};
+
+
+static const struct pin_index pins[] =
+{
+    __X1000_PIN_DEFAULT,            //0 NULL
+    __X1000_PIN_DEFAULT,            //1 RST
+    __X1000_PIN(2,B,26),
+    __X1000_PIN(3,B,25),
+
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+
+    __X1000_PIN(17,B,7),
+    __X1000_PIN(18,B,6),
+    __X1000_PIN(19,B,10),
+
+    __X1000_PIN(20,B,9),
+    __X1000_PIN(21,B,8),
+    __X1000_PIN(22,B,13),
+    __X1000_PIN(23,B,11),
+    __X1000_PIN(24,B,12),
+    __X1000_PIN(25,B,15),
+    __X1000_PIN(26,B,14),
+    __X1000_PIN(27,B,16),
+    __X1000_PIN(28,A,1),
+    __X1000_PIN(29,A,0),
+    __X1000_PIN(30,B,18),
+    __X1000_PIN(31,A,3),
+    __X1000_PIN(32,A,2),
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN_DEFAULT,
+    __X1000_PIN(37,A,4),
+    __X1000_PIN(38,A,6),
+    __X1000_PIN(39,B,17),
+    __X1000_PIN(40,B,20),
+    __X1000_PIN(41,A,5),
+    __X1000_PIN(42,A,7),
+    __X1000_PIN(43,A,8),
+    __X1000_PIN(44,A,9),
+    __X1000_PIN(45,A,11),
+    __X1000_PIN(46,B,19),
+    __X1000_PIN(47,A,10),
+};

bsp/x1000/drivers/drv_pmu.h

@@ -1,5 +1,5 @@
 /*
- * File      : board_io.c
+ * File      : drv_pmu.h
  * This file is part of RT-Thread RTOS
  * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
  *
@@ -19,9 +19,14 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2015-11-19     Urey         the first version
+ * 2016-08-08     Urey         the first version
  */
-#include <board.h>
-#include <rtthread.h>
 
-#include "drv_gpio.h"
+#ifndef DRIVER_DRV_PMU_H_
+#define DRIVER_DRV_PMU_H_
+
+int drv_pmu_init(void);
+void drv_pmu_power_up(void);
+void drv_pmu_power_down(void);
+int drv_pmu_get_keypwr(void);
+#endif /* DRIVER_DRV_PMU_H_ */

bsp/x1000/drivers/drv_reset.h

@@ -1,7 +1,7 @@
 /*
- * File      : mnt.c
+ * File      : drv_reset.h
  * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
+ * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -19,29 +19,31 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2015-11-19     Urey         the first version
+ * 2016Äê7ÔÂ29ÈÕ     Urey         the first version
  */
 
-#include <rtthread.h>
-#include <rtdevice.h>
+#ifndef _DRV_RESET_H_
+#define _DRV_RESET_H_
 
-#include <dfs_fs.h>
+/* WDT */
+void wdt_start_count(int msecs);
+void wdt_stop_count(void);
+void wdt_clear(void);
 
-int mnt_init(void)
-{
-#ifdef RT_USING_SDIO
-    jz47xx_sdio_init();
-    rt_thread_delay(RT_TICK_PER_SECOND * 1);
+/* hibernate */
+void x1000_hibernate(void);
 
-    /* mount sd card fat partition 1 as root directory */
-    if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
-    {
-        rt_kprintf("File System initialized!\n");
-    }
-    else
-    {
-        rt_kprintf("File System initialzation failed!\n");
-    }
-#endif
-}
-INIT_ENV_EXPORT(mnt_init);
+
+/* Reset */
+/* reset_cmd[] = "wdt","hibernate","recovery" */
+int x1000_reset(const char *reset_cmd);
+
+
+#define RESET_HR_BIT	(0x01 << 3)
+#define RESET_P0R_BIT	(0x01 << 2)
+#define RESET_WR_BIT	(0x01 << 1)
+#define RESET_PR_BIT	(0x01 << 0)
+uint32_t x1000_get_last_reset(void);
+
+
+#endif /* _DRV_RESET_H_ */

bsp/x1000/drivers/drv_rtc.c

@@ -0,0 +1,196 @@
+/*
+ * File      : drv_rtc.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2016/7/28      Urey         the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#include <stdio.h>
+#include <stdint.h>
+#include <time.h>
+
+#include "board.h"
+#include "drv_clock.h"
+#include "drv_gpio.h"
+#include "drv_ost.h"
+#include "drv_rtc.h"
+
+static rt_base_t rtc32k_ref = 0;
+
+void rtc32k_enable(void)
+{
+    if(++rtc32k_ref == 1)
+        gpio_set_func(GPIO_PORT_B,GPIO_Pin_26,GPIO_FUNC_0);
+}
+
+
+void rtc32k_disable(void)
+{
+    if(--rtc32k_ref == 0)
+        gpio_set_func(GPIO_PORT_B,GPIO_Pin_26,GPIO_INPUT);
+}
+
+#if 0 /* not enable */
+static void jz_rtc_interrupt(int vector,void *param)
+{
+    if (rtc_read_reg(RTC_RTCCR) & RTC_RTCCR_AF)     /* rtc alarm interrupt */
+    {
+        rtc_clr_reg(RTC_RTCCR, RTC_RTCCR_AF);
+
+#ifdef AHB_MONITOR_PERIOD
+        // Stop and log the data, and the 1st of the data is INVALID.
+        MONITOR_LOG();
+        // Start the monitor.
+        MONITOR_START(MASTER_IPU, MEVENT_BUS_TRANS_CYCLE, MASTER_ALL, MEVENT_BUS_TRANS_CYCLE);
+
+        // Config the RTC alarm for the next time
+        rtc_write_reg(RTC_RTCSAR, rtc_read_reg(RTC_RTCSR) + AHB_MONITOR_PERIOD);
+#else
+        printf("RTC alarm interrupt clean!\n");
+        rtc_alarm_handler();
+#endif
+    }
+    else
+    {
+        rtc_clr_reg(RTC_RTCCR, RTC_RTCCR_1HZ);
+    }
+}
+#endif
+
+void jz_rtc_init(void)
+{
+    unsigned int tmpx , flag;
+
+    tmpx = rtc_read_reg(RTC_BASE + RTC_HSPR);
+    flag = rtc_read_reg(RTC_BASE + RTC_RTCGR) & RTC_RTCGR_NC1HZ_MASK;
+    if((tmpx != COLD_BOOT_SIG) || (flag != RTCGR_DIV_1HZ))
+    {
+        rt_kprintf("rtc is not configured\n");
+        rt_kprintf("please configure with set_date and set_time\n");
+
+        rtc_write_reg(RTC_BASE + RTC_RTCGR, RTCGR_DIV_1HZ);
+        rtc_write_reg(RTC_BASE + RTC_HSPR, COLD_BOOT_SIG);
+        rtc_write_reg(RTC_BASE + RTC_RTCSR, 0x00000000);
+        rtc_write_reg(RTC_BASE + RTC_RTCSR, 0);
+        rtc_set_reg(RTC_BASE + RTC_RTCCR, RTC_RTCCR_RTCE);
+    }
+    else
+    {
+        rt_kprintf("skip init rtc...\n");
+    }
+}
+
+void jz_rtc_deinit(void)
+{
+    rtc_clr_reg(RTC_BASE + RTC_RTCCR, RTC_RTCCR_RTCE);
+}
+
+static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
+{
+    if (dev->rx_indicate != RT_NULL)
+    {
+        /* Open Interrupt */
+    }
+
+    return RT_EOK;
+}
+
+static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+    return 0;
+}
+
+static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
+{
+    time_t *time;
+    RT_ASSERT(dev != RT_NULL);
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_RTC_GET_TIME:
+    {
+        const struct tm* tm_now;
+        struct tm tm_new;
+        time_t timeNow;
+        time = (time_t *)args;
+
+        /* Get the current Time */
+        timeNow = rtc_read_reg(RTC_BASE + RTC_RTCSR);
+        tm_now = localtime(&timeNow);
+
+        /* 0-99 range              : Years since 1900 */
+        rt_memcpy(&tm_new,tm_now,sizeof(struct tm));
+        tm_new.tm_year = tm_now->tm_year + 2000 - 1900;
+
+        *time = mktime(&tm_new);
+    }
+        break;
+
+    case RT_DEVICE_CTRL_RTC_SET_TIME:
+    {
+        const struct tm* tm_now;
+        struct tm tm_new;
+        time_t  timeNow;
+
+        time = (time_t *)args;
+        tm_now = localtime(time);
+
+        rt_memcpy(&tm_new,tm_now,sizeof(struct tm));
+
+        /* 0-99 range              : Years since 1900 */
+        tm_new.tm_year = tm_now->tm_year + 1900 - 2000;
+
+        timeNow = mktime(&tm_new);
+
+         /* upgrade the current Time */
+        rtc_write_reg(RTC_BASE + RTC_RTCSR,timeNow);
+    }
+    break;
+    }
+
+    return RT_EOK;
+}
+
+
+int rt_hw_rtc_init(void)
+{
+    static struct rt_device rtc;
+
+    jz_rtc_init();
+
+    rtc.type    = RT_Device_Class_RTC;
+    /* register rtc device */
+    rtc.init    = RT_NULL;
+    rtc.open    = rt_rtc_open;
+    rtc.close   = RT_NULL;
+    rtc.read    = rt_rtc_read;
+    rtc.write   = RT_NULL;
+    rtc.control = rt_rtc_control;
+
+    /* no private */
+    rtc.user_data = RT_NULL;
+
+    rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
+}
+INIT_DEVICE_EXPORT(rt_hw_rtc_init);

bsp/x1000/drivers/drv_uart.h

@@ -1,5 +1,5 @@
 /*
- * File      : board_uart.h
+ * File      : drv_uart.h
  * This file is part of RT-Thread RTOS
  * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
  *
@@ -23,8 +23,8 @@
  */
 
 
-#ifndef _BOARD_UART_H_
-#define _BOARD_UART_H_
+#ifndef DRV_UART_H_
+#define DRV_UART_H_
 
 /* Uart Register */
 #define UART_RDR(base)      REG8((base) + 0x00) /* R  8b H'xx */
@@ -41,7 +41,8 @@
 #define UART_SPR(base)      REG8((base) + 0x1C) /* RW 8b H'00 */
 #define UART_MCR(base)      REG8((base) + 0x10) /* RW 8b H'00 */
 #define UART_SIRCR(base)    REG8((base) + 0x20) /* RW 8b H'00 */
-
+#define UART_UMR(base)		REG8((base) + 0x24)	/* W  8b H'00 */
+#define UART_UACR(base)		REG8((base) + 0x28)	/* W  8b H'00 */
 
 /*
  * Define macros for UARTIER
@@ -121,6 +122,7 @@
 #define UARTMCR_OUT1    (1 << 2)    /* 0: UARTMSR.RI is set to 0 and RI_ input high */
 #define UARTMCR_OUT2    (1 << 3)    /* 0: UARTMSR.DCD is set to 0 and DCD_ input high */
 #define UARTMCR_LOOP    (1 << 4)    /* 0: normal  1: loopback mode */
+#define UARTMCR_FCM     (1 << 6)    /* 0: flow control by software; 1: hardware */
 #define UARTMCR_MCE     (1 << 7)    /* 0: modem function is disable */
 
 /*
@@ -149,4 +151,7 @@
 
 void rt_hw_uart_init(void);
 
+/* only used for bt_audio */
+int uart_set_baudrate(int baudrate);
+
 #endif /* _BOARD_UART_H_ */

bsp/x1000/drivers/mmc/SConscript

@@ -4,8 +4,8 @@ from building import *
 
 cwd = GetCurrentDir()
 src = Glob('*.c')
-CPPPATH = [cwd, str(Dir('#'))]
+CPPPATH = [cwd]
 
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+group = DefineGroup('drv_mmc', src, depend = ['RT_USING_SDIO'], CPPPATH = CPPPATH)
 
 Return('group')

bsp/x1000/drivers/sfc/SConscript

@@ -0,0 +1,21 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd = GetCurrentDir()
+CPPPATH = [cwd]
+
+sfc_src = Split('''
+drv_sfc.c
+''')
+sfc_group = DefineGroup('drv_sfc', sfc_src, depend = ['RT_USING_MTD_NOR'], CPPPATH = CPPPATH)
+
+part_src = Split('''
+drv_sfc_gd25qxx_mtd_partition.c
+drv_sfc_gd25qxx_mtd.c
+mtd_nor_partition.c
+''')
+part_group = DefineGroup('sfc_part', part_src, depend = ['RT_USING_MTD_NOR'], CPPPATH = CPPPATH)
+
+group = sfc_group + part_group
+Return('group')

bsp/x1000/drivers/sfc/drv_sfc_gd25qxx_mtd.c

@@ -0,0 +1,192 @@
+/*
+ * File      : drv_sfc_gd25qxx_mtd.c
+ * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017Äê4ÔÂ19ÈÕ     Urey         the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <drivers/mtd_nor.h>
+
+#include "board.h"
+#include "drv_clock.h"
+#include "drv_gpio.h"
+#include "drv_sfc.h"
+
+/* JEDEC Manufacturer's ID */
+#define MF_ID           (0xC8)
+
+/* JEDEC Device ID: Memory type and Capacity */
+#define MTC_GD25Q128                (0x4018)
+#define MTC_GD25Q256                (0x4019)
+
+
+/* RT-Thread MTD device interface */
+static rt_base_t mtd_gd25_read_id(struct rt_mtd_nor_device *device)
+{
+    struct sfc_flash *flash = (struct sfc_flash *)device;
+
+    return (rt_uint32_t)flash->id;
+}
+
+static rt_size_t mtd_gd25_read(struct rt_mtd_nor_device *device, rt_off_t position, rt_uint8_t *data, rt_size_t size)
+{
+    struct sfc_flash *flash = (struct sfc_flash *)device;
+
+    return sfc_norflash_read(flash,position,data,size);
+}
+
+static rt_size_t mtd_gd25_write(struct rt_mtd_nor_device *device, rt_off_t position, const rt_uint8_t *data, rt_size_t size)
+{
+    struct sfc_flash *flash = (struct sfc_flash *)device;
+
+    return sfc_norflash_write(flash,position,data,size);
+}
+
+
+static rt_err_t mtd_gd25_erase_block(struct rt_mtd_nor_device *device, rt_off_t offset, rt_uint32_t length)
+{
+    struct sfc_flash *flash = (struct sfc_flash *)device;
+
+    sfc_norflash_erase_sector(flash,offset);
+    return RT_EOK;
+}
+
+const static struct rt_mtd_nor_driver_ops mtd_gd25_ops =
+{
+    mtd_gd25_read_id,
+    mtd_gd25_read,
+    mtd_gd25_write,
+    mtd_gd25_erase_block,
+};
+
+#ifdef SFC_USE_QUAD
+struct sfc_quad_mode  flash_quad_mode[] =
+{
+    {
+        .RDSR_CMD = CMD_RDSR_1,
+        .WRSR_CMD = CMD_WRSR_1,
+        .RDSR_DATE = 0x2,//the data is write the spi status register for QE bit
+        .RD_DATE_SIZE = 1,
+        .WRSR_DATE = 0x2,//this bit should be the flash QUAD mode enable
+        .WD_DATE_SIZE = 1,
+        .cmd_read = CMD_QUAD_READ,//
+        .sfc_mode = TRAN_SPI_QUAD,
+    },
+    {
+        .RDSR_CMD = CMD_RDSR,
+        .WRSR_CMD = CMD_WRSR,
+        .RDSR_DATE = 0x40,//the data is write the spi status register for QE bit
+        .RD_DATE_SIZE = 1,
+        .WRSR_DATE = 0x40,//this bit should be the flash QUAD mode enable
+        .WD_DATE_SIZE = 1,
+        .cmd_read = CMD_QUAD_IO_FAST_READ,
+        .sfc_mode = TRAN_SPI_IO_QUAD,
+    },
+    {
+        .RDSR_CMD = CMD_RDSR_1,
+        .WRSR_CMD = CMD_WRSR,
+        .RDSR_DATE = 0x20,//the data is write the spi status register for QE bit
+        .RD_DATE_SIZE = 1,
+        .WRSR_DATE = 0x200,//this bit should be the flash QUAD mode enable
+        .WD_DATE_SIZE = 2,
+        .cmd_read = CMD_QUAD_READ,
+        .sfc_mode = TRAN_SPI_QUAD,
+    },
+    {
+        .RDSR_CMD = CMD_RDSR,
+        .WRSR_CMD = CMD_WRSR,
+        .RDSR_DATE = 0x40,//the data is write the spi status register for QE bit
+        .RD_DATE_SIZE = 1,
+        .WRSR_DATE = 0x40,//this bit should be the flash QUAD mode enable
+        .WD_DATE_SIZE = 1,
+        .cmd_read = CMD_QUAD_READ,
+        .sfc_mode = TRAN_SPI_QUAD,
+    },
+
+};
+#endif
+
+static struct sfc_flash _gd25_flash_info =
+{
+        .name       = "GD25Q128C",
+        .id         = 0xc84018,
+        .pagesize   = 256,
+        .sectorsize = ( 4 * 1024),
+        .chipsize   = (16 * 1024 * 1024),
+        .erasesize  = ( 4 * 1024),
+        .writesize  = 256,
+        .addrsize   = DEFAULT_ADDRSIZE,
+        .quad_mode  = &flash_quad_mode[0]
+};
+
+static char flashIdStr[128];
+extern int rt_hw_gd25qxx_mtd_part_init(const char *mtd_name);
+int rt_hw_gd25qxx_init(void)
+{
+    struct sfc_flash   *flash = &_gd25_flash_info;
+    int result;
+    
+    result = sfc_norflash_probe(flash);
+    if(result != RT_EOK)
+    {
+        rt_kprintf("GD25 init Failed..\n");
+
+        return result;
+    }
+
+    if((flash->id >> 16) != MF_ID)
+    {
+        rt_kprintf("Manufacturers ID error!\r\n");
+        rt_kprintf("JEDEC Read-ID Data : %06X\r\n", flash->id);
+        return -RT_ENOSYS;
+    }
+
+    switch (flash->id & 0xFFFF)
+    {
+        case MTC_GD25Q128:
+            flash->name     = "GD25Q128C";
+            flash->chipsize = (16 * 1024 * 1024);
+            flash->addrsize = 3;
+            flash->quad_mode = &flash_quad_mode[0];
+        break;
+        case MTC_GD25Q256:
+            flash->name     = "GD25Q256C";
+            flash->chipsize = (32 * 1024 * 1024);
+            flash->addrsize = 4;
+            flash->quad_mode = &flash_quad_mode[3];
+            /* enable 4-byte addressing if the device exceeds 16MiB */
+            sfc_norflash_set_addr_width_4byte(flash,1);
+        break;
+        default:
+            rt_kprintf("Memory Capacity error!\r\n");
+            return -RT_ENOSYS;
+        break;
+    }
+
+    //format FLASH UUID...
+    {
+        int strSize,i;
+
+        strSize  = rt_snprintf(flashIdStr + 0,sizeof(flashIdStr) - 0,"%06X",flash->id);
+        for(i=0;i<8;i++)
+            strSize += rt_snprintf(flashIdStr + strSize,sizeof(flashIdStr) - strSize,"%02X",flash->uid[i]);
+        flashIdStr[strSize] = '\0';
+    }
+
+    /* Init device interface ... */
+    flash->mtd.block_size   = flash->erasesize;
+    flash->mtd.block_start  = 0;
+    flash->mtd.block_end    = flash->chipsize / flash->erasesize;
+    flash->mtd.ops          = &mtd_gd25_ops;
+    rt_mtd_nor_register_device("gd25mtd",&flash->mtd);
+    
+    rt_hw_gd25qxx_mtd_part_init("gd25mtd");
+
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(rt_hw_gd25qxx_init);

bsp/x1000/drivers/sfc/drv_sfc_gd25qxx_mtd_partition.c

@@ -0,0 +1,67 @@
+/*
+ * File      : drv_sfc_gd25qxx_mtd_partition.c
+ * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017Äê4ÔÂ19ÈÕ     Urey         the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <drivers/mtd_nor.h>
+
+#include "board.h"
+#include "drv_clock.h"
+#include "drv_gpio.h"
+#include "drv_sfc.h"
+#include "mtd_nor_partition.h"
+
+static struct rt_mtd_nor_partition _sf_gd25_parts[] =
+{
+    {
+        /* sf01 u-boot 512K */
+        .name       = "uboot",
+        .offset     = 0x0,
+        .size       = (0x80000),
+        .mask_flags = PART_FLAG_RDONLY | PART_TYPE_BLK,     /* force read-only */
+    },
+
+    {
+        /* kernel */
+        .name       = "kernel",
+        .offset     = 0x80000,
+        .size       = 0x380000,
+        .mask_flags = PART_FLAG_RDONLY | PART_TYPE_BLK,     /* force read-only */
+    },
+
+    {
+        /* rootfs */
+        .name       = "rootfs",
+        .offset     = 0x400000,
+        .size       = 0x800000,
+        .mask_flags = PART_FLAG_RDONLY | PART_TYPE_BLK,     /* force read-only & Block device */
+    },
+
+    {
+        /* sf04 appfs 2M*/
+        .name       = "appfs",
+        .offset     = 0xE00000,
+        .size       = 0x200000,
+        .mask_flags = PART_FLAG_RDWR | PART_TYPE_BLK,     /* force read-only & Block device */
+    },
+
+    //end
+    {
+        .name = (char *)0
+    }
+};
+
+
+int rt_hw_gd25qxx_mtd_part_init(const char *mtd_name)
+{
+    mtd_nor_init_partition(mtd_name,_sf_gd25_parts);
+
+    return 0;
+}

bsp/x1000/drivers/sfc/mtd_nor_partition.h

@@ -0,0 +1,53 @@
+/**
+  ******************************************************************************
+  * @file    spi_flash_mtd_partition.h
+  * @author  Urey
+  * @version V1.0.0
+  * @date    2017Äê2ÔÂ11ÈÕ
+  * @brief   TODO
+  ******************************************************************************         
+**/ 
+
+
+#ifndef _SPI_FLASH_MTD_PARTITION_H_
+#define _SPI_FLASH_MTD_PARTITION_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <drivers/mtd_nor.h>
+
+#define PART_FLAG_RDONLY    0x0001
+#define PART_FLAG_WRONLY    0x0002
+#define PART_FLAG_RDWR      0x0003
+
+#define PART_TYPE_BLK       0x0010
+#define PART_TYPE_MTD       0x0020
+
+struct rt_mtd_nor_partition
+{
+    union
+    {
+        struct rt_mtd_nor_device    mtd;
+        struct rt_device            blk;
+    };
+
+    const char *name;
+    rt_uint32_t offset;             /* offset within the master MTD space */
+    rt_uint32_t size;               /* partition size */
+    rt_uint32_t mask_flags;         /* master MTD flags to mask out for this partition */
+    void*       user_data;          /* hold parent device */
+};
+
+/*
+ * functions
+ */
+extern rt_err_t mtd_nor_init_partition(const char *mtd_name,struct rt_mtd_nor_partition *parts);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SPI_FLASH_MTD_PARTITION_H_ */

bsp/x1000/drivers/slcd/SConscript

@@ -0,0 +1,24 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd = GetCurrentDir()
+CPPPATH = [cwd]
+
+slcd_src = Split('''
+drv_slcdc.c
+''')
+slcd_group = DefineGroup('drv_slcd', slcd_src, depend = ['RT_USING_SLCD'], CPPPATH = CPPPATH)
+
+lcm_src = Split('''
+dump_slcd.c
+drv_slcd_ili9341.c
+drv_slcd_ili9488.c
+drv_slcd_otm4802.c
+drv_slcd_rm68120.c
+drv_slcd_truly_tft240240.c
+''')
+lcm_group = DefineGroup('drv_lcm', lcm_src, depend = ['RT_USING_SLCD'], CPPPATH = CPPPATH)
+
+group = slcd_group + lcm_group
+Return('group')

bsp/x1000/drivers/slcd/drv_slcd_ili9488.c

@@ -0,0 +1,176 @@
+/*
+ * File      : drv_slcdc_ili9488.c
+ * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017Äê5ÔÂ6ÈÕ     Urey         the first version
+ */
+
+#include <rtthread.h>
+#include <cache.h>
+
+#include "board.h"
+#include "drv_slcdc.h"
+#include <drv_gpio.h>
+
+#ifdef RT_USING_ILI9488
+
+#define LCD_WIDTH       480
+#define LCD_HEIGHT      320
+
+const rt_uint32_t _lcm_cmd_table[]=
+{
+    0x2C2C2C2C,
+};
+
+
+const struct slcd_data_table _lcm_data_table[] =
+{
+    /* LCD init code */
+    {SMART_CONFIG_CMD, 0xE0}, //P-Gamma
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,0x07},
+    {SMART_CONFIG_DATA,0x0f},
+    {SMART_CONFIG_DATA,0x07},
+    {SMART_CONFIG_DATA,0x15},
+    {SMART_CONFIG_DATA,0x09},
+    {SMART_CONFIG_DATA,0x3c},
+    {SMART_CONFIG_DATA,0x99},
+    {SMART_CONFIG_DATA,0x4b},
+    {SMART_CONFIG_DATA,0x09},
+    {SMART_CONFIG_DATA,0x10},
+    {SMART_CONFIG_DATA,0x0d},
+    {SMART_CONFIG_DATA,0x1c},
+    {SMART_CONFIG_DATA,0x1e},
+    {SMART_CONFIG_DATA,0x0f},
+
+    {SMART_CONFIG_CMD, 0xE1}, //N-Gamma
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,0x20},
+    {SMART_CONFIG_DATA,0x23},
+    {SMART_CONFIG_DATA,0x02},
+    {SMART_CONFIG_DATA,0x0f},
+    {SMART_CONFIG_DATA,0x06},
+    {SMART_CONFIG_DATA,0x34},
+    {SMART_CONFIG_DATA,0x45},
+    {SMART_CONFIG_DATA,0x43},
+    {SMART_CONFIG_DATA,0x04},
+    {SMART_CONFIG_DATA,0x0a},
+    {SMART_CONFIG_DATA,0x08},
+    {SMART_CONFIG_DATA,0x30},
+    {SMART_CONFIG_DATA,0x37},
+    {SMART_CONFIG_DATA,0x0f},
+
+    {SMART_CONFIG_CMD, 0xC0},   //Power Control 1
+    {SMART_CONFIG_DATA, 0x17}, //Vreg1out
+    {SMART_CONFIG_DATA, 0x15}, //Verg2out
+
+    {SMART_CONFIG_CMD, 0xC1},   //Power Control 2
+    {SMART_CONFIG_DATA, 0x41}, //VGH,VGL
+
+    {SMART_CONFIG_CMD, 0xC5},   //Power Control 3
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,0x12},
+    {SMART_CONFIG_DATA,0x80},
+
+    {SMART_CONFIG_CMD,0x36},        //MemoryAccess
+    {SMART_CONFIG_DATA,0xE8},       //[ÊúÆÁ]0x48 0x88    [ºáÆÁ]0x28 0xE8  0x68 //0x08
+
+    {SMART_CONFIG_CMD,0x3A},        //InterfacePixelFormat
+    {SMART_CONFIG_DATA,0x55},       //07 24bpp ,06 18bpp,05 16bpp
+
+
+    {SMART_CONFIG_CMD,0xB0},        //Interface Mode Control
+    {SMART_CONFIG_DATA,0x08},
+    {SMART_CONFIG_CMD,0xB1},        //Frame rate 60HZ
+    {SMART_CONFIG_DATA,0xA0},
+    {SMART_CONFIG_DATA,0x11},
+    {SMART_CONFIG_CMD,0xB4},
+    {SMART_CONFIG_DATA,0x02},
+    {SMART_CONFIG_CMD,0xB6},        //RGB/MCU Interface Control
+    {SMART_CONFIG_DATA,0x02},
+    {SMART_CONFIG_DATA,0x02},
+
+    {SMART_CONFIG_CMD,0xBE},
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,0x04},
+
+    {SMART_CONFIG_CMD,0xE9},
+    {SMART_CONFIG_DATA,0x00},
+
+    {SMART_CONFIG_CMD,0xF7},
+    {SMART_CONFIG_DATA,0xA9},
+    {SMART_CONFIG_DATA,0x51},
+    {SMART_CONFIG_DATA,0x2C},
+    {SMART_CONFIG_DATA,0x82},
+
+    {SMART_CONFIG_CMD,0x11},
+    {SMART_CONFIG_UDELAY, 120000},
+    {SMART_CONFIG_CMD,0x29},
+
+    //Set Window
+    {SMART_CONFIG_CMD,0x2A},        //Set X
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,(LCD_WIDTH - 1) >> 8},
+    {SMART_CONFIG_DATA,(LCD_WIDTH - 1) & 0xFF},
+
+    {SMART_CONFIG_CMD,0x2B},        //Set Y
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,0x00},
+    {SMART_CONFIG_DATA,(LCD_HEIGHT - 1) >> 8},
+    {SMART_CONFIG_DATA,(LCD_HEIGHT - 1) & 0xFF},
+
+
+//    {SMART_CONFIG_CMD, 0x2C}
+     {SMART_CONFIG_CMD,0x35},
+     {SMART_CONFIG_DATA,0x00}
+};
+
+struct slcd_configure _lcm_config =
+{
+    .rsply_cmd_high    = 0,
+    .csply_active_high = 0,
+    .newcfg_fmt_conv   = 1,
+
+    .width              = LCD_WIDTH,
+    .height             = LCD_HEIGHT,
+
+    .fmt                = RTGRAPHIC_PIXEL_FORMAT_RGB565,
+    .bpp                = 16,
+    .bus_width          = 8,
+    .reg_width          = 8,
+    .refresh            = 60,
+    .data_table         = &_lcm_data_table[0],
+    .data_table_num     = sizeof(_lcm_data_table)/sizeof(_lcm_data_table[0]),
+
+    .cmd_table          = &_lcm_cmd_table[0],
+    .cmd_table_num      = sizeof(_lcm_cmd_table)/sizeof(_lcm_cmd_table[0])
+};
+
+int rt_hw_ili9488_init(void)
+{
+    rt_thread_delay(rt_tick_from_millisecond(500));
+
+    /* Power ON */
+//    gpio_direction_output(GPIO_PORT_B,GPIO_Pin_16,1);   //RD = 1
+//    gpio_direction_output(GPIO_PORT_B,GPIO_Pin_18,1);   //CS = 1
+//
+//    gpio_set_value(LCD_RST_PORT, LCD_RST_PIN, 0);
+//    rt_thread_delay(rt_tick_from_millisecond(20));
+//    gpio_set_value(LCD_RST_PORT, LCD_RST_PIN, 1);
+//    rt_thread_delay(rt_tick_from_millisecond(500));
+//    gpio_set_value(GPIO_PORT_B, GPIO_Pin_18, 0);        //CS = 0
+
+    /* enable backlight */
+    gpio_direction_output(LCD_BL_PORT, LCD_BL_PIN,1);
+
+    /* init lcd & register lcd device */
+    rt_hw_slcd_init(&_lcm_config);
+
+    return 0;
+}
+INIT_DEVICE_EXPORT(rt_hw_ili9488_init);
+
+#endif

bsp/x1000/drivers/slcd/drv_slcdc.h

@@ -0,0 +1,168 @@
+/*
+ * File      : drv_slcdc.h
+ * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017Äê3ÔÂ21ÈÕ     Urey         the first version
+ */
+#ifndef _DRV_SLCDC_H_
+#define _DRV_SLCDC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+//#define CONFIG_SLCDC_CONTINUA
+#define SLCDC_USING_DUAL_BUFFER
+#define CONFIG_SLCDC_USE_TE
+
+#define FB_BASE            0x80200000
+
+#ifndef FB_PAGE_SIZE
+#  define FB_PAGE_SIZE    4096
+#endif
+
+/* SLCDC reg ops */
+#define slcd_reg_write(addr,config)      writel(config,addr)
+#define slcd_reg_read(addr)              readl(addr)
+
+
+struct slcdc_dma_descriptor
+{
+    uint32_t fdadr;       /* Frame descriptor address register */
+    uint32_t fsadr;       /* Frame source address register */
+    uint32_t fidr;        /* Frame ID register */
+    uint32_t ldcmd;       /* Command register */
+    uint32_t offsize;     /* Stride Offsize(in word) */
+    uint32_t page_width;  /* Stride Pagewidth(in word) */
+    uint32_t cmd_num;     /* Command Number(for SLCD) */
+    uint32_t desc_size;   /* Foreground Size */
+};
+
+/* smart lcd interface_type */
+enum smart_lcd_type {
+    SMART_LCD_TYPE_PARALLEL,
+    SMART_LCD_TYPE_SERIAL,
+};
+
+/* smart lcd command width */
+enum smart_lcd_cwidth {
+    SMART_LCD_CWIDTH_16_BIT_ONCE = (0 << 8),
+    SMART_LCD_CWIDTH_9_BIT_ONCE = SMART_LCD_CWIDTH_16_BIT_ONCE,
+    SMART_LCD_CWIDTH_8_BIT_ONCE = (0x1 << 8),
+    SMART_LCD_CWIDTH_18_BIT_ONCE = (0x2 << 8),
+    SMART_LCD_CWIDTH_24_BIT_ONCE = (0x3 << 8),
+};
+
+/* smart lcd data width */
+enum smart_lcd_dwidth {
+    SMART_LCD_DWIDTH_18_BIT_ONCE_PARALLEL_SERIAL = (0 << 10),
+    SMART_LCD_DWIDTH_16_BIT_ONCE_PARALLEL_SERIAL = (0x1 << 10),
+    SMART_LCD_DWIDTH_8_BIT_THIRD_TIME_PARALLEL = (0x2 << 10),
+    SMART_LCD_DWIDTH_8_BIT_TWICE_TIME_PARALLEL = (0x3 << 10),
+    SMART_LCD_DWIDTH_8_BIT_ONCE_PARALLEL_SERIAL = (0x4 << 10),
+    SMART_LCD_DWIDTH_24_BIT_ONCE_PARALLEL = (0x5 << 10),
+    SMART_LCD_DWIDTH_9_BIT_TWICE_TIME_PARALLEL = (0x7 << 10),
+    SMART_LCD_DWIDTH_MASK = (0x7 << 10),
+};
+
+/* smart lcd new data width */
+enum smart_lcd_new_dwidth {
+    SMART_LCD_NEW_DWIDTH_24_BIT = (4 << 13),
+    SMART_LCD_NEW_DWIDTH_18_BIT = (3 << 13),
+    SMART_LCD_NEW_DWIDTH_16_BIT = (2 << 13),
+    SMART_LCD_NEW_DWIDTH_9_BIT = (1 << 13),
+    SMART_LCD_NEW_DWIDTH_8_BIT = (0 << 13),
+};
+
+/* smart lcd data times */
+enum smart_lcd_new_dtimes {
+    SMART_LCD_NEW_DTIMES_ONCE = (0 << 8),
+    SMART_LCD_NEW_DTIMES_TWICE = (1 << 8),
+    SMART_LCD_NEW_DTIMES_THICE = (2 << 8),
+};
+
+
+/* smart lcd init code type */
+enum smart_config_type
+{
+    SMART_CONFIG_CMD    =  0,
+    SMART_CONFIG_DATA   =  1,
+    SMART_CONFIG_UDELAY =  2,
+};
+
+struct slcd_data_table
+{
+    enum smart_config_type type;
+    uint32_t value;
+};
+
+typedef void (*lcd_bl_func_t)(rt_bool_t isPowerON);
+
+struct slcd_configure;
+struct slcdc_dev_s
+{
+    struct rt_device parent;
+    struct rt_mutex lock;
+    struct slcd_configure *cfg;
+
+    struct slcdc_dma_descriptor *desc_tmp;
+    struct slcdc_dma_descriptor *desc_cmd;
+    struct slcdc_dma_descriptor *desc_dat;
+    struct slcdc_dma_descriptor *desc_self;
+
+    rt_uint32_t fb_base;
+    rt_uint32_t fb_cmd;
+    rt_uint32_t fb_screen;
+#ifdef SLCDC_USING_DUAL_BUFFER
+    rt_uint32_t fb_dual;
+#endif
+    rt_uint32_t fb_size;
+};
+
+struct slcd_configure
+{
+    unsigned pinmd :1;
+    unsigned pixclk_falling_edge :1;
+    unsigned data_enable_active_low :1;
+    unsigned clkply_active_rising:1;    /* smart lcd clock polarity:
+                                           0: Active edge is Falling,
+                                           1: Active edge is Rasing */
+    unsigned rsply_cmd_high:1;          /* smart lcd RS polarity.
+                                           0: Command_RS=0, Data_RS=1;
+                                           1: Command_RS=1, Data_RS=0 */
+    unsigned csply_active_high:1;       /* smart lcd CS Polarity.
+                                           0: Active level is low,
+                                           1: Active level is high */
+    unsigned newcfg_6800_md:1;
+    unsigned newcfg_fmt_conv:1;
+    unsigned newcfg_cmd_9bit:1;
+
+
+    rt_uint32_t width;
+    rt_uint32_t height;
+
+    rt_uint32_t fmt;
+    rt_uint32_t bpp;
+    rt_uint32_t bus_width;
+    rt_uint32_t reg_width;
+    rt_uint32_t refresh;
+
+    const struct slcd_data_table *data_table;
+    rt_uint32_t data_table_num;
+
+    const rt_uint32_t *cmd_table; /* write GRAM command */
+    rt_uint32_t cmd_table_num;
+};
+
+int     rt_hw_slcd_init          (struct slcd_configure *cfg);
+void    rt_hw_slcd_set_bl_func   (lcd_bl_func_t bl_func);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _DRV_SLCDC_H_ */

bsp/x1000/drivers/slcd/dump_slcd.c

@@ -0,0 +1,96 @@
+/*
+ * File      : dump_slcd.c
+ * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017Äê4ÔÂ11ÈÕ     Urey         the first version
+ */
+#include <rtthread.h>
+#include <finsh.h>
+#include <x1000.h>
+#include "x1000_slcdc.h"
+
+/* SLCDC reg ops */
+#define slcd_reg_write(addr,config)      writel(config,addr)
+#define slcd_reg_read(addr)              readl(addr)
+
+int dump_slcd_regs(void)
+{
+    int tmp;
+    rt_kprintf("$$$dump_lcd_reg\n");
+    rt_kprintf("LCDC_CFG:(0x%08x) \t0x%08x\n", LCDC_CFG,slcd_reg_read(LCDC_CFG));
+    rt_kprintf("LCDC_CTRL:(0x%08x)\t0x%08x\n",LCDC_CTRL,slcd_reg_read(LCDC_CTRL));
+    rt_kprintf("LCDC_STATE:(0x%08x)\t0x%08x\n",LCDC_STATE,slcd_reg_read(LCDC_STATE));
+    rt_kprintf("LCDC_OSDC:(0x%08x)\t0x%08x\n", LCDC_OSDC,slcd_reg_read(LCDC_OSDC));
+    rt_kprintf("LCDC_OSDCTRL:(0x%08x)\t0x%08x\n",LCDC_OSDCTRL,slcd_reg_read(LCDC_OSDCTRL));
+    rt_kprintf("LCDC_OSDS:(0x%08x)\t0x%08x\n",LCDC_OSDS,slcd_reg_read(LCDC_OSDS));
+    rt_kprintf("LCDC_BGC0:(0x%08x)\t0x%08x\n",LCDC_BGC0,slcd_reg_read(LCDC_BGC0));
+    rt_kprintf("LCDC_BGC1:(0x%08x)\t0x%08x\n",LCDC_BGC1,slcd_reg_read(LCDC_BGC1));
+    rt_kprintf("LCDC_KEY0:(0x%08x)\t0x%08x\n",LCDC_KEY0, slcd_reg_read(LCDC_KEY0));
+    rt_kprintf("LCDC_KEY1:(0x%08x)\t0x%08x\n",LCDC_KEY1, slcd_reg_read(LCDC_KEY1));
+    rt_kprintf("LCDC_ALPHA:(0x%08x)\t0x%08x\n",LCDC_ALPHA, slcd_reg_read(LCDC_ALPHA));
+    rt_kprintf("==================================\n");
+    tmp = slcd_reg_read(LCDC_VAT);
+    rt_kprintf("LCDC_VAT:(0x%08x) \t0x%08x, HT = %d, VT = %d\n",LCDC_VAT, tmp,
+           (tmp & LCDC_VAT_HT_MASK) >> LCDC_VAT_HT_BIT,
+           (tmp & LCDC_VAT_VT_MASK) >> LCDC_VAT_VT_BIT);
+    tmp = slcd_reg_read(LCDC_DAH);
+    rt_kprintf("LCDC_DAH:(0x%08x) \t0x%08x, HDS = %d, HDE = %d\n",LCDC_DAH, tmp,
+           (tmp & LCDC_DAH_HDS_MASK) >> LCDC_DAH_HDS_BIT,
+           (tmp & LCDC_DAH_HDE_MASK) >> LCDC_DAH_HDE_BIT);
+    tmp = slcd_reg_read(LCDC_DAV);
+    rt_kprintf("LCDC_DAV:(0x%08x) \t0x%08x, VDS = %d, VDE = %d\n",LCDC_DAV, tmp,
+           (tmp & LCDC_DAV_VDS_MASK) >> LCDC_DAV_VDS_BIT,
+           (tmp & LCDC_DAV_VDE_MASK) >> LCDC_DAV_VDE_BIT);
+    tmp = slcd_reg_read(LCDC_HSYNC);
+    rt_kprintf("LCDC_HSYNC:(0x%08x)\t0x%08x, HPS = %d, HPE = %d\n",LCDC_HSYNC, tmp,
+           (tmp & LCDC_HSYNC_HPS_MASK) >> LCDC_HSYNC_HPS_BIT,
+           (tmp & LCDC_HSYNC_HPE_MASK) >> LCDC_HSYNC_HPE_BIT);
+    tmp = slcd_reg_read(LCDC_VSYNC);
+    rt_kprintf("LCDC_VSYNC:(0x%08x)\t0x%08x, VPS = %d, VPE = %d\n", LCDC_VSYNC,tmp,
+           (tmp & LCDC_VSYNC_VPS_MASK) >> LCDC_VSYNC_VPS_BIT,
+           (tmp & LCDC_VSYNC_VPE_MASK) >> LCDC_VSYNC_VPE_BIT);
+    rt_kprintf("==================================\n");
+    rt_kprintf("LCDC_XYP0:(0x%08x)\t0x%08x\n",LCDC_XYP0, slcd_reg_read(LCDC_XYP0));
+    rt_kprintf("LCDC_XYP1:(0x%08x)\t0x%08x\n",LCDC_XYP1, slcd_reg_read(LCDC_XYP1));
+    rt_kprintf("LCDC_SIZE0:(0x%08x)\t0x%08x\n",LCDC_SIZE0, slcd_reg_read(LCDC_SIZE0));
+    rt_kprintf("LCDC_RGBC:(0x%08x) \t0x%08x\n",LCDC_RGBC, slcd_reg_read(LCDC_RGBC));
+    rt_kprintf("LCDC_PS:(0x%08x)  \t0x%08x\n",LCDC_PS, slcd_reg_read(LCDC_PS));
+    rt_kprintf("LCDC_CLS:(0x%08x) \t0x%08x\n", LCDC_CLS,slcd_reg_read(LCDC_CLS));
+    rt_kprintf("LCDC_SPL:(0x%08x) \t0x%08x\n",LCDC_SPL, slcd_reg_read(LCDC_SPL));
+    rt_kprintf("LCDC_REV:(0x%08x) \t0x%08x\n",LCDC_REV, slcd_reg_read(LCDC_REV));
+    rt_kprintf("LCDC_IID:(0x%08x) \t0x%08x\n",LCDC_IID, slcd_reg_read(LCDC_IID));
+    rt_kprintf("==================================\n");
+    rt_kprintf("LCDC_DA0:(0x%08x) \t0x%08x\n",LCDC_DA0, slcd_reg_read(LCDC_DA0));
+    rt_kprintf("LCDC_SA0:(0x%08x) \t0x%08x\n",LCDC_SA0, slcd_reg_read(LCDC_SA0));
+    rt_kprintf("LCDC_FID0:(0x%08x)\t0x%08x\n",LCDC_FID0, slcd_reg_read(LCDC_FID0));
+    rt_kprintf("LCDC_CMD0:(0x%08x)\t0x%08x\n",LCDC_CMD0, slcd_reg_read(LCDC_CMD0));
+    rt_kprintf("LCDC_OFFS0:(0x%08x)\t0x%08x\n",LCDC_OFFS0, slcd_reg_read(LCDC_OFFS0));
+    rt_kprintf("LCDC_PW0:(0x%08x) \t0x%08x\n", LCDC_PW0,slcd_reg_read(LCDC_PW0));
+    rt_kprintf("LCDC_CNUM0:(0x%08x)\t0x%08x\n",LCDC_CNUM0, slcd_reg_read(LCDC_CNUM0));
+    rt_kprintf("LCDC_DESSIZE0:(0x%08x)\t0x%08x\n",LCDC_DESSIZE0, slcd_reg_read(LCDC_DESSIZE0));
+    rt_kprintf("==================================\n");
+    rt_kprintf("LCDC_PCFG:(0x%08x)\t0x%08x\n", LCDC_PCFG,slcd_reg_read(LCDC_PCFG));
+    rt_kprintf("==================================\n");
+    rt_kprintf("SLCDC_CFG:(0x%08x) \t0x%08x\n", SLCDC_CFG,slcd_reg_read(SLCDC_CFG));
+    rt_kprintf("SLCDC_CTRL:(0x%08x) \t0x%08x\n", SLCDC_CTRL,slcd_reg_read(SLCDC_CTRL));
+    rt_kprintf("SLCDC_STATE:(0x%08x) \t0x%08x\n", SLCDC_STATE,slcd_reg_read(SLCDC_STATE));
+    rt_kprintf("SLCDC_DATA:(0x%08x)\t0x%08x\n", SLCDC_DATA,slcd_reg_read(SLCDC_DATA));
+    rt_kprintf("SLCDC_CFG_NEW:(0x%08x) \t0x%08x\n", SLCDC_CFG_NEW,slcd_reg_read(SLCDC_CFG_NEW));
+    rt_kprintf("SLCDC_WTIME:(0x%08x) \t0x%08x\n", SLCDC_WTIME,slcd_reg_read(SLCDC_WTIME));
+    rt_kprintf("SLCDC_TAS:(0x%08x) \t0x%08x\n", SLCDC_TAS,slcd_reg_read(SLCDC_TAS));
+    rt_kprintf("==================================\n");
+    rt_kprintf("reg:0x10000020 value=0x%08x  (24bit) Clock Gate Register0\n",
+           *(uint32_t *)0xb0000020);
+    rt_kprintf("reg:0x100000e4 value=0x%08x  (5bit_lcdc 21bit_lcdcs) Power Gate Register: \n",
+           *(uint32_t *)0xb00000e4);
+    rt_kprintf("reg:0x100000b8 value=0x%08x  (10bit) SRAM Power Control Register0 \n",
+           *(uint32_t *)0xb00000b8);
+    rt_kprintf("reg:0x10000064 value=0x%08x  Lcd pixclock \n",
+           *(uint32_t *)0xb0000064);
+
+    return 0;
+}
+MSH_CMD_EXPORT(dump_slcd_regs,dump_slcd_regs);
+

bsp/x1000/drivers/touch/SConscript

@@ -0,0 +1,22 @@
+from building import *
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd]
+
+ft_src  = Split("""
+focaltech_ts.c
+""")
+
+gt_src = Split("""
+gt9xx.c
+""")
+
+src = ()
+if GetDepend('RT_USING_FT6x06'):
+	src = ft_src
+if GetDepend('RT_USING_GT9XX'):
+	src = gt_src
+	
+group = DefineGroup('drv_touch', src, depend = ['RT_USING_TOUCH'], CPPPATH = CPPPATH)
+
+Return('group')

bsp/x1000/drivers/touch/focaltech_ts.h

@@ -0,0 +1,145 @@
+/*
+ * File      : focaltech_ts.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-01-01     Urey      first version
+ */
+#ifndef _FOCALTECH_TS_H_
+#define _FOCALTECH_TS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/* -- dirver configure -- */
+#define FTS_SLAVE_ADDR                      (0x70 >> 1)
+#define CFG_MAX_TOUCH_POINTS                10
+#define FTS_PRESS_MAX                       0xFF
+#define FTS_PRESS                           0x08
+#define FTS_NAME                            "FTS"
+#define FTS_INPUT_DEV_NAME                  "focal-touchscreen"
+#define FTS_MAX_ID                          0x0F
+#define FTS_TOUCH_STEP                      6
+#define FTS_TOUCH_X_H_POS                   3
+#define FTS_TOUCH_X_L_POS                   4
+#define FTS_TOUCH_Y_H_POS                   5
+#define FTS_TOUCH_Y_L_POS                   6
+#define FTS_TOUCH_XY_POS                    7
+#define FTS_TOUCH_MISC                      8
+#define FTS_TOUCH_EVENT_POS                 3
+#define FTS_TOUCH_ID_POS                    5
+#define FT_TOUCH_POINT_NUM                  2
+#define POINT_READ_BUF                      (3 + FTS_TOUCH_STEP * CFG_MAX_TOUCH_POINTS)
+
+/*register address*/
+#define FTS_REG_CHIP_ID                     0xA3    //chip ID
+#define FTS_REG_FW_VER                      0xA6
+#define FTS_REG_POINT_RATE                  0x88
+#define FTS_REG_THGROUP                     0x80
+#define FTS_REG_VENDOR_ID                   0xA8
+
+#define FTS_ENABLE_IRQ                      1
+#define FTS_DISABLE_IRQ                     0
+#define TPD_MAX_POINTS_2                    2
+#define TPD_MAX_POINTS_5                    5
+#define TPD_MAXPOINTS_10                    10
+#define AUTO_CLB_NEED                       1
+#define AUTO_CLB_NONEED                     0
+
+#define TOUCH_SWAP_XY           1
+#define TOUCH_SWAP_X            0
+#define TOUCH_SWAP_Y            1
+
+struct Upgrade_Info
+{
+    uint8_t  CHIP_ID;
+    uint8_t  FTS_NAME_INFO[20];
+    uint8_t  TPD_MAX_POINTS;
+    uint8_t  AUTO_CLB;
+    uint16_t delay_aa; /*delay of write FTS_UPGRADE_AA */
+    uint16_t delay_55; /*delay of write FTS_UPGRADE_55 */
+    uint8_t  upgrade_id_1; /*upgrade id 1 */
+    uint8_t  upgrade_id_2; /*upgrade id 2 */
+    uint16_t delay_readid; /*delay of read id */
+    uint16_t delay_earse_flash; /*delay of earse flash*/
+};
+
+/* The platform data for the Focaltech focaltech touchscreen driver */
+struct fts_platform_data
+{
+    uint32_t gpio_irq;                                                  /* IRQ port*/
+    uint32_t irq_cfg;
+    uint32_t gpio_wakeup;                                           /* Wakeup support*/
+    uint32_t wakeup_cfg;
+    uint32_t gpio_reset;                                                /* Reset support*/
+    uint32_t reset_cfg;
+    int screen_max_x;
+    int screen_max_y;
+    int pressure_max;
+};
+
+struct fts_event
+{
+    uint16_t au16_x[CFG_MAX_TOUCH_POINTS];                            /*x coordinate */
+    uint16_t au16_y[CFG_MAX_TOUCH_POINTS];                            /*y coordinate */
+    uint8_t  au8_touch_event[CFG_MAX_TOUCH_POINTS];                   /*touch event:0 -- down; 1-- contact; 2 -- contact */
+    uint8_t  au8_finger_id[CFG_MAX_TOUCH_POINTS];                     /*touch ID */
+    uint8_t  au8_finger_weight[CFG_MAX_TOUCH_POINTS];                 /*touch weight */
+    uint8_t  pressure[CFG_MAX_TOUCH_POINTS];
+    uint8_t  area[CFG_MAX_TOUCH_POINTS];
+    uint8_t  touch_point;
+    uint8_t  touch_point_num;
+};
+
+struct focal_i2c_platform_data
+{
+    uint16_t version;
+    int abs_x_min;
+    int abs_x_max;
+    int abs_y_min;
+    int abs_y_max;
+    int intr_gpio;
+    int rst_gpio;
+};
+
+struct fts_ts_data
+{
+    uint8_t  addr;
+    uint8_t  fw_ver;     //firmware version
+    uint32_t x_min,x_max;
+    uint32_t y_min,y_max;
+    uint32_t init_success;
+    struct fts_event event;
+
+    struct rt_i2c_bus_device *i2c_bus;
+    struct rt_semaphore     sem;
+    int touchs;
+};
+
+void fts_ts_interrupt_cb(struct fts_ts_data *fts_ts);
+int  fts_ts_probe(struct fts_ts_data *fts_ts,struct rt_i2c_bus_device *i2c_bus, const uint8_t addr);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _FOCALTECH_TS_H_ */

bsp/x1000/drivers/touch/gt9xx.h

@@ -0,0 +1,71 @@
+/*
+ * File      : gt9xx.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-01-01     Urey      first version
+ */
+#ifndef _GT9XX_H_
+#define _GT9XX_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtdevice.h>
+#include <rtthread.h>
+
+#define GT910_ADDR_BABBH
+//#define GT910_ADDR_2829H
+
+#ifdef GT910_ADDR_BABBH
+#define GT910_IIC_ADDR         0x14//0x14//0x5D//
+//#define GT910_IIC_RADDR         0x29
+//#define GT910_IIC_WADDR         0x28
+#else
+#define GT910_IIC_RADDR         0x29
+#define GT910_IIC_WADDR         0x28
+#endif
+
+extern uint16_t show_len;
+extern uint16_t total_len;
+extern uint8_t gtp_rawdiff_mode;
+
+extern int tpd_halt;
+extern int gtp_send_cfg(struct rt_i2c_bus_device *i2c);
+extern void gtp_reset_guitar(struct rt_i2c_bus_device *i2c, int ms);
+extern void gtp_int_sync(int ms);
+extern uint8_t gup_init_update_proc(struct rt_i2c_bus_device *i2c);
+extern uint8_t gup_init_fw_proc(struct rt_i2c_bus_device *i2c);
+
+extern int gtp_i2c_read(struct rt_i2c_bus_device *i2c, uint8_t *buf, int len);
+extern int gtp_i2c_write(struct rt_i2c_bus_device *i2c,uint8_t *buf,int len);
+extern int i2c_write_bytes(struct rt_i2c_bus_device *i2c, uint16_t addr, uint8_t *txbuf, int len);
+extern int i2c_read_bytes(struct rt_i2c_bus_device *i2c, uint16_t addr, uint8_t *rxbuf, int len);
+extern int i2c_read_dbl_check(struct rt_i2c_bus_device *i2c, uint16_t addr, uint8_t *rxbuf, int len);
+extern int gtp_i2c_read_dbl_check(struct rt_i2c_bus_device *i2c, uint16_t addr, uint8_t *rxbuf, int len);
+
+extern void mt65xx_eint_unmask(uint32_t line);
+extern void mt65xx_eint_mask(uint32_t line);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _GT9XX_H_ */

bsp/x1000/drivers/touch/gt9xx_firmware.h

@@ -0,0 +1,74 @@
+/*
+ * File      : gt9xx_firmware.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-01-01     Urey      first version
+ */
+#ifndef _GT9XX_FIRMWARE_H_
+#define _GT9XX_FIRMWARE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "gt9xx.h"
+
+#if GTP_HEADER_FW_UPDATE
+unsigned char gtp_default_FW[] =
+{
+    //TODO:Puts your update firmware data here!
+};
+#endif
+
+/*
+*[HW INFO]00900600
+*[PID]910
+*[VID]1010
+*[GENERATED]2013/08/27 20:59:13
+*/
+#if GTP_COMPATIBLE_MODE
+unsigned char gtp_default_FW_fl[] = {
+                0x50, 0x40, 0x01, 0xE0, 0x01, 0x05, 0x05, 0x00, 0x02, 0x2A, 0x28, 0x0F, 0x50,
+                0x41, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04,
+                0x00, 0x00, 0x00, 0x00, 0x86, 0x26, 0x08, 0x23, 0x20, 0x05,
+                0x0D, 0x00, 0x00, 0x00, 0x9A, 0x03, 0x2D, 0x00, 0x01, 0x00,
+                0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, 0x5A,
+                0x94, 0xC5, 0x02, 0x07, 0x00, 0x00, 0x04, 0x91, 0x1C, 0x00,
+                0x6F, 0x25, 0x00, 0x58, 0x2F, 0x00, 0x45, 0x3D, 0x00, 0x36,
+                0x4F, 0x00, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+                0x04, 0x06, 0x08, 0x0A, 0x0C, 0x0E, 0x10, 0xFF, 0xFF, 0xFF,
+                0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                0x02, 0x04, 0x06, 0x08, 0x0A, 0x1D, 0x1E, 0x1F, 0x20, 0x21,
+                0x22, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+                0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
+                0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+                0x00, 0xC3, 0x01 };
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _GT9XX_FIRMWARE_H_ */

bsp/x1000/drivers/usbd/SConscript

@@ -0,0 +1,11 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+CPPPATH = [cwd]
+
+group = DefineGroup('DriversUSBD', src, depend = ['RT_USING_USB_DEVICE'], CPPPATH = CPPPATH)
+
+Return('group')