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Merge remote-tracking branch 'remotes/origin/master' into add_error_check

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guozhanxin committed 2021-03-31 14:00:09 +08:00
2 parents f9be3c80e3 61be3180f5
commit d49cc64524
846 files changed
+25890 -240318
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.github/workflows/action.yml
-1
View File
@@ -123,7 +123,6 @@ jobs:
- {RTT_BSP: "swm320", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "swm320-lq100", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "zynq7000", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "zynqmp-r5-axu4ev", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "frdm-k64f", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "fh8620", RTT_TOOL_CHAIN: "sourcery-arm"}
Jenkinsfile
Vendored
-1
View File
@@ -107,7 +107,6 @@ pipeline {
['stm32f20x', 'sourcery-arm'],
['swm320-lq100', 'sourcery-arm'],
['beaglebone', 'sourcery-arm'],
['zynq7000', 'sourcery-arm'],
['frdm-k64f', 'sourcery-arm'],
['fh8620', 'sourcery-arm'],
['xplorer4330/M4', 'sourcery-arm'],
bsp/allwinner_tina/applications/main.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : main.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/drivers/board.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/drivers/board.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/drivers/drv_clock.c
+4 -18
View File
@@ -1,21 +1,7 @@
/*
* File : drv_clock.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -541,7 +527,7 @@ rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz)
*mmc_clk &= ~(0x1 << 31);
return RT_EOK;
}
if (hz <= 24000000)
{
pll = (0x0 << 24);
@@ -593,7 +579,7 @@ rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz)
oclk_dly = 1;
sclk_dly = 4;
}
*mmc_clk = (0x1 << 31) | pll | (sclk_dly << 20) | \
(n << 16) | (oclk_dly << 8) | (div - 1);
bsp/allwinner_tina/drivers/drv_clock.h
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : drv_clock.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -252,4 +238,4 @@ rt_err_t dram_gate_clk_enable(enum dram_gate dram_gate);
rt_err_t dram_gate_clk_disable(enum dram_gate dram_gate);
rt_err_t mmc_set_clk(enum mmc_clk_id clk_id, int hz);
#endif
#endif
bsp/allwinner_tina/drivers/drv_gpio.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : drv_gpio.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/drivers/drv_gpio.h
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : drv_gpio.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -241,4 +227,4 @@ void gpio_set_debounce(enum gpio_port port, rt_uint8_t prescaler);
void gpio_set_irq_callback(enum gpio_port port, enum gpio_pin pin, void (*irq_cb)(void *), void *irq_arg);
int rt_hw_gpio_init(void);
#endif /* __DRV_GPIO_H__ */
#endif /* __DRV_GPIO_H__ */
bsp/allwinner_tina/drivers/drv_sdio.c
+23 -37
View File
@@ -1,21 +1,7 @@
/*
* File : drv_sdio.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -34,10 +20,10 @@
#define DBG_TAG "MMC"
// #define DBG_LVL DBG_LOG
// #define DBG_LVL DBG_INFO
// #define DBG_LVL DBG_LOG
// #define DBG_LVL DBG_INFO
#define DBG_LVL DBG_WARNING
// #define DBG_LVL DBG_ERROR
// #define DBG_LVL DBG_ERROR
#include <rtdbg.h>
#ifdef RT_USING_SDIO
@@ -47,12 +33,12 @@
struct mmc_xfe_des
{
rt_uint32_t size; /* block size */
rt_uint32_t num; /* block num */
rt_uint8_t *buff; /* buff addr */
rt_uint32_t flag; /* write or read or stream */
#define MMC_DATA_WRITE (1 << 0)
#define MMC_DATA_READ (1 << 1)
#define MMC_DATA_STREAM (1 << 2)
rt_uint32_t num; /* block num */
rt_uint8_t *buff; /* buff addr */
rt_uint32_t flag; /* write or read or stream */
#define MMC_DATA_WRITE (1 << 0)
#define MMC_DATA_READ (1 << 1)
#define MMC_DATA_STREAM (1 << 2)
};
struct mmc_flag
@@ -71,7 +57,7 @@ struct sdio_drv
tina_mmc_t mmc_des;
rt_uint8_t *mmc_buf;
rt_uint8_t usedma;
};
#ifdef CONFIG_MMC_USE_DMA
@@ -136,7 +122,7 @@ static int mmc_update_clk(tina_mmc_t mmc)
mmc->risr_reg = mmc->risr_reg;
return RT_EOK;
}
static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
{
ALIGN(32) static struct mmc_des_v4p1 pdes[128]; // mast ALIGN(32)
@@ -145,7 +131,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
unsigned length = xfe->size * xfe->num;
unsigned buff_frag_num = length >> SDXC_DES_NUM_SHIFT;
unsigned remain = length & (SDXC_DES_BUFFER_MAX_LEN - 1);
if (remain)
{
buff_frag_num ++;
@@ -156,7 +142,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
}
memset(pdes, 0, sizeof(pdes));
mmu_clean_dcache((rt_uint32_t)(xfe->buff), length);
for (i = 0, des_idx = 0; i < buff_frag_num; i++, des_idx++)
for (i = 0, des_idx = 0; i < buff_frag_num; i++, des_idx++)
{
// memset((void*)&pdes[des_idx], 0, sizeof(struct mmc_v4p1));
pdes[des_idx].des_chain = 1;
@@ -182,8 +168,8 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
pdes[des_idx].last_des = 1;
pdes[des_idx].end_of_ring = 1;
pdes[des_idx].buf_addr_ptr2 = 0;
}
else
}
else
{
pdes[des_idx].buf_addr_ptr2 = (unsigned long)&pdes[des_idx+1];
}
@@ -217,7 +203,7 @@ static rt_err_t mmc_trans_data_by_dma(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
mmc->dmac_reg = (1 << 1) | (1 << 7); /* idma on */
rval = mmc->idie_reg & (~3);
if (xfe->flag == MMC_DATA_WRITE)
rval |= (1 << 0);
rval |= (1 << 0);
else
rval |= (1 << 1);
mmc->idie_reg = rval;
@@ -236,7 +222,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
if (xfe->flag == MMC_DATA_WRITE)
{
for (i = 0; i < (byte_cnt >> 2); i++)
for (i = 0; i < (byte_cnt >> 2); i++)
{
while(--timeout && (mmc->star_reg & (1 << 3)));
@@ -251,7 +237,7 @@ static rt_err_t mmc_trans_data_by_cpu(tina_mmc_t mmc, struct mmc_xfe_des *xfe)
}
else
{
for (i = 0; i < (byte_cnt >> 2); i++)
for (i = 0; i < (byte_cnt >> 2); i++)
{
while(--timeout && (mmc->star_reg & (1 << 2)));
@@ -290,7 +276,7 @@ static rt_err_t mmc_config_clock(tina_mmc_t mmc, int clk)
{
mmc_set_clk(SDMMC1, clk);
}
/* Re-enable card clock */
rval = mmc->ckcr_reg;
rval |= (0x1 << 16); //(3 << 16);
@@ -383,7 +369,7 @@ static int mmc_send_cmd(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *cmd)
cmdval |= (1 << 7);
if ((resp_type(cmd) != RESP_R3) && (resp_type(cmd) != RESP_R4))
cmdval |= (1 << 8);
if (data)
{
cmdval |= (1 << 9) | (1 << 13);
@@ -606,7 +592,7 @@ static void sdio_request_send(struct rt_mmcsd_host *host, struct rt_mmcsd_req *r
memset(&sdio->flag, 0, sizeof(struct mmc_flag));
mmc_send_cmd(host, req->cmd);
return;
}
bsp/allwinner_tina/drivers/drv_sdio.h
+5 -19
View File
@@ -1,21 +1,7 @@
/*
* File : drv_sdio.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -133,8 +119,8 @@ REG[31] : Load cmd
#define SDXC_UPDATE_CLOCK_CMD BIT(21)
#define SDXC_LOAD_CMD BIT(31)
/*
SD status reg
/*
SD status reg
REG[0] : FIFO_RX_LEVEL
REG[1] : FIFO_TX_LEVEL
REG[2] : FIFO_EMPTY
@@ -143,7 +129,7 @@ REG[4-7] : FSM_STA
REG[8] : CARD_PRESENT
REG[9] : CARD_BUSY
REG[10] : FSM_BUSY
REG[11-16]: RESP_IDX
REG[11-16]: RESP_IDX
REG[17-21]: FIFO_LEVEL
REG[31] : DMA_REQ
*/
bsp/allwinner_tina/drivers/drv_uart.c
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : drv_uart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -324,4 +310,4 @@ void uart_irq_handler(int irqno, void *param)
}
#endif
#endif
bsp/allwinner_tina/drivers/drv_uart.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : drv_uart.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/drivers/spi/drv_spi.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : drv_spi.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/drivers/spi/drv_spi.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : drv_spi.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/drivers/spi/drv_spi_flash.c
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : drv_spi_flash.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -65,4 +51,4 @@ INIT_PREV_EXPORT(rt_hw_spi_flash_with_sfud_init);
#endif
#endif
#endif
bsp/allwinner_tina/libcpu/cpu.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : cpu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/cpuport.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : cpuport.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/interrupt.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017-2021, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/interrupt.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017-2021, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/mmu.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : mmu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/mmu.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : mmu.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/rt_low_level_init.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : rt_low_level_init.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/stack.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : stack.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/allwinner_tina/libcpu/trap.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : trap.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/applications/main.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : main.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/adc.c
+9 -23
View File
@@ -1,21 +1,7 @@
/*
* File : adc.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -32,15 +18,15 @@
struct rt_messagequeue adcbat_mq;
#define BATTERY_GPIO 35 /* Battery */
#define BATTERY_ADC_PIN AM_HAL_PIN_35_ADCSE7
#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE7 /* BATTERY ADC采集通道 */
#define BATTERY_ADC_CHANNELNUM 7 /* BATTERY ADC采集通道号 */
#define BATTERY_ADC_PIN AM_HAL_PIN_35_ADCSE7
#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE7 /* BATTERY ADC采集通道 */
#define BATTERY_ADC_CHANNELNUM 7 /* BATTERY ADC采集通道号 */
#define ADC_CTIMER_NUM 3 /* ADC使用定时器 */
#define ADC_CTIMER_NUM 3 /* ADC使用定时器 */
#define ADC_CTIMER_COUNT (2048/512 - 1)
#define ADC_CHANNEL_NUM 1 /* ADC采集通道个数 */
#define ADC_SAMPLE_NUM 8 /* ADC采样个数 */
#define ADC_CHANNEL_NUM 1 /* ADC采集通道个数 */
#define ADC_SAMPLE_NUM 8 /* ADC采样个数 */
rt_uint8_t bat_adc_cnt = 0;
static rt_uint8_t am_adcbat_buffer_pool[256];
@@ -52,7 +38,7 @@ rt_uint8_t am_adc_data_get(rt_uint8_t channel, rt_int16_t *buff, rt_uint16_t siz
if (channel == BATTERY_ADC_CHANNELNUM)
{
/* wait adc message forever */
/* wait adc message forever */
rt_mq_recv(&adcbat_mq, adc_bufftemp, 32, RT_WAITING_FOREVER);
}
bsp/apollo2/board/adc.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : adc.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/board.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/board.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/flash.c
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : flash.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -77,7 +63,7 @@ static rt_err_t rt_flash_control(rt_device_t dev, int cmd, void *args)
ui32CurrentPage = AM_HAL_FLASH_ADDR2PAGE(erase->addrstart);
ui32CurrentBlock = AM_HAL_FLASH_ADDR2INST(erase->addrstart);
am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //µ¥ÉÈÇø²Á³ýÃüÁî
am_hal_flash_page_erase(AM_HAL_FLASH_PROGRAM_KEY, ui32CurrentBlock, ui32CurrentPage); //单扇区擦除命令
erase->addrstart += 8192;
}
}
bsp/apollo2/board/flash.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : flash.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/gpio.c
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : gpio.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -70,7 +56,7 @@ void am_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
else if (value == PIN_HIGH)
{
am_hal_gpio_out_bit_set(pin);
}
}
}
int am_pin_read(rt_device_t dev, rt_base_t pin)
bsp/apollo2/board/gpio.h
+3 -17
View File
@@ -1,27 +1,13 @@
/*
* File : gpio.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2017-09-16 Haley the first version
*/
#ifndef __GPIO_H
#define __GPIO_H
bsp/apollo2/board/i2c.c
+7 -21
View File
@@ -1,21 +1,7 @@
/*
* File :_i2c.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -133,7 +119,7 @@ static const struct rt_i2c_bus_device_ops am_i2c_ops =
};
#ifdef RT_USING_I2C0
static struct am_i2c_bus am_i2c_bus_0 =
static struct am_i2c_bus am_i2c_bus_0 =
{
{0},
AM_I2C0_IOM_INST
@@ -141,7 +127,7 @@ static struct am_i2c_bus am_i2c_bus_0 =
#endif
#ifdef RT_USING_I2C1
static struct am_i2c_bus am_i2c_bus_1 =
static struct am_i2c_bus am_i2c_bus_1 =
{
{1},
AM_I2C1_IOM_INST
@@ -149,7 +135,7 @@ static struct am_i2c_bus am_i2c_bus_1 =
#endif
#ifdef RT_USING_I2C2
static struct am_i2c_bus am_i2c_bus_2 =
static struct am_i2c_bus am_i2c_bus_2 =
{
{2},
AM_I2C2_IOM_INST
@@ -157,7 +143,7 @@ static struct am_i2c_bus am_i2c_bus_2 =
#endif
#ifdef RT_USING_I2C3
static struct am_i2c_bus am_i2c_bus_3 =
static struct am_i2c_bus am_i2c_bus_3 =
{
{3},
AM_I2C3_IOM_INST
@@ -165,7 +151,7 @@ static struct am_i2c_bus am_i2c_bus_3 =
#endif
#ifdef RT_USING_I2C4
static struct am_i2c_bus am_i2c_bus_4 =
static struct am_i2c_bus am_i2c_bus_4 =
{
{4},
AM_I2C4_IOM_INST
bsp/apollo2/board/i2c.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : i2c.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/led.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File :_led.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/led.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : led.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/pdm.c
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File :_pdm.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -66,7 +52,7 @@ rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size)
{
rt_uint8_t pdm_rbufftemp[340];
/* wait pdm message forever */
/* wait pdm message forever */
rt_mq_recv(&pdm_mq, pdm_rbufftemp, 340, RT_WAITING_FOREVER);
/* copy the data */
bsp/apollo2/board/pdm.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : pdm.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/pwm.c
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File :_pwm.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/pwm.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : pwm.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/rtc.c
+9 -23
View File
@@ -1,21 +1,7 @@
/*
* File :_rtc.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -116,7 +102,7 @@ int rt_hw_rtc_init(void)
/* Select LFRC for RTC clock source */
am_hal_rtc_osc_select(AM_HAL_RTC_OSC_LFRC);
#endif
#if RTC_CLK_SRC == XT
/* Enable the XT for the RTC */
am_hal_clkgen_osc_start(AM_HAL_CLKGEN_OSC_XT);
@@ -129,12 +115,12 @@ int rt_hw_rtc_init(void)
am_hal_rtc_osc_enable();
/* register rtc device */
rtc.type = RT_Device_Class_RTC;
rtc.init = RT_NULL;
rtc.open = rt_rtc_open;
rtc.close = RT_NULL;
rtc.read = rt_rtc_read;
rtc.write = RT_NULL;
rtc.type = RT_Device_Class_RTC;
rtc.init = RT_NULL;
rtc.open = rt_rtc_open;
rtc.close = RT_NULL;
rtc.read = rt_rtc_read;
rtc.write = RT_NULL;
rtc.control = rt_rtc_control;
/* no private */
bsp/apollo2/board/rtc.h
+3 -17
View File
@@ -1,27 +1,13 @@
/*
* File : rtc.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2017-09-14 Haley the first version
*/
#ifndef __RTC_H
#define __RTC_H
bsp/apollo2/board/smbus.c
+7 -21
View File
@@ -1,21 +1,7 @@
/*
* File : smbus.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -42,8 +28,8 @@
#define mSDA_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SDA, AM_HAL_GPIO_OUTPUT) /* Set SDA as Output */
#define mSCL_OUT() am_hal_gpio_pin_config(SMBUS_GPIO_SCL, AM_HAL_GPIO_OUTPUT) /* Set SCL as Output */
#define ACK 0
#define NACK 1
#define ACK 0
#define NACK 1
/* SCL keep time */
static void keep_delay(void)
@@ -60,7 +46,7 @@ static void few_delay(void)
}
static rt_uint8_t am_smbus_send_bit(rt_uint8_t send_bit)
{
{
mSDA_OUT();
few_delay();
@@ -128,7 +114,7 @@ static void am_smbus_stop_bit(void)
static rt_uint8_t am_smbus_tx_byte(rt_uint8_t tx_byte)
{
int i;
int i;
rt_uint8_t ack_bit;
rt_uint8_t bit_out;
@@ -176,7 +162,7 @@ rt_uint8_t am_smbus_tx_then_tx(rt_uint8_t SlaveAddress, rt_uint8_t command, rt_u
int i;
am_smbus_start_bit(); /* Start condition */
if(am_smbus_tx_byte(SlaveAddress)) /* Send SlaveAddress and write */
return 1;
bsp/apollo2/board/smbus.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : smbus.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/apollo2/board/spi.c
+6 -20
View File
@@ -1,21 +1,7 @@
/*
* File : spi.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -180,7 +166,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes
am_hal_gpio_out_bit_clear(am_spi_cs->chip_select);
}
// ¶ÁÊý¾Ý
// 读数据
if (recv_ptr != RT_NULL)
{
while (u32BytesRemaining)
@@ -213,7 +199,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes
}
}
// дÊý¾Ý
// 写数据
else
{
while (u32BytesRemaining)
@@ -225,7 +211,7 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message* mes
u32TransferSize = 64;
am_hal_iom_spi_write(am_spi_bus->u32Module, am_spi_cs->chip_select,
(uint32_t *)send_ptr, u32TransferSize, AM_HAL_IOM_RAW);
}
else
{
@@ -257,7 +243,7 @@ static const struct rt_spi_ops am_spi_ops =
};
#ifdef RT_USING_SPI0
static struct am_spi_bus am_spi_bus_0 =
static struct am_spi_bus am_spi_bus_0 =
{
{0},
AM_SPI0_IOM_INST
bsp/apollo2/board/spi.h
+3 -17
View File
@@ -1,21 +1,7 @@
/*
* File : spi.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -27,7 +13,7 @@
#include <rtthread.h>
/* ƬѡÐźŽṹÉùÃ÷ */
/* 片选信号结构声明 */
struct am_spi_cs
{
rt_uint32_t chip_select;
bsp/apollo2/board/uart.c
+5 -19
View File
@@ -1,21 +1,7 @@
/*
* File : uart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
@@ -164,11 +150,11 @@ static rt_err_t am_configure(struct rt_serial_device *serial, struct serial_conf
else if (cfg->stop_bits == STOP_BITS_2)
uart_cfg.bTwoStopBits = true;
if (cfg->parity == PARITY_NONE)
if (cfg->parity == PARITY_NONE)
uart_cfg.ui32Parity = AM_HAL_UART_PARITY_NONE;
else if (cfg->parity == PARITY_ODD)
else if (cfg->parity == PARITY_ODD)
uart_cfg.ui32Parity = AM_HAL_UART_PARITY_ODD;
else if (cfg->parity == PARITY_EVEN)
else if (cfg->parity == PARITY_EVEN)
uart_cfg.ui32Parity = AM_HAL_UART_PARITY_EVEN;
uart_cfg.ui32FlowCtrl = AM_HAL_UART_FLOW_CTRL_NONE;
bsp/apollo2/board/uart.h
+2 -16
View File
@@ -1,21 +1,7 @@
/*
* File : uart.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
bsp/at32/Libraries/rt_drivers/drv_adc.c
+11 -11
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -17,7 +17,7 @@
#include <drv_log.h>
struct at32_adc
{
{
struct rt_adc_device at32_adc_device;
ADC_Type *ADC_Handler;
char *name;
@@ -109,9 +109,9 @@ static rt_err_t at32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann
ADC_InitType ADC_InitStructure;
RT_ASSERT(device != RT_NULL);
at32_adc_handler = device->parent.user_data;
at32_msp_adc_init(at32_adc_handler);
/* ADCx configuration ------------------------------------------------------*/
ADC_StructInit(&ADC_InitStructure);
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
@@ -121,14 +121,14 @@ static rt_err_t at32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NumOfChannel = 1;
ADC_Init(at32_adc_handler, &ADC_InitStructure);
/* ADCx regular channels configuration */
ADC_RegularChannelConfig(at32_adc_handler, at32_adc_get_channel(channel), 1, ADC_SampleTime_28_5);
/* ADCx regular channels configuration */
ADC_RegularChannelConfig(at32_adc_handler, at32_adc_get_channel(channel), 1, ADC_SampleTime_28_5);
/* Enable ADCx */
ADC_Ctrl(at32_adc_handler, ENABLE);
/* Enable ADCx reset calibration register */
/* Enable ADCx reset calibration register */
ADC_RstCalibration(at32_adc_handler);
/* Check the end of ADCx reset calibration register */
while(ADC_GetResetCalibrationStatus(at32_adc_handler));
@@ -161,7 +161,7 @@ static rt_err_t at32_get_adc_value(struct rt_adc_device *device, rt_uint32_t cha
at32_adc_handler = device->parent.user_data;
/* Start ADCx Software Conversion */
/* Start ADCx Software Conversion */
ADC_SoftwareStartConvCtrl(at32_adc_handler, ENABLE);
/* Wait for the ADC to convert */
bsp/at32/Libraries/rt_drivers/drv_adc.h
+10 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -19,32 +19,32 @@ extern "C" {
#endif
#if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3)
#ifndef ADC1_CONFIG
#define ADC1_CONFIG \
{ \
.ADC_Handler = ADC1, \
.name = "adc1", \
}
}
#endif /* ADC1_CONFIG */
#ifndef ADC2_CONFIG
#define ADC2_CONFIG \
{ \
.ADC_Handler = ADC2, \
.name = "adc2", \
}
}
#endif /* ADC2_CONFIG */
#ifndef ADC3_CONFIG
#define ADC3_CONFIG \
{ \
.ADC_Handler = ADC3, \
.name = "adc3", \
}
#endif /* ADC3_CONFIG */
#endif
}
#endif /* ADC3_CONFIG */
#endif
#ifdef __cplusplus
bsp/at32/Libraries/rt_drivers/drv_can.c
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -311,8 +311,8 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
{
can_instance->CanConfig.FilterConfig.CAN_FilterNumber = filter_cfg->items[i].hdr & (0x1fU);
can_instance->CanConfig.FilterConfig.CAN_FilterIdHigh = (filter_cfg->items[i].id >> 13) & 0xFFFF;
can_instance->CanConfig.FilterConfig.CAN_FilterIdLow = ((filter_cfg->items[i].id << 3) |
(filter_cfg->items[i].ide << 2) |
can_instance->CanConfig.FilterConfig.CAN_FilterIdLow = ((filter_cfg->items[i].id << 3) |
(filter_cfg->items[i].ide << 2) |
(filter_cfg->items[i].rtr << 1)) & 0xFFFF;
can_instance->CanConfig.FilterConfig.CAN_FilterMskIdHigh = (filter_cfg->items[i].mask >> 16) & 0xFFFF;
can_instance->CanConfig.FilterConfig.CAN_FilterMskIdLow = filter_cfg->items[i].mask & 0xFFFF;
@@ -499,7 +499,7 @@ static int _can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t fifo)
else
pmsg->ide = RxMessage.ExtId;
pmsg->rtr = RxMessage.RTR;
return RT_EOK;
}
bsp/at32/Libraries/rt_drivers/drv_can.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -22,7 +22,7 @@ extern "C" {
#define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */
#define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */
#define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */
struct at32_baud_rate_tab
{
rt_uint32_t baud_rate;
bsp/at32/Libraries/rt_drivers/drv_eth.c
+32 -32
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,8 +28,8 @@
//#define DRV_DEBUG
#define LOG_TAG "drv.emac"
#define ETH_RXBUFNB 4
#define ETH_TXBUFNB 2
#define ETH_RXBUFNB 4
#define ETH_TXBUFNB 2
#define LINK_THREAD_STACK_SIZE 256
#define LINK_THREAD_PREORITY 21
@@ -131,14 +131,14 @@ void NVIC_Configuration(void)
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
/* 2 bit for pre-emption priority, 2 bits for subpriority */
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
/* Enable the Ethernet global Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_Init(&NVIC_InitStructure);
}
/**
@@ -173,7 +173,7 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/*MII Mode GPIO configuration*/
/*MII Mode GPIO configuration*/
#ifdef MII_MODE
/**********************MII Tx Pin Define****************************/
/*
@@ -193,7 +193,7 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/**********************MII Rx Pin Define****************************/
/**********************MII Rx Pin Define****************************/
#if MII_RX_REMAP /*IO PIN remaped*/
/*
ETH_MII_RX_DV-->PD8
@@ -208,7 +208,7 @@ void GPIO_Configuration(void)
*/
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_3;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
@@ -233,11 +233,11 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10;
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOB, &GPIO_InitStructure);
@@ -255,8 +255,8 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/**********************RMII Rx Pin Define****************************/
/**********************RMII Rx Pin Define****************************/
#if MII_RX_REMAP /*IO PIN remaped*/
/*
ETH_RMII_RX_DV-->PD8
@@ -266,7 +266,7 @@ void GPIO_Configuration(void)
*/
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
@@ -282,7 +282,7 @@ void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOC, &GPIO_InitStructure);
@@ -314,7 +314,7 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev)
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_ETHMAC | RCC_AHBPERIPH_ETHMACTX |
RCC_AHBPERIPH_ETHMACRX, ENABLE);
/* MII/RMII Media interface selection ------------------------------------------*/
#ifdef MII_MODE /* Mode MII with AT32F407-EVAL */
GPIO_ETH_MediaInterfaceConfig(GPIO_ETH_MediaInterface_MII);
@@ -361,31 +361,31 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev)
ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
#endif
/*------------------------ DMA -----------------------------------*/
/*------------------------ DMA -----------------------------------*/
/* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
/* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable;
ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;//ETH_DropTCPIPChecksumErrorFrame_Enable;
ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
/* Configure Ethernet, check error */
if(ETH_Init(&ETH_InitStructure, PHY_ADDRESS) == ((uint32_t)0)) {
return RT_ERROR;
}
}
/* Enable DMA Receive interrupt (need to enable in this case Normal interrupt) */
ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE);
ETH_DMAITConfig(ETH_DMA_INT_NIS | ETH_DMA_INT_R, ENABLE);
/* Initialize Tx Descriptors list: Chain Mode */
ETH_DMATxDescChainInit(DMATxDscrTab, &Tx_Buff[0][0], ETH_TXBUFNB);
@@ -396,7 +396,7 @@ static rt_err_t rt_at32_eth_init(rt_device_t dev)
ETH_MACAddressConfig(ETH_MAC_Address0, (u8*)&at32_eth_device.dev_addr[0]);
/* Enable ETH transmition and recetion */
ETH_Start();
ETH_Start();
return RT_EOK;
}
@@ -581,7 +581,7 @@ struct pbuf *rt_at32_eth_rx(rt_device_t dev)
{
rt_uint32_t i;
rt_uint8_t *ptr = (rt_uint8_t*)(DMARxDescToGet->Buffer1Addr);
AT32_ETH_PRINTF("rx_dump, len:%d\r\n", p->tot_len);
for(i=0; i<p->tot_len; i++)
{
bsp/at32/Libraries/rt_drivers/drv_eth.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_flash.c
+6 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -160,14 +160,14 @@ int at32_flash_erase(rt_uint32_t addr, size_t size)
addr += FLASH_PAGE_SIZE;
}
FLASH_Lock();
__exit:
FLASH_Lock();
__exit:
if(result != RT_EOK)
{
return result;
}
return size;
}
@@ -177,7 +177,7 @@ static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase(long offset, size_t size);
const struct fal_flash_dev at32_onchip_flash =
const struct fal_flash_dev at32_onchip_flash =
{
"onchip_flash",
AT32_FLASH_START_ADRESS,
bsp/at32/Libraries/rt_drivers/drv_flash.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_gpio.c
+7 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -13,7 +13,7 @@
#ifdef RT_USING_PIN
static const struct pin_index pins[] =
static const struct pin_index pins[] =
{
#if defined(GPIOA)
__AT32_PIN(0 , A, 0 ),
@@ -414,7 +414,7 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
/* Configure GPIO_InitStructure */
GPIO_StructInit(&GPIO_InitStruct);
EXTI_StructInit(&EXTI_InitStruct);
GPIO_InitStruct.GPIO_Pins = irqmap->pinbit;
GPIO_InitStruct.GPIO_Pins = irqmap->pinbit;
GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
EXTI_InitStruct.EXTI_Line = irqmap->pinbit;
EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
@@ -462,24 +462,24 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
if (( irqmap->pinbit>=GPIO_Pins_5 )&&( irqmap->pinbit<=GPIO_Pins_9 ))
{
if(!(pin_irq_enable_mask&(GPIO_Pins_5|GPIO_Pins_6|GPIO_Pins_7|GPIO_Pins_8|GPIO_Pins_9)))
{
{
NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
}
}
else if (( irqmap->pinbit>=GPIO_Pins_10 )&&( irqmap->pinbit<=GPIO_Pins_15 ))
{
if(!(pin_irq_enable_mask&(GPIO_Pins_10|GPIO_Pins_11|GPIO_Pins_12|GPIO_Pins_13|GPIO_Pins_14|GPIO_Pins_15)))
{
{
NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
}
}
else
{
NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
}
}
NVIC_Init(&NVIC_InitStruct);
rt_hw_interrupt_enable(level);
rt_hw_interrupt_enable(level);
}
else
{
bsp/at32/Libraries/rt_drivers/drv_gpio.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_hwtimer.c
+57 -57
View File
File diff suppressed because it is too large. Load diff
bsp/at32/Libraries/rt_drivers/drv_hwtimer.h
+12 -12
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -26,7 +26,7 @@ extern "C" {
.maxcnt = 0xFFFF, \
.cntmode = HWTIMER_CNTMODE_UP, \
}
#endif /* TIM_DEV_INFO_CONFIG */
#endif /* TIM_DEV_INFO_CONFIG */
#ifdef BSP_USING_HWTMR2
#ifndef TMR2_CONFIG
@@ -36,9 +36,9 @@ extern "C" {
.tim_irqn = TMR2_GLOBAL_IRQn, \
.name = "timer2", \
}
#endif /* TMR2_CONFIG */
#endif /* BSP_USING_HWTMR2 */
#endif /* TMR2_CONFIG */
#endif /* BSP_USING_HWTMR2 */
#ifdef BSP_USING_HWTMR3
#ifndef TMR3_CONFIG
#define TMR3_CONFIG \
@@ -47,8 +47,8 @@ extern "C" {
.tim_irqn = TMR3_GLOBAL_IRQn, \
.name = "timer3", \
}
#endif /* TMR3_CONFIG */
#endif /* BSP_USING_HWTMR3 */
#endif /* TMR3_CONFIG */
#endif /* BSP_USING_HWTMR3 */
#ifdef BSP_USING_HWTMR4
#ifndef TMR4_CONFIG
@@ -58,9 +58,9 @@ extern "C" {
.tim_irqn = TMR4_GLOBAL_IRQn, \
.name = "timer4", \
}
#endif /* TMR4_CONFIG */
#endif /* TMR4_CONFIG */
#endif /* BSP_USING_HWTMR4 */
#ifdef BSP_USING_HWTMR5
#ifndef TMR5_CONFIG
#define TMR5_CONFIG \
@@ -69,9 +69,9 @@ extern "C" {
.tim_irqn = TMR5_GLOBAL_IRQn, \
.name = "timer5", \
}
#endif /* TMR5_CONFIG */
#endif /* BSP_USING_HWTMR5 */
#endif /* TMR5_CONFIG */
#endif /* BSP_USING_HWTMR5 */
#ifdef __cplusplus
}
#endif
bsp/at32/Libraries/rt_drivers/drv_log.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_pwm.c
+26 -26
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -37,52 +37,52 @@ struct at32_pwm
char *name;
};
static struct at32_pwm at32_pwm_obj[] =
static struct at32_pwm at32_pwm_obj[] =
{
#ifdef BSP_USING_TMR1_CH1
PWM1_CONFIG,
#endif
#ifdef BSP_USING_TMR1_CH2
PWM2_CONFIG,
#endif
#ifdef BSP_USING_TMR1_CH3
PWM3_CONFIG,
#endif
#ifdef BSP_USING_TMR1_CH4
PWM4_CONFIG,
#endif
#ifdef BSP_USING_TMR2_CH1
PWM5_CONFIG,
#endif
#ifdef BSP_USING_TMR2_CH2
PWM6_CONFIG,
#endif
#ifdef BSP_USING_TMR2_CH3
PWM7_CONFIG,
#endif
#ifdef BSP_USING_TMR2_CH4
PWM8_CONFIG,
#endif
#ifdef BSP_USING_TMR3_CH1
PWM9_CONFIG,
#endif
#ifdef BSP_USING_TMR3_CH2
PWM10_CONFIG,
#endif
#ifdef BSP_USING_TMR3_CH3
PWM11_CONFIG,
#endif
#ifdef BSP_USING_TMR3_CH4
PWM12_CONFIG,
#endif
@@ -97,7 +97,7 @@ static struct rt_pwm_ops drv_ops =
static rt_err_t drv_pwm_enable(TMR_Type* TMRx, struct rt_pwm_configuration *configuration, rt_bool_t enable)
{
/* Get the value of channel */
rt_uint32_t channel = configuration->channel;
rt_uint32_t channel = configuration->channel;
if (!enable)
{
@@ -137,7 +137,7 @@ static rt_err_t drv_pwm_enable(TMR_Type* TMRx, struct rt_pwm_configuration *conf
TMR_CCxCmd(TMRx, TMR_Channel_1, TMR_CCx_Enable);
}
}
/* TMRx enable counter */
TMR_Cmd(TMRx, ENABLE);
@@ -173,7 +173,7 @@ static rt_err_t drv_pwm_get(TMR_Type* TMRx, struct rt_pwm_configuration *configu
configuration->pulse = (cc3 + 1) * (div + 1) * 1000UL / tim_clock;
if(channel == 4)
configuration->pulse = (cc4 + 1) * (div + 1) * 1000UL / tim_clock;
return RT_EOK;
}
@@ -185,15 +185,15 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu
rt_uint64_t psc;
/* Get the channel number */
rt_uint32_t channel = configuration->channel;
/* Init timer pin and enable clock */
at32_msp_tmr_init(TMRx);
/* Convert nanosecond to frequency and duty cycle. */
period = (unsigned long long)configuration->period ;
psc = period / MAX_PERIOD + 1;
period = period / psc;
/* TMRe base configuration */
TMR_TimeBaseStructInit(&TMR_TMReBaseStructure);
TMR_TMReBaseStructure.TMR_Period = period;
@@ -204,14 +204,14 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu
TMR_TimeBaseInit(TMRx, &TMR_TMReBaseStructure);
pulse = (unsigned long long)configuration->pulse;
/* PWM1 Mode configuration: Channel1 */
TMR_OCStructInit(&TMR_OCInitStructure);
TMR_OCInitStructure.TMR_OCMode = TMR_OCMode_PWM1;
TMR_OCInitStructure.TMR_OutputState = TMR_OutputState_Enable;
TMR_OCInitStructure.TMR_Pulse = pulse;
TMR_OCInitStructure.TMR_OCPolarity = TMR_OCPolarity_High;
if(channel == 1)
{
TMR_OC1Init(TMRx, &TMR_OCInitStructure);
@@ -232,7 +232,7 @@ static rt_err_t drv_pwm_set(TMR_Type* TMRx, struct rt_pwm_configuration *configu
TMR_OC4Init(TMRx, &TMR_OCInitStructure);
TMR_OC4PreloadConfig(TMRx, TMR_OCPreload_Enable);
}
TMR_ARPreloadConfig(TMRx, ENABLE);
#if defined (SOC_SERIES_AT32F415)
@@ -271,7 +271,7 @@ static int rt_hw_pwm_init(void)
{
int i = 0;
int result = RT_EOK;
for(i = 0; i < sizeof(at32_pwm_obj) / sizeof(at32_pwm_obj[0]); i++)
{
if(rt_device_pwm_register(&at32_pwm_obj[i].pwm_device, at32_pwm_obj[i].name, &drv_ops, at32_pwm_obj[i].tim_handle) == RT_EOK)
@@ -280,9 +280,9 @@ static int rt_hw_pwm_init(void)
}
else
{
LOG_D("%s register failed", at32_pwm_obj[i].name);
result = -RT_ERROR;
}
LOG_D("%s register failed", at32_pwm_obj[i].name);
result = -RT_ERROR;
}
}
return result;
bsp/at32/Libraries/rt_drivers/drv_pwm.h
+8 -8
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -28,7 +28,7 @@ extern "C" {
}
#endif /* PWM1_CONFIG */
#endif /* BSP_USING_TMR1_CH1 */
#ifdef BSP_USING_TMR1_CH2
#ifndef PWM2_CONFIG
#define PWM2_CONFIG \
@@ -72,7 +72,7 @@ extern "C" {
}
#endif /* PWM5_CONFIG */
#endif /* BSP_USING_TMR2_CH1 */
#ifdef BSP_USING_TMR2_CH2
#ifndef PWM6_CONFIG
#define PWM6_CONFIG \
@@ -82,8 +82,8 @@ extern "C" {
.channel = 2 \
}
#endif /* PWM6_CONFIG */
#endif /* BSP_USING_TMR2_CH2 */
#endif /* BSP_USING_TMR2_CH2 */
#ifdef BSP_USING_TMR2_CH3
#ifndef PWM7_CONFIG
#define PWM7_CONFIG \
@@ -93,7 +93,7 @@ extern "C" {
.channel = 3 \
}
#endif /* PWM7_CONFIG */
#endif /* BSP_USING_TMR2_CH3 */
#endif /* BSP_USING_TMR2_CH3 */
#ifdef BSP_USING_TMR2_CH4
#ifndef PWM8_CONFIG
@@ -115,7 +115,7 @@ extern "C" {
.channel = 1 \
}
#endif /* PWM9_CONFIG */
#endif /* BSP_USING_TMR3_CH1 */
#endif /* BSP_USING_TMR3_CH1 */
#ifdef BSP_USING_TMR3_CH2
#ifndef PWM10_CONFIG
@@ -149,7 +149,7 @@ extern "C" {
}
#endif /* PWM12_CONFIG */
#endif /* BSP_USING_TMR3_CH4 */
#ifdef __cplusplus
}
#endif
bsp/at32/Libraries/rt_drivers/drv_rtc.c
+7 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -79,10 +79,10 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
return -RT_ERROR;
}
#else
/* Set the RTC counter value */
RTC_SetCounter(time_stamp);
/* Wait until last write operation on RTC registers has finished */
RTC_WaitForLastTask();
/* Set the RTC counter value */
RTC_SetCounter(time_stamp);
/* Wait until last write operation on RTC registers has finished */
RTC_WaitForLastTask();
#endif /* SOC_SERIES_AT32F415 */
LOG_D("set rtc time.");
#ifdef SOC_SERIES_AT32F415
@@ -117,7 +117,7 @@ static rt_err_t rt_rtc_config(struct rt_device *dev)
ERTC_InitType ERTC_InitStructure;
#endif
/* Allow access to BKP Domain */
PWR_BackupAccessCtrl(ENABLE);
PWR_BackupAccessCtrl(ENABLE);
#ifdef SOC_SERIES_AT32F415
#ifdef BSP_RTC_USING_LSI
@@ -148,7 +148,7 @@ static rt_err_t rt_rtc_config(struct rt_device *dev)
#else
if (BKP_ReadBackupReg(BKP_DT1) != BKUP_REG_DATA)
#endif
{
{
LOG_I("RTC hasn't been configured, please use <date> command to config.");
#ifdef SOC_SERIES_AT32F415
/* Configure the ERTC data register and ERTC prescaler */
bsp/at32/Libraries/rt_drivers/drv_sdio.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_sdio.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_soft_i2c.c
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -205,10 +205,10 @@ int rt_hw_i2c_init(void)
result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c_bus, soft_i2c_config[i].bus_name);
RT_ASSERT(result == RT_EOK);
at32_i2c_bus_unlock(&soft_i2c_config[i]);
LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
soft_i2c_config[i].bus_name,
soft_i2c_config[i].scl,
soft_i2c_config[i].bus_name,
soft_i2c_config[i].scl,
soft_i2c_config[i].sda);
}
bsp/at32/Libraries/rt_drivers/drv_soft_i2c.h
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -37,7 +37,7 @@ struct at32_i2c
.bus_name = "i2c1", \
}
#endif
#ifdef BSP_USING_I2C2
#define i2c_bus_CONFIG \
{ \
@@ -46,7 +46,7 @@ struct at32_i2c
.bus_name = "i2c2", \
}
#endif
#ifdef BSP_USING_I2C3
#define I2C3_BUS_CONFIG \
{ \
@@ -55,7 +55,7 @@ struct at32_i2c
.bus_name = "i2c3", \
}
#endif
#ifdef BSP_USING_I2C4
#define I2C4_BUS_CONFIG \
{ \
bsp/at32/Libraries/rt_drivers/drv_spi.c
+20 -20
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -7,7 +7,7 @@
* Date Author Notes
* 2020-01-09 shelton first version
*/
#include <board.h>
#include "drv_spi.h"
@@ -24,7 +24,7 @@
#ifdef DEBUG
#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
#else
#define DEBUG_PRINTF(...)
#define DEBUG_PRINTF(...)
#endif
/* private rt-thread spi ops function */
@@ -81,13 +81,13 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name,
static rt_err_t configure(struct rt_spi_device* device,
struct rt_spi_configuration* configuration)
{
struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
struct at32_spi *spi_instance = (struct at32_spi *)spi_bus->parent.user_data;
SPI_InitType SPI_InitStruct;
RT_ASSERT(device != RT_NULL);
RT_ASSERT(configuration != RT_NULL);
RT_ASSERT(device != RT_NULL);
RT_ASSERT(configuration != RT_NULL);
at32_msp_spi_init(spi_instance->config->spix);
@@ -162,7 +162,7 @@ static rt_err_t configure(struct rt_spi_device* device,
SPI_InitStruct.SPI_MCLKP = SPI_MCLKP_256;
}
} /* baudrate */
switch(configuration->mode & RT_SPI_MODE_3)
{
case RT_SPI_MODE_0:
@@ -172,11 +172,11 @@ static rt_err_t configure(struct rt_spi_device* device,
case RT_SPI_MODE_1:
SPI_InitStruct.SPI_CPHA = SPI_CPHA_2EDGE;
SPI_InitStruct.SPI_CPOL = SPI_CPOL_LOW;
break;
break;
case RT_SPI_MODE_2:
SPI_InitStruct.SPI_CPHA = SPI_CPHA_1EDGE;
SPI_InitStruct.SPI_CPOL = SPI_CPOL_HIGH;
break;
break;
case RT_SPI_MODE_3:
SPI_InitStruct.SPI_CPHA = SPI_CPHA_2EDGE;
SPI_InitStruct.SPI_CPOL = SPI_CPOL_HIGH;
@@ -200,7 +200,7 @@ static rt_err_t configure(struct rt_spi_device* device,
/* init SPI */
SPI_Init(spi_instance->config->spix, &SPI_InitStruct);
/* Enable SPI_MASTER */
SPI_Enable(spi_instance->config->spix, ENABLE);
SPI_Enable(spi_instance->config->spix, ENABLE);
SPI_CRCEN(spi_instance->config->spix, DISABLE);
return RT_EOK;
@@ -213,9 +213,9 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
struct rt_spi_configuration * config = &device->config;
struct at32_spi_cs * at32_spi_cs = device->parent.user_data;
RT_ASSERT(device != NULL);
RT_ASSERT(message != NULL);
RT_ASSERT(device != NULL);
RT_ASSERT(message != NULL);
/* take CS */
if(message->cs_take)
{
@@ -229,7 +229,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
const rt_uint8_t * send_ptr = message->send_buf;
rt_uint8_t * recv_ptr = message->recv_buf;
rt_uint32_t size = message->length;
DEBUG_PRINTF("spi poll transfer start: %d\n", size);
while(size--)
@@ -240,12 +240,12 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
{
data = *send_ptr++;
}
// Todo: replace register read/write by at32 lib
//Wait until the transmit buffer is empty
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE));
// Send the byte
SPI_I2S_TxData(spi_instance->config->spix, data);
SPI_I2S_TxData(spi_instance->config->spix, data);
//Wait until a data is received
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE));
@@ -277,7 +277,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
//Wait until the transmit buffer is empty
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_TE));
// Send the byte
SPI_I2S_TxData(spi_instance->config->spix, data);
SPI_I2S_TxData(spi_instance->config->spix, data);
//Wait until a data is received
while(RESET == SPI_I2S_GetFlagStatus(spi_instance->config->spix, SPI_I2S_FLAG_RNE));
@@ -295,7 +295,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
/* release CS */
if(message->cs_release)
{
GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin);
GPIO_SetBits(at32_spi_cs->GPIOx, at32_spi_cs->GPIO_Pin);
DEBUG_PRINTF("spi release cs\n");
}
@@ -306,7 +306,7 @@ static struct at32_spi_config configs[] = {
#ifdef BSP_USING_SPI1
{SPI1, "spi1"},
#endif
#ifdef BSP_USING_SPI2
{SPI2, "spi2"},
#endif
bsp/at32/Libraries/rt_drivers/drv_spi.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_sram.c
+21 -21
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -38,7 +38,7 @@ static int rt_hw_sram_Init(void)
/* Init XMC pin */
at32_msp_xmc_init(XMC);
/*-- FSMC Configuration ------------------------------------------------------*/
p.XMC_AdrOpTime = 0x04;
p.XMC_AdrHoldTime = 0x04;
@@ -53,7 +53,7 @@ static int rt_hw_sram_Init(void)
XMC_NORSRAMInitStructure.XMC_Dev = XMC_Dev_SRAM;
XMC_NORSRAMInitStructure.XMC_BusType = XMC_BusType_16b;
XMC_NORSRAMInitStructure.XMC_EnableBurstMode = XMC_BurstMode_Disable;
XMC_NORSRAMInitStructure.XMC_EnableAsynWait = XMC_AsynWait_Disable;
XMC_NORSRAMInitStructure.XMC_EnableAsynWait = XMC_AsynWait_Disable;
XMC_NORSRAMInitStructure.XMC_WaitSignalLv = XMC_WaitSignalLv_Low;
XMC_NORSRAMInitStructure.XMC_EnableBurstModeSplit = XMC_BurstModeSplit_Disable;
XMC_NORSRAMInitStructure.XMC_WaitSignalConfig = XMC_WaitSignalConfig_BeforeWaitState;
@@ -63,9 +63,9 @@ static int rt_hw_sram_Init(void)
XMC_NORSRAMInitStructure.XMC_WriteBurstSyn = XMC_WriteBurstSyn_Disable;
XMC_NORSRAMInitStructure.XMC_RWTimingStruct = &p;
XMC_NORSRAMInitStructure.XMC_WTimingStruct = &p;
XMC_NORSRAMInit(&XMC_NORSRAMInitStructure);
XMC_NORSRAMInit(&XMC_NORSRAMInitStructure);
/*!< Enable FSMC Bank1_SRAM Bank */
XMC_NORSRAMCmd(XMC_Bank1_NORSRAM3, ENABLE);
@@ -73,7 +73,7 @@ static int rt_hw_sram_Init(void)
/* If RT_USING_MEMHEAP_AS_HEAP is enabled, SRAM is initialized to the heap */
rt_memheap_init(&system_heap, "sram", (void *)EXT_SRAM_BEGIN, SRAM_LENGTH);
#endif
return result;
}
INIT_BOARD_EXPORT(rt_hw_sram_Init);
@@ -81,11 +81,11 @@ INIT_BOARD_EXPORT(rt_hw_sram_Init);
#ifdef DRV_DEBUG
#ifdef FINSH_USING_MSH
/**
* @brief Writes a Half-word buffer to the FSMC SRAM memory.
* @param pBuffer : pointer to buffer.
* @param WriteAddr : SRAM memory internal address from which the data will be
* @brief Writes a Half-word buffer to the FSMC SRAM memory.
* @param pBuffer : pointer to buffer.
* @param WriteAddr : SRAM memory internal address from which the data will be
* written.
* @param NumHalfwordToWrite : number of half-words to write.
* @param NumHalfwordToWrite : number of half-words to write.
* @retval None
*/
static void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
@@ -94,15 +94,15 @@ static void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t Num
{
/*!< Transfer data to the memory */
*(uint16_t *) (EXT_SRAM_BEGIN + WriteAddr) = *pBuffer++;
/*!< Increment the address*/
/*!< Increment the address*/
WriteAddr += 2;
}
}
}
/**
* @brief Reads a block of data from the FSMC SRAM memory.
* @param pBuffer : pointer to the buffer that receives the data read from the
* @param pBuffer : pointer to the buffer that receives the data read from the
* SRAM memory.
* @param ReadAddr : SRAM memory internal address to read from.
* @param NumHalfwordToRead : number of half-words to read.
@@ -115,9 +115,9 @@ static void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHa
/*!< Read a half-word from the memory */
*pBuffer++ = *(__IO uint16_t*) (EXT_SRAM_BEGIN + ReadAddr);
/*!< Increment the address*/
/*!< Increment the address*/
ReadAddr += 2;
}
}
}
/**
@@ -146,9 +146,9 @@ int sram_test(void)
/* Read data from XMC SRAM memory */
SRAM_ReadBuffer(RT_RxBuffer, RT_WRITE_READ_ADDR, RT_BUFFER_SIZE);
SRAM_ReadBuffer(RT_RxBuffer, RT_WRITE_READ_ADDR, RT_BUFFER_SIZE);
/* Read back SRAM memory and check content correctness */
/* Read back SRAM memory and check content correctness */
for (Index = 0x00; (Index < RT_BUFFER_SIZE) && (WriteReadStatus == 0); Index++)
{
if (RT_RxBuffer[Index] != RT_TxBuffer[Index])
@@ -156,7 +156,7 @@ int sram_test(void)
WriteReadStatus = Index + 1;
}
}
if(WriteReadStatus == 0)
{
LOG_D("SRAM test success!");
@@ -165,7 +165,7 @@ int sram_test(void)
{
LOG_E("SRAM test failed!");
}
return RT_EOK;
}
MSH_CMD_EXPORT(sram_test, sram test)
bsp/at32/Libraries/rt_drivers/drv_sram.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_usart.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -15,7 +15,7 @@
#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
!defined(BSP_USING_UART3)
#error "Please define at least one BSP_USING_UARTx"
/* this driver can be disabled at menuconfig ¡ú RT-Thread Components ¡ú Device Drivers */
/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
#endif
struct at32_usart {
bsp/at32/Libraries/rt_drivers/drv_usart.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/Libraries/rt_drivers/drv_wdt.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/at32f403a-start/applications/main.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/at32f403a-start/board/board.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -7,7 +7,7 @@
* Date Author Notes
* 2018-11-06 balanceTWK first version
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
bsp/at32/at32f403a-start/board/board.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/at32f403a-start/board/msp/at32_msp.c
+10 -10
View File
@@ -195,34 +195,34 @@ void at32_msp_adc_init(void *Instance)
GPIO_InitType GPIO_InitStruct;
ADC_Type *ADCx = (ADC_Type *)Instance;
#ifdef BSP_USING_ADC1
#ifdef BSP_USING_ADC1
if(ADCx == ADC1)
{
{
/* ADC1 & GPIO clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
/* Configure ADC Channel as analog input */
/* Configure ADC Channel as analog input */
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOC, &GPIO_InitStruct);
}
#endif
#ifdef BSP_USING_ADC2
#ifdef BSP_USING_ADC2
if(ADCx == ADC2)
{
/* ADC2 & GPIO clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
/* Configure ADC Channel as analog input */
/* Configure ADC Channel as analog input */
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOC, &GPIO_InitStruct);
}
#endif
#endif
}
#endif /* BSP_USING_ADC */
@@ -237,7 +237,7 @@ void at32_msp_hwtmr_init(void *Instance)
/* TMR3 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
}
#endif
#endif
#ifdef BSP_USING_HWTMR4
if(TMRx == TMR4)
bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c
+60 -60
View File
File diff suppressed because it is too large. Load diff
bsp/at32/at32f407-start/applications/main.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/at32f407-start/board/board.c
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -7,7 +7,7 @@
* Date Author Notes
* 2018-11-06 balanceTWK first version
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
bsp/at32/at32f407-start/board/board.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/at32/at32f407-start/board/msp/at32_msp.c
+10 -10
View File
@@ -195,34 +195,34 @@ void at32_msp_adc_init(void *Instance)
GPIO_InitType GPIO_InitStruct;
ADC_Type *ADCx = (ADC_Type *)Instance;
#ifdef BSP_USING_ADC1
#ifdef BSP_USING_ADC1
if(ADCx == ADC1)
{
{
/* ADC1 & GPIO clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
/* Configure ADC Channel as analog input */
/* Configure ADC Channel as analog input */
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOC, &GPIO_InitStruct);
}
#endif
#ifdef BSP_USING_ADC2
#ifdef BSP_USING_ADC2
if(ADCx == ADC2)
{
/* ADC2 & GPIO clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
/* Configure ADC Channel as analog input */
/* Configure ADC Channel as analog input */
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOC, &GPIO_InitStruct);
}
#endif
#endif
}
#endif /* BSP_USING_ADC */
@@ -237,7 +237,7 @@ void at32_msp_hwtmr_init(void *Instance)
/* TMR3 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
}
#endif
#endif
#ifdef BSP_USING_HWTMR4
if(TMRx == TMR4)
bsp/at32/at32f407-start/board/msp/system_at32f4xx.c
+60 -60
View File
File diff suppressed because it is too large. Load diff
bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig
+4
View File
@@ -176,6 +176,10 @@ menu "On-chip Peripheral Drivers"
config RTC_USING_INTERNAL_CLK
bool "Using internal clock RTC"
default y
config RTC_USING_1S_INT
bool "Using 1 second interrupt"
depends on RT_USING_ALARM
default n
endif
menuconfig BSP_USING_ADC
bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
+65 -4
View File
@@ -7,6 +7,7 @@
* Date Author Notes
* 2021-01-28 greedyhao first version
* 2021-03-19 iysheng modify just set time first power up
* 2021-03-26 iysheng add alarm and 1s interrupt support
*/
#include "board.h"
@@ -134,15 +135,22 @@ void hal_rtc_init(void)
irtc_time_write(RTCCNT_CMD, sec);
}
#ifdef RT_USING_ALARM
RTCCON |= RTC_CON_ALM_INTERRUPT;
#ifdef RTC_USING_1S_INT
RTCCON |= RTC_CON_1S_INTERRUPT;
#endif
#endif
}
/************** HAL End *******************/
static time_t get_rtc_timestamp(void)
static time_t get_rtc_time_stamp(void)
{
time_t sec = 0;
sec = irtc_time_read(RTCCNT_CMD);
LOG_D("get rtc time.");
return sec;
}
@@ -153,6 +161,22 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp)
return RT_EOK;
}
static rt_err_t set_rtc_alarm_stamp(time_t alarm_stamp)
{
irtc_time_write(RTCALM_CMD, alarm_stamp);
return RT_EOK;
}
static time_t get_rtc_alarm_stamp(void)
{
time_t sec = 0;
sec = irtc_time_read(RTCALM_CMD);
return sec;
}
static void rt_rtc_init(void)
{
hal_rtc_init();
@@ -165,8 +189,8 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
switch (cmd)
{
case RT_DEVICE_CTRL_RTC_GET_TIME:
*(rt_uint32_t *)args = get_rtc_timestamp();
LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
*(rt_uint32_t *)args = get_rtc_time_stamp();
LOG_D("RTC: get rtc_time %x", *(rt_uint32_t *)args);
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
@@ -174,7 +198,18 @@ static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
{
result = -RT_ERROR;
}
LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
LOG_D("RTC: set rtc_time %x", *(rt_uint32_t *)args);
break;
case RT_DEVICE_CTRL_RTC_SET_ALARM:
if (set_rtc_alarm_stamp(*(rt_uint32_t *)args))
{
result = -RT_ERROR;
}
LOG_D("RTC: set alarm_stamp %x", *(rt_uint32_t *)args);
break;
case RT_DEVICE_CTRL_RTC_GET_ALARM:
*(rt_uint32_t *)args = get_rtc_alarm_stamp();
LOG_D("RTC: get alarm_stamp %x", *(rt_uint32_t *)args);
break;
}
@@ -217,15 +252,41 @@ static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint
return rt_device_register(device, name, flag);
}
#ifdef RT_USING_ALARM
static void rtc_isr(int vector, void *param)
{
rt_interrupt_enter();
if (RTCCON & RTC_CON_ALM_PEND)
{
RTCCPND |= RTC_CPND_ALM;
}
#ifdef RTC_USING_1S_INT
if (RTCCON & RTC_CON_1S_PEND)
{
RTCCPND |= RTC_CPND_1S;
}
#endif
rt_interrupt_leave();
}
#endif
int rt_hw_rtc_init(void)
{
rt_err_t result;
result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
if (result != RT_EOK)
{
LOG_E("rtc register err code: %d", result);
return result;
}
#ifdef RT_USING_ALARM
rt_hw_interrupt_install(IRQ_RTC_VECTOR, rtc_isr, RT_NULL, "rtc_isr");
#endif
LOG_D("rtc init success");
return RT_EOK;
}
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_rtc.h
+4
View File
@@ -32,6 +32,10 @@ enum
#define RTC_CON_BAUD_SELECT (0x3u << 1) /*!< Increase clock selection */
#define RTC_CON_CHIP_SELECT (0x1u << 0) /*!< RTC chip select */
// RTCCPND
#define RTC_CPND_1S (0x1u << 18) /*!< Clear RTC 1S pending */
#define RTC_CPND_ALM (0x1u << 17) /*!< Clear RTC alarm pendind */
// RTCCON0
#define RTC_CON0_PWRUP_FIRST (0x01u << 7) /*!< RTC first power up flag */
#define RTC_CON0_INTERNAL_32K (0x01u << 6) /*!< Internal 32K select */
bsp/efm32/EFM32GG_DK3750/dvk.h
+2 -2
View File
@@ -164,7 +164,7 @@ int DVK_BRD3600A_usbVBUSGetOCFlagState(void);
/* For "backward compatibility" with DVK */
/** DVK_enablePeripheral() backward compatibility */
#define DVK_enablePeripheral(X) DVK_peripheralAccess(X, true)
#define DVK_enablePeripheral(X) DVK_peripheralAccess(X, true)
/** DVK_disablePeripheral() backward compatibility */
#define DVK_disablePeripheral(X) DVK_peripheralAccess(X, false)
@@ -193,7 +193,7 @@ __STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
/**************************************************************************//**
* @brief Read data from 16-bit board control register
* @param addr Register to read
* @return Value of board controller register
* @return Value of board controller register
*****************************************************************************/
__STATIC_INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
{
bsp/efm32/EFM32GG_DK3750/trace.c
+2 -2
View File
@@ -125,7 +125,7 @@ void TRACE_SWOSetup(void)
/**************************************************************************//**
* @brief Profiler configuration for EFM32GG990F11024/EFM32GG-DK3750
* @return true if energyAware Profiler/SWO is enabled, false if not
* @note If first word of the user page is zero, this will not
* @note If first word of the user page is zero, this will not
* enable SWO profiler output
*****************************************************************************/
bool TRACE_ProfilerSetup(void)
@@ -141,7 +141,7 @@ bool TRACE_ProfilerSetup(void)
{
TRACE_SWOSetup();
return true;
}
}
}
/** @} (end group BSP) */
bsp/efm32/EFM32GG_DK3750/trace.h
+2 -2
View File
@@ -58,7 +58,7 @@ bool TRACE_ProfilerSetup(void);
* for TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
* no example project will enable SWO trace.
* @param[in] enable
* @note Add "em_msc.c" to build to use this function.
* @note Add "em_msc.c" to build to use this function.
*****************************************************************************/
__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
{
@@ -69,7 +69,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
data = *userpage;
if(enable)
{
if(data == 0xFFFFFFFF)
if(data == 0xFFFFFFFF)
{
return;
}
bsp/efm32/EFM32_Gxxx_DK/dvk.c
+1 -1
View File
@@ -52,7 +52,7 @@ bool DVK_init(void)
#endif
#ifdef DVK_SPI_CONTROL
ret = DVK_SPI_init();
#endif
#endif
if ( ret == false )
{
/* Board is configured in wrong mode, please restart KIT! */
bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h
+1 -1
View File
@@ -73,7 +73,7 @@
#define BC_HW_VERSION ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x14)) /**< HW version */
#define BC_FW_BUILDNO ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x15)) /**< FW build number */
#define BC_FW_VERSION ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x16)) /**< FW version */
#define BC_SCRATCH_COMMON ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */
#define BC_SCRATCH_COMMON ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */
#define BC_SCRATCH_EFM0 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x18)) /**< Scratch EFM0 */
#define BC_SCRATCH_EFM1 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x19)) /**< Scratch EFM1 */
#define BC_SCRATCH_EFM2 ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1A)) /**< Scratch EFM2 */
bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c
+2 -2
View File
@@ -155,7 +155,7 @@ uint16_t DVK_getPushButtons(void)
/* Check state */
aemState = DVK_readRegister(BC_AEMSTATE);
/* Read pushbutton status */
if ( aemState == BC_AEMSTATE_EFM )
if ( aemState == BC_AEMSTATE_EFM )
{
pb = (~(DVK_readRegister(BC_PUSHBUTTON))) & 0x000f;
}
@@ -174,7 +174,7 @@ uint16_t DVK_getJoystick(void)
/* Check state */
aemState = DVK_readRegister(BC_AEMSTATE);
/* Read pushbutton status */
if ( aemState == BC_AEMSTATE_EFM )
if ( aemState == BC_AEMSTATE_EFM )
{
joyStick = (~(DVK_readRegister(BC_JOYSTICK))) & 0x001f;
}
bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c
+3 -3
View File
@@ -163,7 +163,7 @@ bool DVK_EBI_init(void)
* be configured for EBI access */
ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
while ((ebiMagic != BC_MAGIC_VALUE) && retry)
{
{
DVK_EBI_disable();
/* Enable SPI interface */
DVK_SPI_init();
@@ -172,13 +172,13 @@ bool DVK_EBI_init(void)
DVK_SPI_writeRegister(BC_CFG, BC_CFG_EBI);
/* Disable SPI */
DVK_SPI_disable();
/* Now setup EBI again */
DVK_EBI_configure();
/* Wait until ready */
ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
if (ebiMagic == BC_MAGIC_VALUE) break;
retry--;
}
if ( ! retry ) return false;
bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c
+4 -4
View File
@@ -106,7 +106,7 @@ static void spiInit(void)
/* Configure SPI bus connect pins, DOUT set to 0, disable EBI */
GPIO_PinModeSet(PORT_SPIBUS_CONNECT, PIN_SPIBUS_CONNECT, gpioModePushPull, 0);
GPIO_PinModeSet(PORT_EBIBUS_CONNECT, PIN_EBIBUS_CONNECT, gpioModePushPull, 1);
/* Configure SPI pins */
GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModePushPull, 0);
@@ -164,11 +164,11 @@ static uint16_t spiAccess(uint8_t spiaddr, uint8_t rw, uint16_t spidata)
/* Just ignore data read back */
USART_Rx(USART_USED);
/* SPI data LSB */
/* SPI data LSB */
USART_Tx(USART_USED, spidata & 0xFF);
tmp = (uint16_t)USART_Rx(USART_USED);
/* SPI data MSB */
/* SPI data MSB */
USART_Tx(USART_USED, spidata >> 8);
tmp |= (uint16_t)USART_Rx(USART_USED) << 8;
@@ -213,7 +213,7 @@ bool DVK_SPI_init(void)
if(spiMagic != BC_MAGIC_VALUE)
{
return false;
}
}
else
{
return true;
bsp/efm32/EFM32_Gxxx_DK/trace.c
+2 -2
View File
@@ -89,7 +89,7 @@ void TRACE_SWOSetup(void)
/**************************************************************************//**
* @brief Profiler configuration
* @return true if energyAware Profiler/SWO is enabled, false if not
* @note If first word of the user page is zero, this will not
* @note If first word of the user page is zero, this will not
* enable SWO profiler output, see trace.h
*****************************************************************************/
bool TRACE_ProfilerSetup(void)
@@ -105,7 +105,7 @@ bool TRACE_ProfilerSetup(void)
{
TRACE_SWOSetup();
return true;
}
}
}
/** @} (end group BSP) */
bsp/efm32/EFM32_Gxxx_DK/trace.h
+3 -3
View File
@@ -58,7 +58,7 @@ bool TRACE_ProfilerSetup(void);
* in TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
* no example project will enable SWO trace.
* @param[in] enable
* @note Add "em_msc.c" to build to use this function.
* @note Add "em_msc.c" to build to use this function.
*****************************************************************************/
__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
{
@@ -69,7 +69,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
data = *userpage;
if(enable)
{
if(data == 0xFFFFFFFF)
if(data == 0xFFFFFFFF)
{
return;
}
@@ -81,7 +81,7 @@ __STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
return;
}
}
/* Initialize MSC */
MSC_Init();
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