Mirrors_Framework/rt-thread
1
0
Fork 0
mirror of https://github.com/RT-Thread/rt-thread.git synced 2026-10-07 00:59:00 +08:00
Code Issues Packages Projects Releases Wiki Activity

[BSP][STM32][469-DISCO]Add flash sdram usb drivers

Browse Source
This commit is contained in:
ZYH
2019-04-11 10:27:49 +08:00
parent 2a41e3257f
commit d212787bbb
20 changed files with 2325 additions and 68 deletions
Download Patch File Download Diff File Expand all files Collapse all files
bsp/stm32/stm32f469-st-disco/.config
+63 -17
View File
@@ -48,11 +48,11 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
CONFIG_RT_USING_HEAP=y
#
@@ -105,7 +105,34 @@ CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=8
CONFIG_DFS_FILESYSTEM_TYPES_MAX=8
CONFIG_DFS_FD_MAX=64
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
# elm-chan's FatFs, Generic FAT Filesystem Module
#
CONFIG_RT_DFS_ELM_CODE_PAGE=437
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
CONFIG_RT_DFS_ELM_USE_LFN_3=y
CONFIG_RT_DFS_ELM_USE_LFN=3
CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
#
# Device Drivers
@@ -144,12 +171,22 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# CONFIG__RT_USB_DEVICE_NONE is not set
# CONFIG__RT_USB_DEVICE_CDC is not set
# CONFIG__RT_USB_DEVICE_MSTORAGE is not set
# CONFIG__RT_USB_DEVICE_HID is not set
# CONFIG__RT_USB_DEVICE_WINUSB is not set
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_LIBC is not set
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
@@ -258,6 +295,7 @@ CONFIG_RT_USING_PIN=y
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
#
# tools packages
@@ -281,28 +319,25 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FAL_LATEST_VERSION is not set
# CONFIG_PKG_USING_FAL_V00300 is not set
# CONFIG_PKG_USING_FAL_V00200 is not set
# CONFIG_PKG_USING_FAL_V00100 is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_LITTLEFS_V090 is not set
# CONFIG_PKG_USING_LITTLEFS_V170 is not set
# CONFIG_PKG_USING_LITTLEFS_LATEST_VERSION is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
#
# peripheral libraries and drivers
#
#
# sensors drivers
#
# CONFIG_PKG_USING_LSM6DSL is not set
# CONFIG_PKG_USING_LPS22HB is not set
# CONFIG_PKG_USING_HTS221 is not set
# CONFIG_PKG_USING_LSM303AGR is not set
# CONFIG_PKG_USING_BME280 is not set
# CONFIG_PKG_USING_BMA400 is not set
# CONFIG_PKG_USING_BMI160_BMX160 is not set
# CONFIG_PKG_USING_SPL0601 is not set
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
@@ -315,7 +350,10 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
#
# miscellaneous packages
@@ -341,6 +379,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
#
# Privated Packages of RealThread
@@ -380,6 +419,8 @@ CONFIG_SOC_STM32F469NI=y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_SDRAM=y
# CONFIG_BSP_USING_QSPI_FLASH is not set
#
# On-chip Peripheral Drivers
@@ -387,6 +428,11 @@ CONFIG_SOC_STM32F469NI=y
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART3=y
# CONFIG_BSP_UART3_RX_USING_DMA is not set
# CONFIG_BSP_USING_QSPI is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
CONFIG_BSP_USING_FMC=y
# CONFIG_BSP_USING_USBD_FS is not set
#
# Board extended module Drivers
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/.mxproject
+7 -7
View File
File diff suppressed because one or more lines are too long
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
+381 -27
View File
File diff suppressed because it is too large Load Diff
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/main.h
+2
View File
@@ -50,6 +50,8 @@ extern "C" {
/* USER CODE END EM */
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/pdm2pcm.h
+67
View File
@@ -0,0 +1,67 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : pdm2pcm.h
* Description : This file provides code for the configuration
* of the pdm2pcm instances.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __pdm2pcm_H
#define __pdm2pcm_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "pdm2pcm_glo.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* Global variables ---------------------------------------------------------*/
extern PDM_Filter_Handler_t PDM1_filter_handler;
extern PDM_Filter_Config_t PDM1_filter_config;
extern PDM_Filter_Handler_t PDM2_filter_handler;
extern PDM_Filter_Config_t PDM2_filter_config;
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* PDM2PCM init function */
void MX_PDM2PCM_Init(void);
/* USER CODE BEGIN 2 */
/* PDM2PCM process function */
uint8_t MX_PDM2PCM_Process(uint16_t *PDMBuf, uint16_t *PCMBuf);
/* USER CODE END 2 */
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
#ifdef __cplusplus
}
#endif
#endif /*__pdm2pcm_H */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h
+6 -6
View File
@@ -52,7 +52,7 @@
/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
#define HAL_CRC_MODULE_ENABLED
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
@@ -62,10 +62,10 @@
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
#define HAL_SDRAM_MODULE_ENABLED
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
#define HAL_I2S_MODULE_ENABLED
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
@@ -74,17 +74,17 @@
/* #define HAL_SD_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */
/* #define HAL_TIM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* #define HAL_PCD_MODULE_ENABLED */
#define HAL_PCD_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
#define HAL_QSPI_MODULE_ENABLED
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_FMPI2C_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Inc/stm32f4xx_it.h
+3
View File
@@ -56,6 +56,9 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Stream0_IRQHandler(void);
void SPI3_IRQHandler(void);
void OTG_FS_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Middlewares/ST/STM32_Audio/Addons/PDM/Inc/pdm2pcm_glo.h
+97
View File
@@ -0,0 +1,97 @@
/**
******************************************************************************
* @file pdm2pcm_glo.h
* @author MCD Application Team
* @version V3.0.0
* @date 28-February-2017
* @brief Global header for PDM2PCM conversion code
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Image SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_image_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __PDM2PCM_FILTER_H
#define __PDM2PCM_FILTER_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/* Exported constants --------------------------------------------------------*/
#define PDM_FILTER_ENDIANNESS_LE ((uint16_t)0x0000)
#define PDM_FILTER_ENDIANNESS_BE ((uint16_t)0x0001)
#define PDM_FILTER_BIT_ORDER_LSB ((uint16_t)0x0000)
#define PDM_FILTER_BIT_ORDER_MSB ((uint16_t)0x0001)
#define PDM_FILTER_DEC_FACTOR_48 ((uint16_t)0x0001)
#define PDM_FILTER_DEC_FACTOR_64 ((uint16_t)0x0002)
#define PDM_FILTER_DEC_FACTOR_80 ((uint16_t)0x0003)
#define PDM_FILTER_DEC_FACTOR_128 ((uint16_t)0x0004)
#define PDM_FILTER_DEC_FACTOR_16 ((uint16_t)0x0005)
#define PDM_FILTER_DEC_FACTOR_24 ((uint16_t)0x0006)
#define PDM_FILTER_DEC_FACTOR_32 ((uint16_t)0x0007)
#define PDM_FILTER_INIT_ERROR ((uint16_t)0x0010)
#define PDM_FILTER_CONFIG_ERROR ((uint16_t)0x0020)
#define PDM_FILTER_ENDIANNESS_ERROR ((uint16_t)0x0001)
#define PDM_FILTER_BIT_ORDER_ERROR ((uint16_t)0x0002)
#define PDM_FILTER_CRC_LOCK_ERROR ((uint16_t)0x0004)
#define PDM_FILTER_DECIMATION_ERROR ((uint16_t)0x0008)
#define PDM_FILTER_GAIN_ERROR ((uint16_t)0x0040)
#define PDM_FILTER_SAMPLES_NUMBER_ERROR ((uint16_t)0x0080)
#define PDM2PCM_INTERNAL_MEMORY_SIZE 16
/* Exported types ------------------------------------------------------------*/
typedef struct{
uint16_t bit_order;
uint16_t endianness;
uint32_t high_pass_tap;
uint16_t in_ptr_channels;
uint16_t out_ptr_channels;
uint32_t pInternalMemory[PDM2PCM_INTERNAL_MEMORY_SIZE];
}PDM_Filter_Handler_t;
typedef struct{
uint16_t decimation_factor;
uint16_t output_samples_number;
int16_t mic_gain;
}PDM_Filter_Config_t;
/* Exported macros -----------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
uint32_t PDM_Filter_Init(PDM_Filter_Handler_t *pHandler);
uint32_t PDM_Filter_setConfig(PDM_Filter_Handler_t *pHandler, PDM_Filter_Config_t *pConfig);
uint32_t PDM_Filter_getConfig(PDM_Filter_Handler_t *pHandler, PDM_Filter_Config_t *pConfig);
uint32_t PDM_Filter_deInterleave(void *pDataIn, void *pDataOut, PDM_Filter_Handler_t * pHandler);
uint32_t PDM_Filter(void *pDataIn, void *pDataOut, PDM_Filter_Handler_t *pHandler);
#ifdef __cplusplus
}
#endif
#endif /* __PDM2PCM_FILTER_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/main.c
+314 -4
View File
File diff suppressed because it is too large Load Diff
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/pdm2pcm.c
+111
View File
@@ -0,0 +1,111 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : pdm2pcm.c
* Description : This file provides code for the configuration
* of the pdm2pcm instances.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "pdm2pcm.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* Global variables ---------------------------------------------------------*/
PDM_Filter_Handler_t PDM1_filter_handler;
PDM_Filter_Config_t PDM1_filter_config;
PDM_Filter_Handler_t PDM2_filter_handler;
PDM_Filter_Config_t PDM2_filter_config;
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* PDM2PCM init function */
void MX_PDM2PCM_Init(void)
{
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/**
*/
PDM1_filter_handler.bit_order = PDM_FILTER_BIT_ORDER_LSB;
PDM1_filter_handler.endianness = PDM_FILTER_ENDIANNESS_BE;
PDM1_filter_handler.high_pass_tap = 2104533974;
PDM1_filter_handler.in_ptr_channels = 2;
PDM1_filter_handler.out_ptr_channels = 2;
PDM_Filter_Init(&PDM1_filter_handler);
PDM1_filter_config.decimation_factor = PDM_FILTER_DEC_FACTOR_64;
PDM1_filter_config.output_samples_number = 16;
PDM1_filter_config.mic_gain = 0;
PDM_Filter_setConfig(&PDM1_filter_handler, &PDM1_filter_config);
PDM2_filter_handler.bit_order = PDM_FILTER_BIT_ORDER_LSB;
PDM2_filter_handler.endianness = PDM_FILTER_ENDIANNESS_BE;
PDM2_filter_handler.high_pass_tap = 2104533974;
PDM2_filter_handler.in_ptr_channels = 2;
PDM2_filter_handler.out_ptr_channels = 2;
PDM_Filter_Init(&PDM2_filter_handler);
PDM2_filter_config.decimation_factor = PDM_FILTER_DEC_FACTOR_64;
PDM2_filter_config.output_samples_number = 16;
PDM2_filter_config.mic_gain = 0;
PDM_Filter_setConfig(&PDM2_filter_handler, &PDM2_filter_config);
PDM2_filter_handler.bit_order = PDM_FILTER_BIT_ORDER_LSB;
PDM2_filter_handler.endianness = PDM_FILTER_ENDIANNESS_BE;
PDM2_filter_handler.high_pass_tap = 2104533974;
PDM2_filter_handler.in_ptr_channels = 2;
PDM2_filter_handler.out_ptr_channels = 2;
PDM_Filter_Init(&PDM2_filter_handler);
PDM2_filter_config.decimation_factor = PDM_FILTER_DEC_FACTOR_64;
PDM2_filter_config.output_samples_number = 16;
PDM2_filter_config.mic_gain = 0;
PDM_Filter_setConfig(&PDM2_filter_handler, &PDM2_filter_config);
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
}
/* USER CODE BEGIN 4 */
/* process function */
uint8_t MX_PDM2PCM_Process(uint16_t *PDMBuf, uint16_t *PCMBuf)
{
/*
uint8_t BSP_AUDIO_IN_PDMToPCM(uint16_t * PDMBuf, uint16_t * PCMBuf)
Converts audio format from PDM to PCM.
Parameters:
PDMBuf : Pointer to PDM buffer data
PCMBuf : Pointer to PCM buffer data
Return values:
AUDIO_OK in case of success, AUDIO_ERROR otherwise
*/
/* this example return the default status AUDIO_ERROR */
return (uint8_t) 1;
}
/* USER CODE END 4 */
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
+669 -1
View File
File diff suppressed because it is too large Load Diff
bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/Src/stm32f4xx_it.c
+45 -1
View File
@@ -56,7 +56,9 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_spi3_rx;
extern I2S_HandleTypeDef hi2s3;
extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
@@ -197,6 +199,48 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32f4xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 stream0 global interrupt.
*/
void DMA1_Stream0_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
/* USER CODE END DMA1_Stream0_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi3_rx);
/* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
/* USER CODE END DMA1_Stream0_IRQn 1 */
}
/**
* @brief This function handles SPI3 global interrupt.
*/
void SPI3_IRQHandler(void)
{
/* USER CODE BEGIN SPI3_IRQn 0 */
/* USER CODE END SPI3_IRQn 0 */
HAL_I2S_IRQHandler(&hi2s3);
/* USER CODE BEGIN SPI3_IRQn 1 */
/* USER CODE END SPI3_IRQn 1 */
}
/**
* @brief This function handles USB On The Go FS global interrupt.
*/
void OTG_FS_IRQHandler(void)
{
/* USER CODE BEGIN OTG_FS_IRQn 0 */
/* USER CODE END OTG_FS_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
/* USER CODE BEGIN OTG_FS_IRQn 1 */
/* USER CODE END OTG_FS_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
bsp/stm32/stm32f469-st-disco/board/Kconfig
+41 -1
View File
@@ -6,7 +6,25 @@ config SOC_STM32F469NI
default y
menu "Onboard Peripheral Drivers"
config BSP_USING_SDRAM
bool "Enable SDRAM"
select BSP_USING_FMC
default n
config BSP_USING_QSPI_FLASH
bool "Enable QSPI FLASH (N25Q128A qspi1)"
select BSP_USING_QSPI
select RT_USING_SFUD
select RT_SFUD_USING_QSPI
select PKG_USING_FAL
select FAL_USING_SFUD_PORT
default n
config BSP_MOUNT_QSPI_WITH_LFS
bool "Mount QSPI flash to / with little fs"
depends on BSP_USING_QSPI_FLASH
select PKG_USING_LITTLEFS
select RT_USING_MTD_NOR
select RT_USING_DFS
default y
endmenu
menu "On-chip Peripheral Drivers"
@@ -25,8 +43,30 @@ menu "On-chip Peripheral Drivers"
bool "Enable UART3"
default y
config BSP_UART3_RX_USING_DMA
bool "Enable UART3 RX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n
endif
config BSP_USING_QSPI
bool "Enable QSPI BUS"
select RT_USING_QSPI
select RT_USING_SPI
default n
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
config BSP_USING_FMC
bool
default n
config BSP_USING_USBD_FS
bool "Enable OTGFS as USB device"
select RT_USING_USB_DEVICE
default n
endmenu
menu "Board extended module Drivers"
bsp/stm32/stm32f469-st-disco/board/SConscript
+3
View File
@@ -10,10 +10,13 @@ cwd = GetCurrentDir()
src = Split('''
board.c
CubeMX_Config/Src/stm32f4xx_hal_msp.c
ports/drv_qspi_flash.c
ports/qspi_mnt.c
''')
path = [cwd]
path += [cwd + '/CubeMX_Config/Inc']
path += [cwd + '/ports']
startup_path_prefix = SDK_LIB
bsp/stm32/stm32f469-st-disco/board/board.c
+12 -1
View File
@@ -15,6 +15,7 @@ void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
@@ -29,7 +30,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.PLL.PLLM = 4;
RCC_OscInitStruct.PLL.PLLN = 180;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 4;
RCC_OscInitStruct.PLL.PLLQ = 3;
RCC_OscInitStruct.PLL.PLLR = 2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
@@ -54,4 +55,14 @@ void SystemClock_Config(void)
{
Error_Handler();
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S|RCC_PERIPHCLK_CLK48;
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
PeriphClkInitStruct.PLLSAI.PLLSAIN = 96;
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
}
bsp/stm32/stm32f469-st-disco/board/ports/drv_qspi_flash.c
+78
View File
@@ -0,0 +1,78 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-27 zylx first version
* 2019-04-11 ZYH port from stm32f7serial
*/
#include <board.h>
#include <drv_qspi.h>
#include <rtdevice.h>
#include <rthw.h>
#include <finsh.h>
#ifdef BSP_USING_QSPI_FLASH
#include "spi_flash.h"
#include "spi_flash_sfud.h"
char n25qxxa_read_status_register2(struct rt_qspi_device *device)
{
/* 0x35 read status register2 */
char instruction = 0x35, status;
rt_qspi_send_then_recv(device, &instruction, 1, &status, 1);
return status;
}
void n25qxxa_write_enable(struct rt_qspi_device *device)
{
/* 0x06 write enable */
char instruction = 0x06;
rt_qspi_send(device, &instruction, 1);
}
void n25qxxa_enter_qspi_mode(struct rt_qspi_device *device)
{
char status = 0;
/* 0x38 enter qspi mode */
char instruction = 0x38;
char write_status2_buf[2] = {0};
/* 0x31 write status register2 */
write_status2_buf[0] = 0x31;
status = n25qxxa_read_status_register2(device);
if (!(status & 0x02))
{
status |= 1 << 1;
n25qxxa_write_enable(device);
write_status2_buf[1] = status;
rt_qspi_send(device, &write_status2_buf, 2);
rt_qspi_send(device, &instruction, 1);
rt_kprintf("flash already enter qspi mode\n");
rt_thread_mdelay(10);
}
}
static int rt_hw_qspi_flash_with_sfud_init(void)
{
stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, n25qxxa_enter_qspi_mode, RT_NULL);
/* init n25qxx */
if (RT_NULL == rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi10"))
{
return -RT_ERROR;
}
return RT_EOK;
}
INIT_COMPONENT_EXPORT(rt_hw_qspi_flash_with_sfud_init);
#endif/* BSP_USING_QSPI_FLASH */
bsp/stm32/stm32f469-st-disco/board/ports/fal_cfg.h
+96
View File
@@ -0,0 +1,96 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-10 ZYH first version
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtthread.h>
#include <board.h>
#if defined(BSP_USING_ON_CHIP_FLASH)
#define FLASH_SIZE_GRANULARITY_16K (4 * 16 * 1024)
#define FLASH_SIZE_GRANULARITY_64K (64 * 1024)
#define FLASH_SIZE_GRANULARITY_128K (15 * 128 * 1024)
#define STM32_FLASH_START_ADRESS_16K STM32_FLASH_START_ADRESS
#define STM32_FLASH_START_ADRESS_64K (STM32_FLASH_START_ADRESS_16K + FLASH_SIZE_GRANULARITY_16K)
#define STM32_FLASH_START_ADRESS_128K (STM32_FLASH_START_ADRESS_64K + FLASH_SIZE_GRANULARITY_64K)
extern const struct fal_flash_dev stm32_onchip_flash_16k;
extern const struct fal_flash_dev stm32_onchip_flash_64k;
extern const struct fal_flash_dev stm32_onchip_flash_128k;
#endif
#if defined(BSP_USING_QSPI_FLASH)
extern struct fal_flash_dev nor_flash0;
#endif
/* flash device table */
#if defined(BSP_USING_QSPI_FLASH) && defined(BSP_USING_ON_CHIP_FLASH)
#define FAL_FLASH_DEV_TABLE \
{ \
&stm32_onchip_flash_16k, \
&stm32_onchip_flash_64k, \
&stm32_onchip_flash_128k, \
&nor_flash0, \
}
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_16k", 0 , FLASH_SIZE_GRANULARITY_16K , 0}, \
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_64k", 0 , FLASH_SIZE_GRANULARITY_64K , 0}, \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0}, \
{FAL_PART_MAGIC_WROD, "qspiflash", FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#elif defined(BSP_USING_QSPI_FLASH)
#define FAL_FLASH_DEV_TABLE \
{ \
&nor_flash0, \
}
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "qspiflash", FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#elif defined(BSP_USING_ON_CHIP_FLASH)
#define FAL_FLASH_DEV_TABLE \
{ \
&stm32_onchip_flash_16k, \
&stm32_onchip_flash_64k, \
&stm32_onchip_flash_128k, \
}
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_16k", 0 , FLASH_SIZE_GRANULARITY_16K , 0}, \
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_64k", 0 , FLASH_SIZE_GRANULARITY_64K , 0}, \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#else
#define FAL_FLASH_DEV_TABLE { 0 }
#define FAL_PART_TABLE { 0 }
#endif
#endif /* _FAL_CFG_H_ */
bsp/stm32/stm32f469-st-disco/board/ports/qspi_mnt.c
+41
View File
@@ -0,0 +1,41 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-11 ZYH first version
*/
#include <rtthread.h>
#if defined(PKG_USING_FAL)
#include <fal.h>
#include <dfs_fs.h>
int mnt_init(void)
{
fal_init();
#if defined(BSP_MOUNT_QSPI_WITH_LFS)
fal_mtd_nor_device_create("qspiflash");
if (dfs_mount("qspiflash", "/", "lfs", 0, 0) == 0)
{
rt_kprintf("Mount \"qspiflash\" on \"/\" success\n");
}
else
{
dfs_mkfs("lfs","qspiflash");
if (dfs_mount("qspiflash", "/", "lfs", 0, 0) == 0)
{
rt_kprintf("Mount \"qspiflash\" on \"/\" success\n");
}
else
{
rt_kprintf("Mount \"qspiflash\" on \"/\" fail\n");
return -1;
}
}
#endif
return 0;
}
INIT_ENV_EXPORT(mnt_init);
#endif
bsp/stm32/stm32f469-st-disco/board/ports/sdram_port.h
+66
View File
@@ -0,0 +1,66 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-04-09 ZYH first version
*/
#ifndef __SDRAM_PORT_H__
#define __SDRAM_PORT_H__
/* parameters for sdram peripheral */
/* Bank1 or Bank2 */
#define SDRAM_TARGET_BANK 1
/* stm32f4 Bank1:0XC0000000 Bank2:0XD0000000 */
#define SDRAM_BANK_ADDR ((uint32_t)0XC0000000)
/* data width: 8, 16, 32 */
#define SDRAM_DATA_WIDTH 32
/* column bit numbers: 8, 9, 10, 11 */
#define SDRAM_COLUMN_BITS 8
/* row bit numbers: 11, 12, 13 */
#define SDRAM_ROW_BITS 12
/* cas latency clock number: 1, 2, 3 */
#define SDRAM_CAS_LATENCY 3
/* read pipe delay: 0, 1, 2 */
#define SDRAM_RPIPE_DELAY 0
/* clock divid: 2, 3 */
#define SDCLOCK_PERIOD 2
/* refresh rate counter */
#define SDRAM_REFRESH_COUNT ((uint32_t)0x0569)
#define SDRAM_SIZE ((uint32_t)0x1000000)
/* Timing configuration for W9825G6KH-6 */
/* 90 MHz of SD clock frequency (180MHz/2) */
/* TMRD: 2 Clock cycles */
#define LOADTOACTIVEDELAY 2
/* TXSR: 7x11.90ns */
#define EXITSELFREFRESHDELAY 7
/* TRAS: 4x11.90ns */
#define SELFREFRESHTIME 4
/* TRC: 7x11.90ns */
#define ROWCYCLEDELAY 7
/* TWR: 3 Clock cycles */
#define WRITERECOVERYTIME 2
/* TRP: 2x11.90ns */
#define RPDELAY 2
/* TRCD: 2x11.90ns */
#define RCDDELAY 2
/* memory mode register */
#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0003)
#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
#define SDRAM_MODEREG_CAS_LATENCY_1 ((uint16_t)0x0010)
#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
#endif
bsp/stm32/stm32f469-st-disco/rtconfig.h
+223 -3
View File
File diff suppressed because it is too large Load Diff