upgrade MB9BF506 CMSIS to version 3.01

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2100 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz@gmail.com committed 2012-04-23 09:59:00 +00:00
1 parent 209da6823c
commit cbd32a0c32
28 files changed
+14691 -5323

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-19
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@@ -1,19 +0,0 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
src = Glob('*.c')
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src = src + ['start_gcc.S']
elif rtconfig.CROSS_TOOL == 'keil':
src = src + ['start_rvds.S']
elif rtconfig.CROSS_TOOL == 'iar':
src = src + ['start_iar.S']
CPPPATH = [GetCurrentDir()]
group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH, LIBRARY = '')
Return('group')
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-111
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@@ -1,111 +0,0 @@
/************************************************************************/
/* (C) Fujitsu Semiconductor Europe GmbH */
/* */
/* The following software deliverable is intended for and must only be */
/* used for reference and in an evaluation laboratory environment. */
/* It is provided on an as-is basis without charge and is subject to */
/* alterations. */
/* It is the user’s obligation to fully test the software in its */
/* environment and to ensure proper functionality, qualification and */
/* compliance with component specifications. */
/* */
/* In the event the software deliverable includes the use of open */
/* source components, the provisions of the governing open source */
/* license agreement shall apply with respect to such software */
/* deliverable. */
/* FSEU does not warrant that the deliverables do not infringe any */
/* third party intellectual property right (IPR). In the event that */
/* the deliverables infringe a third party IPR it is the sole */
/* responsibility of the customer to obtain necessary licenses to */
/* continue the usage of the deliverable. */
/* */
/* To the maximum extent permitted by applicable law FSEU disclaims all */
/* warranties, whether express or implied, in particular, but not */
/* limited to, warranties of merchantability and fitness for a */
/* particular purpose for which the deliverable is not designated. */
/* */
/* To the maximum extent permitted by applicable law, FSEU's liability */
/* is restricted to intention and gross negligence. */
/* FSEU is not liable for consequential damages. */
/* */
/* (V1.4) */
/************************************************************************/
#include "mb9bf506r.h"
/*
* 80MHz : Master Clock
*/
const uint32_t SystemFrequency = 80000000UL;
uint32_t SysFreHCLK = 80000000UL; /* HCLK = MasterClock / 1 */
uint32_t SysFrePCLK0 = 40000000UL; /* PCLK0 = HCLK / 2 */
uint32_t SysFrePCLK1 = 40000000UL; /* PCLK1 = HCLK / 2 */
uint32_t SysFrePCLK2 = 40000000UL; /* PCLK2 = HCLK / 2 */
uint32_t SysFreTPIU = 0UL; /* TPIUCLK : Disable */
/*
* Prototype of internal function
*/
static void ClockInit(void);
static void HwwdtDisable(void);
/*
* Setup the microcontroller system
*/
void SystemInit (void)
{
HwwdtDisable(); /* Disable Hardware Watchdog */
ClockInit(); /* Initialize Clock */
}
/*
* Initialize Clock
*/
static void ClockInit(void)
{
/*set Main clock stabilization
wait time to 2ms*/
FM3_CRG->CSW_TMR = 0x79;
/*Enable Main Oscilator*/
FM3_CRG->SCM_CTL |= 1<<1;
/*Wait stabilization end*/
while(!(FM3_CRG->SCM_STR & 0x02));
/* sub CLK enable */
//FM3_CRG->SCM_CTL |= 0x08;
//while(!(FM3_CRG->SCM_STR & 0x08));
/*Set PLL stabilization
wait time to 512uS*/
FM3_CRG->PSW_TMR |= 2;
/*Set PLL to 80MHz*/
FM3_CRG->PLL_CTL1 = 0; /*K = 1, M=1*/
FM3_CRG->PLL_CTL2 = 19; /*N = 20*/
/*Enable PLL*/
FM3_CRG->SCM_CTL |= 0x10;
/*Set bus prescalers*/
FM3_CRG->BSC_PSR = 0; /*Base clock Prescaler 1:1*/
FM3_CRG->APBC0_PSR |= 1; /*APB0 clock Prescaler 1:2*/
FM3_CRG->APBC1_PSR |= 1; /*APB1 clock Prescaler 1:2*/
FM3_CRG->APBC2_PSR |= 1; /*APB2 clock Prescaler 1:2*/
/*Wait PLL stabilizatoin end*/
while(!(FM3_CRG->SCM_STR & 0x10));
/*Select PLL for main clock*/
FM3_CRG->SCM_CTL |= 2<<5;
/*Wait PLL to be connected*/
while((FM3_CRG->SCM_STR & 0xe0) != 0x40);
}
/*
* Stop HW Watchdog Timer
*/
static void HwwdtDisable(void)
{
/* UnLock (except WDG_CTL) */
FM3_HWWDT->WDG_LCK = 0x1ACCE551;
/* UnLock (WDG_CTL) */
FM3_HWWDT->WDG_LCK = 0xE5331AAE;
/* Disable WDG */
FM3_HWWDT->WDG_CTL = 0x00;
}
+1 -4
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@@ -16,7 +16,7 @@
#include <rtthread.h>
#include "board.h"
#include "mb9bf506r.h"
#ifdef RT_USING_FINSH
#include <finsh.h>
#endif
@@ -109,9 +109,6 @@ int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* init system setting */
SystemInit();
/* startup RT-Thread RTOS */
rtthread_startup();
+3 -5
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@@ -16,13 +16,11 @@
#include <rtthread.h>
#include "board.h"
#include "mb9bf506r.h"
#include "mcu.h"
#include "serial.h"
#include "nand.h"
extern const uint32_t SystemFrequency;
/**
* @addtogroup FM3
*/
@@ -48,8 +46,8 @@ void SysTick_Handler(void)
*/
void rt_hw_board_init(void)
{
/* init systick */
SysTick_Config(SystemFrequency/RT_TICK_PER_SECOND);
/* init systick */
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
/* initialize UART device */
rt_hw_serial_init();
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@@ -30,42 +30,33 @@
/* */
/* (V1.5) */
/************************************************************************/
#ifndef _SYSTEM_MB9BF50X_H_
#define _SYSTEM_MB9BF50X_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
******************************************************************************
** \file mcu.h
**
** Header File for device dependent includes
**
** History:
** 2011-05-19 V1.00 MWi first version
**
******************************************************************************/
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
******************************************************************************
** \brief MCU header file include
**
******************************************************************************/
#ifndef _MB9BF506R_H_
#include "mb9bf506r.h"
#endif
#endif /* __SYSTEM_MB9BF50X_H */
/**
******************************************************************************
** \brief MCU system start-up header file include
**
******************************************************************************/
#ifndef _SYSTEM_MB9BF50X_H_
#include "system_mb9bf50x.h"
#endif
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+20
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@@ -0,0 +1,20 @@
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
src = ['Device/FUJISTU/MB9BF50x/Source/system_mb9bf50x.c']
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src += ['Device/FUJISTU/MB9BF50x/Source/G++/startup_mb9bf50x.S']
elif rtconfig.CROSS_TOOL == 'keil':
src += ['Device/FUJISTU/MB9BF50x/Source/ARM/startup_mb9bf50x.S']
elif rtconfig.CROSS_TOOL == 'iar':
src += ['Device/FUJISTU/MB9BF50x/Source/IAR/startup_mb9bf50x.S']
CPPPATH = [cwd + '/CMSIS/Include', cwd + '/CMSIS/RTOS', cwd + '/Device/FUJISTU/MB9BF50x/Include']
group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
+259 -174
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+19 -22
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@@ -61,6 +61,8 @@
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
@@ -346,7 +348,7 @@
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>.;..\..\components\dfs;..\..\components\dfs\include;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;CMSIS;applications;drivers</IncludePath>
<IncludePath>.;..\..\components\dfs;..\..\components\dfs\include;..\..\components\finsh;..\..\include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;applications;drivers;libraries\CMSIS\Include;libraries\CMSIS\RTOS;libraries\Device\FUJISTU\MB9BF50x\Include</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -376,7 +378,7 @@
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>--keep __fsym_* --keep __vsym_*</Misc>
<Misc> --keep __fsym_* --keep __vsym_* </Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
@@ -398,26 +400,6 @@
</File>
</Files>
</Group>
<Group>
<GroupName>CMSIS</GroupName>
<Files>
<File>
<FileName>core_cm3.c</FileName>
<FileType>1</FileType>
<FilePath>CMSIS\core_cm3.c</FilePath>
</File>
<File>
<FileName>system_mb9bf50x.c</FileName>
<FileType>1</FileType>
<FilePath>CMSIS\system_mb9bf50x.c</FilePath>
</File>
<File>
<FileName>start_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>CMSIS\start_rvds.S</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
@@ -448,6 +430,21 @@
</File>
</Files>
</Group>
<Group>
<GroupName>CMSIS</GroupName>
<Files>
<File>
<FileName>system_mb9bf50x.c</FileName>
<FileType>1</FileType>
<FilePath>libraries\Device\FUJISTU\MB9BF50x\Source\system_mb9bf50x.c</FilePath>
</File>
<File>
<FileName>startup_mb9bf50x.S</FileName>
<FileType>2</FileType>
<FilePath>libraries\Device\FUJISTU\MB9BF50x\Source\ARM\startup_mb9bf50x.S</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Kernel</GroupName>
<Files>
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