mirror of
https://github.com/RT-Thread/rt-thread.git
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add support f421/f425
This commit is contained in:
sheltonyu
guo
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,21 @@
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../libraries/Kconfig"
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source "board/Kconfig"
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@@ -0,0 +1,121 @@
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# AT32F421 AT-START 开发板 BSP 说明
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## 简介
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AT32F421 AT-START是雅特力推出的一款AT32F421系列的评估板，其搭载的MCU主要资源参数如下：
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| 硬件 | 描述 |
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| --------- | ------------- |
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| 芯片型号 | AT32F421C8T7 |
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| CPU | ARM Cortex M4 |
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| 主频 | 120M |
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| 片内SRAM | 16K |
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| 片内FLASH | 64K |
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## 编译说明
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AT32F421-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
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| IDE/编译器 | 已测试版本 |
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| ---------- | ---------------------------- |
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| MDK4 | MDK4.74 |
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| MDK5 | MDK531 |
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| IAR | IAR8.20 |
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| GCC | GCC 5.4.1 20160919 (release) |
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## 板载资源
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- MCU：AT32F421C8T7，主频 120MHz，64KB FLASH ，16KB RAM
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- 常用外设
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- LED：3个，（红色PF6、黄色PF7、绿色PB11）
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- 按键：1个，KEY_USER（兼具唤醒功能，PA0)
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- 常用接口：插针串口J8
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- 调试接口，JLINK、板载的 AT-LINK SWD 下载
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## 外设支持
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本 BSP 目前对外设驱动的支持情况如下：
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| 驱动 | 支持情况 | 备注 |
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| --------- | -------- | :------------------------: |
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| UART | 支持 | USART1/2 |
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| GPIO | 支持 | PA0...PF7 |
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| IIC | 支持 | GPIO模拟I2C |
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| SPI | 支持 | SPI1/2 |
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| ADC | 支持 | ADC1 |
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| PWM | 支持 | TMR1 |
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| HWTIMER | 支持 | TMR3 |
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| WDT | 支持 | |
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| RTC | 支持 | |
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| FLASH | 支持 | |
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### IO在板级支持包中的映射情况
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| IO号 | 板级包中的定义 |
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| ---- | -------------- |
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| PF6 | LED2 |
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| PF7 | LED3 |
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| PB11 | LED4 |
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| PA9 | USART1_TX |
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| PA10 | USART1_RX |
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| PA2 | USART2_TX |
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| PA3 | USART2_RX |
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| PA4 | SPI1_NSS |
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| PA5 | SPI1_SCK |
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| PA6 | SPI1_MISO |
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| PA7 | SPI1_MOSI |
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| PB12 | SPI2_NSS |
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| PB13 | SPI2_SCK |
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| PB14 | SPI2_MISO |
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| PB15 | SPI2_MOSI |
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| PB6 | I2C1_SCL |
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| PB7 | I2C1_SDA |
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| PA8 | PWM_TMR1_CH1 |
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| PA11 | PWM_TMR1_CH4 |
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| PA0 | ADC1_IN0 |
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| PA1 | ADC1_IN1 |
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| PA4 | ADC1_IN4 |
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| PA5 | ADC1_IN5 |
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| PA6 | ADC1_IN6 |
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## 使用说明
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本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
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### 快速上手
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本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
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#### 硬件连接
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使用数据线连接开发板到 PC，打开电源开关。
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#### 编译下载
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双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
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> 工程默认配置使用AT-LINK SWD下载程序，在通过AT-LINK SWD连接开发板的基础上，点击下载按钮即可下载程序到开发板
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#### 运行结果
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下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，LED2/3/4 会周期性闪烁。
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连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，在串口上可以看到 RT-Thread 的输出信息:
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```bash
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\ | /
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- RT - Thread Operating System
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/ | \ 5.0.0 build Jan 18 2023 09:19:32
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2006 - 2022 Copyright by RT-Thread team
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msh />
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```
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## 注意事项
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可在雅特力官方网站进行所需资料下载，如Keil_v5/Keil_v4/IAR等pack安装包和AT-START开发板原理图等（www.arterytek.com）
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## 联系人信息
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维护人:
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- [sheltonyu]
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@@ -0,0 +1,14 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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cwd = str(Dir('#'))
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,59 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM in ['iccarm']:
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env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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at32_library = 'AT32F421_Firmware_Library'
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rtconfig.BSP_LIBRARY_TYPE = at32_library
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
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# include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))
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# make a building
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DoBuilding(TARGET, objs)
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@@ -0,0 +1,15 @@
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from building import *
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import os
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cwd = GetCurrentDir()
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src = Glob('*.c')
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CPPPATH = [cwd]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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group = group + SConscript(os.path.join(item, 'SConscript'))
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Return('group')
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@@ -0,0 +1,48 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-01-31 shelton first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "drv_common.h"
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#include "drv_gpio.h"
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/* defined the led2 pin: pf6 */
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#define LED2_PIN GET_PIN(F, 6)
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/* defined the led3 pin: pf7 */
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#define LED3_PIN GET_PIN(F, 7)
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/* defined the led4 pin: pb11 */
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#define LED4_PIN GET_PIN(B, 11)
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int main(void)
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{
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rt_uint32_t speed = 200;
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/* set led2 pin mode to output */
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rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
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/* set led3 pin mode to output */
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rt_pin_mode(LED3_PIN, PIN_MODE_OUTPUT);
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/* set led4 pin mode to output */
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rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
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while (1)
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{
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rt_pin_write(LED2_PIN, PIN_LOW);
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rt_thread_mdelay(speed);
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rt_pin_write(LED3_PIN, PIN_LOW);
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rt_thread_mdelay(speed);
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rt_pin_write(LED4_PIN, PIN_LOW);
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rt_thread_mdelay(speed);
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rt_pin_write(LED2_PIN, PIN_HIGH);
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rt_thread_mdelay(speed);
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rt_pin_write(LED3_PIN, PIN_HIGH);
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rt_thread_mdelay(speed);
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rt_pin_write(LED4_PIN, PIN_HIGH);
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rt_thread_mdelay(speed);
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}
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}
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@@ -0,0 +1,181 @@
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menu "Hardware Drivers Config"
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config SOC_AT32F421C8T7
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bool
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select SOC_SERIES_AT32F421
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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menu "Onboard Peripheral Drivers"
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config BSP_USING_SERIAL
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bool "Enable USART (uart1)"
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select BSP_USING_UART
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select BSP_USING_UART1
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default y
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endmenu
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menu "On-chip Peripheral Drivers"
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config BSP_USING_GPIO
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bool "Enable GPIO"
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select RT_USING_PIN
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default y
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config BSP_USING_ON_CHIP_FLASH
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bool "Enable on-chip FLASH"
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default n
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menuconfig BSP_USING_RTC
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bool "Enable RTC"
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select RT_USING_RTC
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default n
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if BSP_USING_RTC
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choice
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prompt "Select clock source"
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default BSP_RTC_USING_LEXT
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config BSP_RTC_USING_LEXT
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bool "RTC USING LEXT"
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config BSP_RTC_USING_LICK
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bool "RTC USING LICK"
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endchoice
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endif
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menuconfig BSP_USING_UART
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bool "Enable UART"
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default y
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select RT_USING_SERIAL
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if BSP_USING_UART
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config BSP_USING_UART1
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bool "Enable UART1"
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default y
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config BSP_UART1_RX_USING_DMA
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bool "Enable UART1 RX DMA"
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depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
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default n
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config BSP_USING_UART2
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bool "Enable UART2"
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default n
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config BSP_UART2_RX_USING_DMA
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bool "Enable UART2 RX DMA"
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depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
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default n
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endif
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menuconfig BSP_USING_PWM
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bool "Enable PWM"
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default n
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select RT_USING_PWM
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if BSP_USING_PWM
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menuconfig BSP_USING_PWM1
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bool "Enable timer1 output pwm"
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default n
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if BSP_USING_PWM1
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config BSP_USING_PWM1_CH1
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bool "Enable PWM1 channel1"
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default n
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config BSP_USING_PWM1_CH4
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bool "Enable PWM1 channel4"
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default n
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endif
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endif
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menuconfig BSP_USING_HWTIMER
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bool "Enable HWTIMER"
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default n
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select RT_USING_HWTIMER
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if BSP_USING_HWTIMER
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config BSP_USING_HWTMR3
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bool "Enable hardware timer3"
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||||
default n
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endif
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||||
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||||
menuconfig BSP_USING_SPI
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bool "Enable SPI BUS"
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||||
default n
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||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI1
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||||
bool "Enable SPI1 BUS"
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||||
default n
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||||
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||||
config BSP_SPI1_TX_USING_DMA
|
||||
bool "Enable SPI1 TX DMA"
|
||||
depends on BSP_USING_SPI1
|
||||
default n
|
||||
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||||
config BSP_SPI1_RX_USING_DMA
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||||
bool "Enable SPI1 RX DMA"
|
||||
depends on BSP_USING_SPI1
|
||||
select BSP_SPI1_TX_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI2
|
||||
bool "Enable SPI2 BUS"
|
||||
default n
|
||||
|
||||
config BSP_SPI2_TX_USING_DMA
|
||||
bool "Enable SPI2 TX DMA"
|
||||
depends on BSP_USING_SPI2
|
||||
default n
|
||||
|
||||
config BSP_SPI2_RX_USING_DMA
|
||||
bool "Enable SPI2 RX DMA"
|
||||
depends on BSP_USING_SPI2
|
||||
select BSP_SPI2_TX_USING_DMA
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C BUS (software simulation)"
|
||||
default n
|
||||
select RT_USING_I2C
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||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
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||||
if BSP_USING_I2C
|
||||
config BSP_USING_I2C1
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||||
bool "Enable I2C1 BUS"
|
||||
if BSP_USING_I2C1
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||||
config BSP_I2C1_SCL_PIN
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||||
int "i2c1 scl pin number"
|
||||
range 0 63
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||||
default 22
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 0 63
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||||
default 23
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endif
|
||||
config BSP_USING_I2C2
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||||
bool "Enable I2C2 BUS"
|
||||
if BSP_USING_I2C2
|
||||
config BSP_I2C2_SCL_PIN
|
||||
int "i2c2 scl pin number"
|
||||
range 0 63
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||||
default 26
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||||
config BSP_I2C2_SDA_PIN
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||||
int "I2C2 sda pin number"
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||||
range 0 63
|
||||
default 27
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC1
|
||||
bool "Enable ADC1"
|
||||
default n
|
||||
endif
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
@@ -0,0 +1,29 @@
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add general drivers
|
||||
src = Split('''
|
||||
src/board.c
|
||||
src/at32_msp.c
|
||||
''')
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/inc']
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
|
||||
if rtconfig.PLATFORM in ['gcc']:
|
||||
src += [startup_path_prefix + '/AT32F421_Firmware_Library/cmsis/cm4/device_support/startup/gcc/startup_at32f421.s']
|
||||
elif rtconfig.PLATFORM in ['armcc', 'armclang']:
|
||||
src += [startup_path_prefix + '/AT32F421_Firmware_Library/cmsis/cm4/device_support/startup/mdk/startup_at32f421.s']
|
||||
elif rtconfig.PLATFORM in ['iccarm']:
|
||||
src += [startup_path_prefix + '/AT32F421_Firmware_Library/cmsis/cm4/device_support/startup/iar/startup_at32f421.s']
|
||||
|
||||
CPPDEFINES = ['AT32F421C8T7']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-01-31 shelton first version
|
||||
*/
|
||||
|
||||
#ifndef __AT32_MSP_H__
|
||||
#define __AT32_MSP_H__
|
||||
|
||||
void at32_msp_usart_init(void *instance);
|
||||
void at32_msp_spi_init(void *instance);
|
||||
void at32_msp_tmr_init(void *instance);
|
||||
void at32_msp_adc_init(void *instance);
|
||||
void at32_msp_hwtmr_init(void *instance);
|
||||
|
||||
#endif /* __AT32_MSP_H__ */
|
||||
@@ -0,0 +1,134 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f421_conf.h
|
||||
* @brief at32f421 config header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F421_CONF_H
|
||||
#define __AT32F421_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the value of high speed exernal crystal (hext)
|
||||
* used in your application
|
||||
*
|
||||
* tip: to avoid modifying this file each time you need to use different hext, you
|
||||
* can define the hext value in your toolchain compiler preprocessor.
|
||||
*
|
||||
*/
|
||||
#if !defined HEXT_VALUE
|
||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the high speed exernal crystal (hext) startup
|
||||
* timeout value
|
||||
*/
|
||||
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
|
||||
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
|
||||
|
||||
/* module define -------------------------------------------------------------*/
|
||||
#define CRM_MODULE_ENABLED
|
||||
#define TMR_MODULE_ENABLED
|
||||
#define ERTC_MODULE_ENABLED
|
||||
#define GPIO_MODULE_ENABLED
|
||||
#define I2C_MODULE_ENABLED
|
||||
#define USART_MODULE_ENABLED
|
||||
#define PWC_MODULE_ENABLED
|
||||
#define ADC_MODULE_ENABLED
|
||||
#define SPI_MODULE_ENABLED
|
||||
#define DMA_MODULE_ENABLED
|
||||
#define DEBUG_MODULE_ENABLED
|
||||
#define FLASH_MODULE_ENABLED
|
||||
#define CRC_MODULE_ENABLED
|
||||
#define WWDT_MODULE_ENABLED
|
||||
#define WDT_MODULE_ENABLED
|
||||
#define EXINT_MODULE_ENABLED
|
||||
#define MISC_MODULE_ENABLED
|
||||
#define SCFG_MODULE_ENABLED
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#ifdef CRM_MODULE_ENABLED
|
||||
#include "at32f421_crm.h"
|
||||
#endif
|
||||
#ifdef TMR_MODULE_ENABLED
|
||||
#include "at32f421_tmr.h"
|
||||
#endif
|
||||
#ifdef ERTC_MODULE_ENABLED
|
||||
#include "at32f421_ertc.h"
|
||||
#endif
|
||||
#ifdef GPIO_MODULE_ENABLED
|
||||
#include "at32f421_gpio.h"
|
||||
#endif
|
||||
#ifdef I2C_MODULE_ENABLED
|
||||
#include "at32f421_i2c.h"
|
||||
#endif
|
||||
#ifdef USART_MODULE_ENABLED
|
||||
#include "at32f421_usart.h"
|
||||
#endif
|
||||
#ifdef PWC_MODULE_ENABLED
|
||||
#include "at32f421_pwc.h"
|
||||
#endif
|
||||
#ifdef ADC_MODULE_ENABLED
|
||||
#include "at32f421_adc.h"
|
||||
#endif
|
||||
#ifdef SPI_MODULE_ENABLED
|
||||
#include "at32f421_spi.h"
|
||||
#endif
|
||||
#ifdef DMA_MODULE_ENABLED
|
||||
#include "at32f421_dma.h"
|
||||
#endif
|
||||
#ifdef DEBUG_MODULE_ENABLED
|
||||
#include "at32f421_debug.h"
|
||||
#endif
|
||||
#ifdef FLASH_MODULE_ENABLED
|
||||
#include "at32f421_flash.h"
|
||||
#endif
|
||||
#ifdef CRC_MODULE_ENABLED
|
||||
#include "at32f421_crc.h"
|
||||
#endif
|
||||
#ifdef WWDT_MODULE_ENABLED
|
||||
#include "at32f421_wwdt.h"
|
||||
#endif
|
||||
#ifdef WDT_MODULE_ENABLED
|
||||
#include "at32f421_wdt.h"
|
||||
#endif
|
||||
#ifdef EXINT_MODULE_ENABLED
|
||||
#include "at32f421_exint.h"
|
||||
#endif
|
||||
#ifdef MISC_MODULE_ENABLED
|
||||
#include "at32f421_misc.h"
|
||||
#endif
|
||||
#ifdef SCFG_MODULE_ENABLED
|
||||
#include "at32f421_scfg.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,52 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-01-31 shelton first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "at32f421.h"
|
||||
#include "at32_msp.h"
|
||||
#include "drv_common.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define AT32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||
#define FLASH_PAGE_SIZE (1 * 1024)
|
||||
#define AT32_FLASH_SIZE (64 * 1024)
|
||||
#define AT32_FLASH_END_ADDRESS ((uint32_t)(AT32_FLASH_START_ADRESS + AT32_FLASH_SIZE))
|
||||
|
||||
/* internal sram memory size[kbytes] <16>, default: 16*/
|
||||
#define AT32_SRAM_SIZE 16
|
||||
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END AT32_SRAM_END
|
||||
|
||||
void system_clock_config(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
@@ -0,0 +1,156 @@
|
||||
/*
|
||||
* linker script for AT32 with GNU ld
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 64k /* 64KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 16k /* 16K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00010000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00010000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00004000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,185 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-01-31 shelton first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "at32f421.h"
|
||||
#include "at32_msp.h"
|
||||
|
||||
#ifdef BSP_USING_UART
|
||||
void at32_msp_usart_init(void *instance)
|
||||
{
|
||||
gpio_init_type gpio_init_struct;
|
||||
usart_type *usart_x = (usart_type *)instance;
|
||||
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
#ifdef BSP_USING_UART1
|
||||
if(USART1 == usart_x)
|
||||
{
|
||||
crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_9;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_10;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_1);
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_1);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART2
|
||||
if(USART2 == usart_x)
|
||||
{
|
||||
crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_2;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_1);
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_1);
|
||||
}
|
||||
#endif
|
||||
/* add others */
|
||||
}
|
||||
#endif /* BSP_USING_SERIAL */
|
||||
|
||||
#ifdef BSP_USING_SPI
|
||||
void at32_msp_spi_init(void *instance)
|
||||
{
|
||||
gpio_init_type gpio_init_struct;
|
||||
spi_type *spi_x = (spi_type *)instance;
|
||||
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
#ifdef BSP_USING_SPI1
|
||||
if(SPI1 == spi_x)
|
||||
{
|
||||
crm_periph_clock_enable(CRM_SPI1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_4;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE5, GPIO_MUX_0);
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_0);
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_0);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI2
|
||||
if(SPI2 == spi_x)
|
||||
{
|
||||
crm_periph_clock_enable(CRM_SPI2_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init(GPIOB, &gpio_init_struct);
|
||||
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_13 | GPIO_PINS_14 | GPIO_PINS_15;
|
||||
gpio_init(GPIOB, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE13, GPIO_MUX_0);
|
||||
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE14, GPIO_MUX_0);
|
||||
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE15, GPIO_MUX_0);
|
||||
}
|
||||
#endif
|
||||
/* add others */
|
||||
}
|
||||
#endif /* BSP_USING_SPI */
|
||||
|
||||
#ifdef BSP_USING_PWM
|
||||
void at32_msp_tmr_init(void *instance)
|
||||
{
|
||||
gpio_init_type gpio_init_struct;
|
||||
tmr_type *tmr_x = (tmr_type *)instance;
|
||||
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
if(tmr_x == TMR1)
|
||||
{
|
||||
/* tmr1 clock enable */
|
||||
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
|
||||
/* gpioa clock enable */
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* gpioa configuration: tmr1 channel1 and channel4 as alternate function push-pull */
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_8 | GPIO_PINS_11;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_2);
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_2);
|
||||
}
|
||||
/* add others */
|
||||
}
|
||||
#endif /* BSP_USING_PWM */
|
||||
|
||||
#ifdef BSP_USING_ADC
|
||||
void at32_msp_adc_init(void *instance)
|
||||
{
|
||||
gpio_init_type gpio_init_struct;
|
||||
adc_type *adc_x = (adc_type *)instance;
|
||||
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
|
||||
#ifdef BSP_USING_ADC1
|
||||
if(adc_x == ADC1)
|
||||
{
|
||||
/* adc1 & gpio clock enable */
|
||||
crm_periph_clock_enable(CRM_ADC1_PERIPH_CLOCK, TRUE);
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* configure adc channel as analog input */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_ANALOG;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif /* BSP_USING_ADC */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER
|
||||
void at32_msp_hwtmr_init(void *instance)
|
||||
{
|
||||
tmr_type *tmr_x = (tmr_type *)instance;
|
||||
|
||||
#ifdef BSP_USING_HWTMR3
|
||||
if(tmr_x == TMR3)
|
||||
{
|
||||
/* tmr3 clock enable */
|
||||
crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-01-31 shelton first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
void system_clock_config(void)
|
||||
{
|
||||
/* config flash psr register */
|
||||
flash_psr_set(FLASH_WAIT_CYCLE_3);
|
||||
|
||||
/* reset crm */
|
||||
crm_reset();
|
||||
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
|
||||
|
||||
/* wait till hext is ready */
|
||||
while(crm_hext_stable_wait() == ERROR)
|
||||
{
|
||||
}
|
||||
|
||||
/* config pll clock resource */
|
||||
crm_pll_config(CRM_PLL_SOURCE_HEXT, CRM_PLL_MULT_15);
|
||||
|
||||
/* enable pll */
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
|
||||
|
||||
/* wait till pll is ready */
|
||||
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
|
||||
{
|
||||
}
|
||||
|
||||
/* config ahbclk */
|
||||
crm_ahb_div_set(CRM_AHB_DIV_1);
|
||||
|
||||
/* config apb2clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
|
||||
crm_apb2_div_set(CRM_APB2_DIV_1);
|
||||
|
||||
/* config apb1clk, the maximum frequency of APB1/APB2 clock is 120 MHz */
|
||||
crm_apb1_div_set(CRM_APB1_DIV_1);
|
||||
|
||||
/* enable auto step mode */
|
||||
crm_auto_step_mode_enable(TRUE);
|
||||
|
||||
/* select pll as system clock source */
|
||||
crm_sysclk_switch(CRM_SCLK_PLL);
|
||||
|
||||
/* wait till pll is used as system clock source */
|
||||
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
|
||||
{
|
||||
}
|
||||
|
||||
/* disable auto step mode */
|
||||
crm_auto_step_mode_enable(FALSE);
|
||||
|
||||
/* update system_core_clock global variable */
|
||||
system_core_clock_update();
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,169 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_PAGE_MAX_ORDER 11
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_MEMHEAP_FAST_MODE
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50000
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M4
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
#define SOC_FAMILY_AT32
|
||||
#define SOC_SERIES_AT32F421
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_AT32F421C8T7
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_SERIAL
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,150 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m4'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iccarm'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M4.fp '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iccarm':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M4'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=VFPv4_sp'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M4'
|
||||
AFLAGS += ' --fpu VFPv4_sp'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,167 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>8000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>0</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<tPdscDbg>0</tPdscDbg>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>12</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"AT-Link-EZ CMSIS-DAP" -U8B9D19510040A44401170802 -O78 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -FO7 -FD20000000 -FC800 -FN1 -FF0AT32F421_64 -FS08000000 -FL010000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U788529815 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0AT32F403A_1024 -FS08000000 -FL0100000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC800 -FD20000000 -FF0AT32F421_64 -FL010000 -FS08000000</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>1</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,185 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>3</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F4212_64 -FL010000 -FS08000000 -FP0($$Device:-AT32F4212C8T7$Flash\AT32F4212_64.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"Any" -UAny -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0AT32F4212_64.FLM -FS08000000 -FL010000 -FP0($$Device:-AT32F4212C8T7$Flash\AT32F4212_64.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,21 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "board/Kconfig"
|
||||
@@ -0,0 +1,129 @@
|
||||
# AT32F425 AT-START 开发板 BSP 说明
|
||||
|
||||
## 简介
|
||||
|
||||
AT32F425 AT-START是雅特力推出的一款AT32F425系列的评估板，其搭载的MCU主要资源参数如下：
|
||||
|
||||
| 硬件 | 描述 |
|
||||
| --------- | ------------- |
|
||||
| 芯片型号 | AT32F425R8T7 |
|
||||
| CPU | ARM Cortex M4 |
|
||||
| 主频 | 96M |
|
||||
| 片内SRAM | 20K |
|
||||
| 片内FLASH | 64K |
|
||||
|
||||
## 编译说明
|
||||
|
||||
AT32F425-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
|
||||
|
||||
| IDE/编译器 | 已测试版本 |
|
||||
| ---------- | ---------------------------- |
|
||||
| MDK4 | MDK4.74 |
|
||||
| MDK5 | MDK531 |
|
||||
| IAR | IAR8.20 |
|
||||
| GCC | GCC 5.4.1 20160919 (release) |
|
||||
|
||||
## 板载资源
|
||||
|
||||
- MCU：AT32F425R8T7，主频 96MHz，64KB FLASH ，20KB RAM
|
||||
- 常用外设
|
||||
- LED：3个，（红色PC2、黄色PC3、绿色PC5）
|
||||
- 按键：1个，KEY_USER（兼具唤醒功能，PA0)
|
||||
- 常用接口：插针串口J8
|
||||
- 调试接口，板载的 AT-LINK SWD 下载
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设驱动的支持情况如下：
|
||||
|
||||
| 驱动 | 支持情况 | 备注 |
|
||||
| --------- | -------- | :------------------------: |
|
||||
| UART | 支持 | USART1/2/3 |
|
||||
| GPIO | 支持 | PA0...PF7 |
|
||||
| IIC | 支持 | GPIO模拟I2C |
|
||||
| SPI | 支持 | SPI1/2 |
|
||||
| ADC | 支持 | ADC1 |
|
||||
| PWM | 支持 | TMR1/2 |
|
||||
| HWTIMER | 支持 | TMR3 |
|
||||
| CAN | 支持 | CAN1 |
|
||||
| WDT | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
| FLASH | 支持 | |
|
||||
|
||||
### IO在板级支持包中的映射情况
|
||||
|
||||
| IO号 | 板级包中的定义 |
|
||||
| ---- | -------------- |
|
||||
| PC2 | LED2 |
|
||||
| PC3 | LED3 |
|
||||
| PC5 | LED4 |
|
||||
| PA9 | USART1_TX |
|
||||
| PA10 | USART1_RX |
|
||||
| PA2 | USART2_TX |
|
||||
| PA3 | USART2_RX |
|
||||
| PB10 | USART3_TX |
|
||||
| PB11 | USART3_RX |
|
||||
| PA4 | SPI1_NSS |
|
||||
| PA5 | SPI1_SCK |
|
||||
| PA6 | SPI1_MISO |
|
||||
| PA7 | SPI1_MOSI |
|
||||
| PB12 | SPI2_NSS |
|
||||
| PB13 | SPI2_SCK |
|
||||
| PB14 | SPI2_MISO |
|
||||
| PB15 | SPI2_MOSI |
|
||||
| PB6 | I2C1_SCL |
|
||||
| PB7 | I2C1_SDA |
|
||||
| PA8 | PWM_TMR1_CH1 |
|
||||
| PA11 | PWM_TMR1_CH4 |
|
||||
| PA0 | PWM_TMR2_CH1 |
|
||||
| PA1 | PWM_TMR2_CH2 |
|
||||
| PC0 | ADC1_IN10 |
|
||||
| PC1 | ADC1_IN11 |
|
||||
| PC2 | ADC1_IN12 |
|
||||
| PC3 | ADC1_IN13 |
|
||||
| PC4 | ADC1_IN14 |
|
||||
| PC5 | ADC1_IN15 |
|
||||
| PB8 | CAN1_RX |
|
||||
| PB9 | CAN1_TX |
|
||||
|
||||
## 使用说明
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
#### 硬件连接
|
||||
|
||||
使用数据线连接开发板到 PC，打开电源开关。
|
||||
|
||||
#### 编译下载
|
||||
|
||||
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
|
||||
|
||||
> 工程默认配置使用AT-LINK SWD下载程序，在通过AT-LINK SWD连接开发板的基础上，点击下载按钮即可下载程序到开发板
|
||||
|
||||
#### 运行结果
|
||||
|
||||
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，LED2/3/4 会周期性闪烁。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，在串口上可以看到 RT-Thread 的输出信息:
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 5.0.0 build Jan 29 2023 17:05:16
|
||||
2006 - 2022 Copyright by RT-Thread team
|
||||
msh >
|
||||
```
|
||||
|
||||
## 注意事项
|
||||
|
||||
可在雅特力官方网站进行所需资料下载，如Keil_v5/Keil_v4/IAR等pack安装包和AT-START开发板原理图等（www.arterytek.com）
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [sheltonyu]
|
||||
@@ -0,0 +1,14 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
|
||||
cwd = str(Dir('#'))
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,59 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
at32_library = 'AT32F425_Firmware_Library'
|
||||
rtconfig.BSP_LIBRARY_TYPE = at32_library
|
||||
|
||||
# include libraries
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,15 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,29 @@
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add general drivers
|
||||
src = Split('''
|
||||
src/board.c
|
||||
src/at32_msp.c
|
||||
''')
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/inc']
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
|
||||
if rtconfig.PLATFORM in ['gcc']:
|
||||
src += [startup_path_prefix + '/AT32F425_Firmware_Library/cmsis/cm4/device_support/startup/gcc/startup_at32f425.s']
|
||||
elif rtconfig.PLATFORM in ['armcc', 'armclang']:
|
||||
src += [startup_path_prefix + '/AT32F425_Firmware_Library/cmsis/cm4/device_support/startup/mdk/startup_at32f425.s']
|
||||
elif rtconfig.PLATFORM in ['iccarm']:
|
||||
src += [startup_path_prefix + '/AT32F425_Firmware_Library/cmsis/cm4/device_support/startup/iar/startup_at32f425.s']
|
||||
|
||||
CPPDEFINES = ['AT32F425C8T7']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
Return('group')
|
||||
@@ -0,0 +1,21 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-01-31 shelton first version
|
||||
*/
|
||||
|
||||
#ifndef __AT32_MSP_H__
|
||||
#define __AT32_MSP_H__
|
||||
|
||||
void at32_msp_usart_init(void *instance);
|
||||
void at32_msp_spi_init(void *instance);
|
||||
void at32_msp_tmr_init(void *instance);
|
||||
void at32_msp_adc_init(void *instance);
|
||||
void at32_msp_hwtmr_init(void *instance);
|
||||
void at32_msp_can_init(void *instance);
|
||||
|
||||
#endif /* __AT32_MSP_H__ */
|
||||
@@ -0,0 +1,144 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f425_conf.h
|
||||
* @brief at32f425 config header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F425_CONF_H
|
||||
#define __AT32F425_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the value of high speed exernal crystal (hext)
|
||||
* used in your application
|
||||
*
|
||||
* tip: to avoid modifying this file each time you need to use different hext, you
|
||||
* can define the hext value in your toolchain compiler preprocessor.
|
||||
*
|
||||
*/
|
||||
#if !defined HEXT_VALUE
|
||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the high speed exernal crystal (hext) startup
|
||||
* timeout value
|
||||
*/
|
||||
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
|
||||
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
|
||||
|
||||
/* module define -------------------------------------------------------------*/
|
||||
#define ACC_MODULE_ENABLED
|
||||
#define CRM_MODULE_ENABLED
|
||||
#define TMR_MODULE_ENABLED
|
||||
#define ERTC_MODULE_ENABLED
|
||||
#define GPIO_MODULE_ENABLED
|
||||
#define I2C_MODULE_ENABLED
|
||||
#define CAN_MODULE_ENABLED
|
||||
#define USB_MODULE_ENABLED
|
||||
#define USART_MODULE_ENABLED
|
||||
#define PWC_MODULE_ENABLED
|
||||
#define ADC_MODULE_ENABLED
|
||||
#define SPI_MODULE_ENABLED
|
||||
#define DMA_MODULE_ENABLED
|
||||
#define DEBUG_MODULE_ENABLED
|
||||
#define FLASH_MODULE_ENABLED
|
||||
#define CRC_MODULE_ENABLED
|
||||
#define WWDT_MODULE_ENABLED
|
||||
#define WDT_MODULE_ENABLED
|
||||
#define EXINT_MODULE_ENABLED
|
||||
#define MISC_MODULE_ENABLED
|
||||
#define SCFG_MODULE_ENABLED
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#ifdef ACC_MODULE_ENABLED
|
||||
#include "at32f425_acc.h"
|
||||
#endif
|
||||
#ifdef CRM_MODULE_ENABLED
|
||||
#include "at32f425_crm.h"
|
||||
#endif
|
||||
#ifdef CAN_MODULE_ENABLED
|
||||
#include "at32f425_can.h"
|
||||
#endif
|
||||
#ifdef USB_MODULE_ENABLED
|
||||
#include "at32f425_usb.h"
|
||||
#endif
|
||||
#ifdef TMR_MODULE_ENABLED
|
||||
#include "at32f425_tmr.h"
|
||||
#endif
|
||||
#ifdef ERTC_MODULE_ENABLED
|
||||
#include "at32f425_ertc.h"
|
||||
#endif
|
||||
#ifdef GPIO_MODULE_ENABLED
|
||||
#include "at32f425_gpio.h"
|
||||
#endif
|
||||
#ifdef I2C_MODULE_ENABLED
|
||||
#include "at32f425_i2c.h"
|
||||
#endif
|
||||
#ifdef USART_MODULE_ENABLED
|
||||
#include "at32f425_usart.h"
|
||||
#endif
|
||||
#ifdef PWC_MODULE_ENABLED
|
||||
#include "at32f425_pwc.h"
|
||||
#endif
|
||||
#ifdef ADC_MODULE_ENABLED
|
||||
#include "at32f425_adc.h"
|
||||
#endif
|
||||
#ifdef SPI_MODULE_ENABLED
|
||||
#include "at32f425_spi.h"
|
||||
#endif
|
||||
#ifdef DMA_MODULE_ENABLED
|
||||
#include "at32f425_dma.h"
|
||||
#endif
|
||||
#ifdef DEBUG_MODULE_ENABLED
|
||||
#include "at32f425_debug.h"
|
||||
#endif
|
||||
#ifdef FLASH_MODULE_ENABLED
|
||||
#include "at32f425_flash.h"
|
||||
#endif
|
||||
#ifdef CRC_MODULE_ENABLED
|
||||
#include "at32f425_crc.h"
|
||||
#endif
|
||||
#ifdef WWDT_MODULE_ENABLED
|
||||
#include "at32f425_wwdt.h"
|
||||
#endif
|
||||
#ifdef WDT_MODULE_ENABLED
|
||||
#include "at32f425_wdt.h"
|
||||
#endif
|
||||
#ifdef EXINT_MODULE_ENABLED
|
||||
#include "at32f425_exint.h"
|
||||
#endif
|
||||
#ifdef MISC_MODULE_ENABLED
|
||||
#include "at32f425_misc.h"
|
||||
#endif
|
||||
#ifdef SCFG_MODULE_ENABLED
|
||||
#include "at32f425_scfg.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,52 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-05-11 shelton first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "at32f425.h"
|
||||
#include "at32_msp.h"
|
||||
#include "drv_common.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define AT32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||
#define FLASH_PAGE_SIZE (1 * 1024)
|
||||
#define AT32_FLASH_SIZE (64 * 1024)
|
||||
#define AT32_FLASH_END_ADDRESS ((uint32_t)(AT32_FLASH_START_ADRESS + AT32_FLASH_SIZE))
|
||||
|
||||
/* internal sram memory size[kbytes] <20>, default: 20*/
|
||||
#define AT32_SRAM_SIZE 20
|
||||
#define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
|
||||
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
|
||||
#define HEAP_END AT32_SRAM_END
|
||||
|
||||
void system_clock_config(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
@@ -0,0 +1,156 @@
|
||||
/*
|
||||
* linker script for AT32 with GNU ld
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 64k /* 64KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 32k /* 20K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00010000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00010000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00005000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,58 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-01-31 shelton first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
void system_clock_config(void)
|
||||
{
|
||||
/* config flash psr register */
|
||||
flash_psr_set(FLASH_WAIT_CYCLE_2);
|
||||
|
||||
/* reset crm */
|
||||
crm_reset();
|
||||
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
|
||||
|
||||
/* wait till hext is ready */
|
||||
while(crm_hext_stable_wait() == ERROR)
|
||||
{
|
||||
}
|
||||
|
||||
/* config pll clock resource */
|
||||
crm_pll_config(CRM_PLL_SOURCE_HEXT, CRM_PLL_MULT_12);
|
||||
|
||||
/* enable pll */
|
||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
|
||||
|
||||
/* wait till pll is ready */
|
||||
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
|
||||
{
|
||||
}
|
||||
|
||||
/* config ahbclk */
|
||||
crm_ahb_div_set(CRM_AHB_DIV_1);
|
||||
|
||||
/* config apb2clk, the maximum frequency of APB1/APB2 clock is 96 MHz */
|
||||
crm_apb2_div_set(CRM_APB2_DIV_1);
|
||||
|
||||
/* config apb1clk, the maximum frequency of APB1/APB2 clock is 96 MHz */
|
||||
crm_apb1_div_set(CRM_APB1_DIV_1);
|
||||
|
||||
/* select pll as system clock source */
|
||||
crm_sysclk_switch(CRM_SCLK_PLL);
|
||||
|
||||
/* wait till pll is used as system clock source */
|
||||
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
|
||||
{
|
||||
}
|
||||
|
||||
/* update system_core_clock global variable */
|
||||
system_core_clock_update();
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\project.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,169 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_PAGE_MAX_ORDER 11
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_MEMHEAP_FAST_MODE
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50000
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M4
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
#define SOC_FAMILY_AT32
|
||||
#define SOC_SERIES_AT32F425
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_AT32F425R8T7
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_SERIAL
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,150 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m4'
|
||||
CROSS_TOOL='gcc'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iccarm'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfloat-abi=soft -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M4.fp '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iccarm':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M4'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=VFPv4_sp'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M4'
|
||||
AFLAGS += ' --fpu VFPv4_sp'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,10 @@
|
||||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\template.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
@@ -0,0 +1,167 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>8000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>0</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<tPdscDbg>0</tPdscDbg>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>12</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"AT-Link-EZ CMSIS-DAP" -U7169593300C0636C0A972902 -O78 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -FO7 -FD20000000 -FC800 -FN1 -FF0AT32F425_64 -FS08000000 -FL010000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U788529815 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0AT32F403A_1024 -FS08000000 -FL0100000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FN1 -FC800 -FD20000000 -FF0AT32F425_64 -FL10000 -FS08000000</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>1</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,185 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>3</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0AT32F425_64 -FL010000 -FS08000000 -FP0($$Device:-AT32F425R8T7$Flash\AT32F425_64.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"Any" -UAny -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0AT32F425_64.FLM -FS08000000 -FL010000 -FP0($$Device:-AT32F425R8T7$Flash\AT32F425_64.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,40 @@
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
# get current directory
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# The set of source files associated with this SConscript file.
|
||||
src = Split("""
|
||||
cmsis/cm4/device_support/system_at32f421.c
|
||||
drivers/src/at32f421_adc.c
|
||||
drivers/src/at32f421_cmp.c
|
||||
drivers/src/at32f421_crc.c
|
||||
drivers/src/at32f421_crm.c
|
||||
drivers/src/at32f421_debug.c
|
||||
drivers/src/at32f421_dma.c
|
||||
drivers/src/at32f421_ertc.c
|
||||
drivers/src/at32f421_exint.c
|
||||
drivers/src/at32f421_flash.c
|
||||
drivers/src/at32f421_gpio.c
|
||||
drivers/src/at32f421_i2c.c
|
||||
drivers/src/at32f421_misc.c
|
||||
drivers/src/at32f421_pwc.c
|
||||
drivers/src/at32f421_scfg.c
|
||||
drivers/src/at32f421_spi.c
|
||||
drivers/src/at32f421_tmr.c
|
||||
drivers/src/at32f421_usart.c
|
||||
drivers/src/at32f421_wdt.c
|
||||
drivers/src/at32f421_wwdt.c
|
||||
""")
|
||||
|
||||
path = [
|
||||
cwd + '/cmsis/cm4/device_support',
|
||||
cwd + '/cmsis/cm4/core_support',
|
||||
cwd + '/drivers/inc',]
|
||||
|
||||
CPPDEFINES = ['USE_STDPERIPH_DRIVER']
|
||||
|
||||
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
+517
File diff suppressed because it is too large
Load Diff
+76
@@ -0,0 +1,76 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len16;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len32;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len64;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len128;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len256;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len512;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048;
|
||||
extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096;
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#endif
|
||||
+348
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+1467
File diff suppressed because it is too large
Load Diff
+1893
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,39 @@
|
||||
/******************************************************************************
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.4
|
||||
* @date 23. July 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+134
@@ -0,0 +1,134 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f421_conf.h
|
||||
* @brief at32f421 config header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F421_CONF_H
|
||||
#define __AT32F421_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the value of high speed exernal crystal (hext)
|
||||
* used in your application
|
||||
*
|
||||
* tip: to avoid modifying this file each time you need to use different hext, you
|
||||
* can define the hext value in your toolchain compiler preprocessor.
|
||||
*
|
||||
*/
|
||||
#if !defined HEXT_VALUE
|
||||
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief in the following line adjust the high speed exernal crystal (hext) startup
|
||||
* timeout value
|
||||
*/
|
||||
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
|
||||
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
|
||||
|
||||
/* module define -------------------------------------------------------------*/
|
||||
#define CRM_MODULE_ENABLED
|
||||
#define TMR_MODULE_ENABLED
|
||||
#define ERTC_MODULE_ENABLED
|
||||
#define GPIO_MODULE_ENABLED
|
||||
#define I2C_MODULE_ENABLED
|
||||
#define USART_MODULE_ENABLED
|
||||
#define PWC_MODULE_ENABLED
|
||||
#define ADC_MODULE_ENABLED
|
||||
#define SPI_MODULE_ENABLED
|
||||
#define DMA_MODULE_ENABLED
|
||||
#define DEBUG_MODULE_ENABLED
|
||||
#define FLASH_MODULE_ENABLED
|
||||
#define CRC_MODULE_ENABLED
|
||||
#define WWDT_MODULE_ENABLED
|
||||
#define WDT_MODULE_ENABLED
|
||||
#define EXINT_MODULE_ENABLED
|
||||
#define MISC_MODULE_ENABLED
|
||||
#define SCFG_MODULE_ENABLED
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#ifdef CRM_MODULE_ENABLED
|
||||
#include "at32f421_crm.h"
|
||||
#endif
|
||||
#ifdef TMR_MODULE_ENABLED
|
||||
#include "at32f421_tmr.h"
|
||||
#endif
|
||||
#ifdef ERTC_MODULE_ENABLED
|
||||
#include "at32f421_ertc.h"
|
||||
#endif
|
||||
#ifdef GPIO_MODULE_ENABLED
|
||||
#include "at32f421_gpio.h"
|
||||
#endif
|
||||
#ifdef I2C_MODULE_ENABLED
|
||||
#include "at32f421_i2c.h"
|
||||
#endif
|
||||
#ifdef USART_MODULE_ENABLED
|
||||
#include "at32f421_usart.h"
|
||||
#endif
|
||||
#ifdef PWC_MODULE_ENABLED
|
||||
#include "at32f421_pwc.h"
|
||||
#endif
|
||||
#ifdef ADC_MODULE_ENABLED
|
||||
#include "at32f421_adc.h"
|
||||
#endif
|
||||
#ifdef SPI_MODULE_ENABLED
|
||||
#include "at32f421_spi.h"
|
||||
#endif
|
||||
#ifdef DMA_MODULE_ENABLED
|
||||
#include "at32f421_dma.h"
|
||||
#endif
|
||||
#ifdef DEBUG_MODULE_ENABLED
|
||||
#include "at32f421_debug.h"
|
||||
#endif
|
||||
#ifdef FLASH_MODULE_ENABLED
|
||||
#include "at32f421_flash.h"
|
||||
#endif
|
||||
#ifdef CRC_MODULE_ENABLED
|
||||
#include "at32f421_crc.h"
|
||||
#endif
|
||||
#ifdef WWDT_MODULE_ENABLED
|
||||
#include "at32f421_wwdt.h"
|
||||
#endif
|
||||
#ifdef WDT_MODULE_ENABLED
|
||||
#include "at32f421_wdt.h"
|
||||
#endif
|
||||
#ifdef EXINT_MODULE_ENABLED
|
||||
#include "at32f421_exint.h"
|
||||
#endif
|
||||
#ifdef MISC_MODULE_ENABLED
|
||||
#include "at32f421_misc.h"
|
||||
#endif
|
||||
#ifdef SCFG_MODULE_ENABLED
|
||||
#include "at32f421_scfg.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
+153
@@ -0,0 +1,153 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : AT32F421x4_FLASH.ld
|
||||
**
|
||||
** Abstract : Linker script for AT32F421x4 Device with
|
||||
** 16KByte FLASH, 8KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
**
|
||||
** Environment : Arm gcc toolchain
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20002000; /* end of RAM */
|
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 16K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
+153
@@ -0,0 +1,153 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : AT32F421x6_FLASH.ld
|
||||
**
|
||||
** Abstract : Linker script for AT32F421x6 Device with
|
||||
** 32KByte FLASH, 16KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
**
|
||||
** Environment : Arm gcc toolchain
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20004000; /* end of RAM */
|
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
+153
@@ -0,0 +1,153 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : AT32F421x8_FLASH.ld
|
||||
**
|
||||
** Abstract : Linker script for AT32F421x8 Device with
|
||||
** 64KByte FLASH, 16KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
**
|
||||
** Environment : Arm gcc toolchain
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20004000; /* end of RAM */
|
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
+285
File diff suppressed because it is too large
Load Diff
+30
@@ -0,0 +1,30 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x08003FFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x1000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
+30
@@ -0,0 +1,30 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x1000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
+30
@@ -0,0 +1,30 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x1000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
+280
File diff suppressed because it is too large
Load Diff
+244
File diff suppressed because it is too large
Load Diff
+232
File diff suppressed because it is too large
Load Diff
+85
@@ -0,0 +1,85 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file system_at32f421.h
|
||||
* @brief cmsis cortex-m4 system header file.
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
#ifndef __SYSTEM_AT32F421_H
|
||||
#define __SYSTEM_AT32F421_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup AT32F421_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup AT32F421_system_clock_stable_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define HEXT_STABLE_DELAY (5000u)
|
||||
#define PLL_STABLE_DELAY (500u)
|
||||
#define SystemCoreClock system_core_clock
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AT32F421_system_exported_variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern unsigned int system_core_clock; /*!< system clock frequency (core clock) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup AT32F421_system_exported_functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void system_core_clock_update(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,170 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f421_crc.h
|
||||
* @brief at32f421 crc header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F421_CRC_H
|
||||
#define __AT32F421_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* includes ------------------------------------------------------------------*/
|
||||
#include "at32f421.h"
|
||||
|
||||
/** @addtogroup AT32F421_periph_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_exported_types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief crc reverse input data
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRC_REVERSE_INPUT_NO_AFFECTE = 0x00, /*!< input data no reverse */
|
||||
CRC_REVERSE_INPUT_BY_BYTE = 0x01, /*!< input data reverse by byte */
|
||||
CRC_REVERSE_INPUT_BY_HALFWORD = 0x02, /*!< input data reverse by half word */
|
||||
CRC_REVERSE_INPUT_BY_WORD = 0x03 /*!< input data reverse by word */
|
||||
} crc_reverse_input_type;
|
||||
|
||||
/**
|
||||
* @brief crc reverse output data
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CRC_REVERSE_OUTPUT_NO_AFFECTE = 0x00, /*!< output data no reverse */
|
||||
CRC_REVERSE_OUTPUT_DATA = 0x01 /*!< output data reverse by word */
|
||||
} crc_reverse_output_type;
|
||||
|
||||
/**
|
||||
* @brief type define crc register all
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* @brief crc dt register, offset:0x00
|
||||
*/
|
||||
union
|
||||
{
|
||||
__IO uint32_t dt;
|
||||
struct
|
||||
{
|
||||
__IO uint32_t dt : 32; /* [31:0] */
|
||||
} dt_bit;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief crc cdt register, offset:0x04
|
||||
*/
|
||||
union
|
||||
{
|
||||
__IO uint32_t cdt;
|
||||
struct
|
||||
{
|
||||
__IO uint32_t cdt : 8 ; /* [7:0] */
|
||||
__IO uint32_t reserved1 : 24 ;/* [31:8] */
|
||||
} cdt_bit;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief crc ctrl register, offset:0x08
|
||||
*/
|
||||
union
|
||||
{
|
||||
__IO uint32_t ctrl;
|
||||
struct
|
||||
{
|
||||
__IO uint32_t rst : 1 ; /* [0] */
|
||||
__IO uint32_t reserved1 : 4 ; /* [4:1] */
|
||||
__IO uint32_t revid : 2 ; /* [6:5] */
|
||||
__IO uint32_t revod : 1 ; /* [7] */
|
||||
__IO uint32_t reserved2 : 24 ;/* [31:8] */
|
||||
} ctrl_bit;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief crm reserved1 register, offset:0x0C
|
||||
*/
|
||||
__IO uint32_t reserved1;
|
||||
|
||||
/**
|
||||
* @brief crc idt register, offset:0x10
|
||||
*/
|
||||
union
|
||||
{
|
||||
__IO uint32_t idt;
|
||||
struct
|
||||
{
|
||||
__IO uint32_t idt : 32; /* [31:0] */
|
||||
} idt_bit;
|
||||
};
|
||||
|
||||
} crc_type;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define CRC ((crc_type *) CRC_BASE)
|
||||
|
||||
/** @defgroup CRC_exported_functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void crc_data_reset(void);
|
||||
uint32_t crc_one_word_calculate(uint32_t data);
|
||||
uint32_t crc_block_calculate(uint32_t *pbuffer, uint32_t length);
|
||||
uint32_t crc_data_get(void);
|
||||
void crc_common_data_set(uint8_t cdt_value);
|
||||
uint8_t crc_common_data_get(void);
|
||||
void crc_init_data_set(uint32_t value);
|
||||
void crc_reverse_input_data_set(crc_reverse_input_type value);
|
||||
void crc_reverse_output_data_set(crc_reverse_output_type value);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,156 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f421_debug.h
|
||||
* @brief at32f421 debug header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F421_DEBUG_H
|
||||
#define __AT32F421_DEBUG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "at32f421.h"
|
||||
|
||||
/** @addtogroup AT32F421_periph_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DEBUG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DEBUG_mode_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define DEBUG_SLEEP 0x00000001 /*!< debug sleep mode */
|
||||
#define DEBUG_DEEPSLEEP 0x00000002 /*!< debug deepsleep mode */
|
||||
#define DEBUG_STANDBY 0x00000004 /*!< debug standby mode */
|
||||
#define DEBUG_WDT_PAUSE 0x00000100 /*!< debug watchdog timer pause */
|
||||
#define DEBUG_WWDT_PAUSE 0x00000200 /*!< debug window watchdog timer pause */
|
||||
#define DEBUG_TMR1_PAUSE 0x00000400 /*!< debug timer1 pause */
|
||||
#define DEBUG_TMR3_PAUSE 0x00001000 /*!< debug timer3 pause */
|
||||
#define DEBUG_ERTC_PAUSE 0x00004000 /*!< debug ertc pause */
|
||||
#define DEBUG_I2C1_SMBUS_TIMEOUT 0x00008000 /*!< debug i2c1 smbus timeout */
|
||||
#define DEBUG_I2C2_SMBUS_TIMEOUT 0x00010000 /*!< debug i2c2 smbus timeout */
|
||||
#define DEBUG_TMR6_PAUSE 0x00080000 /*!< debug timer6 pause */
|
||||
#define DEBUG_ERTC_512_PAUSE 0x00200000 /*!< debug ertc 512 pause */
|
||||
#define DEBUG_TMR15_PAUSE 0x00400000 /*!< debug timer15 pause */
|
||||
#define DEBUG_TMR16_PAUSE 0x00800000 /*!< debug timer16 pause */
|
||||
#define DEBUG_TMR17_PAUSE 0x01000000 /*!< debug timer17 pause */
|
||||
#define DEBUG_TMR14_PAUSE 0x08000000 /*!< debug timer14 pause */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DEBUG_exported_types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief type define debug register all
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
/**
|
||||
* @brief debug idcode register, offset:0x00
|
||||
*/
|
||||
union
|
||||
{
|
||||
__IO uint32_t pid;
|
||||
struct
|
||||
{
|
||||
__IO uint32_t pid : 32;/* [31:0] */
|
||||
} idcode_bit;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief debug ctrl register, offset:0x04
|
||||
*/
|
||||
union
|
||||
{
|
||||
__IO uint32_t ctrl;
|
||||
struct
|
||||
{
|
||||
__IO uint32_t sleep_debug : 1;/* [0] */
|
||||
__IO uint32_t deepsleep_debug : 1;/* [1] */
|
||||
__IO uint32_t standby_debug : 1;/* [2] */
|
||||
__IO uint32_t reserved1 : 5;/* [7:3] */
|
||||
__IO uint32_t wdt_pause : 1;/* [8] */
|
||||
__IO uint32_t wwdt_pause : 1;/* [9] */
|
||||
__IO uint32_t tmr1_pause : 1;/* [10] */
|
||||
__IO uint32_t reserved2 : 1;/* [11] */
|
||||
__IO uint32_t tmr3_pause : 1;/* [12] */
|
||||
__IO uint32_t reserved3 : 1;/* [13] */
|
||||
__IO uint32_t ertc_pause : 1;/* [14] */
|
||||
__IO uint32_t i2c1_smbus_timeout : 1;/* [15] */
|
||||
__IO uint32_t i2c2_smbus_timeout : 1;/* [16] */
|
||||
__IO uint32_t reserved4 : 2;/* [18:17] */
|
||||
__IO uint32_t tmr6_pause : 1;/* [19] */
|
||||
__IO uint32_t reserved5 : 1;/* [20] */
|
||||
__IO uint32_t ertc_512_pause : 1;/* [21] */
|
||||
__IO uint32_t tmr15_pause : 1;/* [22] */
|
||||
__IO uint32_t tmr16_pause : 1;/* [23] */
|
||||
__IO uint32_t tmr17_pause : 1;/* [24] */
|
||||
__IO uint32_t reserved6 : 2;/* [26:25] */
|
||||
__IO uint32_t tmr14_pause : 1;/* [27] */
|
||||
__IO uint32_t reserved7 : 4;/* [31:28] */
|
||||
} ctrl_bit;
|
||||
};
|
||||
|
||||
} debug_type;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#define DEBUGMCU ((debug_type *) DEBUG_BASE)
|
||||
|
||||
/** @defgroup DEBUG_exported_functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint16_t debug_device_id_get(void);
|
||||
void debug_periph_mode_set(uint32_t periph_debug_mode, confirm_state new_state);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,69 @@
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file at32f421_def.h
|
||||
* @brief at32f421 macros header file
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __AT32F421_DEF_H
|
||||
#define __AT32F421_DEF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* gnu compiler */
|
||||
#if defined (__GNUC__)
|
||||
#ifndef ALIGNED_HEAD
|
||||
#define ALIGNED_HEAD
|
||||
#endif
|
||||
#ifndef ALIGNED_TAIL
|
||||
#define ALIGNED_TAIL __attribute__ ((aligned (4)))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* arm compiler */
|
||||
#if defined (__CC_ARM)
|
||||
#ifndef ALIGNED_HEAD
|
||||
#define ALIGNED_HEAD __align(4)
|
||||
#endif
|
||||
#ifndef ALIGNED_TAIL
|
||||
#define ALIGNED_TAIL
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* iar compiler */
|
||||
#if defined (__ICCARM__)
|
||||
#ifndef ALIGNED_HEAD
|
||||
#define ALIGNED_HEAD
|
||||
#endif
|
||||
#ifndef ALIGNED_TAIL
|
||||
#define ALIGNED_TAIL
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define UNUSED(x) (void)x /* to avoid gcc/g++ warnings */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
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Reference in New Issue
Block a user