add the AT45DB Drivers

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@328 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong committed 2010-01-21 13:23:58 +00:00
1 parent 63dff2e94e
commit c28ecae7ed
8 files changed
+494 -342

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@@ -26,6 +26,7 @@ uint32_t Mass_Block_Count[3];
uint32_t Max_Lun = 2;
rt_device_t dev_sdio = RT_NULL;
rt_device_t dev_spi_flash = RT_NULL;
uint16_t MAL_Init(uint8_t lun)
{
@@ -37,7 +38,7 @@ uint16_t MAL_Init(uint8_t lun)
status = MAL_OK;
break;
case 1:
status = MAL_FAIL;
status = MAL_OK;
break;
case 2:
status = MAL_FAIL;
@@ -54,6 +55,11 @@ uint16_t MAL_Write(uint8_t lun, uint32_t Memory_Offset, uint32_t *Writebuff, uin
switch (lun)
{
case 0:
{
dev_spi_flash->write(dev_spi_flash,Memory_Offset,Writebuff,Transfer_Length);
}
break;
case 1:
{
dev_sdio->write(dev_sdio,Memory_Offset,Writebuff,Transfer_Length);
}
@@ -70,6 +76,11 @@ uint16_t MAL_Read(uint8_t lun, uint32_t Memory_Offset, uint32_t *Readbuff, uint1
switch (lun)
{
case 0:
{
dev_spi_flash->read(dev_spi_flash,Memory_Offset,Readbuff,Transfer_Length);
}
break;
case 1:
{
dev_sdio->read(dev_sdio,Memory_Offset,Readbuff,Transfer_Length);
}
@@ -87,7 +98,7 @@ uint16_t MAL_GetStatus (uint8_t lun)
case 0:
return MAL_OK;
case 1:
return MAL_FAIL;
return MAL_OK;
case 2:
return MAL_FAIL;
default:
@@ -10,6 +10,7 @@ extern uint32_t Mass_Memory_Size[2];
extern uint32_t Mass_Block_Size[2];
extern uint32_t Mass_Block_Count[2];
extern rt_device_t dev_sdio;
extern rt_device_t dev_spi_flash;
#include <finsh.h>
#include "sdcard.h"
@@ -18,22 +19,33 @@ void USB_cable(void)
rt_device_t dev = RT_NULL;
SD_CardInfo * sdio_info = RT_NULL;
dev = rt_device_find("sd0");
/* SPI_FLASH */
dev_spi_flash = rt_device_find("spi0");
Mass_Block_Size[0] = 512;
Mass_Block_Count[0] = 4096;
Mass_Memory_Size[0] = 4096*512;
if(dev != RT_NULL)
{
dev_sdio = dev;
sdio_info = (SD_CardInfo *)dev->private;
Mass_Memory_Size[0] = sdio_info->CardCapacity;
Mass_Block_Size[0] = sdio_info->CardBlockSize;
Mass_Block_Count[0] = Mass_Memory_Size[0] / Mass_Block_Size[0];
Set_System();
Set_USBClock();
USB_Interrupts_Config();
USB_Init();
Mass_Memory_Size[1] = sdio_info->CardCapacity;
Mass_Block_Size[1] = sdio_info->CardBlockSize;
Mass_Block_Count[1] = Mass_Memory_Size[0] / Mass_Block_Size[0];
}
else
{
rt_kprintf("\r\nNo find the device sd0 !!!!");
}
/* 3:NAND */
/* usb msc up*/
Set_System();
Set_USBClock();
USB_Interrupts_Config();
USB_Init();
}
FINSH_FUNCTION_EXPORT(USB_cable, cable_the_usb);
+70 -13
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@@ -95,12 +95,12 @@ void NVIC_Configuration(void)
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
/*
* set priority group:
* 2 bits for pre-emption priority
/*
* set priority group:
* 2 bits for pre-emption priority
* 2 bits for subpriority
*/
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
/*******************************************************************************
@@ -180,12 +180,35 @@ void rt_hw_board_init()
/* NAND read ID command */
FSMC_NAND_ReadID(&NAND_ID);
rt_kprintf("Read the NAND ID:%02X%02X%02X%02X\n",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
rt_kprintf("\r\n\r\nRead the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
/* SRAM init */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
FSMC_SRAM_Init();
/* memtest */
{
unsigned char * p_extram = (unsigned char *)0x68000000;
unsigned int temp;
rt_kprintf("\r\nmem testing....");
for(temp=0; temp<0x80000; temp++)
{
*p_extram++ = (unsigned char)temp;
}
p_extram = (unsigned char *)0x68000000;
for(temp=0; temp<0x80000; temp++)
{
if( *p_extram++ != (unsigned char)temp )
{
rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);
while(1);
}
}
rt_kprintf("\rmem test pass!!\r\n");
}/* memtest */
{
/* PC6 for SDCard Rst */
GPIO_InitTypeDef GPIO_InitStructure;
@@ -196,7 +219,41 @@ void rt_hw_board_init()
GPIO_Init(GPIOC,&GPIO_InitStructure);
GPIO_SetBits(GPIOC,GPIO_Pin_6);
}
}
/* SPI1 config */
{
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
/* Enable SPI1 Periph clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
| RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
ENABLE);
/* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/*------------------------ SPI1 configuration ------------------------*/
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI1, &SPI_InitStructure);
/* Enable SPI_MASTER */
SPI_Cmd(SPI1, ENABLE);
SPI_CalculateCRC(SPI1, DISABLE);
}
}/* rt_hw_board_init */
#if STM32_CONSOLE_USART == 1
#define CONSOLE_RX_PIN GPIO_Pin_9
@@ -206,13 +263,13 @@ void rt_hw_board_init()
#elif STM32_CONSOLE_USART == 2
#if defined(STM32_LD) || defined(STM32_MD)
#define CONSOLE_RX_PIN GPIO_Pin_6
#define CONSOLE_TX_PIN GPIO_Pin_5
#define CONSOLE_GPIO GPIOD
#define CONSOLE_RX_PIN GPIO_Pin_6
#define CONSOLE_TX_PIN GPIO_Pin_5
#define CONSOLE_GPIO GPIOD
#elif defined(STM32_HD)
#define CONSOLE_RX_PIN GPIO_Pin_3
#define CONSOLE_TX_PIN GPIO_Pin_2
#define CONSOLE_GPIO GPIOA
#define CONSOLE_RX_PIN GPIO_Pin_3
#define CONSOLE_TX_PIN GPIO_Pin_2
#define CONSOLE_GPIO GPIOA
#endif
#define CONSOLE_USART USART2
@@ -300,7 +357,7 @@ static void rt_hw_console_putc(const char c)
void rt_hw_console_output(const char* str)
{
#if STM32_CONSOLE_USART == 0
/* no console */
/* no console */
#else
while (*str)
{
+34 -170
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+1
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@@ -45,6 +45,7 @@ File 1,1,<.\player_bg.c><player_bg.c>
File 1,1,<.\play_list.c><play_list.c>
File 1,1,<.\ili9325\ili9320.c><ili9320.c>
File 1,1,<.\codec.c><codec.c>
File 1,1,<.\spi_flash.c><spi_flash.c>
File 2,1,<..\..\src\clock.c><clock.c>
File 2,1,<..\..\src\idle.c><idle.c>
File 2,1,<..\..\src\ipc.c><ipc.c>
+199
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@@ -0,0 +1,199 @@
#include <stm32f10x.h>
//#include "spi_flash.h"
#include <string.h>
extern unsigned char SPI_WriteByte(unsigned char data);
/********************** hardware *************************************/
/* SPI_FLASH_CS PA4 */
/* SPI_FLASH_RST PA3 */
#define FLASH_RST_0() GPIO_ResetBits(GPIOA,GPIO_Pin_3)
#define FLASH_RST_1() GPIO_SetBits(GPIOA,GPIO_Pin_3)
#define FLASH_CS_0() GPIO_ResetBits(GPIOA,GPIO_Pin_4)
#define FLASH_CS_1() GPIO_SetBits(GPIOA,GPIO_Pin_4)
/********************** hardware *************************************/
static void GPIO_Configuration(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA,ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_3;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA,&GPIO_InitStructure);
FLASH_RST_0(); // RESET
FLASH_RST_1();
}
static unsigned char SPI_HostReadByte(void)
{
return SPI_WriteByte(0x00);
}
static void SPI_HostWriteByte(unsigned char wByte)
{
SPI_WriteByte(wByte);
}
/******************************************************************************/
/*Status Register Format: */
/* ----------------------------------------------------------------------- */
/* | bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 | */
/* |--------|--------|--------|--------|--------|--------|--------|--------| */
/* |RDY/BUSY| COMP | 0 | 1 | 1 | 1 | X | X | */
/* ----------------------------------------------------------------------- */
/* bit7 - 忙标记,0为忙1为不忙。 */
/* 当Status Register的位0移出之后,接下来的时钟脉冲序列将使SPI器件继续*/
/* 将最新的状态字节送出。 */
/* bit6 - 标记最近一次Main Memory Page和Buffer的比较结果,0相同,1不同。 */
/* bit5 */
/* bit4 */
/* bit3 */
/* bit2 - 这4位用来标记器件密度,对于AT45DB041B,这4位应该是0111,一共能标记 */
/* 16种不同密度的器件。 */
/* bit1 */
/* bit0 - 这2位暂时无效 */
/******************************************************************************/
static unsigned char AT45DB_StatusRegisterRead(void)
{
unsigned char i;
FLASH_CS_0();
SPI_HostWriteByte(0xd7);
i=SPI_HostReadByte();
FLASH_CS_1();
return i;
}
static void wait_busy(void)
{
unsigned int i=0;
while (i++<255)
{
if (AT45DB_StatusRegisterRead()&0x80)
{
break;
}
}
}
static void read_page(unsigned int page,unsigned char * pHeader)
{
unsigned int i=0;
wait_busy();
FLASH_CS_0();
SPI_HostWriteByte(0x53);
SPI_HostWriteByte((unsigned char)(page >> 6));
SPI_HostWriteByte((unsigned char)(page << 2));
SPI_HostWriteByte(0x00);
FLASH_CS_1();
wait_busy();
FLASH_CS_0();
SPI_HostWriteByte(0xD4);
SPI_HostWriteByte(0x00);
SPI_HostWriteByte(0x00);
SPI_HostWriteByte(0x00);
SPI_HostWriteByte(0x00);
for (i=0; i<512; i++)
{
*pHeader++ = SPI_HostReadByte();
}
FLASH_CS_1();
}
static void write_page(unsigned int page,unsigned char * pHeader)
{
unsigned int i;
wait_busy();
FLASH_CS_0();
SPI_HostWriteByte(0x87);
SPI_HostWriteByte(0);
SPI_HostWriteByte(0);
SPI_HostWriteByte(0);
for(i=0; i<512; i++)
{
SPI_HostWriteByte(*pHeader++);
}
FLASH_CS_1();
wait_busy();
FLASH_CS_0();
SPI_HostWriteByte(0x86);
SPI_HostWriteByte((unsigned char)(page>>6));
SPI_HostWriteByte((unsigned char)(page<<2));
SPI_HostWriteByte(0x00);
FLASH_CS_1();
}
#include <rtthread.h>
/* SPI DEVICE */
static struct rt_device spi_flash_device;
/* RT-Thread Device Driver Interface */
static rt_err_t rt_spi_flash_init(rt_device_t dev)
{
return RT_EOK;
}
static rt_err_t rt_spi_flash_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t rt_spi_flash_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
return RT_EOK;
}
static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
/* only supply single block read: block size 512Byte */
read_page(pos/512,buffer);
return RT_EOK;
}
static rt_size_t rt_spi_flash_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
/* only supply single block write: block size 512Byte */
write_page(pos/512,(unsigned char*)buffer);
return RT_EOK;
}
void rt_hw_spi_flash_init(void)
{
GPIO_Configuration();
/* register spi_flash device */
spi_flash_device.init = rt_spi_flash_init;
spi_flash_device.open = rt_spi_flash_open;
spi_flash_device.close = rt_spi_flash_close;
spi_flash_device.read = rt_spi_flash_read;
spi_flash_device.write = rt_spi_flash_write;
spi_flash_device.control = rt_spi_flash_control;
/* no private */
spi_flash_device.private = RT_NULL;
rt_device_register(&spi_flash_device, "spi0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
}
+6
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@@ -0,0 +1,6 @@
#ifndef SPI_FLASH_H_INCLUDED
#define SPI_FLASH_H_INCLUDED
extern void rt_hw_spi_flash_init(void);
#endif // SPI_FLASH_H_INCLUDED
+151 -149
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