Merge pull request #3142 from xuzhuoyi/stm32f429-disco

[bsp][stm32][stm32f429-st-disco] Move stm32f429-disco to stm32 dir
2026-03-27 17:45:13 +08:00 · 2019-10-21 08:36:43 +08:00
parent 3aa93d0d68 e44a9d347a
commit c1bf9e645e
247 changed files with 4690 additions and 261427 deletions
--- a/.travis.yml
+++ b/.travis.yml
@@ -91,6 +91,7 @@ env:
  - RTT_BSP='stm32/stm32f429-armfly-v6' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='stm32/stm32f429-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='stm32/stm32f429-fire-challenger' RTT_TOOL_CHAIN='sourcery-arm'
+  - RTT_BSP='stm32/stm32f429-st-disco' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='stm32/stm32f446-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='stm32/stm32f469-st-disco' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='stm32/stm32f746-st-disco' RTT_TOOL_CHAIN='sourcery-arm'
@@ -108,7 +109,6 @@ env:
  - RTT_BSP='stm32/stm32l476-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='stm32/stm32l496-ali-developer' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='stm32f20x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32f429-disco' RTT_TOOL_CHAIN='sourcery-arm'
  - RTT_BSP='swm320-lq100' RTT_TOOL_CHAIN='sourcery-arm'
 #  - RTT_BSP='taihu' RTT_TOOL_CHAIN='sourcery-ppc'
 #  - RTT_BSP='upd70f3454' # iar
--- a/bsp/stm32/README.md
+++ b/bsp/stm32/README.md
@@ -22,6 +22,7 @@ STM32 系列 BSP 目前支持情况如下表所示：
 | [stm32f407-atk-explorer](stm32f407-atk-explorer) | 正点原子 F407 探索者开发板 |
 | [stm32f411-st-nucleo](stm32f411-st-nucleo/) | ST 官方 STM32F411-Nucleo-64 开发板 |
 | [stm32f427-robomaster-a](stm32f427-robomaster-a/) |大疆公司 RoboMaster A型开发板|
+| [stm32f429-st-disco](stm32f429-st-disco) | ST 官方 STM32F429-discovery 开发板 |
 | [stm32f429-atk-apollo](stm32f429-atk-apollo)      | 正点原子 F429 阿波罗开发板 |
 | [stm32f429-fire-challenger](stm32f429-fire-challenger/) | 野火 F429 挑战者开发板 |
 | [stm32f429-armfly-v6](stm32f429-armfly-v6) | 安富莱 F429-v6 开发板 |
@@ -35,6 +36,8 @@ STM32 系列 BSP 目前支持情况如下表所示：
 | [stm32f769-st-disco](stm32f769-st-disco) | ST 官方 STM32f769-discovery 开发板 |
 | **G0 系列** |  |
 | [stm32g071-st-nucleo](stm32g071-st-nucleo) | ST 官方 STM32G071-nucleo 开发板 |
+| **G4 系列** |  |
+| [stm32g431-st-nucleo](stm32g431-st-nucleo) | ST 官方 STM32G431-nucleo 开发板 |
 | **H7 系列** |  |
 | [stm32h743-atk-apollo](stm32h743-atk-apollo) | 正点原子 h743 阿波罗开发板 |
 | [stm32h743-st-nucleo](stm32h743-st-nucleo) | ST 官方 STM32H743-nucleo 开发板 |
--- a/bsp/stm32/stm32f429-st-disco/.config
+++ b/bsp/stm32/stm32f429-st-disco/.config
@@ -7,6 +7,8 @@
 # RT-Thread Kernel
 #
 CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
 CONFIG_RT_ALIGN_SIZE=4
 # CONFIG_RT_THREAD_PRIORITY_8 is not set
 CONFIG_RT_THREAD_PRIORITY_32=y
@@ -15,6 +17,7 @@ CONFIG_RT_THREAD_PRIORITY_MAX=32
 CONFIG_RT_TICK_PER_SECOND=100
 CONFIG_RT_USING_OVERFLOW_CHECK=y
 CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=1024
 # CONFIG_RT_USING_TIMER_SOFT is not set
@@ -62,12 +65,20 @@ CONFIG_RT_USING_DEVICE=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+CONFIG_RT_VER_NUM=0x40002
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M4=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set

 #
 # RT-Thread Components
 #
 CONFIG_RT_USING_COMPONENTS_INIT=y
-# CONFIG_RT_USING_USER_MAIN is not set
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10

 #
 # C++ features
@@ -114,27 +125,31 @@ CONFIG_RT_USING_DFS_DEVFS=y
 #
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
 CONFIG_RT_SERIAL_USING_DMA=y
+CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
 CONFIG_RT_USING_I2C=y
 CONFIG_RT_USING_I2C_BITOPS=y
 CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
-# CONFIG_RT_USING_MTD is not set
+# CONFIG_RT_USING_PM is not set
 # CONFIG_RT_USING_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
 # CONFIG_RT_USING_SPI is not set
 # CONFIG_RT_USING_WDT is not set
 # CONFIG_RT_USING_AUDIO is not set
-
-#
-# Using WiFi
-#
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
 # CONFIG_RT_USING_WIFI is not set

 #
@@ -163,16 +178,16 @@ CONFIG_RT_USING_POSIX=y
 #
 # CONFIG_RT_USING_SAL is not set

+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
 #
 # light weight TCP/IP stack
 #
 # CONFIG_RT_USING_LWIP is not set

-#
-# Modbus master and slave stack
-#
-# CONFIG_RT_USING_MODBUS is not set
-
 #
 # AT commands
 #
@@ -186,8 +201,10 @@ CONFIG_RT_USING_POSIX=y
 #
 # Utilities
 #
-# CONFIG_RT_USING_LOGTRACE is not set
 # CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_LWP is not set

 #
 # RT-Thread online packages
@@ -198,10 +215,13 @@ CONFIG_RT_USING_POSIX=y
 #
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
@@ -219,10 +239,13 @@ CONFIG_RT_USING_POSIX=y
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set

 #
@@ -232,6 +255,19 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_DLT645 is not set

 #
 # security packages
@@ -252,6 +288,9 @@ CONFIG_RT_USING_POSIX=y
 #
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set

 #
 # tools packages
@@ -261,11 +300,15 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
 # CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ADBD is not set

 #
 # system packages
 #
 # CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
 # CONFIG_PKG_USING_LWEXT4 is not set
@@ -274,27 +317,40 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT_V001 is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT_LATEST_VERSION is not set
-# CONFIG_LV_MEM_STATIC is not set
-# CONFIG_LV_MEM_DYNAMIC is not set
-# CONFIG_LV_COLOR_DEPTH_1 is not set
-# CONFIG_LV_COLOR_DEPTH_8 is not set
-# CONFIG_LV_COLOR_DEPTH_16 is not set
-# CONFIG_LV_COLOR_DEPTH_24 is not set
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set

 #
 # peripheral libraries and drivers
 #
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
-# CONFIG_PKG_USING_AHT10 is not set
-# CONFIG_PKG_USING_AP3216C is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_LCD_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set

 #
 # miscellaneous packages
@@ -305,13 +361,15 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
 # CONFIG_PKG_USING_DSTR is not set
-
-#
-# sample package
-#
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set

 #
 # samples: kernel and components samples
@@ -320,16 +378,37 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32F4=y

 #
-# example package: hello
+# Hardware Drivers Config
+#
+CONFIG_SOC_STM32F429ZI=y
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+CONFIG_BSP_USING_UART=y
+CONFIG_BSP_USING_UART1=y
+# CONFIG_BSP_UART1_RX_USING_DMA is not set
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_QSPI is not set
+# CONFIG_BSP_USING_FMC is not set
+# CONFIG_BSP_USING_USBD_FS is not set
+# CONFIG_BSP_USING_LTDC is not set
+# CONFIG_BSP_USING_RNG is not set
+# CONFIG_BSP_USING_UDID is not set
+
+#
+# Board extended module Drivers
 #
-# CONFIG_PKG_USING_HELLO is not set
-CONFIG_RT_USING_ILI9341_LCD=y
-CONFIG_RT_USING_STMPE811_TOUCH=y
-CONFIG_RT_USING_EXT_SDRAM=y
-CONFIG_RT_USING_UART1=y
-# CONFIG_RT_USING_UART2 is not set
-# CONFIG_RT_USING_UART3 is not set
-# CONFIG_RT_USING_SPI5 is not set
-CONFIG_RT_USING_I2C3=y
--- a/bsp/stm32/stm32f429-st-disco/Kconfig
+++ b/bsp/stm32/stm32f429-st-disco/Kconfig
@@ -0,0 +1,21 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+ 
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "../libraries/Kconfig"
+source "board/Kconfig"
--- a/bsp/stm32/stm32f429-st-disco/SConscript
+++ b/bsp/stm32/stm32f429-st-disco/SConscript
@@ -1,8 +1,9 @@
 # for module compiling
 import os
 Import('RTT_ROOT')
+from building import *

-cwd = str(Dir('#'))
+cwd = GetCurrentDir()
 objs = []
 list = os.listdir(cwd)

--- a/bsp/stm32/stm32f429-st-disco/SConstruct
+++ b/bsp/stm32/stm32f429-st-disco/SConstruct
@@ -5,7 +5,7 @@ import rtconfig
 if os.getenv('RTT_ROOT'):
    RTT_ROOT = os.getenv('RTT_ROOT')
 else:
-    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')

 sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
 try:
@@ -15,25 +15,45 @@ except:
    print(RTT_ROOT)
    exit(-1)

-TARGET = 'rtthread-stm32f42x.' + rtconfig.TARGET_EXT
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT

 env = Environment(tools = ['mingw'],
    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
 env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

 if rtconfig.PLATFORM == 'iar':
    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
    env.Replace(ARFLAGS = [''])
-    env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')

 Export('RTT_ROOT')
 Export('rtconfig')

+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
 # prepare building environment
 objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)

+stm32_library = 'STM32F4xx_HAL'
+rtconfig.BSP_LIBRARY_TYPE = stm32_library
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
+
 # make a building
 DoBuilding(TARGET, objs)
--- a/bsp/stm32/stm32f429-st-disco/applications/SConscript
+++ b/bsp/stm32/stm32f429-st-disco/applications/SConscript
@@ -0,0 +1,13 @@
+import rtconfig
+from building import *
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd]
+src     = Split("""
+main.c
+lcd_init.c
+""")
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c
+++ b/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-06-12     Tanek        first version
+ */
+
+#include <rtthread.h>
+
+#if defined(PKG_USING_GUIENGINE)
+
+#include <rtgui/driver.h>
+int lcd_init(void)
+{
+    struct rt_device *device;
+    device = rt_device_find("lcd");
+    if (device)
+    {
+        rtgui_graphic_set_device(device);
+    }
+
+    return 0;
+}
+INIT_ENV_EXPORT(lcd_init);
+#endif
--- a/bsp/stm32/stm32f429-st-disco/applications/main.c
+++ b/bsp/stm32/stm32f429-st-disco/applications/main.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ * 2019-10-19     xuzhuoyi     add stm32f429-st-disco bsp
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+/* defined the LED1 pin: PG13 */
+#define LED1_PIN    GET_PIN(G, 13)
+
+int main(void)
+{
+    int count = 1;
+    /* set LED1 pin mode to output */
+    rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
+
+    while (count++)
+    {
+        rt_pin_write(LED1_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED1_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+
+    return RT_EOK;
+}
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/.mxproject
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/.mxproject
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/CubeMX_Config.ioc
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Inc/main.h
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Inc/main.h
@@ -0,0 +1,255 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define PC14_OSC32_IN_Pin GPIO_PIN_14
+#define PC14_OSC32_IN_GPIO_Port GPIOC
+#define PC15_OSC32_OUT_Pin GPIO_PIN_15
+#define PC15_OSC32_OUT_GPIO_Port GPIOC
+#define A0_Pin GPIO_PIN_0
+#define A0_GPIO_Port GPIOF
+#define A1_Pin GPIO_PIN_1
+#define A1_GPIO_Port GPIOF
+#define A2_Pin GPIO_PIN_2
+#define A2_GPIO_Port GPIOF
+#define A3_Pin GPIO_PIN_3
+#define A3_GPIO_Port GPIOF
+#define A4_Pin GPIO_PIN_4
+#define A4_GPIO_Port GPIOF
+#define A5_Pin GPIO_PIN_5
+#define A5_GPIO_Port GPIOF
+#define SPI5_SCK_Pin GPIO_PIN_7
+#define SPI5_SCK_GPIO_Port GPIOF
+#define SPI5_MISO_Pin GPIO_PIN_8
+#define SPI5_MISO_GPIO_Port GPIOF
+#define SPI5_MOSI_Pin GPIO_PIN_9
+#define SPI5_MOSI_GPIO_Port GPIOF
+#define ENABLE_Pin GPIO_PIN_10
+#define ENABLE_GPIO_Port GPIOF
+#define PH0_OSC_IN_Pin GPIO_PIN_0
+#define PH0_OSC_IN_GPIO_Port GPIOH
+#define PH1_OSC_OUT_Pin GPIO_PIN_1
+#define PH1_OSC_OUT_GPIO_Port GPIOH
+#define SDNWE_Pin GPIO_PIN_0
+#define SDNWE_GPIO_Port GPIOC
+#define NCS_MEMS_SPI_Pin GPIO_PIN_1
+#define NCS_MEMS_SPI_GPIO_Port GPIOC
+#define CSX_Pin GPIO_PIN_2
+#define CSX_GPIO_Port GPIOC
+#define B1_Pin GPIO_PIN_0
+#define B1_GPIO_Port GPIOA
+#define MEMS_INT1_Pin GPIO_PIN_1
+#define MEMS_INT1_GPIO_Port GPIOA
+#define MEMS_INT2_Pin GPIO_PIN_2
+#define MEMS_INT2_GPIO_Port GPIOA
+#define B5_Pin GPIO_PIN_3
+#define B5_GPIO_Port GPIOA
+#define VSYNC_Pin GPIO_PIN_4
+#define VSYNC_GPIO_Port GPIOA
+#define G2_Pin GPIO_PIN_6
+#define G2_GPIO_Port GPIOA
+#define ACP_RST_Pin GPIO_PIN_7
+#define ACP_RST_GPIO_Port GPIOA
+#define OTG_FS_PSO_Pin GPIO_PIN_4
+#define OTG_FS_PSO_GPIO_Port GPIOC
+#define OTG_FS_OC_Pin GPIO_PIN_5
+#define OTG_FS_OC_GPIO_Port GPIOC
+#define R3_Pin GPIO_PIN_0
+#define R3_GPIO_Port GPIOB
+#define R6_Pin GPIO_PIN_1
+#define R6_GPIO_Port GPIOB
+#define BOOT1_Pin GPIO_PIN_2
+#define BOOT1_GPIO_Port GPIOB
+#define SDNRAS_Pin GPIO_PIN_11
+#define SDNRAS_GPIO_Port GPIOF
+#define A6_Pin GPIO_PIN_12
+#define A6_GPIO_Port GPIOF
+#define A7_Pin GPIO_PIN_13
+#define A7_GPIO_Port GPIOF
+#define A8_Pin GPIO_PIN_14
+#define A8_GPIO_Port GPIOF
+#define A9_Pin GPIO_PIN_15
+#define A9_GPIO_Port GPIOF
+#define A10_Pin GPIO_PIN_0
+#define A10_GPIO_Port GPIOG
+#define A11_Pin GPIO_PIN_1
+#define A11_GPIO_Port GPIOG
+#define D4_Pin GPIO_PIN_7
+#define D4_GPIO_Port GPIOE
+#define D5_Pin GPIO_PIN_8
+#define D5_GPIO_Port GPIOE
+#define D6_Pin GPIO_PIN_9
+#define D6_GPIO_Port GPIOE
+#define D7_Pin GPIO_PIN_10
+#define D7_GPIO_Port GPIOE
+#define D8_Pin GPIO_PIN_11
+#define D8_GPIO_Port GPIOE
+#define D9_Pin GPIO_PIN_12
+#define D9_GPIO_Port GPIOE
+#define D10_Pin GPIO_PIN_13
+#define D10_GPIO_Port GPIOE
+#define D11_Pin GPIO_PIN_14
+#define D11_GPIO_Port GPIOE
+#define D12_Pin GPIO_PIN_15
+#define D12_GPIO_Port GPIOE
+#define G4_Pin GPIO_PIN_10
+#define G4_GPIO_Port GPIOB
+#define G5_Pin GPIO_PIN_11
+#define G5_GPIO_Port GPIOB
+#define OTG_HS_ID_Pin GPIO_PIN_12
+#define OTG_HS_ID_GPIO_Port GPIOB
+#define VBUS_HS_Pin GPIO_PIN_13
+#define VBUS_HS_GPIO_Port GPIOB
+#define OTG_HS_DM_Pin GPIO_PIN_14
+#define OTG_HS_DM_GPIO_Port GPIOB
+#define OTG_HS_DP_Pin GPIO_PIN_15
+#define OTG_HS_DP_GPIO_Port GPIOB
+#define D13_Pin GPIO_PIN_8
+#define D13_GPIO_Port GPIOD
+#define D14_Pin GPIO_PIN_9
+#define D14_GPIO_Port GPIOD
+#define D15_Pin GPIO_PIN_10
+#define D15_GPIO_Port GPIOD
+#define TE_Pin GPIO_PIN_11
+#define TE_GPIO_Port GPIOD
+#define RDX_Pin GPIO_PIN_12
+#define RDX_GPIO_Port GPIOD
+#define WRX_DCX_Pin GPIO_PIN_13
+#define WRX_DCX_GPIO_Port GPIOD
+#define D0_Pin GPIO_PIN_14
+#define D0_GPIO_Port GPIOD
+#define D1_Pin GPIO_PIN_15
+#define D1_GPIO_Port GPIOD
+#define BA0_Pin GPIO_PIN_4
+#define BA0_GPIO_Port GPIOG
+#define BA1_Pin GPIO_PIN_5
+#define BA1_GPIO_Port GPIOG
+#define R7_Pin GPIO_PIN_6
+#define R7_GPIO_Port GPIOG
+#define DOTCLK_Pin GPIO_PIN_7
+#define DOTCLK_GPIO_Port GPIOG
+#define SDCLK_Pin GPIO_PIN_8
+#define SDCLK_GPIO_Port GPIOG
+#define HSYNC_Pin GPIO_PIN_6
+#define HSYNC_GPIO_Port GPIOC
+#define G6_Pin GPIO_PIN_7
+#define G6_GPIO_Port GPIOC
+#define I2C3_SDA_Pin GPIO_PIN_9
+#define I2C3_SDA_GPIO_Port GPIOC
+#define I2C3_SCL_Pin GPIO_PIN_8
+#define I2C3_SCL_GPIO_Port GPIOA
+#define STLINK_RX_Pin GPIO_PIN_9
+#define STLINK_RX_GPIO_Port GPIOA
+#define STLINK_TX_Pin GPIO_PIN_10
+#define STLINK_TX_GPIO_Port GPIOA
+#define R4_Pin GPIO_PIN_11
+#define R4_GPIO_Port GPIOA
+#define R5_Pin GPIO_PIN_12
+#define R5_GPIO_Port GPIOA
+#define SWDIO_Pin GPIO_PIN_13
+#define SWDIO_GPIO_Port GPIOA
+#define SWCLK_Pin GPIO_PIN_14
+#define SWCLK_GPIO_Port GPIOA
+#define TP_INT1_Pin GPIO_PIN_15
+#define TP_INT1_GPIO_Port GPIOA
+#define R2_Pin GPIO_PIN_10
+#define R2_GPIO_Port GPIOC
+#define D2_Pin GPIO_PIN_0
+#define D2_GPIO_Port GPIOD
+#define D3_Pin GPIO_PIN_1
+#define D3_GPIO_Port GPIOD
+#define G7_Pin GPIO_PIN_3
+#define G7_GPIO_Port GPIOD
+#define B2_Pin GPIO_PIN_6
+#define B2_GPIO_Port GPIOD
+#define G3_Pin GPIO_PIN_10
+#define G3_GPIO_Port GPIOG
+#define B3_Pin GPIO_PIN_11
+#define B3_GPIO_Port GPIOG
+#define B4_Pin GPIO_PIN_12
+#define B4_GPIO_Port GPIOG
+#define LD3_Pin GPIO_PIN_13
+#define LD3_GPIO_Port GPIOG
+#define LD4_Pin GPIO_PIN_14
+#define LD4_GPIO_Port GPIOG
+#define SDNCAS_Pin GPIO_PIN_15
+#define SDNCAS_GPIO_Port GPIOG
+#define SDCKE1_Pin GPIO_PIN_5
+#define SDCKE1_GPIO_Port GPIOB
+#define SDNE1_Pin GPIO_PIN_6
+#define SDNE1_GPIO_Port GPIOB
+#define B6_Pin GPIO_PIN_8
+#define B6_GPIO_Port GPIOB
+#define B7_Pin GPIO_PIN_9
+#define B7_GPIO_Port GPIOB
+#define NBL0_Pin GPIO_PIN_0
+#define NBL0_GPIO_Port GPIOE
+#define NBL1_Pin GPIO_PIN_1
+#define NBL1_GPIO_Port GPIOE
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Inc/stm32f4xx_hal_conf.h
@@ -1,36 +1,23 @@
 /**
  ******************************************************************************
-  * @file    stm32f4xx_hal_conf.h
-  * @brief   HAL configuration file.
+  * @file    stm32f4xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file. 
+  *          This file should be copied to the application folder and renamed
+  *          to stm32f4xx_hal_conf.h.
  ******************************************************************************
  * @attention
  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
  *
  ******************************************************************************
-  */
+  */ 

 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -40,24 +27,23 @@
 extern "C" {
 #endif

-#include <stddef.h>
-
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/

 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver
+  * @brief This is the list of modules to be used in the HAL driver 
  */
-#define HAL_MODULE_ENABLED
+#define HAL_MODULE_ENABLED  

-/* #define HAL_ADC_MODULE_ENABLED   */
+  /* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
 /* #define HAL_CAN_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
 /* #define HAL_CRYP_MODULE_ENABLED   */
 /* #define HAL_DAC_MODULE_ENABLED   */
 /* #define HAL_DCMI_MODULE_ENABLED   */
-/* #define HAL_DMA2D_MODULE_ENABLED   */
+#define HAL_DMA2D_MODULE_ENABLED
 /* #define HAL_ETH_MODULE_ENABLED   */
 /* #define HAL_NAND_MODULE_ENABLED   */
 /* #define HAL_NOR_MODULE_ENABLED   */
@@ -65,7 +51,7 @@
 /* #define HAL_SRAM_MODULE_ENABLED   */
 #define HAL_SDRAM_MODULE_ENABLED
 /* #define HAL_HASH_MODULE_ENABLED   */
-/* #define HAL_I2C_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
 /* #define HAL_I2S_MODULE_ENABLED   */
 /* #define HAL_IWDG_MODULE_ENABLED   */
 #define HAL_LTDC_MODULE_ENABLED
@@ -73,15 +59,16 @@
 /* #define HAL_RTC_MODULE_ENABLED   */
 /* #define HAL_SAI_MODULE_ENABLED   */
 /* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_MMC_MODULE_ENABLED   */
 #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
 #define HAL_UART_MODULE_ENABLED
 /* #define HAL_USART_MODULE_ENABLED   */
 /* #define HAL_IRDA_MODULE_ENABLED   */
 /* #define HAL_SMARTCARD_MODULE_ENABLED   */
 /* #define HAL_WWDG_MODULE_ENABLED   */
 /* #define HAL_PCD_MODULE_ENABLED   */
-/* #define HAL_HCD_MODULE_ENABLED   */
+#define HAL_HCD_MODULE_ENABLED
 /* #define HAL_DSI_MODULE_ENABLED   */
 /* #define HAL_QSPI_MODULE_ENABLED   */
 /* #define HAL_QSPI_MODULE_ENABLED   */
@@ -90,7 +77,9 @@
 /* #define HAL_SPDIFRX_MODULE_ENABLED   */
 /* #define HAL_DFSDM_MODULE_ENABLED   */
 /* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_EXTI_MODULE_ENABLED   */
 #define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
 #define HAL_DMA_MODULE_ENABLED
 #define HAL_RCC_MODULE_ENABLED
 #define HAL_FLASH_MODULE_ENABLED
@@ -101,9 +90,9 @@
 /**
  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
+  *        (when HSE is used as system clock source, directly or through the PLL).  
  */
-#if !defined  (HSE_VALUE)
+#if !defined  (HSE_VALUE) 
  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */

@@ -114,7 +103,7 @@
 /**
  * @brief Internal High Speed oscillator (HSI) value.
  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
+  *        (when HSI is used as system clock source, directly or through the PLL). 
  */
 #if !defined  (HSI_VALUE)
  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -123,7 +112,7 @@
 /**
  * @brief Internal Low Speed oscillator (LSI) value.
  */
-#if !defined  (LSI_VALUE)
+#if !defined  (LSI_VALUE) 
 #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                             The real value may vary depending on the variations
@@ -141,8 +130,8 @@

 /**
  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  *        This value is used by the I2S HAL module to compute the I2S clock source 
+  *        frequency, this source is inserted directly through I2S_CKIN pad. 
  */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
@@ -155,16 +144,16 @@
 /**
  * @brief This is the HAL system configuration section
  */
-#define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
+#define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */           
+#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */            
+#define  USE_RTOS                     0U     
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
 #define  DATA_CACHE_ENABLE            1U

 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
  *        HAL drivers code
  */
 /* #define USE_FULL_ASSERT    1U */
@@ -181,7 +170,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U

-/* Definition of the Ethernet driver buffers size and count */
+/* Definition of the Ethernet driver buffers size and count */   
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -189,9 +178,9 @@

 /* Section 2: PHY configuration section */

-/* DP83848_PHY_ADDRESS Address*/
+/* DP83848_PHY_ADDRESS Address*/ 
 #define DP83848_PHY_ADDRESS           0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
 #define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)
@@ -203,7 +192,7 @@

 #define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */
-
+ 
 #define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -218,23 +207,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
-
+  
 /* Section 4: Extended PHY Registers */
+#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */

-#define PHY_SR                          ((uint16_t)0x0010U)    /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011U)    /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012U)    /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001U)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */

-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002U)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001U)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020U)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000U)  /*!< PHY link status interrupt mask                  */
-
 /* ################## SPI peripheral configuration ########################## */

 /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
@@ -246,13 +225,17 @@

 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file
+  * @brief Include module's header file 
  */

 #ifdef HAL_RCC_MODULE_ENABLED
  #include "stm32f4xx_hal_rcc.h"
 #endif /* HAL_RCC_MODULE_ENABLED */

+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
 #ifdef HAL_GPIO_MODULE_ENABLED
  #include "stm32f4xx_hal_gpio.h"
 #endif /* HAL_GPIO_MODULE_ENABLED */
@@ -260,7 +243,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
  #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-
+   
 #ifdef HAL_CORTEX_MODULE_ENABLED
  #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -278,7 +261,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */

 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
+  #include "stm32f4xx_hal_cryp.h" 
 #endif /* HAL_CRYP_MODULE_ENABLED */

 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -300,7 +283,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
  #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
-
+ 
 #ifdef HAL_SRAM_MODULE_ENABLED
  #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -315,11 +298,11 @@

 #ifdef HAL_PCCARD_MODULE_ENABLED
  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
+#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+  
 #ifdef HAL_SDRAM_MODULE_ENABLED
  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
+#endif /* HAL_SDRAM_MODULE_ENABLED */      

 #ifdef HAL_HASH_MODULE_ENABLED
 #include "stm32f4xx_hal_hash.h"
@@ -361,6 +344,10 @@
 #include "stm32f4xx_hal_sd.h"
 #endif /* HAL_SD_MODULE_ENABLED */

+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
 #ifdef HAL_SPI_MODULE_ENABLED
 #include "stm32f4xx_hal_spi.h"
 #endif /* HAL_SPI_MODULE_ENABLED */
@@ -396,7 +383,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
 #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-
+   
 #ifdef HAL_DSI_MODULE_ENABLED
 #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -424,29 +411,29 @@
 #ifdef HAL_LPTIM_MODULE_ENABLED
 #include "stm32f4xx_hal_lptim.h"
 #endif /* HAL_LPTIM_MODULE_ENABLED */
-
+   
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
 /**
  * @brief  The assert_param macro is used for function's parameters check.
  * @param  expr: If expr is false, it calls assert_failed function
  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
+  *         line number of the call that failed. 
  *         If expr is true, it returns no value.
  * @retval None
  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
  void assert_failed(uint8_t* file, uint32_t line);
 #else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */    

 #ifdef __cplusplus
 }
 #endif

 #endif /* __STM32F4xx_HAL_CONF_H */
-
+ 

 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Inc/stm32f4xx_it.h
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Inc/stm32f4xx_it.h
@@ -0,0 +1,70 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_IT_H
+#define __STM32F4xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void TIM6_DAC_IRQHandler(void);
+void OTG_HS_IRQHandler(void);
+void LTDC_IRQHandler(void);
+void DMA2D_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Src/main.c
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Src/main.c
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Src/stm32f4xx_hal_msp.c
--- a/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Src/stm32f4xx_it.c
+++ b/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/Src/stm32f4xx_it.c
@@ -0,0 +1,225 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32f4xx_it.h"
+#include "FreeRTOS.h"
+#include "task.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+ 
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern HCD_HandleTypeDef hhcd_USB_OTG_HS;
+extern DMA2D_HandleTypeDef hdma2d;
+extern LTDC_HandleTypeDef hltdc;
+extern TIM_HandleTypeDef htim6;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex-M4 Processor Interruption and Exception Handlers          */ 
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F4xx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32f4xx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+
+/**
+  * @brief This function handles USB On The Go HS global interrupt.
+  */
+void OTG_HS_IRQHandler(void)
+{
+  /* USER CODE BEGIN OTG_HS_IRQn 0 */
+
+  /* USER CODE END OTG_HS_IRQn 0 */
+  HAL_HCD_IRQHandler(&hhcd_USB_OTG_HS);
+  /* USER CODE BEGIN OTG_HS_IRQn 1 */
+
+  /* USER CODE END OTG_HS_IRQn 1 */
+}
+
+/**
+  * @brief This function handles LTDC global interrupt.
+  */
+void LTDC_IRQHandler(void)
+{
+  /* USER CODE BEGIN LTDC_IRQn 0 */
+
+  /* USER CODE END LTDC_IRQn 0 */
+  HAL_LTDC_IRQHandler(&hltdc);
+  /* USER CODE BEGIN LTDC_IRQn 1 */
+
+  /* USER CODE END LTDC_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA2D global interrupt.
+  */
+void DMA2D_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA2D_IRQn 0 */
+
+  /* USER CODE END DMA2D_IRQn 0 */
+  HAL_DMA2D_IRQHandler(&hdma2d);
+  /* USER CODE BEGIN DMA2D_IRQn 1 */
+
+  /* USER CODE END DMA2D_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
+++ b/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c
@@ -2,8 +2,6 @@
  ******************************************************************************
  * @file    system_stm32f4xx.c
  * @author  MCD Application Team
-  * @version V2.6.0
-  * @date    04-November-2016
  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
  *
  *   This file provides two functions and one global variable to be called from 
@@ -24,7 +22,7 @@
  ******************************************************************************
  * @attention
  *
-  * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
+  * <h2><center>&copy; COPYRIGHT 2017 STMicroelectronics</center></h2>
  *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
--- a/bsp/stm32/stm32f429-st-disco/board/Kconfig
+++ b/bsp/stm32/stm32f429-st-disco/board/Kconfig
@@ -0,0 +1,95 @@
+menu "Hardware Drivers Config"
+
+config SOC_STM32F429ZI
+    bool
+    select SOC_SERIES_STM32F4
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+menu "On-chip Peripheral Drivers"
+    config BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
+    menuconfig BSP_USING_UART
+        bool "Enable UART"
+        select RT_USING_SERIAL
+        default y
+        if BSP_USING_UART
+            config BSP_USING_UART1
+                bool "Enable UART1"
+                default y
+
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+        endif
+        
+    menuconfig BSP_USING_I2C1
+        bool "Enable I2C1 BUS (software simulation)"
+        select RT_USING_I2C
+        select RT_USING_I2C_BITOPS
+        select RT_USING_PIN
+        default n
+        if BSP_USING_I2C1 
+            config BSP_I2C1_SCL_PIN
+                int "I2C1 scl pin number"
+                range 1 176
+                default 24
+            config BSP_I2C1_SDA_PIN
+                int "I2C1 sda pin number"
+                range 1 176
+                default 25
+        endif
+
+    menuconfig BSP_USING_SPI
+        bool "Enable SPI BUS"
+        select RT_USING_SPI
+        default n
+        if BSP_USING_SPI  
+            config BSP_USING_SPI3
+                bool "Enable SPI3 BUS"
+                default n        
+
+            config BSP_SPI3_TX_USING_DMA
+                bool "Enable SPI3 TX DMA"
+                depends on BSP_USING_SPI3
+                default n
+                
+            config BSP_SPI3_RX_USING_DMA
+                bool "Enable SPI3 RX DMA"
+                depends on BSP_USING_SPI3
+                select BSP_SPI3_TX_USING_DMA
+                default n  
+        endif
+    
+    config BSP_USING_QSPI
+        bool "Enable QSPI BUS"
+        select RT_USING_QSPI
+        select RT_USING_SPI
+        default n
+
+    config BSP_USING_FMC
+        bool "Enable FMC"
+        default n
+
+    config BSP_USING_USBD_FS
+        bool "Enable OTGFS as USB device"
+        select RT_USING_USB_DEVICE
+        default n
+
+    config BSP_USING_LTDC
+        bool "Enable LTDC"
+        default n
+    source "../libraries/HAL_Drivers/Kconfig"
+    
+endmenu
+
+menu "Board extended module Drivers"
+
+endmenu
+ 
+endmenu
--- a/bsp/stm32/stm32f429-st-disco/board/SConscript
+++ b/bsp/stm32/stm32f429-st-disco/board/SConscript
@@ -0,0 +1,56 @@
+import os
+import rtconfig
+from building import *
+
+Import('SDK_LIB')
+
+cwd = GetCurrentDir()
+
+# add general drivers
+src = Split('''
+board.c
+CubeMX_Config/Src/stm32f4xx_hal_msp.c
+''')
+
+if GetDepend(['BSP_USING_QSPI_FLASH']):
+    src += ['ports/drv_qspi_flash.c']
+
+if GetDepend(['PKG_USING_FAL']):
+    src += ['ports/qspi_mnt.c']
+    
+if GetDepend(['BSP_USING_LCD_OTM8009A']):
+    src += ['ports/drv_otm8009a.c']
+    
+if GetDepend(['BSP_USING_TOUCH']):
+    src += Glob('ports/touch/*.c')
+    
+if GetDepend(['BSP_USING_SDCARD']):
+    src += ['ports/drv_sdcard.c']
+    
+if GetDepend(['BSP_USING_QSPI']):
+    src += ['ports/drv_qspi_flash.c']
+
+path =  [cwd]
+path += [cwd + '/CubeMX_Config/Inc']
+path += [cwd + '/ports']
+
+startup_path_prefix = SDK_LIB
+
+if rtconfig.CROSS_TOOL == 'gcc':
+    src += [startup_path_prefix + '/STM32F4xx_HAL/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/startup_stm32f429xx.s']
+elif rtconfig.CROSS_TOOL == 'keil':
+    src += [startup_path_prefix + '/STM32F4xx_HAL/CMSIS/Device/ST/STM32F4xx/Source/Templates/arm/startup_stm32f429xx.s']
+elif rtconfig.CROSS_TOOL == 'iar':
+    src += [startup_path_prefix + '/STM32F4xx_HAL/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/startup_stm32f429xx.s']
+
+# STM32F405xx) || STM32F415xx) || STM32F407xx) || STM32F417xx)
+# STM32F427xx) || STM32F437xx) || STM32F429xx) || STM32F439xx)
+# STM32F401xC) || STM32F401xE) || STM32F410Tx) || STM32F410Cx)
+# STM32F410Rx) || STM32F411xE) || STM32F446xx) || STM32F469xx)
+# STM32F479xx) || STM32F412Cx) || STM32F412Rx) || STM32F412Vx)
+# STM32F412Zx) || STM32F413xx) || STM32F423xx)
+# You can select chips from the list above
+CPPDEFINES = ['STM32F429xx']
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+Return('group')
--- a/bsp/stm32/stm32f429-st-disco/board/board.c
+++ b/bsp/stm32/stm32f429-st-disco/board/board.c
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-06     SummerGift   first version
+ * 2019-10-13     xuzhuoyi     add stm32f429-st-disco bsp
+ */
+
+#include "board.h"
+
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage 
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 168;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB busses clocks 
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
+  PeriphClkInitStruct.PLLSAI.PLLSAIN = 50;
+  PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
+  PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
--- a/bsp/stm32/stm32f429-st-disco/board/board.h
+++ b/bsp/stm32/stm32f429-st-disco/board/board.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-11-5      SummerGift   first version
+ * 2019-10-19     xuzhuoyi     add stm32f429-st-disco bsp
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <rtthread.h>
+#include <stm32f4xx.h>
+#include "drv_common.h"
+#include "drv_gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define STM32_FLASH_START_ADRESS     ((uint32_t)0x08000000)
+#define STM32_FLASH_SIZE             (2048 * 1024)
+#define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
+
+#define STM32_SRAM_SIZE           (256 - 64)
+#define STM32_SRAM_END            (0x20000000 + STM32_SRAM_SIZE * 1024)
+
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      (&__bss_end)
+#endif
+
+#define HEAP_END        STM32_SRAM_END
+
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
--- a/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f427xx_flash.icf
+++ b/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/iar/linker/stm32f427xx_flash.icf
@@ -4,25 +4,20 @@
 /*-Specials-*/
 define symbol __ICFEDIT_intvec_start__ = 0x08000000;
 /*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;
-define symbol __ICFEDIT_region_ROM_end__      = 0x081FFFFF;
-define symbol __ICFEDIT_region_RAM_start__    = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__      = 0x2002FFFF;
-define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
-define symbol __ICFEDIT_region_CCMRAM_end__   = 0x1000FFFF;
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x081FFFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x2004FFFF;
 /*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400;
-define symbol __ICFEDIT_size_heap__   = 0x200;
+define symbol __ICFEDIT_size_cstack__ = 0x0400;
+define symbol __ICFEDIT_size_heap__   = 0x0000;
 /**** End of ICF editor section. ###ICF###*/

-
 define memory mem with size = 4G;
 define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
 define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-define region CCMRAM_region   = mem:[from __ICFEDIT_region_CCMRAM_start__   to __ICFEDIT_region_CCMRAM_end__];

 define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

 initialize by copy { readwrite };
 do not initialize  { section .noinit };
@@ -30,5 +25,4 @@ do not initialize  { section .noinit };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

 place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
+place in RAM_region   { readwrite, last block CSTACK};
--- a/bsp/stm32/stm32f429-st-disco/board/linker_scripts/link.lds
+++ b/bsp/stm32/stm32f429-st-disco/board/linker_scripts/link.lds
@@ -0,0 +1,157 @@
+/*
+ * linker script for STM32F4xx with GNU ld
+ * bernard.xiong 2009-10-14
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+    ROM (rx) : ORIGIN = 0x08000000, LENGTH = 2048k /* 2048KB flash */
+    RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x200;
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+
+        . = ALIGN(4);
+
+        PROVIDE(__ctors_start__ = .);
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        PROVIDE(__ctors_end__ = .);
+
+        . = ALIGN(4);
+
+        _etext = .;
+    } > ROM = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > ROM
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+        PROVIDE(__dtors_start__ = .);
+        KEEP(*(SORT(.dtors.*)))
+        KEEP(*(.dtors))
+        PROVIDE(__dtors_end__ = .);
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >RAM
+
+    .stack : 
+    {
+        . = ALIGN(4);
+        _sstack = .;
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >RAM
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+        
+        *(.bss.init)
+    } > RAM
+    __bss_end = .;
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}
--- a/bsp/stm32/stm32f429-st-disco/board/linker_scripts/link.sct
+++ b/bsp/stm32/stm32f429-st-disco/board/linker_scripts/link.sct
@@ -0,0 +1,15 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00200000  {    ; load region size_region
+  ER_IROM1 0x08000000 0x00200000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  RW_IRAM1 0x20000000 0x00050000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+
--- a/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h
+++ b/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-04-10     ZYH          first version
+ */
+
+#ifndef _FAL_CFG_H_
+#define _FAL_CFG_H_
+
+#include <rtthread.h>
+#include <board.h>
+#if defined(BSP_USING_ON_CHIP_FLASH)
+#define FLASH_SIZE_GRANULARITY_16K   (4 * 16 * 1024)
+#define FLASH_SIZE_GRANULARITY_64K   (64 * 1024)
+#define FLASH_SIZE_GRANULARITY_128K  (15 * 128 * 1024)
+
+#define STM32_FLASH_START_ADRESS_16K  STM32_FLASH_START_ADRESS
+#define STM32_FLASH_START_ADRESS_64K  (STM32_FLASH_START_ADRESS_16K + FLASH_SIZE_GRANULARITY_16K)
+#define STM32_FLASH_START_ADRESS_128K (STM32_FLASH_START_ADRESS_64K + FLASH_SIZE_GRANULARITY_64K)
+
+extern const struct fal_flash_dev stm32_onchip_flash_16k;
+extern const struct fal_flash_dev stm32_onchip_flash_64k;
+extern const struct fal_flash_dev stm32_onchip_flash_128k;
+#endif
+
+#if defined(BSP_USING_QSPI_FLASH)
+extern struct fal_flash_dev nor_flash0;
+#endif
+
+/* flash device table */
+#if defined(BSP_USING_QSPI_FLASH) && defined(BSP_USING_ON_CHIP_FLASH)
+
+#define FAL_FLASH_DEV_TABLE                                          \
+{                                                                    \
+    &stm32_onchip_flash_16k,                                         \
+    &stm32_onchip_flash_64k,                                         \
+    &stm32_onchip_flash_128k,                                        \
+    &nor_flash0,                                                     \
+}
+
+#define ONCHIP_FLASH_PART_TABLE \
+    {FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_16k",  0 , FLASH_SIZE_GRANULARITY_16K , 0}, \
+    {FAL_PART_MAGIC_WROD, "param",      "onchip_flash_64k",  0 , FLASH_SIZE_GRANULARITY_64K , 0}, \
+    {FAL_PART_MAGIC_WROD, "app",        "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0},
+
+#define QSPI_FLASH_PART_TABLE \
+    {FAL_PART_MAGIC_WROD, "qspiflash",  FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0},
+
+#elif defined(BSP_USING_QSPI_FLASH)
+
+#define FAL_FLASH_DEV_TABLE                                          \
+{                                                                    \
+    &nor_flash0,                                                     \
+}
+
+#define ONCHIP_FLASH_PART_TABLE 
+
+#define QSPI_FLASH_PART_TABLE \
+    {FAL_PART_MAGIC_WROD, "qspiflash",  FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0},
+
+#elif defined(BSP_USING_ON_CHIP_FLASH)
+
+#define FAL_FLASH_DEV_TABLE                                          \
+{                                                                    \
+    &stm32_onchip_flash_16k,                                         \
+    &stm32_onchip_flash_64k,                                         \
+    &stm32_onchip_flash_128k,                                        \
+}
+
+#define ONCHIP_FLASH_PART_TABLE \
+    {FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_16k",  0 , FLASH_SIZE_GRANULARITY_16K , 0}, \
+    {FAL_PART_MAGIC_WROD, "param",      "onchip_flash_64k",  0 , FLASH_SIZE_GRANULARITY_64K , 0}, \
+    {FAL_PART_MAGIC_WROD, "app",        "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0},
+
+#define QSPI_FLASH_PART_TABLE 
+
+#else
+
+#define FAL_FLASH_DEV_TABLE { 0 }
+#define FAL_PART_TABLE  { 0 }
+
+#endif
+
+#ifdef FAL_PART_HAS_TABLE_CFG
+/* partition table */
+#define FAL_PART_TABLE                                                                                                     \
+{                                                                                                                          \
+    ONCHIP_FLASH_PART_TABLE \
+    QSPI_FLASH_PART_TABLE   \
+}
+#endif /* FAL_PART_HAS_TABLE_CFG */
+
+#endif /* _FAL_CFG_H_ */
--- a/bsp/stm32/stm32f429-st-disco/board/ports/touch/SConscript
+++ b/bsp/stm32/stm32f429-st-disco/board/ports/touch/SConscript
@@ -0,0 +1,9 @@
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('touch', src, depend = ['BSP_USING_TOUCH'], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.c
+++ b/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.c
--- a/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.h
+++ b/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.h
--- a/bsp/stm32/stm32f429-st-disco/project.ewp
+++ b/bsp/stm32/stm32f429-st-disco/project.ewp
--- a/bsp/stm32/stm32f429-st-disco/project.eww
+++ b/bsp/stm32/stm32f429-st-disco/project.eww
--- a/bsp/stm32/stm32f429-st-disco/project.uvopt
+++ b/bsp/stm32/stm32f429-st-disco/project.uvopt
--- a/bsp/stm32/stm32f429-st-disco/project.uvoptx
+++ b/bsp/stm32/stm32f429-st-disco/project.uvoptx
@@ -0,0 +1,192 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rt_thread_stm32f429</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>11</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U0672FF535550755187193631 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Source Group 1</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+  </Group>
+
+</ProjectOpt>
--- a/bsp/stm32/stm32f429-st-disco/project.uvproj
+++ b/bsp/stm32/stm32f429-st-disco/project.uvproj
--- a/bsp/stm32/stm32f429-st-disco/project.uvprojx
+++ b/bsp/stm32/stm32f429-st-disco/project.uvprojx
--- a/bsp/stm32/stm32f429-st-disco/readme.md
+++ b/bsp/stm32/stm32f429-st-disco/readme.md
@@ -20,8 +20,6 @@ STM32F429I-DISCOVERY 开发板使用高性能 MCU STM32F429，可以用于实现
 |LED| 6 个 |
 |按键| 2 个 |

-本 BSP 已测试支持 RT-Thread GUIEngine 和 Littlevgl，可以使用 env 工具安装相应的 Package。
-
 ## 2. 编译说明

 STM32F429-DISCO 板级包支持 MDK4﹑MDK5﹑IAR 开发环境和 GCC 编译器，以下是具体版本信息：
@@ -63,15 +61,15 @@ finsh />
 | 驱动 | 支持情况  |  备注  |
 | ------ | ----  | :------:  |
 | USART | 支持 | USART1/2/3 |
-| SPI | 支持 | SPI5 |
-| IIC | 支持 | IIC3 |
-| SDRAM | 支持 | |
-| LCD | 支持 | 支持 FrameBuffer 模式 LCD 显示 |
-| 触摸屏 | 支持 | IIC 接口 STMPE811 |
-| USB OTG Host| 即将支持 | 预计 2018/11 |
-| USB OTG Device| 未支持 | |
-| GPIO | 未支持 |  |
-| L3GD20 | 未支持 | |
+| GPIO | 支持 |  |
+| SPI |  |  |
+| IIC |  |  |
+| SDRAM |  | |
+| LCD |  |  |
+| 触摸屏 |  |  |
+| USB OTG Host|  |  |
+| USB OTG Device|  | |
+| L3GD20 |  | |



--- a/bsp/stm32/stm32f429-st-disco/rtconfig.h
+++ b/bsp/stm32/stm32f429-st-disco/rtconfig.h
@@ -13,6 +13,7 @@
 #define RT_TICK_PER_SECOND 100
 #define RT_USING_OVERFLOW_CHECK
 #define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
 #define RT_IDLE_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 1024
 #define RT_DEBUG
@@ -39,10 +40,18 @@
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart1"
+#define RT_VER_NUM 0x40002
+#define ARCH_ARM
+#define RT_USING_CPU_FFS
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M4

 /* RT-Thread Components */

 #define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10

 /* C++ features */

@@ -77,13 +86,11 @@
 #define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
 #define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_I2C
 #define RT_USING_I2C_BITOPS
 #define RT_USING_PIN

-/* Using WiFi */
-
-
 /* Using USB */


@@ -97,12 +104,12 @@
 /* Socket abstraction layer */


+/* Network interface device */
+
+
 /* light weight TCP/IP stack */


-/* Modbus master and slave stack */
-
-
 /* AT commands */


@@ -149,17 +156,22 @@
 /* miscellaneous packages */


-/* sample package */
-
 /* samples: kernel and components samples */

+#define SOC_FAMILY_STM32
+#define SOC_SERIES_STM32F4

-/* example package: hello */
+/* Hardware Drivers Config */
+
+#define SOC_STM32F429ZI
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_GPIO
+#define BSP_USING_UART
+#define BSP_USING_UART1
+
+/* Board extended module Drivers */

-#define RT_USING_ILI9341_LCD
-#define RT_USING_STMPE811_TOUCH
-#define RT_USING_EXT_SDRAM
-#define RT_USING_UART1
-#define RT_USING_I2C3

 #endif
--- a/bsp/stm32/stm32f429-st-disco/rtconfig.py
+++ b/bsp/stm32/stm32f429-st-disco/rtconfig.py
@@ -5,28 +5,30 @@ ARCH='arm'
 CPU='cortex-m4'
 CROSS_TOOL='gcc'

+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
 if os.getenv('RTT_CC'):
    CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')

 # cross_tool provides the cross compiler
 # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
 if  CROSS_TOOL == 'gcc':
-    PLATFORM 	= 'gcc'
-    EXEC_PATH 	= r'/home/zhuoyixu/gcc-arm-none-eabi-5_4-2016q2/bin'
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'C:\Users\XXYYZZ'
 elif CROSS_TOOL == 'keil':
-    PLATFORM 	= 'armcc'
-    EXEC_PATH 	= r'C:/Keil'
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = r'C:/Keil_v5'
 elif CROSS_TOOL == 'iar':
-    print('================ERROR============================')
-    print('Not support iar yet!')
-    print('=================================================')
-    exit(0)
+    PLATFORM    = 'iar'
+    EXEC_PATH   = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'

 if os.getenv('RTT_EXEC_PATH'):
-	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')

 BUILD = 'debug'
-STM32_TYPE = 'STM32F429xx'

 if PLATFORM == 'gcc':
    # toolchains
@@ -34,45 +36,51 @@ if PLATFORM == 'gcc':
    CC = PREFIX + 'gcc'
    AS = PREFIX + 'gcc'
    AR = PREFIX + 'ar'
+    CXX = PREFIX + 'g++'
    LINK = PREFIX + 'gcc'
    TARGET_EXT = 'elf'
    SIZE = PREFIX + 'size'
    OBJDUMP = PREFIX + 'objdump'
    OBJCPY = PREFIX + 'objcopy'

-    DEVICE = '  -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
-    CFLAGS = DEVICE + ' -g -Wall -DSTM32F429ZI -DSTM32F429_439xx -D__ASSEMBLY__'
+    DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE + ' -Dgcc'
    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
-    LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'

    CPATH = ''
    LPATH = ''

    if BUILD == 'debug':
-        CFLAGS += ' -O0 -gdwarf-2'
+        CFLAGS += ' -O0 -gdwarf-2 -g'
        AFLAGS += ' -gdwarf-2'
    else:
        CFLAGS += ' -O2'

+    CXXFLAGS = CFLAGS 
+
    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

 elif PLATFORM == 'armcc':
    # toolchains
    CC = 'armcc'
+    CXX = 'armcc'
    AS = 'armasm'
    AR = 'armar'
    LINK = 'armlink'
    TARGET_EXT = 'axf'

-    DEVICE = ' --cpu=cortex-m4.fp'
-    CFLAGS = DEVICE + ' --apcs=interwork -DSTM32F429_439xx'
-    AFLAGS = DEVICE
-    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct'
+    DEVICE = ' --cpu Cortex-M4.fp '
+    CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'

-    CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
-    LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
-
-    EXEC_PATH += '/arm/bin40/'
+    CFLAGS += ' -D__MICROLIB '
+    AFLAGS += ' --pd "__MICROLIB SETA 1" '
+    LFLAGS += ' --library_type=microlib '
+    EXEC_PATH += '/ARM/ARMCC/bin/'

    if BUILD == 'debug':
        CFLAGS += ' -g -O0'
@@ -80,17 +88,21 @@ elif PLATFORM == 'armcc':
    else:
        CFLAGS += ' -O2'

+    CXXFLAGS = CFLAGS 
+    CFLAGS += ' -std=c99'
+
    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'

 elif PLATFORM == 'iar':
    # toolchains
    CC = 'iccarm'
+    CXX = 'iccarm'
    AS = 'iasmarm'
    AR = 'iarchive'
    LINK = 'ilinkarm'
    TARGET_EXT = 'out'

-    DEVICE = ' -D USE_STDPERIPH_DRIVER' + ' -D STM32F10X_HD'
+    DEVICE = '-Dewarm'

    CFLAGS = DEVICE
    CFLAGS += ' --diag_suppress Pa050'
@@ -101,26 +113,31 @@ elif PLATFORM == 'iar':
    CFLAGS += ' --no_tbaa'
    CFLAGS += ' --no_clustering'
    CFLAGS += ' --no_scheduling'
-    CFLAGS += ' --debug'
    CFLAGS += ' --endian=little'
    CFLAGS += ' --cpu=Cortex-M4'
    CFLAGS += ' -e'
-    CFLAGS += ' --fpu=None'
+    CFLAGS += ' --fpu=VFPv4_sp'
    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
-    CFLAGS += ' -Ol'
-    CFLAGS += ' --use_c++_inline'
+    CFLAGS += ' --silent'

-    AFLAGS = ''
+    AFLAGS = DEVICE
    AFLAGS += ' -s+'
    AFLAGS += ' -w+'
    AFLAGS += ' -r'
    AFLAGS += ' --cpu Cortex-M4'
-    AFLAGS += ' --fpu None'
+    AFLAGS += ' --fpu VFPv4_sp'
+    AFLAGS += ' -S'

-    LFLAGS = ' --config stm32f10x_flash.icf'
-    LFLAGS += ' --redirect _Printf=_PrintfTiny'
-    LFLAGS += ' --redirect _Scanf=_ScanfSmall'
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = ' --config "board/linker_scripts/link.icf"'
    LFLAGS += ' --entry __iar_program_start'

+    CXXFLAGS = CFLAGS
+    
    EXEC_PATH = EXEC_PATH + '/arm/bin/'
-    POST_ACTION = ''
+    POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
--- a/bsp/stm32/stm32f429-st-disco/stm32_rom.ld
+++ b/bsp/stm32/stm32f429-st-disco/stm32_rom.ld
--- a/bsp/stm32/stm32f429-st-disco/stm32_rom.sct
+++ b/bsp/stm32/stm32f429-st-disco/stm32_rom.sct
--- a/bsp/stm32/stm32f429-st-disco/stm32f429_flash.icf
+++ b/bsp/stm32/stm32f429-st-disco/stm32f429_flash.icf
--- a/bsp/stm32/stm32f429-st-disco/template.ewp
+++ b/bsp/stm32/stm32f429-st-disco/template.ewp
--- a/bsp/stm32/stm32f429-st-disco/template.uvopt
+++ b/bsp/stm32/stm32f429-st-disco/template.uvopt
--- a/bsp/stm32/stm32f429-st-disco/template.uvoptx
+++ b/bsp/stm32/stm32f429-st-disco/template.uvoptx
@@ -0,0 +1,192 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rt_thread_stm32f429</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>11</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U0672FF535550755187193631 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>Source Group 1</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+  </Group>
+
+</ProjectOpt>
--- a/bsp/stm32/stm32f429-st-disco/template.uvproj
+++ b/bsp/stm32/stm32f429-st-disco/template.uvproj
--- a/bsp/stm32/stm32f429-st-disco/template.uvprojx
+++ b/bsp/stm32/stm32f429-st-disco/template.uvprojx
@@ -11,11 +11,12 @@
      <ToolsetNumber>0x4</ToolsetNumber>
      <ToolsetName>ARM-ADS</ToolsetName>
      <pCCUsed>5060300::V5.06 update 3 (build 300)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
      <TargetOption>
        <TargetCommonOption>
          <Device>STM32F429ZITx</Device>
          <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32F4xx_DFP.2.5.0</PackID>
+          <PackID>Keil.STM32F4xx_DFP.2.11.0</PackID>
          <PackURL>http://www.keil.com/pack</PackURL>
          <Cpu>IRAM(0x20000000,0x30000) IRAM2(0x10000000,0x10000) IROM(0x08000000,0x200000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
          <FlashUtilSpec></FlashUtilSpec>
@@ -132,7 +133,7 @@
            <UseExternalTool>0</UseExternalTool>
            <RunIndependent>0</RunIndependent>
            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
-            <Capability>0</Capability>
+            <Capability>1</Capability>
            <DriverSelection>-1</DriverSelection>
          </Flash1>
          <bUseTDR>1</bUseTDR>
@@ -183,6 +184,7 @@
            <hadXRAM>0</hadXRAM>
            <uocXRam>0</uocXRam>
            <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
            <hadIRAM2>1</hadIRAM2>
            <hadIROM2>0</hadIROM2>
            <StupSel>8</StupSel>
@@ -323,6 +325,7 @@
            <uThumb>0</uThumb>
            <uSurpInc>0</uSurpInc>
            <uC99>1</uC99>
+            <uGnu>0</uGnu>
            <useXO>0</useXO>
            <v6Lang>1</v6Lang>
            <v6LangP>1</v6LangP>
@@ -383,4 +386,10 @@
    </Target>
  </Targets>

+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
 </Project>
--- a/bsp/stm32f429-disco/Kconfig
+++ b/bsp/stm32f429-disco/Kconfig
@@ -1,30 +0,0 @@
-mainmenu "RT-Thread Configuration"
-
-config BSP_DIR
-    string
-    option env="BSP_ROOT"
-    default "."
-
-config RTT_DIR
-    string
-    option env="RTT_ROOT"
-    default "../.."
-    
-# you can change the RTT_ROOT default "../.." to your rtthread_root,
-# example : default "F:/git_repositories/rt-thread"
-
-config PKGS_DIR
-    string
-    option env="PKGS_ROOT"
-    default "packages"
-
-source "$RTT_DIR/Kconfig"
-source "$PKGS_DIR/Kconfig"
-
-source "$BSP_DIR/drivers/Kconfig"
-
-config SOC_STM32F429
-    bool
-    select RT_USING_COMPONENTS_INIT
-    # select RT_USING_USER_MAIN
-    default y
--- a/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h
+++ b/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f427xx.h
--- a/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h
+++ b/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h
--- a/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f437xx.h
+++ b/bsp/stm32f429-disco/Libraries/CMSIS/Device/ST/STM32F4xx/Include/stm32f437xx.h
--- a/Show More
+++ b/Show More