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https://github.com/RT-Thread/rt-thread.git
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add raspi4 driver
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bigmagic committed
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5bcf84edcb
commit
bda0d303af
7 files changed
+490
-3
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@@ -151,7 +151,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
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# CONFIG_RT_USING_CAN is not set
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# CONFIG_RT_USING_HWTIMER is not set
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# CONFIG_RT_USING_CPUTIME is not set
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# CONFIG_RT_USING_I2C is not set
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CONFIG_RT_USING_I2C=y
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# CONFIG_RT_I2C_DEBUG is not set
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CONFIG_RT_USING_I2C_BITOPS=y
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# CONFIG_RT_I2C_BITOPS_DEBUG is not set
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# CONFIG_RT_USING_PHY is not set
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_ADC is not set
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@@ -502,6 +505,8 @@ CONFIG_RT_LWIP_USING_PING=y
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# CONFIG_PKG_USING_AD7746 is not set
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# CONFIG_PKG_USING_PCA9685 is not set
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# CONFIG_PKG_USING_I2C_TOOLS is not set
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# CONFIG_PKG_USING_I2C_TOOLS_V100 is not set
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# CONFIG_PKG_USING_I2C_TOOLS_LATEST_VERSION is not set
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# CONFIG_PKG_USING_NRF24L01 is not set
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# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
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# CONFIG_PKG_USING_MAX17048 is not set
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@@ -526,6 +531,7 @@ CONFIG_RT_LWIP_USING_PING=y
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# CONFIG_PKG_USING_LY68L6400 is not set
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# CONFIG_PKG_USING_DM9051 is not set
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# CONFIG_PKG_USING_SSD1306 is not set
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# CONFIG_PKG_USING_SSD1306_LATEST_VERSION is not set
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# CONFIG_PKG_USING_QKEY is not set
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#
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@@ -634,6 +640,13 @@ CONFIG_BSP_USING_SPI=y
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CONFIG_BSP_USING_SPI0_BUS=y
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CONFIG_BSP_USING_SPI0_DEVICE0=y
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CONFIG_BSP_USING_SPI0_DEVICE1=y
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CONFIG_BSP_USING_I2C=y
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# CONFIG_BSP_USING_I2C0 is not set
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# CONFIG_BSP_USING_I2C1 is not set
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CONFIG_BSP_USING_I2C3=y
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# CONFIG_BSP_USING_I2C4 is not set
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# CONFIG_BSP_USING_I2C5 is not set
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# CONFIG_BSP_USING_I2C6 is not set
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CONFIG_BSP_USING_CORETIMER=y
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# CONFIG_BSP_USING_SYSTIMER is not set
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CONFIG_BSP_USING_WDT=y
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@@ -50,7 +50,7 @@ menu "Hardware Drivers Config"
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select RT_USING_PIN
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default y
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menuconfig BSP_USING_SPI
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menuconfig BSP_USING_SPI
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bool "Enable SPI"
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select RT_USING_SPI
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default n
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@@ -69,6 +69,32 @@ menu "Hardware Drivers Config"
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default n
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endif
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menuconfig BSP_USING_I2C
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bool "Enable I2C"
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select RT_USING_I2C
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default n
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if BSP_USING_I2C
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config BSP_USING_I2C0
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bool "Enable I2C0 BUS"
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default n
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config BSP_USING_I2C1
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bool "Enable I2C1 BUS"
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default n
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config BSP_USING_I2C3
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bool "Enable I2C3 BUS"
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default n
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config BSP_USING_I2C4
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bool "Enable I2C4 BUS"
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default n
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config BSP_USING_I2C5
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bool "Enable I2C5 BUS"
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default n
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config BSP_USING_I2C6
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bool "Enable I2C6 BUS"
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default n
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endif
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config BSP_USING_CORETIMER
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bool "Using core timer"
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select RT_USING_CORETIMER
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@@ -24,7 +24,7 @@ struct mem_desc platform_mem_desc[] = {
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{0x0E000000, 0x0EE00000, 0x0E000000, DEVICE_MEM}, //framebuffer
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{0x0F400000, 0x0FA00000, 0x0F400000, DEVICE_MEM}, //dsi_touch
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{0xFD500000, 0xFDA00000, 0xFD500000, DEVICE_MEM}, //gmac
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{0xFE000000, 0xFE400000, 0xFE000000, DEVICE_MEM}, //peripheral
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{0xFE000000, 0xFEA00000, 0xFE000000, DEVICE_MEM}, //peripheral
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{0xFF800000, 0xFFA00000, 0xFF800000, DEVICE_MEM} //gic
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};
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File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,59 @@
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/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-11-28 bigmagic first version
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*/
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#ifndef __DRV_I2C_H__
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#define __DRV_I2C_H__
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#include <rthw.h>
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#define BSC_C(BASE) __REG32(BASE + 0x0000) /* BSC Master Control */
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#define BSC_S(BASE) __REG32(BASE + 0x0004) /* BSC Master Status */
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#define BSC_DLEN(BASE) __REG32(BASE + 0x0008) /* BSC Master Data Length */
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#define BSC_A(BASE) __REG32(BASE + 0x000c) /* BSC Master Slave Address */
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#define BSC_FIFO(BASE) __REG32(BASE + 0x0010) /* BSC Master Data FIFO */
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#define BSC_DIV(BASE) __REG32(BASE + 0x0014) /* BSC Master Clock Divider */
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#define BSC_DEL(BASE) __REG32(BASE + 0x0018) /* BSC Master Data Delay */
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#define BSC_CLKT(BASE) __REG32(BASE + 0x001c) /* BSC Master Clock Stretch Timeout */
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/* Register masks for C Register */
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#define BSC_C_I2CEN (0x00008000) /* I2C Enable, 0 = disabled, 1 = enabled */
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#define BSC_C_INTR (0x00000400) /* Interrupt on RX */
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#define BSC_C_INTT (0x00000200) /* Interrupt on TX */
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#define BSC_C_INTD (0x00000100) /* Interrupt on DONE */
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#define BSC_C_ST (0x00000080) /* Start transfer, 1 = Start a new transfer */
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#define BSC_C_CLEAR_1 (0x00000020) /* Clear FIFO Clear */
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#define BSC_C_CLEAR_2 (0x00000010) /* Clear FIFO Clear */
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#define BSC_C_READ (0x00000001) /* Read transfer */
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/* Register masks for S Register */
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#define BSC_S_CLKT (0x00000200) /* Clock stretch timeout */
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#define BSC_S_ERR (0x00000100) /* ACK error */
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#define BSC_S_RXF (0x00000080) /* RXF FIFO full, 0 = FIFO is not full, 1 = FIFO is full */
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#define BSC_S_TXE (0x00000040) /* TXE FIFO full, 0 = FIFO is not full, 1 = FIFO is full */
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#define BSC_S_RXD (0x00000020) /* RXD FIFO contains data */
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#define BSC_S_TXD (0x00000010) /* TXD FIFO can accept data */
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#define BSC_S_RXR (0x00000008) /* RXR FIFO needs reading (full) */
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#define BSC_S_TXW (0x00000004) /* TXW FIFO needs writing (full) */
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#define BSC_S_DONE (0x00000002) /* Transfer DONE */
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#define BSC_S_TA (0x00000001) /* Transfer Active */
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#define BSC_FIFO_SIZE (16) /* BSC FIFO size */
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typedef enum
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{
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I2C_REASON_OK = 0x00, /* Success */
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I2C_REASON_ERROR_NACK = 0x01, /* Received a NACK */
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I2C_REASON_ERROR_CLKT = 0x02, /* Received Clock Stretch Timeout */
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I2C_REASON_ERROR_DATA = 0x04 /* Not all data is sent / received */
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} i2c_reason_codes;
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int rt_hw_i2c_init(void);
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#endif
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@@ -154,6 +154,23 @@ typedef enum {
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#define ETH_IRQ (160+29)
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//I2C
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#define BSC0_BASE_OFFSET (0x205000)
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#define BSC1_BASE_OFFSET (0x804000)
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#define BSC3_BASE_OFFSET (0x205600)
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#define BSC4_BASE_OFFSET (0x205800)
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#define BSC5_BASE_OFFSET (0x205A80)
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#define BSC6_BASE_OFFSET (0x205C00)
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//BSC2 and BSC7 masters are dedicated for use by the
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//HDMI interfaces and should not be accessed byuser programs.
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#define BSC0_BASE (PER_BASE + BSC0_BASE_OFFSET)
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#define BSC1_BASE (PER_BASE + BSC1_BASE_OFFSET)
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#define BSC3_BASE (PER_BASE + BSC3_BASE_OFFSET)
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#define BSC4_BASE (PER_BASE + BSC4_BASE_OFFSET)
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#define BSC5_BASE (PER_BASE + BSC5_BASE_OFFSET)
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#define BSC6_BASE (PER_BASE + BSC6_BASE_OFFSET)
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/* the basic constants and interfaces needed by gic */
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rt_inline rt_uint32_t platform_get_gic_dist_base(void)
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{
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@@ -100,6 +100,8 @@
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#define RT_USING_SERIAL
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#define RT_SERIAL_USING_DMA
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#define RT_SERIAL_RB_BUFSZ 64
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#define RT_USING_I2C
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#define RT_USING_I2C_BITOPS
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#define RT_USING_PIN
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#define RT_USING_SDIO
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#define RT_SDIO_STACK_SIZE 512
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@@ -258,6 +260,8 @@
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#define BSP_USING_SPI0_BUS
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#define BSP_USING_SPI0_DEVICE0
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#define BSP_USING_SPI0_DEVICE1
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#define BSP_USING_I2C
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#define BSP_USING_I2C3
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#define BSP_USING_CORETIMER
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#define BSP_USING_WDT
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#define BSP_USING_ETH
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