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https://github.com/RT-Thread/rt-thread.git
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[bsp][renesas][ra4m1-ek] add a new bsp for ra4m1-ek board (#10755)
* [bsp][renesas][ra4m1-ek] add a new bsp for ra4m1-ek board * [bsp][renesas][ra4m1-ek] fix can driver compile problem * [bsp][renesas][ra4m1-ek] bsp code format * [bsp][renesas][ra4m1-ek] reset file status to original generated by RASC * [bsp][renesas][ra4m1-ek] support RT-Thread Nano * [bsp][renesas][ra4m1-ek] make it mini support for GPIO && USART * [bsp][renesas][ra4m1-ek] make it compilable under the GCC compiler * [bsp][renesas][ra4m1-ek] remove component RT_USING_CPLUSPLUS * [bsp][renesas][ra4m1-ek] reduce bsp peripheral device driver
This commit is contained in:
180 files changed
+107141
-4
No files matched your search
@@ -256,6 +256,7 @@
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"renesas/ra6e2-ek",
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"renesas/ra6e2-fpb",
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"renesas/ra4e2-eco",
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"renesas/ra4m1-ek",
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"renesas/ra4m2-eco",
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"renesas/ra2l1-cpk",
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"renesas/ra8m1-ek",
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@@ -138,6 +138,26 @@ extern "C"
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#endif
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#endif /* SOC_SERIES_R7FA4E2 */
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#ifdef SOC_SERIES_R7FA4M1
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#include "ra4m1/uart_config.h"
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#ifdef BSP_USING_ADC
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#include "ra4m1/adc_config.h"
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#endif
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#ifdef BSP_USING_DAC
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#include "ra4m1/dac_config.h"
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#endif
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#ifdef BSP_USING_PWM
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#include "ra4m1/pwm_config.h"
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#endif
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#ifdef BSP_USING_CAN
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#include "ra4m1/can_config.h"
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#endif
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#endif /* SOC_SERIES_R7FA4M1 */
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#ifdef SOC_SERIES_R7FA4M2
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#include "ra4m2/uart_config.h"
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@@ -0,0 +1,42 @@
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-19 Mr.Tiger first version
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*/
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#ifndef __ADC_CONFIG_H__
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#define __ADC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct rt_adc_dev
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{
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_adc_map
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{
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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@@ -0,0 +1,48 @@
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-29 mazhiyuan first version
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*/
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#ifndef __CAN_CONFIG_H__
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#define __CAN_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_CAN0)
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#ifndef CAN0_CONFIG
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#define CAN0_CONFIG \
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{ \
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.name = "can0", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \
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.p_api_ctrl = &g_can0_ctrl, \
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.p_cfg = &g_can0_cfg, \
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}
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#endif /* CAN0_CONFIG */
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#endif /* BSP_USING_CAN0 */
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#if defined(BSP_USING_CAN1)
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#ifndef CAN1_CONFIG
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#define CAN1_CONFIG \
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{ \
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.name = "can1", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \
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.p_api_ctrl = &g_can1_ctrl, \
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.p_cfg = &g_can1_cfg, \
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}
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#endif /* CAN1_CONFIG */
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#endif /* BSP_USING_CAN1 */
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -0,0 +1,41 @@
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-19 Mr.Tiger first version
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*/
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#ifndef __DAC_CONFIG_H__
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#define __DAC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_DAC
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struct ra_dac_map
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{
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char name;
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const struct st_dac_cfg *g_cfg;
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const struct st_dac_instance_ctrl *g_ctrl;
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};
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struct ra_dac_dev
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{
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rt_dac_device_t ra_dac_device_t;
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struct ra_dac_map *ra_dac_map_dev;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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@@ -0,0 +1,68 @@
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-26 KevinXu first version
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*/
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#ifndef __PWM_CONFIG_H__
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#define __PWM_CONFIG_H__
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#include <rtthread.h>
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#include <drv_config.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum
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{
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#ifdef BSP_USING_PWM0
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BSP_PWM0_INDEX,
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#endif
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#ifdef BSP_USING_PWM1
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BSP_PWM1_INDEX,
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#endif
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#ifdef BSP_USING_PWM2
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BSP_PWM2_INDEX,
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#endif
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#ifdef BSP_USING_PWM3
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BSP_PWM3_INDEX,
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#endif
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#ifdef BSP_USING_PWM4
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BSP_PWM4_INDEX,
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#endif
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#ifdef BSP_USING_PWM5
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BSP_PWM5_INDEX,
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#endif
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#ifdef BSP_USING_PWM6
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BSP_PWM6_INDEX,
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#endif
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#ifdef BSP_USING_PWM7
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BSP_PWM7_INDEX,
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#endif
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#ifdef BSP_USING_PWM8
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BSP_PWM8_INDEX,
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#endif
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#ifdef BSP_USING_PWM9
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BSP_PWM9_INDEX,
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#endif
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BSP_PWMS_NUM
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};
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#define PWM_DRV_INITIALIZER(num) \
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{ \
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.name = "pwm"#num , \
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.g_cfg = &g_timer##num##_cfg, \
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.g_ctrl = &g_timer##num##_ctrl, \
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.g_timer = &g_timer##num, \
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PWM_CONFIG_H__ */
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@@ -0,0 +1,136 @@
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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-07-29 KyleChan first version
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*/
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#ifndef __UART_CONFIG_H__
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#define __UART_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_UART0)
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#ifndef UART0_CONFIG
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#define UART0_CONFIG \
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{ \
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.name = "uart0", \
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.p_api_ctrl = &g_uart0_ctrl, \
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.p_cfg = &g_uart0_cfg, \
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}
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#endif /* UART0_CONFIG */
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#endif /* BSP_USING_UART0 */
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#if defined(BSP_USING_UART1)
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#ifndef UART1_CONFIG
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#define UART1_CONFIG \
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{ \
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.name = "uart1", \
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.p_api_ctrl = &g_uart1_ctrl, \
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.p_cfg = &g_uart1_cfg, \
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}
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#endif /* UART1_CONFIG */
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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#ifndef UART2_CONFIG
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#define UART2_CONFIG \
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{ \
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.name = "uart2", \
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.p_api_ctrl = &g_uart2_ctrl, \
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.p_cfg = &g_uart2_cfg, \
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}
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#endif /* UART2_CONFIG */
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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#ifndef UART3_CONFIG
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#define UART3_CONFIG \
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{ \
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.name = "uart3", \
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.p_api_ctrl = &g_uart3_ctrl, \
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.p_cfg = &g_uart3_cfg, \
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}
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#endif /* UART3_CONFIG */
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#endif /* BSP_USING_UART3 */
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#if defined(BSP_USING_UART4)
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#ifndef UART4_CONFIG
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#define UART4_CONFIG \
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{ \
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.name = "uart4", \
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.p_api_ctrl = &g_uart4_ctrl, \
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.p_cfg = &g_uart4_cfg, \
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}
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#endif /* UART4_CONFIG */
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#endif /* BSP_USING_UART4 */
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#if defined(BSP_USING_UART5)
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#ifndef UART5_CONFIG
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#define UART5_CONFIG \
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{ \
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.name = "uart5", \
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.p_api_ctrl = &g_uart5_ctrl, \
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.p_cfg = &g_uart5_cfg, \
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}
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#endif /* UART5_CONFIG */
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#endif /* BSP_USING_UART5 */
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#if defined(BSP_USING_UART6)
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#ifndef UART6_CONFIG
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#define UART6_CONFIG \
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{ \
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.name = "uart6", \
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.p_api_ctrl = &g_uart6_ctrl, \
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.p_cfg = &g_uart6_cfg, \
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}
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#endif /* UART6_CONFIG */
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#endif /* BSP_USING_UART6 */
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#if defined(BSP_USING_UART7)
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#ifndef UART7_CONFIG
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#define UART7_CONFIG \
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{ \
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.name = "uart7", \
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.p_api_ctrl = &g_uart7_ctrl, \
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.p_cfg = &g_uart7_cfg, \
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}
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#endif /* UART7_CONFIG */
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#endif /* BSP_USING_UART7 */
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#if defined(BSP_USING_UART8)
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#ifndef UART8_CONFIG
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#define UART8_CONFIG \
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{ \
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.name = "uart8", \
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.p_api_ctrl = &g_uart8_ctrl, \
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.p_cfg = &g_uart8_cfg, \
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}
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#endif /* UART8_CONFIG */
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#endif /* BSP_USING_UART8 */
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#if defined(BSP_USING_UART9)
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#ifndef UART9_CONFIG
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#define UART9_CONFIG \
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{ \
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.name = "uart9", \
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.p_api_ctrl = &g_uart9_ctrl, \
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.p_cfg = &g_uart9_cfg, \
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}
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#endif /* UART9_CONFIG */
|
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#endif /* BSP_USING_UART9 */
|
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|
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#ifdef __cplusplus
|
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}
|
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#endif
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#endif
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@@ -224,11 +224,8 @@ rt_ssize_t ra_can_recvmsg(struct rt_can_device *can_dev, void *buf, rt_uint32_t
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RT_ASSERT(boxno < can->config->num_of_mailboxs);
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if (can->callback_args->mailbox != boxno)
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return 0;
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#if defined(BSP_USING_CANFD)
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msg_ra = &can->callback_args->frame;
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#else
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msg_ra = can->callback_args->p_frame;
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#endif
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msg_rt->id = msg_ra->id;
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msg_rt->ide = msg_ra->id_mode;
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@@ -43,6 +43,12 @@ config SOC_SERIES_R7FA4E2
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select SOC_FAMILY_RENESAS_RA
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default n
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config SOC_SERIES_R7FA4M1
|
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bool
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select ARCH_ARM_CORTEX_M4
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select SOC_FAMILY_RENESAS_RA
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default n
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config SOC_SERIES_R7FA4M2
|
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bool
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select ARCH_ARM_CORTEX_M4
|
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|
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@@ -0,0 +1,2 @@
|
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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
|
||||
<ddscApi/>
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,5 @@
|
||||
/RTE
|
||||
/Listings
|
||||
/Objects
|
||||
ra_cfg.txt
|
||||
|
||||
@@ -0,0 +1,9 @@
|
||||
# files format check exclude path, please follow the instructions below to modify;
|
||||
# If you need to exclude an entire folder, add the folder path in dir_path;
|
||||
# If you need to exclude a file, add the path to the file in file_path.
|
||||
|
||||
dir_path:
|
||||
- ra
|
||||
- ra_gen
|
||||
- ra_cfg
|
||||
- RTE
|
||||
@@ -0,0 +1,57 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
|
||||
<azone>
|
||||
<rzone name="R7FA4M1AB3CFP.rzone"/>
|
||||
<partition>
|
||||
<peripheral name="PORT0.CM4" group="PORT">
|
||||
<slot name="P004.CM4" secure="false"/>
|
||||
<slot name="P010.CM4" secure="false"/>
|
||||
<slot name="P011.CM4" secure="false"/>
|
||||
<slot name="P014.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT1.CM4" group="PORT">
|
||||
<slot name="P100.CM4" secure="false"/>
|
||||
<slot name="P101.CM4" secure="false"/>
|
||||
<slot name="P102.CM4" secure="false"/>
|
||||
<slot name="P104.CM4" secure="false"/>
|
||||
<slot name="P105.CM4" secure="false"/>
|
||||
<slot name="P106.CM4" secure="false"/>
|
||||
<slot name="P108.CM4" secure="false"/>
|
||||
<slot name="P109.CM4" secure="false"/>
|
||||
<slot name="P110.CM4" secure="false"/>
|
||||
<slot name="P115.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT2.CM4" group="PORT">
|
||||
<slot name="P205.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT3.CM4" group="PORT">
|
||||
<slot name="P300.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT4.CM4" group="PORT">
|
||||
<slot name="P400.CM4" secure="false"/>
|
||||
<slot name="P401.CM4" secure="false"/>
|
||||
<slot name="P403.CM4" secure="false"/>
|
||||
<slot name="P407.CM4" secure="false"/>
|
||||
<slot name="P410.CM4" secure="false"/>
|
||||
<slot name="P411.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT5.CM4" group="PORT">
|
||||
<slot name="P501.CM4" secure="false"/>
|
||||
<slot name="P502.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT9.CM4" group="PORT">
|
||||
<slot name="P914.CM4" secure="false"/>
|
||||
<slot name="P915.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="SCI0.CM4" group="SCI" security=""/>
|
||||
<peripheral name="ICU_EXT_IRQ.CM4">
|
||||
<slot name="ICU_EXT_IRQ0.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
<peripheral name="ICU.CM4">
|
||||
<slot name="IRQ0.CM4" secure="false"/>
|
||||
<slot name="IRQ1.CM4" secure="false"/>
|
||||
<slot name="IRQ2.CM4" secure="false"/>
|
||||
<slot name="IRQ3.CM4" secure="false"/>
|
||||
<slot name="IRQ4.CM4" secure="false"/>
|
||||
</peripheral>
|
||||
</partition>
|
||||
</azone>
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,76 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<raConfiguration version="11">
|
||||
<generalSettings>
|
||||
<option key="#Board#" value="board.ra4m1ek"/>
|
||||
<option key="CPU" value="RA4M1"/>
|
||||
<option key="Core" value="CM4"/>
|
||||
<option key="#TargetName#" value="R7FA4M1AB3CFP"/>
|
||||
<option key="#TargetARCHITECTURE#" value="cortex-m4"/>
|
||||
<option key="#DeviceCommand#" value="R7FA4M1AB"/>
|
||||
<option key="#RTOS#" value="_none"/>
|
||||
<option key="#pinconfiguration#" value="R7FA4M1AB3CFP.pincfg"/>
|
||||
<option key="#FSPVersion#" value="6.0.0"/>
|
||||
<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra4m1_ek##"/>
|
||||
<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
|
||||
</generalSettings>
|
||||
<raBspConfiguration/>
|
||||
<raClockConfiguration>
|
||||
<node id="board.clock.xtal.freq" mul="12000000" option="_edit"/>
|
||||
<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
|
||||
<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.24m"/>
|
||||
<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
|
||||
<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
|
||||
<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
|
||||
<node id="board.clock.pll.div" option="board.clock.pll.div.2"/>
|
||||
<node id="board.clock.pll.mul" option="board.clock.pll.mul.8"/>
|
||||
<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
|
||||
<node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
|
||||
<node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
|
||||
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
|
||||
<node id="board.clock.pclka.div" option="board.clock.pclka.div.1"/>
|
||||
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
|
||||
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.2"/>
|
||||
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
|
||||
<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.1"/>
|
||||
<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
|
||||
<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.1"/>
|
||||
<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
|
||||
<node id="board.clock.fclk.div" option="board.clock.fclk.div.2"/>
|
||||
<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
|
||||
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
|
||||
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
|
||||
<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
|
||||
<node id="board.clock.uclk.source" option="board.clock.uclk.source.pll"/>
|
||||
<node id="board.clock.uclk.display" option="board.clock.clkout.display.value"/>
|
||||
</raClockConfiguration>
|
||||
<raPinConfiguration>
|
||||
<pincfg active="true" name="" symbol="">
|
||||
<configSetting altId="adc0.an04.p004" configurationId="adc0.an04" peripheral="ADC0"/>
|
||||
<configSetting altId="adc0.an05.p010" configurationId="adc0.an05" peripheral="ADC0"/>
|
||||
<configSetting altId="adc0.an06.p011" configurationId="adc0.an06" peripheral="ADC0"/>
|
||||
<configSetting altId="ctsu0.ts35.p115" configurationId="ctsu0.ts35" peripheral="CTSU0"/>
|
||||
<configSetting altId="ctsu0.tscap.p205" configurationId="ctsu0.tscap" peripheral="CTSU0"/>
|
||||
<configSetting altId="dac0.da.p014" configurationId="dac0.da" peripheral="DAC120"/>
|
||||
<configSetting altId="debug0.tck.p300" configurationId="debug0.tck" isUsedByDriver="true" peripheral="DEBUG0"/>
|
||||
<configSetting altId="debug0.tdi.p110" configurationId="debug0.tdi" isUsedByDriver="true" peripheral="DEBUG0"/>
|
||||
<configSetting altId="debug0.tdo.p109" configurationId="debug0.tdo" isUsedByDriver="true" peripheral="DEBUG0"/>
|
||||
<configSetting altId="debug0.tms.p108" configurationId="debug0.tms" isUsedByDriver="true" peripheral="DEBUG0"/>
|
||||
<configSetting altId="gpt0.gtiocb.p106" configurationId="gpt0.gtiocb" peripheral="GPT0"/>
|
||||
<configSetting altId="gpt1.gtioca.p105" configurationId="gpt1.gtioca" peripheral="GPT1"/>
|
||||
<configSetting altId="iic0.scl.p400" configurationId="iic0.scl" peripheral="IIC0"/>
|
||||
<configSetting altId="iic0.sda.p401" configurationId="iic0.sda" peripheral="IIC0"/>
|
||||
<configSetting altId="p104.input" configurationId="p104"/>
|
||||
<configSetting altId="p403.output.low" configurationId="p403"/>
|
||||
<configSetting altId="sci0.rxd.p410" configurationId="sci0.rxd" isUsedByDriver="true" peripheral="SCI0"/>
|
||||
<configSetting altId="sci0.txd.p411" configurationId="sci0.txd" isUsedByDriver="true" peripheral="SCI0"/>
|
||||
<configSetting altId="sci1.rxd.p502" configurationId="sci1.rxd" peripheral="SCI1"/>
|
||||
<configSetting altId="sci1.txd.p501" configurationId="sci1.txd" peripheral="SCI1"/>
|
||||
<configSetting altId="spi0.miso.p100" configurationId="spi0.miso" peripheral="SPI0"/>
|
||||
<configSetting altId="spi0.mosi.p101" configurationId="spi0.mosi" peripheral="SPI0"/>
|
||||
<configSetting altId="spi0.rspck.p102" configurationId="spi0.rspck" peripheral="SPI0"/>
|
||||
<configSetting altId="usbfs0.usbdm.p915" configurationId="usbfs0.usbdm" peripheral="USBFS0"/>
|
||||
<configSetting altId="usbfs0.usbdp.p914" configurationId="usbfs0.usbdp" peripheral="USBFS0"/>
|
||||
<configSetting altId="usbfs0.vbus.p407" configurationId="usbfs0.vbus" peripheral="USBFS0"/>
|
||||
</pincfg>
|
||||
</raPinConfiguration>
|
||||
</raConfiguration>
|
||||
@@ -0,0 +1,31 @@
|
||||
#Tue Oct 14 15:27:04 CST 2025
|
||||
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
|
||||
com.renesas.cdt.ddsc.contentgen.options/options/suppresswarningspaths=ra/arm
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#Main\#\#CoreM\#\#\#\#6.1.0+fsp.6.0.0/all=1441545198,ra/arm/CMSIS_6/LICENSE|409404162,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_armclang.h|3070162158,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_clang.h|2642675438,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_compiler.h|432601292,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_gcc.h|1219721305,ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_version.h|1716662092,ra/arm/CMSIS_6/CMSIS/Core/Include/core_ca.h|3033126542,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0.h|3716711724,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0plus.h|1573341164,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm1.h|1528066797,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm23.h|956077447,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm3.h|3181146757,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm33.h|3422691989,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm35p.h|3011809468,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm4.h|862174236,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm52.h|3557548549,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm55.h|2145813412,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm7.h|215226313,ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm85.h|3759822293,ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc000.h|3285488134,ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc300.h|3342995321,ra/arm/CMSIS_6/CMSIS/Core/Include/core_starmc1.h|440777068,ra/arm/CMSIS_6/CMSIS/Core/Include/tz_context.h|987654843,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_armclang_a.h|1790528804,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_clang_a.h|117658130,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_cp15.h|3644000269,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_gcc_a.h|947683335,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_iccarm_a.h|3200474466,ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/irq_ctrl.h|2703360002,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_cachel1.h|271089146,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_mpu.h|3180041419,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv81m_pac.h|1572899130,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_mpu.h|1964429271,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_pmu.h|2095512231,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_armclang_m.h|2951442685,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_clang_m.h|1179088122,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_gcc_m.h|1753083115,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_iccarm_m.h|163659099,ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_tiarmclang_m.h|718227869,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_armclang_r.h|681720804,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_clang_r.h|154254372,ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_gcc_r.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#Main\#\#CoreM\#\#\#\#6.1.0+fsp.6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra4m1_ek\#\#\#\#6.0.0/all=1702787471,ra/board/ra4m1_ek/board.h|124710517,ra/board/ra4m1_ek/board_init.c|3939934833,ra/board/ra4m1_ek/board_init.h|11526103,ra/board/ra4m1_ek/board_leds.c|1939657623,ra/board/ra4m1_ek/board_leds.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra4m1_ek\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#device\#\#\#\#6.0.0/all=3861346754,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#device\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#device\#\#R7FA4M1AB3CFP\#\#6.0.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#device\#\#R7FA4M1AB3CFP\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#events\#\#\#\#6.0.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#events\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#fsp\#\#\#\#6.0.0/all=2026942077,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|4088081372,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|4102267291,ra/fsp/src/bsp/mcu/ra4m1/bsp_elc.h|3788374945,ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h|531694793,ra/fsp/src/bsp/mcu/ra4m1/bsp_linker.c|4191529127,ra/fsp/src/bsp/mcu/ra4m1/bsp_mcu_info.h|768675712,ra/fsp/src/bsp/mcu/ra4m1/bsp_override.h|3011620968,ra/fsp/src/bsp/mcu/ra4m1/bsp_peripheral.h|2134721004,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|3593160558,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|864672585,ra/fsp/src/bsp/mcu/all/bsp_common.c|1766417223,ra/fsp/src/bsp/mcu/all/bsp_common.h|2476010042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|1391797498,ra/fsp/src/bsp/mcu/all/bsp_delay.c|1823692586,ra/fsp/src/bsp/mcu/all/bsp_delay.h|1002834645,ra/fsp/src/bsp/mcu/all/bsp_exceptions.h|3294907421,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|2982971571,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|3480596119,ra/fsp/src/bsp/mcu/all/bsp_guard.c|379456290,ra/fsp/src/bsp/mcu/all/bsp_guard.h|554349144,ra/fsp/src/bsp/mcu/all/bsp_io.c|1270173761,ra/fsp/src/bsp/mcu/all/bsp_io.h|4226258005,ra/fsp/src/bsp/mcu/all/bsp_ipc.c|2907652827,ra/fsp/src/bsp/mcu/all/bsp_ipc.h|3952374344,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2972687487,ra/fsp/src/bsp/mcu/all/bsp_irq.h|1355081035,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|1712869516,ra/fsp/src/bsp/mcu/all/bsp_mmf.h|1272853908,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|3336678806,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|277796574,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|2455669964,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|659341578,ra/fsp/src/bsp/mcu/all/bsp_sdram.c|2275550317,ra/fsp/src/bsp/mcu/all/bsp_sdram.h|963966360,ra/fsp/src/bsp/mcu/all/bsp_security.c|1515045059,ra/fsp/src/bsp/mcu/all/bsp_security.h|686902729,ra/fsp/src/bsp/mcu/all/bsp_macl.c|3660402312,ra/fsp/src/bsp/mcu/all/bsp_macl.h|3202460155,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|2646736735,ra/fsp/inc/fsp_features.h|678846915,ra/fsp/inc/instances/r_ioport.h|2968025458,script/fsp.scat
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#fsp\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#linker\#\#\#\#6.0.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra4m1\#\#linker\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#6.0.0/all=2029657729,ra/fsp/inc/fsp_version.h|1808519175,ra/fsp/inc/api/fsp_common_api.h|1692739955,ra/fsp/inc/api/r_ioport_api.h|2238316510,ra/fsp/inc/api/bsp_api.h|3894236990,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|2057644446,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#6.0.0/all=3851692545,ra/fsp/inc/api/r_external_irq_api.h|677149658,ra/fsp/inc/instances/r_icu.h|1914184059,ra/fsp/src/r_icu/r_icu.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#6.0.0/all=1692739955,ra/fsp/inc/api/r_ioport_api.h|678846915,ra/fsp/inc/instances/r_ioport.h|3160786249,ra/fsp/src/r_ioport/r_ioport.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#6.0.0/all=429738396,ra/fsp/inc/api/r_transfer_api.h|2894177435,ra/fsp/inc/api/r_uart_api.h|3371921742,ra/fsp/inc/instances/r_sci_uart.h|4212520575,ra/fsp/src/r_sci_uart/r_sci_uart.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#6.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.project.standalone.projectgenerationoptions/isCpp=false
|
||||
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.i2c_on_iic_master.258755477=false
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.spi_on_spi.135970755=false
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.1227390277=false
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.1624896082=false
|
||||
@@ -0,0 +1,27 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
BSP_DIR := .
|
||||
|
||||
RTT_DIR := ../../..
|
||||
|
||||
# you can change the RTT_ROOT default "../.." to your rtthread_root,
|
||||
# example : default "F:/git_repositories/rt-thread"
|
||||
|
||||
PKGS_DIR := packages
|
||||
|
||||
ENV_DIR := /
|
||||
|
||||
config SOC_R7FA4M1AB
|
||||
bool
|
||||
select SOC_SERIES_R7FA4M1
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
source "$(RTT_DIR)/Kconfig"
|
||||
osource "$PKGS_DIR/Kconfig"
|
||||
rsource "../libraries/Kconfig"
|
||||
|
||||
if !RT_USING_NANO
|
||||
rsource "$(BSP_DIR)/board/Kconfig"
|
||||
endif
|
||||
@@ -0,0 +1,118 @@
|
||||
# 瑞萨 EK-RA4M1 开发板 BSP 说明
|
||||
|
||||
## 简介
|
||||
|
||||
本文档为瑞萨 EK-RA4M1 开发板提供的 BSP (板级支持包) 说明。通过阅读快速上手章节开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。
|
||||
|
||||
主要内容如下:
|
||||
|
||||
- 开发板介绍
|
||||
- BSP 快速上手指南
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
基于瑞萨 RA4M1 MCU 开发的 EK-RA4M1 MCU 评估板,通过灵活配置软件包和 IDE,可帮助用户对 RA4M1 MCU 群组的特性轻松进行评估,并对嵌入系统应用程序进行开发。
|
||||
|
||||
开发板正面外观如下图:
|
||||
|
||||

|
||||
|
||||
该开发板常用 **板载资源** 如下:
|
||||
|
||||
- MCU:R7FA4M1AB3CFP,48MHz,Arm Cortex®-M4 内核,256KB 代码闪存, 32KB SRAM
|
||||
- 调试接口:板载 J-Link 接口
|
||||
- 扩展接口:Arduino Uno 兼容接口
|
||||
|
||||
**更多详细资料及工具**
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下:
|
||||
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| :----------------- | :----------------- | :------------- |
|
||||
| UART | 支持 | SCI0 为默认日志输出端口 |
|
||||
| GPIO | 支持 | |
|
||||
| IIC | 支持 | 软件 |
|
||||
| WDT | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
| ADC | 支持 | |
|
||||
| DAC | 支持 | |
|
||||
| SPI | 支持 | |
|
||||
| FLASH | 支持 | |
|
||||
| PWM | 支持 | |
|
||||
|
||||
## 快速上手
|
||||
|
||||
本 BSP 目前支持GCC和MDK工程,开发前请使用 USB 数据线连接开发板到 PC,使用 J-link 接口下载和 DEBUG 程序。使用 USB 转串口工具连接 SCI0:P410(TXD)、P411(RXD)。
|
||||
|
||||
### 编译
|
||||
|
||||
#### MDK
|
||||
|
||||
MDK工程步骤如下:
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
2. 输入`menuconfig`命令配置工程,配置好之后保存退出。
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
#### GCC
|
||||
|
||||
GCC工程步骤如下:
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
2. 输入`menuconfig`命令配置工程,配置好之后保存退出。
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons` 命令即可编译工程。
|
||||
|
||||
### 烧录
|
||||
|
||||
打开 J-Flash lite 工具,选择芯片型号 R7FA4M1AB,点击 OK 进入工具。选择 BSP 目录下 编译出的 rtthread.hex 文件,点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤:
|
||||
|
||||

|
||||
|
||||

|
||||
|
||||
### 运行
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口(115200-8-1-N),复位设备后,可以看到 RT-Thread 的输出信息。输入 help 命令可查看系统中支持的命令。
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 5.2.2 build Sep 27 2025 17:11:21
|
||||
2006 - 2024 Copyright by RT-Thread team
|
||||
[D/drv.adc] adc0 init success
|
||||
|
||||
Hello RT-Thread!
|
||||
msh >
|
||||
```
|
||||
|
||||
**应用入口函数**
|
||||
|
||||
应用层的入口函数在 **src\hal_entry.c** 中 的 `void hal_entry(void)` 。用户编写的源文件可直接放在 src 目录下。
|
||||
|
||||
```c
|
||||
void hal_entry(void)
|
||||
{
|
||||
rt_kprintf("\nHello RT-Thread!\n");
|
||||
|
||||
rt_pin_attach_irq(rt_pin_get(USER_BUTTON_PIN), PIN_IRQ_MODE_RISING, on_button_clicked, RT_NULL);
|
||||
rt_pin_irq_enable(rt_pin_get(USER_BUTTON_PIN), PIN_IRQ_ENABLE);
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
## 维护
|
||||
|
||||
作者:[hywing](https://github.com/hywing)
|
||||
|
||||
邮箱:hywing.sir@qq.com
|
||||
@@ -0,0 +1,28 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
CPPPATH = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
print("\nThe current project does not support IAR build\n")
|
||||
Return('group')
|
||||
elif rtconfig.PLATFORM in ['gcc', 'armclang']:
|
||||
if GetOption('target') != 'mdk5':
|
||||
src = Glob('./src/*.c')
|
||||
|
||||
if rtconfig.PLATFORM in ['armclang']:
|
||||
CPPPATH = [cwd + '/script/bsp_link/Keil']
|
||||
elif rtconfig.PLATFORM in ['gcc']:
|
||||
CPPPATH = [cwd + '/script/bsp_link/GCC']
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
Return('group')
|
||||
@@ -0,0 +1,54 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
rtconfig.BSP_LIBRARY_TYPE = None
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,151 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_R7FA4M1AB
|
||||
bool
|
||||
select SOC_SERIES_R7FA4M1
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SCI
|
||||
select BSP_USING_SCI9
|
||||
select BSP_USING_SCI9_SPI
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
rsource "../../libraries/HAL_Drivers/drivers/Kconfig"
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
select RT_USING_SERIAL_V2
|
||||
if BSP_USING_UART
|
||||
|
||||
menuconfig BSP_USING_UART0
|
||||
bool "Enable UART0"
|
||||
default y
|
||||
if BSP_USING_UART0
|
||||
config BSP_UART0_RX_USING_DMA
|
||||
bool "Enable UART0 RX DMA"
|
||||
depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART0_TX_USING_DMA
|
||||
bool "Enable UART0 TX DMA"
|
||||
depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART0_RX_BUFSIZE
|
||||
int "Set UART0 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART0_TX_BUFSIZE
|
||||
int "Set UART0 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI0
|
||||
bool "Enable SPI0 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_HW_I2C
|
||||
bool "Enable I2C"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select BSP_USING_HW_I2C0
|
||||
if BSP_USING_HW_I2C
|
||||
config BSP_USING_HW_I2C0
|
||||
bool "Enable I2C0 BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC0
|
||||
bool "Enable ADC0"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_TIM
|
||||
bool "Enable timer"
|
||||
default n
|
||||
select RT_USING_HWTIMER
|
||||
if BSP_USING_TIM
|
||||
config BSP_USING_TIM0
|
||||
bool "Enable TIM0"
|
||||
default n
|
||||
config BSP_USING_TIM1
|
||||
bool "Enable TIM1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_DAC
|
||||
bool "Enable DAC"
|
||||
default n
|
||||
select RT_USING_DAC
|
||||
if BSP_USING_DAC
|
||||
config BSP_USING_DAC0
|
||||
bool "Enable DAC0"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
config BSP_USING_PWM0
|
||||
bool "Enable GPT0 (32-Bits) output PWM"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
default n
|
||||
select RT_USING_CAN
|
||||
if BSP_USING_CAN
|
||||
config BSP_USING_CAN0
|
||||
bool "Enable CAN0"
|
||||
default n
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
@@ -0,0 +1,16 @@
|
||||
import os
|
||||
from building import *
|
||||
|
||||
objs = []
|
||||
cwd = GetCurrentDir()
|
||||
list = os.listdir(cwd)
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('*.c')
|
||||
|
||||
objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-10 Sherman first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define RA_SRAM_SIZE 32 /* The SRAM size of the chip needs to be modified */
|
||||
#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024)
|
||||
|
||||
#ifdef __ARMCC_VERSION
|
||||
extern int Image$$__RAM_end$$ZI$$Base;
|
||||
#define HEAP_BEGIN ((void *)&Image$$__RAM_end$$ZI$$Base)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __ddsc_RAM_END;
|
||||
#define HEAP_BEGIN (&__ddsc_RAM_END)
|
||||
#endif
|
||||
|
||||
#define HEAP_END RA_SRAM_END
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,22 @@
|
||||
|
||||
from building import *
|
||||
import rtconfig
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = []
|
||||
|
||||
if GetDepend(['BSP_USING_RW007']):
|
||||
src += Glob('drv_rw007.c')
|
||||
|
||||
CPPPATH = [cwd]
|
||||
LOCAL_CFLAGS = ''
|
||||
|
||||
if rtconfig.PLATFORM in ['gcc', 'armclang']:
|
||||
LOCAL_CFLAGS += ' -std=c99'
|
||||
elif rtconfig.PLATFORM in ['armcc']:
|
||||
LOCAL_CFLAGS += ' --c99'
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-07-20 Sherman the first version
|
||||
*/
|
||||
#ifndef _FAL_CFG_H_
|
||||
#define _FAL_CFG_H_
|
||||
|
||||
#include "hal_data.h"
|
||||
|
||||
extern const struct fal_flash_dev _onchip_flash_lp;
|
||||
#define FLASH_START_ADDRESS 0x00000000
|
||||
/* flash device table */
|
||||
#define FAL_FLASH_DEV_TABLE \
|
||||
{ \
|
||||
&_onchip_flash_lp, \
|
||||
}
|
||||
/* ====================== Partition Configuration ========================== */
|
||||
#ifdef FAL_PART_HAS_TABLE_CFG
|
||||
/** partition table, The chip flash partition is defined in "\ra\fsp\src\bsp\mcu\ra6m4\bsp_feature.h".
|
||||
* More details can be found in the RA6M4 Group User Manual: Hardware section 47 Flash memory.*/
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_lp", 128*1024, 128*1024, 0}, \
|
||||
}
|
||||
#endif /* FAL_PART_HAS_TABLE_CFG */
|
||||
#endif /* _FAL_CFG_H_ */
|
||||
@@ -0,0 +1,82 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-01-19 Sherman first version
|
||||
*/
|
||||
|
||||
/* Number of IRQ channels on the device */
|
||||
#define RA_IRQ_MAX 16
|
||||
|
||||
/* PIN to IRQx table */
|
||||
#define PIN2IRQX_TABLE \
|
||||
{ \
|
||||
switch (pin) \
|
||||
{ \
|
||||
case BSP_IO_PORT_04_PIN_00: \
|
||||
case BSP_IO_PORT_02_PIN_06: \
|
||||
case BSP_IO_PORT_01_PIN_05: \
|
||||
return 0; \
|
||||
case BSP_IO_PORT_02_PIN_05: \
|
||||
case BSP_IO_PORT_01_PIN_01: \
|
||||
case BSP_IO_PORT_01_PIN_04: \
|
||||
return 1; \
|
||||
case BSP_IO_PORT_02_PIN_03: \
|
||||
case BSP_IO_PORT_01_PIN_00: \
|
||||
case BSP_IO_PORT_02_PIN_13: \
|
||||
return 2; \
|
||||
case BSP_IO_PORT_02_PIN_02: \
|
||||
case BSP_IO_PORT_01_PIN_10: \
|
||||
case BSP_IO_PORT_02_PIN_12: \
|
||||
return 3; \
|
||||
case BSP_IO_PORT_04_PIN_02: \
|
||||
case BSP_IO_PORT_01_PIN_11: \
|
||||
case BSP_IO_PORT_04_PIN_11: \
|
||||
return 4; \
|
||||
case BSP_IO_PORT_04_PIN_01: \
|
||||
case BSP_IO_PORT_03_PIN_02: \
|
||||
case BSP_IO_PORT_04_PIN_10: \
|
||||
return 5; \
|
||||
case BSP_IO_PORT_03_PIN_01: \
|
||||
case BSP_IO_PORT_00_PIN_00: \
|
||||
case BSP_IO_PORT_04_PIN_09: \
|
||||
return 6; \
|
||||
case BSP_IO_PORT_00_PIN_01: \
|
||||
case BSP_IO_PORT_04_PIN_08: \
|
||||
return 7; \
|
||||
case BSP_IO_PORT_00_PIN_02: \
|
||||
case BSP_IO_PORT_03_PIN_05: \
|
||||
case BSP_IO_PORT_04_PIN_15: \
|
||||
return 8; \
|
||||
case BSP_IO_PORT_00_PIN_04: \
|
||||
case BSP_IO_PORT_03_PIN_04: \
|
||||
case BSP_IO_PORT_04_PIN_14: \
|
||||
return 9; \
|
||||
case BSP_IO_PORT_00_PIN_05: \
|
||||
case BSP_IO_PORT_07_PIN_09: \
|
||||
return 10; \
|
||||
case BSP_IO_PORT_05_PIN_01: \
|
||||
case BSP_IO_PORT_00_PIN_06: \
|
||||
case BSP_IO_PORT_07_PIN_08: \
|
||||
return 11; \
|
||||
case BSP_IO_PORT_05_PIN_02: \
|
||||
case BSP_IO_PORT_00_PIN_08: \
|
||||
return 12; \
|
||||
case BSP_IO_PORT_00_PIN_15: \
|
||||
case BSP_IO_PORT_00_PIN_09: \
|
||||
return 13; \
|
||||
case BSP_IO_PORT_04_PIN_03: \
|
||||
case BSP_IO_PORT_05_PIN_12: \
|
||||
case BSP_IO_PORT_05_PIN_05: \
|
||||
return 14; \
|
||||
case BSP_IO_PORT_04_PIN_04: \
|
||||
case BSP_IO_PORT_05_PIN_11: \
|
||||
case BSP_IO_PORT_05_PIN_06: \
|
||||
return 15; \
|
||||
default : \
|
||||
return -1; \
|
||||
} \
|
||||
}
|
||||
@@ -0,0 +1,171 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<package xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<vendor>Renesas</vendor>
|
||||
<name>Project Content</name>
|
||||
<description>Project content managed by the Renesas Smart Configurator</description>
|
||||
<url/>
|
||||
<releases>
|
||||
<release version="1.0.0"/>
|
||||
</releases>
|
||||
<generators>
|
||||
<generator id="Renesas RA Smart Configurator">
|
||||
<project_files>
|
||||
<file category="include" name="src/"/>
|
||||
<file category="source" name="src/hal_entry.c"/>
|
||||
</project_files>
|
||||
</generator>
|
||||
</generators>
|
||||
<components generator="Renesas RA Smart Configurator">
|
||||
<component Cclass="Flex Software" Cgroup="Components" Csub="ra">
|
||||
<files>
|
||||
<file category="include" name="ra/arm/CMSIS_6/CMSIS/Core/Include/"/>
|
||||
<file category="include" name="ra/fsp/inc/"/>
|
||||
<file category="include" name="ra/fsp/inc/api/"/>
|
||||
<file category="include" name="ra/fsp/inc/instances/"/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_armclang_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_clang_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_cp15.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_gcc_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/cmsis_iccarm_a.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/a-profile/irq_ctrl.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_armclang.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_clang.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_compiler.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_gcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/cmsis_version.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_ca.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm0plus.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm23.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm3.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm33.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm35p.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm4.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm52.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm55.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_cm85.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc000.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_sc300.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/core_starmc1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_cachel1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv7m_mpu.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv81m_pac.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_mpu.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/armv8m_pmu.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_armclang_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_clang_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_gcc_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_iccarm_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/cmsis_tiarmclang_m.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_armclang_r.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_clang_r.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/r-profile/cmsis_gcc_r.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_6/CMSIS/Core/Include/tz_context.h" path=""/>
|
||||
<file category="other" name="ra/arm/CMSIS_6/LICENSE"/>
|
||||
<file category="header" name="ra/board/ra4m1_ek/board.h" path=""/>
|
||||
<file category="source" name="ra/board/ra4m1_ek/board_init.c"/>
|
||||
<file category="header" name="ra/board/ra4m1_ek/board_init.h" path=""/>
|
||||
<file category="source" name="ra/board/ra4m1_ek/board_leds.c"/>
|
||||
<file category="header" name="ra/board/ra4m1_ek/board_leds.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/fsp_common_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_external_irq_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_icu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_sci_uart.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA4M1AB.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_exceptions.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_ipc.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_ipc.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_macl.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_macl.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mmf.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sdram.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_sdram.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_tfu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra4m1/bsp_elc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/ra4m1/bsp_linker.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra4m1/bsp_mcu_info.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra4m1/bsp_override.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra4m1/bsp_peripheral.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/r_can/r_can.o"/>
|
||||
<file category="source" name="ra/fsp/src/r_icu/r_icu.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
|
||||
<file category="other" name="ra/fsp/src/r_spi/r_spi.o"/>
|
||||
<file category="other" name="ra/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Build Configuration">
|
||||
<files>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/"/>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/bsp/"/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/board_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_ofs_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_icu_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_sci_uart_cfg.h" path=""/>
|
||||
<file category="other" name="ra_cfg/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Generated Data">
|
||||
<files>
|
||||
<file category="include" name="ra_gen/"/>
|
||||
<file category="header" name="ra_gen/bsp_clock_cfg.h" path=""/>
|
||||
<file category="source" name="ra_gen/common_data.c"/>
|
||||
<file category="header" name="ra_gen/common_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/hal_data.c"/>
|
||||
<file category="header" name="ra_gen/hal_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/main.c"/>
|
||||
<file category="source" name="ra_gen/pin_data.c"/>
|
||||
<file category="other" name="ra_gen/SConscript"/>
|
||||
<file category="source" name="ra_gen/vector_data.c"/>
|
||||
<file category="header" name="ra_gen/vector_data.h" path=""/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Linker Script">
|
||||
<files>
|
||||
<file category="linkerScript" name="script/fsp.scat"/>
|
||||
</files>
|
||||
</component>
|
||||
</components>
|
||||
</package>
|
||||
File diff suppressed because it is too large.
Load diff
Binary file not shown.
|
After Width: | Height: | Size: 59 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 59 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 749 KiB |
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|
After Width: | Height: | Size: 2.7 KiB |
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|
After Width: | Height: | Size: 27 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 19 KiB |
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,17 @@
|
||||
/* generated memory regions file - do not edit */
|
||||
#define RAM_START 0x20000000
|
||||
#define RAM_LENGTH 0x00008000
|
||||
#define FLASH_START 0x00000440
|
||||
#define FLASH_LENGTH 0x0003fbc0
|
||||
#define DATA_FLASH_START 0x40100000
|
||||
#define DATA_FLASH_LENGTH 0x00002000
|
||||
#define OPTION_SETTING_OFS0_START 0x00000400
|
||||
#define OPTION_SETTING_OFS0_LENGTH 0x00000004
|
||||
#define OPTION_SETTING_OFS1_START 0x00000404
|
||||
#define OPTION_SETTING_OFS1_LENGTH 0x00000004
|
||||
#define OPTION_SETTING_SECMPU_START 0x00000408
|
||||
#define OPTION_SETTING_SECMPU_LENGTH 0x00000034
|
||||
#define OPTION_SETTING_OSIS_START 0x01010018
|
||||
#define OPTION_SETTING_OSIS_LENGTH 0x00000020
|
||||
#define FLASH_GAP_START 0x00000000
|
||||
#define FLASH_GAP_LENGTH 0x00000400
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,26 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
group = []
|
||||
CPPPATH = []
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
print("\nThe current project does not support IAR build\n")
|
||||
Return('group')
|
||||
elif rtconfig.PLATFORM in ['gcc', 'armclang']:
|
||||
if GetOption('target') != 'mdk5':
|
||||
src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c')
|
||||
src += Glob(cwd + '/fsp/src/bsp/mcu/ra4m1/*.c')
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c']
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c']
|
||||
src += Glob(cwd + '/fsp/src/r_*/*.c')
|
||||
CPPPATH = [ cwd + '/arm/CMSIS_6/CMSIS/Core/Include',
|
||||
cwd + '/fsp/inc',
|
||||
cwd + '/fsp/inc/api',
|
||||
cwd + '/fsp/inc/instances',]
|
||||
|
||||
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,190 @@
|
||||
/*
|
||||
* Copyright (c) 2017-2020 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* CMSIS-Core(A) Interrupt Controller API Header File
|
||||
*/
|
||||
|
||||
#ifndef IRQ_CTRL_H_
|
||||
#define IRQ_CTRL_H_
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef IRQHANDLER_T
|
||||
#define IRQHANDLER_T
|
||||
/// Interrupt handler data type
|
||||
typedef void (*IRQHandler_t) (void);
|
||||
#endif
|
||||
|
||||
#ifndef IRQN_ID_T
|
||||
#define IRQN_ID_T
|
||||
/// Interrupt ID number data type
|
||||
typedef int32_t IRQn_ID_t;
|
||||
#endif
|
||||
|
||||
/* Interrupt mode bit-masks */
|
||||
#define IRQ_MODE_TRIG_Pos (0U)
|
||||
#define IRQ_MODE_TRIG_Msk (0x07UL /*<< IRQ_MODE_TRIG_Pos*/)
|
||||
#define IRQ_MODE_TRIG_LEVEL (0x00UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: level triggered interrupt
|
||||
#define IRQ_MODE_TRIG_LEVEL_LOW (0x01UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: low level triggered interrupt
|
||||
#define IRQ_MODE_TRIG_LEVEL_HIGH (0x02UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: high level triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE (0x04UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: edge triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE_RISING (0x05UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising edge triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE_FALLING (0x06UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: falling edge triggered interrupt
|
||||
#define IRQ_MODE_TRIG_EDGE_BOTH (0x07UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising and falling edge triggered interrupt
|
||||
|
||||
#define IRQ_MODE_TYPE_Pos (3U)
|
||||
#define IRQ_MODE_TYPE_Msk (0x01UL << IRQ_MODE_TYPE_Pos)
|
||||
#define IRQ_MODE_TYPE_IRQ (0x00UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU IRQ line
|
||||
#define IRQ_MODE_TYPE_FIQ (0x01UL << IRQ_MODE_TYPE_Pos) ///< Type: interrupt source triggers CPU FIQ line
|
||||
|
||||
#define IRQ_MODE_DOMAIN_Pos (4U)
|
||||
#define IRQ_MODE_DOMAIN_Msk (0x01UL << IRQ_MODE_DOMAIN_Pos)
|
||||
#define IRQ_MODE_DOMAIN_NONSECURE (0x00UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting non-secure domain
|
||||
#define IRQ_MODE_DOMAIN_SECURE (0x01UL << IRQ_MODE_DOMAIN_Pos) ///< Domain: interrupt is targeting secure domain
|
||||
|
||||
#define IRQ_MODE_CPU_Pos (5U)
|
||||
#define IRQ_MODE_CPU_Msk (0xFFUL << IRQ_MODE_CPU_Pos)
|
||||
#define IRQ_MODE_CPU_ALL (0x00UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets all CPUs
|
||||
#define IRQ_MODE_CPU_0 (0x01UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 0
|
||||
#define IRQ_MODE_CPU_1 (0x02UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 1
|
||||
#define IRQ_MODE_CPU_2 (0x04UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 2
|
||||
#define IRQ_MODE_CPU_3 (0x08UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 3
|
||||
#define IRQ_MODE_CPU_4 (0x10UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 4
|
||||
#define IRQ_MODE_CPU_5 (0x20UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 5
|
||||
#define IRQ_MODE_CPU_6 (0x40UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 6
|
||||
#define IRQ_MODE_CPU_7 (0x80UL << IRQ_MODE_CPU_Pos) ///< CPU: interrupt targets CPU 7
|
||||
|
||||
// Encoding in some early GIC implementations
|
||||
#define IRQ_MODE_MODEL_Pos (13U)
|
||||
#define IRQ_MODE_MODEL_Msk (0x1UL << IRQ_MODE_MODEL_Pos)
|
||||
#define IRQ_MODE_MODEL_NN (0x0UL << IRQ_MODE_MODEL_Pos) ///< Corresponding interrupt is handled using the N-N model
|
||||
#define IRQ_MODE_MODEL_1N (0x1UL << IRQ_MODE_MODEL_Pos) ///< Corresponding interrupt is handled using the 1-N model
|
||||
|
||||
#define IRQ_MODE_ERROR (0x80000000UL) ///< Bit indicating mode value error
|
||||
|
||||
/* Interrupt priority bit-masks */
|
||||
#define IRQ_PRIORITY_Msk (0x0000FFFFUL) ///< Interrupt priority value bit-mask
|
||||
#define IRQ_PRIORITY_ERROR (0x80000000UL) ///< Bit indicating priority value error
|
||||
|
||||
/// Initialize interrupt controller.
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_Initialize (void);
|
||||
|
||||
/// Register interrupt handler.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \param[in] handler interrupt handler function address
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler);
|
||||
|
||||
/// Get the registered interrupt handler.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return registered interrupt handler function address.
|
||||
IRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn);
|
||||
|
||||
/// Enable interrupt.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_Enable (IRQn_ID_t irqn);
|
||||
|
||||
/// Disable interrupt.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_Disable (IRQn_ID_t irqn);
|
||||
|
||||
/// Get interrupt enable state.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 - interrupt is disabled, 1 - interrupt is enabled.
|
||||
uint32_t IRQ_GetEnableState (IRQn_ID_t irqn);
|
||||
|
||||
/// Configure interrupt request mode.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \param[in] mode mode configuration
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode);
|
||||
|
||||
/// Get interrupt mode configuration.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return current interrupt mode configuration with optional IRQ_MODE_ERROR bit set.
|
||||
uint32_t IRQ_GetMode (IRQn_ID_t irqn);
|
||||
|
||||
/// Get ID number of current interrupt request (IRQ).
|
||||
/// \return interrupt ID number.
|
||||
IRQn_ID_t IRQ_GetActiveIRQ (void);
|
||||
|
||||
/// Get ID number of current fast interrupt request (FIQ).
|
||||
/// \return interrupt ID number.
|
||||
IRQn_ID_t IRQ_GetActiveFIQ (void);
|
||||
|
||||
/// Signal end of interrupt processing.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn);
|
||||
|
||||
/// Set interrupt pending flag.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPending (IRQn_ID_t irqn);
|
||||
|
||||
/// Get interrupt pending flag.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 - interrupt is not pending, 1 - interrupt is pending.
|
||||
uint32_t IRQ_GetPending (IRQn_ID_t irqn);
|
||||
|
||||
/// Clear interrupt pending flag.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_ClearPending (IRQn_ID_t irqn);
|
||||
|
||||
/// Set interrupt priority value.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \param[in] priority interrupt priority value
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority);
|
||||
|
||||
/// Get interrupt priority.
|
||||
/// \param[in] irqn interrupt ID number
|
||||
/// \return current interrupt priority value with optional IRQ_PRIORITY_ERROR bit set.
|
||||
uint32_t IRQ_GetPriority (IRQn_ID_t irqn);
|
||||
|
||||
/// Set priority masking threshold.
|
||||
/// \param[in] priority priority masking threshold value
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPriorityMask (uint32_t priority);
|
||||
|
||||
/// Get priority masking threshold
|
||||
/// \return current priority masking threshold value with optional IRQ_PRIORITY_ERROR bit set.
|
||||
uint32_t IRQ_GetPriorityMask (void);
|
||||
|
||||
/// Set priority grouping field split point
|
||||
/// \param[in] bits number of MSB bits included in the group priority field comparison
|
||||
/// \return 0 on success, -1 on error.
|
||||
int32_t IRQ_SetPriorityGroupBits (uint32_t bits);
|
||||
|
||||
/// Get priority grouping field split point
|
||||
/// \return current number of MSB bits included in the group priority field comparison with
|
||||
/// optional IRQ_PRIORITY_ERROR bit set.
|
||||
uint32_t IRQ_GetPriorityGroupBits (void);
|
||||
|
||||
#endif // IRQ_CTRL_H_
|
||||
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@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2009-2023 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* CMSIS Core Version Definitions
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS-Core(M) Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 6U) /*!< \brief [31:16] CMSIS-Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< \brief [15:0] CMSIS-Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< \brief CMSIS Core(M) version number */
|
||||
|
||||
/* CMSIS-Core(A) Version definitions */
|
||||
#define __CA_CMSIS_VERSION_MAIN ( 6U) /*!< \brief [31:16] CMSIS-Core(A) main version */
|
||||
#define __CA_CMSIS_VERSION_SUB ( 1U) /*!< \brief [15:0] CMSIS-Core(A) sub version */
|
||||
#define __CA_CMSIS_VERSION ((__CA_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CA_CMSIS_VERSION_SUB ) /*!< \brief CMSIS-Core(A) version number */
|
||||
|
||||
#endif
|
||||
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+1451
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@@ -0,0 +1,161 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_armclang_r.h
|
||||
* @brief CMSIS compiler armclang (Arm Compiler 6) header file
|
||||
* @version V6.0.0
|
||||
* @date 04. December 2024
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_ARMCLANG_R_H
|
||||
#define __CMSIS_ARMCLANG_R_H
|
||||
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
|
||||
#ifndef __CMSIS_ARMCLANG_H
|
||||
#error "This file must not be included directly"
|
||||
#endif
|
||||
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/** \brief Get CPSR Register
|
||||
\return CPSR Register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MRS %0, cpsr" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/** \brief Set CPSR Register
|
||||
\param [in] cpsr CPSR value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
|
||||
{
|
||||
__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Mode
|
||||
\return Processor Mode
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_mode(void)
|
||||
{
|
||||
return (__get_CPSR() & 0x1FU);
|
||||
}
|
||||
|
||||
/** \brief Set Mode
|
||||
\param [in] mode Mode value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
|
||||
{
|
||||
__ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Stack Pointer
|
||||
\return Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set Stack Pointer
|
||||
\param [in] stack Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
|
||||
{
|
||||
__ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get USR/SYS Stack Pointer
|
||||
\return USR/SYS Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
uint32_t result;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV %1, sp \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr), "=r"(result) : : "memory"
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set USR/SYS Stack Pointer
|
||||
\param [in] topOfProcStack USR/SYS Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV sp, %1 \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr) : "r" (topOfProcStack) : "memory"
|
||||
);
|
||||
}
|
||||
|
||||
/** \brief Get FPEXC
|
||||
\return Floating Point Exception Control register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
uint32_t result;
|
||||
__ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
|
||||
return(result);
|
||||
#else
|
||||
return(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/** \brief Set FPEXC
|
||||
\param [in] fpexc Floating Point Exception Control value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
__ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
|
||||
#endif
|
||||
}
|
||||
|
||||
/** @} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/*
|
||||
* Include common core functions to access Coprocessor 15 registers
|
||||
*/
|
||||
|
||||
#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
|
||||
#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
|
||||
|
||||
#endif /* __CMSIS_ARMCLANG_R_H */
|
||||
@@ -0,0 +1,161 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_clang_r.h
|
||||
* @brief CMSIS compiler armclang (Arm Compiler 6) header file
|
||||
* @version V6.0.0
|
||||
* @date 04. December 2024
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_CLANG_CORER_H
|
||||
#define __CMSIS_CLANG_CORER_H
|
||||
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
|
||||
#ifndef __CMSIS_CLANG_H
|
||||
#error "This file must not be included directly"
|
||||
#endif
|
||||
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/** \brief Get CPSR Register
|
||||
\return CPSR Register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MRS %0, cpsr" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/** \brief Set CPSR Register
|
||||
\param [in] cpsr CPSR value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
|
||||
{
|
||||
__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Mode
|
||||
\return Processor Mode
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_mode(void)
|
||||
{
|
||||
return (__get_CPSR() & 0x1FU);
|
||||
}
|
||||
|
||||
/** \brief Set Mode
|
||||
\param [in] mode Mode value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
|
||||
{
|
||||
__ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Stack Pointer
|
||||
\return Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set Stack Pointer
|
||||
\param [in] stack Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
|
||||
{
|
||||
__ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get USR/SYS Stack Pointer
|
||||
\return USR/SYS Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
uint32_t result;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV %1, sp \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr), "=r"(result) : : "memory"
|
||||
);
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set USR/SYS Stack Pointer
|
||||
\param [in] topOfProcStack USR/SYS Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
|
||||
{
|
||||
uint32_t cpsr;
|
||||
__ASM volatile(
|
||||
"MRS %0, cpsr \n"
|
||||
"CPS #0x1F \n" // no effect in USR mode
|
||||
"MOV sp, %1 \n"
|
||||
"MSR cpsr_c, %0 \n" // no effect in USR mode
|
||||
"ISB" : "=r"(cpsr) : "r" (topOfProcStack) : "memory"
|
||||
);
|
||||
}
|
||||
|
||||
/** \brief Get FPEXC
|
||||
\return Floating Point Exception Control register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
uint32_t result;
|
||||
__ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
|
||||
return(result);
|
||||
#else
|
||||
return(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/** \brief Set FPEXC
|
||||
\param [in] fpexc Floating Point Exception Control value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
__ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
|
||||
#endif
|
||||
}
|
||||
|
||||
/** @} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/*
|
||||
* Include common core functions to access Coprocessor 15 registers
|
||||
*/
|
||||
|
||||
#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
|
||||
#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
|
||||
|
||||
#endif /* __CMSIS_CLANG_COREA_H */
|
||||
@@ -0,0 +1,163 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_gcc_r.h
|
||||
* @brief CMSIS compiler GCC header file
|
||||
* @version V6.0.0
|
||||
* @date 4. August 2024
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_GCC_R_H
|
||||
#define __CMSIS_GCC_R_H
|
||||
|
||||
#ifndef __CMSIS_GCC_H
|
||||
#error "This file must not be included directly"
|
||||
#endif
|
||||
|
||||
/* ignore some GCC warnings */
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wsign-conversion"
|
||||
#pragma GCC diagnostic ignored "-Wconversion"
|
||||
#pragma GCC diagnostic ignored "-Wunused-parameter"
|
||||
|
||||
|
||||
/** \defgroup CMSIS_Core_intrinsics CMSIS Core Intrinsics
|
||||
Access to dedicated SIMD instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/** \brief Get CPSR Register
|
||||
\return CPSR Register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_CPSR(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MRS %0, cpsr" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
/** \brief Set CPSR Register
|
||||
\param [in] cpsr CPSR value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)
|
||||
{
|
||||
__ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "cc", "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Mode
|
||||
\return Processor Mode
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_mode(void)
|
||||
{
|
||||
return (__get_CPSR() & 0x1FU);
|
||||
}
|
||||
|
||||
/** \brief Set Mode
|
||||
\param [in] mode Mode value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_mode(uint32_t mode)
|
||||
{
|
||||
__ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get Stack Pointer
|
||||
\return Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP(void)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM volatile("MOV %0, sp" : "=r" (result) : : "memory");
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set Stack Pointer
|
||||
\param [in] stack Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP(uint32_t stack)
|
||||
{
|
||||
__ASM volatile("MOV sp, %0" : : "r" (stack) : "memory");
|
||||
}
|
||||
|
||||
/** \brief Get USR/SYS Stack Pointer
|
||||
\return USR/SYS Stack Pointer value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)
|
||||
{
|
||||
uint32_t cpsr = __get_CPSR();
|
||||
uint32_t result;
|
||||
__ASM volatile(
|
||||
"CPS #0x1F \n"
|
||||
"MOV %0, sp " : "=r"(result) : : "memory"
|
||||
);
|
||||
__set_CPSR(cpsr);
|
||||
__ISB();
|
||||
return result;
|
||||
}
|
||||
|
||||
/** \brief Set USR/SYS Stack Pointer
|
||||
\param [in] topOfProcStack USR/SYS Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)
|
||||
{
|
||||
uint32_t cpsr = __get_CPSR();
|
||||
__ASM volatile(
|
||||
"CPS #0x1F \n"
|
||||
"MOV sp, %0 " : : "r" (topOfProcStack) : "memory"
|
||||
);
|
||||
__set_CPSR(cpsr);
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** \brief Get FPEXC
|
||||
\return Floating Point Exception Control register value
|
||||
*/
|
||||
__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
uint32_t result;
|
||||
__ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory");
|
||||
return(result);
|
||||
#else
|
||||
return(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/** \brief Set FPEXC
|
||||
\param [in] fpexc Floating Point Exception Control value to set
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)
|
||||
{
|
||||
#if (__FPU_PRESENT == 1)
|
||||
__ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory");
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Include common core functions to access Coprocessor 15 registers
|
||||
*/
|
||||
|
||||
#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" )
|
||||
#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" )
|
||||
#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" )
|
||||
|
||||
/*@} end of group CMSIS_Core_intrinsics */
|
||||
|
||||
#pragma GCC diagnostic pop
|
||||
|
||||
#endif /* __CMSIS_GCC_R_H */
|
||||
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (c) 2017-2023 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* CMSIS Core(M) Context Management for Armv8-M TrustZone
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef TZ_CONTEXT_H
|
||||
#define TZ_CONTEXT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef TZ_MODULEID_T
|
||||
#define TZ_MODULEID_T
|
||||
/// \details Data type that identifies secure software modules called by a process.
|
||||
typedef uint32_t TZ_ModuleId_t;
|
||||
#endif
|
||||
|
||||
/// \details TZ Memory ID identifies an allocated memory slot.
|
||||
typedef uint32_t TZ_MemoryId_t;
|
||||
|
||||
/// Initialize secure context memory system
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_InitContextSystem_S (void);
|
||||
|
||||
/// Allocate context memory for calling secure software modules in TrustZone
|
||||
/// \param[in] module identifies software modules called from non-secure mode
|
||||
/// \return value != 0 id TrustZone memory slot identifier
|
||||
/// \return value 0 no memory available or internal error
|
||||
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
|
||||
|
||||
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Load secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Store secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
|
||||
|
||||
#endif // TZ_CONTEXT_H
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,52 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : board.h
|
||||
* Description : Includes and API function available for this board.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup BOARDS
|
||||
* @defgroup BOARD_RA4M1_EK BSP for the EK-RA4M1 Board
|
||||
* @brief BSP for the EK-RA4M1 Board
|
||||
*
|
||||
* The EK-RA4M1 is a development kit for the Renesas RA4M1 microcontroller.
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* BSP Board Specific Includes. */
|
||||
#include "board_init.h"
|
||||
#include "board_leds.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
#define BOARD_RA4M1_EK
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** @} (end defgroup BOARD_RA4M1_EK) */
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,53 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : board_init.c
|
||||
* Description : This module calls any initialization code specific to this BSP.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BOARD_EK_RA4M1_INIT
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
|
||||
#if defined(BOARD_RA4M1_EK)
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Private global variables and functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @brief Performs any initialization specific to this BSP.
|
||||
*
|
||||
* @param[in] p_args Pointer to arguments of the user's choice.
|
||||
**********************************************************************************************************************/
|
||||
void bsp_init (void * p_args)
|
||||
{
|
||||
FSP_PARAMETER_NOT_USED(p_args);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end addtogroup BOARD_EK_A4M1_INIT) */
|
||||
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : board_init.h
|
||||
* Description : This module calls any initialization code specific to this BSP.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup BOARD_EK_RA4M1
|
||||
* @defgroup BOARD_EK_RA4M1_INIT Board Specific Code
|
||||
* @brief Board specific code for the EK_RA4M1 Board
|
||||
*
|
||||
* This include file is specific to the EK_RA4M1 board.
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BOARD_INIT_H
|
||||
#define BOARD_INIT_H
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
void bsp_init(void * p_args);
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end defgroup BOARD_RA4M1_EK_INIT) */
|
||||
@@ -0,0 +1,60 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : board_leds.c
|
||||
* Description : This module has information about the LEDs on this board.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_RA4M1_EK_LEDS
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
#if defined(BOARD_RA4M1_EK)
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Private global variables and functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Array of LED IOPORT pins. */
|
||||
static const uint16_t g_bsp_prv_leds[] =
|
||||
{
|
||||
(uint16_t) BSP_IO_PORT_01_PIN_06, ///< LED1 - Red
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Structure with LED information for this board. */
|
||||
|
||||
const bsp_leds_t g_bsp_leds =
|
||||
{
|
||||
.led_count = (uint16_t) ((sizeof(g_bsp_prv_leds) / sizeof(g_bsp_prv_leds[0]))),
|
||||
.p_leds = &g_bsp_prv_leds[0]
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end addtogroup BSP_RA4M1_EK_LEDS) */
|
||||
@@ -0,0 +1,63 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : board_leds.h
|
||||
* Description : This module has information about the LEDs on this board.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup BOARD_RA4M1_EK
|
||||
* @defgroup BSP_EK_RA4M1_LEDS Board LEDs
|
||||
* @brief LED information for this board.
|
||||
*
|
||||
* This is code specific to the EK_RA4M1 board.
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BOARD_LEDS_H
|
||||
#define BOARD_LEDS_H
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Information on how many LEDs and what pins they are on. */
|
||||
typedef struct st_bsp_leds
|
||||
{
|
||||
uint16_t led_count; ///< The number of LEDs on this board
|
||||
uint16_t const * p_leds; ///< Pointer to an array of IOPORT pins for controlling LEDs
|
||||
} bsp_leds_t;
|
||||
|
||||
/** Available user-controllable LEDs on this board. These enums can be can be used to index into the array of LED pins
|
||||
* found in the bsp_leds_t structure. */
|
||||
typedef enum e_bsp_led
|
||||
{
|
||||
BSP_LED_LED1, ///< TB LED - Red
|
||||
} bsp_led_t;
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Public Functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
||||
/** @} (end defgroup BSP_EK_RA4M1_LEDS) */
|
||||
@@ -0,0 +1,101 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef BSP_API_H
|
||||
#define BSP_API_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes <System Includes> , "Project Includes"
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* FSP Common Includes. */
|
||||
#include "fsp_common_api.h"
|
||||
|
||||
/* Gets MCU configuration information. */
|
||||
#include "bsp_cfg.h"
|
||||
|
||||
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
|
||||
|
||||
/* Store warning settings for 'conversion' and 'sign-conversion' to as specified on command line. */
|
||||
#pragma GCC diagnostic push
|
||||
|
||||
/* CMSIS-CORE currently generates 2 warnings when compiling with GCC. One in core_cmInstr.h and one in core_cm4_simd.h.
|
||||
* We are not modifying these files so we will ignore these warnings temporarily. */
|
||||
#pragma GCC diagnostic ignored "-Wconversion"
|
||||
#pragma GCC diagnostic ignored "-Wsign-conversion"
|
||||
#endif
|
||||
|
||||
/* Vector information for this project. This is generated by the tooling. */
|
||||
#include "../../src/bsp/mcu/all/bsp_exceptions.h"
|
||||
#include "vector_data.h"
|
||||
|
||||
/* CMSIS-CORE Renesas Device Files. Must come after bsp_feature.h, which is included in bsp_cfg.h. */
|
||||
#include "../../src/bsp/cmsis/Device/RENESAS/Include/renesas.h"
|
||||
#include "../../src/bsp/cmsis/Device/RENESAS/Include/system.h"
|
||||
|
||||
#if defined(__GNUC__) && !defined(__ARMCC_VERSION)
|
||||
|
||||
/* Restore warning settings for 'conversion' and 'sign-conversion' to as specified on command line. */
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
#if defined(BSP_API_OVERRIDE)
|
||||
#include BSP_API_OVERRIDE
|
||||
#else
|
||||
|
||||
/* BSP Common Includes. */
|
||||
#include "../../src/bsp/mcu/all/bsp_common.h"
|
||||
|
||||
/* BSP MCU Specific Includes. */
|
||||
#include "../../src/bsp/mcu/all/bsp_register_protection.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_irq.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_io.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_group_irq.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_clocks.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_module_stop.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_security.h"
|
||||
|
||||
/* Factory MCU information. */
|
||||
#include "../../inc/fsp_features.h"
|
||||
|
||||
/* BSP Common Includes (Other than bsp_common.h) */
|
||||
#include "../../src/bsp/mcu/all/bsp_delay.h"
|
||||
#include "../../src/bsp/mcu/all/bsp_mcu_api.h"
|
||||
|
||||
#if __has_include("../../src/bsp/mcu/all/internal/bsp_internal.h")
|
||||
#include "../../src/bsp/mcu/all/internal/bsp_internal.h"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Exported global functions (to be accessed by other files)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup BSP_MCU
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
fsp_err_t R_FSP_VersionGet(fsp_pack_version_t * const p_version);
|
||||
|
||||
/** @} (end addtogroup BSP_MCU) */
|
||||
|
||||
/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,154 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup RENESAS_INPUT_INTERFACES
|
||||
* @defgroup EXTERNAL_IRQ_API External IRQ Interface
|
||||
* @brief Interface for detecting external interrupts.
|
||||
*
|
||||
* @section EXTERNAL_IRQ_API_Summary Summary
|
||||
* The External IRQ Interface is for configuring interrupts to fire when a trigger condition is detected on an
|
||||
* external IRQ pin.
|
||||
*
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_EXTERNAL_IRQ_API_H
|
||||
#define R_EXTERNAL_IRQ_API_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Includes board and MCU related header files. */
|
||||
#include "bsp_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/*********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/** Callback function parameter data */
|
||||
typedef struct st_external_irq_callback_args
|
||||
{
|
||||
/** Placeholder for user data. Set in @ref external_irq_api_t::open function in @ref external_irq_cfg_t. */
|
||||
void * p_context;
|
||||
uint32_t channel; ///< The physical hardware channel that caused the interrupt.
|
||||
} external_irq_callback_args_t;
|
||||
|
||||
#ifndef BSP_OVERRIDE_EXTERNAL_IRQ_TRIGGER_T
|
||||
|
||||
/** Condition that will trigger an interrupt when detected. */
|
||||
typedef enum e_external_irq_trigger
|
||||
{
|
||||
EXTERNAL_IRQ_TRIG_FALLING = 0, ///< Falling edge trigger
|
||||
EXTERNAL_IRQ_TRIG_RISING = 1, ///< Rising edge trigger
|
||||
EXTERNAL_IRQ_TRIG_BOTH_EDGE = 2, ///< Both edges trigger
|
||||
EXTERNAL_IRQ_TRIG_LEVEL_LOW = 3, ///< Low level trigger
|
||||
EXTERNAL_IRQ_TRIG_LEVEL_HIGH = 4 ///< High level trigger
|
||||
} external_irq_trigger_t;
|
||||
#endif
|
||||
|
||||
#ifndef BSP_OVERRIDE_EXTERNAL_IRQ_PCLK_DIV_T
|
||||
|
||||
/** External IRQ input pin digital filtering sample clock divisor settings. The digital filter rejects trigger
|
||||
* conditions that are shorter than 3 periods of the filter clock.
|
||||
*/
|
||||
typedef enum e_external_irq_clock_source_div
|
||||
{
|
||||
EXTERNAL_IRQ_CLOCK_SOURCE_DIV_1 = 0, ///< Filter using clock source divided by 1
|
||||
EXTERNAL_IRQ_CLOCK_SOURCE_DIV_8 = 1, ///< Filter using clock source divided by 8
|
||||
EXTERNAL_IRQ_CLOCK_SOURCE_DIV_32 = 2, ///< Filter using clock source divided by 32
|
||||
EXTERNAL_IRQ_CLOCK_SOURCE_DIV_64 = 3, ///< Filter using clock source divided by 64
|
||||
} external_irq_clock_source_div_t;
|
||||
#endif
|
||||
|
||||
/** User configuration structure, used in open function */
|
||||
typedef struct st_external_irq_cfg
|
||||
{
|
||||
uint8_t channel; ///< Hardware channel used.
|
||||
uint8_t ipl; ///< Interrupt priority
|
||||
IRQn_Type irq; ///< Interrupt number assigned to this instance
|
||||
external_irq_trigger_t trigger; ///< Trigger setting.
|
||||
external_irq_clock_source_div_t clock_source_div; ///< Digital filter clock divisor setting.
|
||||
bool filter_enable; ///< Digital filter enable/disable selection.
|
||||
|
||||
/** Callback provided external input trigger occurs. */
|
||||
void (* p_callback)(external_irq_callback_args_t * p_args);
|
||||
|
||||
/** Placeholder for user data. Passed to the user callback in @ref external_irq_callback_args_t. */
|
||||
void * p_context;
|
||||
void const * p_extend; ///< External IRQ hardware dependent configuration.
|
||||
} external_irq_cfg_t;
|
||||
|
||||
/** External IRQ control block. Allocate an instance specific control block to pass into the external IRQ API calls.
|
||||
*/
|
||||
typedef void external_irq_ctrl_t;
|
||||
|
||||
/** External interrupt driver structure. External interrupt functions implemented at the HAL layer will follow this API. */
|
||||
typedef struct st_external_irq_api
|
||||
{
|
||||
/** Initial configuration.
|
||||
*
|
||||
* @param[out] p_ctrl Pointer to control block. Must be declared by user. Value set here.
|
||||
* @param[in] p_cfg Pointer to configuration structure. All elements of the structure must be set by user.
|
||||
*/
|
||||
fsp_err_t (* open)(external_irq_ctrl_t * const p_ctrl, external_irq_cfg_t const * const p_cfg);
|
||||
|
||||
/** Enable callback when an external trigger condition occurs.
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in Open call for this external interrupt.
|
||||
*/
|
||||
fsp_err_t (* enable)(external_irq_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Disable callback when external trigger condition occurs.
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in Open call for this external interrupt.
|
||||
*/
|
||||
fsp_err_t (* disable)(external_irq_ctrl_t * const p_ctrl);
|
||||
|
||||
/**
|
||||
* Specify callback function and optional context pointer and working memory pointer.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to the External IRQ control block.
|
||||
* @param[in] p_callback Callback function
|
||||
* @param[in] p_context Pointer to send to callback function
|
||||
* @param[in] p_working_memory Pointer to volatile memory where callback structure can be allocated.
|
||||
* Callback arguments allocated here are only valid during the callback.
|
||||
*/
|
||||
fsp_err_t (* callbackSet)(external_irq_ctrl_t * const p_ctrl, void (* p_callback)(external_irq_callback_args_t *),
|
||||
void * const p_context, external_irq_callback_args_t * const p_callback_memory);
|
||||
|
||||
/** Allow driver to be reconfigured. May reduce power consumption.
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in Open call for this external interrupt.
|
||||
*/
|
||||
fsp_err_t (* close)(external_irq_ctrl_t * const p_ctrl);
|
||||
} external_irq_api_t;
|
||||
|
||||
/** This structure encompasses everything that is needed to use an instance of this interface. */
|
||||
typedef struct st_external_irq_instance
|
||||
{
|
||||
external_irq_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
|
||||
external_irq_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
|
||||
external_irq_api_t const * p_api; ///< Pointer to the API structure for this instance
|
||||
} external_irq_instance_t;
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup EXTERNAL_IRQ_API)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,192 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup RENESAS_SYSTEM_INTERFACES
|
||||
* @defgroup IOPORT_API I/O Port Interface
|
||||
* @brief Interface for accessing I/O ports and configuring I/O functionality.
|
||||
*
|
||||
* @section IOPORT_API_SUMMARY Summary
|
||||
* The IOPort shared interface provides the ability to access the IOPorts of a device at both bit and port level.
|
||||
* Port and pin direction can be changed.
|
||||
*
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_IOPORT_API_H
|
||||
#define R_IOPORT_API_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common error codes and definitions. */
|
||||
#include "bsp_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
#ifndef BSP_OVERRIDE_IOPORT_SIZE_T
|
||||
|
||||
/** IO port type used with ports */
|
||||
typedef uint16_t ioport_size_t; ///< IO port size
|
||||
#endif
|
||||
|
||||
/** Pin identifier and pin configuration value */
|
||||
typedef struct st_ioport_pin_cfg
|
||||
{
|
||||
uint32_t pin_cfg; ///< Pin configuration - Use ioport_cfg_options_t parameters to configure
|
||||
bsp_io_port_pin_t pin; ///< Pin identifier
|
||||
} ioport_pin_cfg_t;
|
||||
|
||||
/** Multiple pin configuration data for loading into registers by R_IOPORT_Open() */
|
||||
typedef struct st_ioport_cfg
|
||||
{
|
||||
uint16_t number_of_pins; ///< Number of pins for which there is configuration data
|
||||
ioport_pin_cfg_t const * p_pin_cfg_data; ///< Pin configuration data
|
||||
const void * p_extend; ///< Pointer to hardware extend configuration
|
||||
} ioport_cfg_t;
|
||||
|
||||
/** IOPORT control block. Allocate an instance specific control block to pass into the IOPORT API calls.
|
||||
*/
|
||||
typedef void ioport_ctrl_t;
|
||||
|
||||
/** IOPort driver structure. IOPort functions implemented at the HAL layer will follow this API. */
|
||||
typedef struct st_ioport_api
|
||||
{
|
||||
/** Initialize internal driver data and initial pin configurations. Called during startup. Do
|
||||
* not call this API during runtime. Use @ref ioport_api_t::pinsCfg for runtime reconfiguration of
|
||||
* multiple pins.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure. Must be declared by user. Elements set here.
|
||||
* @param[in] p_cfg Pointer to pin configuration data array.
|
||||
*/
|
||||
fsp_err_t (* open)(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg);
|
||||
|
||||
/** Close the API.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
**/
|
||||
fsp_err_t (* close)(ioport_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Configure multiple pins.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] p_cfg Pointer to pin configuration data array.
|
||||
*/
|
||||
fsp_err_t (* pinsCfg)(ioport_ctrl_t * const p_ctrl, const ioport_cfg_t * p_cfg);
|
||||
|
||||
/** Configure settings for an individual pin.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be read.
|
||||
* @param[in] cfg Configuration options for the pin.
|
||||
*/
|
||||
fsp_err_t (* pinCfg)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, uint32_t cfg);
|
||||
|
||||
/** Read the event input data of the specified pin and return the level.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be read.
|
||||
* @param[in] p_pin_event Pointer to return the event data.
|
||||
*/
|
||||
fsp_err_t (* pinEventInputRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_event);
|
||||
|
||||
/** Write pin event data.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin event data is to be written to.
|
||||
* @param[in] pin_value Level to be written to pin output event.
|
||||
*/
|
||||
fsp_err_t (* pinEventOutputWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value);
|
||||
|
||||
/** Read level of a pin.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be read.
|
||||
* @param[in] p_pin_value Pointer to return the pin level.
|
||||
*/
|
||||
fsp_err_t (* pinRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t * p_pin_value);
|
||||
|
||||
/** Write specified level to a pin.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] pin Pin to be written to.
|
||||
* @param[in] level State to be written to the pin.
|
||||
*/
|
||||
fsp_err_t (* pinWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level);
|
||||
|
||||
/** Set the direction of one or more pins on a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port being configured.
|
||||
* @param[in] direction_values Value controlling direction of pins on port.
|
||||
* @param[in] mask Mask controlling which pins on the port are to be configured.
|
||||
*/
|
||||
fsp_err_t (* portDirectionSet)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t direction_values,
|
||||
ioport_size_t mask);
|
||||
|
||||
/** Read captured event data for a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port to be read.
|
||||
* @param[in] p_event_data Pointer to return the event data.
|
||||
*/
|
||||
fsp_err_t (* portEventInputRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * p_event_data);
|
||||
|
||||
/** Write event output data for a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port event data will be written to.
|
||||
* @param[in] event_data Data to be written as event data to specified port.
|
||||
* @param[in] mask_value Each bit set to 1 in the mask corresponds to that bit's value in event data.
|
||||
* being written to port.
|
||||
*/
|
||||
fsp_err_t (* portEventOutputWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t event_data,
|
||||
ioport_size_t mask_value);
|
||||
|
||||
/** Read states of pins on the specified port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port to be read.
|
||||
* @param[in] p_port_value Pointer to return the port value.
|
||||
*/
|
||||
fsp_err_t (* portRead)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t * p_port_value);
|
||||
|
||||
/** Write to multiple pins on a port.
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] port Port to be written to.
|
||||
* @param[in] value Value to be written to the port.
|
||||
* @param[in] mask Mask controlling which pins on the port are written to.
|
||||
*/
|
||||
fsp_err_t (* portWrite)(ioport_ctrl_t * const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask);
|
||||
} ioport_api_t;
|
||||
|
||||
/** This structure encompasses everything that is needed to use an instance of this interface. */
|
||||
typedef struct st_ioport_instance
|
||||
{
|
||||
ioport_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
|
||||
ioport_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
|
||||
ioport_api_t const * p_api; ///< Pointer to the API structure for this instance
|
||||
} ioport_instance_t;
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup IOPORT_API)
|
||||
**********************************************************************************************************************/
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef FSP_VERSION_H
|
||||
#define FSP_VERSION_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Includes board and MCU related header files. */
|
||||
#include "bsp_api.h"
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup RENESAS_COMMON
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** FSP pack major version. */
|
||||
#define FSP_VERSION_MAJOR (6U)
|
||||
|
||||
/** FSP pack minor version. */
|
||||
#define FSP_VERSION_MINOR (0U)
|
||||
|
||||
/** FSP pack patch version. */
|
||||
#define FSP_VERSION_PATCH (0U)
|
||||
|
||||
/** FSP pack version build number (currently unused). */
|
||||
#define FSP_VERSION_BUILD (0U)
|
||||
|
||||
/** Public FSP version name. */
|
||||
#define FSP_VERSION_STRING ("6.0.0")
|
||||
|
||||
/** Unique FSP version ID. */
|
||||
#define FSP_VERSION_BUILD_STRING ("Built with Renesas Advanced Flexible Software Package version 6.0.0")
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** FSP Pack version structure */
|
||||
typedef union st_fsp_pack_version
|
||||
{
|
||||
/** Version id */
|
||||
uint32_t version_id;
|
||||
|
||||
/**
|
||||
* Code version parameters, little endian order.
|
||||
*/
|
||||
struct version_id_b_s
|
||||
{
|
||||
uint8_t build; ///< Build version of FSP Pack
|
||||
uint8_t patch; ///< Patch version of FSP Pack
|
||||
uint8_t minor; ///< Minor version of FSP Pack
|
||||
uint8_t major; ///< Major version of FSP Pack
|
||||
} version_id_b;
|
||||
} fsp_pack_version_t;
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup ICU
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_ICU_H
|
||||
#define R_ICU_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
#include "r_external_irq_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/** External IRQ input pin digital filtering clock selection. */
|
||||
typedef enum e_external_irq_digital_filter
|
||||
{
|
||||
EXTERNAL_IRQ_DIGITAL_FILTER_PCLK_DIV = 0, ///< Digital filter using clock PCLK dividers.
|
||||
EXTERNAL_IRQ_DIGITAL_FILTER_LOCO = 1, ///< Digital filter using clock LOCO.
|
||||
} e_external_irq_digital_filter_t;
|
||||
|
||||
/** Extended ICU interface configuration */
|
||||
typedef struct st_icu_extended_cfg
|
||||
{
|
||||
e_external_irq_digital_filter_t filter_src; ///< Select digital filter clock source when digital filter is enabled.
|
||||
} icu_extended_cfg_t;
|
||||
|
||||
/** ICU private control block. DO NOT MODIFY. Initialization occurs when R_ICU_ExternalIrqOpen is called. */
|
||||
typedef struct st_icu_instance_ctrl
|
||||
{
|
||||
uint32_t open; ///< Used to determine if channel control block is in use
|
||||
IRQn_Type irq; ///< NVIC interrupt number
|
||||
uint8_t channel; ///< Channel
|
||||
|
||||
#if BSP_TZ_SECURE_BUILD
|
||||
external_irq_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory.
|
||||
#endif
|
||||
void (* p_callback)(external_irq_callback_args_t * p_args); // Pointer to callback that is called when an edge is detected on the external irq pin.
|
||||
|
||||
/** Placeholder for user data. Passed to the user callback in ::external_irq_callback_args_t. */
|
||||
void * p_context;
|
||||
} icu_instance_ctrl_t;
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** @cond INC_HEADER_DEFS_SEC */
|
||||
/** Filled in Interface API structure for this Instance. */
|
||||
extern const external_irq_api_t g_external_irq_on_icu;
|
||||
|
||||
/** @endcond */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Public APIs
|
||||
**********************************************************************************************************************/
|
||||
fsp_err_t R_ICU_ExternalIrqOpen(external_irq_ctrl_t * const p_api_ctrl, external_irq_cfg_t const * const p_cfg);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqEnable(external_irq_ctrl_t * const p_api_ctrl);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqDisable(external_irq_ctrl_t * const p_api_ctrl);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqCallbackSet(external_irq_ctrl_t * const p_api_ctrl,
|
||||
void ( * p_callback)(external_irq_callback_args_t *),
|
||||
void * const p_context,
|
||||
external_irq_callback_args_t * const p_callback_memory);
|
||||
|
||||
fsp_err_t R_ICU_ExternalIrqClose(external_irq_ctrl_t * const p_api_ctrl);
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup ICU)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif // R_ICU_H
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,172 @@
|
||||
/*
|
||||
* Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/* Ensure Renesas MCU variation definitions are included to ensure MCU
|
||||
* specific register variations are handled correctly. */
|
||||
#ifndef BSP_FEATURE_H
|
||||
#error "INTERNAL ERROR: bsp_feature.h must be included before renesas.h."
|
||||
#endif
|
||||
|
||||
/** @addtogroup Renesas
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup RA
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef RA_H
|
||||
#define RA_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "cmsis_compiler.h"
|
||||
|
||||
/** @addtogroup Configuration_of_CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* =========================================================================================================================== */
|
||||
/* ================ Interrupt Number Definition ================ */
|
||||
/* =========================================================================================================================== */
|
||||
/* IRQn_Type is provided in bsp_exceptions.h. Vectors generated by the FSP Configuration tool are in vector_data.h */
|
||||
|
||||
/** @} */ /* End of group Configuration_of_CMSIS */
|
||||
|
||||
/* =========================================================================================================================== */
|
||||
/* ================ Processor and Core Peripheral Section ================ */
|
||||
/* =========================================================================================================================== */
|
||||
|
||||
#if BSP_MCU_GROUP_RA0E1
|
||||
#include "R7FA0E107.h"
|
||||
#elif BSP_MCU_GROUP_RA0E2
|
||||
#include "R7FA0E209.h"
|
||||
#elif BSP_MCU_GROUP_RA2A1
|
||||
#include "R7FA2A1AB.h"
|
||||
#elif BSP_MCU_GROUP_RA2A2
|
||||
#include "R7FA2A2AD.h"
|
||||
#elif BSP_MCU_GROUP_RA2E1
|
||||
#include "R7FA2E1A9.h"
|
||||
#elif BSP_MCU_GROUP_RA2E2
|
||||
#include "R7FA2E2A7.h"
|
||||
#elif BSP_MCU_GROUP_RA2E3
|
||||
#include "R7FA2E307.h"
|
||||
#elif BSP_MCU_GROUP_RA2L1
|
||||
#include "R7FA2L1AB.h"
|
||||
#elif BSP_MCU_GROUP_RA2L2
|
||||
#include "R7FA2L209.h"
|
||||
#elif BSP_MCU_GROUP_RA2T1
|
||||
#include "R7FA2T107.h"
|
||||
#elif BSP_MCU_GROUP_RA4C1
|
||||
#include "R7FA4C1BD.h"
|
||||
#elif BSP_MCU_GROUP_RA4E1
|
||||
#include "R7FA4E10D.h"
|
||||
#elif BSP_MCU_GROUP_RA4E2
|
||||
#include "R7FA4E2B9.h"
|
||||
#elif BSP_MCU_GROUP_RA4M1
|
||||
#include "R7FA4M1AB.h"
|
||||
#elif BSP_MCU_GROUP_RA4M2
|
||||
#include "R7FA4M2AD.h"
|
||||
#elif BSP_MCU_GROUP_RA4M3
|
||||
#include "R7FA4M3AF.h"
|
||||
#elif BSP_MCU_GROUP_RA4T1
|
||||
#include "R7FA4T1BB.h"
|
||||
#elif BSP_MCU_GROUP_RA4W1
|
||||
#include "R7FA4W1AD.h"
|
||||
#elif BSP_MCU_GROUP_RA4L1
|
||||
#include "R7FA4L1BD.h"
|
||||
#elif BSP_MCU_GROUP_RA6E1
|
||||
#include "R7FA6E10F.h"
|
||||
#elif BSP_MCU_GROUP_RA6E2
|
||||
#include "R7FA6E2BB.h"
|
||||
#elif BSP_MCU_GROUP_RA6M1
|
||||
#include "R7FA6M1AD.h"
|
||||
#elif BSP_MCU_GROUP_RA6M2
|
||||
#include "R7FA6M2AF.h"
|
||||
#elif BSP_MCU_GROUP_RA6M3
|
||||
#include "R7FA6M3AH.h"
|
||||
#elif BSP_MCU_GROUP_RA6M4
|
||||
#include "R7FA6M4AF.h"
|
||||
#elif BSP_MCU_GROUP_RA6M5
|
||||
#include "R7FA6M5BH.h"
|
||||
#elif BSP_MCU_GROUP_RA6T1
|
||||
#include "R7FA6T1AD.h"
|
||||
#elif BSP_MCU_GROUP_RA6T2
|
||||
#include "R7FA6T2BD.h"
|
||||
#elif BSP_MCU_GROUP_RA6T3
|
||||
#include "R7FA6T3BB.h"
|
||||
#elif BSP_MCU_GROUP_RA8M1
|
||||
#include "R7FA8M1AH.h"
|
||||
#elif BSP_MCU_GROUP_RA8D1
|
||||
#include "R7FA8D1BH.h"
|
||||
#elif BSP_MCU_GROUP_RA8P1
|
||||
#if 0U == BSP_CFG_CPU_CORE
|
||||
#include "R7KA8P1KF_core0.h"
|
||||
#elif 1U == BSP_CFG_CPU_CORE
|
||||
#include "R7KA8P1KF_core1.h"
|
||||
#else
|
||||
#warning "Unsupported CPU number"
|
||||
#endif
|
||||
#elif BSP_MCU_GROUP_RA8T1
|
||||
#include "R7FA8T1AH.h"
|
||||
#elif BSP_MCU_GROUP_RA8E1
|
||||
#include "R7FA8E1AF.h"
|
||||
#elif BSP_MCU_GROUP_RA8E2
|
||||
#include "R7FA8E2AF.h"
|
||||
#else
|
||||
#if __has_include("renesas_internal.h")
|
||||
#include "renesas_internal.h"
|
||||
#else
|
||||
#warning "Unsupported MCU"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ARM has advised to no longer use the __ARM_ARCH_8_1M_MAIN__ type macro and to instead use the __ARM_ARCH and __ARM_ARCH_ISA_THUMB
|
||||
* macros for differentiating architectures. However, with all of our toolchains, neither paradigm is being correctly produced for Cortex-M85
|
||||
* and thus we still need a workaround. Below is a summary of the current macros produced by each toolchain for CM85:
|
||||
*
|
||||
* | Toolchain | __ARM_ARCH | _ARM_ARCH_xx__ |
|
||||
* |-----------|------------|------------------------|
|
||||
* | GCC | 8 | __ARM_ARCH_8M_MAIN__ |
|
||||
* | LLVM | 8 | __ARM_ARCH_8_1M_MAIN__ |
|
||||
* | AC6 | 8 | __ARM_ARCH_8_1M_MAIN__ |
|
||||
* | IAR | 801 | __ARM_ARCH_8M_MAIN__ |
|
||||
*
|
||||
* The expected output for CM85 should be __ARM_ARCH == 801, __ARM_ARCH_ISA_THUMB == 2, and __ARM_ARCH_8_1M_MAIN__
|
||||
*
|
||||
* IAR is currently the only toolchain producing the correct __ARM_ARCH value.
|
||||
*
|
||||
*- See https://github.com/ARM-software/CMSIS_6/issues/159
|
||||
*/
|
||||
#if BSP_CFG_MCU_PART_SERIES == 8 && !defined(__ICCARM__) && BSP_CFG_CPU_CORE != 1
|
||||
#undef __ARM_ARCH
|
||||
#define __ARM_ARCH 801
|
||||
#endif
|
||||
|
||||
#if (__ARM_ARCH == 7) && (__ARM_ARCH_ISA_THUMB == 2)
|
||||
#define RENESAS_CORTEX_M4
|
||||
#elif (__ARM_ARCH == 8) && (__ARM_ARCH_ISA_THUMB == 1)
|
||||
#define RENESAS_CORTEX_M23
|
||||
#elif (__ARM_ARCH == 8) && (__ARM_ARCH_ISA_THUMB == 2)
|
||||
#define RENESAS_CORTEX_M33
|
||||
#elif (__ARM_ARCH == 801) && (__ARM_ARCH_ISA_THUMB == 2)
|
||||
#define RENESAS_CORTEX_M85
|
||||
#else
|
||||
#warning Unsupported Architecture
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* RA_H */
|
||||
|
||||
/** @} */ /* End of group RA */
|
||||
|
||||
/** @} */ /* End of group Renesas */
|
||||
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