Merge pull request #9 from RT-Thread/master

pr

bsp/bluetrum/ab32vg1-ab-prougen/.config

@@ -380,6 +380,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_UC_COMMON is not set
 # CONFIG_PKG_USING_UC_MODBUS is not set
 # CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
 
 #
 # peripheral libraries and drivers

bsp/bluetrum/ab32vg1-ab-prougen/link.lds

@@ -60,15 +60,10 @@ SECTIONS
     } > ram1 AT > flash
 
     .comm : {
-        KEEP (*(.vector))
-        EXCLUDE_FILE (*hal_drivers**.o *ab32vg1_hal**.o *components*finsh**.o *components*libc**.o *rt-thread*src**.o *kernel*src**.o *romfs.o *lib_a**.o) *(.text*)
-        *idle.o (.text*)
-        *ipc.o (.text*)
-        *irq.o (.text*)
-        *scheduler.o (.text*)
-        *timer.o (.text*)
-        *kservice.o (.text*)
-        EXCLUDE_FILE (*romfs.o *lib_a**.o) *(.rodata*)
+        KEEP(*(.vector))
+        EXCLUDE_FILE(*components*finsh**.o *components*libc**.o *romfs.o *lib_a**.o) *(.text*)
+        *finsh*shell.o (.text*)
+        EXCLUDE_FILE (*components*libc**.o *romfs.o *lib_a**.o) *(.rodata*)
         *(.srodata*)
         *(.rela*)
         *(.data*)

bsp/bluetrum/ab32vg1-ab-prougen/makefile.targets

@@ -0,0 +1,13 @@
+rtthread.siz:
+	riscv64-unknown-elf-size --format=berkeley "rtthread.elf"
+	sh ../pre_build.sh
+	riscv32-elf-xmaker -b rtthread.xm
+	riscv32-elf-xmaker -b download.xm
+
+clean2:
+	-$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(SECONDARY_FLASH)$(SECONDARY_SIZE)$(ASM_DEPS)$(S_UPPER_DEPS)$(C_DEPS)$(CPP_DEPS)
+	-$(RM) $(OBJS) *.elf
+	-@echo ' '
+
+
+*.elf: $(wildcard D:/Softwares/RT-ThreadStudio/workspace/ab32vg1/link.lds)

bsp/bluetrum/ab32vg1-ab-prougen/pre_build.sh

@@ -0,0 +1,4 @@
+cp ../riscv32-elf-xmaker.exe .
+cp ../header.bin .
+cp ../rtthread.xm .
+cp ../download.xm .

bsp/bluetrum/libcpu/cpu/context_gcc.S

@@ -13,7 +13,7 @@
 .global  rt_interrupt_from_thread
 .global  rt_interrupt_to_thread
 .global  rt_cur_thread_sp
-.global  rt_switch_flag
+.global  rt_thread_switch_interrupt_flag
 .global  rt_interrupt_nest
 
 /*
@@ -77,12 +77,12 @@ enable_int_ret:
     sw      x30, 108(sp)
     sw      x31, 112(sp)
 
-    lw      a5, EPC(zero)                  //Saves current program counter (EPC) as task program counter
+    lw      a5, EPC(zero)                                       //Saves current program counter (EPC) as task program counter
     sw      a5, 116(sp)
     lw      a5, EPICCON(zero)
     sw      a5, 120(sp)
 
-    sw      sp, rt_cur_thread_sp, a4                       //store sp in preempted tasks tcb
+    sw      sp, rt_cur_thread_sp, a4                            //store sp in preempted tasks tcb
     .endm
 
 
@@ -90,7 +90,7 @@ enable_int_ret:
 .macro restore_context
 
     la      a5, rt_cur_thread_sp
-    lw      sp, 0(a5)                       //get new task stack pointer
+    lw      sp, 0(a5)                                           //get new task stack pointer
 
     /* Load task program counter  EPC*/
     lw      a5, 116(sp)
@@ -140,16 +140,16 @@ enable_int_ret:
  */
     .globl rt_hw_context_switch_to
 rt_hw_context_switch_to:
-    sw      zero, rt_interrupt_from_thread, a4                         /*set from thread to 0*/
-    sw      a0, rt_interrupt_to_thread, a4                           /*set rt_interrupt_to_thread*/
+    sw      zero, rt_interrupt_from_thread, a4                      /*set from thread to 0*/
+    sw      a0, rt_interrupt_to_thread, a4                          /*set rt_interrupt_to_thread*/
 
-    sb      zero, rt_interrupt_nest, a4                                /*rt_interrupt_nest = 0*/
+    sb      zero, rt_interrupt_nest, a4                             /*rt_interrupt_nest = 0*/
 
     li      a5, 1
-    sw      a5, rt_switch_flag, a4                                  // rt_switch_flag = 1;
+    sw      a5, rt_thread_switch_interrupt_flag, a4                 // rt_thread_switch_interrupt_flag = 1;
 
     SWINT                                                           /*kick soft interrupt*/
-    lw      a5, PICCON(zero)                                                 /*enable interrupt*/
+    lw      a5, PICCON(zero)                                        /*enable interrupt*/
     ori     a5, a5, 1
     sw      a5, PICCON(zero)
     ret
@@ -161,10 +161,10 @@ rt_hw_context_switch_to:
  */
     .globl rt_hw_context_switch
 rt_hw_context_switch:
-    sw      a0, rt_interrupt_from_thread, a4                         /*set rt_interrupt_from_thread*/
+    sw      a0, rt_interrupt_from_thread, a4                        /*set rt_interrupt_from_thread*/
     sw      a1, rt_interrupt_to_thread, a4                          /*set rt_interrupt_to_thread*/
     li      a5, 1
-    sw      a5, rt_switch_flag, a4                                  // rt_switch_flag = 1;
+    sw      a5, rt_thread_switch_interrupt_flag, a4                 /*rt_thread_switch_interrupt_flag = 1*/
     SWINT                                                           /*kick soft interrupt*/
     ret
 
@@ -190,37 +190,37 @@ rt_switch_to_thread:
  */
     .global rt_hw_context_switch_interrupt
 rt_hw_context_switch_interrupt:
-    lw      a5, rt_switch_flag
+    lw      a5, rt_thread_switch_interrupt_flag
     bnez    a5, _reswitch
     li      a5, 0x01
-    sw      a5, rt_switch_flag, a4
-    sw      a0, rt_interrupt_from_thread, a4                       /*set rt_interrupt_from_thread*/
+    sw      a5, rt_thread_switch_interrupt_flag, a4
+    sw      a0, rt_interrupt_from_thread, a4                      	/*set rt_interrupt_from_thread*/
 _reswitch:
-    sw      a1, rt_interrupt_to_thread, a4                        /*set rt_interrupt_to_thread*/
+    sw      a1, rt_interrupt_to_thread, a4                        	/*set rt_interrupt_to_thread*/
     ret
 
     //软中断服务
     .global rt_soft_isr
 rt_soft_isr:
-    li      a5, 0x4                                                 // PICPND = BIT(IRQ_SW_VECTOR); 清软中断Pending
+    li      a5, 0x4                                       			// PICPND = BIT(IRQ_SW_VECTOR); 清软中断Pending
     sw      a5, PICPND(zero)
     ret
 
     .globl low_prio_irq
 low_prio_irq:
     save_context
-    li      a5, 1
-    sb      a5, rt_interrupt_nest, a4                               // rt_interrupt_nest = 1;
+
+    lw      a5, rt_interrupt_nest
+    bnez    a5, _low_prio_irq_exit
 
     lw      a5, cpu_irq_comm_hook
     jalr    a5
 
-    lw      a5, rt_switch_flag
-    beqz    a5, _low_prio_irq_exit                                  // if (rt_switch_flag)
+    lw      a5, rt_thread_switch_interrupt_flag
+    beqz    a5, _low_prio_irq_exit                                  // if (rt_thread_switch_interrupt_flag)
     jal     rt_switch_to_thread
-    sw      zero, rt_switch_flag, a4                                // rt_switch_flag = 0;
+    sw      zero, rt_thread_switch_interrupt_flag, a4               // rt_thread_switch_interrupt_flag = 0;
 
     _low_prio_irq_exit:
-    sb      zero, rt_interrupt_nest, a4                             // rt_interrupt_nest = 0;
     restore_context
 

bsp/bluetrum/libcpu/cpu/cpuport.c

@@ -14,7 +14,6 @@
 volatile rt_ubase_t  rt_interrupt_from_thread = 0;
 volatile rt_ubase_t  rt_interrupt_to_thread   = 0;
 volatile rt_uint32_t rt_thread_switch_interrupt_flag = 0;
-volatile rt_uint32_t rt_switch_flag = 0;
 rt_uint32_t rt_cur_thread_sp = 0;
 
 /**
@@ -42,13 +41,13 @@ rt_uint8_t *rt_hw_stack_init(void       *tentry,
     stk--;
     *stk = (rt_uint32_t)0x10003;         /* Start address */
     stk--;
-	*stk = (rt_uint32_t)tentry;			/* Start address */
-	stk -= 22;
-	*stk = (rt_uint32_t)parameter;	    /* Register a0  parameter*/
-	stk -= 6;
-	*stk = (rt_uint32_t)tp;             /* Register thread pointer */
-	stk --;
-	*stk = (rt_uint32_t)texit;          /* Register ra   texit*/
+    *stk = (rt_uint32_t)tentry;			/* Start address */
+    stk -= 22;
+    *stk = (rt_uint32_t)parameter;	    /* Register a0  parameter*/
+    stk -= 6;
+    *stk = (rt_uint32_t)tp;             /* Register thread pointer */
+    stk --;
+    *stk = (rt_uint32_t)texit;          /* Register ra   texit*/
 
     /* return task's current stack address */
     return (rt_uint8_t *)stk;

bsp/gd32e230k-start/drivers/drv_usart.c

@@ -131,7 +131,7 @@ void gd32_uart_gpio_init(struct gd32_uart *uart)
 	
     /* connect port to USARTx_Rx */
     gpio_af_set(uart->rx_port, uart->rx_af, uart->rx_pin);
-    gpio_mode_set(uart->rx_port, GPIO_MODE_INPUT, GPIO_PUPD_NONE, uart->rx_pin);
+    gpio_mode_set(uart->rx_port, GPIO_MODE_AF, GPIO_PUPD_NONE, uart->rx_pin);
     gpio_output_options_set(uart->rx_port, GPIO_OTYPE_PP, GPIO_OSPEED_10MHZ, uart->rx_pin);
 	
     NVIC_SetPriority(uart->irqn, 0);

bsp/hc32f4a0/.gitignore

@@ -0,0 +1,42 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h

bsp/hc32f4a0/Kconfig

@@ -0,0 +1,23 @@
+mainmenu "RT-Thread Project Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "board/Kconfig"
+
+
+

bsp/hc32f4a0/Libraries/CMSIS/Device/HDSC/HC32F4A0/Include/system_hc32f4a0.h

@@ -0,0 +1,154 @@
+/**
+ *******************************************************************************
+ * @file  system_hc32f4a0.h
+ * @brief This file contains all the functions prototypes of the HC32 System.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Zhangxl         First version
+   2020-07-03       Zhangxl         Modify for 16MHz & 20MHz HRC
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __SYSTEM_HC32F4A0_H__
+#define __SYSTEM_HC32F4A0_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include <stdint.h>
+
+/**
+ * @addtogroup CMSIS
+ * @{
+ */
+
+/**
+ * @addtogroup HC32F4A0_System
+ * @{
+ */
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('define')
+ ******************************************************************************/
+/**
+ * @addtogroup HC32F4A0_System_Global_Macros
+ * @{
+ */
+
+/**
+ * @brief Clock setup macro definition
+ */
+#define CLOCK_SETTING_NONE              0U  /*!< User provides own clock setting in application */
+#define CLOCK_SETTING_CMSIS             1U
+
+#define HRC_FREQ_MON()                  (*((volatile unsigned int*)(0x40010684UL)))
+
+/**
+ * @addtogroup HC32F4A0_System_Clock_Source
+ * @{
+ */
+#if !defined (HRC_16MHz_VALUE)
+    #define HRC_16MHz_VALUE             ((uint32_t)16000000UL)  /*!< Internal high speed RC freq.(16MHz) */
+#endif
+
+#if !defined (HRC_20MHz_VALUE)
+    #define HRC_20MHz_VALUE             ((uint32_t)20000000UL)  /*!< Internal high speed RC freq.(20MHz) */
+#endif
+
+#if !defined (MRC_VALUE)
+#define MRC_VALUE                       ((uint32_t)8000000UL)   /*!< Internal middle speed RC freq.(8MHz) */
+#endif
+
+#if !defined (LRC_VALUE)
+    #define LRC_VALUE                   ((uint32_t)32768UL)     /*!< Internal low speed RC freq.(32.768KHz) */
+#endif
+
+#if !defined (RTCLRC_VALUE)
+    #define RTCLRC_VALUE                ((uint32_t)32768UL)     /*!< Internal RTC low speed RC freq.(32.768KHz) */
+#endif
+
+#if !defined (SWDTLRC_VALUE)
+    #define SWDTLRC_VALUE               ((uint32_t)10000UL)     /*!< External low speed OSC freq.(10KHz) */
+#endif
+
+#if !defined (XTAL_VALUE)
+    #define XTAL_VALUE                  ((uint32_t)8000000UL)   /*!< External high speed OSC freq.(8MHz) */
+#endif
+
+#if !defined (XTAL32_VALUE)
+    #define XTAL32_VALUE                ((uint32_t)32768UL)     /*!< External low speed OSC freq.(32.768KHz) */
+#endif
+
+#if !defined (HCLK_VALUE)
+#define HCLK_VALUE      (SystemCoreClock >> ((M4_CMU->SCFGR & CMU_SCFGR_HCLKS) >> CMU_SCFGR_HCLKS_POS))
+#endif
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+/**
+ * @addtogroup HC32F4A0_System_Exported_Variable
+ * @{
+ */
+extern uint32_t SystemCoreClock;        /*!< System clock frequency (Core clock) */
+extern uint32_t HRC_VALUE;              /*!< HRC frequency */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global function prototypes (definition in C source)
+ ******************************************************************************/
+/**
+ * @addtogroup HC32F4A0_System_Global_Functions
+ * @{
+ */
+extern void SystemInit(void);             /*!< Initialize the system */
+extern void SystemCoreClockUpdate(void);  /*!< Update SystemCoreClock variable */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYSTEM_HC32F4A0_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/CMSIS/Device/HDSC/HC32F4A0/Source/system_hc32f4a0.c

@@ -0,0 +1,168 @@
+/**
+ *******************************************************************************
+ * @file  system_hc32f4a0.c
+ * @brief This file provides two functions and one global variable to be called
+ *        from  user application
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Zhangxl         First version
+   2020-07-03       Zhangxl         Modify for 16MHz & 20MHz HRC
+   2020-09-10       Zhangxl         Simplify the declare
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+
+/**
+ * @addtogroup CMSIS
+ * @{
+ */
+
+/**
+ * @addtogroup HC32F4A0_System
+ * @{
+ */
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('define')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global variable definitions (declared in header file with 'extern')
+ ******************************************************************************/
+/**
+ * @addtogroup HC32F4A0_System_Global_Variable
+ * @{
+ */
+
+/*!< System clock frequency (Core clock) */
+__NO_INIT uint32_t SystemCoreClock;
+/*!< High speed RC frequency (HCR clock) */
+__NO_INIT uint32_t HRC_VALUE;
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Local variable definitions ('static')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Function implementation - global ('extern') and local ('static')
+ ******************************************************************************/
+/**
+ * @addtogroup HC32F4A0_System_Global_Functions
+ * @{
+ */
+
+/**
+ * @brief  Setup the microcontroller system. Initialize the System and update
+ *         the SystemCoreClock variable.
+ * @param  None
+ * @retval None
+ */
+void SystemInit(void)
+{
+    (*((volatile unsigned short*)(0x400543FEUL)))=0xA50BU;
+    (*((volatile unsigned int*)(0x4004CCE8UL)))=0x00040000UL;
+    (*((volatile unsigned short*)(0x400543FEUL)))=0xA500U;
+    /* FPU settings */
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+#endif
+    SystemCoreClockUpdate();
+}
+
+/**
+ * @brief  Update SystemCoreClock variable according to Clock Register Values.
+ * @param  None
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+    uint8_t tmp;
+    uint32_t plln;
+    uint32_t pllp;
+    uint32_t pllm;
+
+    /* Select proper HRC_VALUE according to ICG1.HRCFREQSEL bit */
+    /* ICG1.HRCFREQSEL = '0' represent HRC_VALUE = 20000000UL   */
+    /* ICG1.HRCFREQSEL = '1' represent HRC_VALUE = 16000000UL   */
+    if (1UL == (HRC_FREQ_MON() & 1UL))
+    {
+        HRC_VALUE = HRC_16MHz_VALUE;
+    }
+    else
+    {
+        HRC_VALUE = HRC_20MHz_VALUE;
+    }
+
+    tmp = M4_CMU->CKSWR & CMU_CKSWR_CKSW;
+    switch(tmp)
+    {
+        case 0x00U:  /* use internal high speed RC */
+            SystemCoreClock = HRC_VALUE;
+            break;
+        case 0x01U:  /* use internal middle speed RC */
+            SystemCoreClock = MRC_VALUE;
+            break;
+        case 0x02U:  /* use internal low speed RC */
+            SystemCoreClock = LRC_VALUE;
+            break;
+        case 0x03U:  /* use external high speed OSC */
+            SystemCoreClock = XTAL_VALUE;
+            break;
+        case 0x04U:  /* use external low speed OSC */
+            SystemCoreClock = XTAL32_VALUE;
+            break;
+        case 0x05U:  /* use PLLH */
+            /* PLLCLK = ((pllsrc / pllm) * plln) / pllp */
+            pllp = (uint32_t)((M4_CMU->PLLHCFGR >> CMU_PLLHCFGR_PLLHP_POS) & 0x0FUL);
+            plln = (uint32_t)((M4_CMU->PLLHCFGR >> CMU_PLLHCFGR_PLLHN_POS) & 0xFFUL);
+            pllm = (uint32_t)((M4_CMU->PLLHCFGR >> CMU_PLLHCFGR_PLLHM_POS) & 0x03UL);
+
+            /* use external high speed OSC as PLL source */
+            if (0UL == bM4_CMU->PLLHCFGR_b.PLLSRC)
+            {
+                SystemCoreClock = (XTAL_VALUE) / (pllm + 1UL) * (plln + 1UL) / (pllp + 1UL);
+            }
+            /* use internal high RC as PLL source */
+            else
+            {
+                SystemCoreClock = (HRC_VALUE) / (pllm + 1UL) * (plln + 1UL) / (pllp + 1UL);
+            }
+            break;
+        default:
+            break;
+    }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/CMSIS/Include/cmsis_version.h

@@ -0,0 +1,39 @@
+/**************************************************************************//**
+ * @file     cmsis_version.h
+ * @brief    CMSIS Core(M) Version definitions
+ * @version  V5.0.3
+ * @date     24. June 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CMSIS_VERSION_H
+#define __CMSIS_VERSION_H
+
+/*  CMSIS Version definitions */
+#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB   ( 3U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
+                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
+#endif

bsp/hc32f4a0/Libraries/CMSIS/Include/tz_context.h

@@ -0,0 +1,70 @@
+/******************************************************************************
+ * @file     tz_context.h
+ * @brief    Context Management for Armv8-M TrustZone
+ * @version  V1.0.1
+ * @date     10. January 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef TZ_CONTEXT_H
+#define TZ_CONTEXT_H
+ 
+#include <stdint.h>
+ 
+#ifndef TZ_MODULEID_T
+#define TZ_MODULEID_T
+/// \details Data type that identifies secure software modules called by a process.
+typedef uint32_t TZ_ModuleId_t;
+#endif
+ 
+/// \details TZ Memory ID identifies an allocated memory slot.
+typedef uint32_t TZ_MemoryId_t;
+  
+/// Initialize secure context memory system
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_InitContextSystem_S (void);
+ 
+/// Allocate context memory for calling secure software modules in TrustZone
+/// \param[in]  module   identifies software modules called from non-secure mode
+/// \return value != 0 id TrustZone memory slot identifier
+/// \return value 0    no memory available or internal error
+TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
+ 
+/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
+ 
+/// Load secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
+ 
+/// Store secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
+ 
+#endif  // TZ_CONTEXT_H

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_aes.h

@@ -0,0 +1,132 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_aes.h
+ * @brief This file contains all the functions prototypes of the AES driver
+ *        library.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Heqb         First version
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_AES_H__
+#define __HC32F4A0_AES_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_AES
+ * @{
+ */
+
+#if (DDL_AES_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+/**
+ * @defgroup AES_Global_Macros AES Global Macros
+ * @{
+ */
+
+/* AES key length in bytes is 16. */
+#define AES_BLOCK_LEN                 (16U)
+
+/**
+ * @defgroup AES_STATUS AES Start or Stop
+ * @{
+ */
+#define AES_START                     (AES_CR_START)
+#define AES_STOP                      (0x0UL)
+/**
+ * @}
+ */
+
+/**
+ * @defgroup AES_KEY_SIZE AES Key Size
+ * @{
+ */
+#define AES_KEY_SIZE_128BIT              (0UL << AES_CR_KEYSIZE_POS)
+#define AES_KEY_SIZE_192BIT              (1UL << AES_CR_KEYSIZE_POS)
+#define AES_KEY_SIZE_256BIT              (2UL << AES_CR_KEYSIZE_POS)
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+  Global function prototypes (definition in C source)
+ ******************************************************************************/
+/**
+ * @addtogroup AES_Global_Functions
+ * @{
+ */
+en_result_t AES_Encrypt(uint8_t au8Plaintext[],
+                        uint32_t u32PlaintextSize,
+                        const uint8_t *pu8Key,
+                        uint8_t u8KeyLength,
+                        uint8_t au8Ciphertext[]);
+
+en_result_t AES_Decrypt(uint8_t au8Ciphertext[],
+                        uint32_t u32CiphertextSize,
+                        const uint8_t *pu8Key,
+                        uint8_t u8KeyLength,
+                        uint8_t au8Plaintext[]);
+/**
+ * @}
+ */
+
+#endif /* DDL_AES_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_AES_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_crc.h

@@ -0,0 +1,143 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_crc.h
+ * @brief This file contains all the functions prototypes of the CRC driver
+ *        library.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Heqb            First version
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_CRC_H__
+#define __HC32F4A0_CRC_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_CRC
+ * @{
+ */
+
+#if (DDL_CRC_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+/* Bits definitions of CRC control register(CRC_CR). */
+/**
+ * @defgroup CRC_Global_Macros CRC Global Macros
+ * @{
+ */
+
+/**
+ * @defgroup CRC_Protocol_Control_Bit CRC Protocol Control Bit
+ * @note: - CRC16 polynomial is X16 + X12 + X5 + 1
+ *        - CRC32 polynomial is X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + \
+ *                              X8 + X7 + X5 + X4 + X2 + X + 1
+ * @{
+ */
+#define CRC_CRC16           (0x0UL)
+#define CRC_CRC32           (CRC_CR_CR)
+/**
+ * @}
+ */
+
+/**
+ * @defgroup CRC_Flag_Bit_Mask CRC Flag Bit Mask
+ * @{
+ */
+#define CRC_FLAG_MASK       (CRC_CR_FLAG)
+/**
+ * @}
+ */
+
+/**
+ * @defgroup CRC_Bit_Width CRC Bit Width
+ * @{
+ */
+#define CRC_BW_8            (8U)
+#define CRC_BW_16           (16U)
+#define CRC_BW_32           (32U)
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+  Global function prototypes (definition in C source)
+ ******************************************************************************/
+/** 
+ * @addtogroup CRC_Global_Functions
+ * @{
+ */
+uint32_t CRC_Calculate(uint32_t u32CrcProtocol,
+                       const void *pvData,
+                       uint32_t u32InitVal,
+                       uint32_t u32Length,
+                       uint8_t u8BitWidth);
+
+en_flag_status_t CRC_Check(uint32_t u32CrcProtocol,
+                           uint32_t u32CheckSum,
+                           const void *pvData,
+                           uint32_t u32InitVal,
+                           uint32_t u32Length,
+                           uint8_t u8BitWidth);
+/**
+ * @}
+ */
+
+#endif /* DDL_CRC_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_CRC_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_dac.h

@@ -0,0 +1,189 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_dac.h
+ * @brief This file contains all the functions prototypes of the DAC driver
+ *        library.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Hexiao          First version
+   2020-07-15       Hexiao          1. Modify DAC_ChannelCmd to DAC_Start and DAC_Stop
+                                    2. Modify DAC_DualChannelCmd to DAC_DualChannelStart
+                                       and DAC_DualChannelStop
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_DAC_H__
+#define __HC32F4A0_DAC_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+#include "hc32f4a0_utility.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_DAC
+ * @{
+ */
+
+#if (DDL_DAC_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+/**
+ * @defgroup DAC_Global_Types DAC Global Types
+ * @{
+ */
+
+/**
+ * @brief Structure definition of DAC initialization.
+ */
+typedef struct
+{
+    uint16_t u16Src;                 /*!< Data source to be converted
+                                     This parameter can be a value of @ref DAC_DATA_SRC */
+
+    en_functional_state_t enOutput;  /*!< Enable or disable analog output
+                                     This parameter can be a value of @ref en_functional_state_t */
+
+} stc_dac_init_t;
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+
+/**
+ * @defgroup DAC_Global_Macros DAC Global Macros
+ * @{
+ */
+
+/**
+ * @defgroup DAC_CH DAC channel
+ * @{
+ */
+#define DAC_CH_1                           (0U)
+#define DAC_CH_2                           (1U)
+/**
+ * @}
+ */
+
+/**
+ * @defgroup DAC_DATA_SRC DAC data source
+ * @{
+ */
+#define DAC_DATA_SRC_DATAREG               (0U)
+#define DAC_DATA_SRC_DCU                   (1U)
+/**
+ * @}
+ */
+
+/**
+ * @defgroup DAC_DATAREG_ALIGN_PATTERN DAC data register alignment pattern
+ * @{
+ */
+#define DAC_DATA_ALIGN_L                   (DAC_DACR_DPSEL)
+#define DAC_DATA_ALIGN_R                   (0U)
+/**
+ * @}
+ */
+
+#define DAC_DATAREG_VALUE_MAX              (4096UL)
+
+/**
+ * @defgroup DAC_ADP_SELECT DAC ADCx priority select
+ * @{
+ */
+#define DAC_ADP_SELECT_ADC1                (DAC_DAADPCR_ADPSL1)
+#define DAC_ADP_SELECT_ADC2                (DAC_DAADPCR_ADPSL2)
+#define DAC_ADP_SELECT_ADC3                (DAC_DAADPCR_ADPSL3)
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+  Global function prototypes (definition in C source)
+ ******************************************************************************/
+/**
+ * @addtogroup DAC_Global_Functions
+ * @{
+ */
+
+en_result_t DAC_StructInit(stc_dac_init_t * pstcInit);
+en_result_t DAC_Init(M4_DAC_TypeDef *DACx, uint16_t u16Ch, const stc_dac_init_t *pstcInit);
+void DAC_DeInit(M4_DAC_TypeDef *DACx);
+
+void DAC_SetDataSource(M4_DAC_TypeDef *DACx, uint16_t u16Ch, uint16_t u16Src);
+void DAC_DataRegAlignConfig(M4_DAC_TypeDef *DACx, uint16_t u16Align);
+void DAC_OutputCmd(M4_DAC_TypeDef *DACx, uint16_t u16Ch, en_functional_state_t enNewState);
+en_result_t DAC_AMPCmd(M4_DAC_TypeDef *DACx, uint16_t u16Ch, en_functional_state_t enNewState);
+void DAC_ADCPrioCmd(M4_DAC_TypeDef *DACx, en_functional_state_t enNewState);
+void DAC_ADCPrioConfig(M4_DAC_TypeDef *DACx, uint16_t u16ADCxPrio, en_functional_state_t enNewState);
+
+en_result_t DAC_Start(M4_DAC_TypeDef *DACx, uint16_t u16Ch);
+en_result_t DAC_Stop(M4_DAC_TypeDef *DACx, uint16_t u16Ch);
+void DAC_DualChannelStart(M4_DAC_TypeDef *DACx);
+void DAC_DualChannelStop(M4_DAC_TypeDef *DACx);
+
+void DAC_SetChannel1Data(M4_DAC_TypeDef *DACx, uint16_t data);
+void DAC_SetChannel2Data(M4_DAC_TypeDef *DACx, uint16_t data);
+void DAC_SetDualChannelData(M4_DAC_TypeDef *DACx, uint16_t data2, uint16_t data1);
+en_result_t  DAC_GetChannel1ConvState(const M4_DAC_TypeDef *DACx);
+en_result_t DAC_GetChannel2ConvState(const M4_DAC_TypeDef *DACx);
+
+/**
+ * @}
+ */
+
+#endif /* DDL_DAC_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_DAC_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_hrpwm.h

@@ -0,0 +1,138 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_hrpwm.h
+ * @brief Head file for HRPWM module.
+ *
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Wangmin         First version
+   2020-09-07       Wangmin         Modify channel delay configure function 
+                                    parameter type.
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_HRPWM_H__
+#define __HC32F4A0_HRPWM_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_HRPWM
+ * @{
+ */
+
+#if (DDL_HRPWM_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+/**
+ * @defgroup HRPWM_Global_Macros HRPWM Global Macros
+ * @{
+ */
+
+#define   HRPWM_CH_MIN                (1UL)
+#define   HRPWM_CH_MAX                (16UL)
+
+#define   HRPWM_CH_DELAY_NUM_MIN      (1U)
+#define   HRPWM_CH_DELAY_NUM_MAX      (256U)
+
+/** @defgroup HRPWM_Calibrate_Unit_Define HRPWM Calibrate unit define
+ * @{
+ */
+#define   HRPWM_CAL_UNIT0             (0x00UL)
+#define   HRPWM_CAL_UNIT1             (0x01UL)
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+  Global function prototypes (definition in C source)
+ ******************************************************************************/
+/**
+ * @addtogroup HRPWM_Global_Functions
+ * @{
+ */
+/* HRPWM Judge the condition of calibration function */
+en_functional_state_t HRPWM_ConditionConfirm(void);
+
+/* Process for getting HRPWM Calibrate function code */
+en_result_t HRPWM_CalibrateProcess(uint32_t u32Unit, uint8_t* pu8Code);
+
+/* HRPWM Calibrate function enable or disable for specified unit */
+void HRPWM_CalibrateCmd(uint32_t u32Unit, en_functional_state_t enNewState);
+/* HRPWM Calibrate function status get for specified unit */
+en_functional_state_t HRPWM_GetCalibrateStd(uint32_t u32Unit);
+/* HRPWM Calibrate code get for specified unit */
+uint8_t HRPWM_GetCalCode(uint32_t u32Unit);
+
+/* HRPWM function enable or disable for specified channel */
+void HRPWM_CHCmd(uint32_t u32Ch, en_functional_state_t enNewState);
+/* HRPWM positive edge adjust enable or disable for specified channel */
+void HRPWM_CHPositAdjCmd(uint32_t u32Ch, en_functional_state_t enNewState);
+/* HRPWM negative edge adjust enable or disable for specified channel */
+void HRPWM_CHNegatAdjCmd(uint32_t u32Ch, en_functional_state_t enNewState);
+/* HRPWM positive edge adjust delay counts configration for specified channel */
+void HRPWM_CHPositCfg(uint32_t u32Ch, uint8_t u8DelayNum);
+/* HRPWM negative edge adjust delay counts configration for specified channel */
+void HRPWM_CHNegatCfg(uint32_t u32Ch, uint8_t u8DelayNum);
+
+/**
+ * @}
+ */
+
+#endif /* DDL_HRPWM_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_HRPWM_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_mau.h

@@ -0,0 +1,122 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_mau.h
+ * @brief This file contains all the functions prototypes of the MAU driver
+ *        library.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Hexiao          First version
+   2020-07-15       Hexiao          Modify MAU_SqrtStartCmd to MAU_SqrtStart
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_MAU_H__
+#define __HC32F4A0_MAU_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+#include "hc32f4a0_utility.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_MAU
+ * @{
+ */
+
+#if (DDL_MAU_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+
+/**
+ * @defgroup MAU_Global_Macros MAU Global Macros
+ * @{
+ */
+
+#define MAU_SQRT_TIMEOUT               (HCLK_VALUE / 10000UL)/* About 1mS timeout */
+#define MAU_SQRT_OUTPUT_LSHIFT_MAX     (16U)
+#define MAU_SIN_Q15_SCALAR             (0x8000UL)
+#define MAU_SIN_ANGIDX_TOTAL           (0x1000UL)
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+  Global function prototypes (definition in C source)
+ ******************************************************************************/
+
+/**
+ * @addtogroup MAU_Global_Functions
+ * @{
+ */
+
+void MAU_SqrtInit(M4_MAU_TypeDef *MAUx, uint8_t u8LShBitsNumber, en_functional_state_t enIntNewState);
+void MAU_SqrtDeInit(M4_MAU_TypeDef *MAUx);
+
+void MAU_SqrtResultLShiftCfg(M4_MAU_TypeDef *MAUx, uint8_t u8LShBitsNumber);
+void MAU_SqrtIntCmd(M4_MAU_TypeDef *MAUx, en_functional_state_t enNewState);
+void MAU_SqrtWriteDataReg(M4_MAU_TypeDef *MAUx, uint32_t u32Radicand);
+en_flag_status_t MAU_SqrtGetStatus(const M4_MAU_TypeDef *MAUx);
+uint32_t MAU_SqrtReadDataReg(const M4_MAU_TypeDef *MAUx);
+void MAU_SqrtStart(M4_MAU_TypeDef* MAUx);
+
+en_result_t MAU_Sqrt(M4_MAU_TypeDef *MAUx, uint32_t u32Radicand, uint32_t *pu32Result);
+
+int16_t MAU_Sin(M4_MAU_TypeDef *MAUx, uint16_t u16AngleIdx);
+
+/**
+ * @}
+ */
+
+#endif /* DDL_MAU_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_MAU_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_rmu.h

@@ -0,0 +1,124 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_rmu.h
+ * @brief This file contains all the functions prototypes of the RMU driver
+ *        library.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Heqb            First version
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_RMU_H__
+#define __HC32F4A0_RMU_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_RMU
+ * @{
+ */
+#if (DDL_RMU_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+/**
+ * @defgroup RMU_Global_Macros RMU Global Macros
+ * @{
+ */
+
+/**
+ * @defgroup RMU_ResetCause Rmu reset cause
+ * @{
+ */
+#define RMU_RST_POWER_ON              (RMU_RSTF0_PORF)        /*!< Power on reset */
+#define RMU_RST_RESET_PIN             (RMU_RSTF0_PINRF)       /*!< Reset pin reset */
+#define RMU_RST_BROWN_OUT             (RMU_RSTF0_BORF)        /*!< Brown-out reset */
+#define RMU_RST_PVD1                  (RMU_RSTF0_PVD1RF)      /*!< Program voltage Detection 1 reset */
+#define RMU_RST_PVD2                  (RMU_RSTF0_PVD2RF)      /*!< Program voltage Detection 2 reset */
+#define RMU_RST_WDT                   (RMU_RSTF0_WDRF)        /*!< Watchdog timer reset */
+#define RMU_RST_SWDT                  (RMU_RSTF0_SWDRF)       /*!< Special watchdog timer reset */
+#define RMU_RST_POWER_DOWN            (RMU_RSTF0_PDRF)        /*!< Power down reset */
+#define RMU_RST_SOFTWARE              (RMU_RSTF0_SWRF)        /*!< Software reset */
+#define RMU_RST_MPU_ERR               (RMU_RSTF0_MPUERF)      /*!< Mpu error reset */
+#define RMU_RST_RAM_PARITY_ERR        (RMU_RSTF0_RAPERF)      /*!< Ram parity error reset */
+#define RMU_RST_RAM_ECC               (RMU_RSTF0_RAECRF)      /*!< Ram ECC reset */
+#define RMU_RST_CLK_ERR               (RMU_RSTF0_CKFERF)      /*!< Clk frequence error reset */
+#define RMU_RST_XTAL_ERR              (RMU_RSTF0_XTALERF)     /*!< Xtal error reset */
+#define RMU_RST_LOCKUP                (RMU_RSTF0_LKUPRF)      /*!< M4 Lockup reset */
+#define RMU_RST_MULTI                 (RMU_RSTF0_MULTIRF)     /*!< Multiply reset cause */
+/**
+ * @}
+ */
+
+/**
+  * @}
+  */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+  Global function prototypes (definition in C source)
+ ******************************************************************************/
+/**
+ * @addtogroup RMU_Global_Functions
+ * @{
+ */
+
+en_flag_status_t RMU_GetStatus(uint32_t u32RmuResetCause);
+void RMU_ClrStatus(void);
+void RMU_CPULockUpCmd(en_functional_state_t enNewState);
+
+/**
+ * @}
+ */
+
+#endif /* DDL_RMU_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_RMU_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/
+

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_trng.h

@@ -0,0 +1,124 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_trng.h
+ * @brief This file contains all the functions prototypes of the TRNG driver
+ *        library.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Heqb         First version
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_TRNG_H__
+#define __HC32F4A0_TRNG_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_TRNG
+ * @{
+ */
+
+#if (DDL_TRNG_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+
+/**
+ * @defgroup TRNG_Global_Macros TRNG Global Macros
+ * @{
+ */
+
+/**
+ * @defgroup TRNG_Load_New_Value TRNG load new value
+ * @{
+ */
+#define TRNG_RELOAD_ENABLE          (TRNG_MR_LOAD)            /* Enable load new initial values. */
+#define TRNG_RELOAD_DISABLE         (0x00000000UL)            /* Disable load new initial values. */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup TRNG_Shift_Control TRNG Shift Control
+ * @{
+ */
+#define TRNG_SHIFT_COUNT_32         (0x0000000CUL)            /* Shift 32 times when capturing random noise. */
+#define TRNG_SHIFT_COUNT_64         (0x00000010UL)            /* Shift 64 times when capturing random noise. */
+#define TRNG_SHIFT_COUNT_128        (0x00000014UL)            /* Shift 128 times when capturing random noise. */
+#define TRNG_SHIFT_COUNT_256        (0x00000018UL)            /* Shift 256 times when capturing random noise. */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+  Global function prototypes (definition in C source)
+ ******************************************************************************/
+/**
+ * @addtogroup TRNG_Global_Functions
+ * @{
+ */
+void TRNG_SetShiftCnt(uint32_t u32ShiftCount);
+void TRNG_ReloadCmd(uint32_t u32ReloadCmd);
+
+en_result_t TRNG_Generate(uint32_t au32Random[]);
+/**
+ * @}
+ */
+
+#endif /* DDL_TRNG_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_TRNG_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32f4a0/Libraries/HC32F4A0_StdPeriph_Driver/inc/hc32f4a0_utility.h

@@ -0,0 +1,120 @@
+/**
+ *******************************************************************************
+ * @file  hc32f4a0_utility.h
+ * @brief This file contains all the functions prototypes of the DDL utility.
+ @verbatim
+   Change Logs:
+   Date             Author          Notes
+   2020-06-12       Yangjp          First version
+ @endverbatim
+ *******************************************************************************
+ * Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
+ *
+ * This software component is licensed by HDSC under BSD 3-Clause license
+ * (the "License"); You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                    opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#ifndef __HC32F4A0_UTILITY_H__
+#define __HC32F4A0_UTILITY_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "hc32_common.h"
+#include "ddl_config.h"
+
+/**
+ * @addtogroup HC32F4A0_DDL_Driver
+ * @{
+ */
+
+/**
+ * @addtogroup DDL_UTILITY
+ * @{
+ */
+
+#if (DDL_UTILITY_ENABLE == DDL_ON)
+
+/*******************************************************************************
+ * Global type definitions ('typedef')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global pre-processor symbols/macros ('#define')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global variable definitions ('extern')
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Global function prototypes (definition in C source)
+ ******************************************************************************/
+/**
+ * @addtogroup UTILITY_Global_Functions
+ * @{
+ */
+
+/* Imprecise delay */
+void DDL_DelayMS(uint32_t u32Cnt);
+void DDL_DelayUS(uint32_t u32Cnt);
+
+/* Systick functions */
+en_result_t SysTick_Init(uint32_t u32Freq);
+void SysTick_Delay(uint32_t u32Delay);
+void SysTick_IncTick(void);
+uint32_t SysTick_GetTick(void);
+void SysTick_Suspend(void);
+void SysTick_Resume(void);
+
+/* You can add your own assert functions by implement the function DDL_AssertHandler
+   definition follow the function DDL_AssertHandler declaration */
+#ifdef __DEBUG
+    #define DDL_ASSERT(x)                                                      \
+    do{                                                                        \
+        ((x) ? (void)0 : DDL_AssertHandler(__FILE__, __LINE__));    \
+    }while(0)
+    /* Exported function */
+    void DDL_AssertHandler(const char *file, int line);
+#else
+    #define DDL_ASSERT(x)               ((void)0U)
+#endif /* __DEBUG */
+
+#if (DDL_PRINT_ENABLE == DDL_ON)
+#include <stdio.h>
+
+en_result_t DDL_PrintfInit(void);
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* DDL_UTILITY_ENABLE */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HC32F4A0_UTILITY_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/