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bsp/stm32：Separate STM32L5 HAL drivers (#10216)
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@@ -58,6 +58,7 @@ config SOC_SERIES_STM32L5
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bool
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select ARCH_ARM_CORTEX_M33
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select SOC_FAMILY_STM32
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select PKG_USING_STM32L5_HAL_DRIVER
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config SOC_SERIES_STM32G0
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bool
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-646
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-71
@@ -1,71 +0,0 @@
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/**
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******************************************************************************
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* @file partition_stm32l5xx.h
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* @author MCD Application Team
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* @brief CMSIS STM32L5xx Device Header File for Initial Setup for
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* Secure / Non-Secure Zones based on CMSIS CORE V5.3.1
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*
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* The file is included in system_stm32l5xx_s.c in secure application.
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* It includes the configuration section that allows to select the
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* STM32L5xx device partitioning file for system core secure attributes
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* and interrupt secure and non-secure assignment.
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/Apache-2.0
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32l5xx
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* @{
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*/
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#ifndef PARTITION_STM32L5XX_H
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#define PARTITION_STM32L5XX_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/** @addtogroup Secure_configuration_section
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* @{
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*/
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#if defined(STM32L552xx)
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#include "partition_stm32l552xx.h"
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#elif defined(STM32L562xx)
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#include "partition_stm32l562xx.h"
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#else
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#error "Please select first the target STM32L5xx device used in your application (in stm32l5xx.h file)"
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#endif
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* PARTITION_STM32L5XX_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -1,180 +0,0 @@
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/**
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******************************************************************************
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* @file stm32l5xx.h
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* @author MCD Application Team
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* @brief CMSIS STM32L5xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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* is using in the C source code, usually in main.c. This file contains:
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* - Configuration section that allows to select:
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* - The STM32L5xx device used in the target application
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* - To use or not the peripheral’s drivers in application code(i.e.
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* code will be based on direct access to peripheral’s registers
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* rather than drivers API), this option is controlled by
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* "#define USE_HAL_DRIVER"
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under Apache License, Version 2.0,
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||||
* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/Apache-2.0
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32l5xx
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* @{
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*/
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#ifndef STM32L5xx_H
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#define STM32L5xx_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/** @addtogroup Library_configuration_section
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* @{
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*/
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/**
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* @brief STM32 Family
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*/
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#if !defined (STM32L5)
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#define STM32L5
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#endif /* STM32L5 */
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/* Uncomment the line below according to the target STM32L5 device used in your
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application
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*/
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#if !defined (STM32L552xx) && !defined (STM32L562xx)
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/* #define STM32L552xx */ /*!< STM32L552xx Devices */
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/* #define STM32L562xx */ /*!< STM32L562xx Devices */
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#endif
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/* Tip: To avoid modifying this file each time you need to switch between these
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devices, you can define the device in your toolchain compiler preprocessor.
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*/
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#if !defined (USE_HAL_DRIVER)
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/**
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* @brief Comment the line below if you will not use the peripherals drivers.
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In this case, these drivers will not be included and the application code will
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be based on direct access to peripherals registers
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*/
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/*#define USE_HAL_DRIVER */
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number
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*/
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#define __STM32L5_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
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#define __STM32L5_CMSIS_VERSION_SUB1 (0x00U) /*!< [23:16] sub1 version */
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#define __STM32L5_CMSIS_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */
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#define __STM32L5_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
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#define __STM32L5_CMSIS_VERSION ((__STM32L5_CMSIS_VERSION_MAIN << 24U)\
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|(__STM32L5_CMSIS_VERSION_SUB1 << 16U)\
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|(__STM32L5_CMSIS_VERSION_SUB2 << 8U )\
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|(__STM32L5_CMSIS_VERSION_RC))
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/**
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* @}
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*/
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/** @addtogroup Device_Included
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* @{
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*/
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#if defined(STM32L552xx)
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#include "stm32l552xx.h"
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#elif defined(STM32L562xx)
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#include "stm32l562xx.h"
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#else
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#error "Please select first the target STM32L5xx device used in your application (in stm32l5xx.h file)"
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#endif
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/**
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* @}
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*/
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/** @addtogroup Exported_types
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* @{
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*/
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typedef enum
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{
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RESET = 0,
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SET = !RESET
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} FlagStatus, ITStatus;
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typedef enum
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{
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DISABLE = 0,
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ENABLE = !DISABLE
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} FunctionalState;
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#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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typedef enum
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{
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SUCCESS = 0,
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ERROR = !SUCCESS
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} ErrorStatus;
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/**
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* @}
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*/
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/** @addtogroup Exported_macros
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* @{
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*/
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#define SET_BIT(REG, BIT) ((REG) |= (BIT))
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#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
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#define READ_BIT(REG, BIT) ((REG) & (BIT))
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#define CLEAR_REG(REG) ((REG) = (0x0))
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#define WRITE_REG(REG, VAL) ((REG) = (VAL))
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#define READ_REG(REG) ((REG))
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#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
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/**
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* @}
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*/
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#if defined (USE_HAL_DRIVER)
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#include "stm32l5xx_hal.h"
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#endif /* USE_HAL_DRIVER */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* STM32L5xx_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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-110
@@ -1,110 +0,0 @@
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/**
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******************************************************************************
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* @file system_stm32l5xx.h
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* @author MCD Application Team
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* @brief CMSIS Cortex-M33 Device System Source File for STM32L5xx devices.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
|
||||
*
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||||
* This software component is licensed by ST under Apache License, Version 2.0,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/Apache-2.0
|
||||
*
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||||
******************************************************************************
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||||
*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup STM32L5xx_system
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* @{
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*/
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#ifndef SYSTEM_STM32L5XX_H
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#define SYSTEM_STM32L5XX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup STM32L5xx_System_Includes
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* @{
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*/
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#include <stdint.h>
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/**
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* @}
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*/
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/** @addtogroup STM32L5xx_System_Exported_Variables
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* @{
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*/
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/* The SystemCoreClock variable is updated in three ways:
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1) by calling CMSIS function SystemCoreClockUpdate()
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2) by calling HAL API function HAL_RCC_GetSysClockFreq()
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3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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Note: If you use this function to configure the system clock; then there
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is no need to call the 2 first functions listed above, since SystemCoreClock
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variable is updated automatically.
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*/
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
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extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
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extern const uint32_t MSIRangeTable[16]; /*!< MSI ranges table values */
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|
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/**
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* @}
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||||
*/
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|
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/** @addtogroup STM32L5xx_System_Exported_Functions
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||||
* @{
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||||
*/
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|
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/**
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\brief Setup the microcontroller system.
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Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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|
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/**
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\brief Update SystemCoreClock variable.
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Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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/**
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\brief Update SystemCoreClock variable from secure application and return its value
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when security is implemented in the system (Non-secure callable function).
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||||
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Returns the SystemCoreClock value with current core Clock retrieved from cpu registers.
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||||
*/
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extern uint32_t SECURE_SystemCoreClockUpdate(void);
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|
||||
/**
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||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SYSTEM_STM32L5XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -1,83 +0,0 @@
|
||||
Apache License
|
||||
Version 2.0, January 2004
|
||||
http://www.apache.org/licenses/
|
||||
|
||||
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APPENDIX:
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|
||||
Copyright [2019] [STMicroelectronics]
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
@@ -1,43 +0,0 @@
|
||||
# STM32CubeL5 CMSIS Device MCU Component
|
||||
|
||||
## Overview
|
||||
|
||||
**STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost.
|
||||
|
||||
**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series.
|
||||
* The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product
|
||||
* The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio
|
||||
* The BSP Drivers of each evaluation or demonstration board provided by this STM32 series
|
||||
* A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library ...
|
||||
* A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series
|
||||
|
||||
Two models of publication are proposed for the STM32Cube embedded software :
|
||||
* The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repo (usual name **STM32Cubexx**, xx corresponding to the STM32 series)
|
||||
* The **MCU component** : progressively from November 2019, each STM32Cube software module being part of the STM32Cube MCU Package, will be delivered as an individual repo, allowing the user to select and get only the required software functions.
|
||||
|
||||
## Description
|
||||
|
||||
This **cmsis_device_l5** MCU component repo is one element of the STM32CubeL5 MCU embedded software package, providing the **cmsis device** part.
|
||||
|
||||
## Release note
|
||||
|
||||
Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/cmsis_device_l5/blob/master/Release_Notes.html).
|
||||
|
||||
## Compatibility information
|
||||
|
||||
In this table, you can find the successive versions of this CMSIS Device component, in-line with the corresponding versions of the full MCU package:
|
||||
|
||||
CMSIS Device L5 | CMSIS Core | Was delivered in the full MCU package
|
||||
--------------- | ---------- | -------------------------------------
|
||||
Tag v1.0.0 | Tag v5.4.0_cm33 | Tag v1.1.0
|
||||
Tag v1.0.2 | Tag v5.4.0_cm33 | Tag v1.2.0
|
||||
Tag v1.0.3 | Tag v5.6.0_cm33 | Tag v1.3.0
|
||||
Tag v1.0.4 | Tag v5.6.0_cm33 | Tag v1.4.0 (and following, if any, till next tag)
|
||||
|
||||
The full **STM32CubeL5** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeL5).
|
||||
|
||||
## Troubleshooting
|
||||
|
||||
If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/cmsis_device_l5/issues/new).
|
||||
|
||||
For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
|
||||
@@ -1,221 +0,0 @@
|
||||
<!DOCTYPE html>
|
||||
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
|
||||
<head>
|
||||
<meta charset="utf-8" />
|
||||
<meta name="generator" content="pandoc" />
|
||||
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
|
||||
<title>Release Notes for STM32L5xx CMSIS</title>
|
||||
<style type="text/css">
|
||||
code{white-space: pre-wrap;}
|
||||
span.smallcaps{font-variant: small-caps;}
|
||||
span.underline{text-decoration: underline;}
|
||||
div.column{display: inline-block; vertical-align: top; width: 50%;}
|
||||
</style>
|
||||
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
|
||||
<!--[if lt IE 9]>
|
||||
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
|
||||
<![endif]-->
|
||||
<link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
|
||||
</head>
|
||||
<body>
|
||||
<div class="row">
|
||||
<div class="col-sm-12 col-lg-4">
|
||||
<center>
|
||||
<h1 id="release-notes-for">Release Notes for</h1>
|
||||
<h1 id="stm32l5xx-cmsis"><mark>STM32L5xx CMSIS</mark></h1>
|
||||
<p>Copyright © 2019 STMicroelectronics<br />
|
||||
</p>
|
||||
<a href="https://www.st.com" class="logo"><img src="./_htmresc/st_logo_2020.png" alt="ST logo" /></a>
|
||||
</center>
|
||||
<h1 id="license">License</h1>
|
||||
<p>This software component is licensed by ST under Apache-2.0 license, the "License"; You may not use this component except in compliance with the License. You may obtain a copy of the License at:</p>
|
||||
<p><a href="https://opensource.org/licenses/Apache-2.0">Apache License v2.0</a></p>
|
||||
<h1 id="purpose">Purpose</h1>
|
||||
<p>This driver provides the CMSIS device for the STM32L5 products. This covers STM32L552xx/STM32L5622x devices.</p>
|
||||
<p>This driver is composed of the descriptions of the registers under “Include” directory.</p>
|
||||
<p>Various template file are provided to easily build an application. They can be adapted to fit applications requirements.</p>
|
||||
<ul>
|
||||
<li>Include/Templates/partition_stm32l552xx.h and partition_stm32l562xx.h contain a default Secure Attribute Unit (SAU) set up from SystemInit() for secure application when the TrustZone-M security is enabled (TZEN=1).</li>
|
||||
<li>Source/Templates/system_stm32l5xx.c contains the initialization code referred as SystemInit() when there is no TrustZone-M security enabled (TZEN=0).</li>
|
||||
<li>Source/Templates/system_stm32l5xx_s.c contains the initialization code referred as SystemInit() for secure application when the TrustZone-M security is enabled (TZEN=1).</li>
|
||||
<li>Source/Templates/system_stm32l5xx_ns.c contains the initialization code referred as SystemInit() for non-secure application when the TrustZone-M security is enabled (TZEN=1).</li>
|
||||
<li>Startup files are provided as example for IAR, KEIL and STM32CubeIDE.</li>
|
||||
<li>Linker files are provided as example for IAR, KEIL and STM32CubeIDE.</li>
|
||||
</ul>
|
||||
</div>
|
||||
<div class="col-sm-12 col-lg-8">
|
||||
<h1 id="update-history">Update History</h1>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section5" checked aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.0.4 / 10-February-2021</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes">Main Changes</h2>
|
||||
<p><strong>Maintenance release</strong></p>
|
||||
<h2 id="contents">Contents</h2>
|
||||
<p>Maintenance release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
|
||||
<ul>
|
||||
<li>stm32l552xx.h and stm32l562xx.h updates
|
||||
<ul>
|
||||
<li>Add TAMP_CFGR configuration register and definitions for TMONEN, VMONEN and WUTMONEN monitoring functions</li>
|
||||
<li>Fix I2C4_EV_IRQn and I2C4_ER_IRQn order in IRQn_Type</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
<h2 id="notes">Notes</h2>
|
||||
<p>Reminder:</p>
|
||||
<ul>
|
||||
<li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
|
||||
<ul>
|
||||
<li>template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).</li>
|
||||
<li>default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
|
||||
<ul>
|
||||
<li>SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)</li>
|
||||
<li>SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))</li>
|
||||
<li>SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))</li>
|
||||
<li>SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)</li>
|
||||
<li>SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)</li>
|
||||
<li>SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)</li>
|
||||
</ul></li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 26-June-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-1">Main Changes</h2>
|
||||
<p><strong>Fourth release</strong></p>
|
||||
<h2 id="contents-1">Contents</h2>
|
||||
<p>Fourth release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
|
||||
<ul>
|
||||
<li>stm32l552xx.h and stm32l562xx.h updates
|
||||
<ul>
|
||||
<li>Fix ICACHE_FCR_CERRF bit definition</li>
|
||||
<li>Align DBGMCU_CR register and bits definitions with RM0438 revision 5</li>
|
||||
<li>Cleanup RCC_CFGR_* definitions to keep only bits definitions</li>
|
||||
</ul></li>
|
||||
<li>Templates\gcc\startup_stm32l552xx.s and startup_stm32l562xx.s
|
||||
<ul>
|
||||
<li>Call SystemInit() before RAM initialization in startup/Reset_Handler</li>
|
||||
</ul></li>
|
||||
<li>Add README.md and License.md files for GitHub publication</li>
|
||||
<li>Misspelled words corrections in driver descriptions</li>
|
||||
</ul>
|
||||
<h2 id="notes-1">Notes</h2>
|
||||
<p>Reminder:</p>
|
||||
<ul>
|
||||
<li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
|
||||
<ul>
|
||||
<li>template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).</li>
|
||||
<li>default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
|
||||
<ul>
|
||||
<li>SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)</li>
|
||||
<li>SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))</li>
|
||||
<li>SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))</li>
|
||||
<li>SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)</li>
|
||||
<li>SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)</li>
|
||||
<li>SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)</li>
|
||||
</ul></li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 12-February-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-2">Main Changes</h2>
|
||||
<p><strong>Third release</strong></p>
|
||||
<h2 id="contents-2">Contents</h2>
|
||||
<p>Third official release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
|
||||
<ul>
|
||||
<li>stm32l552xx.h and stm32l562xx.h updates
|
||||
<ul>
|
||||
<li>Add root secure services library (RSSLIB) definitions</li>
|
||||
<li>Add bootloader id address</li>
|
||||
<li>Align DBGMCU_APB2FZR register and bits definitions with RM0438</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
<h2 id="notes-2">Notes</h2>
|
||||
<p>Reminder:</p>
|
||||
<ul>
|
||||
<li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
|
||||
<ul>
|
||||
<li>template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).</li>
|
||||
<li>default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
|
||||
<ul>
|
||||
<li>SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)</li>
|
||||
<li>SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))</li>
|
||||
<li>SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))</li>
|
||||
<li>SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)</li>
|
||||
<li>SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)</li>
|
||||
<li>SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)</li>
|
||||
</ul></li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section2" unchecked aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 22-January-2020</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-3">Main Changes</h2>
|
||||
<p><strong>Second release</strong></p>
|
||||
<h2 id="contents-3">Contents</h2>
|
||||
<p>Second official release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
|
||||
<ul>
|
||||
<li>Templates system_stm32l5xx.c, system_stm32l5xx_s.c and system_stm32l5xx_ns.c
|
||||
<ul>
|
||||
<li>Add vector table relocation capability with conditional USER_VECT_TAB_ADDRESS</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
<h2 id="notes-3">Notes</h2>
|
||||
<p>Reminder:</p>
|
||||
<ul>
|
||||
<li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
|
||||
<ul>
|
||||
<li>template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).</li>
|
||||
<li>default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
|
||||
<ul>
|
||||
<li>SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)</li>
|
||||
<li>SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))</li>
|
||||
<li>SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))</li>
|
||||
<li>SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)</li>
|
||||
<li>SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)</li>
|
||||
<li>SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)</li>
|
||||
</ul></li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
</div>
|
||||
</div>
|
||||
<div class="collapse">
|
||||
<input type="checkbox" id="collapse-section1" unchecked aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 13-December-2019</strong></label>
|
||||
<div>
|
||||
<h2 id="main-changes-4">Main Changes</h2>
|
||||
<p><strong>First release</strong></p>
|
||||
<h2 id="contents-4">Contents</h2>
|
||||
<p>First official release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
|
||||
<ul>
|
||||
<li>Templates
|
||||
<ul>
|
||||
<li>When TrustZone security is enabled in the system (Flash option bit TZEN=1), the partition_stm32l552xx.h and partition_stm32l562xx.h are available from \Include\Templates with a default Security Attribute Unit (SAU) configuration:
|
||||
<ul>
|
||||
<li>SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)</li>
|
||||
<li>SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))</li>
|
||||
<li>SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))</li>
|
||||
<li>SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)</li>
|
||||
<li>SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)</li>
|
||||
<li>SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)</li>
|
||||
</ul></li>
|
||||
<li>system_stm32l5xx_s.c and system_stm32l5xx_ns.c for respectively secure application and non-secure application when TrustZone security is enabled (TZEN=1)</li>
|
||||
<li>Linker files for 256 and 512 Kbytes Flash device configurations</li>
|
||||
</ul></li>
|
||||
</ul>
|
||||
<h2 id="notes-4">Notes</h2>
|
||||
<p>When TrustZone is enabled in the system (Flash option bit TZEN=1), template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core)</p>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
</div>
|
||||
<footer class="sticky">
|
||||
<p>For complete documentation on STM32L5xx, visit: [<a href="http://www.st.com/stm32l5">www.st.com/stm32l5</a>]</p>
|
||||
<em>This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.</em>
|
||||
</footer>
|
||||
</body>
|
||||
</html>
|
||||
-16
@@ -1,16 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00040000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00040000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00030000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
-16
@@ -1,16 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08020000 0x00020000 { ; load region size_region
|
||||
ER_IROM1 0x08020000 0x00020000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20018000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
-21
@@ -1,21 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM2 0x0C000000 0x00020000 { ; load region size_region
|
||||
ER_IROM2 0x0C000000 0x0001FF00 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM2 0x30000000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
LR_IROM3 0x0C01FF00 0x00000100 { ; load region size_region
|
||||
ER_IROM3 0x0C01FF00 0x00000100 { ; load address = execution address
|
||||
*(Veneer$$CMSE) ; check with partition.h
|
||||
}
|
||||
}
|
||||
-16
@@ -1,16 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00080000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00030000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
-16
@@ -1,16 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08040000 0x00040000 { ; load region size_region
|
||||
ER_IROM1 0x08040000 0x00040000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20018000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
-21
@@ -1,21 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM2 0x0C000000 0x00040000 { ; load region size_region
|
||||
ER_IROM2 0x0C000000 0x0003E000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM2 0x30000000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
LR_IROM3 0x0C03E000 0x00002000 { ; load region size_region
|
||||
ER_IROM3 0x0C03E000 0x00002000 { ; load address = execution address
|
||||
*(Veneer$$CMSE) ; check with partition.h
|
||||
}
|
||||
}
|
||||
-16
@@ -1,16 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08000000 0x00080000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00030000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
-16
@@ -1,16 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x08040000 0x00040000 { ; load region size_region
|
||||
ER_IROM1 0x08040000 0x00040000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20018000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
-21
@@ -1,21 +0,0 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM2 0x0C000000 0x00040000 { ; load region size_region
|
||||
ER_IROM2 0x0C000000 0x0003E000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM2 0x30000000 0x00018000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
LR_IROM3 0x0C03E000 0x00002000 { ; load region size_region
|
||||
ER_IROM3 0x0C03E000 0x00002000 { ; load address = execution address
|
||||
*(Veneer$$CMSE) ; check with partition.h
|
||||
}
|
||||
}
|
||||
-508
File diff suppressed because it is too large
Load Diff
-514
File diff suppressed because it is too large
Load Diff
-184
@@ -1,184 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L552xC Device from STM32L5 series
|
||||
** 256Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K
|
||||
ROM (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-184
@@ -1,184 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L552xC Device from STM32L5 series
|
||||
** 256Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20018000, LENGTH = 96K /* Memory is divided. Actual start is 0x20000000 and actual length is 256K */
|
||||
ROM (rx) : ORIGIN = 0x8020000, LENGTH = 128K /* Memory is divided. Actual start is 0x8000000 and actual length is 256K */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-192
@@ -1,192 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L552xC Device from STM32L5 series
|
||||
** 256Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x30000000, LENGTH = 96K /* Memory is divided. Actual start is 0x30000000 and actual length is 256K */
|
||||
ROM (rx) : ORIGIN = 0x0C000000, LENGTH = 120K /* Memory is divided. Actual start is 0x0C000000 and actual length is 256K */
|
||||
ROM_NSC (rx) : ORIGIN = 0x0C01E000, LENGTH = 8K /* Non-Secure Call-able region */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
.gnu.sgstubs :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.gnu.sgstubs*) /* Secure Gateway stubs */
|
||||
. = ALIGN(8);
|
||||
} >ROM_NSC
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-184
@@ -1,184 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xE Device from STM32L5 series
|
||||
** 512Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K
|
||||
ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-184
@@ -1,184 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xE Device from STM32L5 series
|
||||
** 512Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20018000, LENGTH = 96K /* Memory is divided. Actual start is 0x20000000 and actual length is 256K */
|
||||
ROM (rx) : ORIGIN = 0x8040000, LENGTH = 256K /* Memory is divided. Actual start is 0x8000000 and actual length is 512K */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-192
@@ -1,192 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xE Device from STM32L5 series
|
||||
** 512Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x30000000, LENGTH = 96K /* Memory is divided. Actual start is 0x30000000 and actual length is 256K */
|
||||
ROM (rx) : ORIGIN = 0x0C000000, LENGTH = 248K /* Memory is divided. Actual start is 0x0C000000 and actual length is 512K */
|
||||
ROM_NSC (rx) : ORIGIN = 0x0C03E000, LENGTH = 8K /* Non-Secure Call-able region */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
.gnu.sgstubs :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.gnu.sgstubs*) /* Secure Gateway stubs */
|
||||
. = ALIGN(8);
|
||||
} >ROM_NSC
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-182
@@ -1,182 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld (debug in RAM dedicated)
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xx Device from STM32L5 series
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "RAM" Ram type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* The program code and other data into "RAM" Ram type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >RAM
|
||||
|
||||
/* Constant data into "RAM" Ram type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-182
@@ -1,182 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld (debug in RAM dedicated)
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xx Device from STM32L5 series
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20018000, LENGTH = 96K /* Memory is divided. Actual start is 0x20000000 and actual length is 256K */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "RAM" Ram type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* The program code and other data into "RAM" Ram type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >RAM
|
||||
|
||||
/* Constant data into "RAM" Ram type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-190
@@ -1,190 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld (debug in RAM dedicated)
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xx Device from STM32L5 series
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x30000000, LENGTH = 96K - 256 /* Memory is divided. Actual start is 0x30000000 and actual length is 256K */
|
||||
RAM_NSC (xrw) : ORIGIN = 0x30017F00, LENGTH = 256 /* Non-Secure Call-able region */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "RAM" Ram type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* The program code and other data into "RAM" Ram type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >RAM
|
||||
|
||||
/* Constant data into "RAM" Ram type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM
|
||||
|
||||
.gnu.sgstubs :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.gnu.sgstubs*) /* Secure Gateway stubs */
|
||||
. = ALIGN(8);
|
||||
} >RAM_NSC
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-184
@@ -1,184 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xE Device from STM32L5 series
|
||||
** 512Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K
|
||||
ROM (rx) : ORIGIN = 0x8000000, LENGTH = 512K
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-184
@@ -1,184 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xE Device from STM32L5 series
|
||||
** 512Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20018000, LENGTH = 96K /* Memory is divided. Actual start is 0x20000000 and actual length is 256K */
|
||||
ROM (rx) : ORIGIN = 0x8040000, LENGTH = 256K /* Memory is divided. Actual start is 0x8000000 and actual length is 512K */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-192
@@ -1,192 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xE Device from STM32L5 series
|
||||
** 512Kbytes ROM
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x30000000, LENGTH = 96K /* Memory is divided. Actual start is 0x30000000 and actual length is 256K */
|
||||
ROM (rx) : ORIGIN = 0x0C000000, LENGTH = 248K /* Memory is divided. Actual start is 0x0C000000 and actual length is 512K */
|
||||
ROM_NSC (rx) : ORIGIN = 0x0C03E000, LENGTH = 8K /* Non-Secure Call-able region */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "ROM" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* The program code and other data into "ROM" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >ROM
|
||||
|
||||
/* Constant data into "ROM" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >ROM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> ROM
|
||||
|
||||
.gnu.sgstubs :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.gnu.sgstubs*) /* Secure Gateway stubs */
|
||||
. = ALIGN(8);
|
||||
} >ROM_NSC
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-182
@@ -1,182 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld (debug in RAM dedicated)
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xx Device from STM32L5 series
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "RAM" Ram type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* The program code and other data into "RAM" Ram type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >RAM
|
||||
|
||||
/* Constant data into "RAM" Ram type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-182
@@ -1,182 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld (debug in RAM dedicated)
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xx Device from STM32L5 series
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20018000, LENGTH = 96K /* Memory is divided. Actual start is 0x20000000 and actual length is 256K */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "RAM" Ram type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* The program code and other data into "RAM" Ram type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >RAM
|
||||
|
||||
/* Constant data into "RAM" Ram type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-190
@@ -1,190 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld (debug in RAM dedicated)
|
||||
**
|
||||
** Author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32L5x2xx Device from STM32L5 series
|
||||
** 192Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
** All rights reserved.</center></h2>
|
||||
**
|
||||
** This software component is licensed by ST under Apache License, Version 2.0,
|
||||
** the "License"; You may not use this file except in compliance with the
|
||||
** License. You may obtain a copy of the License at:
|
||||
** opensource.org/licenses/Apache-2.0
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x30000000, LENGTH = 96K - 256 /* Memory is divided. Actual start is 0x30000000 and actual length is 256K */
|
||||
RAM_NSC (xrw) : ORIGIN = 0x30017F00, LENGTH = 256 /* Non-Secure Call-able region */
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "RAM" Ram type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* The program code and other data into "RAM" Ram type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >RAM
|
||||
|
||||
/* Constant data into "RAM" Ram type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(8);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(8);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.init_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(8);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM
|
||||
|
||||
.gnu.sgstubs :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
*(.gnu.sgstubs*) /* Secure Gateway stubs */
|
||||
. = ALIGN(8);
|
||||
} >RAM_NSC
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(8);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(8);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
-609
File diff suppressed because it is too large
Load Diff
-618
File diff suppressed because it is too large
Load Diff
-41
@@ -1,41 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_SRAM1_start__ = 0x20000000;
|
||||
define symbol __region_SRAM1_end__ = 0x2002FFFF;
|
||||
define symbol __region_SRAM2_start__ = 0x20030000;
|
||||
define symbol __region_SRAM2_end__ = 0x2003FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
|
||||
-40
@@ -1,40 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08020000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08020000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20018000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_SRAM1_start__ = 0x20018000;
|
||||
define symbol __region_SRAM1_end__ = 0x2002FFFF;
|
||||
define symbol __region_SRAM2_start__ = 0x20030000;
|
||||
define symbol __region_SRAM2_end__ = 0x2003FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block HEAP, block CSTACK};
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
-51
@@ -1,51 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x0C000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x0C000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0C01FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x30017FFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_ROM_NSC_start__ = 0x0C01E000;
|
||||
define symbol __region_ROM_NSC_end__ = 0x0C01FFFF;
|
||||
define symbol __region_SRAM1_start__ = 0x30000000;
|
||||
define symbol __region_SRAM1_end__ = 0x30017FFF;
|
||||
define symbol __region_SRAM2_start__ = 0;
|
||||
define symbol __region_SRAM2_end__ = 0;
|
||||
define symbol __region_ROM_NS_start__ = 0x08020000;
|
||||
define symbol __region_ROM_NS_end__ = 0x0803FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __region_ROM_NSC_start__ to __region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_ROM_NS_start__;
|
||||
|
||||
define exported symbol __NSC_region_start = __region_ROM_NSC_start__;
|
||||
define exported symbol __NSC_region_end = __region_ROM_NSC_end__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite, block HEAP, block CSTACK };
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
-41
@@ -1,41 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_SRAM1_start__ = 0x20000000;
|
||||
define symbol __region_SRAM1_end__ = 0x2002FFFF;
|
||||
define symbol __region_SRAM2_start__ = 0x20030000;
|
||||
define symbol __region_SRAM2_end__ = 0x2003FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
|
||||
-40
@@ -1,40 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08040000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08040000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20018000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_SRAM1_start__ = 0x20018000;
|
||||
define symbol __region_SRAM1_end__ = 0x2002FFFF;
|
||||
define symbol __region_SRAM2_start__ = 0x20030000;
|
||||
define symbol __region_SRAM2_end__ = 0x2003FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block HEAP, block CSTACK};
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
-51
@@ -1,51 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x0C000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x0C000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0C03FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x30017FFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_ROM_NSC_start__ = 0x0C03E000;
|
||||
define symbol __region_ROM_NSC_end__ = 0x0C03FFFF;
|
||||
define symbol __region_SRAM1_start__ = 0x30000000;
|
||||
define symbol __region_SRAM1_end__ = 0x30017FFF;
|
||||
define symbol __region_SRAM2_start__ = 0;
|
||||
define symbol __region_SRAM2_end__ = 0;
|
||||
define symbol __region_ROM_NS_start__ = 0x08040000;
|
||||
define symbol __region_ROM_NS_end__ = 0x0807FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __region_ROM_NSC_start__ to __region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_ROM_NS_start__;
|
||||
|
||||
define exported symbol __NSC_region_start = __region_ROM_NSC_start__;
|
||||
define exported symbol __NSC_region_end = __region_ROM_NSC_end__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in ROM_NSC_region { section Veneer$$CMSE };
|
||||
place in RAM_region { readwrite, block HEAP, block CSTACK };
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
-31
@@ -1,31 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in RAM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
-30
@@ -1,30 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20018000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20018000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in RAM_region { readonly };
|
||||
place in RAM_region { readwrite, block HEAP, block CSTACK };
|
||||
-48
@@ -1,48 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x30000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x30000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x30017EFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_ROM_NSC_start__ = 0;
|
||||
define symbol __region_ROM_NSC_end__ = 0;
|
||||
define symbol __region_RAM_NSC_start__ = 0x30017F00;
|
||||
define symbol __region_RAM_NSC_end__ = 0x30017FFF;
|
||||
define symbol __region_ROM_NS_start__ = 0;
|
||||
define symbol __region_ROM_NS_end__ = 0;
|
||||
define symbol __region_RAM_NS_start__ = 0x20018000;
|
||||
define symbol __region_RAM_NS_end__ = 0x2003FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region ROM_NSC_region = mem:[from __region_ROM_NSC_start__ to __region_ROM_NSC_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region RAM_NSC_region = mem:[from __region_RAM_NSC_start__ to __region_RAM_NSC_end__];
|
||||
|
||||
define exported symbol __VTOR_TABLE_start = __ICFEDIT_intvec_start__;
|
||||
define exported symbol __VTOR_TABLE_NS_start = __region_RAM_NS_start__;
|
||||
|
||||
define exported symbol __NSC_region_start = __region_RAM_NSC_start__;
|
||||
define exported symbol __NSC_region_end = __region_RAM_NSC_end__;
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in RAM_region { readonly };
|
||||
place in RAM_region { readwrite, block HEAP, block CSTACK };
|
||||
place in RAM_NSC_region { section Veneer$$CMSE };
|
||||
-41
@@ -1,41 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_SRAM1_start__ = 0x20000000;
|
||||
define symbol __region_SRAM1_end__ = 0x2002FFFF;
|
||||
define symbol __region_SRAM2_start__ = 0x20030000;
|
||||
define symbol __region_SRAM2_end__ = 0x2003FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
|
||||
-40
@@ -1,40 +0,0 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08040000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08040000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20018000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
|
||||
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define symbol __region_SRAM1_start__ = 0x20018000;
|
||||
define symbol __region_SRAM1_end__ = 0x2002FFFF;
|
||||
define symbol __region_SRAM2_start__ = 0x20030000;
|
||||
define symbol __region_SRAM2_end__ = 0x2003FFFF;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
|
||||
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block HEAP, block CSTACK};
|
||||
place in SRAM1_region { };
|
||||
place in SRAM2_region { };
|
||||
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Reference in New Issue
Block a user