mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-06-12 20:24:15 +08:00
[add]添加bsp/stm32/stm32u575-st-nucleo外设 (#7237)
* [add]添加bsp/stm32/stm32u575-st-nucleo外设 * [fix]修改源码格式使之符合RT-Thread代码规范 * [fix]修改相关报错问题 * [fix]修改README.md * [fix]删除无效代码及添加相关注释
This commit is contained in:
songw4232
GitHub
@@ -22,7 +22,7 @@ extern "C" {
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#define ADC1_CONFIG \
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{ \
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.Instance = ADC1, \
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.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \
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.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4, \
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.Init.Resolution = ADC_RESOLUTION_12B, \
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.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
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.Init.ScanConvMode = ADC_SCAN_DISABLE, \
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@@ -44,7 +44,7 @@ extern "C" {
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#define ADC2_CONFIG \
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{ \
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.Instance = ADC2, \
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.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \
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.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4, \
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.Init.Resolution = ADC_RESOLUTION_12B, \
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.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
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.Init.ScanConvMode = ADC_SCAN_DISABLE, \
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@@ -66,7 +66,7 @@ extern "C" {
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#define ADC3_CONFIG \
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{ \
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.Instance = ADC3, \
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.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \
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.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4, \
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.Init.Resolution = ADC_RESOLUTION_12B, \
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.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
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.Init.ScanConvMode = ADC_SCAN_DISABLE, \
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@@ -271,7 +271,12 @@ static rt_int16_t stm32_adc_get_vref (struct rt_adc_device *device)
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ret = rt_adc_disable(device, RT_ADC_INTERN_CH_VREF);
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if (ret != RT_EOK) return (rt_int16_t)ret;
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#ifdef SOC_SERIES_STM32U5
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vref_mv = __LL_ADC_CALC_VREFANALOG_VOLTAGE(stm32_adc_handler->Instance, vref_value, stm32_adc_handler->Init.Resolution);
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#else
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vref_mv = __LL_ADC_CALC_VREFANALOG_VOLTAGE(vref_value, stm32_adc_handler->Init.Resolution);
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#endif
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#else
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vref_mv = 3300;
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#endif /* __LL_ADC_CALC_VREFANALOG_VOLTAGE */
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@@ -140,7 +140,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
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spi_handle->Init.NSS = SPI_NSS_SOFT;
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uint32_t SPI_CLOCK;
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static uint32_t SPI_CLOCK;
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/* Some series may only have APBPERIPH_BASE, but don't have HAL_RCC_GetPCLK2Freq */
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#if defined(APBPERIPH_BASE)
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@@ -482,6 +482,7 @@ static int rt_hw_spi_bus_init(void)
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#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
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spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request;
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#endif
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#ifndef SOC_SERIES_STM32U5
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spi_bus_obj[i].dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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spi_bus_obj[i].dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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spi_bus_obj[i].dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
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@@ -489,6 +490,7 @@ static int rt_hw_spi_bus_init(void)
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spi_bus_obj[i].dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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spi_bus_obj[i].dma.handle_rx.Init.Mode = DMA_NORMAL;
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spi_bus_obj[i].dma.handle_rx.Init.Priority = DMA_PRIORITY_HIGH;
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#endif
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7)
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spi_bus_obj[i].dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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spi_bus_obj[i].dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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@@ -524,6 +526,7 @@ static int rt_hw_spi_bus_init(void)
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#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7)
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spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request;
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#endif
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#ifndef SOC_SERIES_STM32U5
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spi_bus_obj[i].dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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spi_bus_obj[i].dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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spi_bus_obj[i].dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
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@@ -531,6 +534,7 @@ static int rt_hw_spi_bus_init(void)
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spi_bus_obj[i].dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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spi_bus_obj[i].dma.handle_tx.Init.Mode = DMA_NORMAL;
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spi_bus_obj[i].dma.handle_tx.Init.Priority = DMA_PRIORITY_LOW;
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#endif
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7)
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spi_bus_obj[i].dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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spi_bus_obj[i].dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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@@ -40,7 +40,7 @@ if GetDepend(['RT_USING_I2C']):
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if GetDepend(['RT_USING_SPI']):
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src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_spi.c']
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src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_spi_ex.c']
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src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_qspi.c']
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src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_ospi.c']
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if GetDepend(['RT_USING_USB']):
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src += ['STM32U5xx_HAL_Driver/Src/stm32u5xx_hal_hcd.c']
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@@ -22,7 +22,9 @@ CONFIG_RT_HOOK_USING_FUNC_PTR=y
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CONFIG_RT_USING_IDLE_HOOK=y
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CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=256
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# CONFIG_RT_USING_TIMER_SOFT is not set
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CONFIG_RT_USING_TIMER_SOFT=y
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CONFIG_RT_TIMER_THREAD_PRIO=4
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CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
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#
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# kservice optimization
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@@ -81,7 +83,7 @@ CONFIG_RT_USING_DEVICE=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=256
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
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CONFIG_RT_VER_NUM=0x50000
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CONFIG_RT_VER_NUM=0x50001
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# CONFIG_RT_USING_STDC_ATOMIC is not set
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# CONFIG_RT_USING_CACHE is not set
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CONFIG_RT_USING_HW_ATOMIC=y
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@@ -115,6 +117,10 @@ CONFIG_FINSH_USING_DESCRIPTION=y
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# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
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# CONFIG_FINSH_USING_AUTH is not set
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CONFIG_FINSH_ARG_MAX=10
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#
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# DFS: device virtual file system
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#
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# CONFIG_RT_USING_DFS is not set
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# CONFIG_RT_USING_FAL is not set
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@@ -123,7 +129,9 @@ CONFIG_FINSH_ARG_MAX=10
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#
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_UNAMED_PIPE_NUMBER=64
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# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
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CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
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CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
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CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
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CONFIG_RT_USING_SERIAL=y
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CONFIG_RT_USING_SERIAL_V1=y
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# CONFIG_RT_USING_SERIAL_V2 is not set
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@@ -132,22 +140,31 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
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# CONFIG_RT_USING_CAN is not set
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# CONFIG_RT_USING_HWTIMER is not set
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# CONFIG_RT_USING_CPUTIME is not set
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# CONFIG_RT_USING_I2C is not set
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CONFIG_RT_USING_I2C=y
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# CONFIG_RT_I2C_DEBUG is not set
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CONFIG_RT_USING_I2C_BITOPS=y
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# CONFIG_RT_I2C_BITOPS_DEBUG is not set
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# CONFIG_RT_USING_PHY is not set
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_ADC is not set
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CONFIG_RT_USING_ADC=y
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# CONFIG_RT_USING_DAC is not set
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# CONFIG_RT_USING_NULL is not set
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# CONFIG_RT_USING_ZERO is not set
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# CONFIG_RT_USING_RANDOM is not set
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# CONFIG_RT_USING_PWM is not set
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CONFIG_RT_USING_PWM=y
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_PM is not set
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# CONFIG_RT_USING_FDT is not set
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# CONFIG_RT_USING_RTC is not set
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# CONFIG_RT_USING_SDIO is not set
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# CONFIG_RT_USING_SPI is not set
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CONFIG_RT_USING_SPI=y
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# CONFIG_RT_USING_SPI_BITOPS is not set
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# CONFIG_RT_USING_QSPI is not set
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# CONFIG_RT_USING_SPI_MSD is not set
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# CONFIG_RT_USING_SFUD is not set
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# CONFIG_RT_USING_ENC28J60 is not set
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# CONFIG_RT_USING_SPI_WIFI is not set
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_AUDIO is not set
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# CONFIG_RT_USING_SENSOR is not set
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@@ -603,7 +620,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
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# CONFIG_PKG_USING_LKDGUI is not set
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# CONFIG_PKG_USING_NRF5X_SDK is not set
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# CONFIG_PKG_USING_NRFX is not set
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# CONFIG_PKG_USING_WM_LIBRARIES is not set
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#
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# Kendryte SDK
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@@ -977,6 +993,10 @@ CONFIG_SOC_STM32U575ZI=y
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#
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# Onboard Peripheral Drivers
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#
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# CONFIG_BSP_USING_ARDUINO is not set
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# CONFIG_BSP_USING_KEY is not set
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# CONFIG_BSP_USING_MPU6XXX is not set
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# CONFIG_BSP_USING_SPI_FLASH is not set
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#
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# On-chip Peripheral Drivers
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@@ -984,6 +1004,12 @@ CONFIG_SOC_STM32U575ZI=y
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CONFIG_BSP_USING_GPIO=y
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CONFIG_BSP_USING_UART=y
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CONFIG_BSP_USING_UART1=y
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# CONFIG_BSP_USING_UART2 is not set
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# CONFIG_BSP_USING_LPUART1 is not set
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# CONFIG_BSP_USING_ADC is not set
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# CONFIG_BSP_USING_PWM is not set
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# CONFIG_BSP_USING_SPI is not set
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# CONFIG_BSP_USING_I2C is not set
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# CONFIG_BSP_USING_UDID is not set
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#
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@@ -1,9 +1,12 @@
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from building import *
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import os
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cwd = GetCurrentDir()
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src = Glob('*.c')
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cwd = GetCurrentDir()
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CPPPATH = [cwd]
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src = Glob('*.c')
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if GetDepend(['PKG_USING_RTDUINO']) and not GetDepend(['RTDUINO_NO_SETUP_LOOP']):
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src += ['arduino_main.cpp']
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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@@ -0,0 +1,24 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-04-13 songw4232 first version
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*/
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#include <Arduino.h>
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void setup(void)
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{
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/* put your setup code here, to run once: */
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Serial.begin();
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}
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void loop(void)
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{
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/* put your main code here, to run repeatedly: */
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Serial.println("Hello Arduino!");
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delay(800);
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}
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@@ -0,0 +1,51 @@
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# STM32U575-NUCLEO开发板的Arduino生态兼容说明
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## 1 RTduino - RT-Thread的Arduino生态兼容层
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STM32U575-NUCLEO开发板已经完整适配了[RTduino软件包](https://github.com/RTduino/RTduino)，即RT-Thread的Arduino生态兼容层。用户可以按照Arduino的编程习惯来操作该BSP，并且可以使用大量Arduino社区丰富的库，是对RT-Thread生态的极大增强。更多信息，请参见[RTduino软件包说明文档](https://github.com/RTduino/RTduino)。
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### 1.1 如何开启针对本BSP的Arduino生态兼容层
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Env 工具下敲入 menuconfig 命令，或者 RT-Thread Studio IDE 下选择 RT-Thread Settings：
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```Kconfig
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Hardware Drivers Config --->
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Onboard Peripheral Drivers --->
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[*] Compatible with Arduino Ecosystem (RTduino)
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```
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## 2 Arduino引脚排布
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该BSP遵照Arduino UNO板的引脚排列方式，并扩展增加了STM32U575-NUCLEO自身的板载资源功能引脚。详见 `pins_arduino.c`
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更多引脚布局相关信息参见 [pins_arduino.c](pins_arduino.c) 和 [pins_arduino.h](pins_arduino.h)。
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| Arduino引脚编号 | STM32引脚编号 | 5V容忍 | 备注 |
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| --------------------- | --------- | ------- | -------------------------------------------- |
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| 0 (D0) | PG8 | 是 | Serial-Rx，被RT-Thread的UART设备框架uart1接管 |
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| 1 (D1) | PG7 | 是 | Serial-Tx，被RT-Thread的UART设备框架uart1接管 |
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| 2 (D2) | PF15 | 是 | 普通IO |
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| 3 (D3) | PE13 | 是 | PWM1-CH2，默认被RT-Thread的PWM设备框架pwm1接管 |
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| 4 (D4) | PF14 | 是 | 普通IO |
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| 5 (D5) | PE11 | 是 | PWM1-CH3，默认被RT-Thread的PWM设备框架pwm1接管 |
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| 6 (D6) | PE9 | 是 | PWM1-CH1，默认被RT-Thread的PWM设备框架pwm1接管 |
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| 7 (D7) | PF13 | 是 | 普通IO |
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| 8 (D8) | PF12 | 是 | 普通IO |
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| 9 (D9) | PD15 | 是 | PWM4-CH4，默认被RT-Thread的PWM设备框架pwm4接管 |
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| 10 (D10) | PD14 | 是 | SPI1 片选 CS |
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| 11 (D11) | PA7 | 是 | SPI1-MOSI，默认被RT-Thread的SPI设备框架spi1总线接管 |
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| 12 (D12) | PA6 | 是 | SPI1-MISO，默认被RT-Thread的SPI设备框架spi1总线接管 |
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| 13 (D13) | PA5 | 是 | SPI1-SCK，默认被RT-Thread的SPI设备框架spi1总线接管 |
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| 14 (D14) | PB9 | 是 | I2C1-SDA，默认被RT-Thread的I2C设备框架i2c1总线接管 |
|
||||
| 15 (D15) | PB8 | 是 | I2C1-SCL，默认被RT-Thread的I2C设备框架i2c1总线接管 |
|
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| A0 | PA3 | 是（但不建议） | ADC1-CH8，默认被RT-Thread的ADC设备框架adc1接管 |
|
||||
| A1 | PA2 | 是（但不建议） | ADC1-CH7，默认被RT-Thread的ADC设备框架adc1接管 |
|
||||
| A2 | PC3 | 是（但不建议） | ADC1-CH4，默认被RT-Thread的ADC设备框架adc1接管 |
|
||||
| A3 | PB0 | 是（但不建议） | ADC1-CH15，默认被RT-Thread的ADC设备框架adc1接管|
|
||||
| A4 | PC1 | 是（但不建议） | ADC1-CH2，默认被RT-Thread的ADC设备框架adc1接管 |
|
||||
| A5 | PC0 | 是（但不建议） | ADC1-CH1，默认被RT-Thread的ADC设备框架adc1接管 |
|
||||
|
||||
|
||||
> 注意：
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>
|
||||
> 1. 暂无
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@@ -0,0 +1,9 @@
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from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c') + Glob('*.cpp')
|
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inc = [cwd]
|
||||
|
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group = DefineGroup('RTduino', src, depend = ['PKG_USING_RTDUINO'], CPPPATH = inc)
|
||||
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Return('group')
|
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@@ -0,0 +1,46 @@
|
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/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-04-13 songw4232 first version
|
||||
*/
|
||||
|
||||
#include <Arduino.h>
|
||||
#include <board.h>
|
||||
#include "pins_arduino.h"
|
||||
|
||||
/*
|
||||
* {Arduino Pin, RT-Thread Pin [, Device Name, Channel]}
|
||||
* [] means optional
|
||||
* Digital pins must NOT give the device name and channel.
|
||||
* Analog pins MUST give the device name and channel(ADC, PWM or DAC).
|
||||
* Arduino Pin must keep in sequence.
|
||||
*/
|
||||
const pin_map_t pin_map_table[]=
|
||||
{
|
||||
{D0, GET_PIN(G,8), "uart1"}, /* Serial-RX */
|
||||
{D1, GET_PIN(G,7), "uart1"}, /* Serial-TX */
|
||||
{D2, GET_PIN(F,15)},
|
||||
{D3, GET_PIN(E,13), "pwm1", 3}, /* PWM */
|
||||
{D4, GET_PIN(F,14)},
|
||||
{D5, GET_PIN(E,11), "pwm1", 2}, /* PWM */
|
||||
{D6, GET_PIN(E,9), "pwm1", 1}, /* PWM */
|
||||
{D7, GET_PIN(F,13)},
|
||||
{D8, GET_PIN(F,12)},
|
||||
{D9, GET_PIN(D,15), "pwm4", 4}, /* PWM */
|
||||
{D10, GET_PIN(D,14)},
|
||||
{D11, GET_PIN(A,7), "spi1"}, /* SPI-MOSI */
|
||||
{D12, GET_PIN(A,6), "spi1"}, /* SPI-MISO */
|
||||
{D13, GET_PIN(A,5), "spi1"}, /* SPI-SCK */
|
||||
{D14, GET_PIN(B,9), "i2c1"}, /* I2C-SDA (Wire) */
|
||||
{D15, GET_PIN(B,8), "i2c1"}, /* I2C-SCL (Wire) */
|
||||
{A0, GET_PIN(A,3), "adc1", 8}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */
|
||||
{A1, GET_PIN(A,2), "adc1", 7}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */
|
||||
{A2, GET_PIN(C,3), "adc1", 4}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */
|
||||
{A3, GET_PIN(B,0), "adc1", 15}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */
|
||||
{A4, GET_PIN(C,1), "adc1", 2}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */
|
||||
{A5, GET_PIN(C,0), "adc1", 1}, /* ADC, On-Chip: internal reference voltage, ADC_CHANNEL_VREFINT */
|
||||
};
|
||||
@@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-04-13 songw4232 first version
|
||||
*/
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
|
||||
/* pins alias. Must keep in sequence */
|
||||
#define D0 (0)
|
||||
#define D1 (1)
|
||||
#define D2 (2)
|
||||
#define D3 (3)
|
||||
#define D4 (4)
|
||||
#define D5 (5)
|
||||
#define D6 (6)
|
||||
#define D7 (7)
|
||||
#define D8 (8)
|
||||
#define D9 (9)
|
||||
#define D10 (10)
|
||||
#define D11 (11)
|
||||
#define D12 (12)
|
||||
#define D13 (13)
|
||||
#define D14 (14)
|
||||
#define D15 (15)
|
||||
#define A0 (16)
|
||||
#define A1 (17)
|
||||
#define A2 (18)
|
||||
#define A3 (19)
|
||||
#define A4 (20)
|
||||
#define A5 (21)
|
||||
|
||||
#define F_CPU 160000000L /* CPU:160MHz */
|
||||
|
||||
/* i2c1 : PB9-SDA PB8-SCL */
|
||||
#define RTDUINO_DEFAULT_IIC_BUS_NAME "i2c1"
|
||||
|
||||
/* spi1 : PA5-SCK PA6-MISO PA7-MOSI */
|
||||
#define RTDUINO_DEFAULT_SPI_BUS_NAME "spi1"
|
||||
|
||||
#endif /* Pins_Arduino_h */
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
||||
File diff suppressed because one or more lines are too long
@@ -1,69 +1,95 @@
|
||||
#MicroXplorer Configuration settings - do not modify
|
||||
ADC1.CommonPathInternal=null|null|null|null
|
||||
ADC1.IPParameters=master,NbrOfConversion,Resolution,CommonPathInternal
|
||||
ADC1.IPParameters=NbrOfConversion,Resolution,master,CommonPathInternal
|
||||
ADC1.NbrOfConversion=1
|
||||
ADC1.Resolution=ADC_RESOLUTION_14B
|
||||
ADC1.master=1
|
||||
CAD.formats=
|
||||
CAD.pinconfig=
|
||||
CAD.provider=
|
||||
CORTEX_M33_NS.userName=CORTEX_M33
|
||||
File.Version=6
|
||||
GPIO.groupedBy=Group By Peripherals
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32U575ZIT6Q
|
||||
Mcu.ContextProject=TrustZoneDisabled
|
||||
Mcu.Family=STM32U5
|
||||
Mcu.IP0=ADC1
|
||||
Mcu.IP1=CORTEX_M33_NS
|
||||
Mcu.IP10=USB_OTG_FS
|
||||
Mcu.IP10=TIM1
|
||||
Mcu.IP11=TIM4
|
||||
Mcu.IP12=UCPD1
|
||||
Mcu.IP13=USART1
|
||||
Mcu.IP14=USART2
|
||||
Mcu.IP15=USB_OTG_FS
|
||||
Mcu.IP2=DEBUG
|
||||
Mcu.IP3=ICACHE
|
||||
Mcu.IP4=NVIC
|
||||
Mcu.IP5=PWR
|
||||
Mcu.IP6=RCC
|
||||
Mcu.IP7=SYS
|
||||
Mcu.IP8=UCPD1
|
||||
Mcu.IP9=USART1
|
||||
Mcu.IPNb=11
|
||||
Mcu.IP4=LPUART1
|
||||
Mcu.IP5=NVIC
|
||||
Mcu.IP6=PWR
|
||||
Mcu.IP7=RCC
|
||||
Mcu.IP8=SPI1
|
||||
Mcu.IP9=SYS
|
||||
Mcu.IPNb=16
|
||||
Mcu.Name=STM32U575ZITxQ
|
||||
Mcu.Package=LQFP144
|
||||
Mcu.Pin0=PC13
|
||||
Mcu.Pin1=PC14-OSC32_IN (PC14)
|
||||
Mcu.Pin10=PA11
|
||||
Mcu.Pin11=PA12
|
||||
Mcu.Pin12=PA13 (JTMS/SWDIO)
|
||||
Mcu.Pin13=PA14 (JTCK/SWCLK)
|
||||
Mcu.Pin14=PA15 (JTDI)
|
||||
Mcu.Pin15=PB3 (JTDO/TRACESWO)
|
||||
Mcu.Pin16=PB5
|
||||
Mcu.Pin17=PB7
|
||||
Mcu.Pin18=VP_ICACHE_VS_ICACHE
|
||||
Mcu.Pin19=VP_PWR_VS_DBSignals
|
||||
Mcu.Pin10=PA6
|
||||
Mcu.Pin11=PA7
|
||||
Mcu.Pin12=PB0
|
||||
Mcu.Pin13=PE9
|
||||
Mcu.Pin14=PE11
|
||||
Mcu.Pin15=PE13
|
||||
Mcu.Pin16=PB14
|
||||
Mcu.Pin17=PB15
|
||||
Mcu.Pin18=PD15
|
||||
Mcu.Pin19=PG2
|
||||
Mcu.Pin2=PC15-OSC32_OUT (PC15)
|
||||
Mcu.Pin20=VP_PWR_VS_SECSignals
|
||||
Mcu.Pin21=VP_SYS_VS_Systick
|
||||
Mcu.Pin3=PC2
|
||||
Mcu.Pin4=PB14
|
||||
Mcu.Pin5=PB15
|
||||
Mcu.Pin6=PG2
|
||||
Mcu.Pin7=PC7
|
||||
Mcu.Pin8=PA9
|
||||
Mcu.Pin9=PA10
|
||||
Mcu.PinsNb=22
|
||||
Mcu.Pin20=PG7
|
||||
Mcu.Pin21=PG8
|
||||
Mcu.Pin22=PC7
|
||||
Mcu.Pin23=PA9
|
||||
Mcu.Pin24=PA10
|
||||
Mcu.Pin25=PA11
|
||||
Mcu.Pin26=PA12
|
||||
Mcu.Pin27=PA13 (JTMS/SWDIO)
|
||||
Mcu.Pin28=PA14 (JTCK/SWCLK)
|
||||
Mcu.Pin29=PA15 (JTDI)
|
||||
Mcu.Pin3=PC0
|
||||
Mcu.Pin30=PB3 (JTDO/TRACESWO)
|
||||
Mcu.Pin31=PB5
|
||||
Mcu.Pin32=PB7
|
||||
Mcu.Pin33=VP_ICACHE_VS_ICACHE
|
||||
Mcu.Pin34=VP_PWR_VS_DBSignals
|
||||
Mcu.Pin35=VP_PWR_VS_SECSignals
|
||||
Mcu.Pin36=VP_SYS_VS_Systick
|
||||
Mcu.Pin37=VP_TIM1_VS_ClockSourceINT
|
||||
Mcu.Pin38=VP_TIM4_VS_ClockSourceINT
|
||||
Mcu.Pin4=PC1
|
||||
Mcu.Pin5=PC2
|
||||
Mcu.Pin6=PC3
|
||||
Mcu.Pin7=PA2
|
||||
Mcu.Pin8=PA3
|
||||
Mcu.Pin9=PA5
|
||||
Mcu.PinsNb=39
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32U575ZITxQ
|
||||
MxCube.Version=6.3.0
|
||||
MxDb.Version=DB.6.0.30
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
|
||||
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_3
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
|
||||
PA10.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label
|
||||
PA10.GPIO_Label=USART1_RX
|
||||
PA10.GPIO_PuPd=GPIO_PULLDOWN
|
||||
@@ -94,6 +120,17 @@ PA15\ (JTDI).GPIO_Label=UCPD1_CC1
|
||||
PA15\ (JTDI).Locked=true
|
||||
PA15\ (JTDI).Mode=Sink_AllSignals
|
||||
PA15\ (JTDI).Signal=UCPD1_CC1
|
||||
PA2.Mode=Asynchronous
|
||||
PA2.Signal=USART2_TX
|
||||
PA3.Mode=Asynchronous
|
||||
PA3.Signal=USART2_RX
|
||||
PA5.Locked=true
|
||||
PA5.Mode=Full_Duplex_Master
|
||||
PA5.Signal=SPI1_SCK
|
||||
PA6.Mode=Full_Duplex_Master
|
||||
PA6.Signal=SPI1_MISO
|
||||
PA7.Mode=Full_Duplex_Master
|
||||
PA7.Signal=SPI1_MOSI
|
||||
PA9.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label
|
||||
PA9.GPIO_Label=USART1_TX
|
||||
PA9.GPIO_PuPd=GPIO_PULLDOWN
|
||||
@@ -101,6 +138,8 @@ PA9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA9.Locked=true
|
||||
PA9.Mode=Asynchronous
|
||||
PA9.Signal=USART1_TX
|
||||
PB0.Mode=IN15-Single-Ended
|
||||
PB0.Signal=ADC1_IN15
|
||||
PB14.GPIOParameters=GPIO_Label
|
||||
PB14.GPIO_Label=UCPD_FLT
|
||||
PB14.Locked=true
|
||||
@@ -124,6 +163,10 @@ PB7.GPIO_PuPd=GPIO_PULLUP
|
||||
PB7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PB7.Locked=true
|
||||
PB7.Signal=GPIO_Output
|
||||
PC0.Mode=IN1-Single-Ended
|
||||
PC0.Signal=ADC1_IN1
|
||||
PC1.Mode=IN2-Single-Ended
|
||||
PC1.Signal=ADC1_IN2
|
||||
PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
|
||||
PC13.GPIO_Label=USER_BUTTON
|
||||
PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
|
||||
@@ -140,19 +183,26 @@ PC2.GPIO_Label=VBUS_SENSE
|
||||
PC2.Locked=true
|
||||
PC2.Mode=IN3-Single-Ended
|
||||
PC2.Signal=ADC1_IN3
|
||||
PC3.Mode=IN4-Single-Ended
|
||||
PC3.Signal=ADC1_IN4
|
||||
PC7.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label
|
||||
PC7.GPIO_Label=LED_GREEN
|
||||
PC7.GPIO_PuPd=GPIO_PULLUP
|
||||
PC7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PC7.Locked=true
|
||||
PC7.Signal=GPIO_Output
|
||||
PG2.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
|
||||
PG2.GPIO_Label=LED_RED
|
||||
PG2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
|
||||
PG2.GPIO_PuPd=GPIO_PULLUP
|
||||
PG2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
|
||||
PD15.Signal=S_TIM4_CH4
|
||||
PE11.Signal=S_TIM1_CH2
|
||||
PE13.Signal=S_TIM1_CH3
|
||||
PE9.Signal=S_TIM1_CH1
|
||||
PG2.Locked=true
|
||||
PG2.Signal=GPIO_Output
|
||||
PG7.Locked=true
|
||||
PG7.Mode=Asynchronous
|
||||
PG7.Signal=LPUART1_TX
|
||||
PG8.Locked=true
|
||||
PG8.Mode=Asynchronous
|
||||
PG8.Signal=LPUART1_RX
|
||||
PinOutPanel.RotationAngle=0
|
||||
ProjectManager.AskForMigrate=true
|
||||
ProjectManager.BackupPrevious=false
|
||||
@@ -176,6 +226,7 @@ ProjectManager.PreviousToolchain=
|
||||
ProjectManager.ProjectBuild=false
|
||||
ProjectManager.ProjectFileName=CubeMX_Config.ioc
|
||||
ProjectManager.ProjectName=CubeMX_Config
|
||||
ProjectManager.ProjectStructure=
|
||||
ProjectManager.RegisterCallBack=
|
||||
ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=MDK-ARM V5.32
|
||||
@@ -256,8 +307,29 @@ RCC.VCOPLL2OutputFreq_Value=6192000000
|
||||
RCC.VCOPLL3OutputFreq_Value=6192000000
|
||||
SH.GPXTI13.0=GPIO_EXTI13
|
||||
SH.GPXTI13.ConfNb=1
|
||||
SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1
|
||||
SH.S_TIM1_CH1.ConfNb=1
|
||||
SH.S_TIM1_CH2.0=TIM1_CH2,PWM Generation2 CH2
|
||||
SH.S_TIM1_CH2.ConfNb=1
|
||||
SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3
|
||||
SH.S_TIM1_CH3.ConfNb=1
|
||||
SH.S_TIM4_CH4.0=TIM4_CH4,PWM Generation4 CH4
|
||||
SH.S_TIM4_CH4.ConfNb=1
|
||||
SPI1.CalculateBaudRate=80.0 MBits/s
|
||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||
SPI1.Mode=SPI_MODE_MASTER
|
||||
SPI1.VirtualType=VM_MASTER
|
||||
TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
|
||||
TIM1.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
|
||||
TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
|
||||
TIM1.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3
|
||||
TIM4.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||
TIM4.IPParameters=Channel-PWM Generation4 CH4
|
||||
USART1.IPParameters=VirtualMode-Asynchronous
|
||||
USART1.VirtualMode-Asynchronous=VM_ASYNC
|
||||
USART2.IPParameters=VirtualMode-Asynchronous
|
||||
USART2.VirtualMode-Asynchronous=VM_ASYNC
|
||||
USB_OTG_FS.IPParameters=VirtualMode
|
||||
USB_OTG_FS.VirtualMode=Device_Only
|
||||
VP_ICACHE_VS_ICACHE.Mode=DirectMappedCache
|
||||
@@ -268,5 +340,9 @@ VP_PWR_VS_SECSignals.Mode=Security/Privilege
|
||||
VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
VP_TIM1_VS_ClockSourceINT.Mode=Internal
|
||||
VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
|
||||
VP_TIM4_VS_ClockSourceINT.Mode=Internal
|
||||
VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
|
||||
board=NUCLEO-U575ZI-Q
|
||||
boardIOC=true
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
||||
* <h2><center>© Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
@@ -61,6 +61,8 @@ extern "C" {
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
|
||||
@@ -77,8 +79,6 @@ void Error_Handler(void);
|
||||
#define UCPD_FLT_GPIO_Port GPIOB
|
||||
#define UCPD1_CC2_Pin GPIO_PIN_15
|
||||
#define UCPD1_CC2_GPIO_Port GPIOB
|
||||
#define LED_RED_Pin GPIO_PIN_2
|
||||
#define LED_RED_GPIO_Port GPIOG
|
||||
#define LED_GREEN_Pin GPIO_PIN_7
|
||||
#define LED_GREEN_GPIO_Port GPIOC
|
||||
#define USART1_TX_Pin GPIO_PIN_9
|
||||
|
||||
@@ -68,9 +68,9 @@
|
||||
/*#define HAL_MMC_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SMBUS_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
/*#define HAL_TIM_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
/*#define HAL_TSC_MODULE_ENABLED */
|
||||
/*#define HAL_RAMCFG_MODULE_ENABLED */
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
||||
* <h2><center>© Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -7,7 +7,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
||||
* <h2><center>© Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
@@ -22,7 +22,7 @@
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
#include <drv_common.h>
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
@@ -58,7 +58,9 @@
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
/**
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
@@ -72,13 +74,9 @@ void HAL_MspInit(void)
|
||||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_3);
|
||||
|
||||
/* System interrupt init*/
|
||||
HAL_PWREx_EnableVddIO2();
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
/* Configure ICACHE associativity mode */
|
||||
HAL_ICACHE_ConfigAssociativityMode(ICACHE_1WAY);
|
||||
|
||||
/* Enable ICACHE */
|
||||
HAL_ICACHE_Enable();
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
@@ -110,13 +108,23 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
|
||||
__HAL_RCC_ADC1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**ADC1 GPIO Configuration
|
||||
PC0 ------> ADC1_IN1
|
||||
PC1 ------> ADC1_IN2
|
||||
PC2 ------> ADC1_IN3
|
||||
PC3 ------> ADC1_IN4
|
||||
PB0 ------> ADC1_IN15
|
||||
*/
|
||||
GPIO_InitStruct.Pin = VBUS_SENSE_Pin;
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|VBUS_SENSE_Pin|GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(VBUS_SENSE_GPIO_Port, &GPIO_InitStruct);
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||
|
||||
@@ -142,9 +150,15 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
||||
__HAL_RCC_ADC1_CLK_DISABLE();
|
||||
|
||||
/**ADC1 GPIO Configuration
|
||||
PC0 ------> ADC1_IN1
|
||||
PC1 ------> ADC1_IN2
|
||||
PC2 ------> ADC1_IN3
|
||||
PC3 ------> ADC1_IN4
|
||||
PB0 ------> ADC1_IN15
|
||||
*/
|
||||
HAL_GPIO_DeInit(VBUS_SENSE_GPIO_Port, VBUS_SENSE_Pin);
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_1|VBUS_SENSE_Pin|GPIO_PIN_3);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
|
||||
@@ -163,11 +177,45 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||
if(huart->Instance==USART1)
|
||||
if(huart->Instance==LPUART1)
|
||||
{
|
||||
/* USER CODE BEGIN LPUART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END LPUART1_MspInit 0 */
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
|
||||
PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK3;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_LPUART1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
/**LPUART1 GPIO Configuration
|
||||
PG7 ------> LPUART1_TX
|
||||
PG8 ------> LPUART1_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN LPUART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END LPUART1_MspInit 1 */
|
||||
}
|
||||
else if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||
@@ -196,6 +244,40 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
|
||||
/* USER CODE END USART1_MspInit 1 */
|
||||
}
|
||||
else if(huart->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 0 */
|
||||
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
|
||||
PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USART2 GPIO Configuration
|
||||
PA2 ------> USART2_TX
|
||||
PA3 ------> USART2_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART2_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@@ -207,7 +289,25 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
*/
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
if(huart->Instance==USART1)
|
||||
if(huart->Instance==LPUART1)
|
||||
{
|
||||
/* USER CODE BEGIN LPUART1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END LPUART1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_LPUART1_CLK_DISABLE();
|
||||
|
||||
/**LPUART1 GPIO Configuration
|
||||
PG7 ------> LPUART1_TX
|
||||
PG8 ------> LPUART1_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_7|GPIO_PIN_8);
|
||||
|
||||
/* USER CODE BEGIN LPUART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END LPUART1_MspDeInit 1 */
|
||||
}
|
||||
else if(huart->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||
|
||||
@@ -225,6 +325,215 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 1 */
|
||||
}
|
||||
else if(huart->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART2_CLK_DISABLE();
|
||||
|
||||
/**USART2 GPIO Configuration
|
||||
PA2 ------> USART2_TX
|
||||
PA3 ------> USART2_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
|
||||
|
||||
/* USER CODE BEGIN USART2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 0 */
|
||||
/** Initializes the peripherals clock
|
||||
*/
|
||||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SPI1;
|
||||
PeriphClkInit.Spi1ClockSelection = RCC_SPI1CLKSOURCE_SYSCLK;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SPI1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hspi: SPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
||||
{
|
||||
if(hspi->Instance==SPI1)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||
|
||||
/**SPI1 GPIO Configuration
|
||||
PA5 ------> SPI1_SCK
|
||||
PA6 ------> SPI1_MISO
|
||||
PA7 ------> SPI1_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
|
||||
|
||||
/* USER CODE BEGIN SPI1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_Base MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM4)
|
||||
{
|
||||
/* USER CODE BEGIN TIM4_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM4_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM4_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM4_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM4_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 0 */
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
PE9 ------> TIM1_CH1
|
||||
PE11 ------> TIM1_CH2
|
||||
PE13 ------> TIM1_CH3
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 1 */
|
||||
}
|
||||
else if(htim->Instance==TIM4)
|
||||
{
|
||||
/* USER CODE BEGIN TIM4_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM4_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**TIM4 GPIO Configuration
|
||||
PD15 ------> TIM4_CH4
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM4_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM4_MspPostInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
/**
|
||||
* @brief TIM_Base MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
else if(htim_base->Instance==TIM4)
|
||||
{
|
||||
/* USER CODE BEGIN TIM4_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM4_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM4_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM4_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM4_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@@ -320,10 +629,7 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd)
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
void Error_Handler()
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
||||
* <h2><center>© Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
|
||||
@@ -0,0 +1,362 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32u5xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32u5xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* After each device reset the MSI (4 MHz) is used as system clock source.
|
||||
* Then SystemInit() function is called, in "startup_stm32u5xx.s" file, to
|
||||
* configure the system clock before to branch to main program.
|
||||
*
|
||||
* This file configures the system clock as follows:
|
||||
*=============================================================================
|
||||
*-----------------------------------------------------------------------------
|
||||
* System Clock source | MSI
|
||||
*-----------------------------------------------------------------------------
|
||||
* SYSCLK(Hz) | 4000000
|
||||
*-----------------------------------------------------------------------------
|
||||
* HCLK(Hz) | 4000000
|
||||
*-----------------------------------------------------------------------------
|
||||
* AHB Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB1 Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB2 Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* APB3 Prescaler | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL1_SRC | No clock
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL1_M | 1
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL1_N | 8
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL1_P | 7
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL1_Q | 2
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL1_R | 2
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL2_SRC | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL2_M | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL2_N | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL2_P | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL2_Q | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL2_R | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL3_SRC | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL3_M | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL3_N | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* PLL3_P | NA
|
||||
*-----------------------------------------------------------------------------
|
||||
* Require 48MHz for USB FS, | Disabled
|
||||
* SDIO and RNG clock |
|
||||
*-----------------------------------------------------------------------------
|
||||
*=============================================================================
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32u5xx.h"
|
||||
#include <math.h>
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 16000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (MSI_VALUE)
|
||||
#define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* MSI_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00000000UL /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* The SystemCoreClock variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 4000000U;
|
||||
|
||||
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
|
||||
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
|
||||
const uint32_t MSIRangeTable[16] = {48000000U,24000000U,16000000U,12000000U, 4000000U, 2000000U, 1500000U,\
|
||||
1000000U, 3072000U, 1536000U,1024000U, 768000U, 400000U, 200000U, 150000U, 100000U};
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32U5xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 20U)|(3UL << 22U)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set MSION bit */
|
||||
RCC->CR = RCC_CR_MSISON;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR1 = 0U;
|
||||
RCC->CFGR2 = 0U;
|
||||
RCC->CFGR3 = 0U;
|
||||
|
||||
/* Reset HSEON, CSSON , HSION, PLLxON bits */
|
||||
RCC->CR &= ~(RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLL1ON | RCC_CR_PLL2ON | RCC_CR_PLL3ON);
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLL1CFGR = 0U;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= ~(RCC_CR_HSEBYP);
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIER = 0U;
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
* or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) MSI_VALUE is a constant defined in stm32u5xx_hal.h file (default value
|
||||
* 4 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSI_VALUE is a constant defined in stm32u5xx_hal.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (***) HSE_VALUE is a constant defined in stm32u5xx_hal.h file (default value
|
||||
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t pllr, pllsource, pllm , tmp, pllfracen, msirange;
|
||||
float_t fracn1, pllvco;
|
||||
|
||||
/* Get MSI Range frequency--------------------------------------------------*/
|
||||
if(READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIRGSEL) == 0U)
|
||||
{
|
||||
/* MSISRANGE from RCC_CSR applies */
|
||||
msirange = (RCC->CSR & RCC_CSR_MSISSRANGE) >> RCC_CSR_MSISSRANGE_Pos;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* MSIRANGE from RCC_CR applies */
|
||||
msirange = (RCC->ICSCR1 & RCC_ICSCR1_MSISRANGE) >> RCC_ICSCR1_MSISRANGE_Pos;
|
||||
}
|
||||
|
||||
/*MSI frequency range in HZ*/
|
||||
msirange = MSIRangeTable[msirange];
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
switch (RCC->CFGR1 & RCC_CFGR1_SWS)
|
||||
{
|
||||
case 0x00: /* MSI used as system clock source */
|
||||
SystemCoreClock = msirange;
|
||||
break;
|
||||
|
||||
case 0x04: /* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
|
||||
case 0x08: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case 0x0C: /* PLL used as system clock source */
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
|
||||
SYSCLK = PLL_VCO / PLLR
|
||||
*/
|
||||
pllsource = (RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1SRC);
|
||||
pllm = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1M)>> RCC_PLL1CFGR_PLL1M_Pos) + 1U;
|
||||
pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN)>>RCC_PLL1CFGR_PLL1FRACEN_Pos);
|
||||
fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_PLL1FRACN)>> RCC_PLL1FRACR_PLL1FRACN_Pos));
|
||||
|
||||
switch (pllsource)
|
||||
{
|
||||
case 0x00: /* No clock sent to PLL*/
|
||||
pllvco = (float_t)0U;
|
||||
break;
|
||||
|
||||
case 0x02: /* HSI used as PLL clock source */
|
||||
pllvco = ((float_t)HSI_VALUE / (float_t)pllm);
|
||||
break;
|
||||
|
||||
case 0x03: /* HSE used as PLL clock source */
|
||||
pllvco = ((float_t)HSE_VALUE / (float_t)pllm);
|
||||
break;
|
||||
|
||||
default: /* MSI used as PLL clock source */
|
||||
pllvco = ((float_t)msirange / (float_t)pllm);
|
||||
break;
|
||||
}
|
||||
|
||||
pllvco = pllvco * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + (fracn1/(float_t)0x2000) + (float_t)1U);
|
||||
pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U );
|
||||
SystemCoreClock = (uint32_t)((uint32_t)pllvco/pllr);
|
||||
break;
|
||||
|
||||
default:
|
||||
SystemCoreClock = msirange;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@@ -9,6 +9,50 @@ config SOC_STM32U575ZI
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
config BSP_USING_ARDUINO
|
||||
bool "Compatible with Arduino Ecosystem (RTduino)"
|
||||
select PKG_USING_RTDUINO
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_ADC
|
||||
select BSP_USING_ADC1
|
||||
select BSP_USING_PWM
|
||||
select BSP_USING_PWM1
|
||||
select BSP_USING_PWM1_CH1
|
||||
select BSP_USING_PWM1_CH2
|
||||
select BSP_USING_PWM1_CH3
|
||||
select BSP_USING_PWM4
|
||||
select BSP_USING_PWM4_CH4
|
||||
select BSP_USING_I2C
|
||||
select BSP_USING_I2C1
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI1
|
||||
imply RTDUINO_USING_SERVO
|
||||
imply RTDUINO_USING_WIRE
|
||||
imply RTDUINO_USING_SPI
|
||||
default n
|
||||
|
||||
config BSP_USING_KEY
|
||||
bool "Enable onboard keys"
|
||||
select RT_USING_PIN
|
||||
select RT_USING_TIMER_SOFT
|
||||
select PKG_USING_FLEXIBLE_BUTTON
|
||||
default n
|
||||
|
||||
config BSP_USING_MPU6XXX
|
||||
bool "Enable mpu6xxx (i2c2)"
|
||||
select BSP_USING_I2C
|
||||
select BSP_USING_I2C2
|
||||
select PKG_USING_SENSORS_DRIVERS
|
||||
select PKG_USING_MPU6XXX
|
||||
select PKG_USING_MPU6XXX_LATEST_VERSION
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI_FLASH
|
||||
bool "Enable SPI FLASH"
|
||||
select BSP_USING_SPI
|
||||
select RT_USING_SFUD
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
@@ -31,6 +75,127 @@ menu "On-chip Peripheral Drivers"
|
||||
bool "Enable UART1 RX DMA"
|
||||
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_USING_UART2
|
||||
bool "Enable UART2"
|
||||
default y
|
||||
|
||||
config BSP_UART2_RX_USING_DMA
|
||||
bool "Enable UART2 RX DMA"
|
||||
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_USING_LPUART1
|
||||
bool "Enable LPUART1"
|
||||
default y
|
||||
|
||||
config BSP_LPUART1_RX_USING_DMA
|
||||
bool "Enable LPUART1 RX DMA"
|
||||
depends on BSP_USING_LPUART1 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC1
|
||||
bool "Enable ADC1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
|
||||
menuconfig BSP_USING_PWM1
|
||||
bool "Enable timer1 output PWM"
|
||||
default n
|
||||
if BSP_USING_PWM1
|
||||
config BSP_USING_PWM1_CH1
|
||||
bool "Enable PWM1 channel1"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM1_CH2
|
||||
bool "Enable PWM1 channel2"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM1_CH3
|
||||
bool "Enable PWM1 channel3"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM1_CH4
|
||||
bool "Enable PWM1 channel4"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM4
|
||||
bool "Enable timer4 output PWM"
|
||||
default n
|
||||
if BSP_USING_PWM4
|
||||
config BSP_USING_PWM4_CH1
|
||||
bool "Enable PWM4 channel1"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM4_CH2
|
||||
bool "Enable PWM4 channel2"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM4_CH3
|
||||
bool "Enable PWM4 channel3"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM4_CH4
|
||||
bool "Enable PWM4 channel4"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 BUS"
|
||||
default n
|
||||
|
||||
config BSP_SPI1_TX_USING_DMA
|
||||
bool "Enable SPI1 TX DMA"
|
||||
depends on BSP_USING_SPI1
|
||||
default n
|
||||
|
||||
config BSP_SPI1_RX_USING_DMA
|
||||
bool "Enable SPI1 RX DMA"
|
||||
depends on BSP_USING_SPI1
|
||||
select BSP_SPI1_TX_USING_DMA
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C BUS"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS (software simulation)"
|
||||
default y
|
||||
if BSP_USING_I2C1
|
||||
comment "Notice: PB8 --> 24; PB9 --> 25"
|
||||
config BSP_I2C1_SCL_PIN
|
||||
int "i2c1 scl pin number"
|
||||
range 1 176
|
||||
default 24
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 1 176
|
||||
default 25
|
||||
endif
|
||||
endif
|
||||
|
||||
source "../libraries/HAL_Drivers/Kconfig"
|
||||
|
||||
@@ -12,6 +12,12 @@ board.c
|
||||
CubeMX_Config/Src/stm32u5xx_hal_msp.c
|
||||
''')
|
||||
|
||||
if GetDepend(['BSP_USING_KEY']):
|
||||
src += Glob('ports/drv_key.c')
|
||||
|
||||
if GetDepend(['BSP_USING_SPI_FLASH']):
|
||||
src += Glob('ports/drv_spi_flash.c')
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/CubeMX_Config/Inc']
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
||||
@@ -0,0 +1,276 @@
|
||||
/**
|
||||
* @File: flexible_button_demo.c
|
||||
* @Author: MurphyZhao
|
||||
* @Date: 2018-09-29
|
||||
*
|
||||
* Copyright (c) 2018-2019 MurphyZhao <d2014zjt@163.com>
|
||||
* https://github.com/murphyzhao
|
||||
* All rights reserved.
|
||||
* License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* Change logs:
|
||||
* Date Author Notes
|
||||
* 2018-09-29 MurphyZhao First add
|
||||
* 2019-08-02 MurphyZhao 迁移代码到 murphyzhao 仓库
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "flexible_button.h"
|
||||
#include <stdint.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
|
||||
/*The button PIN_KEY0,PIN_KEY1,PIN_KEY2 are an expansion button,which users can add according to their needs*/
|
||||
#define PIN_KEY0 GET_PIN(D,10)
|
||||
#define PIN_KEY1 GET_PIN(D,9)
|
||||
#define PIN_KEY2 GET_PIN(D,8)
|
||||
#define PIN_WK_UP GET_PIN(C,13)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
USER_BUTTON_0 = 0,
|
||||
USER_BUTTON_1,
|
||||
USER_BUTTON_2,
|
||||
USER_BUTTON_3,
|
||||
USER_BUTTON_MAX
|
||||
} user_button_t;
|
||||
|
||||
static flex_button_t user_button[USER_BUTTON_MAX];
|
||||
|
||||
static void btn_0_cb(flex_button_t *btn)
|
||||
{
|
||||
rt_kprintf("btn_0_cb\n");
|
||||
switch (btn->event)
|
||||
{
|
||||
case FLEX_BTN_PRESS_DOWN:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_DOWN]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_CLICK:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_DOUBLE_CLICK:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_START:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_SHORT_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_UP:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_SHORT_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_START:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_UP:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_HOLD]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD_UP:
|
||||
rt_kprintf("btn_0_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void btn_1_cb(flex_button_t *btn)
|
||||
{
|
||||
rt_kprintf("btn_1_cb\n");
|
||||
switch (btn->event)
|
||||
{
|
||||
case FLEX_BTN_PRESS_DOWN:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_DOWN]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_CLICK:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_DOUBLE_CLICK:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_START:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_SHORT_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_UP:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_SHORT_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_START:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_UP:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_HOLD]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD_UP:
|
||||
rt_kprintf("btn_1_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void btn_2_cb(flex_button_t *btn)
|
||||
{
|
||||
rt_kprintf("btn_2_cb\n");
|
||||
switch (btn->event)
|
||||
{
|
||||
case FLEX_BTN_PRESS_DOWN:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_DOWN]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_CLICK:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_DOUBLE_CLICK:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_START:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_SHORT_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_UP:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_SHORT_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_START:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_UP:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_HOLD]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD_UP:
|
||||
rt_kprintf("btn_2_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void btn_3_cb(flex_button_t *btn)
|
||||
{
|
||||
rt_kprintf("btn_3_cb\n");
|
||||
switch (btn->event)
|
||||
{
|
||||
case FLEX_BTN_PRESS_DOWN:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_DOWN]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_CLICK:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_DOUBLE_CLICK:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_DOUBLE_CLICK]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_START:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_SHORT_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_SHORT_UP:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_SHORT_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_START:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_START]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_UP:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_UP]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_HOLD]\n");
|
||||
break;
|
||||
case FLEX_BTN_PRESS_LONG_HOLD_UP:
|
||||
rt_kprintf("btn_3_cb [FLEX_BTN_PRESS_LONG_HOLD_UP]\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
static uint8_t button_key0_read(void)
|
||||
{
|
||||
return rt_pin_read(PIN_KEY0);
|
||||
}
|
||||
|
||||
static uint8_t button_key1_read(void)
|
||||
{
|
||||
return rt_pin_read(PIN_KEY1);
|
||||
}
|
||||
|
||||
static uint8_t button_key2_read(void)
|
||||
{
|
||||
return rt_pin_read(PIN_KEY2);
|
||||
}
|
||||
|
||||
static uint8_t button_keywkup_read(void)
|
||||
{
|
||||
return rt_pin_read(PIN_WK_UP);
|
||||
}
|
||||
|
||||
static void button_scan(void *arg)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
flex_button_scan();
|
||||
rt_thread_mdelay(20);
|
||||
}
|
||||
}
|
||||
|
||||
static void user_button_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
rt_memset(&user_button[0], 0x0, sizeof(user_button));
|
||||
|
||||
user_button[USER_BUTTON_0].usr_button_read = button_key0_read;
|
||||
user_button[USER_BUTTON_1].usr_button_read = button_key1_read;
|
||||
user_button[USER_BUTTON_2].usr_button_read = button_key2_read;
|
||||
|
||||
user_button[USER_BUTTON_3].usr_button_read = button_keywkup_read;
|
||||
user_button[USER_BUTTON_3].cb = (flex_button_response_callback)btn_3_cb;
|
||||
|
||||
rt_pin_mode(PIN_KEY0, PIN_MODE_INPUT); /* set KEY pin mode to input */
|
||||
rt_pin_mode(PIN_KEY1, PIN_MODE_INPUT); /* set KEY pin mode to input */
|
||||
rt_pin_mode(PIN_KEY2, PIN_MODE_INPUT); /* set KEY pin mode to input */
|
||||
rt_pin_mode(PIN_WK_UP, PIN_MODE_INPUT); /* set KEY pin mode to input */
|
||||
|
||||
for (i = 0; i < USER_BUTTON_MAX; i ++)
|
||||
{
|
||||
user_button[i].pressed_logic_level = 0;
|
||||
user_button[i].click_start_tick = 20;
|
||||
user_button[i].short_press_start_tick = 100;
|
||||
user_button[i].long_press_start_tick = 200;
|
||||
user_button[i].long_hold_start_tick = 300;
|
||||
|
||||
if (i == USER_BUTTON_3)
|
||||
{
|
||||
user_button[USER_BUTTON_3].pressed_logic_level = 1;
|
||||
}
|
||||
|
||||
flex_button_register(&user_button[i]);
|
||||
}
|
||||
}
|
||||
|
||||
int flex_button_main(void)
|
||||
{
|
||||
rt_thread_t tid = RT_NULL;
|
||||
|
||||
user_button_init();
|
||||
|
||||
/* Create background ticks thread */
|
||||
tid = rt_thread_create("flex_btn", button_scan, RT_NULL, 1024, 10, 10);
|
||||
if(tid != RT_NULL)
|
||||
{
|
||||
rt_thread_startup(tid);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#ifdef FINSH_USING_MSH
|
||||
INIT_APP_EXPORT(flex_button_main);
|
||||
#endif
|
||||
@@ -0,0 +1,70 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-27 zylx first version
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
#include <drv_qspi.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rthw.h>
|
||||
#include <finsh.h>
|
||||
#include <drv_spi.h>
|
||||
|
||||
#ifdef BSP_USING_SPI_FLASH
|
||||
|
||||
#include "spi_flash.h"
|
||||
#include "spi_flash_sfud.h"
|
||||
|
||||
static int rt_hw_spi_flash_init(void)
|
||||
{
|
||||
|
||||
rt_hw_spi_device_attach("spi1", "spi10", 24); // CS:PB8
|
||||
|
||||
if (RT_NULL == rt_sfud_flash_probe("W25Q128", "spi10"))
|
||||
{
|
||||
return -RT_ERROR;
|
||||
};
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
|
||||
|
||||
#if defined(RT_USING_DFS_ELMFAT) && !defined(BSP_USING_SDCARD)
|
||||
#include <dfs_fs.h>
|
||||
|
||||
#define BLK_DEV_NAME "W25Q128"
|
||||
|
||||
int mnt_init(void)
|
||||
{
|
||||
rt_thread_delay(RT_TICK_PER_SECOND);
|
||||
|
||||
if (dfs_mount(BLK_DEV_NAME, "/", "elm", 0, 0) == 0)
|
||||
{
|
||||
rt_kprintf("file system initialization done!\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
if(dfs_mkfs("elm", BLK_DEV_NAME) == 0)
|
||||
{
|
||||
if (dfs_mount(BLK_DEV_NAME, "/", "elm", 0, 0) == 0)
|
||||
{
|
||||
rt_kprintf("file system initialization done!\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("file system initialization failed!\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_ENV_EXPORT(mnt_init);
|
||||
|
||||
#endif /* defined(RT_USING_DFS_ELMFAT) && !defined(BSP_USING_SDCARD) */
|
||||
#endif /* BSP_USING_SPI_FLASH */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -17,6 +17,9 @@
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
@@ -45,7 +48,7 @@
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 256
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50000
|
||||
#define RT_VER_NUM 0x50001
|
||||
#define RT_USING_HW_ATOMIC
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
@@ -72,15 +75,22 @@
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SYSTEM_WORKQUEUE
|
||||
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
|
||||
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
@@ -228,6 +238,7 @@
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
|
||||
Reference in New Issue
Block a user