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[bsp/at32] add support usb driver (#6968)

Browse Source 
* add support usb driver

* fixed code format error
This commit is contained in:
sheltonyu
2023-02-25 10:47:04 +08:00
committed by GitHub
parent 7bf6648853
commit a5c62b9a84
75 changed files with 10709 additions and 10 deletions
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3
bsp/at32/at32f403a-start/README.md
View File

@@ -50,6 +50,7 @@ AT32F403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| WDT | 支持 | |
| RTC | 支持 | |
| FLASH | 支持 | |
| USB | 支持 | |
### IO在板级支持包中的映射情况
@@ -94,6 +95,8 @@ AT32F403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| PB9 | CAN1_TX |
| PB5 | CAN2_RX |
| PB6 | CAN2_TX |
| PA11 | USB_DM |
| PA12 | USB_DP |
## 使用说明

3
bsp/at32/at32f403a-start/SConstruct
View File

@@ -52,6 +52,9 @@ rtconfig.BSP_LIBRARY_TYPE = at32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
# include usb libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'usbd_library', 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))

5
bsp/at32/at32f403a-start/board/Kconfig
View File

@@ -26,6 +26,11 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
config BSP_USING_USBD
bool "Enable USB BUS"
select RT_USING_USB_DEVICE
default n
menuconfig BSP_USING_RTC

1
bsp/at32/at32f403a-start/board/inc/at32_msp.h
View File

@@ -19,5 +19,6 @@ void at32_msp_sdio_init(void *instance);
void at32_msp_adc_init(void *instance);
void at32_msp_hwtmr_init(void *instance);
void at32_msp_can_init(void *instance);
void at32_msp_usb_init(void *instance);
#endif /* __AT32_MSP_H__ */

66
bsp/at32/at32f403a-start/board/src/at32_msp.c
View File

@@ -317,3 +317,69 @@ void at32_msp_can_init(void *instance)
#endif
}
#endif /* BSP_USING_CAN */
#ifdef BSP_USING_USBD
void at32_msp_usb_init(void *instance)
{
usb_clk48_s clk_s;
/* default usb clock source from hick */
clk_s = USB_CLK_HICK;
/* enable usb clock */
crm_periph_clock_enable(CRM_USB_PERIPH_CLOCK, TRUE);
if(clk_s == USB_CLK_HICK)
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
/* enable the acc calibration ready interrupt */
crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
/* update the c1\c2\c3 value */
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
/* open acc calibration */
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
}
else
{
switch(system_core_clock)
{
/* 48MHz */
case 48000000:
crm_usb_clock_div_set(CRM_USB_DIV_1);
break;
/* 72MHz */
case 72000000:
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
break;
/* 96MHz */
case 96000000:
crm_usb_clock_div_set(CRM_USB_DIV_2);
break;
/* 120MHz */
case 120000000:
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
break;
/* 144MHz */
case 144000000:
crm_usb_clock_div_set(CRM_USB_DIV_3);
break;
/* 168MHz */
case 168000000:
crm_usb_clock_div_set(CRM_USB_DIV_3_5);
break;
/* 192MHz */
case 192000000:
crm_usb_clock_div_set(CRM_USB_DIV_4);
break;
default:
break;
}
}
}
#endif /* BSP_USING_USBD */

3
bsp/at32/at32f407-start/README.md
View File

@@ -51,6 +51,7 @@ AT32F407-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| RTC | 支持 | |
| FLASH | 支持 | |
| EMAC | 支持 | |
| USB | 支持 | |
### IO在板级支持包中的映射情况
@@ -102,6 +103,8 @@ AT32F407-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| PD9 | EMAC_RMII_RXD0 |
| PD10 | EMAC_RMII_RXD1 |
| PA1 | EMAC_RMII_REF_CLK |
| PA11 | USB_DM |
| PA12 | USB_DP |
## 使用说明

3
bsp/at32/at32f407-start/SConstruct
View File

@@ -52,6 +52,9 @@ rtconfig.BSP_LIBRARY_TYPE = at32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
# include usb libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'usbd_library', 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))

5
bsp/at32/at32f407-start/board/Kconfig
View File

@@ -45,6 +45,11 @@ menu "On-chip Peripheral Drivers"
endchoice
endif
config BSP_USING_USBD
bool "Enable USB BUS"
select RT_USING_USB_DEVICE
default n
menuconfig BSP_USING_RTC
bool "Enable RTC"
select RT_USING_RTC

1
bsp/at32/at32f407-start/board/inc/at32_msp.h
View File

@@ -20,5 +20,6 @@ void at32_msp_adc_init(void *instance);
void at32_msp_hwtmr_init(void *instance);
void at32_msp_can_init(void *instance);
void at32_msp_emac_init(void *instance);
void at32_msp_usb_init(void *instance);
#endif /* __AT32_MSP_H__ */

67
bsp/at32/at32f407-start/board/src/at32_msp.c
View File

@@ -358,3 +358,70 @@ void at32_msp_emac_init(void *instance)
gpio_init(GPIOD, &gpio_init_struct);
}
#endif /* BSP_USING_EMAC */
#ifdef BSP_USING_USBD
void at32_msp_usb_init(void *instance)
{
usb_clk48_s clk_s;
/* default usb clock source from hick */
clk_s = USB_CLK_HICK;
/* enable usb clock */
crm_periph_clock_enable(CRM_USB_PERIPH_CLOCK, TRUE);
if(clk_s == USB_CLK_HICK)
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
/* enable the acc calibration ready interrupt */
crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
/* update the c1\c2\c3 value */
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
/* open acc calibration */
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
}
else
{
switch(system_core_clock)
{
/* 48MHz */
case 48000000:
crm_usb_clock_div_set(CRM_USB_DIV_1);
break;
/* 72MHz */
case 72000000:
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
break;
/* 96MHz */
case 96000000:
crm_usb_clock_div_set(CRM_USB_DIV_2);
break;
/* 120MHz */
case 120000000:
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
break;
/* 144MHz */
case 144000000:
crm_usb_clock_div_set(CRM_USB_DIV_3);
break;
/* 168MHz */
case 168000000:
crm_usb_clock_div_set(CRM_USB_DIV_3_5);
break;
/* 192MHz */
case 192000000:
crm_usb_clock_div_set(CRM_USB_DIV_4);
break;
default:
break;
}
}
}
#endif /* BSP_USING_USBD */

3
bsp/at32/at32f413-start/README.md
View File

@@ -50,6 +50,7 @@ AT32F413-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| WDT | 支持 | |
| RTC | 支持 | |
| FLASH | 支持 | |
| USB | 支持 | |
### IO在板级支持包中的映射情况
@@ -94,6 +95,8 @@ AT32F413-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| PB9 | CAN1_TX |
| PB5 | CAN2_RX |
| PB6 | CAN2_TX |
| PA11 | USB_DM |
| PA12 | USB_DP |
## 使用说明

6
bsp/at32/at32f413-start/SConscript
View File

@@ -1,11 +1,11 @@
# for module compiling
from building import *
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):

3
bsp/at32/at32f413-start/SConstruct
View File

@@ -52,6 +52,9 @@ rtconfig.BSP_LIBRARY_TYPE = at32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
# include usb libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'usbd_library', 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))

5
bsp/at32/at32f413-start/board/Kconfig
View File

@@ -26,6 +26,11 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
config BSP_USING_USBD
bool "Enable USB BUS"
select RT_USING_USB_DEVICE
default n
menuconfig BSP_USING_RTC

1
bsp/at32/at32f413-start/board/inc/at32_msp.h
View File

@@ -19,5 +19,6 @@ void at32_msp_sdio_init(void *instance);
void at32_msp_adc_init(void *instance);
void at32_msp_hwtmr_init(void *instance);
void at32_msp_can_init(void *instance);
void at32_msp_usb_init(void *instance);
#endif /* __AT32_MSP_H__ */

66
bsp/at32/at32f413-start/board/src/at32_msp.c
View File

@@ -317,3 +317,69 @@ void at32_msp_can_init(void *instance)
#endif
}
#endif /* BSP_USING_CAN */
#ifdef BSP_USING_USBD
void at32_msp_usb_init(void *instance)
{
usb_clk48_s clk_s;
/* default usb clock source from hick */
clk_s = USB_CLK_HICK;
/* enable usb clock */
crm_periph_clock_enable(CRM_USB_PERIPH_CLOCK, TRUE);
if(clk_s == USB_CLK_HICK)
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
/* enable the acc calibration ready interrupt */
crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
/* update the c1\c2\c3 value */
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
/* open acc calibration */
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
}
else
{
switch(system_core_clock)
{
/* 48MHz */
case 48000000:
crm_usb_clock_div_set(CRM_USB_DIV_1);
break;
/* 72MHz */
case 72000000:
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
break;
/* 96MHz */
case 96000000:
crm_usb_clock_div_set(CRM_USB_DIV_2);
break;
/* 120MHz */
case 120000000:
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
break;
/* 144MHz */
case 144000000:
crm_usb_clock_div_set(CRM_USB_DIV_3);
break;
/* 168MHz */
case 168000000:
crm_usb_clock_div_set(CRM_USB_DIV_3_5);
break;
/* 192MHz */
case 192000000:
crm_usb_clock_div_set(CRM_USB_DIV_4);
break;
default:
break;
}
}
}
#endif /* BSP_USING_USBD */

3
bsp/at32/at32f415-start/README.md
View File

@@ -50,6 +50,7 @@ AT32F415-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| WDT | 支持 | |
| RTC | 支持 | |
| FLASH | 支持 | |
| USB | 支持 | |
### IO在板级支持包中的映射情况
@@ -92,6 +93,8 @@ AT32F415-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| PC5 | ADC1_IN15 |
| PB8 | CAN1_RX |
| PB9 | CAN1_TX |
| PA11 | USB_DM |
| PA12 | USB_DP |
## 使用说明

3
bsp/at32/at32f415-start/SConstruct
View File

@@ -52,6 +52,9 @@ rtconfig.BSP_LIBRARY_TYPE = at32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
# include usb libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'usbfs_library', 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))

20
bsp/at32/at32f415-start/board/Kconfig
View File

@@ -26,7 +26,27 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
menuconfig BSP_USING_USBFS
bool "Enable USB BUS"
default n
if BSP_USING_USBFS
menuconfig BSP_USING_USBFS1
bool "Enable USB BUS1"
default n
if BSP_USING_USBFS1
config BSP_USING_DEVICE_USBFS1
bool "Enable USB1 Deivce"
select RT_USING_USB_DEVICE
default n
config BSP_USING_HOST_USBFS1
bool "Enable USB1 Host"
select RT_USING_USB_HOST
default n
endif
endif
menuconfig BSP_USING_RTC
bool "Enable RTC"

1
bsp/at32/at32f415-start/board/inc/at32_msp.h
View File

@@ -19,5 +19,6 @@ void at32_msp_sdio_init(void *instance);
void at32_msp_adc_init(void *instance);
void at32_msp_hwtmr_init(void *instance);
void at32_msp_can_init(void *instance);
void at32_msp_usb_init(void *instance);
#endif /* __AT32_MSP_H__ */

40
bsp/at32/at32f415-start/board/src/at32_msp.c
View File

@@ -283,3 +283,43 @@ void at32_msp_can_init(void *instance)
#endif
}
#endif /* BSP_USING_CAN */
#ifdef BSP_USING_USBFS
void at32_msp_usb_init(void *instance)
{
/* enable usb clock */
crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
switch(system_core_clock)
{
/* 48MHz */
case 48000000:
crm_usb_clock_div_set(CRM_USB_DIV_1);
break;
/* 72MHz */
case 72000000:
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
break;
/* 96MHz */
case 96000000:
crm_usb_clock_div_set(CRM_USB_DIV_2);
break;
/* 120MHz */
case 120000000:
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
break;
/* 144MHz */
case 144000000:
crm_usb_clock_div_set(CRM_USB_DIV_3);
break;
default:
break;
}
}
#endif /* BSP_USING_USBFS */

3
bsp/at32/at32f425-start/README.md
View File

@@ -49,6 +49,7 @@ AT32F425-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| WDT | 支持 | |
| RTC | 支持 | |
| FLASH | 支持 | |
| USB | 支持 | |
### IO在板级支持包中的映射情况
@@ -85,6 +86,8 @@ AT32F425-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| PC5 | ADC1_IN15 |
| PB8 | CAN1_RX |
| PB9 | CAN1_TX |
| PA11 | USB_DM |
| PA12 | USB_DP |
## 使用说明

3
bsp/at32/at32f425-start/SConstruct
View File

@@ -52,6 +52,9 @@ rtconfig.BSP_LIBRARY_TYPE = at32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
# include usb libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'usbfs_library', 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))

20
bsp/at32/at32f425-start/board/Kconfig
View File

@@ -26,7 +26,27 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
menuconfig BSP_USING_USBFS
bool "Enable USB BUS"
default n
if BSP_USING_USBFS
menuconfig BSP_USING_USBFS1
bool "Enable USB BUS1"
default n
if BSP_USING_USBFS1
config BSP_USING_DEVICE_USBFS1
bool "Enable USB1 Deivce"
select RT_USING_USB_DEVICE
default n
config BSP_USING_HOST_USBFS1
bool "Enable USB1 Host"
select RT_USING_USB_HOST
default n
endif
endif
menuconfig BSP_USING_RTC
bool "Enable RTC"

1
bsp/at32/at32f425-start/board/inc/at32_msp.h
View File

@@ -17,5 +17,6 @@ void at32_msp_tmr_init(void *instance);
void at32_msp_adc_init(void *instance);
void at32_msp_hwtmr_init(void *instance);
void at32_msp_can_init(void *instance);
void at32_msp_usb_init(void *instance);
#endif /* __AT32_MSP_H__ */

50
bsp/at32/at32f425-start/board/src/at32_msp.c
View File

@@ -247,3 +247,53 @@ void at32_msp_can_init(void *instance)
#endif
}
#endif /* BSP_USING_CAN */
#ifdef BSP_USING_USBFS
void at32_msp_usb_init(void *instance)
{
/* defalut usb clock from hext */
usb_clk48_s clk_s = USB_CLK_HICK;
crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
if(clk_s == USB_CLK_HICK)
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
/* enable the acc calibration ready interrupt */
crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
/* update the c1\c2\c3 value */
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
/* open acc calibration */
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
}
else
{
switch(system_core_clock)
{
/* 48MHz */
case 48000000:
crm_usb_clock_div_set(CRM_USB_DIV_1);
break;
/* 72MHz */
case 72000000:
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
break;
/* 96MHz */
case 96000000:
crm_usb_clock_div_set(CRM_USB_DIV_2);
break;
default:
break;
}
}
}
#endif /* BSP_USING_USBFS */

5
bsp/at32/at32f435-start/README.md
View File

@@ -52,6 +52,7 @@ AT32F437-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| RTC | 支持 | |
| FLASH | 支持 | |
| SDRAM | 支持 | |
| USB | 支持 | |
### IO在板级支持包中的映射情况
@@ -108,6 +109,10 @@ AT32F437-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| PE10 | QSPI2_IO3 |
| PG13 | QSPI2_SCK |
| PG8 | QSPI2_CS |
| PA11 | USB1_DM |
| PA12 | USB1_DP |
| PB14 | USB2_DM |
| PB15 | USB2_DP |
## 使用说明

3
bsp/at32/at32f435-start/SConstruct
View File

@@ -52,6 +52,9 @@ rtconfig.BSP_LIBRARY_TYPE = at32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
# include usb libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'usbfs_library', 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))

35
bsp/at32/at32f435-start/board/Kconfig
View File

@@ -30,7 +30,42 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
menuconfig BSP_USING_USBFS
bool "Enable USB BUS"
default n
if BSP_USING_USBFS
menuconfig BSP_USING_USBFS1
bool "Enable USB BUS1"
default n
if BSP_USING_USBFS1
config BSP_USING_DEVICE_USBFS1
bool "Enable USB1 Deivce"
select RT_USING_USB_DEVICE
default n
config BSP_USING_HOST_USBFS1
bool "Enable USB1 Host"
select RT_USING_USB_HOST
default n
endif
menuconfig BSP_USING_USBFS2
bool "Enable USB BUS2"
default n
if BSP_USING_USBFS2
config BSP_USING_DEVICE_USBFS2
bool "Enable USB2 Deivce"
select RT_USING_USB_DEVICE
default n
config BSP_USING_HOST_USBFS2
bool "Enable USB2 Host"
select RT_USING_USB_HOST
default n
endif
endif
menuconfig BSP_USING_QSPI
bool "Enable QSPI BUS"

1
bsp/at32/at32f435-start/board/inc/at32_msp.h
View File

@@ -21,5 +21,6 @@ void at32_msp_hwtmr_init(void *instance);
void at32_msp_can_init(void *instance);
void at32_msp_qspi_init(void *instance);
void at32_msp_sdram_init(void *instance);
void at32_msp_usb_init(void *instance);
#endif /* __AT32_MSP_H__ */

95
bsp/at32/at32f435-start/board/src/at32_msp.c
View File

@@ -477,3 +477,98 @@ void at32_msp_sdram_init(void *instance)
}
#endif /* BSP_USING_SDRAM */
#ifdef BSP_USING_USBFS
void at32_msp_usb_init(void *instance)
{
/* defalut usb clock from hick */
usb_clk48_s clk_s = USB_CLK_HICK;
#if defined (BSP_USING_HOST_USBFS1) || defined (BSP_USING_DEVICE_USBFS1)
crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
#endif
#if defined (BSP_USING_HOST_USBFS2) || defined (BSP_USING_DEVICE_USBFS2)
crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK, TRUE);
#endif
if(clk_s == USB_CLK_HICK)
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
/* enable the acc calibration ready interrupt */
crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
/* update the c1\c2\c3 value */
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
/* open acc calibration */
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
}
else
{
switch(system_core_clock)
{
/* 48MHz */
case 48000000:
crm_usb_clock_div_set(CRM_USB_DIV_1);
break;
/* 72MHz */
case 72000000:
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
break;
/* 96MHz */
case 96000000:
crm_usb_clock_div_set(CRM_USB_DIV_2);
break;
/* 120MHz */
case 120000000:
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
break;
/* 144MHz */
case 144000000:
crm_usb_clock_div_set(CRM_USB_DIV_3);
break;
/* 168MHz */
case 168000000:
crm_usb_clock_div_set(CRM_USB_DIV_3_5);
break;
/* 192MHz */
case 192000000:
crm_usb_clock_div_set(CRM_USB_DIV_4);
break;
/* 216MHz */
case 216000000:
crm_usb_clock_div_set(CRM_USB_DIV_4_5);
break;
/* 240MHz */
case 240000000:
crm_usb_clock_div_set(CRM_USB_DIV_5);
break;
/* 264MHz */
case 264000000:
crm_usb_clock_div_set(CRM_USB_DIV_5_5);
break;
/* 288MHz */
case 288000000:
crm_usb_clock_div_set(CRM_USB_DIV_6);
break;
default:
break;
}
}
}
#endif /* BSP_USING_USBFS */

5
bsp/at32/at32f437-start/README.md
View File

@@ -53,6 +53,7 @@ AT32F437-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| FLASH | 支持 | |
| EMAC | 支持 | |
| SDRAM | 支持 | |
| USB | 支持 | |
### IO在板级支持包中的映射情况
@@ -116,6 +117,10 @@ AT32F437-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
| PE10 | QSPI2_IO3 |
| PG13 | QSPI2_SCK |
| PG8 | QSPI2_CS |
| PA11 | USB1_DM |
| PA12 | USB1_DP |
| PB14 | USB2_DM |
| PB15 | USB2_DP |
## 使用说明

3
bsp/at32/at32f437-start/SConstruct
View File

@@ -52,6 +52,9 @@ rtconfig.BSP_LIBRARY_TYPE = at32_library
# include libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, at32_library, 'SConscript')))
# include usb libraries
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'usbfs_library', 'SConscript')))
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'rt_drivers', 'SConscript')))

35
bsp/at32/at32f437-start/board/Kconfig
View File

@@ -32,6 +32,41 @@ menu "On-chip Peripheral Drivers"
bool "Enable on-chip FLASH"
default n
menuconfig BSP_USING_USBFS
bool "Enable USB BUS"
default n
if BSP_USING_USBFS
menuconfig BSP_USING_USBFS1
bool "Enable USB BUS1"
default n
if BSP_USING_USBFS1
config BSP_USING_DEVICE_USBFS1
bool "Enable USB1 Deivce"
select RT_USING_USB_DEVICE
default n
config BSP_USING_HOST_USBFS1
bool "Enable USB1 Host"
select RT_USING_USB_HOST
default n
endif
menuconfig BSP_USING_USBFS2
bool "Enable USB BUS2"
default n
if BSP_USING_USBFS2
config BSP_USING_DEVICE_USBFS2
bool "Enable USB2 Deivce"
select RT_USING_USB_DEVICE
default n
config BSP_USING_HOST_USBFS2
bool "Enable USB2 Host"
select RT_USING_USB_HOST
default n
endif
endif
config BSP_USING_EMAC
bool "Enable Ethernet"
default n

1
bsp/at32/at32f437-start/board/inc/at32_msp.h
View File

@@ -22,5 +22,6 @@ void at32_msp_can_init(void *instance);
void at32_msp_qspi_init(void *instance);
void at32_msp_sdram_init(void *instance);
void at32_msp_emac_init(void *instance);
void at32_msp_usb_init(void *instance);
#endif /* __AT32_MSP_H__ */

95
bsp/at32/at32f437-start/board/src/at32_msp.c
View File

@@ -517,3 +517,98 @@ void at32_msp_sdram_init(void *instance)
}
#endif /* BSP_USING_SDRAM */
#ifdef BSP_USING_USBFS
void at32_msp_usb_init(void *instance)
{
/* defalut usb clock from hick */
usb_clk48_s clk_s = USB_CLK_HICK;
#if defined (BSP_USING_HOST_USBFS1) || defined (BSP_USING_DEVICE_USBFS1)
crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
#endif
#if defined (BSP_USING_HOST_USBFS2) || defined (BSP_USING_DEVICE_USBFS2)
crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK, TRUE);
#endif
if(clk_s == USB_CLK_HICK)
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
/* enable the acc calibration ready interrupt */
crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
/* update the c1\c2\c3 value */
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
/* open acc calibration */
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
}
else
{
switch(system_core_clock)
{
/* 48MHz */
case 48000000:
crm_usb_clock_div_set(CRM_USB_DIV_1);
break;
/* 72MHz */
case 72000000:
crm_usb_clock_div_set(CRM_USB_DIV_1_5);
break;
/* 96MHz */
case 96000000:
crm_usb_clock_div_set(CRM_USB_DIV_2);
break;
/* 120MHz */
case 120000000:
crm_usb_clock_div_set(CRM_USB_DIV_2_5);
break;
/* 144MHz */
case 144000000:
crm_usb_clock_div_set(CRM_USB_DIV_3);
break;
/* 168MHz */
case 168000000:
crm_usb_clock_div_set(CRM_USB_DIV_3_5);
break;
/* 192MHz */
case 192000000:
crm_usb_clock_div_set(CRM_USB_DIV_4);
break;
/* 216MHz */
case 216000000:
crm_usb_clock_div_set(CRM_USB_DIV_4_5);
break;
/* 240MHz */
case 240000000:
crm_usb_clock_div_set(CRM_USB_DIV_5);
break;
/* 264MHz */
case 264000000:
crm_usb_clock_div_set(CRM_USB_DIV_5_5);
break;
/* 288MHz */
case 288000000:
crm_usb_clock_div_set(CRM_USB_DIV_6);
break;
default:
break;
}
}
}
#endif /* BSP_USING_USBFS */

7
bsp/at32/libraries/AT32F403A_407_Firmware_Library/drivers/inc/at32f403a_407_usb.h
View File

@@ -195,15 +195,16 @@ typedef enum
#ifndef USB_EPT_MAX_NUM
#define USB_EPT_MAX_NUM 8 /*!< usb device support endpoint number */
#endif
/**
* @brief endpoint transfer type define
*/
typedef enum
{
EPT_CONTROL_TYPE = 0x00, /*!< usb transfer type control */
EPT_BULK_TYPE = 0x01, /*!< usb transfer type bulk */
EPT_INT_TYPE = 0x02, /*!< usb transfer type interrut */
EPT_ISO_TYPE = 0x03 /*!< usb transfer type iso */
EPT_ISO_TYPE = 0x01, /*!< usb transfer type iso */
EPT_BULK_TYPE = 0x02, /*!< usb transfer type bulk */
EPT_INT_TYPE = 0x03 /*!< usb transfer type interrupt */
}ept_trans_type;
/**

7
bsp/at32/libraries/AT32F413_Firmware_Library/drivers/inc/at32f413_usb.h
View File

@@ -195,15 +195,16 @@ typedef enum
#ifndef USB_EPT_MAX_NUM
#define USB_EPT_MAX_NUM 8 /*!< usb device support endpoint number */
#endif
/**
* @brief endpoint transfer type define
*/
typedef enum
{
EPT_CONTROL_TYPE = 0x00, /*!< usb transfer type control */
EPT_BULK_TYPE = 0x01, /*!< usb transfer type bulk */
EPT_INT_TYPE = 0x02, /*!< usb transfer type interrut */
EPT_ISO_TYPE = 0x03 /*!< usb transfer type iso */
EPT_ISO_TYPE = 0x01, /*!< usb transfer type iso */
EPT_BULK_TYPE = 0x02, /*!< usb transfer type bulk */
EPT_INT_TYPE = 0x03 /*!< usb transfer type interrupt */
}ept_trans_type;
/**

9
bsp/at32/libraries/rt_drivers/SConscript
View File

@@ -62,6 +62,15 @@ if GetDepend(['BSP_USING_CAN']):
if GetDepend(['BSP_USING_SDIO']):
src += ['drv_sdio.c']
if GetDepend(['BSP_USING_USBD']):
src += ['drv_usbd.c']
if GetDepend(['BSP_USING_DEVICE_USBFS1']) or GetDepend(['BSP_USING_DEVICE_USBFS2']):
src += ['drv_usbfsd.c']
if GetDepend(['BSP_USING_HOST_USBFS1']) or GetDepend(['BSP_USING_HOST_USBFS2']):
src += ['drv_usbfsh.c']
path = [cwd]
path += [cwd + '/config']

69
bsp/at32/libraries/rt_drivers/config/f403a_407/usb_config.h Normal file
View File

@@ -0,0 +1,69 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#ifndef __USB_CONFIG_H__
#define __USB_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
/* usb irqhandler */
#define USB_IRQHandler USBFS_L_CAN1_RX0_IRQHandler
/**
* @brief usb endpoint number
*/
#define USB_EPT_MAX_NUM 8
/**
* @brief auto malloc usb endpoint buffer
*/
#define USB_EPT_AUTO_MALLOC_BUFFER
#ifndef USB_EPT_AUTO_MALLOC_BUFFER
#define EPT0_TX_ADDR 0x40
#define EPT0_RX_ADDR 0x80
#define EPT1_TX_ADDR 0xC0
#define EPT1_RX_ADDR 0x100
#define EPT2_TX_ADDR 0x140
#define EPT2_RX_ADDR 0x180
#define EPT3_TX_ADDR 0x00
#define EPT3_RX_ADDR 0x00
#define EPT4_TX_ADDR 0x00
#define EPT4_RX_ADDR 0x00
#define EPT5_TX_ADDR 0x00
#define EPT5_RX_ADDR 0x00
#define EPT6_TX_ADDR 0x00
#define EPT6_RX_ADDR 0x00
#define EPT7_TX_ADDR 0x00
#define EPT7_RX_ADDR 0x00
#endif
/**
* @brief usb low power wakeup handler enable
*/
#define USB_LOW_POWER_WAKUP
#if defined(BSP_USING_USBD)
#define USBD_CONFIG \
{ \
.name = "usbd", \
.irqn = USBFS_L_CAN1_RX0_IRQn, \
}
#endif /* BSP_USING_USBD */
#ifdef __cplusplus
}
#endif
#endif

69
bsp/at32/libraries/rt_drivers/config/f413/usb_config.h Normal file
View File

@@ -0,0 +1,69 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#ifndef __USB_CONFIG_H__
#define __USB_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
/* usb irqhandler */
#define USB_IRQHandler USBFS_L_CAN1_RX0_IRQHandler
/**
* @brief usb endpoint number
*/
#define USB_EPT_MAX_NUM 8
/**
* @brief auto malloc usb endpoint buffer
*/
#define USB_EPT_AUTO_MALLOC_BUFFER
#ifndef USB_EPT_AUTO_MALLOC_BUFFER
#define EPT0_TX_ADDR 0x40
#define EPT0_RX_ADDR 0x80
#define EPT1_TX_ADDR 0xC0
#define EPT1_RX_ADDR 0x100
#define EPT2_TX_ADDR 0x140
#define EPT2_RX_ADDR 0x180
#define EPT3_TX_ADDR 0x00
#define EPT3_RX_ADDR 0x00
#define EPT4_TX_ADDR 0x00
#define EPT4_RX_ADDR 0x00
#define EPT5_TX_ADDR 0x00
#define EPT5_RX_ADDR 0x00
#define EPT6_TX_ADDR 0x00
#define EPT6_RX_ADDR 0x00
#define EPT7_TX_ADDR 0x00
#define EPT7_RX_ADDR 0x00
#endif
/**
* @brief usb low power wakeup handler enable
*/
#define USB_LOW_POWER_WAKUP
#if defined(BSP_USING_USBD)
#define USBD_CONFIG \
{ \
.name = "usbd", \
.irqn = USBFS_L_CAN1_RX0_IRQn, \
}
#endif /* BSP_USING_USBD */
#ifdef __cplusplus
}
#endif
#endif

95
bsp/at32/libraries/rt_drivers/config/f415/usb_config.h Normal file
View File

@@ -0,0 +1,95 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#ifndef __USB_CONFIG_H__
#define __USB_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#if defined BSP_USING_DEVICE_USBFS1
#define USE_OTG_DEVICE_MODE
#endif
#if defined BSP_USING_HOST_USBFS1
#define USE_OTG_HOST_MODE
#endif
/* usbfs irqhandler */
#define OTGFS1_IRQHandler OTGFS1_IRQHandler
/**
* @brief usb device mode config
*/
#define USB_EPT_MAX_NUM 4
/* otg1 device fifo */
#define USBD_RX_SIZE 128
#define USBD_EP0_TX_SIZE 24
#define USBD_EP1_TX_SIZE 20
#define USBD_EP2_TX_SIZE 20
#define USBD_EP3_TX_SIZE 20
#define USBD_EP4_TX_SIZE 20
#define USBD_EP5_TX_SIZE 20
#define USBD_EP6_TX_SIZE 20
#define USBD_EP7_TX_SIZE 20
/**
* @brief usb host mode config
*/
#define USB_HOST_CHANNEL_NUM 8
/* otg1 host fifo */
#define USBH_RX_FIFO_SIZE 128
#define USBH_NP_TX_FIFO_SIZE 96
#define USBH_P_TX_FIFO_SIZE 96
/**
* @brief usb sof output enable
*/
// #define USB_SOF_OUTPUT_ENABLE
/**
* @brief usb vbus ignore, not use vbus pin
*/
#define USB_VBUS_IGNORE
/**
* @brief usb low power wakeup handler enable
*/
// #define USB_LOW_POWER_WAKUP
#if defined(BSP_USING_HOST_USBFS1)
#undef BSP_USING_DEVICE_USBFS1
#define USBFS1_CONFIG \
{ \
.name = "usbh", \
.id = USB_OTG1_ID, \
.irqn = OTGFS1_IRQn, \
}
#endif /* BSP_USING_HOST_USBFS1 */
#if defined(BSP_USING_DEVICE_USBFS1)
#define USBFS1_CONFIG \
{ \
.name = "usbd", \
.id = USB_OTG1_ID, \
.irqn = OTGFS1_IRQn, \
}
#endif /* BSP_USING_DEVICE_USBFS1 */
#ifdef __cplusplus
}
#endif
#endif

95
bsp/at32/libraries/rt_drivers/config/f425/usb_config.h Normal file
View File

@@ -0,0 +1,95 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#ifndef __USB_CONFIG_H__
#define __USB_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#if defined BSP_USING_DEVICE_USBFS1
#define USE_OTG_DEVICE_MODE
#endif
#if defined BSP_USING_HOST_USBFS1
#define USE_OTG_HOST_MODE
#endif
/* usbfs irqhandler */
#define OTGFS1_IRQHandler OTGFS1_IRQHandler
/**
* @brief usb device mode config
*/
#define USB_EPT_MAX_NUM 8
/* otg1 device fifo */
#define USBD_RX_SIZE 128
#define USBD_EP0_TX_SIZE 24
#define USBD_EP1_TX_SIZE 20
#define USBD_EP2_TX_SIZE 20
#define USBD_EP3_TX_SIZE 20
#define USBD_EP4_TX_SIZE 20
#define USBD_EP5_TX_SIZE 20
#define USBD_EP6_TX_SIZE 20
#define USBD_EP7_TX_SIZE 20
/**
* @brief usb host mode config
*/
#define USB_HOST_CHANNEL_NUM 16
/* otg1 host fifo */
#define USBH_RX_FIFO_SIZE 128
#define USBH_NP_TX_FIFO_SIZE 96
#define USBH_P_TX_FIFO_SIZE 96
/**
* @brief usb sof output enable
*/
// #define USB_SOF_OUTPUT_ENABLE
/**
* @brief usb vbus ignore, not use vbus pin
*/
#define USB_VBUS_IGNORE
/**
* @brief usb low power wakeup handler enable
*/
// #define USB_LOW_POWER_WAKUP
#if defined(BSP_USING_HOST_USBFS1)
#undef BSP_USING_DEVICE_USBFS1
#define USBFS1_CONFIG \
{ \
.name = "usbh", \
.id = USB_OTG1_ID, \
.irqn = OTGFS1_IRQn, \
}
#endif /* BSP_USING_HOST_USBFS1 */
#if defined(BSP_USING_DEVICE_USBFS1)
#define USBFS1_CONFIG \
{ \
.name = "usbd", \
.id = USB_OTG1_ID, \
.irqn = OTGFS1_IRQn, \
}
#endif /* BSP_USING_DEVICE_USBFS1 */
#ifdef __cplusplus
}
#endif
#endif

135
bsp/at32/libraries/rt_drivers/config/f435_437/usb_config.h Normal file
View File

@@ -0,0 +1,135 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#ifndef __USB_CONFIG_H__
#define __USB_CONFIG_H__
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
#if defined BSP_USING_DEVICE_USBFS1 || defined BSP_USING_DEVICE_USBFS2
#define USE_OTG_DEVICE_MODE
#endif
#if defined BSP_USING_HOST_USBFS1 || defined BSP_USING_HOST_USBFS2
#define USE_OTG_HOST_MODE
#endif
/* usbfs irqhandler */
#define OTGFS1_IRQHandler OTGFS1_IRQHandler
#define OTGFS2_IRQHandler OTGFS2_IRQHandler
/**
* @brief usb device mode config
*/
#define USB_EPT_MAX_NUM 8
/* otg1 device fifo */
#define USBD_RX_SIZE 128
#define USBD_EP0_TX_SIZE 24
#define USBD_EP1_TX_SIZE 20
#define USBD_EP2_TX_SIZE 20
#define USBD_EP3_TX_SIZE 20
#define USBD_EP4_TX_SIZE 20
#define USBD_EP5_TX_SIZE 20
#define USBD_EP6_TX_SIZE 20
#define USBD_EP7_TX_SIZE 20
/* otg2 device fifo */
#define USBD2_RX_SIZE 128
#define USBD2_EP0_TX_SIZE 24
#define USBD2_EP1_TX_SIZE 20
#define USBD2_EP2_TX_SIZE 20
#define USBD2_EP3_TX_SIZE 20
#define USBD2_EP4_TX_SIZE 20
#define USBD2_EP5_TX_SIZE 20
#define USBD2_EP6_TX_SIZE 20
#define USBD2_EP7_TX_SIZE 20
/**
* @brief usb host mode config
*/
#define USB_HOST_CHANNEL_NUM 16
/* otg1 host fifo */
#define USBH_RX_FIFO_SIZE 128
#define USBH_NP_TX_FIFO_SIZE 96
#define USBH_P_TX_FIFO_SIZE 96
/* otg2 host fifo */
#define USBH2_RX_FIFO_SIZE 128
#define USBH2_NP_TX_FIFO_SIZE 96
#define USBH2_P_TX_FIFO_SIZE 96
/**
* @brief usb sof output enable
*/
// #define USB_SOF_OUTPUT_ENABLE
/**
* @brief usb vbus ignore, not use vbus pin
*/
#define USB_VBUS_IGNORE
/**
* @brief usb low power wakeup handler enable
*/
// #define USB_LOW_POWER_WAKUP
#if defined(BSP_USING_HOST_USBFS1)
#undef BSP_USING_HOST_USBFS2
#undef BSP_USING_DEVICE_USBFS1
#define USBFS1_CONFIG \
{ \
.name = "usbh1", \
.id = USB_OTG1_ID, \
.irqn = OTGFS1_IRQn, \
}
#endif /* BSP_USING_HOST_USBFS1 */
#if defined(BSP_USING_DEVICE_USBFS1)
#undef BSP_USING_DEVICE_USBFS2
#define USBFS1_CONFIG \
{ \
.name = "usbd", \
.id = USB_OTG1_ID, \
.irqn = OTGFS1_IRQn, \
}
#endif /* BSP_USING_DEVICE_USBFS1 */
#if defined(BSP_USING_HOST_USBFS2)
#undef BSP_USING_HOST_USBFS1
#undef BSP_USING_DEVICE_USBFS2
#define USBFS2_CONFIG \
{ \
.name = "usbh2", \
.id = USB_OTG2_ID, \
.irqn = OTGFS2_IRQn, \
}
#endif /* BSP_USING_HOST_USBFS2 */
#if defined(BSP_USING_DEVICE_USBFS2)
#undef BSP_USING_DEVICE_USBFS1
#define USBFS2_CONFIG \
{ \
.name = "usbd", \
.id = USB_OTG2_ID, \
.irqn = OTGFS2_IRQn, \
}
#endif /* BSP_USING_DEVICE_USBFS2 */
#ifdef __cplusplus
}
#endif
#endif

7
bsp/at32/libraries/rt_drivers/drv_config.h
View File

@@ -12,8 +12,8 @@
#ifndef __DRV_CONFIG_H__
#define __DRV_CONFIG_H__
#include <board.h>
#include <rtthread.h>
#include "drv_common.h"
#ifdef __cplusplus
extern "C" {
@@ -23,14 +23,17 @@ extern "C" {
#include "f403a_407/dma_config.h"
#include "f403a_407/uart_config.h"
#include "f403a_407/spi_config.h"
#include "f403a_407/usb_config.h"
#elif defined(SOC_SERIES_AT32F413)
#include "f413/dma_config.h"
#include "f413/uart_config.h"
#include "f413/spi_config.h"
#include "f413/usb_config.h"
#elif defined(SOC_SERIES_AT32F415)
#include "f415/dma_config.h"
#include "f415/uart_config.h"
#include "f415/spi_config.h"
#include "f415/usb_config.h"
#elif defined(SOC_SERIES_AT32F421)
#include "f421/dma_config.h"
#include "f421/uart_config.h"
@@ -39,10 +42,12 @@ extern "C" {
#include "f425/dma_config.h"
#include "f425/uart_config.h"
#include "f425/spi_config.h"
#include "f425/usb_config.h"
#elif defined(SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437)
#include "f435_437/dma_config.h"
#include "f435_437/uart_config.h"
#include "f435_437/spi_config.h"
#include "f435_437/usb_config.h"
#endif
#ifdef __cplusplus

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "usbd_int.h"
#include "drv_common.h"
#include "drv_usbd.h"
#include "drv_config.h"
#if defined(BSP_USING_USBD)
static struct at32_usbd *p_usbd_instance = NULL;
static struct ep_id endpoint_pool[] =
{
{0x0, USB_EP_ATTR_CONTROL, USB_DIR_INOUT, 64, ID_ASSIGNED },
{0x1, USB_EP_ATTR_BULK, USB_DIR_IN, 64, ID_UNASSIGNED},
{0x1, USB_EP_ATTR_BULK, USB_DIR_OUT, 64, ID_UNASSIGNED},
{0x2, USB_EP_ATTR_INT, USB_DIR_IN, 64, ID_UNASSIGNED},
{0x2, USB_EP_ATTR_INT, USB_DIR_OUT, 64, ID_UNASSIGNED},
{0x3, USB_EP_ATTR_ISOC, USB_DIR_IN, 64, ID_UNASSIGNED},
{0x3, USB_EP_ATTR_ISOC, USB_DIR_OUT, 64, ID_UNASSIGNED},
{0xFF, USB_EP_ATTR_TYPE_MASK, USB_DIR_MASK, 0, ID_ASSIGNED },
};
enum
{
#ifdef BSP_USING_USBD
USBD1_INDEX,
#endif
};
static struct at32_usbd usbd_config[] = {
#ifdef BSP_USING_USBD
USBD_CONFIG,
#endif
};
void USB_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
usbd_irq_handler(p_usbd_instance->p_usbd_core);
/* leave interrupt */
rt_interrupt_leave();
}
void usbd_reset_callback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_reset_handler(udcd);
}
void usbd_connectCallback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_connect_handler(udcd);
}
void usbd_disconnectCallback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_disconnect_handler(udcd);
}
void usbd_setup_phase_done_callback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_ep0_setup_handler(udcd, (struct urequest*)udev->setup_buffer);
}
void usbd_data_in_stage_callback(usbd_core_type *udev, uint32_t ept_num)
{
udcd_t udcd = (udcd_t)udev->pdata;
if (ept_num == 0)
{
rt_usbd_ep0_in_handler(udcd);
}
else
{
rt_usbd_ep_in_handler(udcd, 0x80 | ept_num, udev->ept_in[ept_num].trans_len);
}
}
void usbd_sof_callback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_sof_handler(udcd);
}
void usbd_data_out_stage_callback(usbd_core_type *udev, uint32_t ept_num)
{
udcd_t udcd = (udcd_t)udev->pdata;
if (ept_num != 0)
{
rt_usbd_ep_out_handler(udcd, ept_num, udev->ept_out[ept_num].trans_len);
}
else
{
rt_usbd_ep0_out_handler(udcd, udev->ept_out[0].trans_len);
}
}
static rt_err_t _ep_set_stall(rt_uint8_t address)
{
usbd_set_stall(p_usbd_instance->p_usbd_core, address);
return RT_EOK;
}
static rt_err_t _ep_clear_stall(rt_uint8_t address)
{
usbd_clear_stall(p_usbd_instance->p_usbd_core, address);
return RT_EOK;
}
static rt_err_t _set_address(rt_uint8_t address)
{
usbd_set_device_addr(p_usbd_instance->p_usbd_core, address);
return RT_EOK;
}
static rt_err_t _set_config(rt_uint8_t address)
{
return RT_EOK;
}
static rt_err_t _ep_enable(uep_t ep)
{
RT_ASSERT(ep != RT_NULL);
RT_ASSERT(ep->ep_desc != RT_NULL);
usbd_ept_open(p_usbd_instance->p_usbd_core, ep->ep_desc->bEndpointAddress, ep->ep_desc->bmAttributes, ep->ep_desc->wMaxPacketSize);
return RT_EOK;
}
static rt_err_t _ep_disable(uep_t ep)
{
RT_ASSERT(ep != RT_NULL);
RT_ASSERT(ep->ep_desc != RT_NULL);
usbd_ept_close(p_usbd_instance->p_usbd_core, ep->ep_desc->bEndpointAddress);
return RT_EOK;
}
static rt_size_t _ep_read(rt_uint8_t address, void *buffer)
{
rt_size_t size = 0;
RT_ASSERT(buffer != RT_NULL);
return size;
}
static rt_size_t _ep_read_prepare(rt_uint8_t address, void *buffer, rt_size_t size)
{
usbd_ept_recv(p_usbd_instance->p_usbd_core, address, buffer, size);
return size;
}
static rt_size_t _ep_write(rt_uint8_t address, void *buffer, rt_size_t size)
{
usbd_ept_send(p_usbd_instance->p_usbd_core, address, buffer, size);
return size;
}
static rt_err_t _ep0_send_status(void)
{
usbd_ctrl_send_status(p_usbd_instance->p_usbd_core);
return RT_EOK;
}
static rt_err_t _suspend(void)
{
return RT_EOK;
}
static rt_err_t _wakeup(void)
{
return RT_EOK;
}
static rt_err_t at32_dcd_init(rt_device_t device)
{
/* usb gpio config */
at32_msp_usb_init(device);
/* enable usb interrupt */
nvic_irq_enable(p_usbd_instance->irqn, 2, 0);
/* usb core init */
usbd_core_init(p_usbd_instance->p_usbd_core, USB, 0);
/* enable usb pull-up */
usbd_connect(p_usbd_instance->p_usbd_core);
return RT_EOK;
}
const static struct udcd_ops _udc_ops =
{
_set_address,
_set_config,
_ep_set_stall,
_ep_clear_stall,
_ep_enable,
_ep_disable,
_ep_read_prepare,
_ep_read,
_ep_write,
_ep0_send_status,
_suspend,
_wakeup,
};
int at32_usbd_register(void)
{
rt_size_t obj_num;
rt_err_t result = 0;
int index;
obj_num = sizeof(usbd_config) / sizeof(struct at32_usbd);
for (index = 0; index < obj_num; index++) {
udcd_t udcd = (udcd_t)rt_malloc(sizeof(struct udcd));
if (udcd == RT_NULL)
{
rt_kprintf("udcd malloc failed\r\n");
return -RT_ERROR;
}
rt_memset((void *)udcd, 0, sizeof(struct udcd));
usbd_core_type *p_usbd_core = (usbd_core_type *)rt_malloc(sizeof(usbd_core_type));
if (p_usbd_core == RT_NULL)
{
rt_kprintf("usbd_core malloc failed\r\n");
return -RT_ERROR;
}
rt_memset((void *)p_usbd_core, 0, sizeof(usbd_core_type));
udcd->parent.type = RT_Device_Class_USBDevice;
udcd->parent.init = at32_dcd_init;
udcd->parent.user_data = p_usbd_core;
udcd->ops = &_udc_ops;
p_usbd_core->pdata = udcd;
usbd_config[index].p_usbd_core = p_usbd_core;
/* register endpoint infomation */
udcd->ep_pool = endpoint_pool;
udcd->ep0.id = &endpoint_pool[0];
result = rt_device_register((rt_device_t)udcd, usbd_config[index].name, 0);
RT_ASSERT(result == RT_EOK);
p_usbd_instance = &usbd_config[index];
result = rt_usb_device_init();
RT_ASSERT(result == RT_EOK);
}
return result;
}
INIT_DEVICE_EXPORT(at32_usbd_register);
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 shelton first version
*/
#ifndef __DRV_USBD_H__
#define __DRV_USBD_H__
#include <rtthread.h>
#include <rtdevice.h>
#include "drv_common.h"
#include "usbd_core.h"
struct at32_usbd {
char *name;
usbd_core_type *p_usbd_core;
IRQn_Type irqn;
};
#endif /* __DRV_USBD_H__ */
/******************* end of file *******************/

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 shelton first version
*/
#ifndef __DRV_USBFS_H__
#define __DRV_USBFS_H__
#include <rtthread.h>
#include <rtdevice.h>
#include "drv_common.h"
#include "usb_core.h"
struct at32_usbfs {
char *name;
otg_core_type *p_otg_core;
otg_id_type id;
IRQn_Type irqn;
};
#endif /* __DRV_USBFS_H__ */
/******************* end of file *******************/

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "usbd_int.h"
#include "drv_common.h"
#include "drv_usbfs.h"
#include "drv_config.h"
#if defined(BSP_USING_DEVICE_USBFS1) || defined(BSP_USING_DEVICE_USBFS2)
static struct at32_usbfs *p_usbfs_instance = NULL;
static struct ep_id endpoint_pool[] =
{
{0x0, USB_EP_ATTR_CONTROL, USB_DIR_INOUT, 64, ID_ASSIGNED },
{0x1, USB_EP_ATTR_BULK, USB_DIR_IN, 64, ID_UNASSIGNED},
{0x1, USB_EP_ATTR_BULK, USB_DIR_OUT, 64, ID_UNASSIGNED},
{0x2, USB_EP_ATTR_INT, USB_DIR_IN, 64, ID_UNASSIGNED},
{0x2, USB_EP_ATTR_INT, USB_DIR_OUT, 64, ID_UNASSIGNED},
{0x3, USB_EP_ATTR_ISOC, USB_DIR_IN, 64, ID_UNASSIGNED},
{0x3, USB_EP_ATTR_ISOC, USB_DIR_OUT, 64, ID_UNASSIGNED},
{0xFF, USB_EP_ATTR_TYPE_MASK, USB_DIR_MASK, 0, ID_ASSIGNED },
};
enum
{
#ifdef BSP_USING_DEVICE_USBFS1
USBFS1_INDEX,
#endif
#ifdef BSP_USING_DEVICE_USBFS2
USBFS2_INDEX,
#endif
};
static struct at32_usbfs usbfsd_config[] = {
#ifdef BSP_USING_DEVICE_USBFS1
USBFS1_CONFIG,
#endif
#ifdef BSP_USING_DEVICE_USBFS2
USBFS2_CONFIG,
#endif
};
#ifdef BSP_USING_DEVICE_USBFS1
void OTGFS1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
usbd_irq_handler(p_usbfs_instance->p_otg_core);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_DEVICE_USBFS2
void OTGFS2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
usbd_irq_handler(p_usbfs_instance->p_otg_core);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
void usbd_reset_callback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_reset_handler(udcd);
}
void usbd_connectCallback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_connect_handler(udcd);
}
void usbd_disconnectCallback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_disconnect_handler(udcd);
}
void usbd_setup_phase_done_callback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_ep0_setup_handler(udcd, (struct urequest*)udev->setup_buffer);
}
void usbd_data_in_stage_callback(usbd_core_type *udev, uint32_t ept_num)
{
udcd_t udcd = (udcd_t)udev->pdata;
if (ept_num == 0)
{
rt_usbd_ep0_in_handler(udcd);
}
else
{
rt_usbd_ep_in_handler(udcd, 0x80 | ept_num, udev->ept_in[ept_num].trans_len);
}
}
void usbd_sof_callback(usbd_core_type *udev)
{
udcd_t udcd = (udcd_t)udev->pdata;
rt_usbd_sof_handler(udcd);
}
void usbd_data_out_stage_callback(usbd_core_type *udev, uint32_t ept_num)
{
udcd_t udcd = (udcd_t)udev->pdata;
if (ept_num != 0)
{
rt_usbd_ep_out_handler(udcd, ept_num, udev->ept_out[ept_num].trans_len);
}
else
{
rt_usbd_ep0_out_handler(udcd, udev->ept_out[0].trans_len);
}
}
static rt_err_t _ep_set_stall(rt_uint8_t address)
{
usbd_set_stall(&p_usbfs_instance->p_otg_core->dev, address);
return RT_EOK;
}
static rt_err_t _ep_clear_stall(rt_uint8_t address)
{
usbd_clear_stall(&p_usbfs_instance->p_otg_core->dev, address);
return RT_EOK;
}
static rt_err_t _set_address(rt_uint8_t address)
{
usbd_set_device_addr(&p_usbfs_instance->p_otg_core->dev, address);
return RT_EOK;
}
static rt_err_t _set_config(rt_uint8_t address)
{
return RT_EOK;
}
static rt_err_t _ep_enable(uep_t ep)
{
RT_ASSERT(ep != RT_NULL);
RT_ASSERT(ep->ep_desc != RT_NULL);
usbd_ept_open(&p_usbfs_instance->p_otg_core->dev, ep->ep_desc->bEndpointAddress, \
ep->ep_desc->bmAttributes, ep->ep_desc->wMaxPacketSize);
return RT_EOK;
}
static rt_err_t _ep_disable(uep_t ep)
{
RT_ASSERT(ep != RT_NULL);
RT_ASSERT(ep->ep_desc != RT_NULL);
usbd_ept_close(&p_usbfs_instance->p_otg_core->dev, ep->ep_desc->bEndpointAddress);
return RT_EOK;
}
static rt_size_t _ep_read(rt_uint8_t address, void *buffer)
{
rt_size_t size = 0;
RT_ASSERT(buffer != RT_NULL);
return size;
}
static rt_size_t _ep_read_prepare(rt_uint8_t address, void *buffer, rt_size_t size)
{
usbd_ept_recv(&p_usbfs_instance->p_otg_core->dev, address, buffer, size);
return size;
}
static rt_size_t _ep_write(rt_uint8_t address, void *buffer, rt_size_t size)
{
usbd_ept_send(&p_usbfs_instance->p_otg_core->dev, address, buffer, size);
return size;
}
static rt_err_t _ep0_send_status(void)
{
usbd_ept_send(&p_usbfs_instance->p_otg_core->dev, 0x00, NULL, 0);
return RT_EOK;
}
static rt_err_t _suspend(void)
{
return RT_EOK;
}
static rt_err_t _wakeup(void)
{
return RT_EOK;
}
static rt_err_t at32_dcd_init(rt_device_t device)
{
/* usb gpio config */
at32_msp_usb_init(device);
/* enable otgfs irq */
nvic_irq_enable(p_usbfs_instance->irqn, 2, 0);
/* init usb */
p_usbfs_instance->p_otg_core->usb_reg = usb_global_select_core(p_usbfs_instance->id);
/* usb device core config */
usb_core_config(p_usbfs_instance->p_otg_core, USB_FULL_SPEED_CORE_ID);
if(p_usbfs_instance->p_otg_core->cfg.sof_out)
{
p_usbfs_instance->p_otg_core->usb_reg->gccfg_bit.sofouten = TRUE;
}
if(p_usbfs_instance->p_otg_core->cfg.vbusig)
{
p_usbfs_instance->p_otg_core->usb_reg->gccfg_bit.vbusig = TRUE;
}
/* usb device core init */
usbd_core_init(&(p_usbfs_instance->p_otg_core->dev), p_usbfs_instance->p_otg_core->usb_reg,
USB_FULL_SPEED_CORE_ID);
return RT_EOK;
}
const static struct udcd_ops _udc_ops =
{
_set_address,
_set_config,
_ep_set_stall,
_ep_clear_stall,
_ep_enable,
_ep_disable,
_ep_read_prepare,
_ep_read,
_ep_write,
_ep0_send_status,
_suspend,
_wakeup,
};
int at32_usbd_register(void)
{
rt_size_t obj_num;
rt_err_t result = 0;
int index;
obj_num = sizeof(usbfsd_config) / sizeof(struct at32_usbfs);
for (index = 0; index < obj_num; index++) {
udcd_t udcd = (udcd_t)rt_malloc(sizeof(struct udcd));
if (udcd == RT_NULL)
{
rt_kprintf("uhcd malloc failed\r\n");
return -RT_ERROR;
}
rt_memset((void *)udcd, 0, sizeof(struct udcd));
otg_core_type *p_otg_core = (otg_core_type *)rt_malloc(sizeof(otg_core_type));
if (p_otg_core == RT_NULL)
{
rt_kprintf("otg_core malloc failed\r\n");
return -RT_ERROR;
}
rt_memset((void *)p_otg_core, 0, sizeof(otg_core_type));
udcd->parent.type = RT_Device_Class_USBDevice;
udcd->parent.init = at32_dcd_init;
udcd->parent.user_data = &(p_otg_core->dev);
udcd->ops = &_udc_ops;
p_otg_core->dev.pdata = udcd;
usbfsd_config[index].p_otg_core = p_otg_core;
/* register endpoint infomation */
udcd->ep_pool = endpoint_pool;
udcd->ep0.id = &endpoint_pool[0];
result = rt_device_register((rt_device_t)udcd, usbfsd_config[index].name, 0);
RT_ASSERT(result == RT_EOK);
p_usbfs_instance = &usbfsd_config[index];
result = rt_usb_device_init();
RT_ASSERT(result == RT_EOK);
}
return result;
}
INIT_DEVICE_EXPORT(at32_usbd_register);
#endif

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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-02-28 leo first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include "usbh_int.h"
#include "drv_common.h"
#include "drv_usbfs.h"
#include "drv_config.h"
#if defined(BSP_USING_HOST_USBFS1) || defined(BSP_USING_HOST_USBFS2)
//#define DRV_DEBUG
#define LOG_TAG "drv.usb"
#include <drv_log.h>
static struct rt_completion urb_completion;
static volatile rt_bool_t connect_status = RT_FALSE;
static struct at32_usbfs *p_usbfs_instance = NULL;
enum
{
#ifdef BSP_USING_HOST_USBFS1
USBFS1_INDEX,
#endif
#ifdef BSP_USING_HOST_USBFS2
USBFS2_INDEX,
#endif
};
static struct at32_usbfs usbfsh_config[] = {
#ifdef BSP_USING_HOST_USBFS1
USBFS1_CONFIG,
#endif
#ifdef BSP_USING_HOST_USBFS2
USBFS2_CONFIG,
#endif
};
#ifdef BSP_USING_HOST_USBFS1
void OTGFS1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
usbh_irq_handler(p_usbfs_instance->p_otg_core);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_HOST_USBFS2
void OTGFS2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
usbh_irq_handler(p_usbfs_instance->p_otg_core);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
void usbh_connect_callback(usbh_core_type *uhost)
{
uhcd_t hcd = (uhcd_t)uhost->pdata;
if (!connect_status)
{
connect_status = RT_TRUE;
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb connected\n"));
rt_usbh_root_hub_connect_handler(hcd, 1, RT_FALSE);
}
}
void usbh_disconnect_callback(usbh_core_type *uhost)
{
uhcd_t hcd = (uhcd_t)uhost->pdata;
if (connect_status)
{
connect_status = RT_FALSE;
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnnect\n"));
rt_usbh_root_hub_disconnect_handler(hcd, 1);
}
}
void usbd_notify_urbchange_callback(usbh_core_type *uhost, uint8_t chnum, urb_sts_type sts)
{
rt_completion_done(&urb_completion);
}
static rt_err_t drv_reset_port(rt_uint8_t port)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("reset port\n"));
usbh_reset_port(&p_usbfs_instance->p_otg_core->host);
return RT_EOK;
}
static int drv_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes, int timeouts)
{
int timeout = timeouts;
while(1)
{
if(!connect_status)
{
return -1;
}
rt_completion_init(&urb_completion);
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].dir = (pipe->ep.bEndpointAddress & 0x80) >> 7;
if(token == 0U)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_SETUP;
}
else
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA1;
}
/* endpoint type */
switch(pipe->ep.bmAttributes)
{
/* endpoint is control type */
case EPT_CONTROL_TYPE:
if((token == 1U) && (((pipe->ep.bEndpointAddress & 0x80) >> 7) == 0U))
{
if(nbytes == 0U)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].toggle_out = 1U;
}
if((&p_usbfs_instance->p_otg_core->host)->hch[pipe->pipe_index].toggle_out == 0U)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA0;
}
else
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA1;
}
}
break;
/* endpoint is bulk type */
case EPT_BULK_TYPE:
if(((pipe->ep.bEndpointAddress & 0x80) >> 7) == 0U)
{
if( p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].toggle_out == 0U)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA0;
}
else
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA1;
}
}
else
{
if( p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].toggle_in == 0U)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA0;
}
else
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA1;
}
}
break;
/* endpoint is int type */
case EPT_INT_TYPE:
if(((pipe->ep.bEndpointAddress & 0x80) >> 7) == 0U)
{
if( p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].toggle_out == 0U)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA0;
}
else
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA1;
}
}
else
{
if( p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].toggle_in == 0U)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA0;
}
else
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA1;
}
}
break;
/* endpoint is isoc type */
case EPT_ISO_TYPE:
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].data_pid = HCH_PID_DATA0;
break;
default:
break;
}
/* set transfer buffer */
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].trans_buf = buffer;
/* set transfer len*/
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].trans_len = nbytes;
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].urb_sts = URB_IDLE;
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].ch_num = pipe->pipe_index;
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].trans_count = 0;
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].state = HCH_IDLE;
/* data in/out for host */
usbh_in_out_request((&p_usbfs_instance->p_otg_core->host), pipe->pipe_index);
rt_completion_wait(&urb_completion, timeout);
rt_thread_mdelay(1);
if(usbh_get_status((&p_usbfs_instance->p_otg_core->host), pipe->pipe_index) == HCH_NAK)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("nak\n"));
if (pipe->ep.bmAttributes == USB_EP_ATTR_INT)
{
rt_thread_delay((pipe->ep.bInterval * RT_TICK_PER_SECOND / 1000) > 0 ? (pipe->ep.bInterval * RT_TICK_PER_SECOND / 1000) : 1);
}
usb_hch_halt((&p_usbfs_instance->p_otg_core->host)->usb_reg, pipe->pipe_index);
usbh_hc_open(&p_usbfs_instance->p_otg_core->host,
pipe->pipe_index,
pipe->ep.bEndpointAddress,
pipe->inst->address,
pipe->ep.bmAttributes,
pipe->ep.wMaxPacketSize,
USB_PRTSPD_FULL_SPEED);
continue;
}
else if (usbh_get_status(&p_usbfs_instance->p_otg_core->host, pipe->pipe_index) == HCH_STALL)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("stall\n"));
pipe->status = UPIPE_STATUS_STALL;
if (pipe->callback != RT_NULL)
{
pipe->callback(pipe);
}
return -1;
}
else if (usbh_get_status(&p_usbfs_instance->p_otg_core->host, pipe->pipe_index) == URB_ERROR)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("error\n"));
pipe->status = UPIPE_STATUS_ERROR;
if (pipe->callback != RT_NULL)
{
pipe->callback(pipe);
}
return -1;
}
else if(URB_DONE == usbh_get_urb_status(&p_usbfs_instance->p_otg_core->host, pipe->pipe_index))
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("ok\n"));
pipe->status = UPIPE_STATUS_OK;
if (pipe->callback != RT_NULL)
{
pipe->callback(pipe);
}
size_t size = (&p_usbfs_instance->p_otg_core->host)->hch[pipe->pipe_index].trans_count;
if (pipe->ep.bEndpointAddress & 0x80)
{
return size;
}
else if (pipe->ep.bEndpointAddress & 0x00)
{
return size;
}
return nbytes;
}
continue;
}
}
static rt_uint16_t pipe_index = 0;
static rt_uint8_t drv_get_free_pipe_index(void)
{
rt_uint8_t idx;
for (idx = 1; idx < 16; idx++)
{
if (!(pipe_index & (0x01 << idx)))
{
pipe_index |= (0x01 << idx);
return idx;
}
}
return 0xff;
}
static void drv_free_pipe_index(rt_uint8_t index)
{
pipe_index &= ~(0x01 << index);
}
static rt_err_t drv_open_pipe(upipe_t pipe)
{
pipe->pipe_index = drv_get_free_pipe_index();
usbh_hc_open(&p_usbfs_instance->p_otg_core->host,
pipe->pipe_index,
pipe->ep.bEndpointAddress,
pipe->inst->address,
pipe->ep.bmAttributes,
pipe->ep.wMaxPacketSize,
USB_PRTSPD_FULL_SPEED);
/* set data0 pid token*/
if (p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].dir)
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].toggle_in = 0;
}
else
{
p_usbfs_instance->p_otg_core->host.hch[pipe->pipe_index].toggle_out = 0;
}
return RT_EOK;
}
static rt_err_t drv_close_pipe(upipe_t pipe)
{
usb_hch_halt((&p_usbfs_instance->p_otg_core->host)->usb_reg, pipe->pipe_index);
drv_free_pipe_index(pipe->pipe_index);
return RT_EOK;
}
static struct uhcd_ops _uhcd_ops =
{
drv_reset_port,
drv_pipe_xfer,
drv_open_pipe,
drv_close_pipe,
};
static rt_err_t at32_hcd_init(rt_device_t device)
{
/* usb gpio config */
at32_msp_usb_init(device);
/* enable otgfs irq */
nvic_irq_enable(p_usbfs_instance->irqn, 2, 0);
/* init usb */
usbh_init(p_usbfs_instance->p_otg_core,
USB_FULL_SPEED_CORE_ID,
p_usbfs_instance->id);
return RT_EOK;
}
int at32_usbh_register(void)
{
rt_size_t obj_num;
rt_err_t result = 0;
int index;
obj_num = sizeof(usbfsh_config) / sizeof(struct at32_usbfs);
for (index = 0; index < obj_num; index++) {
uhcd_t uhcd = (uhcd_t)rt_malloc(sizeof(struct uhcd));
if (uhcd == RT_NULL)
{
rt_kprintf("uhcd malloc failed\r\n");
return -RT_ERROR;
}
rt_memset((void *)uhcd, 0, sizeof(struct uhcd));
otg_core_type *p_otg_core = (otg_core_type *)rt_malloc(sizeof(otg_core_type));
if (p_otg_core == RT_NULL)
{
rt_kprintf("otg_core malloc failed\r\n");
return -RT_ERROR;
}
rt_memset((void *)p_otg_core, 0, sizeof(otg_core_type));
uhcd->parent.type = RT_Device_Class_USBHost;
uhcd->parent.init = at32_hcd_init;
uhcd->parent.user_data = &(p_otg_core->host);
uhcd->ops = &_uhcd_ops;
uhcd->num_ports = 1;
p_otg_core->host.pdata = uhcd;
usbfsh_config[index].p_otg_core = p_otg_core;
result = rt_device_register(&uhcd->parent, usbfsh_config[index].name, RT_DEVICE_FLAG_DEACTIVATE);
RT_ASSERT(result == RT_EOK);
p_usbfs_instance = &usbfsh_config[index];
result = rt_usb_host_init(usbfsh_config[index].name);
RT_ASSERT(result == RT_EOK);
}
return result;
}
INIT_DEVICE_EXPORT(at32_usbh_register);
#endif

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