[bsp] add bl808 lp core (#7069)

* Add riscv_32e support

* add bl808 lp core

* update README.md
This commit is contained in:
flyingcys
2023-03-19 23:16:12 +08:00
committed by GitHub
parent 576ddc5aa7
commit a538b26858
24 changed files with 2283 additions and 14 deletions
+1 -1
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@@ -146,7 +146,7 @@ RT-THREAD bsp company list
- 紫芯
- [asm9260t](asm9260t)
- 博流
- [bl808](bl808)
- [bouffalo_lab](bouffalo_lab) series
- 航顺
- [hk32](hk32) series
- 辉芒微
+1 -1
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@@ -116,7 +116,7 @@ Windows下推荐使用[env工具][1],在console下进入bsp/bouffalo_lab/bl61x
### 3.1. GUI方式下载
当前bsp必须使用`bouffalo_flash_cube-1.0.4](https://pan.baidu.com/s/1eG9pkxf3riAqQAu9aXiOjw?pwd=miv1)工具进行烧录,否则无法正常运行。
当前bsp必须使用[bouffalo_flash_cube-1.0.4](https://pan.baidu.com/s/1eG9pkxf3riAqQAu9aXiOjw?pwd=miv1)工具进行烧录,否则无法正常运行。
1. 连接好串口并在工具上选择对应的串口号
@@ -9,3 +9,7 @@ boot2_isp_mode = 0
[FW1]
filedir = ./m0/rtthread_m0.bin
address = 0x000000
[FW2]
filedir = ./lp/rtthread_lp.bin
address = 0xC0000
+977
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+26
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@@ -0,0 +1,26 @@
mainmenu "RT-Thread Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
config LIBRARIES_DIR
string
option env="LIBRARIES_DIR"
default "../../libraries"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "board/Kconfig"
source "$LIBRARIES_DIR/Kconfig"
+14
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@@ -0,0 +1,14 @@
# for module compiling
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
+45
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@@ -0,0 +1,45 @@
import os
import sys
import rtconfig
from rtconfig import RTT_ROOT
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
Export('RTT_ROOT')
Export('rtconfig')
SDK_ROOT = os.path.abspath('./')
if os.path.exists(SDK_ROOT + '/../libraries'):
libraries_path_prefix = SDK_ROOT + '/../libraries'
else:
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/../libraries'
SDK_LIB = libraries_path_prefix
Export('SDK_LIB')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
# include libraries
objs.extend(SConscript(libraries_path_prefix + '/bl_mcu_sdk/SConscript', variant_dir='build/libraries/bl_mcu_sdk', duplicate=0))
# include drivers
objs.extend(SConscript(libraries_path_prefix + '/rt_drivers/SConscript', variant_dir='build/libraries/rt_drivers', duplicate=0))
# make a building
DoBuilding(TARGET, objs)
+9
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@@ -0,0 +1,9 @@
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
+23
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@@ -0,0 +1,23 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022/12/25 flyingcys first version
*/
#include <rtthread.h>
#include <stdio.h>
int main(void)
{
while(1)
{
rt_kprintf("Hello, RISC-V!\n");
rt_thread_delay(5000);
}
return 0;
}
+11
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@@ -0,0 +1,11 @@
config BSP_USING_BL808
bool
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select ARCH_RISCV32
select BL808_CORE_LP
default y
config BL808_CORE_LP
bool
default y
+9
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@@ -0,0 +1,9 @@
from building import *
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp') + Glob('*.S')
CPPPATH = [cwd]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
+56
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@@ -0,0 +1,56 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023/03/15 flyingcys first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "drv_uart.h"
#define RT_HEAP_SIZE 1024
static uint32_t user_heap[RT_HEAP_SIZE]; // heap default size: 4K(1024 * 4)
/* This is the timer interrupt service routine. */
static void systick_isr(void)
{
rt_tick_increase();
}
void rt_hw_board_init(void)
{
bflb_irq_initialize();
CPU_Set_MTimer_CLK(ENABLE, CPU_Get_MTimer_Source_Clock() / 1000 / 1000 - 1);
bflb_mtimer_config(HW_MTIMER_CLOCK * 2 / RT_TICK_PER_SECOND, systick_isr);
#ifdef RT_USING_HEAP
/* initialize memory system */
rt_system_heap_init((void *)user_heap, (void *)user_heap + RT_HEAP_SIZE);
#endif
/* UART driver initialization is open by default */
#ifdef RT_USING_SERIAL
rt_hw_uart_init();
#endif
/* Set the shell console output device */
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
void rt_hw_cpu_reset(void)
{
GLB_SW_POR_Reset();
}
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine);
+37
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@@ -0,0 +1,37 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023/03/15 flyingcys first version
*/
#ifndef BOARD_H__
#define BOARD_H__
#include <rtconfig.h>
#include "bflb_uart.h"
#include "bflb_gpio.h"
#include "bflb_clock.h"
#include "bflb_rtc.h"
#include "bflb_flash.h"
#include "bl808_glb.h"
#include "bl808_psram_uhs.h"
#include "bl808_tzc_sec.h"
#include "bl808_ef_cfg.h"
#include "bl808_uhs_phy.h"
#define HW_MTIMER_CLOCK 1000000
extern uint8_t __HeapBase;
extern uint8_t __HeapLimit;
#define RT_HW_HEAP_BEGIN (void*)&__HeapBase
#define RT_HW_HEAP_END (void*)&__HeapLimit
void rt_hw_board_init(void);
#endif
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+17
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@@ -0,0 +1,17 @@
#include "cpuport.h"
.globl rt_hw_do_after_save_above
.type rt_hw_do_after_save_above,@function
rt_hw_do_after_save_above:
addi sp, sp, -4
STORE ra, 0 * REGBYTES(sp)
csrr t1, mcause
andi t1, t1, 0x3FF
/* get ISR */
la t2, interrupt_entry
jalr t2
LOAD ra, 0 * REGBYTES(sp)
addi sp, sp, 4
ret
+39
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@@ -0,0 +1,39 @@
#/bin/sh
CHIPNAME=$1
BIN_FILE=$2
set -e
SYSTEM=`uname -s`
echo "system: $SYSTEM"
CONFIG=../config
TOOL_DIR=../../libraries/bl_mcu_sdk/tools/bflb_tools/bflb_fw_post_proc
if [ $SYSTEM = "Darwin" ]
then
TOOL_NAME=bflb_fw_post_proc-macos
TOOL_ADDR=https://raw.githubusercontent.com/bouffalolab/bl_mcu_sdk/master/tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc-macos
elif [ $SYSTEM = "Linux" ]
then
TOOL_NAME=bflb_fw_post_proc-ubuntu
TOOL_ADDR=https://raw.githubusercontent.com/bouffalolab/bl_mcu_sdk/master/tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc-ubuntu
else
TOOL_NAME=bflb_fw_post_proc.exe
TOOL_ADDR=https://raw.githubusercontent.com/bouffalolab/bl_mcu_sdk/master/tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc.exe
fi
if [ -f "$TOOL_DIR/$TOOL_NAME" ]
then
echo "bflb_fw_post_proc exist"
else
echo "bflb_fw_post_proc not exist, try download... url:$TOOL_ADDR"
curl $TOOL_ADDR -o $TOOL_DIR/$TOOL_NAME
if [ $SYSTEM = "Darwin" ]; then
chmod +x $TOOL_DIR/$TOOL_NAME
elif [ $SYSTEM = "Linux" ]; then
chmod +x $TOOL_DIR/$TOOL_NAME
fi
fi
./$TOOL_DIR/$TOOL_NAME --chipname=$CHIPNAME --brdcfgdir=$CONFIG --imgfile=$BIN_FILE
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+63
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@@ -0,0 +1,63 @@
import os
# toolchains options
ARCH ='risc-v'
VENDOR ='t-head'
CPU ='e9xx'
CROSS_TOOL ='gcc'
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = r'../../../..'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.6.1/bin'
else:
print('Please make sure your toolchains is GNU GCC!')
exit(0)
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'riscv64-unknown-elf-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -march=rv32emcxtheadse -mabi=ilp32e -mtune=e902'
CFLAGS = DEVICE + ' -std=gnu99 -fno-jump-tables -fno-common -fms-extensions -ffunction-sections -fdata-sections -fmessage-length=0 -Wall -Wchar-subscripts -Wformat -Wundef -Wuninitialized -Winit-self -Wignored-qualifiers'
CFLAGS += ' -fstrict-volatile-bitfields -fshort-enums -Wno-error=unused-variable -Wno-error=format= -Wno-error=unused-function -Wno-error=implicit-function-declaration -Wno-error=deprecated-declarations -Wno-format'
LINKER_SCRIPTS = r'board/linker_scripts/bl808_flash_lp.ld'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -ufw_header -fms-extensions -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T ' + LINKER_SCRIPTS
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O2 -g3'
AFLAGS += ' -g3'
else:
CFLAGS += ' -O3'
CXXFLAGS = CFLAGS + ' -std=gnu++17 -Wno-multichar'
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread_lp.bin\n' + SIZE + ' $TARGET \n'
POST_ACTION += 'sh combine.sh bl808 ./rtthread_lp.bin\n'
+12 -1
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@@ -9,6 +9,7 @@
* 2018/12/27 Jesven Add SMP support
* 2020/11/20 BalanceTWK Add FPU support
* 2022/12/28 WangShun Add macro to distinguish whether FPU is supported
* 2023/03/19 Flyingcys Add riscv_32e support
*/
#define __ASSEMBLY__
@@ -115,7 +116,12 @@ rt_hw_context_switch:
FSTORE f31, 31 * FREGBYTES(sp)
#endif
#ifndef __riscv_32e
addi sp, sp, -32 * REGBYTES
#else
addi sp, sp, -16 * REGBYTES
#endif
STORE sp, (a0)
STORE x1, 0 * REGBYTES(sp)
@@ -140,6 +146,7 @@ save_mpie:
STORE x13, 13 * REGBYTES(sp)
STORE x14, 14 * REGBYTES(sp)
STORE x15, 15 * REGBYTES(sp)
#ifndef __riscv_32e
STORE x16, 16 * REGBYTES(sp)
STORE x17, 17 * REGBYTES(sp)
STORE x18, 18 * REGBYTES(sp)
@@ -156,7 +163,7 @@ save_mpie:
STORE x29, 29 * REGBYTES(sp)
STORE x30, 30 * REGBYTES(sp)
STORE x31, 31 * REGBYTES(sp)
#endif
/* restore to thread context
* sp(0) -> epc;
* sp(1) -> ra;
@@ -237,6 +244,7 @@ rt_hw_context_switch_exit:
LOAD x13, 13 * REGBYTES(sp)
LOAD x14, 14 * REGBYTES(sp)
LOAD x15, 15 * REGBYTES(sp)
#ifndef __riscv_32e
LOAD x16, 16 * REGBYTES(sp)
LOAD x17, 17 * REGBYTES(sp)
LOAD x18, 18 * REGBYTES(sp)
@@ -255,6 +263,9 @@ rt_hw_context_switch_exit:
LOAD x31, 31 * REGBYTES(sp)
addi sp, sp, 32 * REGBYTES
#else
addi sp, sp, 16 * REGBYTES
#endif
#ifdef ARCH_RISCV_FPU
FLOAD f0, 0 * FREGBYTES(sp)
+22 -11
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@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2023/01/17 WangShun The first version
* 2023/03/19 Flyingcys Add riscv_32e support
*/
#define __ASSEMBLY__
#include "cpuport.h"
@@ -58,7 +59,11 @@ SW_handler:
FSTORE f31, 31 * FREGBYTES(sp)
#endif
/* save all from thread context */
#ifndef __riscv_32e
addi sp, sp, -32 * REGBYTES
#else
addi sp, sp, -16 * REGBYTES
#endif
STORE x5, 5 * REGBYTES(sp)
STORE x1, 1 * REGBYTES(sp)
/* Mandatory set the MPIE of mstatus */
@@ -75,6 +80,7 @@ SW_handler:
STORE x13, 13 * REGBYTES(sp)
STORE x14, 14 * REGBYTES(sp)
STORE x15, 15 * REGBYTES(sp)
#ifndef __riscv_32e
STORE x16, 16 * REGBYTES(sp)
STORE x17, 17 * REGBYTES(sp)
STORE x18, 18 * REGBYTES(sp)
@@ -91,7 +97,7 @@ SW_handler:
STORE x29, 29 * REGBYTES(sp)
STORE x30, 30 * REGBYTES(sp)
STORE x31, 31 * REGBYTES(sp)
#endif
/* switch to interrupt stack */
csrrw sp,mscratch,sp
/* interrupt handle */
@@ -104,22 +110,22 @@ SW_handler:
csrrw sp,mscratch,sp
/* Determine whether to trigger scheduling at the interrupt function */
la s0, rt_thread_switch_interrupt_flag
lw s2, 0(s0)
beqz s2, 1f
la t0, rt_thread_switch_interrupt_flag
lw t2, 0(t0)
beqz t2, 1f
/* clear the flag of rt_thread_switch_interrupt_flag */
sw zero, 0(s0)
sw zero, 0(t0)
csrr a0, mepc
STORE a0, 0 * REGBYTES(sp)
la s0, rt_interrupt_from_thread
LOAD s1, 0(s0)
STORE sp, 0(s1)
la t0, rt_interrupt_from_thread
LOAD t1, 0(t0)
STORE sp, 0(t1)
la s0, rt_interrupt_to_thread
LOAD s1, 0(s0)
LOAD sp, 0(s1)
la t0, rt_interrupt_to_thread
LOAD t1, 0(t0)
LOAD sp, 0(t1)
LOAD a0, 0 * REGBYTES(sp)
csrw mepc, a0
@@ -145,6 +151,7 @@ SW_handler:
LOAD x13, 13 * REGBYTES(sp)
LOAD x14, 14 * REGBYTES(sp)
LOAD x15, 15 * REGBYTES(sp)
#ifndef __riscv_32e
LOAD x16, 16 * REGBYTES(sp)
LOAD x17, 17 * REGBYTES(sp)
LOAD x18, 18 * REGBYTES(sp)
@@ -163,6 +170,10 @@ SW_handler:
LOAD x31, 31 * REGBYTES(sp)
addi sp, sp, 32 * REGBYTES
#else
addi sp, sp, 16 * REGBYTES
#endif
#ifdef ARCH_RISCV_FPU
FLOAD f0, 0 * FREGBYTES(sp)
FLOAD f1, 1 * FREGBYTES(sp)
+2
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@@ -31,6 +31,7 @@ typedef struct rt_hw_stack_frame
rt_ubase_t a3; /* x13 - a3 - function argument 3 */
rt_ubase_t a4; /* x14 - a4 - function argument 4 */
rt_ubase_t a5; /* x15 - a5 - function argument 5 */
#ifndef __riscv_32e
rt_ubase_t a6; /* x16 - a6 - function argument 6 */
rt_ubase_t a7; /* x17 - a7 - function argument 7 */
rt_ubase_t s2; /* x18 - s2 - saved register 2 */
@@ -47,6 +48,7 @@ typedef struct rt_hw_stack_frame
rt_ubase_t t4; /* x29 - t4 - temporary register 4 */
rt_ubase_t t5; /* x30 - t5 - temporary register 5 */
rt_ubase_t t6; /* x31 - t6 - temporary register 6 */
#endif
#ifdef ARCH_RISCV_FPU
rv_floatreg_t f0; /* f0 */
rv_floatreg_t f1; /* f1 */
+2
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@@ -96,10 +96,12 @@ rt_weak void rt_show_stack_frame(void)
rt_kprintf("a3 : 0x%08x\r\n", s_stack_frame->a3);
rt_kprintf("a4 : 0x%08x\r\n", s_stack_frame->a4);
rt_kprintf("a5 : 0x%08x\r\n", s_stack_frame->a5);
#ifndef __riscv_32e
rt_kprintf("a6 : 0x%08x\r\n", s_stack_frame->a6);
rt_kprintf("a7 : 0x%08x\r\n", s_stack_frame->a7);
rt_kprintf("t3 : 0x%08x\r\n", s_stack_frame->t3);
rt_kprintf("t4 : 0x%08x\r\n", s_stack_frame->t4);
rt_kprintf("t5 : 0x%08x\r\n", s_stack_frame->t5);
rt_kprintf("t6 : 0x%08x\r\n", s_stack_frame->t6);
#endif
}