mirror of
https://github.com/RT-Thread/rt-thread.git
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[BSP][HT32]新增合泰ht32f52352和ht32f12366
This commit is contained in:
QTbin
Rbb666
@@ -126,6 +126,8 @@ jobs:
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#- {RTT_BSP_NAME: "hk32_hk32f030c8-mini", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "hk32/hk32f030c8-mini"} #scons dist有问题
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- {RTT_BSP_NAME: "hpmicro_hpm6750evk", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "hpmicro/hpm6750evk"}
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- {RTT_BSP_NAME: "hpmicro_hpm6750evkmini", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "hpmicro/hpm6750evkmini"}
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- {RTT_BSP_NAME: "ht32f12366", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "ht32/ht32f12366"}
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- {RTT_BSP_NAME: "ht32f52352", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "ht32/ht32f52352"}
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#- {RTT_BSP_NAME: "imx_imx6ull-smart", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "imx/imx6ull-smart"} # toolchain还没支持
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- {RTT_BSP_NAME: "imx6sx_cortex-a9", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "imx6sx/cortex-a9"}
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- {RTT_BSP_NAME: "imx6ul", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "imx6ul"}
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1095
bsp/ht32/ht32f12366/.config
Normal file
1095
bsp/ht32/ht32f12366/.config
Normal file
File diff suppressed because it is too large
Load Diff
22
bsp/ht32/ht32f12366/Kconfig
Normal file
22
bsp/ht32/ht32f12366/Kconfig
Normal file
@@ -0,0 +1,22 @@
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../libraries/Kconfig"
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source "board/Kconfig"
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107
bsp/ht32/ht32f12366/README.md
Normal file
107
bsp/ht32/ht32f12366/README.md
Normal file
@@ -0,0 +1,107 @@
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# HT32F12366 BSP 说明
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## 简介
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ESK32-30105是合泰基于HT32F12366芯片并针对Cortex®-M3入门而设计的评估板。本文档是为ESK32-30105开发板提供的BSP(板级支持包)说明。
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主要内容如下：
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- 开发板资源介绍
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- BSP 快速上手
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- 进阶使用方法
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通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
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## 开发板介绍
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ESK32-30105使用32位ARM® Cortex®-M3高性能、低功耗单片机HT32F12366，针对Cortex®-M3入门而设计。开发板外观如下图所示：
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该开发板常用 **板载资源** 如下：
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- MCU：HT32F12366，主频 96MHz，256KB FLASH ，128KB SRAM
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- 常用外设
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- LED：2个，（绿色，PE0、PD15）
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- 常用接口：USB 转串口 、USB SLAVE
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- 调试接口：板载的 e-Link32 Lite SWD 下载
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开发板更多详细信息请参考合泰官网的相关文档 [ESK32-30105](https://www.holtek.com.cn/page/detail/dev_kit/ESK32-30105)。
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## 外设支持
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本 BSP 目前对外设的支持情况如下：
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| **板载外设** | **支持情况** | **备注** |
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| :--- | :---: | :--- |
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| USB 转串口 | 支持 | 使用 USART0 |
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| **片上外设** | **支持情况** | **备注** |
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| GPIO | 支持 | PA0, PA1...PE15 ---> PIN: 0, 1...79 |
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| USART | 支持 | USART0/1 |
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| UART | 支持 | UART0/1 |
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| SPI | 支持 | SPI0/1 |
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| I2C | 支持 | 硬件 I2C0/1 |
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| ADC | 暂不支持 | |
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| WDT | 暂不支持 | |
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## 使用说明
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使用说明分为如下两个章节：
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- 快速上手
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本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
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- 进阶使用
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本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多片上资源，实现更多高级功能。
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### 快速上手
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本 BSP 为仅为开发者提供MDK5的工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
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#### 硬件连接
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使用数据线通过板载的 e-Link32 Lite将芯片连接到 PC。
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#### 编译下载
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双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
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> 注：工程默认配置使用CMSIS-DAP下载方式，在通过 e-Link32 Lite 连接开发板的基础上，点击下载按钮即可下载程序到开发板。
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#### 运行结果
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下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，LED1和LED2交替闪烁。
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连接开发板对应串口到 PC（也可以通过e-Link32 Lite的模拟串口将开发板连接到PC）, 在终端工具里调整好串口配置（115200-8-1-N）并打开相应的串口，复位设备后，可以看到 RT-Thread 的输出信息:
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> 注：由于RT-Thread的finsh控制台使用的是命令行的输入形式，推荐使用串口调试工具如：Tabby terminal 或者 Tera Term。
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```bash
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\ | /
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- RT - Thread Operating System
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/ | \ 5.1.0 build Apr 10 2024 14:39:43
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2006 - 2024 Copyright by RT-Thread team
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msh >
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```
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### 进阶使用
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此 BSP 默认只开启了 GPIO 和 USART0 的功能，如果需使用更多的片上资源，需要利用 ENV 工具对BSP 进行配置，步骤如下：
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1. 在 bsp 下打开 env 工具。
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2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
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3. 输入`scons --target=mdk5` 命令重新生成工程。
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## 注意事项
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开发板和芯片的相关资料可以在[合泰官网](https://www.holtek.com.cn/page/index)进行查找和下载，如芯片的数据手册和开发使用手册、开发板的原理图、Keil_v5的pack安装包等。
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## 联系人信息
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维护人:
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- [QT-one](https://github.com/QT-one)
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15
bsp/ht32/ht32f12366/SConscript
Normal file
15
bsp/ht32/ht32f12366/SConscript
Normal file
@@ -0,0 +1,15 @@
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# for module compiling
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import os #包含os库
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Import('RTT_ROOT') #导入RTT_ROOT对象（RTT_ROOT代表的是RT-Thread源码包）
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from building import * #把building模块的所有内容都导入到当前模块中
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cwd = GetCurrentDir() #获取当前路径，并将该路径信息保存到变量cwd中
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objs = [] #创建一个list型变量objs
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list = os.listdir(cwd) #得到当前目录下的所有子目录，并保存到变量list中
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for d in list: #for循环用d记录循环的次数，直到寻遍所有路径
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path = os.path.join(cwd, d) #根据d获取到不同的路径
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if os.path.isfile(os.path.join(path, 'SConscript')): #如果该路径下存在名为SConscript的文件
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objs = objs + SConscript(os.path.join(d, 'SConscript')) #将路径中SConscript文件内的源码读取到objs中
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Return('objs') #将objs返回出去
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60
bsp/ht32/ht32f12366/SConstruct
Normal file
60
bsp/ht32/ht32f12366/SConstruct
Normal file
@@ -0,0 +1,60 @@
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import os
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import sys
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import rtconfig
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM == 'iar':
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env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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ht32_library = 'HT32_STD_1xxxx_FWLib'
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rtconfig.BSP_LIBRARY_TYPE = ht32_library
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, ht32_library, 'SConscript')))
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# include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'ht32_drivers', 'SConscript')))
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# make a building
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DoBuilding(TARGET, objs)
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21
bsp/ht32/ht32f12366/applications/SConscript
Normal file
21
bsp/ht32/ht32f12366/applications/SConscript
Normal file
@@ -0,0 +1,21 @@
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#导入其他模块的变量
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Import('RTT_ROOT')
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Import('rtconfig')
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#导入使用到的模块
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from building import *
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#获取当前目录的路径
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cwd = GetCurrentDir()
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#创建一个列表，用于保存需要使用到的C文件路径
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src = Glob('*c')
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#创建一个列表，用于保存需要包含的H文件路径
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path = [cwd]
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#创建一个组别
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = path)
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#返回创建好的组别
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Return('group')
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37
bsp/ht32/ht32f12366/applications/main.c
Normal file
37
bsp/ht32/ht32f12366/applications/main.c
Normal file
@@ -0,0 +1,37 @@
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-04-08 QT-one first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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/* defined the led2 pin: pd15 */
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#define LED1_PIN GET_PIN(D, 15)
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/* defined the led3 pin: pe0 */
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#define LED2_PIN GET_PIN(E, 0)
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int main(void)
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{
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rt_uint32_t speed = 200;
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/* set led1 pin mode to output */
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rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
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/* set led2 pin mode to output */
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rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
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while (1)
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{
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rt_pin_write(LED1_PIN, PIN_LOW);
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rt_pin_write(LED2_PIN, PIN_HIGH);
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rt_thread_mdelay(speed);
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rt_pin_write(LED1_PIN, PIN_HIGH);
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rt_pin_write(LED2_PIN, PIN_LOW);
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rt_thread_mdelay(speed);
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}
|
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}
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77
bsp/ht32/ht32f12366/board/Kconfig
Normal file
77
bsp/ht32/ht32f12366/board/Kconfig
Normal file
@@ -0,0 +1,77 @@
|
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menu "Hardware Drivers Config"
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|
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config SOC_HT32F12366
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bool
|
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select SOC_SERIES_HT32F1
|
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select RT_USING_COMPONENTS_INIT
|
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select RT_USING_USER_MAIN
|
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default y
|
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|
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menu "Onboard Peripheral Drivers"
|
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|
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endmenu
|
||||
|
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menu "On-chip Peripheral Drivers"
|
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|
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config BSP_USING_GPIO
|
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bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
|
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menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default n
|
||||
select RT_USING_SERIAL
|
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if BSP_USING_UART
|
||||
config BSP_USING_USART0
|
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bool "Enable USART0"
|
||||
default n
|
||||
|
||||
config BSP_USING_USART1
|
||||
bool "Enable USART1"
|
||||
default n
|
||||
|
||||
config BSP_USING_UART0
|
||||
bool "Enable UART0"
|
||||
default n
|
||||
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI Bus"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI0
|
||||
bool "Enable SPI0 Bus"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 Bus"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C Bus"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
if BSP_USING_I2C
|
||||
config BSP_USING_I2C0
|
||||
bool "Enable I2C0 Bus"
|
||||
default n
|
||||
|
||||
config BSP_USING_I2C1
|
||||
bool "Enable I2C1 Bus"
|
||||
default n
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
27
bsp/ht32/ht32f12366/board/SConscript
Normal file
27
bsp/ht32/ht32f12366/board/SConscript
Normal file
@@ -0,0 +1,27 @@
|
||||
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = Glob('src/*.c')
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += [startup_path_prefix + '/HT32_STD_1xxxx_FWLib/library/Device/Holtek/HT32F1xxxx/Source/GCC/startup_ht32f1xxxx_gcc_01.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src += [startup_path_prefix + '/HT32_STD_1xxxx_FWLib/library/Device/Holtek/HT32F1xxxx/Source/ARM/startup_ht32f1xxxx_01.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += [startup_path_prefix + '/HT32_STD_1xxxx_FWLib/library/Device/Holtek/HT32F1xxxx/Source/IAR/startup_ht32f1xxxx_iar_01.s']
|
||||
|
||||
path = [cwd]
|
||||
path = [cwd + '/inc']
|
||||
|
||||
CPPDEFINES = ['USE_HT32F12366_SK, USE_HT32F12365_66, USE_MEM_HT32F12366']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
64
bsp/ht32/ht32f12366/board/inc/board.h
Normal file
64
bsp/ht32/ht32f12366/board/inc/board.h
Normal file
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "ht32.h"
|
||||
#include "ht32_msp.h"
|
||||
|
||||
#ifdef BSP_USING_GPIO
|
||||
#include "drv_gpio.h"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART
|
||||
#include "drv_usart.h"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI
|
||||
#include "drv_spi.h"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C
|
||||
#include "drv_i2c.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* whether use board external SRAM memory */
|
||||
#define HT32_EXT_SRAM 0
|
||||
#define HT32_EXT_SRAM_BEGIN 0x68000000
|
||||
#define HT32_EXT_SRAM_END (HT32_EXT_SRAM_BEGIN + HT32_EXT_SRAM*1024)
|
||||
|
||||
/* internal sram memory size */
|
||||
#define HT32_SRAM_END (0x20000000 + LIBCFG_RAM_SIZE)
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
#define HEAP_END HT32_SRAM_END
|
||||
|
||||
void rt_hw_board_clock_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
211
bsp/ht32/ht32f12366/board/inc/ht32_msp.h
Normal file
211
bsp/ht32/ht32f12366/board/inc/ht32_msp.h
Normal file
@@ -0,0 +1,211 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#ifndef __HT32_MSP_H__
|
||||
#define __HT32_MSP_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "ht32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* UART gpio */
|
||||
#ifdef BSP_USING_UART
|
||||
#ifdef BSP_USING_USART0
|
||||
|
||||
#define HTCFG_USART0_IPN USART0
|
||||
|
||||
#define _HTCFG_USART0_TX_GPIOX A
|
||||
#define _HTCFG_USART0_TX_GPION 8
|
||||
#define _HTCFG_USART0_RX_GPIOX A
|
||||
#define _HTCFG_USART0_RX_GPION 10
|
||||
|
||||
#define HTCFG_USART0_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART0_TX_GPIOX)
|
||||
#define HTCFG_USART0_TX_GPIO_CLK STRCAT2(P, _HTCFG_USART0_TX_GPIOX)
|
||||
#define HTCFG_USART0_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART0_TX_GPIOX)
|
||||
#define HTCFG_USART0_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART0_TX_GPION)
|
||||
|
||||
#define HTCFG_USART0_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART0_RX_GPIOX)
|
||||
#define HTCFG_USART0_RX_GPIO_CLK STRCAT2(P, _HTCFG_USART0_RX_GPIOX)
|
||||
#define HTCFG_USART0_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART0_RX_GPIOX)
|
||||
#define HTCFG_USART0_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART0_RX_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_USART1
|
||||
|
||||
#define HTCFG_USART1_IPN USART1
|
||||
|
||||
#define _HTCFG_USART1_TX_GPIOX A
|
||||
#define _HTCFG_USART1_TX_GPION 4
|
||||
#define _HTCFG_USART1_RX_GPIOX A
|
||||
#define _HTCFG_USART1_RX_GPION 5
|
||||
|
||||
#define HTCFG_USART1_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART1_TX_GPIOX)
|
||||
#define HTCFG_USART1_TX_GPIO_CLK STRCAT2(P, _HTCFG_USART1_TX_GPIOX)
|
||||
#define HTCFG_USART1_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART1_TX_GPIOX)
|
||||
#define HTCFG_USART1_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART1_TX_GPION)
|
||||
|
||||
#define HTCFG_USART1_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART1_RX_GPIOX)
|
||||
#define HTCFG_USART1_RX_GPIO_CLK STRCAT2(P, _HTCFG_USART1_RX_GPIOX)
|
||||
#define HTCFG_USART1_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART1_RX_GPIOX)
|
||||
#define HTCFG_USART1_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART1_RX_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_UART0
|
||||
|
||||
#define HTCFG_UART0_IPN UART0
|
||||
|
||||
#define _HTCFG_UART0_TX_GPIOX C
|
||||
#define _HTCFG_UART0_TX_GPION 9
|
||||
#define _HTCFG_UART0_RX_GPIOX C
|
||||
#define _HTCFG_UART0_RX_GPION 10
|
||||
|
||||
#define HTCFG_UART0_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART0_TX_GPIOX)
|
||||
#define HTCFG_UART0_TX_GPIO_CLK STRCAT2(P, _HTCFG_UART0_TX_GPIOX)
|
||||
#define HTCFG_UART0_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART0_TX_GPIOX)
|
||||
#define HTCFG_UART0_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART0_TX_GPION)
|
||||
|
||||
#define HTCFG_UART0_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART0_RX_GPIOX)
|
||||
#define HTCFG_UART0_RX_GPIO_CLK STRCAT2(P, _HTCFG_UART0_RX_GPIOX)
|
||||
#define HTCFG_UART0_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART0_RX_GPIOX)
|
||||
#define HTCFG_UART0_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART0_RX_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_UART1
|
||||
|
||||
#define HTCFG_UART1_IPN UART1
|
||||
|
||||
#define _HTCFG_UART1_TX_GPIOX C
|
||||
#define _HTCFG_UART1_TX_GPION 2
|
||||
#define _HTCFG_UART1_RX_GPIOX C
|
||||
#define _HTCFG_UART1_RX_GPION 3
|
||||
|
||||
#define HTCFG_UART1_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART1_TX_GPIOX)
|
||||
#define HTCFG_UART1_TX_GPIO_CLK STRCAT2(P, _HTCFG_UART1_TX_GPIOX)
|
||||
#define HTCFG_UART1_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART1_TX_GPIOX)
|
||||
#define HTCFG_UART1_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART1_TX_GPION)
|
||||
|
||||
#define HTCFG_UART1_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART1_RX_GPIOX)
|
||||
#define HTCFG_UART1_RX_GPIO_CLK STRCAT2(P, _HTCFG_UART1_RX_GPIOX)
|
||||
#define HTCFG_UART1_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART1_RX_GPIOX)
|
||||
#define HTCFG_UART1_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART1_RX_GPION)
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* SPI gpio */
|
||||
#ifdef BSP_USING_SPI
|
||||
#ifdef BSP_USING_SPI0
|
||||
|
||||
#define HTCFG_SPI0_IPN SPI0
|
||||
|
||||
#define _HTCFG_SPI0_SCK_GPIOX B
|
||||
#define _HTCFG_SPI0_SCK_GPION 3
|
||||
|
||||
#define _HTCFG_SPI0_MISO_GPIOX B
|
||||
#define _HTCFG_SPI0_MISO_GPION 5
|
||||
|
||||
#define _HTCFG_SPI0_MOSI_GPIOX B
|
||||
#define _HTCFG_SPI0_MOSI_GPION 4
|
||||
|
||||
#define HTCFG_SPI0_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_SCK_GPIOX)
|
||||
#define HTCFG_SPI0_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_SCK_GPIOX)
|
||||
#define HTCFG_SPI0_SCK_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_SCK_GPION)
|
||||
|
||||
#define HTCFG_SPI0_MISO_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_MISO_GPIOX)
|
||||
#define HTCFG_SPI0_MISO_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_MISO_GPIOX)
|
||||
#define HTCFG_SPI0_MISO_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_MISO_GPION)
|
||||
|
||||
#define HTCFG_SPI0_MOSI_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_MOSI_GPIOX)
|
||||
#define HTCFG_SPI0_MOSI_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_MOSI_GPIOX)
|
||||
#define HTCFG_SPI0_MOSI_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_MOSI_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI1
|
||||
|
||||
#define HTCFG_SPI1_IPN SPI1
|
||||
|
||||
#define _HTCFG_SPI1_SCK_GPIOX B
|
||||
#define _HTCFG_SPI1_SCK_GPION 7
|
||||
|
||||
#define _HTCFG_SPI1_MISO_GPIOX B
|
||||
#define _HTCFG_SPI1_MISO_GPION 9
|
||||
|
||||
#define _HTCFG_SPI1_MOSI_GPIOX B
|
||||
#define _HTCFG_SPI1_MOSI_GPION 8
|
||||
|
||||
#define HTCFG_SPI1_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_SCK_GPIOX)
|
||||
#define HTCFG_SPI1_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_SCK_GPIOX)
|
||||
#define HTCFG_SPI1_SCK_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_SCK_GPION)
|
||||
|
||||
#define HTCFG_SPI1_MISO_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_MISO_GPIOX)
|
||||
#define HTCFG_SPI1_MISO_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_MISO_GPIOX)
|
||||
#define HTCFG_SPI1_MISO_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_MISO_GPION)
|
||||
|
||||
#define HTCFG_SPI1_MOSI_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_MOSI_GPIOX)
|
||||
#define HTCFG_SPI1_MOSI_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_MOSI_GPIOX)
|
||||
#define HTCFG_SPI1_MOSI_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_MOSI_GPION)
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* I2C gpio */
|
||||
#ifdef BSP_USING_I2C
|
||||
#ifdef BSP_USING_I2C0
|
||||
|
||||
#define HTCFG_I2C0_IPN I2C0
|
||||
|
||||
#define _HTCFG_I2C0_SCL_GPIOX B
|
||||
#define _HTCFG_I2C0_SCL_GPION 12
|
||||
|
||||
#define _HTCFG_I2C0_SDA_GPIOX B
|
||||
#define _HTCFG_I2C0_SDA_GPION 13
|
||||
|
||||
#define HTCFG_I2C0_SCL_GPIO_CLK STRCAT2(P, _HTCFG_I2C0_SCL_GPIOX)
|
||||
#define HTCFG_I2C0_SCL_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C0_SCL_GPIOX)
|
||||
#define HTCFG_I2C0_SCL_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SCL_GPION)
|
||||
|
||||
#define HTCFG_I2C0_SDA_GPIO_CLK STRCAT2(P, _HTCFG_I2C0_SDA_GPIOX)
|
||||
#define HTCFG_I2C0_SDA_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C0_SDA_GPIOX)
|
||||
#define HTCFG_I2C0_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SDA_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C1
|
||||
|
||||
#define HTCFG_I2C1_IPN I2C1
|
||||
|
||||
#define _HTCFG_I2C1_SCL_GPIOX A
|
||||
#define _HTCFG_I2C1_SCL_GPION 0
|
||||
|
||||
#define _HTCFG_I2C1_SDA_GPIOX A
|
||||
#define _HTCFG_I2C1_SDA_GPION 1
|
||||
|
||||
#define HTCFG_I2C1_SCL_GPIO_CLK STRCAT2(P, _HTCFG_I2C1_SCL_GPIOX)
|
||||
#define HTCFG_I2C1_SCL_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C1_SCL_GPIOX)
|
||||
#define HTCFG_I2C1_SCL_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C1_SCL_GPION)
|
||||
|
||||
#define HTCFG_I2C1_SDA_GPIO_CLK STRCAT2(P, _HTCFG_I2C1_SDA_GPIOX)
|
||||
#define HTCFG_I2C1_SDA_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C1_SDA_GPIOX)
|
||||
#define HTCFG_I2C1_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C1_SDA_GPION)
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
void ht32_usart_gpio_init(void *instance);
|
||||
void ht32_spi_gpio_init(void *instance);
|
||||
void ht32_i2c_gpio_init(void *instance);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __HT32_MSP_H__ */
|
||||
453
bsp/ht32/ht32f12366/board/inc/ht32f1xxxx_01_usbdconf.h
Normal file
453
bsp/ht32/ht32f12366/board/inc/ht32f1xxxx_01_usbdconf.h
Normal file
@@ -0,0 +1,453 @@
|
||||
/*********************************************************************************************************//**
|
||||
* @file IP/Example/ht32f1xxxx_01_usbdconf.h
|
||||
* @version $Rev:: 1090 $
|
||||
* @date $Date:: 2018-01-29 #$
|
||||
* @brief The configuration file of USB Device Driver.
|
||||
*************************************************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Firmware Disclaimer Information
|
||||
*
|
||||
* 1. The customer hereby acknowledges and agrees that the program technical documentation, including the
|
||||
* code, which is supplied by Holtek Semiconductor Inc., (hereinafter referred to as "HOLTEK") is the
|
||||
* proprietary and confidential intellectual property of HOLTEK, and is protected by copyright law and
|
||||
* other intellectual property laws.
|
||||
*
|
||||
* 2. The customer hereby acknowledges and agrees that the program technical documentation, including the
|
||||
* code, is confidential information belonging to HOLTEK, and must not be disclosed to any third parties
|
||||
* other than HOLTEK and the customer.
|
||||
*
|
||||
* 3. The program technical documentation, including the code, is provided "as is" and for customer reference
|
||||
* only. After delivery by HOLTEK, the customer shall use the program technical documentation, including
|
||||
* the code, at their own risk. HOLTEK disclaims any expressed, implied or statutory warranties, including
|
||||
* the warranties of merchantability, satisfactory quality and fitness for a particular purpose.
|
||||
*
|
||||
* <h2><center>Copyright (C) Holtek Semiconductor Inc. All rights reserved</center></h2>
|
||||
************************************************************************************************************/
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------------------------------------*/
|
||||
#ifndef __HT32F1XXXX_01_USBDCONF_H
|
||||
#define __HT32F1XXXX_01_USBDCONF_H
|
||||
|
||||
// <e0> Enter Low Power mode when Suspended
|
||||
#define USBDCORE_ENABLE_LOW_POWER (0)
|
||||
// </e>
|
||||
|
||||
#if (USBDCORE_ENABLE_LOW_POWER == 1)
|
||||
#define USBDCore_LowPower() PWRCU_DeepSleep1(PWRCU_SLEEP_ENTRY_WFE)
|
||||
#else
|
||||
#define USBDCore_LowPower(...)
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* USB Interrupt Enable */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <h> USB Interrupt Setting (UIER)
|
||||
// <o0.0> USB Global Interrupt Enable (UGIE) (Default)
|
||||
// <o0.1> Start Of Frame Interrupt Enable (SOFIE)
|
||||
// <o0.2> USB Reset Interrupt Enable (URSTIE) (Default)
|
||||
// <o0.3> Resume Interrupt Enable (RSMIE) (Default)
|
||||
// <o0.4> Suspend Interrupt Enable (SUSPIE) (Default)
|
||||
// <o0.5> Expected Start of Frame Interrupt Enable (ESOFE)
|
||||
// <o0.8> Control Endpoint Interrupt Enable (EP0IE) (Default)
|
||||
// <o0.9> Endpoint1 Interrupt Enable (EP1IE)
|
||||
// <o0.10> Endpoint2 Interrupt Enable (EP2IE)
|
||||
// <o0.11> Endpoint3 Interrupt Enable (EP3IE)
|
||||
// <o0.12> Endpoint4 Interrupt Enable (EP4IE)
|
||||
// <o0.13> Endpoint5 Interrupt Enable (EP5IE)
|
||||
// <o0.14> Endpoint6 Interrupt Enable (EP6IE)
|
||||
// <o0.15> Endpoint7 Interrupt Enable (EP7IE)
|
||||
#define _UIER (0x011D)
|
||||
// </h>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint0 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <h> Control Endpoint0 Configuration
|
||||
// <o0> Endpoint Buffer Length (EPLEN)
|
||||
// <8=> 8 bytes
|
||||
// <16=> 16 bytes
|
||||
// <32=> 32 bytes
|
||||
// <64=> 64 bytes
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP0LEN (64)
|
||||
|
||||
|
||||
// <h> Control Endpoint0 Interrupt Enable Settings (EP0IER)
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) (Default)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) (Default)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
// <o0.8> SETUP Token Packet Received Interrupt Enable (STRXIE)
|
||||
// <o0.9> SETUP Data Packet Received Interrupt Enable (SDRXIE) (Default)
|
||||
// <o0.10> SETUP Data Error Interrupt Enable (SDERIE)
|
||||
// <o0.11> Zero Length Data Packet Received Interrupt Enable (ZLRXIE)
|
||||
#define _EP0_IER (0x212)
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint1 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint1 Configuration
|
||||
#define _EP1_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP1_CFG_EPADR (1)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP1_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP1_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP1_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4>
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP1LEN_TMP (8)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP1_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint2 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint2 Configuration
|
||||
#define _EP2_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP2_CFG_EPADR (2)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP2_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP2_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP2_CFG_EPDIR (0)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4>
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP2LEN_TMP (8)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP2_IER (0x002)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint3 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint3 Configuration
|
||||
#define _EP3_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP3_CFG_EPADR (3)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP3_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP3_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP3_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4>
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP3LEN_TMP (8)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP3_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint4 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint4 Configuration
|
||||
#define _EP4_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP4_CFG_EPADR (4)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP4_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP4_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP4_CFG_EPDIR (0)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP4LEN_TMP (8)
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP4_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP4_IER (0x02)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint5 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint5 Configuration
|
||||
#define _EP5_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP5_CFG_EPADR (5)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP5_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP5_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP5_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP5LEN_TMP (8)
|
||||
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP5_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP5_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint6 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint6 Configuration
|
||||
#define _EP6_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP6_CFG_EPADR (6)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP6_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP6_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP6_CFG_EPDIR (0)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP6LEN_TMP (8)
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP6_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP6_IER (0x02)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint7 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint7 Configuration
|
||||
#define _EP7_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP7_CFG_EPADR (7)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP7_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP7_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP7_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP7LEN_TMP (8)
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP7_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP7_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
#endif
|
||||
490
bsp/ht32/ht32f12366/board/inc/ht32f1xxxx_conf.h
Normal file
490
bsp/ht32/ht32f12366/board/inc/ht32f1xxxx_conf.h
Normal file
@@ -0,0 +1,490 @@
|
||||
/*********************************************************************************************************//**
|
||||
* @file IP/Example/ht32f1xxxx_conf.h
|
||||
* @version $Rev:: 2922 $
|
||||
* @date $Date:: 2023-06-07 #$
|
||||
* @brief Library configuration file.
|
||||
*************************************************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Firmware Disclaimer Information
|
||||
*
|
||||
* 1. The customer hereby acknowledges and agrees that the program technical documentation, including the
|
||||
* code, which is supplied by Holtek Semiconductor Inc., (hereinafter referred to as "HOLTEK") is the
|
||||
* proprietary and confidential intellectual property of HOLTEK, and is protected by copyright law and
|
||||
* other intellectual property laws.
|
||||
*
|
||||
* 2. The customer hereby acknowledges and agrees that the program technical documentation, including the
|
||||
* code, is confidential information belonging to HOLTEK, and must not be disclosed to any third parties
|
||||
* other than HOLTEK and the customer.
|
||||
*
|
||||
* 3. The program technical documentation, including the code, is provided "as is" and for customer reference
|
||||
* only. After delivery by HOLTEK, the customer shall use the program technical documentation, including
|
||||
* the code, at their own risk. HOLTEK disclaims any expressed, implied or statutory warranties, including
|
||||
* the warranties of merchantability, satisfactory quality and fitness for a particular purpose.
|
||||
*
|
||||
* <h2><center>Copyright (C) Holtek Semiconductor Inc. All rights reserved</center></h2>
|
||||
************************************************************************************************************/
|
||||
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------------------------------------*/
|
||||
#ifndef __HT32F1XXXX_CONF_H
|
||||
#define __HT32F1XXXX_CONF_H
|
||||
|
||||
/* Exported constants --------------------------------------------------------------------------------------*/
|
||||
|
||||
#define RETARGET_ITM 0
|
||||
#define RETARGET_USB 1
|
||||
#define RETARGET_SYSLOG 2
|
||||
#define RETARGET_COM1 10
|
||||
#define RETARGET_COM2 11
|
||||
#define RETARGET_USART0 12
|
||||
#define RETARGET_USART1 13
|
||||
#define RETARGET_UART0 14
|
||||
#define RETARGET_UART1 15
|
||||
|
||||
|
||||
/* Retarget settings of the C standard I/O library functions (printf, scanf, getchar, ...etc.) */
|
||||
/*
|
||||
// <q> Enable Retarget
|
||||
// <o1> Retarget Port
|
||||
// <0=> ITM
|
||||
// <1=> USB Virtual COM
|
||||
// <2=> Syslog
|
||||
// <10=> COM1
|
||||
// <11=> COM2
|
||||
// <12=> USART0
|
||||
// <13=> USART1
|
||||
// <14=> UART0
|
||||
// <15=> UART1
|
||||
// <q2> Enable Auto Return
|
||||
// <i> Auto Return function adds "\r" before "\n" automatically when print message by Retarget.
|
||||
*/
|
||||
#define _RETARGET 1
|
||||
#define RETARGET_PORT 10
|
||||
#define _AUTO_RETURN 0
|
||||
|
||||
#ifndef AUTO_RETURN
|
||||
#if (_AUTO_RETURN == 1)
|
||||
#define AUTO_RETURN
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Enable Interrupt Mode for UxART Retarget
|
||||
// <h> Retarget COM/UxART Setting
|
||||
// <o0> UxART Baudrate
|
||||
// <q1> Enable Interrupt Mode for UxART Tx Retarget
|
||||
// <q2> Define UxARTn_IRQHandler By Retarget (ht32_serial.c)
|
||||
// <i> Disable (RETARGET_DEFINE_HANDLER = 0) if application already have UxARTn_IRQHandler.
|
||||
// <i> RETARGET_UART_IRQHandler() shall be called by UxARTn_IRQHandler when disable.
|
||||
// <o3> Tx Buffer Length (in byte)
|
||||
// </h>
|
||||
*/
|
||||
#define RETARGET_UxART_BAUDRATE 115200
|
||||
#define RETARGET_INT_MODE 0
|
||||
#define RETARGET_DEFINE_HANDLER 1
|
||||
#define RETARGET_INT_BUFFER_SIZE 64
|
||||
|
||||
#if (_RETARGET == 1)
|
||||
#if (RETARGET_PORT == RETARGET_ITM)
|
||||
#elif (RETARGET_PORT == RETARGET_USB)
|
||||
#define RETARGET_IS_USB
|
||||
// <h> Retarget USB Virtual COM Setting
|
||||
// <o0> Communication (Interrupt IN)
|
||||
// <1=> Endpoint 1
|
||||
// <2=> Endpoint 2
|
||||
// <3=> Endpoint 3
|
||||
// <4=> Endpoint 4
|
||||
// <5=> Endpoint 5
|
||||
// <6=> Endpoint 6
|
||||
// <7=> Endpoint 7
|
||||
// <o1> Data Rx (Bulk OUT)
|
||||
// <1=> Endpoint 1
|
||||
// <2=> Endpoint 2
|
||||
// <3=> Endpoint 3
|
||||
// <4=> Endpoint 4
|
||||
// <5=> Endpoint 5
|
||||
// <6=> Endpoint 6
|
||||
// <7=> Endpoint 7
|
||||
// <o2> Data Tx (Bulk IN)
|
||||
// <1=> Endpoint 1
|
||||
// <2=> Endpoint 2
|
||||
// <3=> Endpoint 3
|
||||
// <4=> Endpoint 4
|
||||
// <5=> Endpoint 5
|
||||
// <6=> Endpoint 6
|
||||
// <7=> Endpoint 7
|
||||
// <o3> Communication Endpoint Buffer Length (in byte) <4-64:4>
|
||||
// <o4> Data Rx Endpoint Buffer Length (in byte) <4-64:4>
|
||||
// <o5> Data Tx Endpoint Buffer Length (in byte) <4-64:4>
|
||||
// <o6> Rx Buffer Length (in byte) <64-1024:4>
|
||||
// <o7> Tx Buffer Length (in byte) <1-63:1>
|
||||
// <i> Please use "SERIAL_Flush()" to sent out the buffer data immediately when Tx Buffer Length > 1.
|
||||
// <o8> USB Tx Mode (BULK IN)
|
||||
// <0=> Block Mode (Wait until both USB and terminal software are ready)
|
||||
// <1=> Non-Block Mode (Drop data if USB or terminal software is not ready)
|
||||
// <q9> Enable HSI Auto Trim By USB Function
|
||||
// <i> Need turn on if the USB clock source is from HSI (PLL USBPLL clock Source).
|
||||
#define RETARGET_CTRL_EPT (5)
|
||||
#define RETARGET_RX_EPT (6)
|
||||
#define RETARGET_TX_EPT (7)
|
||||
#define RETARGET_CTRL_EPTLEN (8)
|
||||
#define RETARGET_RX_EPTLEN (64)
|
||||
#define RETARGET_TX_EPTLEN (64)
|
||||
#define RETARGET_BUFFER_SIZE (64)
|
||||
#define RETARGET_TXBUFFER_SIZE (1) // Use "SERIAL_Flush()" to sent out the buffer data immediately when Tx Buffer Length > 1.
|
||||
#define RETARGET_USB_MODE (0)
|
||||
#define RETARGET_HSI_ATM (1)
|
||||
// </h>
|
||||
#elif (RETARGET_PORT == RETARGET_COM1)
|
||||
#define RETARGET_COM_PORT COM1
|
||||
#define RETARGET_USART_PORT COM1_PORT
|
||||
#define RETARGET_UART_IRQn COM1_IRQn
|
||||
#define RETARGET_UART_IRQHandler COM1_IRQHandler
|
||||
#define RETARGET_IS_UART
|
||||
#elif (RETARGET_PORT == RETARGET_COM2)
|
||||
#define RETARGET_COM_PORT COM2
|
||||
#define RETARGET_USART_PORT COM2_PORT
|
||||
#define RETARGET_UART_IRQn COM2_IRQn
|
||||
#define RETARGET_UART_IRQHandler COM2_IRQHandler
|
||||
#define RETARGET_IS_UART
|
||||
#elif (RETARGET_PORT == RETARGET_USART0)
|
||||
#define RETARGET_UxART_IPN USART0
|
||||
#define RETARGET_USART_PORT STRCAT2(HT_, RETARGET_UxART_IPN)
|
||||
#define RETARGET_UART_IRQn STRCAT2(RETARGET_UxART_IPN, _IRQn)
|
||||
#define RETARGET_UART_IRQHandler STRCAT2(RETARGET_UxART_IPN, _IRQHandler)
|
||||
#define RETARGET_IS_UART
|
||||
#elif (RETARGET_PORT == RETARGET_USART1)
|
||||
#define RETARGET_UxART_IPN USART1
|
||||
#define RETARGET_USART_PORT STRCAT2(HT_, RETARGET_UxART_IPN)
|
||||
#define RETARGET_UART_IRQn STRCAT2(RETARGET_UxART_IPN, _IRQn)
|
||||
#define RETARGET_UART_IRQHandler STRCAT2(RETARGET_UxART_IPN, _IRQHandler)
|
||||
#define RETARGET_IS_UART
|
||||
#elif (RETARGET_PORT == RETARGET_UART0)
|
||||
#define RETARGET_UxART_IPN UART0
|
||||
#define RETARGET_USART_PORT STRCAT2(HT_, RETARGET_UxART_IPN)
|
||||
#define RETARGET_UART_IRQn STRCAT2(RETARGET_UxART_IPN, _IRQn)
|
||||
#define RETARGET_UART_IRQHandler STRCAT2(RETARGET_UxART_IPN, _IRQHandler)
|
||||
#define RETARGET_IS_UART
|
||||
#elif (RETARGET_PORT == RETARGET_UART1)
|
||||
#define RETARGET_UxART_IPN UART1
|
||||
#define RETARGET_USART_PORT STRCAT2(HT_, RETARGET_UxART_IPN)
|
||||
#define RETARGET_UART_IRQn STRCAT2(RETARGET_UxART_IPN, _IRQn)
|
||||
#define RETARGET_UART_IRQHandler STRCAT2(RETARGET_UxART_IPN, _IRQHandler)
|
||||
#define RETARGET_IS_UART
|
||||
#endif
|
||||
extern void RETARGET_Configuration(void);
|
||||
#else
|
||||
#define RETARGET_Configuration(...)
|
||||
#undef printf
|
||||
#undef getchar
|
||||
#define printf(...)
|
||||
#define getchar() (0)
|
||||
#endif
|
||||
|
||||
#if (RETARGET_DEFINE_HANDLER == 0)
|
||||
#undef RETARGET_UART_IRQHandler
|
||||
#endif
|
||||
|
||||
/*
|
||||
//<e0> Enable HT32 Time Function
|
||||
// <i> Provide "Time_GetTick()" and "Time_Dealy()" functions.
|
||||
|
||||
// <o1> Timer Selection
|
||||
// <0=> BFTM0
|
||||
// <1=> BFTM1
|
||||
// <2=> SCTM0
|
||||
// <3=> SCTM1
|
||||
// <4=> SCTM2
|
||||
// <5=> SCTM3
|
||||
// <6=> PWM0
|
||||
// <7=> PWM1
|
||||
// <8=> PWM2
|
||||
// <9=> GPTM0
|
||||
// <10=> GPTM1
|
||||
// <11=> MCTM0
|
||||
|
||||
// <h> Timer Clock Setting
|
||||
// </h>
|
||||
// <i> Timer Clock = (Core Clock) / (APB Peripheral Clock Prescaler)
|
||||
// <i> HTCFG_TIME_CLKSRC = _HTCFG_TIME_CORECLK / (2^HTCFG_TIME_PCLK_DIV)
|
||||
// <i> _HTCFG_TIME_CORECLK = LIBCFG_MAX_SPEED or HTCFG_TIME_CLK_MANUAL (selected by HTCFG_TIME_CLKSEL)
|
||||
|
||||
// <o2> -- Core Clock Setting (CK_AHB)
|
||||
// <i> HTCFG_TIME_CLKSEL
|
||||
// <i> 0 = Default Maximum (LIBCFG_MAX_SPEED)
|
||||
// <i> 1 = Manual Input (HTCFG_TIME_CLK_MANUAL)
|
||||
// <0=> Default Maximum (LIBCFG_MAX_SPEED)
|
||||
// <1=> Manual Input (HTCFG_TIME_CLK_MANUAL)
|
||||
|
||||
// <o3> -- Core Clock Manual Input (Hz)
|
||||
// <i> HTCFG_TIME_CLK_MANUAL
|
||||
// <i> Only meaningful when Core Clock Setting (HTCFG_TIME_CLKSEL) = Manual Input (1)
|
||||
|
||||
// <o4> -- APB Peripheral Clock Prescaler
|
||||
// <i> HTCFG_TIME_PCLK_DIV
|
||||
// <0=> /1
|
||||
// <1=> /2
|
||||
// <2=> /4
|
||||
// <3=> /8
|
||||
|
||||
// <o5> Time Tick (Hz, not applicable for BFTM) <1-1000000:100>
|
||||
// <i> Not applicable for BFTM, fixed TICKHZ to HTCFG_TIME_CLKSRC for BFTM.
|
||||
*/
|
||||
#if (0) // Enable HT32 Time Function
|
||||
#define HTCFG_TIME_IPSEL (0)
|
||||
#define HTCFG_TIME_CLKSEL (0) // 0 = Default Maximum (LIBCFG_MAX_SPEED), 1 = Manual Input (HTCFG_TIME_CLKSRC)
|
||||
#define HTCFG_TIME_CLK_MANUAL (20000000) // Only meaningful when HTCFG_TIME_CLKSEL = 1 (Manual Input)
|
||||
#define HTCFG_TIME_PCLK_DIV (0) // 0 ~ 3. (/1, /2, /4, /8)
|
||||
#define HTCFG_TIME_TICKHZ (1000) // Hz, not applicable for BFTM, fixed TICKHZ to HTCFG_TIME_CLKSRC for BFTM
|
||||
#define HTCFG_TIME_MULTIPLE (1) // MUST be 1, 2, 4, 8. TICK = COUNT / MULTIPLE. Not applicable for BFTM.
|
||||
/*
|
||||
|
||||
Timer Clock = (Core Clock) / (APB Peripheral Clock Prescaler)
|
||||
HTCFG_TIME_CLKSRC = (_HTCFG_TIME_CORECLK) / (2^HTCFG_TIME_PCLK_DIV)
|
||||
where _HTCFG_TIME_CORECLK can be LIBCFG_MAX_SPEED or HTCFG_TIME_CLK_MANUAL (selected by HTCFG_TIME_CLKSEL)
|
||||
|
||||
Tick Range: 0 ~ 2^32 / HTCFG_TIME_TICKHZ (maximum tick time)
|
||||
Interrupt Time: _HTCFG_TIME_OVERFLOW_VALUE / (HTCFG_TIME_TICKHZ * HTCFG_TIME_MULTIPLE) Second
|
||||
(Interrupt Time is not applicable for BFTM)
|
||||
|
||||
Example: 32-bit BFTM with 48 MHz Timer Clock
|
||||
HTCFG_TIME_TICKHZ = HTCFG_TIME_CLKSRC = 48000000
|
||||
Tick Range: 0 ~ 2^32 / 48000000 = 0 ~ 89.478485 Second (maximum tick time, return to 0 every 89.478485 Second)
|
||||
BFTM do not use interrupt
|
||||
|
||||
Example: 16-bit GPTM with 1 ms tick
|
||||
HTCFG_TIME_TICKHZ = 1000 (Hz)
|
||||
HTCFG_TIME_MULTIPLE = 1 (1 Timer Count = 1 Tick)
|
||||
Tick Range: 0 ~ 2^32 / 1000 = 0 ~ 4294967 Second = 0 ~ 49.7 Day (maximum tick time, return to 0 every 49.7 Day)
|
||||
Interrupt Time: 65536 / (1000 * 1) = 65.536 Second (Trigger interrupt every 65.536 Second)
|
||||
*/
|
||||
#endif
|
||||
/*
|
||||
//</e>
|
||||
*/
|
||||
|
||||
/* !!! NOTICE !!!
|
||||
* How to adjust the value of High Speed External oscillator (HSE)?
|
||||
The default value of HSE is define by "HSE_VALUE" in "ht32fxxxxx_nn.h".
|
||||
If your board uses a different HSE speed, please add a new compiler preprocessor
|
||||
C define, "HSE_VALUE=n000000" ("n" represents n MHz) in the toolchain/IDE,
|
||||
or edit the "HSE_VALUE" in the "ht32f1xxxx_conf.h" file (this file).
|
||||
*/
|
||||
/*
|
||||
//<e0> Enable User Define HSE Value
|
||||
// <i> Enable user define HSE value to overwrite default "HSE_VALUE" define in "ht32fxxxxx_nn.h".
|
||||
// <o1> HSE Value (Hz)
|
||||
*/
|
||||
#if (0)
|
||||
#define HSE_VALUE 16000000
|
||||
#endif
|
||||
/*
|
||||
//</e>
|
||||
*/
|
||||
|
||||
/*
|
||||
//<q> Enable CKOUT Function
|
||||
*/
|
||||
#define ENABLE_CKOUT 0
|
||||
|
||||
|
||||
/* The DEBUG definition to enter debug mode for library */
|
||||
/*
|
||||
//<q> Library Debug Mode
|
||||
*/
|
||||
#define HT32_LIB_DEBUG 0
|
||||
|
||||
|
||||
/* Enable/disable the specific peripheral inclusion */
|
||||
|
||||
// <h> Library Inclusion Configuration
|
||||
/* ADC -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> ADC Library
|
||||
*/
|
||||
#define _ADC 1
|
||||
|
||||
/* AES -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> AES Library
|
||||
*/
|
||||
#define _AES 1
|
||||
|
||||
/* BFTM ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> BFTM Library
|
||||
*/
|
||||
#define _BFTM 1
|
||||
|
||||
/* Clock Control -------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> Clock Control Library
|
||||
*/
|
||||
#define _CKCU 1
|
||||
|
||||
/* Comparator/OPA ------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> Comparator/OPA Library
|
||||
*/
|
||||
#define _CMP_OPA 1
|
||||
|
||||
/* Comparator ----------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> Comparator Library
|
||||
*/
|
||||
#define _CMP 1
|
||||
|
||||
/* CRC -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> CRC Library
|
||||
*/
|
||||
#define _CRC 1
|
||||
|
||||
/* CSIF ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> CSIF Library
|
||||
*/
|
||||
#define _CSIF 1
|
||||
|
||||
/* EBI -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> EBI Library
|
||||
*/
|
||||
#define _EBI 1
|
||||
|
||||
/* EXTI ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> EXTI Library
|
||||
*/
|
||||
#define _EXTI 1
|
||||
|
||||
/* Flash ---------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> Flash Library
|
||||
*/
|
||||
#define _FLASH 1
|
||||
|
||||
/* GPIO ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> GPIO Library
|
||||
*/
|
||||
#define _GPIO 1
|
||||
|
||||
/* GPTM ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> GPTM Library
|
||||
*/
|
||||
#define _GPTM 1
|
||||
|
||||
/* I2C -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> I2C Library
|
||||
*/
|
||||
#define _I2C 1
|
||||
|
||||
/* I2S -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> I2S Library
|
||||
*/
|
||||
#define _I2S 1
|
||||
|
||||
/* MCTM ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> MCTM Library
|
||||
*/
|
||||
#define _MCTM 1
|
||||
|
||||
/* PDMA ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> PDMA Library
|
||||
*/
|
||||
#define _PDMA 1
|
||||
|
||||
/* PWM -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> PWM Library
|
||||
*/
|
||||
#define _PWM 1
|
||||
|
||||
/* PWRCU ---------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> PWRCU Library
|
||||
*/
|
||||
#define _PWRCU 1
|
||||
|
||||
/* RSTCU ---------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> RSTCU Library
|
||||
*/
|
||||
#define _RSTCU 1
|
||||
|
||||
/* RTC -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> RTC Library
|
||||
*/
|
||||
#define _RTC 1
|
||||
|
||||
/* SCI -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> SCI Library
|
||||
*/
|
||||
#define _SCI 1
|
||||
|
||||
/* SCTM ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> SCTM Library
|
||||
*/
|
||||
#define _SCTM 1
|
||||
|
||||
/* SDIO ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> SDIO Library
|
||||
*/
|
||||
#define _SDIO 1
|
||||
|
||||
/* SPI -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> SPI Library
|
||||
*/
|
||||
#define _SPI 1
|
||||
|
||||
/* USART ---------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q0> USART/UART Library
|
||||
*/
|
||||
#define _USART 1
|
||||
|
||||
/* USBD ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> USB Library
|
||||
*/
|
||||
#define _USB 1
|
||||
|
||||
/* WDT -----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> WDT Library
|
||||
*/
|
||||
#define _WDT 1
|
||||
|
||||
/* Misc ----------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> Misc Library
|
||||
*/
|
||||
#define _MISC 1
|
||||
|
||||
/* Serial --------------------------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> Serial Library
|
||||
*/
|
||||
#define _SERIAL 1
|
||||
|
||||
/* Software Random Number ----------------------------------------------------------------------------------*/
|
||||
/*
|
||||
//<q> Software Random Number Library
|
||||
*/
|
||||
#define _SWRAND 1
|
||||
|
||||
|
||||
// </h>
|
||||
|
||||
#endif
|
||||
28
bsp/ht32/ht32f12366/board/linker_scripts/link.icf
Normal file
28
bsp/ht32/ht32f12366/board/linker_scripts/link.icf
Normal file
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
156
bsp/ht32/ht32f12366/board/linker_scripts/link.lds
Normal file
156
bsp/ht32/ht32f12366/board/linker_scripts/link.lds
Normal file
@@ -0,0 +1,156 @@
|
||||
/*
|
||||
* linker script for AT32 with GNU ld
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 96k /* 96K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
15
bsp/ht32/ht32f12366/board/linker_scripts/link.sct
Normal file
15
bsp/ht32/ht32f12366/board/linker_scripts/link.sct
Normal file
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x00000000 0x0003FC00 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x0003FC00 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00020000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
17
bsp/ht32/ht32f12366/board/src/board.c
Normal file
17
bsp/ht32/ht32f12366/board/src/board.c
Normal file
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
/* This feature will initialize the HT32 chip clock */
|
||||
void rt_hw_board_clock_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
138
bsp/ht32/ht32f12366/board/src/ht32_msp.c
Normal file
138
bsp/ht32/ht32f12366/board/src/ht32_msp.c
Normal file
@@ -0,0 +1,138 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#include "ht32_msp.h"
|
||||
|
||||
/* GPIO configuration for UART */
|
||||
#ifdef BSP_USING_UART
|
||||
void ht32_usart_gpio_init(void *instance)
|
||||
{
|
||||
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
|
||||
HT_USART_TypeDef *usart_x = (HT_USART_TypeDef *)instance;
|
||||
#ifdef BSP_USING_USART0
|
||||
if(HT_USART0 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_USART0_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_USART0_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_USART0_RX_GPIO_PORT,HTCFG_USART0_RX_GPIO_PIN,GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_USART0_TX_GPIO_ID,HTCFG_USART0_TX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_USART0_RX_GPIO_ID,HTCFG_USART0_RX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_USART1
|
||||
if(HT_USART1 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_USART1_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_USART1_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_USART1_RX_GPIO_PORT,HTCFG_USART1_RX_GPIO_PIN,GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_USART1_TX_GPIO_ID,HTCFG_USART1_TX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_USART1_RX_GPIO_ID,HTCFG_USART1_RX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART0
|
||||
if(HT_UART0 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_UART0_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_UART0_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_UART0_RX_GPIO_PORT,HTCFG_UART0_RX_GPIO_PIN,GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_UART0_TX_GPIO_ID,HTCFG_UART0_TX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_UART0_RX_GPIO_ID,HTCFG_UART0_RX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART1
|
||||
if(HT_UART1 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_UART1_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_UART1_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_UART1_RX_GPIO_PORT,HTCFG_UART1_RX_GPIO_PIN,GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_UART1_TX_GPIO_ID,HTCFG_UART1_TX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_UART1_RX_GPIO_ID,HTCFG_UART1_RX_GPIO_PIN,AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/* GPIO configuration for SPI */
|
||||
#ifdef BSP_USING_SPI
|
||||
void ht32_spi_gpio_init(void *instance)
|
||||
{
|
||||
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
|
||||
HT_SPI_TypeDef *spi_x = (HT_SPI_TypeDef *)instance;
|
||||
#ifdef BSP_USING_SPI0
|
||||
if(HT_SPI0 == spi_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_SPI0_SCK_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI0_MISO_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI0_MOSI_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
|
||||
AFIO_GPxConfig(HTCFG_SPI0_SCK_GPIO_ID, HTCFG_SPI0_SCK_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI0_MISO_GPIO_ID, HTCFG_SPI0_MISO_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI0_MOSI_GPIO_ID, HTCFG_SPI0_MOSI_GPIO_PIN, AFIO_FUN_SPI);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI1
|
||||
if(HT_SPI1 == spi_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_SPI1_SCK_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI1_MISO_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI1_MOSI_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
|
||||
AFIO_GPxConfig(HTCFG_SPI1_SCK_GPIO_ID, HTCFG_SPI1_SCK_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI1_MISO_GPIO_ID, HTCFG_SPI1_MISO_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI1_MOSI_GPIO_ID, HTCFG_SPI1_MOSI_GPIO_PIN, AFIO_FUN_SPI);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/* GPIO configuration for I2C */
|
||||
#ifdef BSP_USING_I2C
|
||||
void ht32_i2c_gpio_init(void *instance)
|
||||
{
|
||||
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
|
||||
HT_I2C_TypeDef *i2c_x = (HT_I2C_TypeDef *)instance;
|
||||
#ifdef BSP_USING_I2C0
|
||||
if(HT_I2C0 == i2c_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_I2C0_SCL_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_I2C0_SDA_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
/* Configure GPIO to I2C mode */
|
||||
AFIO_GPxConfig(HTCFG_I2C0_SCL_GPIO_ID,HTCFG_I2C0_SCL_GPIO_PIN,AFIO_FUN_I2C);
|
||||
AFIO_GPxConfig(HTCFG_I2C0_SDA_GPIO_ID,HTCFG_I2C0_SDA_GPIO_PIN,AFIO_FUN_I2C);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C1
|
||||
if(HT_I2C1 == i2c_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_I2C1_SCL_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_I2C1_SDA_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock,ENABLE);
|
||||
/* Configure GPIO to I2C mode */
|
||||
AFIO_GPxConfig(HTCFG_I2C1_SCL_GPIO_ID,HTCFG_I2C1_SCL_GPIO_PIN,AFIO_FUN_I2C);
|
||||
AFIO_GPxConfig(HTCFG_I2C1_SDA_GPIO_ID,HTCFG_I2C1_SDA_GPIO_PIN,AFIO_FUN_I2C);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
BIN
bsp/ht32/ht32f12366/figures/board.png
Normal file
BIN
bsp/ht32/ht32f12366/figures/board.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 411 KiB |
1219
bsp/ht32/ht32f12366/project.uvoptx
Normal file
1219
bsp/ht32/ht32f12366/project.uvoptx
Normal file
File diff suppressed because it is too large
Load Diff
2439
bsp/ht32/ht32f12366/project.uvprojx
Normal file
2439
bsp/ht32/ht32f12366/project.uvprojx
Normal file
File diff suppressed because it is too large
Load Diff
273
bsp/ht32/ht32f12366/rtconfig.h
Normal file
273
bsp/ht32/ht32f12366/rtconfig.h
Normal file
@@ -0,0 +1,273 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_CPUS_NR 1
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_USING_DEBUG
|
||||
#define RT_DEBUGING_COLOR
|
||||
#define RT_DEBUGING_CONTEXT
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_MEMHEAP_FAST_MODE
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "usart0"
|
||||
#define RT_VER_NUM 0x50100
|
||||
#define RT_BACKTRACE_LEVEL_MAX_NR 32
|
||||
#define RT_USING_HW_ATOMIC
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M3
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
#define FINSH_USING_OPTION_COMPLETION
|
||||
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_SPI
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
/* ISO-ANSI C layer */
|
||||
|
||||
/* Timezone and Daylight Saving Time */
|
||||
|
||||
#define RT_LIBC_USING_LIGHT_TZ_DST
|
||||
#define RT_LIBC_TZ_DEFAULT_HOUR 8
|
||||
#define RT_LIBC_TZ_DEFAULT_MIN 0
|
||||
#define RT_LIBC_TZ_DEFAULT_SEC 0
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Memory protection */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* CYW43012 WiFi */
|
||||
|
||||
|
||||
/* BL808 WiFi */
|
||||
|
||||
|
||||
/* CYW43439 WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* HAL & SDK Drivers */
|
||||
|
||||
/* STM32 HAL & SDK Drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects and Demos */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_FAMILY_HT32
|
||||
#define SOC_SERIES_HT32F1
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_HT32F12366
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART0
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
#endif
|
||||
152
bsp/ht32/ht32f12366/rtconfig.py
Normal file
152
bsp/ht32/ht32f12366/rtconfig.py
Normal file
@@ -0,0 +1,152 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m3'
|
||||
CROSS_TOOL='keil'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
# EXEC_PATH = r'D:\keil5\keil_v532\UV4'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M3 '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M3'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M3'
|
||||
AFLAGS += ' --fpu None'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
|
||||
179
bsp/ht32/ht32f12366/template.uvoptx
Normal file
179
bsp/ht32/ht32f12366/template.uvoptx
Normal file
@@ -0,0 +1,179 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<nTsel>2</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"Any" -UAny -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN2 -FF0HT32F.FLM -FS00 -FL0100000 -FP0($$Device:HT32F12366$ARM\Flash\HT32F.FLM) -FF1HT32F_OPT.FLM -FS11FF00000 -FL11000 -FP1($$Device:HT32F12366$ARM\Flash\HT32F_OPT.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN2 -FF0HT32F -FS00 -FL0100000 -FF1HT32F_OPT -FS11FF00000 -FL11000 -FP0($$Device:HT32F12366$ARM\Flash\HT32F.FLM) -FP1($$Device:HT32F12366$ARM\Flash\HT32F_OPT.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
392
bsp/ht32/ht32f12366/template.uvprojx
Normal file
392
bsp/ht32/ht32f12366/template.uvprojx
Normal file
@@ -0,0 +1,392 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rt-thread</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060422::V5.06 update 4 (build 422)::ARMCC</pCCUsed>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>HT32F12366</Device>
|
||||
<Vendor>Holtek</Vendor>
|
||||
<PackID>Holtek.HT32_DFP.1.0.19</PackID>
|
||||
<PackURL>http://mcu.holtek.com.tw/pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x20000) IROM(0x00000000,0x3FC00) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN2 -FF0HT32F -FS00 -FL0100000 -FF1HT32F_OPT -FS11FF00000 -FL11000 -FP0($$Device:HT32F12366$ARM\Flash\HT32F.FLM) -FP1($$Device:HT32F12366$ARM\Flash\HT32F_OPT.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:HT32F12366$ARM\INC\Holtek\HT32F1xxxx\ht32f1xxxx_01.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:HT32F12366$SVD\HT32F12365_66.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||
<OutputName>rt-thread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> </SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x3fc00</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x3fc00</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_HT32_CHIP=2</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
1094
bsp/ht32/ht32f52352/.config
Normal file
1094
bsp/ht32/ht32f52352/.config
Normal file
File diff suppressed because it is too large
Load Diff
21
bsp/ht32/ht32f52352/Kconfig
Normal file
21
bsp/ht32/ht32f52352/Kconfig
Normal file
@@ -0,0 +1,21 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "board/Kconfig"
|
||||
108
bsp/ht32/ht32f52352/README.md
Normal file
108
bsp/ht32/ht32f52352/README.md
Normal file
@@ -0,0 +1,108 @@
|
||||
# HT32F52352 BSP 说明
|
||||
|
||||
## 简介
|
||||
|
||||
ESK32-30501是合泰基于HT32F52352芯片并针对Cortex®-M0+入门而设计的评估板。本文档是为ESK32-30501开发板提供的BSP(板级支持包)说明。
|
||||
|
||||
主要内容如下：
|
||||
|
||||
- 开发板资源介绍
|
||||
- BSP 快速上手
|
||||
- 进阶使用方法
|
||||
|
||||
通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
ESK32-30501使用32位Arm® Cortex®-M0+高性能、低功耗单片机HT32F52352，针对Cortex®-M0+入门而设计。开发板外观如下图所示：
|
||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：HT32F52352，主频 48MHz，128KB FLASH ，16KB SRAM
|
||||
- 常用外设
|
||||
- LED：2个，（绿色，PC14、PC15）
|
||||
- 常用接口：USB 转串口 、USB SLAVE
|
||||
- 调试接口：板载的 e-Link32 Lite SWD 下载
|
||||
|
||||
开发板更多详细信息请参考合泰官网的相关文档[ESK32-30501](https://www.holtek.com.cn/page/detail/dev_kit/ESK32-30501)。
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **板载外设** | **支持情况** | **备注** |
|
||||
| :--- | :---: | :--- |
|
||||
| USB 转串口 | 支持 | 使用 USART1 |
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| GPIO | 支持 | PA0, PA1...PD3 ---> PIN: 0, 1...51 |
|
||||
| USART | 支持 | USART0/1 |
|
||||
| UART | 支持 | UART0/1 |
|
||||
| SPI | 支持 | SPI0/1 |
|
||||
| I2C | 支持 | 硬件 I2C0/1 |
|
||||
| ADC | 暂不支持 | |
|
||||
| WDT | 暂不支持 | |
|
||||
|
||||
## 使用说明
|
||||
|
||||
使用说明分为如下两个章节：
|
||||
|
||||
- 快速上手
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
|
||||
- 进阶使用
|
||||
|
||||
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多片上资源，实现更多高级功能。
|
||||
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 为仅为开发者提供MDK5的工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
#### 硬件连接
|
||||
|
||||
使用数据线通过板载的 e-Link32 Lite将芯片连接到 PC。
|
||||
|
||||
#### 编译下载
|
||||
|
||||
双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
|
||||
|
||||
> 注：工程默认配置使用CMSIS-DAP下载方式，在通过 e-Link32 Lite 连接开发板的基础上，点击下载按钮即可下载程序到开发板。
|
||||
|
||||
#### 运行结果
|
||||
|
||||
下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，LED1和LED2交替闪烁。
|
||||
|
||||
连接开发板对应串口到 PC（也可以通过e-Link32 Lite的模拟串口将开发板连接到PC）, 在终端工具里调整好串口配置（115200-8-1-N）并打开相应的串口，复位设备后，可以看到 RT-Thread 的输出信息:
|
||||
|
||||
> 注：由于RT-Thread的finsh控制台使用的是命令行的输入形式，推荐使用串口调试工具如：Tabby terminal 或者 Tera Term。
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 5.1.0 build Apr 10 2024 14:39:43
|
||||
2006 - 2024 Copyright by RT-Thread team
|
||||
msh >
|
||||
```
|
||||
|
||||
### 进阶使用
|
||||
|
||||
此 BSP 默认只开启了 GPIO 和 USART1 的功能，如果需使用更多的片上资源，需要利用 ENV 工具对BSP 进行配置，步骤如下：
|
||||
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
|
||||
3. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
## 注意事项
|
||||
|
||||
开发板和芯片的相关资料可以在[合泰官网](https://www.holtek.com.cn/page/index)进行查找和下载，如芯片的数据手册和开发使用手册、开发板的原理图、Keil_v5的pack安装包等。
|
||||
|
||||
## 联系人信息
|
||||
|
||||
维护人:
|
||||
|
||||
- [QT-one](https://github.com/QT-one)
|
||||
15
bsp/ht32/ht32f52352/SConscript
Normal file
15
bsp/ht32/ht32f52352/SConscript
Normal file
@@ -0,0 +1,15 @@
|
||||
# for module compiling
|
||||
import os #包含os库
|
||||
Import('RTT_ROOT') #导入RTT_ROOT对象（RTT_ROOT代表的是RT-Thread源码包）
|
||||
from building import * #把building模块的所有内容都导入到当前模块中
|
||||
|
||||
cwd = GetCurrentDir() #获取当前路径，并将该路径信息保存到变量cwd中
|
||||
objs = [] #创建一个list型变量objs
|
||||
list = os.listdir(cwd) #得到当前目录下的所有子目录，并保存到变量list中
|
||||
|
||||
for d in list: #for循环用d记录循环的次数，直到寻遍所有路径
|
||||
path = os.path.join(cwd, d) #根据d获取到不同的路径
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')): #如果该路径下存在名为SConscript的文件
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript')) #将路径中SConscript文件内的源码读取到objs中
|
||||
|
||||
Return('objs') #将objs返回出去
|
||||
60
bsp/ht32/ht32f52352/SConstruct
Normal file
60
bsp/ht32/ht32f52352/SConstruct
Normal file
@@ -0,0 +1,60 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
ht32_library = 'HT32_STD_5xxxx_FWLib'
|
||||
rtconfig.BSP_LIBRARY_TYPE = ht32_library
|
||||
|
||||
# include libraries
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, ht32_library, 'SConscript')))
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'ht32_drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
21
bsp/ht32/ht32f52352/applications/SConscript
Normal file
21
bsp/ht32/ht32f52352/applications/SConscript
Normal file
@@ -0,0 +1,21 @@
|
||||
#导入其他模块的变量
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
|
||||
#导入使用到的模块
|
||||
from building import *
|
||||
|
||||
#获取当前目录的路径
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
#创建一个列表，用于保存需要使用到的C文件路径
|
||||
src = Glob('*c')
|
||||
|
||||
#创建一个列表，用于保存需要包含的H文件路径
|
||||
path = [cwd]
|
||||
|
||||
#创建一个组别
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = path)
|
||||
|
||||
#返回创建好的组别
|
||||
Return('group')
|
||||
37
bsp/ht32/ht32f52352/applications/main.c
Normal file
37
bsp/ht32/ht32f52352/applications/main.c
Normal file
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "board.h"
|
||||
|
||||
/* defined the led2 pin: pc14 */
|
||||
#define LED1_PIN GET_PIN(C, 14)
|
||||
/* defined the led3 pin: pc15 */
|
||||
#define LED2_PIN GET_PIN(C, 15)
|
||||
|
||||
int main(void)
|
||||
{
|
||||
rt_uint32_t speed = 200;
|
||||
/* set led1 pin mode to output */
|
||||
rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
|
||||
/* set led2 pin mode to output */
|
||||
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED1_PIN, PIN_LOW);
|
||||
rt_pin_write(LED2_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(speed);
|
||||
rt_pin_write(LED1_PIN, PIN_HIGH);
|
||||
rt_pin_write(LED2_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(speed);
|
||||
}
|
||||
}
|
||||
77
bsp/ht32/ht32f52352/board/Kconfig
Normal file
77
bsp/ht32/ht32f52352/board/Kconfig
Normal file
@@ -0,0 +1,77 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_HT32F52352
|
||||
bool
|
||||
select SOC_SERIES_HT32F5
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default n
|
||||
select RT_USING_SERIAL
|
||||
if BSP_USING_UART
|
||||
config BSP_USING_USART0
|
||||
bool "Enable USART0"
|
||||
default n
|
||||
|
||||
config BSP_USING_USART1
|
||||
bool "Enable USART1"
|
||||
default n
|
||||
|
||||
config BSP_USING_UART0
|
||||
bool "Enable UART0"
|
||||
default n
|
||||
|
||||
config BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI Bus"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI0
|
||||
bool "Enable SPI0 Bus"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 Bus"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C Bus"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
if BSP_USING_I2C
|
||||
config BSP_USING_I2C0
|
||||
bool "Enable I2C0 Bus"
|
||||
default n
|
||||
|
||||
config BSP_USING_I2C1
|
||||
bool "Enable I2C1 Bus"
|
||||
default n
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
27
bsp/ht32/ht32f52352/board/SConscript
Normal file
27
bsp/ht32/ht32f52352/board/SConscript
Normal file
@@ -0,0 +1,27 @@
|
||||
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = Glob('src/*.c')
|
||||
|
||||
startup_path_prefix = SDK_LIB
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
src += [startup_path_prefix + '/HT32_STD_5xxxx_FWLib/library/Device/Holtek/HT32F5xxxx/Source/GCC/startup_ht32f5xxxx_gcc_01.s']
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
src += [startup_path_prefix + '/HT32_STD_5xxxx_FWLib/library/Device/Holtek/HT32F5xxxx/Source/ARM/startup_ht32f5xxxx_01.s']
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
src += [startup_path_prefix + '/HT32_STD_5xxxx_FWLib/library/Device/Holtek/HT32F5xxxx/Source/IAR/startup_ht32f5xxxx_iar_01.s']
|
||||
|
||||
path = [cwd]
|
||||
path = [cwd + '/inc']
|
||||
|
||||
CPPDEFINES = ['USE_HT32F52352_SK, USE_HT32F52342_52, USE_MEM_HT32F52352']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
64
bsp/ht32/ht32f52352/board/inc/board.h
Normal file
64
bsp/ht32/ht32f52352/board/inc/board.h
Normal file
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "ht32.h"
|
||||
#include "ht32_msp.h"
|
||||
|
||||
#ifdef BSP_USING_GPIO
|
||||
#include "drv_gpio.h"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART
|
||||
#include "drv_usart.h"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI
|
||||
#include "drv_spi.h"
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C
|
||||
#include "drv_i2c.h"
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* whether use board external SRAM memory */
|
||||
#define HT32_EXT_SRAM 0
|
||||
#define HT32_EXT_SRAM_BEGIN 0x68000000
|
||||
#define HT32_EXT_SRAM_END (HT32_EXT_SRAM_BEGIN + HT32_EXT_SRAM*1024)
|
||||
|
||||
/* internal sram memory size */
|
||||
#define HT32_SRAM_END (0x20000000 + LIBCFG_RAM_SIZE)
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#define HEAP_BEGIN ((void *)&__bss_end)
|
||||
#endif
|
||||
#define HEAP_END HT32_SRAM_END
|
||||
|
||||
void rt_hw_board_clock_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
210
bsp/ht32/ht32f52352/board/inc/ht32_msp.h
Normal file
210
bsp/ht32/ht32f52352/board/inc/ht32_msp.h
Normal file
@@ -0,0 +1,210 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#ifndef __HT32_MSP_H__
|
||||
#define __HT32_MSP_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "ht32.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* UART gpio */
|
||||
#ifdef BSP_USING_UART
|
||||
#ifdef BSP_USING_USART0
|
||||
#define HTCFG_USART0_IPN USART0
|
||||
|
||||
#define _HTCFG_USART0_TX_GPIOX A
|
||||
#define _HTCFG_USART0_TX_GPION 2
|
||||
#define _HTCFG_USART0_RX_GPIOX A
|
||||
#define _HTCFG_USART0_RX_GPION 3
|
||||
|
||||
#define HTCFG_USART0_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART0_TX_GPIOX)
|
||||
#define HTCFG_USART0_TX_GPIO_CLK STRCAT2(P, _HTCFG_USART0_TX_GPIOX)
|
||||
#define HTCFG_USART0_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART0_TX_GPIOX)
|
||||
#define HTCFG_USART0_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART0_TX_GPION)
|
||||
|
||||
#define HTCFG_USART0_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART0_RX_GPIOX)
|
||||
#define HTCFG_USART0_RX_GPIO_CLK STRCAT2(P, _HTCFG_USART0_RX_GPIOX)
|
||||
#define HTCFG_USART0_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART0_RX_GPIOX)
|
||||
#define HTCFG_USART0_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART0_RX_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_USART1
|
||||
|
||||
#define HTCFG_USART1_IPN USART1
|
||||
|
||||
#define _HTCFG_USART1_TX_GPIOX A
|
||||
#define _HTCFG_USART1_TX_GPION 4
|
||||
#define _HTCFG_USART1_RX_GPIOX A
|
||||
#define _HTCFG_USART1_RX_GPION 5
|
||||
|
||||
#define HTCFG_USART1_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART1_TX_GPIOX)
|
||||
#define HTCFG_USART1_TX_GPIO_CLK STRCAT2(P, _HTCFG_USART1_TX_GPIOX)
|
||||
#define HTCFG_USART1_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART1_TX_GPIOX)
|
||||
#define HTCFG_USART1_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART1_TX_GPION)
|
||||
|
||||
#define HTCFG_USART1_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_USART1_RX_GPIOX)
|
||||
#define HTCFG_USART1_RX_GPIO_CLK STRCAT2(P, _HTCFG_USART1_RX_GPIOX)
|
||||
#define HTCFG_USART1_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_USART1_RX_GPIOX)
|
||||
#define HTCFG_USART1_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_USART1_RX_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_UART0
|
||||
|
||||
#define HTCFG_UART0_IPN UART0
|
||||
|
||||
#define _HTCFG_UART0_TX_GPIOX B
|
||||
#define _HTCFG_UART0_TX_GPION 2
|
||||
#define _HTCFG_UART0_RX_GPIOX B
|
||||
#define _HTCFG_UART0_RX_GPION 3
|
||||
|
||||
#define HTCFG_UART0_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART0_TX_GPIOX)
|
||||
#define HTCFG_UART0_TX_GPIO_CLK STRCAT2(P, _HTCFG_UART0_TX_GPIOX)
|
||||
#define HTCFG_UART0_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART0_TX_GPIOX)
|
||||
#define HTCFG_UART0_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART0_TX_GPION)
|
||||
|
||||
#define HTCFG_UART0_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART0_RX_GPIOX)
|
||||
#define HTCFG_UART0_RX_GPIO_CLK STRCAT2(P, _HTCFG_UART0_RX_GPIOX)
|
||||
#define HTCFG_UART0_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART0_RX_GPIOX)
|
||||
#define HTCFG_UART0_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART0_RX_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_UART1
|
||||
|
||||
#define HTCFG_UART1_IPN UART1
|
||||
|
||||
#define _HTCFG_UART1_TX_GPIOX B
|
||||
#define _HTCFG_UART1_TX_GPION 4
|
||||
#define _HTCFG_UART1_RX_GPIOX B
|
||||
#define _HTCFG_UART1_RX_GPION 5
|
||||
|
||||
#define HTCFG_UART1_TX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART1_TX_GPIOX)
|
||||
#define HTCFG_UART1_TX_GPIO_CLK STRCAT2(P, _HTCFG_UART1_TX_GPIOX)
|
||||
#define HTCFG_UART1_TX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART1_TX_GPIOX)
|
||||
#define HTCFG_UART1_TX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART1_TX_GPION)
|
||||
|
||||
#define HTCFG_UART1_RX_GPIO_ID STRCAT2(GPIO_P, _HTCFG_UART1_RX_GPIOX)
|
||||
#define HTCFG_UART1_RX_GPIO_CLK STRCAT2(P, _HTCFG_UART1_RX_GPIOX)
|
||||
#define HTCFG_UART1_RX_GPIO_PORT STRCAT2(HT_GPIO, _HTCFG_UART1_RX_GPIOX)
|
||||
#define HTCFG_UART1_RX_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_UART1_RX_GPION)
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* SPI gpio */
|
||||
#ifdef BSP_USING_SPI
|
||||
#ifdef BSP_USING_SPI0
|
||||
|
||||
#define HTCFG_SPI0_IPN SPI0
|
||||
|
||||
#define _HTCFG_SPI0_SCK_GPIOX C
|
||||
#define _HTCFG_SPI0_SCK_GPION 0
|
||||
|
||||
#define _HTCFG_SPI0_MISO_GPIOX A
|
||||
#define _HTCFG_SPI0_MISO_GPION 11
|
||||
|
||||
#define _HTCFG_SPI0_MOSI_GPIOX A
|
||||
#define _HTCFG_SPI0_MOSI_GPION 9
|
||||
|
||||
#define HTCFG_SPI0_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_SCK_GPIOX)
|
||||
#define HTCFG_SPI0_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_SCK_GPIOX)
|
||||
#define HTCFG_SPI0_SCK_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_SCK_GPION)
|
||||
|
||||
#define HTCFG_SPI0_MISO_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_MISO_GPIOX)
|
||||
#define HTCFG_SPI0_MISO_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_MISO_GPIOX)
|
||||
#define HTCFG_SPI0_MISO_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_MISO_GPION)
|
||||
|
||||
#define HTCFG_SPI0_MOSI_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_MOSI_GPIOX)
|
||||
#define HTCFG_SPI0_MOSI_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_MOSI_GPIOX)
|
||||
#define HTCFG_SPI0_MOSI_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI0_MOSI_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI1
|
||||
|
||||
#define HTCFG_SPI1_IPN SPI1
|
||||
|
||||
#define _HTCFG_SPI1_SCK_GPIOX A
|
||||
#define _HTCFG_SPI1_SCK_GPION 15
|
||||
|
||||
#define _HTCFG_SPI1_MISO_GPIOX B
|
||||
#define _HTCFG_SPI1_MISO_GPION 1
|
||||
|
||||
#define _HTCFG_SPI1_MOSI_GPIOX B
|
||||
#define _HTCFG_SPI1_MOSI_GPION 0
|
||||
|
||||
#define HTCFG_SPI1_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_SCK_GPIOX)
|
||||
#define HTCFG_SPI1_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_SCK_GPIOX)
|
||||
#define HTCFG_SPI1_SCK_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_SCK_GPION)
|
||||
|
||||
#define HTCFG_SPI1_MISO_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_MISO_GPIOX)
|
||||
#define HTCFG_SPI1_MISO_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_MISO_GPIOX)
|
||||
#define HTCFG_SPI1_MISO_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_MISO_GPION)
|
||||
|
||||
#define HTCFG_SPI1_MOSI_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_MOSI_GPIOX)
|
||||
#define HTCFG_SPI1_MOSI_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_MOSI_GPIOX)
|
||||
#define HTCFG_SPI1_MOSI_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_SPI1_MOSI_GPION)
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* I2C gpio */
|
||||
#ifdef BSP_USING_I2C
|
||||
#ifdef BSP_USING_I2C0
|
||||
|
||||
#define HTCFG_I2C0_IPN I2C0
|
||||
|
||||
#define _HTCFG_I2C0_SCL_GPIOX C
|
||||
#define _HTCFG_I2C0_SCL_GPION 12
|
||||
|
||||
#define _HTCFG_I2C0_SDA_GPIOX C
|
||||
#define _HTCFG_I2C0_SDA_GPION 13
|
||||
|
||||
#define HTCFG_I2C0_SCL_GPIO_CLK STRCAT2(P, _HTCFG_I2C0_SCL_GPIOX)
|
||||
#define HTCFG_I2C0_SCL_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C0_SCL_GPIOX)
|
||||
#define HTCFG_I2C0_SCL_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SCL_GPION)
|
||||
|
||||
#define HTCFG_I2C0_SDA_GPIO_CLK STRCAT2(P, _HTCFG_I2C0_SDA_GPIOX)
|
||||
#define HTCFG_I2C0_SDA_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C0_SDA_GPIOX)
|
||||
#define HTCFG_I2C0_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SDA_GPION)
|
||||
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C1
|
||||
|
||||
#define HTCFG_I2C1_IPN I2C1
|
||||
|
||||
#define _HTCFG_I2C1_SCL_GPIOX A
|
||||
#define _HTCFG_I2C1_SCL_GPION 0
|
||||
|
||||
#define _HTCFG_I2C1_SDA_GPIOX A
|
||||
#define _HTCFG_I2C1_SDA_GPION 1
|
||||
|
||||
#define HTCFG_I2C1_SCL_GPIO_CLK STRCAT2(P, _HTCFG_I2C1_SCL_GPIOX)
|
||||
#define HTCFG_I2C1_SCL_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C1_SCL_GPIOX)
|
||||
#define HTCFG_I2C1_SCL_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C1_SCL_GPION)
|
||||
|
||||
#define HTCFG_I2C1_SDA_GPIO_CLK STRCAT2(P, _HTCFG_I2C1_SDA_GPIOX)
|
||||
#define HTCFG_I2C1_SDA_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C1_SDA_GPIOX)
|
||||
#define HTCFG_I2C1_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C1_SDA_GPION)
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
void ht32_usart_gpio_init(void *instance);
|
||||
void ht32_spi_gpio_init(void *instance);
|
||||
void ht32_i2c_gpio_init(void *instance);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __HT32_MSP_H__ */
|
||||
453
bsp/ht32/ht32f52352/board/inc/ht32f5xxxx_01_usbdconf.h
Normal file
453
bsp/ht32/ht32f52352/board/inc/ht32f5xxxx_01_usbdconf.h
Normal file
@@ -0,0 +1,453 @@
|
||||
/*********************************************************************************************************//**
|
||||
* @file IP/Example/ht32f5xxxx_01_usbdconf.h
|
||||
* @version $Rev:: 2390 $
|
||||
* @date $Date:: 2017-12-21 #$
|
||||
* @brief The configuration file of USB Device Driver.
|
||||
*************************************************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Firmware Disclaimer Information
|
||||
*
|
||||
* 1. The customer hereby acknowledges and agrees that the program technical documentation, including the
|
||||
* code, which is supplied by Holtek Semiconductor Inc., (hereinafter referred to as "HOLTEK") is the
|
||||
* proprietary and confidential intellectual property of HOLTEK, and is protected by copyright law and
|
||||
* other intellectual property laws.
|
||||
*
|
||||
* 2. The customer hereby acknowledges and agrees that the program technical documentation, including the
|
||||
* code, is confidential information belonging to HOLTEK, and must not be disclosed to any third parties
|
||||
* other than HOLTEK and the customer.
|
||||
*
|
||||
* 3. The program technical documentation, including the code, is provided "as is" and for customer reference
|
||||
* only. After delivery by HOLTEK, the customer shall use the program technical documentation, including
|
||||
* the code, at their own risk. HOLTEK disclaims any expressed, implied or statutory warranties, including
|
||||
* the warranties of merchantability, satisfactory quality and fitness for a particular purpose.
|
||||
*
|
||||
* <h2><center>Copyright (C) Holtek Semiconductor Inc. All rights reserved</center></h2>
|
||||
************************************************************************************************************/
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------------------------------------*/
|
||||
#ifndef __HT32F5XXXX_01_USBDCONF_H
|
||||
#define __HT32F5XXXX_01_USBDCONF_H
|
||||
|
||||
// <e0> Enter Low Power mode when Suspended
|
||||
#define USBDCORE_ENABLE_LOW_POWER (0)
|
||||
// </e>
|
||||
|
||||
#if (USBDCORE_ENABLE_LOW_POWER == 1)
|
||||
#define USBDCore_LowPower() PWRCU_DeepSleep1(PWRCU_SLEEP_ENTRY_WFE)
|
||||
#else
|
||||
#define USBDCore_LowPower(...)
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* USB Interrupt Enable */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <h> USB Interrupt Setting (UIER)
|
||||
// <o0.0> USB Global Interrupt Enable (UGIE) (Default)
|
||||
// <o0.1> Start Of Frame Interrupt Enable (SOFIE)
|
||||
// <o0.2> USB Reset Interrupt Enable (URSTIE) (Default)
|
||||
// <o0.3> Resume Interrupt Enable (RSMIE) (Default)
|
||||
// <o0.4> Suspend Interrupt Enable (SUSPIE) (Default)
|
||||
// <o0.5> Expected Start of Frame Interrupt Enable (ESOFE)
|
||||
// <o0.8> Control Endpoint Interrupt Enable (EP0IE) (Default)
|
||||
// <o0.9> Endpoint1 Interrupt Enable (EP1IE)
|
||||
// <o0.10> Endpoint2 Interrupt Enable (EP2IE)
|
||||
// <o0.11> Endpoint3 Interrupt Enable (EP3IE)
|
||||
// <o0.12> Endpoint4 Interrupt Enable (EP4IE)
|
||||
// <o0.13> Endpoint5 Interrupt Enable (EP5IE)
|
||||
// <o0.14> Endpoint6 Interrupt Enable (EP6IE)
|
||||
// <o0.15> Endpoint7 Interrupt Enable (EP7IE)
|
||||
#define _UIER (0x011D)
|
||||
// </h>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint0 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <h> Control Endpoint0 Configuration
|
||||
// <o0> Endpoint Buffer Length (EPLEN)
|
||||
// <8=> 8 bytes
|
||||
// <16=> 16 bytes
|
||||
// <32=> 32 bytes
|
||||
// <64=> 64 bytes
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP0LEN (64)
|
||||
|
||||
|
||||
// <h> Control Endpoint0 Interrupt Enable Settings (EP0IER)
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) (Default)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) (Default)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
// <o0.8> SETUP Token Packet Received Interrupt Enable (STRXIE)
|
||||
// <o0.9> SETUP Data Packet Received Interrupt Enable (SDRXIE) (Default)
|
||||
// <o0.10> SETUP Data Error Interrupt Enable (SDERIE)
|
||||
// <o0.11> Zero Length Data Packet Received Interrupt Enable (ZLRXIE)
|
||||
#define _EP0_IER (0x212)
|
||||
// </h>
|
||||
// </h>
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint1 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint1 Configuration
|
||||
#define _EP1_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP1_CFG_EPADR (1)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP1_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP1_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP1_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4>
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP1LEN_TMP (8)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP1_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint2 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint2 Configuration
|
||||
#define _EP2_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP2_CFG_EPADR (2)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP2_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP2_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP2_CFG_EPDIR (0)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4>
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP2LEN_TMP (8)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP2_IER (0x002)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint3 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint3 Configuration
|
||||
#define _EP3_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP3_CFG_EPADR (3)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP3_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP3_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP3_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4>
|
||||
/* Maximum: 64 Bytes */
|
||||
#define _EP3LEN_TMP (8)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP3_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint4 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint4 Configuration
|
||||
#define _EP4_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP4_CFG_EPADR (4)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP4_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP4_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP4_CFG_EPDIR (0)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP4LEN_TMP (8)
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP4_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP4_IER (0x02)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint5 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint5 Configuration
|
||||
#define _EP5_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP5_CFG_EPADR (5)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP5_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP5_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP5_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP5LEN_TMP (8)
|
||||
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP5_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP5_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint6 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint6 Configuration
|
||||
#define _EP6_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP6_CFG_EPADR (6)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP6_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP6_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP6_CFG_EPDIR (0)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP6LEN_TMP (8)
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP6_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP6_IER (0x02)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
/* Endpoint7 Configuration Setting */
|
||||
/*----------------------------------------------------------------------------------------------------------*/
|
||||
// <e0> Endpoint7 Configuration
|
||||
#define _EP7_ENABLE (0)
|
||||
|
||||
// <o0> Endpoint Address (EPADR)
|
||||
// <1=> 1
|
||||
// <2=> 2
|
||||
// <3=> 3
|
||||
// <4=> 4
|
||||
// <5=> 5
|
||||
// <6=> 6
|
||||
// <7=> 7
|
||||
#define _EP7_CFG_EPADR (7)
|
||||
|
||||
// <o0.0> Endpoint Enable (EPEN)
|
||||
#define _EP7_CFG_EPEN_TMP (1)
|
||||
|
||||
// <o0> Endpoint Transfer Type
|
||||
// <1=> Isochronous
|
||||
// <2=> Bulk
|
||||
// <3=> Interrupt
|
||||
#define _EP7_TYPR (3)
|
||||
|
||||
// <o0> Endpoint Direction (EPDIR)
|
||||
// <1=> IN
|
||||
// <0=> OUT
|
||||
#define _EP7_CFG_EPDIR (1)
|
||||
|
||||
// <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4>
|
||||
/* Maximum: 1000 Bytes */
|
||||
#define _EP7LEN_TMP (8)
|
||||
|
||||
// <o0> Single/Double Buffer Selection (SDBS)
|
||||
// <0=> Single Buffer
|
||||
// <1=> Double Buffer
|
||||
#define _EP7_CFG_SDBS (0)
|
||||
|
||||
// <h> Endpoint Interrupt Enable Settings (EPIER)
|
||||
// <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1>
|
||||
// <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE)
|
||||
// <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE)
|
||||
// <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE)
|
||||
// <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE)
|
||||
// <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE)
|
||||
// <o0.5> NAK Transmitted Interrupt Enable (NAKIE)
|
||||
// <o0.6> STALL Transmitted Interrupt Enable (STLIE)
|
||||
// <o0.7> USB Error Interrupt Enable (UERIE)
|
||||
#define _EP7_IER (0x10)
|
||||
// </h>
|
||||
// </e>
|
||||
|
||||
#endif
|
||||
569
bsp/ht32/ht32f52352/board/inc/ht32f5xxxx_02_usbdconf.h
Normal file
569
bsp/ht32/ht32f52352/board/inc/ht32f5xxxx_02_usbdconf.h
Normal file
File diff suppressed because it is too large
Load Diff
556
bsp/ht32/ht32f52352/board/inc/ht32f5xxxx_conf.h
Normal file
556
bsp/ht32/ht32f52352/board/inc/ht32f5xxxx_conf.h
Normal file
File diff suppressed because it is too large
Load Diff
28
bsp/ht32/ht32f52352/board/linker_scripts/link.icf
Normal file
28
bsp/ht32/ht32f52352/board/linker_scripts/link.icf
Normal file
@@ -0,0 +1,28 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite, last block CSTACK};
|
||||
156
bsp/ht32/ht32f52352/board/linker_scripts/link.lds
Normal file
156
bsp/ht32/ht32f52352/board/linker_scripts/link.lds
Normal file
@@ -0,0 +1,156 @@
|
||||
/*
|
||||
* linker script for AT32 with GNU ld
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 96k /* 96K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
} > ROM = 0
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > ROM
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >RAM
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > RAM
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
15
bsp/ht32/ht32f52352/board/linker_scripts/link.sct
Normal file
15
bsp/ht32/ht32f52352/board/linker_scripts/link.sct
Normal file
@@ -0,0 +1,15 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x00000000 0x0001FE00 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x0001FE00 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00004000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
17
bsp/ht32/ht32f52352/board/src/board.c
Normal file
17
bsp/ht32/ht32f52352/board/src/board.c
Normal file
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
|
||||
/* This feature will initialize the HT32 chip clock */
|
||||
void rt_hw_board_clock_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
138
bsp/ht32/ht32f52352/board/src/ht32_msp.c
Normal file
138
bsp/ht32/ht32f52352/board/src/ht32_msp.c
Normal file
@@ -0,0 +1,138 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-04-08 QT-one first version
|
||||
*/
|
||||
|
||||
#include "ht32_msp.h"
|
||||
|
||||
/* GPIO configuration for UART */
|
||||
#ifdef BSP_USING_UART
|
||||
void ht32_usart_gpio_init(void *instance)
|
||||
{
|
||||
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
|
||||
HT_USART_TypeDef *usart_x = (HT_USART_TypeDef *)instance;
|
||||
#ifdef BSP_USING_USART0
|
||||
if (HT_USART0 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_USART0_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_USART0_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_USART0_RX_GPIO_PORT, HTCFG_USART0_RX_GPIO_PIN, GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_USART0_TX_GPIO_ID, HTCFG_USART0_TX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_USART0_RX_GPIO_ID, HTCFG_USART0_RX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_USART1
|
||||
if (HT_USART1 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_USART1_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_USART1_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_USART1_RX_GPIO_PORT, HTCFG_USART1_RX_GPIO_PIN, GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_USART1_TX_GPIO_ID, HTCFG_USART1_TX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_USART1_RX_GPIO_ID, HTCFG_USART1_RX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART0
|
||||
if (HT_UART0 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_UART0_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_UART0_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_UART0_RX_GPIO_PORT, HTCFG_UART0_RX_GPIO_PIN, GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_UART0_TX_GPIO_ID, HTCFG_UART0_TX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_UART0_RX_GPIO_ID, HTCFG_UART0_RX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_UART1
|
||||
if (HT_UART1 == usart_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_UART1_TX_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_UART1_RX_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
/* Turn on UxART Rx internal pull up resistor to prevent unknow state */
|
||||
GPIO_PullResistorConfig(HTCFG_UART1_RX_GPIO_PORT, HTCFG_UART1_RX_GPIO_PIN, GPIO_PR_UP);
|
||||
/* Config AFIO mode as UxART function */
|
||||
AFIO_GPxConfig(HTCFG_UART1_TX_GPIO_ID, HTCFG_UART1_TX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
AFIO_GPxConfig(HTCFG_UART1_RX_GPIO_ID, HTCFG_UART1_RX_GPIO_PIN, AFIO_FUN_USART_UART);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/* GPIO configuration for SPI */
|
||||
#ifdef BSP_USING_SPI
|
||||
void ht32_spi_gpio_init(void *instance)
|
||||
{
|
||||
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
|
||||
HT_SPI_TypeDef *spi_x = (HT_SPI_TypeDef *)instance;
|
||||
#ifdef BSP_USING_SPI0
|
||||
if (HT_SPI0 == spi_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_SPI0_SCK_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI0_MISO_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI0_MOSI_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
|
||||
AFIO_GPxConfig(HTCFG_SPI0_SCK_GPIO_ID, HTCFG_SPI0_SCK_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI0_MISO_GPIO_ID, HTCFG_SPI0_MISO_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI0_MOSI_GPIO_ID, HTCFG_SPI0_MOSI_GPIO_PIN, AFIO_FUN_SPI);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI1
|
||||
if (HT_SPI1 == spi_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_SPI1_SCK_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI1_MISO_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_SPI1_MOSI_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
|
||||
AFIO_GPxConfig(HTCFG_SPI1_SCK_GPIO_ID, HTCFG_SPI1_SCK_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI1_MISO_GPIO_ID, HTCFG_SPI1_MISO_GPIO_PIN, AFIO_FUN_SPI);
|
||||
AFIO_GPxConfig(HTCFG_SPI1_MOSI_GPIO_ID, HTCFG_SPI1_MOSI_GPIO_PIN, AFIO_FUN_SPI);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/* GPIO configuration for I2C */
|
||||
#ifdef BSP_USING_I2C
|
||||
void ht32_i2c_gpio_init(void *instance)
|
||||
{
|
||||
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
|
||||
HT_I2C_TypeDef *i2c_x = (HT_I2C_TypeDef *)instance;
|
||||
#ifdef BSP_USING_I2C0
|
||||
if (HT_I2C0 == i2c_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_I2C0_SCL_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_I2C0_SDA_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
/* Configure GPIO to I2C mode */
|
||||
AFIO_GPxConfig(HTCFG_I2C0_SCL_GPIO_ID, HTCFG_I2C0_SCL_GPIO_PIN, AFIO_FUN_I2C);
|
||||
AFIO_GPxConfig(HTCFG_I2C0_SDA_GPIO_ID, HTCFG_I2C0_SDA_GPIO_PIN, AFIO_FUN_I2C);
|
||||
}
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C1
|
||||
if (HT_I2C1 == i2c_x)
|
||||
{
|
||||
CKCUClock.Bit.HTCFG_I2C1_SCL_GPIO_CLK = 1;
|
||||
CKCUClock.Bit.HTCFG_I2C1_SDA_GPIO_CLK = 1;
|
||||
CKCU_PeripClockConfig(CKCUClock, ENABLE);
|
||||
/* Configure GPIO to I2C mode */
|
||||
AFIO_GPxConfig(HTCFG_I2C1_SCL_GPIO_ID, HTCFG_I2C1_SCL_GPIO_PIN, AFIO_FUN_I2C);
|
||||
AFIO_GPxConfig(HTCFG_I2C1_SDA_GPIO_ID, HTCFG_I2C1_SDA_GPIO_PIN, AFIO_FUN_I2C);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
BIN
bsp/ht32/ht32f52352/figures/board.png
Normal file
BIN
bsp/ht32/ht32f52352/figures/board.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 373 KiB |
1183
bsp/ht32/ht32f52352/project.uvoptx
Normal file
1183
bsp/ht32/ht32f52352/project.uvoptx
Normal file
File diff suppressed because it is too large
Load Diff
2424
bsp/ht32/ht32f52352/project.uvprojx
Normal file
2424
bsp/ht32/ht32f52352/project.uvprojx
Normal file
File diff suppressed because it is too large
Load Diff
271
bsp/ht32/ht32f52352/rtconfig.h
Normal file
271
bsp/ht32/ht32f52352/rtconfig.h
Normal file
@@ -0,0 +1,271 @@
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_CPUS_NR 1
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_USING_DEBUG
|
||||
#define RT_DEBUGING_COLOR
|
||||
#define RT_DEBUGING_CONTEXT
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_MEMHEAP
|
||||
#define RT_MEMHEAP_FAST_MODE
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "usart1"
|
||||
#define RT_VER_NUM 0x50100
|
||||
#define RT_BACKTRACE_LEVEL_MAX_NR 32
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M0
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
#define FINSH_USING_OPTION_COMPLETION
|
||||
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_SPI
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
/* ISO-ANSI C layer */
|
||||
|
||||
/* Timezone and Daylight Saving Time */
|
||||
|
||||
#define RT_LIBC_USING_LIGHT_TZ_DST
|
||||
#define RT_LIBC_TZ_DEFAULT_HOUR 8
|
||||
#define RT_LIBC_TZ_DEFAULT_MIN 0
|
||||
#define RT_LIBC_TZ_DEFAULT_SEC 0
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Memory protection */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* CYW43012 WiFi */
|
||||
|
||||
|
||||
/* BL808 WiFi */
|
||||
|
||||
|
||||
/* CYW43439 WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* HAL & SDK Drivers */
|
||||
|
||||
/* STM32 HAL & SDK Drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects and Demos */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_FAMILY_HT32
|
||||
#define SOC_SERIES_HT32F5
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_HT32F52352
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
#endif
|
||||
152
bsp/ht32/ht32f52352/rtconfig.py
Normal file
152
bsp/ht32/ht32f52352/rtconfig.py
Normal file
@@ -0,0 +1,152 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m0'
|
||||
CROSS_TOOL='keil'
|
||||
|
||||
# bsp lib config
|
||||
BSP_LIBRARY_TYPE = None
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
# EXEC_PATH = r'D:\keil5\keil_v532\UV4'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
CXX = PREFIX + 'g++'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Dgcc'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M0 '
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = '-Dewarm'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M0'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M0'
|
||||
AFLAGS += ' --fpu None'
|
||||
AFLAGS += ' -S'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user