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Merge pull request #3034 from xfan1024/stm32-ethernet

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优化STM32以太网驱动
This commit is contained in:
Bernard Xiong
2019-10-28 16:18:49 +08:00
committed by GitHub
parent 381f176859 65afdf050a
commit a29fd11ffb
2 changed files with 113 additions and 114 deletions
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bsp/stm32/libraries/HAL_Drivers/drv_eth.c
+87 -112
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File diff suppressed because it is too large Load Diff
bsp/stm32/libraries/HAL_Drivers/drv_eth.h
+26 -2
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@@ -39,7 +39,7 @@
/* The PHY interrupt source flag register. */
#define PHY_INTERRUPT_FLAG_REG 0x1DU
/* The PHY interrupt mask register. */
#define PHY_INTERRUPT_MSAK_REG 0x1EU
#define PHY_INTERRUPT_MASK_REG 0x1EU
#define PHY_LINK_DOWN_MASK (1<<4)
#define PHY_AUTO_NEGO_COMPLETE_MASK (1<<6)
@@ -48,6 +48,9 @@
#define PHY_10M_MASK (1<<2)
#define PHY_100M_MASK (1<<3)
#define PHY_FULL_DUPLEX_MASK (1<<4)
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
#endif /* PHY_USING_LAN8720A */
#ifdef PHY_USING_DM9161CEP
@@ -55,14 +58,35 @@
#define PHY_10M_MASK ((1<<12) || (1<<13))
#define PHY_100M_MASK ((1<<14) || (1<<15))
#define PHY_FULL_DUPLEX_MASK ((1<<15) || (1<<13))
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
/* The PHY interrupt source flag register. */
#define PHY_INTERRUPT_FLAG_REG 0x15U
/* The PHY interrupt mask register. */
#define PHY_INTERRUPT_MSAK_REG 0x15U
#define PHY_INTERRUPT_MASK_REG 0x15U
#define PHY_LINK_CHANGE_FLAG (1<<2)
#define PHY_LINK_CHANGE_MASK (1<<9)
#define PHY_INT_MASK 0
#endif /* PHY_USING_DM9161CEP */
#ifdef PHY_USING_DP83848C
#define PHY_Status_REG 0x10U
#define PHY_10M_MASK (1<<1)
#define PHY_FULL_DUPLEX_MASK (1<<2)
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
#define PHY_Status_SPEED_100M(sr) (!PHY_Status_SPEED_10M(sr))
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
/* The PHY interrupt source flag register. */
#define PHY_INTERRUPT_FLAG_REG 0x12U
#define PHY_LINK_CHANGE_FLAG (1<<13)
/* The PHY interrupt control register. */
#define PHY_INTERRUPT_CTRL_REG 0x11U
#define PHY_INTERRUPT_EN ((1<<0)|(1<<1))
/* The PHY interrupt mask register. */
#define PHY_INTERRUPT_MASK_REG 0x12U
#define PHY_INT_MASK (1<<5)
#endif /* PHY_USING_DP83848C */
#endif /* __DRV_ETH_H__ */