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Merge pull request #1524 from TanekLiang/imxrt-update-new-sdk

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[bsp][imxrt1052-evk] update sdk to EVKB
This commit is contained in:
Bernard Xiong authored and GitHub committed 2018-06-11 21:51:16 +08:00
2 parents 22d5e3c3a9 7154956a4a
commit a0fc4f3953
137 files changed
+10139 -8335
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bsp/imxrt1052-evk/.config
+74 -24
View File
@@ -84,6 +84,7 @@ CONFIG_FINSH_CMD_SIZE=80
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
@@ -129,6 +130,7 @@ CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_I2C=y
CONFIG_RT_USING_I2C_BITOPS=y
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
CONFIG_RT_USING_RTC=y
@@ -144,6 +146,7 @@ CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_AUDIO is not set
#
# Using USB
@@ -157,7 +160,6 @@ CONFIG_RT_USING_SPI=y
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_POSIX is not set
# CONFIG_HAVE_SYS_SIGNALS is not set
#
# Network stack
@@ -199,6 +201,8 @@ CONFIG_RT_LWIP_TCP_WND=8196
CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=1024
# CONFIG_LWIP_NO_RX_THREAD is not set
# CONFIG_LWIP_NO_TX_THREAD is not set
CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=1024
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
@@ -238,20 +242,6 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# RT-Thread online packages
#
#
# system packages
#
#
# RT-Thread GUI Engine
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
#
# IoT - internet of things
#
@@ -260,6 +250,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
@@ -281,6 +272,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_ONENET is not set
#
# security packages
@@ -299,6 +291,7 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
#
# tools packages
@@ -307,7 +300,32 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_IPERF is not set
#
# system packages
#
#
# RT-Thread GUI Engine
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_GUIENGINE_V200 is not set
# CONFIG_PKG_USING_GUIENGINE_LATEST_VERSION is not set
# CONFIG_GUIENGINE_IMAGE_LODEPNG is not set
# CONFIG_GUIENGINE_IMAGE_PNG is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_STM32F4_HAL is not set
# CONFIG_PKG_USING_STM32F4_DRIVERS is not set
#
# miscellaneous packages
@@ -316,16 +334,48 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_SAMPLES is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
#
# sample package
#
# CONFIG_PKG_USING_SAMPLES is not set
#
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set
#
# Privated Packages of RealThread
#
# CONFIG_PKG_USING_CODEC is not set
# CONFIG_PKG_USING_PLAYER is not set
# CONFIG_PKG_USING_PERSIMMON_SRC is not set
#
# Network Utilities
#
# CONFIG_PKG_USING_MDNS is not set
# CONFIG_PKG_USING_UPNP is not set
# CONFIG_PKG_USING_WLAN_WICED_SRC is not set
# CONFIG_PKG_USING_CLOUDSDK is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_POWER_MANAGER is not set
# CONFIG_PKG_USING_RT_OTA is not set
# CONFIG_PKG_USING_RT_AT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_RTINSIGHT is not set
CONFIG_SOC_IMXRT1052=y
CONFIG_BOARD_USING_HYPERFLASH=y
# CONFIG_BOARD_USING_QSPIFLASH is not set
CONFIG_BOARD_RT1050_EVK=y
# CONFIG_BOARD_RT1050_FIRE is not set
# CONFIG_BOARD_RT1050_ShareBoard is not set
# CONFIG_BOARD_RT1050_ATK is not set
# CONFIG_BOARD_RT1050_SeeedStudio is not set
#
# RT1050 Bsp Config
@@ -365,14 +415,14 @@ CONFIG_LPSPI4_SDI_GPIO_1=y
# CONFIG_RT_USING_SPI_FLASH is not set
#
# Select i2c bus drivers
# Select iic bus drivers
#
CONFIG_LPI2C_CLOCK_SOURCE_DIVIDER=4
CONFIG_RT_USING_I2C1=y
# CONFIG_RT_USING_I2C1_BITOPS is not set
# CONFIG_RT_USING_I2C2 is not set
# CONFIG_RT_USING_I2C3 is not set
# CONFIG_RT_USING_I2C4 is not set
CONFIG_RT_USING_HW_I2C1=y
CONFIG_HW_I2C1_BADURATE_100kHZ=y
# CONFIG_HW_I2C1_BADURATE_400kHZ is not set
# CONFIG_RT_USING_HW_I2C2 is not set
# CONFIG_RT_USING_HW_I2C3 is not set
# CONFIG_RT_USING_HW_I2C4 is not set
#
# Select lcd driver
bsp/imxrt1052-evk/Libraries/MIMXRT1052.h
+2817 -259
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File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/MIMXRT1052_features.h
+67 -445
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File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/SConscript
+1 -1
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@@ -12,7 +12,7 @@ src += Glob('common/chip/*.c')
src += [cwd + '/system_MIMXRT1052.c']
CPPPATH = [ cwd, cwd + '/drivers', cwd + '/utilities', cwd + '/CMSIS/Include']
CPPDEFINES = ['CPU_MIMXRT1052DVL6A', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1']
CPPDEFINES = ['CPU_MIMXRT1052DVL6B', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1']
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
bsp/imxrt1052-evk/Libraries/drivers/fsl_adc.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_adc.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.adc_12b1msps_sar"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_adc.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_adc_etc.c
+18 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,11 @@
#include "fsl_adc_etc.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.adc_etc"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
@@ -90,7 +99,11 @@ void ADC_ETC_Init(ADC_ETC_Type *base, const adc_etc_config_t *config)
/* Set ADC_ETC_CTRL register. */
tmp32 = ADC_ETC_CTRL_EXT0_TRIG_PRIORITY(config->TSC0triggerPriority) |
ADC_ETC_CTRL_EXT1_TRIG_PRIORITY(config->TSC1triggerPriority) |
ADC_ETC_CTRL_PRE_DIVIDER(config->clockPreDivider) | ADC_ETC_CTRL_TRIG_ENABLE(config->XBARtriggerMask);
ADC_ETC_CTRL_PRE_DIVIDER(config->clockPreDivider) | ADC_ETC_CTRL_TRIG_ENABLE(config->XBARtriggerMask)
#if defined(FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL) && FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL
| ADC_ETC_CTRL_DMA_MODE_SEL(config->dmaMode)
#endif /*FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL*/
;
if (config->enableTSCBypass)
{
tmp32 |= ADC_ETC_CTRL_TSC_BYPASS_MASK;
@@ -124,6 +137,9 @@ void ADC_ETC_GetDefaultConfig(adc_etc_config_t *config)
config->enableTSCBypass = true;
config->enableTSC0Trigger = false;
config->enableTSC1Trigger = false;
#if defined(FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL) && FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL
config->dmaMode = kADC_ETC_TrigDMAWithLatchedSignal;
#endif /*FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL*/
config->TSC0triggerPriority = 0U;
config->TSC1triggerPriority = 0U;
config->clockPreDivider = 0U;
bsp/imxrt1052-evk/Libraries/drivers/fsl_adc_etc.h
+20 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -87,6 +91,17 @@ typedef enum _adc_etc_interrupt_enable
kADC_ETC_Done2InterruptEnable = 3U, /* Enable the DONE2 interrupt when ADC conversions complete. */
} adc_etc_interrupt_enable_t;
#if defined(FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL) && FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL
/*!
* @brief DMA mode selection.
*/
typedef enum _adc_etc_dma_mode_selection
{
kADC_ETC_TrigDMAWithLatchedSignal = 0U, /* Trig DMA_REQ with latched signal, REQ will be cleared when ACK and source request cleared. */
kADC_ETC_TrigDMAWithPulsedSignal = 1U, /* Trig DMA_REQ with pulsed signal, REQ will be cleared by ACK only. */
} adc_etc_dma_mode_selection_t;
#endif /*FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL*/
/*!
* @brief ADC_ETC configuration.
*/
@@ -96,6 +111,9 @@ typedef struct _adc_etc_config
Otherwise TSC would trigger ADC through ADC_ETC. */
bool enableTSC0Trigger; /* Enable external TSC0 trigger. It is valid when enableTSCBypass = false. */
bool enableTSC1Trigger; /* Enable external TSC1 trigger. It is valid when enableTSCBypass = false.*/
#if defined(FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL) && FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL
adc_etc_dma_mode_selection_t dmaMode; /* Select the ADC_ETC DMA mode. */
#endif /*FSL_FEATURE_ADC_ETC_HAS_CTRL_DMA_MODE_SEL*/
uint32_t TSC0triggerPriority; /* External TSC0 trigger priority, 7 is highest, 0 is lowest. */
uint32_t TSC1triggerPriority; /* External TSC1 trigger priority, 7 is highest, 0 is lowest. */
uint32_t clockPreDivider; /* Pre-divider for trig delay and interval. Available range is 0-255.
bsp/imxrt1052-evk/Libraries/drivers/fsl_aipstz.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.aipstz"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_aipstz.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -68,7 +72,7 @@ typedef enum _aipstz_peripheral_access_control {
kAIPSTZ_PeripheralAllowUntrustedMaster = 1U,
kAIPSTZ_PeripheralWriteProtected = (1U << 1),
kAIPSTZ_PeripheralRequireSupervisor = (1U << 2),
kAIPSTZ_PeripheralAllowBufferedWrite = (1U << 2)
kAIPSTZ_PeripheralAllowBufferedWrite = (1U << 3)
} aipstz_peripheral_access_control_t;
/*! @brief List of AIPSTZ peripherals. Organized by register offset for higher 32 bits, width for the 8-15 bits and shift for lower 8 bits.*/
bsp/imxrt1052-evk/Libraries/drivers/fsl_aoi.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -29,6 +33,12 @@
*/
#include "fsl_aoi.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.aoi"
#endif
/*******************************************************************************
* Variables
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_aoi.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_bee.c
+11 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.bee"
#endif
/*******************************************************************************
* Variables
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_bee.h
+5 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_cache.c
+23 -13
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -33,7 +37,13 @@
/*******************************************************************************
* Definitions
******************************************************************************/
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.cache_armv7_m7"
#endif
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
#define L2CACHE_OPERATION_TIMEOUT 0xFFFFFU
#define L2CACHE_8WAYS_MASK 0xFFU
#define L2CACHE_16WAYS_MASK 0xFFFFU
@@ -126,7 +136,7 @@ static void L2CACHE_SetAndWaitBackGroundOperate(uint32_t auxCtlReg, uint32_t reg
/* Set the opeartion for all ways/entries of the cache. */
*(uint32_t *)regAddr = mask;
/* Waiting for until the operation is complete. */
while ((*(uint32_t *)regAddr & mask) && timeout)
while ((*(volatile uint32_t *)regAddr & mask) && timeout)
{
__ASM("nop");
timeout--;
@@ -397,7 +407,7 @@ void L2CACHE_LockdownByWayEnable(uint32_t masterId, uint32_t mask, bool enable)
L2CACHEC->LOCKDOWN[masterId].REG9_I_LOCKDOWN = istrReg & ~mask;
}
}
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT > 0 */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
void L1CACHE_InvalidateICacheByRange(uint32_t address, uint32_t size_byte)
{
@@ -420,41 +430,41 @@ void L1CACHE_InvalidateICacheByRange(uint32_t address, uint32_t size_byte)
void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)
{
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
#if defined(FSL_SDK_DISBLE_L2CACHE_PRESENT) && !FSL_SDK_DISBLE_L2CACHE_PRESENT
L2CACHE_InvalidateByRange(address, size_byte);
#endif /* !FSL_SDK_DISBLE_L2CACHE_PRESENT */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT > 0 */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
L1CACHE_InvalidateICacheByRange(address, size_byte);
}
void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)
{
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
#if defined(FSL_SDK_DISBLE_L2CACHE_PRESENT) && !FSL_SDK_DISBLE_L2CACHE_PRESENT
L2CACHE_InvalidateByRange(address, size_byte);
#endif /* !FSL_SDK_DISBLE_L2CACHE_PRESENT */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT > 0 */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
L1CACHE_InvalidateDCacheByRange(address, size_byte);
}
void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte)
{
L1CACHE_CleanDCacheByRange(address, size_byte);
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
#if defined(FSL_SDK_DISBLE_L2CACHE_PRESENT) && !FSL_SDK_DISBLE_L2CACHE_PRESENT
L2CACHE_CleanByRange(address, size_byte);
#endif /* !FSL_SDK_DISBLE_L2CACHE_PRESENT */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT > 0 */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
}
void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)
{
L1CACHE_CleanInvalidateDCacheByRange(address, size_byte);
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
#if defined(FSL_SDK_DISBLE_L2CACHE_PRESENT) && !FSL_SDK_DISBLE_L2CACHE_PRESENT
L2CACHE_CleanInvalidateByRange(address, size_byte);
#endif /* !FSL_SDK_DISBLE_L2CACHE_PRESENT */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT > 0 */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
}
bsp/imxrt1052-evk/Libraries/drivers/fsl_cache.h
+12 -8
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -47,15 +51,15 @@
#define FSL_CACHE_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
/*@}*/
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
#ifndef FSL_SDK_DISBLE_L2CACHE_PRESENT
#define FSL_SDK_DISBLE_L2CACHE_PRESENT 0
#endif
#endif /* (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0) */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
/*******************************************************************************
* Definitions
******************************************************************************/
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
/*! @brief Number of level 2 cache controller ways. */
typedef enum _l2cache_way_num
@@ -133,7 +137,7 @@ typedef struct _l2cache_config
/* ------------------------ other settings -------------------------------------- */
l2cache_writealloc_t writeAlloc;/*!< Write allcoate force option. */
} l2cache_config_t;
#endif /* (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0) */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
/*******************************************************************************
* API
******************************************************************************/
@@ -286,7 +290,7 @@ static inline void L1CACHE_CleanInvalidateDCacheByRange(uint32_t address, uint32
}
/*@}*/
#if (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0)
#if defined(FSL_FEATURE_SOC_L2CACHEC_COUNT) && FSL_FEATURE_SOC_L2CACHEC_COUNT
/*!
* @name Control for L2 pl310 cache
*@{
@@ -414,7 +418,7 @@ void L2CACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte);
void L2CACHE_LockdownByWayEnable(uint32_t masterId, uint32_t mask, bool enable);
/*@}*/
#endif /* (FSL_FEATURE_SOC_L2CACHEC_COUNT > 0) */
#endif /* FSL_FEATURE_SOC_L2CACHEC_COUNT */
/*!
* @name Unified Cache Control for all caches (cortex-m7 L1 cache + l2 pl310)
bsp/imxrt1052-evk/Libraries/drivers/fsl_clock.c
+208 -133
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/drivers/fsl_clock.h
+745 -537
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/drivers/fsl_cmp.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_cmp.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.cmp"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_cmp.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_common.c
+45 -15
View File
@@ -1,10 +1,13 @@
/*
* The Clear BSD License
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -17,6 +20,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -38,6 +42,12 @@ typedef struct _mem_align_control_block
uint16_t offset; /*!< offset from aligned adress to real address */
} mem_align_cb_t;
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.common"
#endif
#ifndef __GIC_PRIO_BITS
#if defined(ENABLE_RAM_VECTOR_TABLE)
uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler)
@@ -99,30 +109,50 @@ uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler)
void EnableDeepSleepIRQ(IRQn_Type interrupt)
{
uint32_t index = 0;
uint32_t intNumber = (uint32_t)interrupt;
while (intNumber >= 32u)
{
index++;
intNumber -= 32u;
}
SYSCON->STARTERSET[index] = 1u << intNumber;
#if (defined(FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS) && (FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS == 1))
{
SYSCON->STARTERP1 = 1u << intNumber;
}
#else
{
uint32_t index = 0;
while (intNumber >= 32u)
{
index++;
intNumber -= 32u;
}
SYSCON->STARTERSET[index] = 1u << intNumber;
}
#endif /* FSL_FEATURE_STARTER_DISCONTINUOUS */
EnableIRQ(interrupt); /* also enable interrupt at NVIC */
}
void DisableDeepSleepIRQ(IRQn_Type interrupt)
{
uint32_t index = 0;
uint32_t intNumber = (uint32_t)interrupt;
while (intNumber >= 32u)
{
index++;
intNumber -= 32u;
}
DisableIRQ(interrupt); /* also disable interrupt at NVIC */
SYSCON->STARTERCLR[index] = 1u << intNumber;
#if (defined(FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS) && (FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS == 1))
{
SYSCON->STARTERP1 &= ~(1u << intNumber);
}
#else
{
uint32_t index = 0;
while (intNumber >= 32u)
{
index++;
intNumber -= 32u;
}
SYSCON->STARTERCLR[index] = 1u << intNumber;
}
#endif /* FSL_FEATURE_STARTER_DISCONTINUOUS */
}
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
bsp/imxrt1052-evk/Libraries/drivers/fsl_common.h
+73 -17
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -65,14 +69,16 @@
/*@}*/
/* Debug console type definition. */
#define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */
#define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console base on UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console base on LPUART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console base on LPSCI. */
#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console base on USBCDC. */
#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console base on USBCDC. */
#define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console base on i.MX UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U /*!< Debug console base on LPC_USART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */
#define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console base on UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console base on LPUART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console base on LPSCI. */
#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console base on USBCDC. */
#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console base on USBCDC. */
#define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console base on i.MX UART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U /*!< Debug console base on LPC_USART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART 8U /*!< Debug console base on LPC_USART. */
#define DEBUG_CONSOLE_DEVICE_TYPE_SWO 9U /*!< Debug console base on SWO. */
/*! @brief Status group numbers. */
enum _status_groups
@@ -140,6 +146,7 @@ enum _status_groups
kStatusGroup_SDMA = 73, /*!< Group number for SDMA status codes. */
kStatusGroup_ICS = 74, /*!< Group number for ICS status codes. */
kStatusGroup_SPDIF = 75, /*!< Group number for SPDIF status codes. */
kStatusGroup_LPC_MINISPI = 76, /*!< Group number for LPC_MINISPI status codes. */
kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */
kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */
kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */
@@ -175,6 +182,13 @@ typedef int32_t status_t;
#include "fsl_reset.h"
#endif
/*
* Macro guard for whether to use default weak IRQ implementation in drivers
*/
#ifndef FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ
#define FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ 1
#endif
/*! @name Min/max macros */
/* @{ */
#if !defined(MIN)
@@ -273,13 +287,6 @@ _Pragma("diag_suppress=Pm120")
((unsigned int)((var) + ((alignbytes)-1)) & (unsigned int)(~(unsigned int)((alignbytes)-1)))
/* @} */
/*! Function to allocate/free L1 cache aligned memory using the malloc/free. */
void *SDK_Malloc(size_t size, size_t alignbytes);
void SDK_Free(void *ptr);
/* @} */
/*! @name Non-cacheable region definition macros */
/* For initialized non-zero non-cacheable variables, please using "AT_NONCACHEABLE_SECTION_INIT(var) ={xx};" or
* "AT_NONCACHEABLE_SECTION_ALIGN_INIT(var) ={xx};" in your projects to define them, for zero-inited non-cacheable variables,
@@ -339,6 +346,37 @@ void SDK_Free(void *ptr);
#endif
/* @} */
/*! @name Time sensitive region */
/* @{ */
#if defined(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE) && FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE
#if (defined(__ICCARM__))
#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"
#define AT_QUICKACCESS_SECTION_DATA(func) func @"DataQuickAccess"
#elif(defined(__ARMCC_VERSION))
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
#elif(defined(__GNUC__))
#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func
#else
#error Toolchain not supported.
#endif /* defined(__ICCARM__) */
#else
#if (defined(__ICCARM__))
#define AT_QUICKACCESS_SECTION_CODE(func) func
#define AT_QUICKACCESS_SECTION_DATA(func) func
#elif(defined(__ARMCC_VERSION))
#define AT_QUICKACCESS_SECTION_CODE(func) func
#define AT_QUICKACCESS_SECTION_DATA(func) func
#elif(defined(__GNUC__))
#define AT_QUICKACCESS_SECTION_CODE(func) func
#define AT_QUICKACCESS_SECTION_DATA(func) func
#else
#error Toolchain not supported.
#endif
#endif /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */
/* @} */
/*******************************************************************************
* API
******************************************************************************/
@@ -511,6 +549,24 @@ void SDK_Free(void *ptr);
void DisableDeepSleepIRQ(IRQn_Type interrupt);
#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
/*!
* @brief Allocate memory with given alignment and aligned size.
*
* This is provided to support the dynamically allocated memory
* used in cache-able region.
* @param size The length required to malloc.
* @param alignbytes The alignment size.
* @retval The allocated memory.
*/
void *SDK_Malloc(size_t size, size_t alignbytes);
/*!
* @brief Free memory.
*
* @param ptr The memory to be release.
*/
void SDK_Free(void *ptr);
#if defined(__cplusplus)
}
#endif
bsp/imxrt1052-evk/Libraries/drivers/fsl_csi.c
+11 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP Semiconductors, Inc.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.csi"
#endif
/* Two frame buffer loaded to CSI register at most. */
#define CSI_MAX_ACTIVE_FRAME_NUM 2
bsp/imxrt1052-evk/Libraries/drivers/fsl_csi.h
+5 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP Semiconductors, Inc.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_dcdc.c
+13 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_dcdc.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.dcdc_1"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
@@ -330,13 +340,12 @@ void DCDC_SetInternalRegulatorConfig(DCDC_Type *base, const dcdc_internal_regula
void DCDC_BootIntoDCM(DCDC_Type *base)
{
base->REG0 &= ~(DCDC_REG0_PWD_ZCD_MASK | DCDC_REG0_PWD_CMP_OFFSET_MASK);
base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x3U) |
base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x4U) |
DCDC_REG2_DCM_SET_CTRL_MASK;
}
void DCDC_BootIntoCCM(DCDC_Type *base)
{
base->REG0 = (~DCDC_REG0_PWD_CMP_OFFSET_MASK & base->REG0) | DCDC_REG0_PWD_ZCD_MASK;
base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x3U) |
DCDC_REG2_DCM_SET_CTRL_MASK;
base->REG2 = (~DCDC_REG2_LOOPCTRL_EN_RCSCALE_MASK & base->REG2) | DCDC_REG2_LOOPCTRL_EN_RCSCALE(0x3U);
}
bsp/imxrt1052-evk/Libraries/drivers/fsl_dcdc.h
+5 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_dcp.c
+11 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.dcp"
#endif
/*! Compile time sizeof() check */
#define BUILD_ASSURE(condition, msg) extern int msg[1 - 2 * (!(condition))] __attribute__((unused))
bsp/imxrt1052-evk/Libraries/drivers/fsl_dcp.h
+5 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_dmamux.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.dmamux"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_dmamux.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_edma.c
+16 -3
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.edma"
#endif
#define EDMA_TRANSFER_ENABLED_MASK 0x80U
/*******************************************************************************
@@ -711,8 +721,10 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
*/
if (tcdRegs->DLAST_SGA == (uint32_t)&handle->tcdPool[currentTcd])
{
/* Clear the DREQ bits for the dynamic scatter gather */
tcdRegs->CSR |= DMA_CSR_DREQ_MASK;
/* Enable scatter/gather also in the TCD registers. */
csr = (tcdRegs->CSR | DMA_CSR_ESG_MASK) & ~DMA_CSR_DREQ_MASK;
csr = tcdRegs->CSR | DMA_CSR_ESG_MASK;
/* Must write the CSR register one-time, because the transfer maybe finished anytime. */
tcdRegs->CSR = csr;
/*
@@ -727,6 +739,7 @@ status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t
*/
if (tcdRegs->CSR & DMA_CSR_ESG_MASK)
{
tcdRegs->CSR &= ~DMA_CSR_DREQ_MASK;
return kStatus_Success;
}
/*
bsp/imxrt1052-evk/Libraries/drivers/fsl_edma.h
+33 -8
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -52,7 +56,7 @@
#define DMA_DCHPRI_INDEX(channel) (((channel) & ~0x03U) | (3 - ((channel)&0x03U)))
/*! @brief Get the pointer of DCHPRIn */
#define DMA_DCHPRIn(base, channel) ((volatile uint8_t *)&(base->DCHPRI3))[DMA_DCHPRI_INDEX(channel)]
#define DMA_DCHPRIn(base, channel) ((volatile uint8_t *)&((base)->DCHPRI3))[DMA_DCHPRI_INDEX(channel)]
/*! @brief eDMA transfer configuration */
typedef enum _edma_transfer_size
@@ -60,6 +64,7 @@ typedef enum _edma_transfer_size
kEDMA_TransferSize1Bytes = 0x0U, /*!< Source/Destination data transfer size is 1 byte every time */
kEDMA_TransferSize2Bytes = 0x1U, /*!< Source/Destination data transfer size is 2 bytes every time */
kEDMA_TransferSize4Bytes = 0x2U, /*!< Source/Destination data transfer size is 4 bytes every time */
kEDMA_TransferSize8Bytes = 0x3U, /*!< Source/Destination data transfer size is 8 bytes every time */
kEDMA_TransferSize16Bytes = 0x4U, /*!< Source/Destination data transfer size is 16 bytes every time */
kEDMA_TransferSize32Bytes = 0x5U, /*!< Source/Destination data transfer size is 32 bytes every time */
} edma_transfer_size_t;
@@ -242,7 +247,24 @@ typedef struct _edma_tcd
/*! @brief Callback for eDMA */
struct _edma_handle;
/*! @brief Define callback function for eDMA. */
/*! @brief Define callback function for eDMA.
*
* This callback function is called in the EDMA interrupt handle.
* In normal mode, run into callback function means the transfer users need is done.
* In scatter gather mode, run into callback function means a transfer control block (tcd) is finished. Not
* all transfer finished, users can get the finished tcd numbers using interface EDMA_GetUnusedTCDNumber.
*
* @param handle EDMA handle pointer, users shall not touch the values inside.
* @param userData The callback user paramter pointer. Users can use this paramter to involve things users need to
* change in EDMA callback function.
* @param transferDone If the current loaded transfer done. In normal mode it means if all transfer done. In scatter
* gather mode, this paramter shows is the current transfer block in EDMA regsiter is done. As the
* load of core is different, it will be different if the new tcd loaded into EDMA registers while
* this callback called. If true, it always means new tcd still not loaded into registers, while
* false means new tcd already loaded into registers.
* @param tcds How many tcds are done from the last callback. This parameter only used in scatter gather mode. It
* tells user how many tcds are finished between the last callback and this.
*/
typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
/*! @brief eDMA transfer handle structure */
@@ -702,7 +724,7 @@ static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)
* @brief Gets the remaining major loop count from the eDMA current channel TCD.
*
* This function checks the TCD (Task Control Descriptor) status for a specified
* eDMA channel and returns the the number of major loop count that has not finished.
* eDMA channel and returns the number of major loop count that has not finished.
*
* @param base eDMA peripheral base address.
* @param channel eDMA channel number.
@@ -774,7 +796,10 @@ void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel);
/*!
* @brief Installs the TCDs memory pool into the eDMA handle.
*
* This function is called after the EDMA_CreateHandle to use scatter/gather feature.
* This function is called after the EDMA_CreateHandle to use scatter/gather feature. This function shall only be used
* while users need to use scatter gather mode. Scatter gather mode enables EDMA to load a new transfer control block
* (tcd) in hardware, and automatically reconfigure that DMA channel for a new transfer.
* Users need to preapre tcd memory and also configure tcds using interface EDMA_SubmitTransfer.
*
* @param handle eDMA handle pointer.
* @param tcdPool A memory pool to store TCDs. It must be 32 bytes aligned.
@@ -786,7 +811,7 @@ void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t
* @brief Installs a callback function for the eDMA transfer.
*
* This callback is called in the eDMA IRQ handler. Use the callback to do something after
* the current major loop transfer completes.
* the current major loop transfer completes. This function will be called every time one tcd finished transfer.
*
* @param handle eDMA handle pointer.
* @param callback eDMA callback function pointer.
@@ -824,8 +849,8 @@ void EDMA_PrepareTransfer(edma_transfer_config_t *config,
* @brief Submits the eDMA transfer request.
*
* This function submits the eDMA transfer request according to the transfer configuration structure.
* If submitting the transfer request repeatedly, this function packs an unprocessed request as
* a TCD and enables scatter/gather feature to process it in the next time.
* In scatter gather mode, call this function will add a configured tcd to the circular list of tcd pool.
* The tcd pools is setup by call function EDMA_InstallTCDMemory before.
*
* @param handle eDMA handle pointer.
* @param config Pointer to eDMA transfer configuration structure.
bsp/imxrt1052-evk/Libraries/drivers/fsl_elcdif.c
+11 -5
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP Semiconductors, Inc.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_elcdif.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.elcdif"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
@@ -286,10 +296,6 @@ status_t ELCDIF_UpdateLut(
for (i = 0; i < count; i++)
{
*regLutData = lutData[i];
for (volatile uint32_t j = 0; j < 0x80; j++)
{
}
}
return kStatus_Success;
bsp/imxrt1052-evk/Libraries/drivers/fsl_elcdif.h
+5 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP Semiconductors, Inc.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_enc.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -33,6 +37,12 @@
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.enc"
#endif
#define ENC_CTRL_W1C_FLAGS (ENC_CTRL_HIRQ_MASK | ENC_CTRL_XIRQ_MASK | ENC_CTRL_DIRQ_MASK | ENC_CTRL_CMPIRQ_MASK)
#define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_SABIRQ_MASK | ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
bsp/imxrt1052-evk/Libraries/drivers/fsl_enc.h
+22 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -303,6 +307,22 @@ void ENC_DoSoftwareLoadInitialPositionValue(ENC_Type *base);
*/
void ENC_SetSelfTestConfig(ENC_Type *base, const enc_self_test_config_t *config);
/*!
* @brief Enable watchdog for ENC module.
*
* @param base ENC peripheral base address
* @param enable Enables or disables the watchdog
*/
void ENC_EnableWatchdog(ENC_Type *base, bool enable);
/*!
* @brief Set initial position value for ENC module.
*
* @param base ENC peripheral base address
* @param value Positive initial value
*/
void ENC_SetInitialPositionValue(ENC_Type *base, uint32_t value);
/* @} */
/*!
bsp/imxrt1052-evk/Libraries/drivers/fsl_enet.c
+92 -120
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/drivers/fsl_enet.h
+30 -23
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -46,7 +50,7 @@
/*! @name Driver version */
/*@{*/
/*! @brief Defines the driver version. */
#define FSL_ENET_DRIVER_VERSION (MAKE_VERSION(2, 2, 1)) /*!< Version 2.2.1. */
#define FSL_ENET_DRIVER_VERSION (MAKE_VERSION(2, 2, 3)) /*!< Version 2.2.3. */
/*@}*/
/*! @name ENET DESCRIPTOR QUEUE */
@@ -194,7 +198,7 @@ typedef enum _enet_mii_mode
*
* Notice: "kENET_MiiSpeed1000M" only supported when mii mode is "kENET_RgmiiMode".
*/
typedef enum _enet_mii_speed
typedef enum _enet_mii_speed
{
kENET_MiiSpeed10M = 0U, /*!< Speed 10 Mbps. */
kENET_MiiSpeed100M = 1U, /*!< Speed 100 Mbps. */
@@ -204,21 +208,21 @@ typedef enum _enet_mii_speed
} enet_mii_speed_t;
/*! @brief Defines the half or full duplex for the MII data interface. */
typedef enum _enet_mii_duplex
typedef enum _enet_mii_duplex
{
kENET_MiiHalfDuplex = 0U, /*!< Half duplex mode. */
kENET_MiiFullDuplex /*!< Full duplex mode. */
} enet_mii_duplex_t;
/*! @brief Define the MII opcode for normal MDIO_CLAUSES_22 Frame. */
typedef enum _enet_mii_write
typedef enum _enet_mii_write
{
kENET_MiiWriteNoCompliant = 0U, /*!< Write frame operation, but not MII-compliant. */
kENET_MiiWriteValidFrame /*!< Write frame operation for a valid MII management frame. */
} enet_mii_write_t;
/*! @brief Defines the read operation for the MII management frame. */
typedef enum _enet_mii_read
typedef enum _enet_mii_read
{
kENET_MiiReadValidFrame = 2U, /*!< Read frame operation for a valid MII management frame. */
kENET_MiiReadNoCompliant = 3U /*!< Read frame operation, but not MII-compliant. */
@@ -226,7 +230,8 @@ typedef enum _enet_mii_read
#if defined(FSL_FEATURE_ENET_HAS_EXTEND_MDIO) && FSL_FEATURE_ENET_HAS_EXTEND_MDIO
/*! @brief Define the MII opcode for extended MDIO_CLAUSES_45 Frame. */
typedef enum _enet_mii_extend_opcode {
typedef enum _enet_mii_extend_opcode
{
kENET_MiiAddrWrite_C45 = 0U, /*!< Address Write operation. */
kENET_MiiWriteFrame_C45 = 1U, /*!< Write frame operation for a valid MII management frame. */
kENET_MiiReadFrame_C45 = 3U /*!< Read frame operation for a valid MII management frame. */
@@ -245,7 +250,7 @@ typedef enum _enet_mii_extend_opcode {
* configure rxFifoFullThreshold and txFifoWatermark
* in the enet_config_t.
*/
typedef enum _enet_special_control_flag
typedef enum _enet_special_control_flag
{
kENET_ControlFlowControlEnable = 0x0001U, /*!< Enable ENET flow control: pause frame. */
kENET_ControlRxPayloadCheckEnable = 0x0002U, /*!< Enable ENET receive payload length check. */
@@ -268,7 +273,7 @@ typedef enum _enet_special_control_flag
* members. Members usually map to interrupt enable bits in one or more
* peripheral registers.
*/
typedef enum _enet_interrupt_enable
typedef enum _enet_interrupt_enable
{
kENET_BabrInterrupt = ENET_EIR_BABR_MASK, /*!< Babbling receive error interrupt source */
kENET_BabtInterrupt = ENET_EIR_BABT_MASK, /*!< Babbling transmit error interrupt source */
@@ -302,7 +307,7 @@ typedef enum _enet_interrupt_enable
} enet_interrupt_enable_t;
/*! @brief Defines the common interrupt event for callback use. */
typedef enum _enet_event
typedef enum _enet_event
{
kENET_RxEvent, /*!< Receive event. */
kENET_TxEvent, /*!< Transmit event. */
@@ -314,7 +319,7 @@ typedef enum _enet_event
#if defined(FSL_FEATURE_ENET_HAS_AVB) && FSL_FEATURE_ENET_HAS_AVB
/*! @brief Defines certain idle slope for bandwidth fraction. */
typedef enum _enet_idle_slope
typedef enum _enet_idle_slope
{
kENET_IdleSlope1 = 1U, /*!< The bandwidth fraction is about 0.002. */
kENET_IdleSlope2 = 2U, /*!< The bandwidth fraction is about 0.003. */
@@ -339,7 +344,7 @@ typedef enum _enet_idle_slope
#endif /* FSL_FEATURE_ENET_HAS_AVB */
/*! @brief Defines the transmit accelerator configuration. */
typedef enum _enet_tx_accelerator
typedef enum _enet_tx_accelerator
{
kENET_TxAccelIsShift16Enabled = ENET_TACC_SHIFT16_MASK, /*!< Transmit FIFO shift-16. */
kENET_TxAccelIpCheckEnabled = ENET_TACC_IPCHK_MASK, /*!< Insert IP header checksum. */
@@ -347,7 +352,7 @@ typedef enum _enet_tx_accelerator
} enet_tx_accelerator_t;
/*! @brief Defines the receive accelerator configuration. */
typedef enum _enet_rx_accelerator
typedef enum _enet_rx_accelerator
{
kENET_RxAccelPadRemoveEnabled = ENET_RACC_PADREM_MASK, /*!< Padding removal for short IP frames. */
kENET_RxAccelIpCheckEnabled = ENET_RACC_IPDIS_MASK, /*!< Discard with wrong IP header checksum. */
@@ -358,7 +363,7 @@ typedef enum _enet_rx_accelerator
#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
/*! @brief Defines the ENET PTP message related constant. */
typedef enum _enet_ptp_event_type
typedef enum _enet_ptp_event_type
{
kENET_PtpEventMsgType = 3U, /*!< PTP event message type. */
kENET_PtpSrcPortIdLen = 10U, /*!< PTP message sequence id length. */
@@ -367,7 +372,7 @@ typedef enum _enet_ptp_event_type
} enet_ptp_event_type_t;
/*! @brief Defines the IEEE 1588 PTP timer channel numbers. */
typedef enum _enet_ptp_timer_channel
typedef enum _enet_ptp_timer_channel
{
kENET_PtpTimerChannel1 = 0U, /*!< IEEE 1588 PTP timer Channel 1. */
kENET_PtpTimerChannel2, /*!< IEEE 1588 PTP timer Channel 2. */
@@ -481,14 +486,16 @@ typedef struct _enet_data_error_stats
*/
typedef struct _enet_buffer_config
{
uint16_t rxBdNumber; /*!< Receive buffer descriptor number. */
uint16_t txBdNumber; /*!< Transmit buffer descriptor number. */
uint32_t rxBuffSizeAlign; /*!< Aligned receive data buffer size. */
uint32_t txBuffSizeAlign; /*!< Aligned transmit data buffer size. */
volatile enet_rx_bd_struct_t *rxBdStartAddrAlign; /*!< Aligned receive buffer descriptor start address: should be non-cacheable. */
volatile enet_tx_bd_struct_t *txBdStartAddrAlign; /*!< Aligned transmit buffer descriptor start address: should be non-cacheable. */
uint8_t *rxBufferAlign; /*!< Receive data buffer start address. */
uint8_t *txBufferAlign; /*!< Transmit data buffer start address. */
uint16_t rxBdNumber; /*!< Receive buffer descriptor number. */
uint16_t txBdNumber; /*!< Transmit buffer descriptor number. */
uint32_t rxBuffSizeAlign; /*!< Aligned receive data buffer size. */
uint32_t txBuffSizeAlign; /*!< Aligned transmit data buffer size. */
volatile enet_rx_bd_struct_t
*rxBdStartAddrAlign; /*!< Aligned receive buffer descriptor start address: should be non-cacheable. */
volatile enet_tx_bd_struct_t
*txBdStartAddrAlign; /*!< Aligned transmit buffer descriptor start address: should be non-cacheable. */
uint8_t *rxBufferAlign; /*!< Receive data buffer start address. */
uint8_t *txBufferAlign; /*!< Transmit data buffer start address. */
} enet_buffer_config_t;
#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
bsp/imxrt1052-evk/Libraries/drivers/fsl_ewm.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_ewm.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.ewm"
#endif
/*******************************************************************************
* Code
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_ewm.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexcan.c
+226 -302
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexcan.h
+56 -30
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -44,7 +48,7 @@
/*! @name Driver version */
/*@{*/
/*! @brief FlexCAN driver version 2.2.0. */
#define FLEXCAN_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
#define FSL_FLEXCAN_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
/*@}*/
/*! @brief FlexCAN Frame ID helper macro. */
@@ -68,24 +72,26 @@
(FLEXCAN_ID_STD(id) << 1)) /*!< Standard Rx FIFO Mask helper macro Type A helper macro. */
#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide) \
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
(((uint32_t)(id) & 0x7FF) << 19)) /*!< Standard Rx FIFO Mask helper macro Type B upper part helper macro. */
(((uint32_t)(id)&0x7FF) << 19)) /*!< Standard Rx FIFO Mask helper macro Type B upper part helper macro. */
#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide) \
(((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
(((uint32_t)(id) & 0x7FF) << 3)) /*!< Standard Rx FIFO Mask helper macro Type B lower part helper macro. */
(((uint32_t)(id)&0x7FF) << 3)) /*!< Standard Rx FIFO Mask helper macro Type B lower part helper macro. */
#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id) \
(((uint32_t)(id) & 0x7F8) << 21) /*!< Standard Rx FIFO Mask helper macro Type C upper part helper macro. */
(((uint32_t)(id)&0x7F8) << 21) /*!< Standard Rx FIFO Mask helper macro Type C upper part helper macro. */
#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id) \
(((uint32_t)(id) & 0x7F8) << 13) /*!< Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro. */
(((uint32_t)(id)&0x7F8) << 13) /*!< Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro. */
#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id) \
(((uint32_t)(id) & 0x7F8) << 5) /*!< Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro. */
(((uint32_t)(id)&0x7F8) << 5) /*!< Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro. */
#define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) \
(((uint32_t)(id) & 0x7F8) >> 3) /*!< Standard Rx FIFO Mask helper macro Type C lower part helper macro. */
(((uint32_t)(id)&0x7F8) >> 3) /*!< Standard Rx FIFO Mask helper macro Type C lower part helper macro. */
#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) \
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
(FLEXCAN_ID_EXT(id) << 1)) /*!< Extend Rx FIFO Mask helper macro Type A helper macro. */
#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide) \
(((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
((FLEXCAN_ID_EXT(id) & 0x1FFF8000) << 1)) /*!< Extend Rx FIFO Mask helper macro Type B upper part helper macro. */
( \
((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
((FLEXCAN_ID_EXT(id) & 0x1FFF8000) \
<< 1)) /*!< Extend Rx FIFO Mask helper macro Type B upper part helper macro. */
#define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide) \
(((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
((FLEXCAN_ID_EXT(id) & 0x1FFF8000) >> \
@@ -119,9 +125,10 @@
#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id) \
FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW( \
id) /*!< Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro. */
#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id) \
FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) /*!< Standard Rx FIFO Filter helper macro Type C lower part helper macro. \
*/
#define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id) \
FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW( \
id) /*!< Standard Rx FIFO Filter helper macro Type C lower part helper macro. \ \ \ \ \ \
*/
#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide) \
FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type A helper macro. */
#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide) \
@@ -130,9 +137,10 @@
#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide) \
FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW( \
id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type B lower part helper macro. */
#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id) \
FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id) /*!< Extend Rx FIFO Filter helper macro Type C upper part helper macro. \
*/
#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id) \
FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH( \
id) /*!< Extend Rx FIFO Filter helper macro Type C upper part helper macro. \ \ \ \ \ \
*/
#define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id) \
FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH( \
id) /*!< Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro. */
@@ -363,11 +371,11 @@ typedef struct _flexcan_fd_frame
uint32_t format : 1; /*!< CAN Frame Identifier(STD or EXT format). */
uint32_t srr : 1; /*!< Substitute Remote request. */
uint32_t : 1;
uint32_t code : 4; /*!< Message Buffer Code. */
uint32_t code : 4; /*!< Message Buffer Code. */
uint32_t : 1;
uint32_t esi : 1; /*!< Error State Indicator. */
uint32_t brs : 1; /*!< Bit Rate Switch. */
uint32_t edl : 1; /*!< Extended Data Length. */
uint32_t esi : 1; /*!< Error State Indicator. */
uint32_t brs : 1; /*!< Bit Rate Switch. */
uint32_t edl : 1; /*!< Extended Data Length. */
};
struct
{
@@ -395,6 +403,23 @@ typedef struct _flexcan_fd_frame
} flexcan_fd_frame_t;
#endif
/*! @brief FlexCAN protocol timing characteristic configuration structure. */
typedef struct _flexcan_timing_config
{
uint16_t preDivider; /*!< Clock Pre-scaler Division Factor. */
uint8_t rJumpwidth; /*!< Re-sync Jump Width. */
uint8_t phaseSeg1; /*!< Phase Segment 1. */
uint8_t phaseSeg2; /*!< Phase Segment 2. */
uint8_t propSeg; /*!< Propagation Segment. */
#if (defined(FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE) && FSL_FEATURE_FLEXCAN_HAS_FLEXIBLE_DATA_RATE)
uint16_t fpreDivider; /*!< Fast Clock Pre-scaler Division Factor. */
uint8_t frJumpwidth; /*!< Fast Re-sync Jump Width. */
uint8_t fphaseSeg1; /*!< Fast Phase Segment 1. */
uint8_t fphaseSeg2; /*!< Fast Phase Segment 2. */
uint8_t fpropSeg; /*!< Fast Propagation Segment. */
#endif
} flexcan_timing_config_t;
/*! @brief FlexCAN module configuration structure. */
typedef struct _flexcan_config
{
@@ -412,18 +437,9 @@ typedef struct _flexcan_config
#if (defined(FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT) && FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT)
bool enableDoze; /*!< Enable or Disable Doze Mode. */
#endif
flexcan_timing_config_t timingConfig; /* Protocol timing . */
} flexcan_config_t;
/*! @brief FlexCAN protocol timing characteristic configuration structure. */
typedef struct _flexcan_timing_config
{
uint16_t preDivider; /*!< Clock Pre-scaler Division Factor. */
uint8_t rJumpwidth; /*!< Re-sync Jump Width. */
uint8_t phaseSeg1; /*!< Phase Segment 1. */
uint8_t phaseSeg2; /*!< Phase Segment 2. */
uint8_t propSeg; /*!< Propagation Segment. */
} flexcan_timing_config_t;
/*!
* @brief FlexCAN Receive Message Buffer configuration structure
*
@@ -510,6 +526,14 @@ extern "C" {
* @{
*/
/*!
* @brief Get the FlexCAN instance from peripheral base address.
*
* @param base FlexCAN peripheral base address.
* @return FlexCAN instance.
*/
uint32_t FLEXCAN_GetInstance(CAN_Type *base);
/*!
* @brief Initializes a FlexCAN instance.
*
@@ -525,6 +549,7 @@ extern "C" {
* flexcanConfig.enableSelfWakeup = false;
* flexcanConfig.enableIndividMask = false;
* flexcanConfig.enableDoze = false;
* flexcanConfig.timingConfig = timingConfig;
* FLEXCAN_Init(CAN0, &flexcanConfig, 8000000UL);
* @endcode
*
@@ -556,6 +581,7 @@ void FLEXCAN_Deinit(CAN_Type *base);
* flexcanConfig->enableSelfWakeup = false;
* flexcanConfig->enableIndividMask = false;
* flexcanConfig->enableDoze = false;
* flexcanConfig.timingConfig = timingConfig;
*
* @param config Pointer to the FlexCAN configuration structure.
*/
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio.c
+20 -11
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,12 +38,25 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio"
#endif
/*< @brief user configurable flexio handle count. */
#define FLEXIO_HANDLE_COUNT 2
/*******************************************************************************
* Variables
******************************************************************************/
/*! @brief Pointers to flexio bases for each instance. */
FLEXIO_Type *const s_flexioBases[] = FLEXIO_BASE_PTRS;
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to flexio clocks for each instance. */
const clock_ip_name_t s_flexioClocks[] = FLEXIO_CLOCKS;
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
/*< @brief pointer to array of FLEXIO handle. */
static void *s_flexioHandle[FLEXIO_HANDLE_COUNT];
@@ -50,14 +67,6 @@ static void *s_flexioType[FLEXIO_HANDLE_COUNT];
/*< @brief pointer to array of FLEXIO Isr. */
static flexio_isr_t s_flexioIsr[FLEXIO_HANDLE_COUNT];
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to flexio clocks for each instance. */
const clock_ip_name_t s_flexioClocks[] = FLEXIO_CLOCKS;
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
/*! @brief Pointers to flexio bases for each instance. */
FLEXIO_Type *const s_flexioBases[] = FLEXIO_BASE_PTRS;
/*******************************************************************************
* Codes
******************************************************************************/
@@ -178,7 +187,7 @@ uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer
void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)
{
base->SHIFTCFG[index] = FLEXIO_SHIFTCFG_INSRC(shifterConfig->inputSource)
#if defined(FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH) && FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
#if FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
| FLEXIO_SHIFTCFG_PWIDTH(shifterConfig->parallelWidth)
#endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
| FLEXIO_SHIFTCFG_SSTOP(shifterConfig->shifterStop) |
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio.h
+28 -7
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -43,8 +47,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO driver version 2.0.1. */
#define FSL_FLEXIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
/*! @brief FlexIO driver version 2.0.2. */
#define FSL_FLEXIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
/*@}*/
/*! @brief Calculate FlexIO timer trigger.*/
@@ -185,11 +189,11 @@ typedef enum _flexio_shifter_mode
kFLEXIO_ShifterModeTransmit = 0x2U, /*!< Transmit mode. */
kFLEXIO_ShifterModeMatchStore = 0x4U, /*!< Match store mode. */
kFLEXIO_ShifterModeMatchContinuous = 0x5U, /*!< Match continuous mode. */
#if defined(FSL_FEATURE_FLEXIO_HAS_STATE_MODE) && FSL_FEATURE_FLEXIO_HAS_STATE_MODE
#if FSL_FEATURE_FLEXIO_HAS_STATE_MODE
kFLEXIO_ShifterModeState = 0x6U, /*!< SHIFTBUF contents are used for storing
programmable state attributes. */
#endif /* FSL_FEATURE_FLEXIO_HAS_STATE_MODE */
#if defined(FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE) && FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE
#if FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE
kFLEXIO_ShifterModeLogic = 0x7U, /*!< SHIFTBUF contents are used for implementing
programmable logic look up table. */
#endif /* FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE */
@@ -290,7 +294,7 @@ typedef struct _flexio_shifter_config
flexio_pin_polarity_t pinPolarity; /*!< Shifter Pin Polarity. */
/* Shifter. */
flexio_shifter_mode_t shifterMode; /*!< Configures the mode of the Shifter. */
#if defined(FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH) && FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
#if FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
uint32_t parallelWidth; /*!< Configures the parallel width when using parallel mode.*/
#endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
flexio_shifter_input_source_t inputSource; /*!< Selects the input source for the shifter. */
@@ -301,6 +305,16 @@ typedef struct _flexio_shifter_config
/*! @brief typedef for FlexIO simulated driver interrupt handler.*/
typedef void (*flexio_isr_t)(void *base, void *handle);
/*******************************************************************************
* Variables
******************************************************************************/
/*! @brief Pointers to flexio bases for each instance. */
extern FLEXIO_Type *const s_flexioBases[];
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to flexio clocks for each instance. */
extern const clock_ip_name_t s_flexioClocks[];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
/*******************************************************************************
* API
******************************************************************************/
@@ -357,6 +371,13 @@ void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig);
*/
void FLEXIO_Deinit(FLEXIO_Type *base);
/*!
* @brief Get instance number for FLEXIO module.
*
* @param base FLEXIO peripheral base address.
*/
uint32_t FLEXIO_GetInstance(FLEXIO_Type *base);
/* @} */
/*!
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_i2c_master.c
+13 -11
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio_i2c_master"
#endif
/*! @brief FLEXIO I2C transfer state */
enum _flexio_i2c_master_transfer_states
{
@@ -45,18 +55,10 @@ enum _flexio_i2c_master_transfer_states
kFLEXIO_I2C_ReceiveData = 0x5U, /*!< Receive data transfer phase*/
};
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
extern const clock_ip_name_t s_flexioClocks[];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
extern FLEXIO_Type *const s_flexioBases[];
/*******************************************************************************
* Prototypes
******************************************************************************/
extern uint32_t FLEXIO_GetInstance(FLEXIO_Type *base);
/*!
* @brief Set up master transfer, send slave address and decide the initial
* transfer state.
@@ -97,7 +99,7 @@ static void FLEXIO_I2C_MasterTransferComplete(FLEXIO_I2C_Type *base,
* Codes
******************************************************************************/
uint32_t FLEXIO_I2C_GetInstance(FLEXIO_I2C_Type *base)
static uint32_t FLEXIO_I2C_GetInstance(FLEXIO_I2C_Type *base)
{
return FLEXIO_GetInstance(base->flexioBase);
}
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_i2c_master.h
+8 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -44,8 +48,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO I2C master driver version 2.1.2. */
#define FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION (MAKE_VERSION(2, 1, 2))
/*! @brief FlexIO I2C master driver version 2.1.5. */
#define FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION (MAKE_VERSION(2, 1, 5))
/*@}*/
/*! @brief FlexIO I2C transfer status*/
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_i2s.c
+13 -11
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_flexio_i2s.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio_i2s"
#endif
/*******************************************************************************
* Definitations
******************************************************************************/
@@ -43,8 +53,6 @@ enum _sai_transfer_state
* Prototypes
******************************************************************************/
extern uint32_t FLEXIO_GetInstance(FLEXIO_Type *base);
/*!
* @brief Receive a piece of data in non-blocking way.
*
@@ -68,17 +76,11 @@ static void FLEXIO_I2S_WriteNonBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth,
* Variables
******************************************************************************/
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
extern const clock_ip_name_t s_flexioClocks[];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
extern FLEXIO_Type *const s_flexioBases[];
/*******************************************************************************
* Code
******************************************************************************/
uint32_t FLEXIO_I2S_GetInstance(FLEXIO_I2S_Type *base)
static uint32_t FLEXIO_I2S_GetInstance(FLEXIO_I2S_Type *base)
{
return FLEXIO_GetInstance(base->flexioBase);
}
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_i2s.h
+8 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -44,8 +48,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO I2S driver version 2.1.1. */
#define FSL_FLEXIO_I2S_DRIVER_VERSION (MAKE_VERSION(2, 1, 2))
/*! @brief FlexIO I2S driver version 2.1.4. */
#define FSL_FLEXIO_I2S_DRIVER_VERSION (MAKE_VERSION(2, 1, 4))
/*@}*/
/*! @brief FlexIO I2S transfer status */
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_i2s_edma.c
+13 -3
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,11 +34,17 @@
#include "fsl_flexio_i2s_edma.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio_i2s_edma"
#endif
/*******************************************************************************
* Definitations
******************************************************************************/
/* Used for 32byte aligned */
#define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)address + 32) & ~0x1FU)
#define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)(address) + 32) & ~0x1FU)
/*<! Structure definition for flexio_i2s_edma_private_handle_t. The structure is private. */
typedef struct _flexio_i2s_edma_private_handle
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_i2s_edma.h
+14 -3
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -42,6 +46,12 @@
* Definitions
******************************************************************************/
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO I2S EDMA driver version 2.1.4. */
#define FSL_FLEXIO_I2S_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 1, 4))
/*@}*/
typedef struct _flexio_i2s_edma_handle flexio_i2s_edma_handle_t;
/*! @brief FlexIO I2S eDMA transfer callback function for finish and error */
@@ -155,7 +165,8 @@ status_t FLEXIO_I2S_TransferSendEDMA(FLEXIO_I2S_Type *base,
* @brief Performs a non-blocking FlexIO I2S receive using eDMA.
*
* @note This interface returned immediately after transfer initiates. Users should call
* FLEXIO_I2S_GetReceiveRemainingBytes to poll the transfer status and check whether the FlexIO I2S transfer is finished.
* FLEXIO_I2S_GetReceiveRemainingBytes to poll the transfer status and check whether the FlexIO I2S transfer is
* finished.
*
* @param base FlexIO I2S peripheral base address.
* @param handle FlexIO I2S DMA handle pointer.
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_spi.c
+13 -11
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio_spi"
#endif
/*! @brief FLEXIO SPI transfer state, which is used for SPI transactiaonl APIs' internal state. */
enum _flexio_spi_transfer_states
{
@@ -41,18 +51,10 @@ enum _flexio_spi_transfer_states
kFLEXIO_SPI_Busy, /*!< Transmiter/Receive's queue is not finished. */
};
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
extern const clock_ip_name_t s_flexioClocks[];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
extern FLEXIO_Type *const s_flexioBases[];
/*******************************************************************************
* Prototypes
******************************************************************************/
extern uint32_t FLEXIO_GetInstance(FLEXIO_Type *base);
/*!
* @brief Send a piece of data for SPI.
*
@@ -85,7 +87,7 @@ static void FLEXIO_SPI_TransferReceiveTransaction(FLEXIO_SPI_Type *base, flexio_
* Codes
******************************************************************************/
uint32_t FLEXIO_SPI_GetInstance(FLEXIO_SPI_Type *base)
static uint32_t FLEXIO_SPI_GetInstance(FLEXIO_SPI_Type *base)
{
return FLEXIO_GetInstance(base->flexioBase);
}
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_spi.h
+8 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -45,8 +49,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO SPI driver version 2.1.1. */
#define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
/*! @brief FlexIO SPI driver version 2.1.3. */
#define FSL_FLEXIO_SPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 3))
/*@}*/
#ifndef FLEXIO_SPI_DUMMYDATA
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_spi_edma.c
+13 -3
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -31,8 +35,14 @@
#include "fsl_flexio_spi_edma.h"
/*******************************************************************************
* Definitons
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio_spi_edma"
#endif
/*<! Structure definition for spi_edma_private_handle_t. The structure is private. */
typedef struct _flexio_spi_master_edma_private_handle
{
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_spi_edma.h
+14 -3
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -42,6 +46,12 @@
* Definitions
******************************************************************************/
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO SPI EDMA driver version 2.1.3. */
#define FSL_FLEXIO_SPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 1, 3))
/*@}*/
/*! @brief typedef for flexio_spi_master_edma_handle_t in advance. */
typedef struct _flexio_spi_master_edma_handle flexio_spi_master_edma_handle_t;
@@ -88,7 +98,8 @@ extern "C" {
/*!
* @brief Initializes the FlexIO SPI master eDMA handle.
*
* This function initializes the FlexIO SPI master eDMA handle which can be used for other FlexIO SPI master transactional
* This function initializes the FlexIO SPI master eDMA handle which can be used for other FlexIO SPI master
* transactional
* APIs.
* For a specified FlexIO SPI instance, call this API once to get the initialized handle.
*
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_uart.c
+13 -11
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio_uart"
#endif
/*<! @brief uart transfer state. */
enum _flexio_uart_transfer_states
{
@@ -43,18 +53,10 @@ enum _flexio_uart_transfer_states
kFLEXIO_UART_RxBusy /* RX busy. */
};
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
extern const clock_ip_name_t s_flexioClocks[];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
extern FLEXIO_Type *const s_flexioBases[];
/*******************************************************************************
* Prototypes
******************************************************************************/
extern uint32_t FLEXIO_GetInstance(FLEXIO_Type *base);
/*!
* @brief Get the length of received data in RX ring buffer.
*
@@ -76,7 +78,7 @@ static bool FLEXIO_UART_TransferIsRxRingBufferFull(flexio_uart_handle_t *handle)
* Codes
******************************************************************************/
uint32_t FLEXIO_UART_GetInstance(FLEXIO_UART_Type *base)
static uint32_t FLEXIO_UART_GetInstance(FLEXIO_UART_Type *base)
{
return FLEXIO_GetInstance(base->flexioBase);
}
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_uart.h
+8 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -45,8 +49,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO UART driver version 2.1.2. */
#define FSL_FLEXIO_UART_DRIVER_VERSION (MAKE_VERSION(2, 1, 2))
/*! @brief FlexIO UART driver version 2.1.4. */
#define FSL_FLEXIO_UART_DRIVER_VERSION (MAKE_VERSION(2, 1, 4))
/*@}*/
/*! @brief Error codes for the UART driver. */
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_uart_edma.c
+14 -3
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,12 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexio_uart_edma"
#endif
/*<! Structure definition for uart_edma_private_handle_t. The structure is private. */
typedef struct _flexio_uart_edma_private_handle
{
@@ -51,8 +61,9 @@ enum _flexio_uart_edma_tansfer_states
};
/*******************************************************************************
* Definitions
* Variables
******************************************************************************/
/*< @brief user configurable flexio uart handle count. */
#define FLEXIO_UART_HANDLE_COUNT 2
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexio_uart_edma.h
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -42,6 +46,12 @@
* Definitions
******************************************************************************/
/*! @name Driver version */
/*@{*/
/*! @brief FlexIO UART EDMA driver version 2.1.4. */
#define FSL_FLEXIO_UART_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 1, 4))
/*@}*/
/* Forward declaration of the handle typedef. */
typedef struct _flexio_uart_edma_handle flexio_uart_edma_handle_t;
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexram.c
+14 -5
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,11 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexram"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
@@ -156,8 +165,8 @@ static status_t FLEXRAM_SetTCMSize(uint8_t itcmBankNum, uint8_t dtcmBankNum)
/* dtcm configuration */
if (dtcmBankNum != 0U)
{
IOMUXC_GPR->GPR14 &= ~IOMUXC_GPR_GPR14_CM7_MX6RT_CFGDTCMSZ_MASK;
IOMUXC_GPR->GPR14 |= IOMUXC_GPR_GPR14_CM7_MX6RT_CFGDTCMSZ(FLEXRAM_MapTcmSizeToRegister(dtcmBankNum));
IOMUXC_GPR->GPR14 &= ~IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK;
IOMUXC_GPR->GPR14 |= IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(FLEXRAM_MapTcmSizeToRegister(dtcmBankNum));
IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_INIT_DTCM_EN_MASK;
}
else
@@ -167,8 +176,8 @@ static status_t FLEXRAM_SetTCMSize(uint8_t itcmBankNum, uint8_t dtcmBankNum)
/* itcm configuration */
if (itcmBankNum != 0U)
{
IOMUXC_GPR->GPR14 &= ~IOMUXC_GPR_GPR14_CM7_MX6RT_CFGITCMSZ_MASK;
IOMUXC_GPR->GPR14 |= IOMUXC_GPR_GPR14_CM7_MX6RT_CFGITCMSZ(FLEXRAM_MapTcmSizeToRegister(itcmBankNum));
IOMUXC_GPR->GPR14 &= ~IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK;
IOMUXC_GPR->GPR14 |= IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(FLEXRAM_MapTcmSizeToRegister(itcmBankNum));
IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_INIT_ITCM_EN_MASK;
}
else
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexram.h
+7 -3
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -44,8 +48,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief Driver version 2.0.1. */
#define FSL_FLEXRAM_DRIVER_VERSION (MAKE_VERSION(2U, 0U, 1U))
/*! @brief Driver version 2.0.2. */
#define FSL_FLEXRAM_DRIVER_VERSION (MAKE_VERSION(2U, 0U, 2U))
/*@}*/
/*! @brief flexram write read sel */
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexspi.c
+62 -15
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_flexspi.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexspi"
#endif
/*******************************************************************************
* Definitations
******************************************************************************/
@@ -97,8 +107,10 @@ status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status);
* Variables
******************************************************************************/
#if defined(FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ) && FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ
/*! @brief Pointers to flexspi handles for each instance. */
static void *s_flexspiHandle[FSL_FEATURE_SOC_FLEXSPI_COUNT];
#endif
/*! @brief Pointers to flexspi bases for each instance. */
static FLEXSPI_Type *const s_flexspiBases[] = FLEXSPI_BASE_PTRS;
@@ -247,7 +259,7 @@ void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config)
FLEXSPI_MCR0_HSEN(config->enableHalfSpeedAccess) |
FLEXSPI_MCR0_COMBINATIONEN(config->enableCombination) |
FLEXSPI_MCR0_ATDFEN(config->ahbConfig.enableAHBWriteIpTxFifo) |
FLEXSPI_MCR0_ATDFEN(config->ahbConfig.enableAHBWriteIpRxFifo) | FLEXSPI_MCR0_MDIS_MASK;
FLEXSPI_MCR0_ARDFEN(config->ahbConfig.enableAHBWriteIpRxFifo) | FLEXSPI_MCR0_MDIS_MASK;
base->MCR0 = configValue;
/* Configure MCR1 configurations. */
@@ -256,28 +268,45 @@ void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config)
base->MCR1 = configValue;
/* Configure MCR2 configurations. */
configValue = FLEXSPI_MCR2_RESUMEWAIT(config->ahbConfig.resumeWaitCycle) |
FLEXSPI_MCR2_SCKBDIFFOPT(config->enableSckBDiffOpt) |
FLEXSPI_MCR2_SAMEDEVICEEN(config->enableSameConfigForAll) |
FLEXSPI_MCR2_CLRAHBBUFOPT(config->ahbConfig.enableClearAHBBufferOpt);
configValue = base->MCR2;
configValue &= ~(FLEXSPI_MCR2_RESUMEWAIT_MASK | FLEXSPI_MCR2_SCKBDIFFOPT_MASK | FLEXSPI_MCR2_SAMEDEVICEEN_MASK |
FLEXSPI_MCR2_CLRAHBBUFOPT_MASK);
configValue |= FLEXSPI_MCR2_RESUMEWAIT(config->ahbConfig.resumeWaitCycle) |
FLEXSPI_MCR2_SCKBDIFFOPT(config->enableSckBDiffOpt) |
FLEXSPI_MCR2_SAMEDEVICEEN(config->enableSameConfigForAll) |
FLEXSPI_MCR2_CLRAHBBUFOPT(config->ahbConfig.enableClearAHBBufferOpt);
base->MCR2 = configValue;
/* Configure AHB control items. */
base->AHBCR = FLEXSPI_AHBCR_PREFETCHEN(config->ahbConfig.enableAHBPrefetch) |
FLEXSPI_AHBCR_BUFFERABLEEN(config->ahbConfig.enableAHBBufferable) |
FLEXSPI_AHBCR_CACHABLEEN(config->ahbConfig.enableAHBCachable);
configValue = base->AHBCR;
configValue &= ~(FLEXSPI_AHBCR_READADDROPT_MASK | FLEXSPI_AHBCR_PREFETCHEN_MASK | FLEXSPI_AHBCR_BUFFERABLEEN_MASK |
FLEXSPI_AHBCR_CACHABLEEN_MASK);
configValue |= FLEXSPI_AHBCR_READADDROPT(config->ahbConfig.enableReadAddressOpt) |
FLEXSPI_AHBCR_PREFETCHEN(config->ahbConfig.enableAHBPrefetch) |
FLEXSPI_AHBCR_BUFFERABLEEN(config->ahbConfig.enableAHBBufferable) |
FLEXSPI_AHBCR_CACHABLEEN(config->ahbConfig.enableAHBCachable);
base->AHBCR = configValue;
/* Configure AHB rx buffers. */
for (i = 0; i < FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT - 1; i++)
for (i = 0; i < FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT; i++)
{
base->AHBRXBUFCR0[i] = FLEXSPI_AHBRXBUFCR0_PRIORITY(config->ahbConfig.buffer[i].priority) |
FLEXSPI_AHBRXBUFCR0_MSTRID(config->ahbConfig.buffer[i].masterIndex) |
FLEXSPI_AHBRXBUFCR0_BUFSZ(config->ahbConfig.buffer[i].bufferSize / 8);
configValue = base->AHBRXBUFCR0[i];
configValue &= ~(FLEXSPI_AHBRXBUFCR0_PREFETCHEN_MASK | FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK |
FLEXSPI_AHBRXBUFCR0_MSTRID_MASK | FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK);
configValue |= FLEXSPI_AHBRXBUFCR0_PREFETCHEN(config->ahbConfig.buffer[i].enablePrefetch) |
FLEXSPI_AHBRXBUFCR0_PRIORITY(config->ahbConfig.buffer[i].priority) |
FLEXSPI_AHBRXBUFCR0_MSTRID(config->ahbConfig.buffer[i].masterIndex) |
FLEXSPI_AHBRXBUFCR0_BUFSZ(config->ahbConfig.buffer[i].bufferSize * 8);
base->AHBRXBUFCR0[i] = configValue;
}
/* Configure IP Fifo watermarks. */
base->IPRXFCR &= ~FLEXSPI_IPRXFCR_RXWMRK_MASK;
base->IPRXFCR |= FLEXSPI_IPRXFCR_RXWMRK(config->rxWatermark / 8 - 1);
base->IPTXFCR |= FLEXSPI_IPRXFCR_RXWMRK(config->txWatermark / 8 - 1);
base->IPTXFCR &= ~FLEXSPI_IPTXFCR_TXWMRK_MASK;
base->IPTXFCR |= FLEXSPI_IPTXFCR_TXWMRK(config->txWatermark / 8 - 1);
}
void FLEXSPI_GetDefaultConfig(flexspi_config_t *config)
@@ -299,7 +328,12 @@ void FLEXSPI_GetDefaultConfig(flexspi_config_t *config)
config->ahbConfig.ahbBusTimeoutCycle = 0xFFFFU;
config->ahbConfig.resumeWaitCycle = 0x20U;
memset(config->ahbConfig.buffer, 0, sizeof(config->ahbConfig.buffer));
for (uint8_t i = 0; i < FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT; i++)
{
config->ahbConfig.buffer[i].bufferSize = 256; /* Default buffer size 256 bytes*/
}
config->ahbConfig.enableClearAHBBufferOpt = false;
config->ahbConfig.enableReadAddressOpt = false;
config->ahbConfig.enableAHBPrefetch = false;
config->ahbConfig.enableAHBBufferable = false;
config->ahbConfig.enableAHBCachable = false;
@@ -358,6 +392,15 @@ void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config,
base->DLLCR[index] = FLEXSPI_ConfigureDll(base, config);
/* Configure write mask. */
if (config->enableWriteMask)
{
base->FLSHCR4 &= ~FLEXSPI_FLSHCR4_WMOPT1_MASK;
}
else
{
base->FLSHCR4 |= FLEXSPI_FLSHCR4_WMOPT1_MASK;
}
if (index == 0) /*PortA*/
{
base->FLSHCR4 &= ~FLEXSPI_FLSHCR4_WMENA_MASK;
@@ -591,8 +634,10 @@ void FLEXSPI_TransferCreateHandle(FLEXSPI_Type *base,
handle->completionCallback = callback;
handle->userData = userData;
#if defined(FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ) && FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ
/* Save the context in global variables to support the double weak mechanism. */
s_flexspiHandle[instance] = handle;
#endif
/* Enable NVIC interrupt. */
EnableIRQ(s_flexspiIrqs[instance]);
@@ -785,6 +830,7 @@ void FLEXSPI_TransferHandleIRQ(FLEXSPI_Type *base, flexspi_handle_t *handle)
}
}
#if defined(FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ) && FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ
#if defined(FLEXSPI)
void FLEXSPI_DriverIRQHandler(void)
{
@@ -819,3 +865,4 @@ void FLEXSPI1_DriverIRQHandler(void)
#endif
}
#endif
#endif
bsp/imxrt1052-evk/Libraries/drivers/fsl_flexspi.h
+15 -7
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -46,8 +50,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief FLEXSPI driver version 2.0.1. */
#define FSL_FLEXSPI_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
/*! @brief FLEXSPI driver version 2.0.2. */
#define FSL_FLEXSPI_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
/*@}*/
#define FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNTn(0)
@@ -231,9 +235,11 @@ typedef enum _flexspi_command_type
typedef struct _flexspi_ahbBuffer_config
{
uint8_t priority;
uint8_t masterIndex;
uint16_t bufferSize;
uint8_t priority; /*!< This priority for AHB Master Read which this AHB RX Buffer is assigned. */
uint8_t masterIndex; /*!< AHB Master ID the AHB RX Buffer is assigned. */
uint16_t bufferSize; /*!< AHB buffer size in byte. */
bool enablePrefetch; /*!< AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master, allows
prefetch disable/enable seperately for each master. */
} flexspi_ahbBuffer_config_t;
/*! @brief FLEXSPI configuration structure. */
@@ -269,6 +275,8 @@ typedef struct _flexspi_config
flexspi_ahbBuffer_config_t buffer[FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT]; /*!< AHB buffer size. */
bool enableClearAHBBufferOpt; /*!< Enable/disable automatically clean AHB RX Buffer and TX Buffer
when FLEXSPI returns STOP mode ACK. */
bool enableReadAddressOpt; /*!< Enable/disable remove AHB read burst start address alignment limitation.
when eanble, there is no AHB read burst start address alignment limitation. */
bool enableAHBPrefetch; /*!< Enable/disable AHB read prefetch feature, when enabled, FLEXSPI
will fetch more data than current AHB burst. */
bool enableAHBBufferable; /*!< Enable/disable AHB bufferable write access support, when enabled,
bsp/imxrt1052-evk/Libraries/drivers/fsl_gpc.c
+11 -1
View File
@@ -1,10 +1,13 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -17,6 +20,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -31,6 +35,12 @@
#include "fsl_gpc.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.gpc_1"
#endif
void GPC_EnableIRQ(GPC_Type *base, uint32_t irqId)
{
uint32_t irqRegNum = irqId / 32U;
bsp/imxrt1052-evk/Libraries/drivers/fsl_gpc.h
+5 -1
View File
@@ -1,10 +1,13 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016 NXP
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -17,6 +20,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_gpio.c
+24 -14
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_gpio.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.igpio"
#endif
/*******************************************************************************
* Variables
******************************************************************************/
@@ -76,7 +86,7 @@ static uint32_t GPIO_GetInstance(GPIO_Type *base)
return instance;
}
void GPIO_PinInit(GPIO_Type* base, uint32_t pin, const gpio_pin_config_t* Config)
void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config)
{
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/* Enable GPIO clock. */
@@ -93,7 +103,7 @@ void GPIO_PinInit(GPIO_Type* base, uint32_t pin, const gpio_pin_config_t* Config
}
else
{
GPIO_WritePinOutput(base, pin, Config->outputLogic);
GPIO_PinWrite(base, pin, Config->outputLogic);
base->GDIR |= (1U << pin);
}
@@ -101,20 +111,20 @@ void GPIO_PinInit(GPIO_Type* base, uint32_t pin, const gpio_pin_config_t* Config
GPIO_SetPinInterruptConfig(base, pin, Config->interruptMode);
}
void GPIO_PinWrite(GPIO_Type* base, uint32_t pin, uint8_t output)
void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output)
{
assert(pin < 32);
if (output == 0U)
{
base->DR &= ~(1U << pin); /* Set pin output to low level.*/
base->DR &= ~(1U << pin); /* Set pin output to low level.*/
}
else
{
base->DR |= (1U << pin); /* Set pin output to high level.*/
base->DR |= (1U << pin); /* Set pin output to high level.*/
}
}
void GPIO_PinSetInterruptConfig(GPIO_Type* base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode)
void GPIO_PinSetInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode)
{
volatile uint32_t *icr;
uint32_t icrShift;
@@ -124,7 +134,7 @@ void GPIO_PinSetInterruptConfig(GPIO_Type* base, uint32_t pin, gpio_interrupt_mo
/* Register reset to default value */
base->EDGE_SEL &= ~(1U << pin);
if(pin < 16)
if (pin < 16)
{
icr = &(base->ICR1);
}
@@ -133,21 +143,21 @@ void GPIO_PinSetInterruptConfig(GPIO_Type* base, uint32_t pin, gpio_interrupt_mo
icr = &(base->ICR2);
icrShift -= 16;
}
switch(pinInterruptMode)
switch (pinInterruptMode)
{
case(kGPIO_IntLowLevel):
case (kGPIO_IntLowLevel):
*icr &= ~(3U << (2 * icrShift));
break;
case(kGPIO_IntHighLevel):
case (kGPIO_IntHighLevel):
*icr = (*icr & (~(3U << (2 * icrShift)))) | (1U << (2 * icrShift));
break;
case(kGPIO_IntRisingEdge):
case (kGPIO_IntRisingEdge):
*icr = (*icr & (~(3U << (2 * icrShift)))) | (2U << (2 * icrShift));
break;
case(kGPIO_IntFallingEdge):
case (kGPIO_IntFallingEdge):
*icr |= (3U << (2 * icrShift));
break;
case(kGPIO_IntRisingOrFallingEdge):
case (kGPIO_IntRisingOrFallingEdge):
base->EDGE_SEL |= (1U << pin);
break;
default:
bsp/imxrt1052-evk/Libraries/drivers/fsl_gpio.h
+69 -42
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/drivers/fsl_gpt.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_gpt.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.gpt"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_gpt.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_iomuxc.h
+50 -41
View File
File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/drivers/fsl_kpp.c
+12 -2
View File
@@ -1,8 +1,11 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -15,6 +18,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -32,6 +36,12 @@
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.kpp"
#endif
#define KPP_KEYPAD_SCAN_TIMES (3U)
/*******************************************************************************
* Prototypes
bsp/imxrt1052-evk/Libraries/drivers/fsl_kpp.h
+6 -2
View File
@@ -1,8 +1,11 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -15,6 +18,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpi2c.c
+77 -11
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -36,6 +40,11 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.lpi2c"
#endif
/*! @brief Common sets of flags used by the driver. */
enum _lpi2c_flag_constants
{
@@ -115,14 +124,8 @@ static uint32_t LPI2C_GetCyclesForWidth(uint32_t sourceClock_Hz,
uint32_t maxCycles,
uint32_t prescaler);
/* Not static so it can be used from fsl_lpi2c_edma.c. */
status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status);
static status_t LPI2C_MasterWaitForTxReady(LPI2C_Type *base);
/* Not static so it can be used from fsl_lpi2c_edma.c. */
status_t LPI2C_CheckForBusyBus(LPI2C_Type *base);
static status_t LPI2C_RunTransferStateMachine(LPI2C_Type *base, lpi2c_master_handle_t *handle, bool *isDone);
static void LPI2C_InitTransferStateMachine(lpi2c_master_handle_t *handle);
@@ -156,13 +159,13 @@ static const clock_ip_name_t kLpi2cPeriphClocks[] = LPI2C_PERIPH_CLOCKS;
static lpi2c_master_isr_t s_lpi2cMasterIsr;
/*! @brief Pointers to master handles for each instance. */
static lpi2c_master_handle_t *s_lpi2cMasterHandle[FSL_FEATURE_SOC_LPI2C_COUNT];
static lpi2c_master_handle_t *s_lpi2cMasterHandle[ARRAY_SIZE(kLpi2cBases)];
/*! @brief Pointer to slave IRQ handler for each instance. */
static lpi2c_slave_isr_t s_lpi2cSlaveIsr;
/*! @brief Pointers to slave handles for each instance. */
static lpi2c_slave_handle_t *s_lpi2cSlaveHandle[FSL_FEATURE_SOC_LPI2C_COUNT];
static lpi2c_slave_handle_t *s_lpi2cSlaveHandle[ARRAY_SIZE(kLpi2cBases)];
/*******************************************************************************
* Code
@@ -204,6 +207,9 @@ static uint32_t LPI2C_GetCyclesForWidth(uint32_t sourceClock_Hz,
uint32_t maxCycles,
uint32_t prescaler)
{
assert(sourceClock_Hz > 0);
assert(prescaler > 0);
uint32_t busCycle_ns = 1000000 / (sourceClock_Hz / prescaler / 1000);
uint32_t cycles = 0;
@@ -692,7 +698,7 @@ status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize)
status_t LPI2C_MasterSend(LPI2C_Type *base, const void *txBuff, size_t txSize)
{
uint8_t *buf = (uint8_t *)((void *)txBuff);
const uint8_t *buf = (const uint8_t *)((const void *)txBuff);
assert(txBuff);
@@ -834,6 +840,10 @@ void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base,
/* Clear internal IRQ enables and enable NVIC IRQ. */
LPI2C_MasterDisableInterrupts(base, kMasterIrqFlags);
/* Enable NVIC IRQ, this only enables the IRQ directly connected to the NVIC.
In some cases the LPI2C IRQ is configured through INTMUX, user needs to enable
INTMUX IRQ in application code. */
EnableIRQ(kLpi2cIrqs[instance]);
}
@@ -1352,7 +1362,7 @@ static status_t LPI2C_SlaveCheckAndClearError(LPI2C_Type *base, uint32_t flags)
status_t LPI2C_SlaveSend(LPI2C_Type *base, const void *txBuff, size_t txSize, size_t *actualTxSize)
{
uint8_t *buf = (uint8_t *)((void *)txBuff);
const uint8_t *buf = (const uint8_t *)((const void *)txBuff);
size_t remaining = txSize;
assert(txBuff);
@@ -1804,6 +1814,14 @@ void LPI2C3_DriverIRQHandler(void)
}
#endif
#if defined(LPI2C4)
/* Implementation of LPI2C4 handler named in startup code. */
void LPI2C4_DriverIRQHandler(void)
{
LPI2C_CommonIRQHandler(LPI2C4, 4);
}
#endif
#if defined(CM4_0__LPI2C)
/* Implementation of CM4_0__LPI2C handler named in startup code. */
void M4_0_LPI2C_DriverIRQHandler(void)
@@ -1812,6 +1830,14 @@ void M4_0_LPI2C_DriverIRQHandler(void)
}
#endif
#if defined(CM4__LPI2C)
/* Implementation of CM4__LPI2C handler named in startup code. */
void M4_LPI2C_DriverIRQHandler(void)
{
LPI2C_CommonIRQHandler(CM4__LPI2C, LPI2C_GetInstance(CM4__LPI2C));
}
#endif
#if defined(CM4_1__LPI2C)
/* Implementation of CM4_1__LPI2C handler named in startup code. */
void M4_1_LPI2C_DriverIRQHandler(void)
@@ -1859,3 +1885,43 @@ void DMA_I2C4_INT_DriverIRQHandler(void)
LPI2C_CommonIRQHandler(DMA__LPI2C4, LPI2C_GetInstance(DMA__LPI2C4));
}
#endif
#if defined(ADMA__LPI2C0)
/* Implementation of DMA__LPI2C0 handler named in startup code. */
void ADMA_I2C0_INT_DriverIRQHandler(void)
{
LPI2C_CommonIRQHandler(ADMA__LPI2C0, LPI2C_GetInstance(ADMA__LPI2C0));
}
#endif
#if defined(ADMA__LPI2C1)
/* Implementation of DMA__LPI2C1 handler named in startup code. */
void ADMA_I2C1_INT_DriverIRQHandler(void)
{
LPI2C_CommonIRQHandler(ADMA__LPI2C1, LPI2C_GetInstance(ADMA__LPI2C1));
}
#endif
#if defined(ADMA__LPI2C2)
/* Implementation of DMA__LPI2C2 handler named in startup code. */
void ADMA_I2C2_INT_DriverIRQHandler(void)
{
LPI2C_CommonIRQHandler(ADMA__LPI2C2, LPI2C_GetInstance(ADMA__LPI2C2));
}
#endif
#if defined(ADMA__LPI2C3)
/* Implementation of DMA__LPI2C3 handler named in startup code. */
void ADMA_I2C3_INT_DriverIRQHandler(void)
{
LPI2C_CommonIRQHandler(ADMA__LPI2C3, LPI2C_GetInstance(ADMA__LPI2C3));
}
#endif
#if defined(ADMA__LPI2C4)
/* Implementation of DMA__LPI2C3 handler named in startup code. */
void ADMA_I2C4_INT_DriverIRQHandler(void)
{
LPI2C_CommonIRQHandler(ADMA__LPI2C4, LPI2C_GetInstance(ADMA__LPI2C4));
}
#endif
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpi2c.h
+27 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -45,8 +49,8 @@
/*! @name Driver version */
/*@{*/
/*! @brief LPI2C driver version 2.1.3. */
#define FSL_LPI2C_DRIVER_VERSION (MAKE_VERSION(2, 1, 3))
/*! @brief LPI2C driver version 2.1.5. */
#define FSL_LPI2C_DRIVER_VERSION (MAKE_VERSION(2, 1, 5))
/*@}*/
/*! @brief Timeout times for waiting flag. */
@@ -498,6 +502,12 @@ void LPI2C_MasterDeinit(LPI2C_Type *base);
*/
void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_config_t *config);
/* Not static so it can be used from fsl_lpi2c_edma.c. */
status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status);
/* Not static so it can be used from fsl_lpi2c_edma.c. */
status_t LPI2C_CheckForBusyBus(LPI2C_Type *base);
/*!
* @brief Performs a software reset.
*
@@ -708,6 +718,10 @@ static inline void LPI2C_MasterGetFifoCounts(LPI2C_Type *base, size_t *rxCount,
* The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud
* rate. Do not call this function during a transfer, or the transfer is aborted.
*
* @note Please note that the second parameter is the clock frequency of LPI2C module, the third
* parameter means user configured bus baudrate, this implementation is different from other I2C drivers
* which use baudrate configuration as second parameter and source clock frequency as third parameter.
*
* @param base The LPI2C peripheral base address.
* @param sourceClock_Hz LPI2C functional clock frequency in Hertz.
* @param baudRate_Hz Requested bus frequency in Hertz.
@@ -844,6 +858,11 @@ status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t
* is created, there is not a corresponding destroy handle. If the user wants to
* terminate a transfer, the LPI2C_MasterTransferAbort() API shall be called.
*
*
* @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
* that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
* enable the associated INTMUX IRQ in application.
*
* @param base The LPI2C peripheral base address.
* @param[out] handle Pointer to the LPI2C master driver handle.
* @param callback User provided pointer to the asynchronous callback function.
@@ -935,7 +954,7 @@ void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, lpi2c_master_handle_t *hand
* slaveConfig->sclStall.enableAddress = true;
* slaveConfig->ignoreAck = false;
* slaveConfig->enableReceivedAddressRead = false;
* slaveConfig->sdaGlitchFilterWidth_ns = 0; // TODO determine default width values
* slaveConfig->sdaGlitchFilterWidth_ns = 0;
* slaveConfig->sclGlitchFilterWidth_ns = 0;
* slaveConfig->dataValidDelay_ns = 0;
* slaveConfig->clockHoldTime_ns = 0;
@@ -1188,6 +1207,10 @@ status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_
* is created, there is not a corresponding destroy handle. If the user wants to
* terminate a transfer, the LPI2C_SlaveTransferAbort() API shall be called.
*
* @note The function also enables the NVIC IRQ for the input LPI2C. Need to notice
* that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to
* enable the associated INTMUX IRQ in application.
* @param base The LPI2C peripheral base address.
* @param[out] handle Pointer to the LPI2C slave driver handle.
* @param callback User provided pointer to the asynchronous callback function.
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpi2c_edma.c
+19 -13
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -36,6 +40,11 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.lpi2c_edma"
#endif
/* @brief Mask to align an address to 32 bytes. */
#define ALIGN_32_MASK (0x1fU)
@@ -96,12 +105,6 @@ typedef void (*lpi2c_isr_t)(LPI2C_Type *base, void *handle);
* Prototypes
******************************************************************************/
/* Defined in fsl_lpi2c.c. */
extern status_t LPI2C_CheckForBusyBus(LPI2C_Type *base);
/* Defined in fsl_lpi2c.c. */
extern status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status);
static uint32_t LPI2C_GenerateCommands(lpi2c_master_edma_handle_t *handle);
static void LPI2C_MasterEDMACallback(edma_handle_t *dmaHandle, void *userData, bool isTransferDone, uint32_t tcds);
@@ -446,7 +449,15 @@ status_t LPI2C_MasterTransferAbortEDMA(LPI2C_Type *base, lpi2c_master_edma_handl
static void LPI2C_MasterEDMACallback(edma_handle_t *dmaHandle, void *userData, bool isTransferDone, uint32_t tcds)
{
lpi2c_master_edma_handle_t *handle = (lpi2c_master_edma_handle_t *)userData;
bool hasReceiveData = (handle->transfer.direction == kLPI2C_Read) && (handle->transfer.dataSize);
bool hasReceiveData;
if (!handle)
{
return;
}
hasReceiveData = (handle->transfer.direction == kLPI2C_Read) && (handle->transfer.dataSize);
if (hasReceiveData && !FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(base))
{
if (EDMA_GetNextTCDAddress(handle->tx) != 0)
@@ -455,11 +466,6 @@ static void LPI2C_MasterEDMACallback(edma_handle_t *dmaHandle, void *userData, b
}
}
if (!handle)
{
return;
}
/* Check for errors. */
status_t result = LPI2C_MasterCheckAndClearError(handle->base, LPI2C_MasterGetStatusFlags(handle->base));
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpi2c_edma.h
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -37,6 +41,12 @@
* Definitions
******************************************************************************/
/*! @name Driver version */
/*@{*/
/*! @brief LPI2C EDMA driver version 2.1.5. */
#define FSL_LPI2C_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 1, 5))
/*@}*/
/*!
* @addtogroup lpi2c_master_edma_driver
* @{
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpspi.c
+46 -17
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -33,6 +37,12 @@
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.lpspi"
#endif
/*!
* @brief Default watermark values.
*
@@ -53,12 +63,6 @@ typedef void (*lpspi_slave_isr_t)(LPSPI_Type *base, lpspi_slave_handle_t *handle
/*******************************************************************************
* Prototypes
******************************************************************************/
/*!
* @brief Get instance number for LPSPI module.
*
* @param base LPSPI peripheral base address.
*/
uint32_t LPSPI_GetInstance(LPSPI_Type *base);
/*!
* @brief Configures the LPSPI peripheral chip select polarity.
@@ -114,12 +118,6 @@ static void LPSPI_SlaveTransferFillUpTxFifo(LPSPI_Type *base, lpspi_slave_handle
*/
static void LPSPI_SlaveTransferComplete(LPSPI_Type *base, lpspi_slave_handle_t *handle);
/*!
* @brief Check the argument for transfer .
* This is not a public API. Not static because lpspi_edma.c will use this API.
*/
bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFrame, uint32_t bytesPerFrame);
/*!
* @brief LPSPI common interrupt handler.
*
@@ -158,7 +156,7 @@ static lpspi_master_isr_t s_lpspiMasterIsr;
/*! @brief Pointer to slave IRQ handler for each instance. */
static lpspi_slave_isr_t s_lpspiSlaveIsr;
/* @brief Dummy data for each instance. This data is used when user's tx buffer is NULL*/
volatile uint8_t s_dummyData[ARRAY_SIZE(s_lpspiBases)] = {0};
volatile uint8_t g_lpspiDummyData[ARRAY_SIZE(s_lpspiBases)] = {0};
/**********************************************************************************************************************
* Code
*********************************************************************************************************************/
@@ -183,7 +181,7 @@ uint32_t LPSPI_GetInstance(LPSPI_Type *base)
void LPSPI_SetDummyData(LPSPI_Type *base, uint8_t dummyData)
{
uint32_t instance = LPSPI_GetInstance(base);
s_dummyData[instance] = dummyData;
g_lpspiDummyData[instance] = dummyData;
}
void LPSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz)
@@ -634,7 +632,7 @@ status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transf
uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
uint32_t temp = 0U;
uint8_t dummyData = s_dummyData[LPSPI_GetInstance(base)];
uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
{
@@ -799,7 +797,7 @@ status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t
uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
uint32_t temp = 0U;
uint8_t dummyData = s_dummyData[LPSPI_GetInstance(base)];
uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
{
@@ -1820,3 +1818,34 @@ void DMA_SPI3_INT_DriverIRQHandler(void)
LPSPI_CommonIRQHandler(DMA__LPSPI3, s_lpspiHandle[LPSPI_GetInstance(DMA__LPSPI3)]);
}
#endif
#if defined(ADMA__LPSPI0)
void ADMA_SPI0_INT_DriverIRQHandler(void)
{
assert(s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI0)]);
LPSPI_CommonIRQHandler(ADMA__LPSPI0, s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI0)]);
}
#endif
#if defined(ADMA__LPSPI1)
void ADMA_SPI1_INT_DriverIRQHandler(void)
{
assert(s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI1)]);
LPSPI_CommonIRQHandler(ADMA__LPSPI1, s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI1)]);
}
#endif
#if defined(ADMA__LPSPI2)
void ADMA_SPI2_INT_DriverIRQHandler(void)
{
assert(s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI2)]);
LPSPI_CommonIRQHandler(ADMA__LPSPI2, s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI2)]);
}
#endif
#if defined(ADMA__LPSPI3)
void ADMA_SPI3_INT_DriverIRQHandler(void)
{
assert(s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI3)]);
LPSPI_CommonIRQHandler(ADMA__LPSPI3, s_lpspiHandle[LPSPI_GetInstance(ADMA__LPSPI3)]);
}
#endif
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpspi.h
+58 -33
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -52,6 +56,9 @@
#define LPSPI_DUMMY_DATA (0x00U) /*!< Dummy data used for tx if there is not txData. */
#endif
/*! @brief Global variable for dummy data value setting. */
extern volatile uint8_t g_lpspiDummyData[];
/*! @brief Status for the LPSPI driver.*/
enum _lpspi_status
{
@@ -223,17 +230,17 @@ enum _lpspi_transfer_config_flag_for_master
kLPSPI_MasterByteSwap =
1U << 22 /*!< Is master swap the byte.
* For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
* lpspi_shift_direction_t to MSB).
* 1. If you set bitPerFrame = 8 , no matter the kLPSPI_MasterByteSwapyou flag is used
* or not, the waveform is 1 2 3 4 5 6 7 8.
* 2. If you set bitPerFrame = 16 :
* (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_MasterByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
* 3. If you set bitPerFrame = 32 :
* (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_MasterByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
*/
* For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
* lpspi_shift_direction_t to MSB).
* 1. If you set bitPerFrame = 8 , no matter the kLPSPI_MasterByteSwapyou flag is used
* or not, the waveform is 1 2 3 4 5 6 7 8.
* 2. If you set bitPerFrame = 16 :
* (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_MasterByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
* 3. If you set bitPerFrame = 32 :
* (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_MasterByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
*/
};
#define LPSPI_SLAVE_PCS_SHIFT (4U) /*!< LPSPI slave PCS shift macro , internal used. */
@@ -249,17 +256,17 @@ enum _lpspi_transfer_config_flag_for_slave
kLPSPI_SlaveByteSwap =
1U << 22 /*!< Is slave swap the byte.
* For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
* lpspi_shift_direction_t to MSB).
* 1. If you set bitPerFrame = 8 , no matter the kLPSPI_SlaveByteSwap flag is used
* or not, the waveform is 1 2 3 4 5 6 7 8.
* 2. If you set bitPerFrame = 16 :
* (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_SlaveByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
* 3. If you set bitPerFrame = 32 :
* (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_SlaveByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
*/
* For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set
* lpspi_shift_direction_t to MSB).
* 1. If you set bitPerFrame = 8 , no matter the kLPSPI_SlaveByteSwap flag is used
* or not, the waveform is 1 2 3 4 5 6 7 8.
* 2. If you set bitPerFrame = 16 :
* (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_SlaveByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
* 3. If you set bitPerFrame = 32 :
* (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_SlaveByteSwap flag.
* (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
*/
};
/*! @brief LPSPI transfer state, which is used for LPSPI transactional API state machine. */
@@ -376,16 +383,16 @@ struct _lpspi_master_handle
volatile uint8_t rxWatermark; /*!< Rx watermark. */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR . */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR . */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR. */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR. */
uint8_t *volatile txData; /*!< Send buffer. */
uint8_t *volatile rxData; /*!< Receive buffer. */
volatile size_t txRemainingByteCount; /*!< Number of bytes remaining to send.*/
volatile size_t rxRemainingByteCount; /*!< Number of bytes remaining to receive.*/
volatile uint32_t writeRegRemainingTimes; /*!< Write TDR register remaining times . */
volatile uint32_t readRegRemainingTimes; /*!< Read RDR register remaining times . */
volatile uint32_t writeRegRemainingTimes; /*!< Write TDR register remaining times. */
volatile uint32_t readRegRemainingTimes; /*!< Read RDR register remaining times. */
uint32_t totalByteCount; /*!< Number of transfer bytes*/
@@ -406,8 +413,8 @@ struct _lpspi_slave_handle
volatile uint8_t rxWatermark; /*!< Rx watermark. */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR . */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR . */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR. */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR. */
uint8_t *volatile txData; /*!< Send buffer. */
uint8_t *volatile rxData; /*!< Receive buffer. */
@@ -415,8 +422,8 @@ struct _lpspi_slave_handle
volatile size_t txRemainingByteCount; /*!< Number of bytes remaining to send.*/
volatile size_t rxRemainingByteCount; /*!< Number of bytes remaining to receive.*/
volatile uint32_t writeRegRemainingTimes; /*!< Write TDR register remaining times . */
volatile uint32_t readRegRemainingTimes; /*!< Read RDR register remaining times . */
volatile uint32_t writeRegRemainingTimes; /*!< Write TDR register remaining times. */
volatile uint32_t readRegRemainingTimes; /*!< Read RDR register remaining times. */
uint32_t totalByteCount; /*!< Number of transfer bytes*/
@@ -718,6 +725,24 @@ static inline uint32_t LPSPI_GetRxRegisterAddress(LPSPI_Type *base)
* @{
*/
/*!
* @brief Get instance number for LPSPI module.
*
* @param base LPSPI peripheral base address.
* @return Return the value of LPSPI instance.
*/
uint32_t LPSPI_GetInstance(LPSPI_Type *base);
/*!
* @brief Check the argument for transfer .
*
* @param transfer the transfer struct to be used.
* @param bitPerFrame The bit size of one frame.
* @param bytePerFrame The byte size of one frame.
* @return Return true for right and false for wrong.
*/
bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFrame, uint32_t bytesPerFrame);
/*!
* @brief Configures the LPSPI for either master or slave.
*
@@ -797,12 +822,12 @@ static inline void LPSPI_SetAllPcsPolarity(LPSPI_Type *base, uint32_t mask)
* size is 32-bits for each word except the last (the last word contains the remainder bits if the frame size is not
* divisible by 32). The minimum word size is 2-bits. A frame size of 33-bits (or similar) is not supported.
*
* Note 1 : The transmit command register should be initialized before enabling the LPSPI in slave mode, although
* Note 1: The transmit command register should be initialized before enabling the LPSPI in slave mode, although
* the command register does not update until after the LPSPI is enabled. After it is enabled, the transmit command
* register
* should only be changed if the LPSPI is idle.
*
* Note 2 : The transmit and command FIFO is a combined FIFO that includes both transmit data and command words. That
* Note 2: The transmit and command FIFO is a combined FIFO that includes both transmit data and command words. That
* means the TCR register should be written to when the Tx FIFO is not full.
*
* @param base LPSPI peripheral address.
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpspi_edma.c
+14 -18
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -31,8 +35,14 @@
#include "fsl_lpspi_edma.h"
/***********************************************************************************************************************
* Definitons
* Definitions
***********************************************************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.lpspi_edma"
#endif
/*!
* @brief Structure definition for dspi_master_edma_private_handle_t. The structure is private.
*/
@@ -71,18 +81,6 @@ static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
void *g_lpspiEdmaPrivateHandle,
bool transferDone,
uint32_t tcds);
/*!
* @brief Get instance number for LPSPI module.
* This is not a public API and it's extern from fsl_lpspi.c.
* @param base LPSPI peripheral base address
*/
extern uint32_t LPSPI_GetInstance(LPSPI_Type *base);
/*!
* @brief Check the argument for transfer .
* This is not a public API. It's extern from fsl_lpspi.c.
*/
extern bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFrame, uint32_t bytesPerFrame);
static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap);
@@ -94,8 +92,6 @@ static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint3
static lpspi_master_edma_private_handle_t s_lpspiMasterEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
static lpspi_slave_edma_private_handle_t s_lpspiSlaveEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
/*! @brief Global variable for dummy data value setting. */
extern volatile uint8_t s_dummyData[];
/***********************************************************************************************************************
* Code
***********************************************************************************************************************/
@@ -225,7 +221,7 @@ status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *
bool isThereExtraTxBytes = false;
uint8_t dummyData = s_dummyData[instance];
uint8_t dummyData = g_lpspiDummyData[instance];
edma_transfer_config_t transferConfigRx;
edma_transfer_config_t transferConfigTx;
@@ -657,7 +653,7 @@ status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *ha
uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
uint32_t temp = 0U;
uint8_t dummyData = s_dummyData[LPSPI_GetInstance(base)];
uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
{
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpspi_edma.h
+20 -11
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -41,6 +45,11 @@
/***********************************************************************************************************************
* Definitions
**********************************************************************************************************************/
/*! @name Driver version */
/*@{*/
/*! @brief LPSPI EDMA driver version 2.0.2. */
#define FSL_LPSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
/*@}*/
/*!
* @brief Forward declaration of the _lpspi_master_edma_handle typedefs.
@@ -88,10 +97,10 @@ struct _lpspi_master_edma_handle
volatile uint8_t rxWatermark; /*!< Rx watermark. */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR . */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR . */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR. */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR. */
volatile uint8_t bytesLastRead; /*!< Bytes for last read RDR . */
volatile uint8_t bytesLastRead; /*!< Bytes for last read RDR. */
volatile uint8_t isThereExtraRxBytes; /*!< Is there extra RX byte. */
uint8_t *volatile txData; /*!< Send buffer. */
@@ -119,7 +128,7 @@ struct _lpspi_master_edma_handle
edma_handle_t *edmaRxRegToRxDataHandle; /*!<edma_handle_t handle point used for RxReg to RxData buff*/
edma_handle_t *edmaTxDataToTxRegHandle; /*!<edma_handle_t handle point used for TxData to TxReg buff*/
edma_tcd_t lpspiSoftwareTCD[3]; /*!<SoftwareTCD , internal used*/
edma_tcd_t lpspiSoftwareTCD[3]; /*!<SoftwareTCD, internal used*/
};
/*! @brief LPSPI slave eDMA transfer handle structure used for transactional API.*/
@@ -131,10 +140,10 @@ struct _lpspi_slave_edma_handle
volatile uint8_t rxWatermark; /*!< Rx watermark. */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR . */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR . */
volatile uint8_t bytesEachWrite; /*!< Bytes for each write TDR. */
volatile uint8_t bytesEachRead; /*!< Bytes for each read RDR. */
volatile uint8_t bytesLastRead; /*!< Bytes for last read RDR . */
volatile uint8_t bytesLastRead; /*!< Bytes for last read RDR. */
volatile uint8_t isThereExtraRxBytes; /*!< Is there extra RX byte. */
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
@@ -144,8 +153,8 @@ struct _lpspi_slave_edma_handle
volatile size_t txRemainingByteCount; /*!< Number of bytes remaining to send.*/
volatile size_t rxRemainingByteCount; /*!< Number of bytes remaining to receive.*/
volatile uint32_t writeRegRemainingTimes; /*!< Write TDR register remaining times . */
volatile uint32_t readRegRemainingTimes; /*!< Read RDR register remaining times . */
volatile uint32_t writeRegRemainingTimes; /*!< Write TDR register remaining times. */
volatile uint32_t readRegRemainingTimes; /*!< Read RDR register remaining times. */
uint32_t totalByteCount; /*!< Number of transfer bytes*/
@@ -162,7 +171,7 @@ struct _lpspi_slave_edma_handle
edma_handle_t *edmaRxRegToRxDataHandle; /*!<edma_handle_t handle point used for RxReg to RxData buff*/
edma_handle_t *edmaTxDataToTxRegHandle; /*!<edma_handle_t handle point used for TxData to TxReg*/
edma_tcd_t lpspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
edma_tcd_t lpspiSoftwareTCD[2]; /*!<SoftwareTCD, internal used*/
};
/***********************************************************************************************************************
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpuart.c
+79 -20
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -33,6 +37,12 @@
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.lpuart"
#endif
/* LPUART transfer state. */
enum _lpuart_transfer_states
{
@@ -48,14 +58,6 @@ typedef void (*lpuart_isr_t)(LPUART_Type *base, lpuart_handle_t *handle);
/*******************************************************************************
* Prototypes
******************************************************************************/
/*!
* @brief Get the LPUART instance from peripheral base address.
*
* @param base LPUART peripheral base address.
* @return LPUART instance.
*/
uint32_t LPUART_GetInstance(LPUART_Type *base);
/*!
* @brief Check whether the RX ring buffer is full.
*
@@ -199,8 +201,7 @@ static void LPUART_ReadNonBlocking(LPUART_Type *base, uint8_t *data, size_t leng
#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
uint32_t ctrl = base->CTRL;
bool isSevenDataBits =
((ctrl & LPUART_CTRL_M7_MASK) ||
((!(ctrl & LPUART_CTRL_M7_MASK)) && (!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
((ctrl & LPUART_CTRL_M7_MASK) || ((!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
#endif
/* The Non Blocking read data API assume user have ensured there is enough space in
@@ -698,8 +699,7 @@ status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length)
#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
uint32_t ctrl = base->CTRL;
bool isSevenDataBits =
((ctrl & LPUART_CTRL_M7_MASK) ||
((!(ctrl & LPUART_CTRL_M7_MASK)) && (!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
((ctrl & LPUART_CTRL_M7_MASK) || ((!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
#endif
while (length--)
@@ -764,8 +764,7 @@ void LPUART_TransferCreateHandle(LPUART_Type *base,
#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
uint32_t ctrl = base->CTRL;
bool isSevenDataBits =
((ctrl & LPUART_CTRL_M7_MASK) ||
((!(ctrl & LPUART_CTRL_M7_MASK)) && (!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
((ctrl & LPUART_CTRL_M7_MASK) || ((!(ctrl & LPUART_CTRL_M_MASK)) && (ctrl & LPUART_CTRL_PE_MASK)));
#endif
/* Zero the handle. */
@@ -1651,8 +1650,20 @@ void M4_1_LPUART_DriverIRQHandler(void)
}
#endif
#if defined(CM4__LPUART)
void M4_LPUART_DriverIRQHandler(void)
{
s_lpuartIsr(CM4__LPUART, s_lpuartHandle[LPUART_GetInstance(CM4__LPUART)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}
#endif
#if defined(DMA__LPUART0)
void DMA_UART0_INT_IRQHandler(void)
void DMA_UART0_INT_DriverIRQHandler(void)
{
s_lpuartIsr(DMA__LPUART0, s_lpuartHandle[LPUART_GetInstance(DMA__LPUART0)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1664,7 +1675,7 @@ void DMA_UART0_INT_IRQHandler(void)
#endif
#if defined(DMA__LPUART1)
void DMA_UART1_INT_IRQHandler(void)
void DMA_UART1_INT_DriverIRQHandler(void)
{
s_lpuartIsr(DMA__LPUART1, s_lpuartHandle[LPUART_GetInstance(DMA__LPUART1)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1676,7 +1687,7 @@ void DMA_UART1_INT_IRQHandler(void)
#endif
#if defined(DMA__LPUART2)
void DMA_UART2_INT_IRQHandler(void)
void DMA_UART2_INT_DriverIRQHandler(void)
{
s_lpuartIsr(DMA__LPUART2, s_lpuartHandle[LPUART_GetInstance(DMA__LPUART2)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1688,7 +1699,7 @@ void DMA_UART2_INT_IRQHandler(void)
#endif
#if defined(DMA__LPUART3)
void DMA_UART3_INT_IRQHandler(void)
void DMA_UART3_INT_DriverIRQHandler(void)
{
s_lpuartIsr(DMA__LPUART3, s_lpuartHandle[LPUART_GetInstance(DMA__LPUART3)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1700,7 +1711,7 @@ void DMA_UART3_INT_IRQHandler(void)
#endif
#if defined(DMA__LPUART4)
void DMA_UART4_INT_IRQHandler(void)
void DMA_UART4_INT_DriverIRQHandler(void)
{
s_lpuartIsr(DMA__LPUART4, s_lpuartHandle[LPUART_GetInstance(DMA__LPUART4)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
@@ -1710,3 +1721,51 @@ void DMA_UART4_INT_IRQHandler(void)
#endif
}
#endif
#if defined(ADMA__LPUART0)
void ADMA_UART0_INT_DriverIRQHandler(void)
{
s_lpuartIsr(ADMA__LPUART0, s_lpuartHandle[LPUART_GetInstance(ADMA__LPUART0)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}
#endif
#if defined(ADMA__LPUART1)
void ADMA_UART1_INT_DriverIRQHandler(void)
{
s_lpuartIsr(ADMA__LPUART1, s_lpuartHandle[LPUART_GetInstance(ADMA__LPUART1)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}
#endif
#if defined(ADMA__LPUART2)
void ADMA_UART2_INT_DriverIRQHandler(void)
{
s_lpuartIsr(ADMA__LPUART2, s_lpuartHandle[LPUART_GetInstance(ADMA__LPUART2)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}
#endif
#if defined(ADMA__LPUART3)
void ADMA_UART3_INT_DriverIRQHandler(void)
{
s_lpuartIsr(ADMA__LPUART3, s_lpuartHandle[LPUART_GetInstance(ADMA__LPUART3)]);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}
#endif
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpuart.h
+13 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -548,6 +552,14 @@ static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
* @{
*/
/*!
* @brief Get the LPUART instance from peripheral base address.
*
* @param base LPUART peripheral base address.
* @return LPUART instance.
*/
uint32_t LPUART_GetInstance(LPUART_Type *base);
/*!
* @brief Enables or disables the LPUART transmitter.
*
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpuart_edma.c
+11 -10
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -34,6 +38,11 @@
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.lpuart_edma"
#endif
/*<! Structure definition for lpuart_edma_private_handle_t. The structure is private. */
typedef struct _lpuart_edma_private_handle
{
@@ -51,7 +60,7 @@ enum _lpuart_edma_tansfer_states
};
/*******************************************************************************
* Definitions
* Variables
******************************************************************************/
/* Array of LPUART handle. */
@@ -122,14 +131,6 @@ static void LPUART_SendEDMACallback(edma_handle_t *handle, void *param, bool tra
*/
static void LPUART_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
/*!
* @brief Get the LPUART instance from peripheral base address.
*
* @param base LPUART peripheral base address.
* @return LPUART instance.
*/
extern uint32_t LPUART_GetInstance(LPUART_Type *base);
/*******************************************************************************
* Code
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_lpuart_edma.h
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -42,6 +46,12 @@
* Definitions
******************************************************************************/
/*! @name Driver version */
/*@{*/
/*! @brief LPUART EDMA driver version 2.2.5. */
#define FSL_LPUART_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 5))
/*@}*/
/* Forward declaration of the handle typedef. */
typedef struct _lpuart_edma_handle lpuart_edma_handle_t;
bsp/imxrt1052-evk/Libraries/drivers/fsl_pit.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_pit.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.pit"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_pit.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_pmu.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -29,6 +33,12 @@
*/
#include "fsl_pmu.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.pmu"
#endif
uint32_t PMU_GetStatusFlags(PMU_Type *base)
{
uint32_t ret = 0U;
bsp/imxrt1052-evk/Libraries/drivers/fsl_pmu.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_pwm.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_pwm.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.pwm"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_pwm.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_pxp.c
+11 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP Semiconductors, Inc.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -33,6 +37,12 @@
/*******************************************************************************
* Definitions
******************************************************************************/
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.pxp"
#endif
/* The CSC2 coefficient is ###.####_#### */
#define PXP_CSC2_COEF_INT_WIDTH 2
#define PXP_CSC2_COEF_FRAC_WIDTH 8
bsp/imxrt1052-evk/Libraries/drivers/fsl_pxp.h
+5 -1
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2017, NXP Semiconductors, Inc.
* All rights reserved.
*
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_qtmr.c
+12 -2
View File
@@ -1,8 +1,11 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -15,6 +18,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -29,6 +33,12 @@
#include "fsl_qtmr.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.qtmr"
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_qtmr.h
+6 -2
View File
@@ -1,8 +1,11 @@
/*
* The Clear BSD License
* Copyright 2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -15,6 +18,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_rtwdog.c
+12 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,6 +34,12 @@
#include "fsl_rtwdog.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.rtwdog"
#endif
/*******************************************************************************
* Code
******************************************************************************/
bsp/imxrt1052-evk/Libraries/drivers/fsl_rtwdog.h
+6 -2
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2016, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bsp/imxrt1052-evk/Libraries/drivers/fsl_sai.c
+319 -8
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File diff suppressed because it is too large. Load diff
bsp/imxrt1052-evk/Libraries/drivers/fsl_sai.h
+131 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -44,7 +48,7 @@
/*! @name Driver version */
/*@{*/
#define FSL_SAI_DRIVER_VERSION (MAKE_VERSION(2, 1, 3)) /*!< Version 2.1.3 */
#define FSL_SAI_DRIVER_VERSION (MAKE_VERSION(2, 1, 4)) /*!< Version 2.1.4 */
/*@}*/
/*! @brief SAI return status*/
@@ -84,6 +88,20 @@ typedef enum _sai_mono_stereo
kSAI_MonoLeft /*!< Only left channel have sound. */
} sai_mono_stereo_t;
/*! @brief SAI data order, MSB or LSB */
typedef enum _sai_data_order
{
kSAI_DataLSB = 0x0U, /*!< LSB bit transferred first */
kSAI_DataMSB /*!< MSB bit transferred first */
} sai_data_order_t;
/*! @brief SAI clock polarity, active high or low */
typedef enum _sai_clock_polarity
{
kSAI_PolarityActiveHigh = 0x0U, /*!< Clock active high */
kSAI_PolarityActiveLow /*!< Clock active low */
} sai_clock_polarity_t;
/*! @brief Synchronous or asynchronous mode */
typedef enum _sai_sync_mode
{
@@ -281,7 +299,7 @@ extern "C" {
void SAI_TxInit(I2S_Type *base, const sai_config_t *config);
/*!
* @brief Initializes the the SAI Rx peripheral.
* @brief Initializes the SAI Rx peripheral.
*
* Ungates the SAI clock, resets the module, and configures the SAI Rx with a configuration structure.
* The configuration structure can be custom filled or set with default values by
@@ -473,6 +491,115 @@ void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
*/
void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
/*!
* @brief Set the Tx data order.
*
* @param base SAI base pointer
* @param order Data order MSB or LSB
*/
void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order);
/*!
* @brief Set the Rx data order.
*
* @param base SAI base pointer
* @param order Data order MSB or LSB
*/
void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order);
/*!
* @brief Set the Tx data order.
*
* @param base SAI base pointer
* @param order Data order MSB or LSB
*/
void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
/*!
* @brief Set the Rx data order.
*
* @param base SAI base pointer
* @param order Data order MSB or LSB
*/
void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
/*!
* @brief Set the Tx data order.
*
* @param base SAI base pointer
* @param order Data order MSB or LSB
*/
void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
/*!
* @brief Set the Rx data order.
*
* @param base SAI base pointer
* @param order Data order MSB or LSB
*/
void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
#if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
/*!
* @brief Set Tx FIFO packing feature.
*
* @param base SAI base pointer.
* @param pack FIFO pack type. It is element of sai_fifo_packing_t.
*/
void SAI_TxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
/*!
* @brief Set Rx FIFO packing feature.
*
* @param base SAI base pointer.
* @param pack FIFO pack type. It is element of sai_fifo_packing_t.
*/
void SAI_RxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
#endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
#if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
/*!
* @brief Set Tx FIFO error continue.
*
* FIFO error continue mode means SAI will keep running while FIFO error occured. If this feature
* not enabled, SAI will hang and users need to clear FEF flag in TCSR register.
*
* @param base SAI base pointer.
* @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
*/
static inline void SAI_TxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
{
if (isEnabled)
{
base->TCR4 |= I2S_TCR4_FCONT_MASK;
}
else
{
base->TCR4 &= ~I2S_TCR4_FCONT_MASK;
}
}
/*!
* @brief Set Rx FIFO error continue.
*
* FIFO error continue mode means SAI will keep running while FIFO error occured. If this feature
* not enabled, SAI will hang and users need to clear FEF flag in RCSR register.
*
* @param base SAI base pointer.
* @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
*/
static inline void SAI_RxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
{
if (isEnabled)
{
base->RCR4 |= I2S_RCR4_FCONT_MASK;
}
else
{
base->RCR4 &= ~I2S_RCR4_FCONT_MASK;
}
}
#endif
/*! @} */
/*!
@@ -857,7 +984,7 @@ status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_
void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle);
/*!
* @brief Aborts the the current IRQ receive.
* @brief Aborts the current IRQ receive.
*
* @note This API can be called when an interrupt non-blocking transfer initiates
* to abort the transfer early.
bsp/imxrt1052-evk/Libraries/drivers/fsl_sai_edma.c
+33 -4
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -30,11 +34,18 @@
#include "fsl_sai_edma.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.sai_edma"
#endif
/*******************************************************************************
* Definitations
******************************************************************************/
/* Used for 32byte aligned */
#define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)address + 32) & ~0x1FU)
#define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)(address) + 32) & ~0x1FU)
static I2S_Type *const s_saiBases[] = I2S_BASE_PTRS;
/*<! Structure definition for uart_edma_private_handle_t. The structure is private. */
typedef struct _sai_edma_private_handle
@@ -50,7 +61,7 @@ enum _sai_edma_transfer_state
};
/*<! Private handle only used for internally. */
static sai_edma_private_handle_t s_edmaPrivateHandle[FSL_FEATURE_SOC_I2S_COUNT][2];
static sai_edma_private_handle_t s_edmaPrivateHandle[ARRAY_SIZE(s_saiBases)][2];
/*******************************************************************************
* Prototypes
@@ -60,7 +71,7 @@ static sai_edma_private_handle_t s_edmaPrivateHandle[FSL_FEATURE_SOC_I2S_COUNT][
*
* @param base SAI base pointer.
*/
extern uint32_t SAI_GetInstance(I2S_Type *base);
static uint32_t SAI_GetInstance(I2S_Type *base);
/*!
* @brief SAI EDMA callback for send.
@@ -85,6 +96,24 @@ static void SAI_RxEDMACallback(edma_handle_t *handle, void *userData, bool done,
/*******************************************************************************
* Code
******************************************************************************/
static uint32_t SAI_GetInstance(I2S_Type *base)
{
uint32_t instance;
/* Find the instance index from base address mappings. */
for (instance = 0; instance < ARRAY_SIZE(s_saiBases); instance++)
{
if (s_saiBases[instance] == base)
{
break;
}
}
assert(instance < ARRAY_SIZE(s_saiBases));
return instance;
}
static void SAI_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
{
sai_edma_private_handle_t *privHandle = (sai_edma_private_handle_t *)userData;
bsp/imxrt1052-evk/Libraries/drivers/fsl_sai_edma.h
+23 -14
View File
@@ -1,9 +1,12 @@
/*
* The Clear BSD License
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
@@ -16,6 +19,7 @@
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
@@ -42,6 +46,11 @@
* Definitions
******************************************************************************/
/*! @name Driver version */
/*@{*/
#define FSL_SAI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 1, 4)) /*!< Version 2.1.4 */
/*@}*/
typedef struct _sai_edma_handle sai_edma_handle_t;
/*! @brief SAI eDMA transfer callback function for finish and error */
@@ -50,19 +59,19 @@ typedef void (*sai_edma_callback_t)(I2S_Type *base, sai_edma_handle_t *handle, s
/*! @brief SAI DMA transfer handle, users should not touch the content of the handle.*/
struct _sai_edma_handle
{
edma_handle_t *dmaHandle; /*!< DMA handler for SAI send */
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
uint8_t bytesPerFrame; /*!< Bytes in a frame */
uint8_t channel; /*!< Which data channel */
uint8_t count; /*!< The transfer data count in a DMA request */
uint32_t state; /*!< Internal state for SAI eDMA transfer */
sai_edma_callback_t callback; /*!< Callback for users while transfer finish or error occurs */
void *userData; /*!< User callback parameter */
edma_tcd_t tcd[SAI_XFER_QUEUE_SIZE + 1U]; /*!< TCD pool for eDMA transfer. */
sai_transfer_t saiQueue[SAI_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer. */
size_t transferSize[SAI_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */
volatile uint8_t queueUser; /*!< Index for user to queue transfer. */
volatile uint8_t queueDriver; /*!< Index for driver to get the transfer data and size */
edma_handle_t *dmaHandle; /*!< DMA handler for SAI send */
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
uint8_t bytesPerFrame; /*!< Bytes in a frame */
uint8_t channel; /*!< Which data channel */
uint8_t count; /*!< The transfer data count in a DMA request */
uint32_t state; /*!< Internal state for SAI eDMA transfer */
sai_edma_callback_t callback; /*!< Callback for users while transfer finish or error occurs */
void *userData; /*!< User callback parameter */
uint8_t tcd[(SAI_XFER_QUEUE_SIZE + 1U) * sizeof(edma_tcd_t)]; /*!< TCD pool for eDMA transfer. */
sai_transfer_t saiQueue[SAI_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer. */
size_t transferSize[SAI_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */
volatile uint8_t queueUser; /*!< Index for user to queue transfer. */
volatile uint8_t queueDriver; /*!< Index for driver to get the transfer data and size */
};
/*******************************************************************************
bsp/imxrt1052-evk/Libraries/drivers/fsl_semc.c
+63 -50
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