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[bsp][lpc55sxx] Added drv_soft_spi functionality and fixed drv_soft_i2c pin errors (#7251)

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1.lpc55sxx添加软件模拟SPI驱动
2.lpc55s69 board在Kconfig中添加软件SPI配置项
3.lpc55s69添加通用GPIO引脚定义
4.lpc55s69修正Kconfig中关于软件i2c配置项
This commit is contained in:
Yuqiang Wang
2023-04-23 19:30:42 -04:00
committed by GitHub
parent 439d3c34d9
commit a09a2ea6fe
11 changed files with 1009 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files
bsp/lpc55sxx/Libraries/drivers/SConscript
+4 -1
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@@ -51,7 +51,10 @@ if GetDepend('BSP_USING_WM8904'):
if GetDepend('BSP_USING_SOFT_I2C'):
src += ['drv_soft_i2c.c']
if GetDepend('BSP_USING_SOFT_SPI'):
src += ['drv_soft_spi.c']
path = [cwd,cwd + '/config']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
bsp/lpc55sxx/Libraries/drivers/drv_soft_i2c.h
+13 -2
View File
@@ -14,6 +14,17 @@
#include <rtthread.h>
#include <rthw.h>
#include <rtdevice.h>
#include <drv_pin.h>
/* Notice: PIO0_15(scl) --> 22; PIO1_8(sda) --> 24 */
#define BSP_SOFT_I2C1_SCL_PIN GET_PINS(0,15)
#define BSP_SOFT_I2C1_SCL_PIN GET_PINS(1,8)
/* Notice: PIO0_18(scl) --> 56; PIO1_10(sda) --> 40 */
#define BSP_SOFT_I2C2_SCL_PIN GET_PINS(0,18)
#define BSP_SOFT_I2C2_SDA_PIN GET_PINS(1,10)
/* lpc55s69 config class */
struct lpc55s69_soft_i2c_config
@@ -33,7 +44,7 @@ struct lpc55s69_i2c
#define SOFT_I2C1_BUS_CONFIG \
{ \
.scl = BSP_SOFT_I2C1_SCL_PIN, \
.sda = BSP_SOFT_I2C1_SCL_PIN, \
.sda = BSP_SOFT_I2C1_SDA_PIN, \
.bus_name = "i2c1", \
}
#endif
@@ -42,7 +53,7 @@ struct lpc55s69_i2c
#define SOFT_I2C2_BUS_CONFIG \
{ \
.scl = BSP_SOFT_I2C2_SCL_PIN, \
.sda = BSP_SOFT_I2C2_SCL_PIN, \
.sda = BSP_SOFT_I2C2_SDA_PIN, \
.bus_name = "i2c2", \
}
#endif /*BSP_USING_I2C2*/
bsp/lpc55sxx/Libraries/drivers/drv_soft_spi.c
+223
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File diff suppressed because it is too large Load Diff
bsp/lpc55sxx/Libraries/drivers/drv_soft_spi.h
+69
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@@ -0,0 +1,69 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-04-14 Wangyuqiang the first version
*/
#ifndef DRV_SOFT_SPI_H_
#define DRV_SOFT_SPI_H_
#include <rthw.h>
#include <rtdevice.h>
#include <spi-bit-ops.h>
#include <drv_pin.h>
/* Notice: PIO1_11(sck) --> 93; PIO0_15(miso) --> 22; PIO1_8(mosi) --> 24 */
#define BSP_S_SPI1_SCK_PIN GET_PINS(1,11)
#define BSP_S_SPI1_MISO_PIN GET_PINS(0,15)
#define BSP_S_SPI1_MOSI_PIN GET_PINS(1,8)
/* Notice: PIO1_9(sck) --> 10; PIO0_18(miso) --> 56; PIO1_10(mosi) --> 40 */
#define BSP_S_SPI2_SCK_PIN GET_PINS(1,9)
#define BSP_S_SPI2_MISO_PIN GET_PINS(0,18)
#define BSP_S_SPI2_MOSI_PIN GET_PINS(1,10)
/* lpc soft spi config */
struct lpc_soft_spi_config
{
rt_uint8_t sck;
rt_uint8_t mosi;
rt_uint8_t miso;
const char *bus_name;
};
/* lpc soft spi dirver */
struct lpc_soft_spi
{
struct rt_spi_bit_obj spi;
struct lpc_soft_spi_config *cfg;
};
#ifdef BSP_USING_SOFT_SPI1
#define SOFT_SPI1_BUS_CONFIG \
{ \
.sck = BSP_S_SPI1_SCK_PIN, \
.mosi = BSP_S_SPI1_MOSI_PIN, \
.miso = BSP_S_SPI1_MISO_PIN, \
.bus_name = "sspi1", \
}
#endif /* BSP_USING_SOFT_SPI1 */
#ifdef BSP_USING_SOFT_SPI2
#define SOFT_SPI2_BUS_CONFIG \
{ \
.sck = BSP_S_SPI2_SCK_PIN, \
.mosi = BSP_S_SPI2_MOSI_PIN, \
.miso = BSP_S_SPI2_MISO_PIN, \
.bus_name = "sspi2", \
}
#endif /* BSP_USING_SOFT_SPI2 */
rt_err_t rt_hw_softspi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin);
int rt_soft_spi_init(void);
#endif /* __DRV_SOFT_SPI__ */
bsp/lpc55sxx/lpc55s69_nxp_evk/board/Kconfig
+16 -25
View File
@@ -129,34 +129,9 @@ menu "On-chip Peripheral Drivers"
bool "Enable I2C1 Bus (software simulation)"
default n
if BSP_USING_SOFT_I2C1
comment "Notice: PB10 --> 26; PB11 --> 27"
config BSP_SOFT_I2C1_SCL_PIN
int "i2c1 SCL pin number"
range 0 79
default 26
config BSP_SOFT_I2C1_SDA_PIN
int "i2c1 SDA pin number"
range 0 79
default 27
endif
config BSP_USING_SOFT_I2C2
bool "Enable I2C2 Bus (software simulation)"
default n
if BSP_USING_SOFT_I2C2
comment "Notice: PC1 --> 33; PC0 --> 32"
config BSP_SOFT_I2C2_SCL_PIN
int "i2c2 SCL pin number"
range 0 79
default 32
config BSP_SOFT_I2C2_SDA_PIN
int "i2c2 SDA pin number"
range 0 79
default 33
endif
endif
menuconfig BSP_USING_SPI
@@ -175,6 +150,22 @@ menu "On-chip Peripheral Drivers"
default y
endif
menuconfig BSP_USING_SOFT_SPI
bool "Enable soft SPI BUS"
default n
select RT_USING_PIN
select RT_USING_SPI_BITOPS
select RT_USING_SPI
if BSP_USING_SOFT_SPI
menuconfig BSP_USING_SOFT_SPI1
bool "Enable soft SPI1 BUS (software simulation)"
default n
menuconfig BSP_USING_SOFT_SPI2
bool "Enable soft SPI2 BUS (software simulation)"
default n
endif
menuconfig BSP_USING_ADC
config BSP_USING_ADC
bool "Enable ADC Channel"
bsp/lpc55sxx/lpc55s69_nxp_evk/board/MCUX_Config/board/pin_mux.c
+99
View File
@@ -17,6 +17,7 @@ processor_version: 6.0.0
/* clang-format on */
#include "fsl_common.h"
#include "fsl_gpio.h"
#include "fsl_iocon.h"
#include "pin_mux.h"
@@ -60,6 +61,13 @@ BOARD_InitPins:
- {pin_num: '3', peripheral: FLEXCOMM2, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_24/FC2_RXD_SDA_MOSI_DATA/SCT0_OUT1/SD1_D1/FC3_SSEL3/PLU_OUT6}
- {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2}
- {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3}
- {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12}
- {pin_num: '40', peripheral: GPIO, signal: 'PIO1, 10', pin_signal: PIO1_10/FC1_RXD_SDA_MOSI_DATA/CTIMER1_MAT0/SCT0_OUT3}
- {pin_num: '56', peripheral: GPIO, signal: 'PIO0, 18', pin_signal: PIO0_18/FC4_CTS_SDA_SSEL0/SD0_WR_PRT/CTIMER1_MAT0/SCT0_OUT1/PLU_IN3/SECURE_GPIO0_18/ACMP0_C}
- {pin_num: '93', peripheral: GPIO, signal: 'PIO1, 11', pin_signal: PIO1_11/FC1_TXD_SCL_MISO_WS/CT_INP5/USB0_VBUS}
- {pin_num: '22', peripheral: GPIO, signal: 'PIO0, 15', pin_signal: PIO0_15/FC6_CTS_SDA_SSEL0/UTICK_CAP2/CT_INP16/SCT0_OUT2/SD0_WR_PRT/SECURE_GPIO0_15/ADC0_2}
- {pin_num: '24', peripheral: GPIO, signal: 'PIO1, 8', pin_signal: PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4}
- {pin_num: '31', peripheral: GPIO, signal: 'PIO1, 5', pin_signal: PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
@@ -261,6 +269,32 @@ void BOARD_InitPins(void)
* : Digital mode, digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO0_9_DIGIMODE_DIGITAL));
IOCON->PIO[0][15] = ((IOCON->PIO[0][15] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT015 (pin 22) is configured as PIO0_15. */
| IOCON_PIO_FUNC(PIO0_15_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO0_15_DIGIMODE_DIGITAL));
IOCON->PIO[0][18] = ((IOCON->PIO[0][18] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT018 (pin 56) is configured as PIO0_18. */
| IOCON_PIO_FUNC(PIO0_18_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO0_18_DIGIMODE_DIGITAL));
IOCON->PIO[1][0] = ((IOCON->PIO[1][0] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
@@ -285,6 +319,71 @@ void BOARD_InitPins(void)
* : Digital mode, digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_2_DIGIMODE_DIGITAL));
IOCON->PIO[1][5] = ((IOCON->PIO[1][5] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT15 (pin 31) is configured as PIO1_5. */
| IOCON_PIO_FUNC(PIO1_5_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_5_DIGIMODE_DIGITAL));
IOCON->PIO[1][8] = ((IOCON->PIO[1][8] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT18 (pin 24) is configured as PIO1_8. */
| IOCON_PIO_FUNC(PIO1_8_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_8_DIGIMODE_DIGITAL));
IOCON->PIO[1][9] = ((IOCON->PIO[1][9] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT19 (pin 10) is configured as PIO1_9. */
| IOCON_PIO_FUNC(PIO1_9_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_9_DIGIMODE_DIGITAL));
IOCON->PIO[1][10] = ((IOCON->PIO[1][10] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT110 (pin 40) is configured as PIO1_10. */
| IOCON_PIO_FUNC(PIO1_10_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_10_DIGIMODE_DIGITAL));
IOCON->PIO[1][11] = ((IOCON->PIO[1][11] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
/* Selects pin function.
* : PORT111 (pin 93) is configured as PIO1_11. */
| IOCON_PIO_FUNC(PIO1_11_FUNC_ALT0)
/* Select Digital mode.
* : Enable Digital mode.
* Digital input is enabled. */
| IOCON_PIO_DIGIMODE(PIO1_11_DIGIMODE_DIGITAL));
IOCON->PIO[1][24] = ((IOCON->PIO[1][24] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
bsp/lpc55sxx/lpc55s69_nxp_evk/board/MCUX_Config/board/pin_mux.h
+43
View File
@@ -61,6 +61,9 @@ void BOARD_InitBootPins(void);
/*!
* @brief Selects pin function.: Alternative connection 2. */
#define PIO0_17_FUNC_ALT2 0x02u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO0_18_FUNC_ALT0 0x00u
/*!
* @brief Analog switch input control. Usable only if DIGIMODE = 0b0: Analog switch is closed. */
#define PIO0_23_ASW_ENABLE 0x01u
@@ -76,7 +79,17 @@ void BOARD_InitBootPins(void);
* : Inactive.
* Inactive (no pull-down/pull-up resistor enabled).
*/
#define PIO0_23_MODE_INACTIVE 0x00u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO0_15_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO0_15_FUNC_ALT0 0x00u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO0_18_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Select Digital mode.: Digital mode, digital input is enabled. */
#define PIO0_24_DIGIMODE_DIGITAL 0x01u
@@ -128,6 +141,30 @@ void BOARD_InitBootPins(void);
/*!
* @brief Selects pin function.: Alternative connection 2. */
#define PIO1_0_FUNC_ALT2 0x02u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_8_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO1_8_FUNC_ALT0 0x00u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_9_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO1_9_FUNC_ALT0 0x00u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_10_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO1_10_FUNC_ALT0 0x00u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_11_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO1_11_FUNC_ALT0 0x00u
/*!
* @brief Select Digital mode.: Digital mode, digital input is enabled. */
#define PIO1_20_DIGIMODE_DIGITAL 0x01u
@@ -164,6 +201,12 @@ void BOARD_InitBootPins(void);
/*!
* @brief Selects pin function.: Alternative connection 3. */
#define PIO1_4_FUNC_ALT3 0x03u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define PIO1_5_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 0. */
#define PIO1_5_FUNC_ALT0 0x00u
/*!
* @brief Select Digital mode.: Digital mode, digital input is enabled. */
#define PIO1_6_DIGIMODE_DIGITAL 0x01u
bsp/lpc55sxx/lpc55s69_nxp_evk/board/ports/easyflash/ef_fal_port.c
+189
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@@ -0,0 +1,189 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-04-21 Wangyuqiang the first version
*/
#include <easyflash.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdarg.h>
#include <rthw.h>
#include <rtthread.h>
#include <fal.h>
/* EasyFlash partition name on FAL partition table */
#define FAL_EF_PART_NAME "easyflash"
/* default ENV set for user */
static const ef_env default_env_set[] = {
{"boot_times", "0"},
};
static char log_buf[RT_CONSOLEBUF_SIZE];
static struct rt_semaphore env_cache_lock;
static const struct fal_partition *part = NULL;
/**
* Flash port for hardware initialize.
*
* @param default_env default ENV set for user
* @param default_env_size default ENV size
*
* @return result
*/
EfErrCode ef_port_init(ef_env const **default_env, size_t *default_env_size) {
EfErrCode result = EF_NO_ERR;
*default_env = default_env_set;
*default_env_size = sizeof(default_env_set) / sizeof(default_env_set[0]);
rt_sem_init(&env_cache_lock, "env lock", 1, RT_IPC_FLAG_PRIO);
part = fal_partition_find(FAL_EF_PART_NAME);
EF_ASSERT(part);
return result;
}
/**
* Read data from flash.
* @note This operation's units is word.
*
* @param addr flash address
* @param buf buffer to store read data
* @param size read bytes size
*
* @return result
*/
EfErrCode ef_port_read(uint32_t addr, uint32_t *buf, size_t size) {
EfErrCode result = EF_NO_ERR;
fal_partition_read(part, addr, (uint8_t *)buf, size);
return result;
}
/**
* Erase data on flash.
* @note This operation is irreversible.
* @note This operation's units is different which on many chips.
*
* @param addr flash address
* @param size erase bytes size
*
* @return result
*/
EfErrCode ef_port_erase(uint32_t addr, size_t size) {
EfErrCode result = EF_NO_ERR;
/* make sure the start address is a multiple of FLASH_ERASE_MIN_SIZE */
EF_ASSERT(addr % EF_ERASE_MIN_SIZE == 0);
if (fal_partition_erase(part, addr, size) < 0)
{
result = EF_ERASE_ERR;
}
return result;
}
/**
* Write data to flash.
* @note This operation's units is word.
* @note This operation must after erase. @see flash_erase.
*
* @param addr flash address
* @param buf the write data buffer
* @param size write bytes size
*
* @return result
*/
EfErrCode ef_port_write(uint32_t addr, const uint32_t *buf, size_t size) {
EfErrCode result = EF_NO_ERR;
if (fal_partition_write(part, addr, (uint8_t *)buf, size) < 0)
{
result = EF_WRITE_ERR;
}
return result;
}
/**
* lock the ENV ram cache
*/
void ef_port_env_lock(void) {
rt_sem_take(&env_cache_lock, RT_WAITING_FOREVER);
}
/**
* unlock the ENV ram cache
*/
void ef_port_env_unlock(void) {
rt_sem_release(&env_cache_lock);
}
/**
* This function is print flash debug info.
*
* @param file the file which has call this function
* @param line the line number which has call this function
* @param format output format
* @param ... args
*
*/
void ef_log_debug(const char *file, const long line, const char *format, ...) {
#ifdef PRINT_DEBUG
va_list args;
/* args point to the first variable parameter */
va_start(args, format);
ef_print("[Flash] (%s:%ld) ", file, line);
/* must use vprintf to print */
rt_vsprintf(log_buf, format, args);
ef_print("%s", log_buf);
va_end(args);
#endif
}
/**
* This function is print flash routine info.
*
* @param format output format
* @param ... args
*/
void ef_log_info(const char *format, ...) {
va_list args;
/* args point to the first variable parameter */
va_start(args, format);
ef_print("[Flash] ");
/* must use vprintf to print */
rt_vsprintf(log_buf, format, args);
ef_print("%s", log_buf);
va_end(args);
}
/**
* This function is print flash non-package info.
*
* @param format output format
* @param ... args
*/
void ef_print(const char *format, ...) {
va_list args;
/* args point to the first variable parameter */
va_start(args, format);
/* must use vprintf to print */
rt_vsprintf(log_buf, format, args);
rt_kprintf("%s", log_buf);
va_end(args);
}
bsp/lpc55sxx/lpc55s69_nxp_evk/board/ports/fal/fal_cfg.h
+49
View File
@@ -0,0 +1,49 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-04-21 Wangyuqiang the first version
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtthread.h>
#include <board.h>
#ifndef FAL_USING_NOR_FLASH_DEV_NAME
#define NOR_FLASH_DEV_NAME "norflash0"
#else
#define NOR_FLASH_DEV_NAME FAL_USING_NOR_FLASH_DEV_NAME
#endif
/* Flash device Configuration */
extern struct fal_flash_dev nor_flash0;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&nor_flash0, \
}
/* Partition Configuration */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "easyflash", NOR_FLASH_DEV_NAME, 0, 512 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "download", NOR_FLASH_DEV_NAME, 512 * 1024, 1024 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "wifi_image", NOR_FLASH_DEV_NAME, (512 + 1024) * 1024, 512 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "font", NOR_FLASH_DEV_NAME, (512 + 1024 + 512) * 1024, 7 * 1024 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "filesystem", NOR_FLASH_DEV_NAME, (512 + 1024 + 512 + 7 * 1024) * 1024, 7 * 1024 * 1024, 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#endif /* _FAL_CFG_H_ */
bsp/lpc55sxx/lpc55s69_nxp_evk/board/ports/fal/fal_sample.c
+266
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File diff suppressed because it is too large Load Diff
bsp/lpc55sxx/lpc55s69_nxp_evk/board/ports/soft_spi_flash_init.c
+38
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@@ -0,0 +1,38 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2023-04-21 Wangyuqiang the first version
*/
#include <rtthread.h>
#include "spi_flash.h"
#include "spi_flash_sfud.h"
#include "drv_soft_spi.h"
#include "drv_pin.h"
#define cs_pin GET_PINS(1,5)
static int rt_soft_spi_flash_init(void)
{
int result = -1;
result = rt_hw_softspi_device_attach("sspi1", "sspi10", cs_pin);
rt_kprintf("value is %d\n",result);
if(result == RT_EOK)
{
rt_kprintf("rt_hw_softspi_device_attach successful!\n");
}
if (RT_NULL == rt_sfud_flash_probe("W25Q128", "sspi10"))
{
return -RT_ERROR;
}
return RT_EOK;
}
INIT_COMPONENT_EXPORT(rt_soft_spi_flash_init);