Mirrors_Framework/rt-thread
1
0
Fork 0
mirror of https://github.com/RT-Thread/rt-thread.git synced 2026-09-20 00:45:22 +08:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

Merge pull request #4 from RT-Thread/master

Browse Source 
sync
This commit is contained in:
HubretXie
2019-05-16 10:22:41 +08:00
committed by GitHub
parent fd05ad76d6 4539172f5c
commit 9de2942b15
175 changed files with 8289 additions and 2633 deletions
Download Patch File Download Diff File Expand all files Collapse all files
README.md
+2 -2
View File
@@ -17,13 +17,13 @@ RT-Thread RTOS like a traditional real-time operating system. The kernel has rea
* Device Driver;
* Component;
* Dyanmic Module
* Dynamic Module
The device driver is more like a driver framework, UART, IIC, SPI, SDIO, USB device/host, EMAC, MTD NAND etc. The developer can easily add low level driver and board configuration, then combined with the upper framework, he/she can use lots of features.
The Component is a software concept upon RT-Thread kernel, for example a shell (finsh/msh shell), virtual file system (FAT, YAFFS, UFFS, ROM/RAM file system etc), TCP/IP protocol stack (lwIP), POSIX (thread) interface etc. One component must be a directory under RT-Thread/Components and one component can be descripted by a SConscript file (then be compiled and linked into the system).
The Dyanmic Module, formerly named as User Applicaion (UA) is a dyanmic loaded module or library, it can be compiled standalone without Kernel. Each Dyanmic Module has its own object list to manage thread/semaphore/kernel object which was created or initialized inside this UA. More information about UA, please visit another [git repo](https://github.com/RT-Thread/rtthread-apps).
The Dynamic Module, formerly named as User Applicaion (UA) is a dynamic loaded module or library, it can be compiled standalone without Kernel. Each Dynamic Module has its own object list to manage thread/semaphore/kernel object which was created or initialized inside this UA. More information about UA, please visit another [git repo](https://github.com/RT-Thread/rtthread-apps).
## Board Support Package ##
bsp/allwinner_tina/libcpu/interrupt.c
+2 -1
View File
@@ -102,6 +102,7 @@ void rt_hw_interrupt_mask(int vector)
}
/**
* This function will un-mask a interrupt.
* @param vector the interrupt number
*/
@@ -167,7 +168,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
return old_handler;
}
void rt_interrupt_dispatch(void)
void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
{
void *param;
int vector;
bsp/at91sam9g45/drivers/board.c
+2 -2
View File
@@ -36,8 +36,8 @@
extern int Image$$ER_ZI$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$ER_ZI$$ZI$$Limit)
#elif (defined (__GNUC__))
extern unsigned char __bss_end__;
#define HEAP_BEGIN (&__bss_end__)
extern unsigned char __bss_end;
#define HEAP_BEGIN (&__bss_end)
#elif (defined (__ICCARM__))
#pragma section=".noinit"
#define HEAP_BEGIN (__section_end(".noinit"))
bsp/at91sam9g45/link_scripts/at91sam9g45_ram.ld
+4 -4
View File
@@ -1,6 +1,6 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(start)
ENTRY(system_vectors)
SECTIONS
{
. = 0x70000000;
@@ -8,7 +8,7 @@ SECTIONS
. = ALIGN(4);
.text :
{
*(.init)
*(.vectors)
*(.text)
*(.gnu.linkonce.t*)
@@ -76,9 +76,9 @@ SECTIONS
.nobss : { *(.nobss) }
. = ALIGN(4);
__bss_start__ = .;
__bss_start = .;
.bss : { *(.bss)}
__bss_end__ = .;
__bss_end = .;
/* stabs debugging sections. */
.stab 0 : { *(.stab) }
bsp/at91sam9g45/platform/interrupt.c
+24 -1
View File
@@ -332,7 +332,7 @@ void rt_hw_interrupt_umask(int irq)
* @return old handler
*/
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
void *param, char *name)
void *param, const char *name)
{
rt_isr_handler_t old_handler = RT_NULL;
@@ -419,6 +419,29 @@ void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
AT91C_BASE_AIC->AIC_EOICR = 0x0;
}
void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
{
rt_isr_handler_t isr_func;
rt_uint32_t irq;
void *param;
/* get irq number */
irq = rt_hw_interrupt_get_active(fiq_irq);
/* get interrupt service routine */
isr_func = irq_desc[irq].handler;
param = irq_desc[irq].param;
/* turn to interrupt service routine */
isr_func(irq, param);
rt_hw_interrupt_ack(fiq_irq, irq);
#ifdef RT_USING_INTERRUPT_INFO
irq_desc[irq].counter ++;
#endif
}
#ifdef RT_USING_FINSH
#ifdef RT_USING_INTERRUPT_INFO
void list_irq(void)
bsp/at91sam9g45/rtconfig.py
+1 -1
View File
@@ -10,7 +10,7 @@ if os.getenv('RTT_CC'):
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'D:\arm-2013.11\bin'
EXEC_PATH = '/usr/bin'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/Keil_v5'
bsp/es32f0334/drivers/board.h
+1 -1
View File
@@ -17,7 +17,7 @@
#define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
bsp/es32f0334/drivers/drv_pm.c
+13 -49
View File
@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2019-04-08 wangyq the first version
* 2019-05-06 Zero-Free adapt to the new power management interface
*/
#include <rthw.h>
@@ -16,54 +17,28 @@
#ifdef RT_USING_PM
static void _drv_pm_enter(struct rt_pm *pm)
static void _drv_pm_enter(struct rt_pm *pm, uint8_t mode)
{
rt_uint32_t mode;
mode = pm->current_mode;
switch (mode)
{
case PM_RUN_MODE_NORMAL:
case PM_SLEEP_MODE_NONE:
break;
case PM_SLEEP_MODE_SLEEP:
case PM_SLEEP_MODE_IDLE:
__WFI();
break;
case PM_SLEEP_MODE_TIMER:
case PM_SLEEP_MODE_LIGHT:
break;
case PM_SLEEP_MODE_DEEP:
pmu_stop2_enter();
break;
case PM_SLEEP_MODE_SHUTDOWN:
case PM_SLEEP_MODE_STANDBY:
pmu_standby_enter(PMU_STANDBY_PORT_NONE);
break;
default:
RT_ASSERT(0);
break;
}
}
static void _drv_pm_exit(struct rt_pm *pm)
{
rt_uint32_t mode;
RT_ASSERT(pm != RT_NULL);
mode = pm->current_mode;
switch (mode)
{
case PM_RUN_MODE_NORMAL:
break;
case PM_SLEEP_MODE_SLEEP:
break;
case PM_SLEEP_MODE_TIMER:
break;
case PM_SLEEP_MODE_SHUTDOWN:
break;
@@ -73,32 +48,21 @@ static void _drv_pm_exit(struct rt_pm *pm)
}
}
#if PM_RUN_MODE_COUNT > 1
static void _drv_pm_frequency_change(struct rt_pm *pm, rt_uint32_t frequency)
{
return;
}
#endif
static int drv_hw_pm_init(void)
{
static const struct rt_pm_ops _ops =
{
_drv_pm_enter,
_drv_pm_exit,
#if PM_RUN_MODE_COUNT > 1
_drv_pm_frequency_change,
#endif
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL
};
rt_uint8_t timer_mask;
rt_uint8_t timer_mask = 0;
/* initialize timer mask */
timer_mask = 1UL << PM_SLEEP_MODE_TIMER;
/* initialize timer mask(no need tickless) */
// timer_mask = 1UL << PM_SLEEP_MODE_DEEP;
/* initialize system pm module */
rt_system_pm_init(&_ops, timer_mask, RT_NULL);
bsp/es32f0654/drivers/board.h
+1 -1
View File
@@ -17,7 +17,7 @@
#define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
bsp/es32f0654/drivers/drv_pm.c
+13 -49
View File
@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2019-04-01 wangyq the first version
* 2019-05-06 Zero-Free adapt to the new power management interface
*/
#include <rthw.h>
@@ -16,54 +17,28 @@
#ifdef RT_USING_PM
static void _drv_pm_enter(struct rt_pm *pm)
static void _drv_pm_enter(struct rt_pm *pm, uint8_t mode)
{
rt_uint32_t mode;
mode = pm->current_mode;
switch (mode)
{
case PM_RUN_MODE_NORMAL:
case PM_SLEEP_MODE_NONE:
break;
case PM_SLEEP_MODE_SLEEP:
case PM_SLEEP_MODE_IDLE:
__WFI();
break;
case PM_SLEEP_MODE_TIMER:
case PM_SLEEP_MODE_LIGHT:
break;
case PM_SLEEP_MODE_DEEP:
pmu_stop2_enter();
break;
case PM_SLEEP_MODE_SHUTDOWN:
case PM_SLEEP_MODE_STANDBY:
pmu_standby_enter(PMU_STANDBY_PORT_NONE);
break;
default:
RT_ASSERT(0);
break;
}
}
static void _drv_pm_exit(struct rt_pm *pm)
{
rt_uint32_t mode;
RT_ASSERT(pm != RT_NULL);
mode = pm->current_mode;
switch (mode)
{
case PM_RUN_MODE_NORMAL:
break;
case PM_SLEEP_MODE_SLEEP:
break;
case PM_SLEEP_MODE_TIMER:
break;
case PM_SLEEP_MODE_SHUTDOWN:
break;
@@ -73,32 +48,21 @@ static void _drv_pm_exit(struct rt_pm *pm)
}
}
#if PM_RUN_MODE_COUNT > 1
static void _drv_pm_frequency_change(struct rt_pm *pm, rt_uint32_t frequency)
{
return;
}
#endif
static int drv_hw_pm_init(void)
{
static const struct rt_pm_ops _ops =
{
_drv_pm_enter,
_drv_pm_exit,
#if PM_RUN_MODE_COUNT > 1
_drv_pm_frequency_change,
#endif
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL
};
rt_uint8_t timer_mask;
rt_uint8_t timer_mask = 0;
/* initialize timer mask */
timer_mask = 1UL << PM_SLEEP_MODE_TIMER;
/* initialize timer mask(no need tickless) */
timer_mask = 1UL << PM_SLEEP_MODE_DEEP;
/* initialize system pm module */
rt_system_pm_init(&_ops, timer_mask, RT_NULL);
bsp/gd32e230k-start/drivers/board.h
+1 -1
View File
@@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif
#ifdef __ARMCC_VERSION
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
bsp/k210/.config
+52 -20
View File
@@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=2
CONFIG_RT_ALIGN_SIZE=8
@@ -19,7 +20,7 @@ CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=1024
CONFIG_IDLE_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
@@ -43,7 +44,7 @@ CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
CONFIG_RT_USING_SIGNALS=y
#
# Memory Management
@@ -139,6 +140,7 @@ CONFIG_RT_USING_DFS_DEVFS=y
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
@@ -202,6 +204,11 @@ CONFIG_RT_USING_POSIX=y
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
@@ -225,7 +232,6 @@ CONFIG_RT_USING_POSIX=y
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
@@ -267,6 +273,7 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
@@ -279,6 +286,7 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
#
# security packages
@@ -299,6 +307,7 @@ CONFIG_RT_USING_POSIX=y
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
#
# tools packages
@@ -327,39 +336,34 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
#
# peripheral libraries and drivers
#
#
# sensors drivers
#
# CONFIG_PKG_USING_LSM6DSL is not set
# CONFIG_PKG_USING_LPS22HB is not set
# CONFIG_PKG_USING_HTS221 is not set
# CONFIG_PKG_USING_LSM303AGR is not set
# CONFIG_PKG_USING_BME280 is not set
# CONFIG_PKG_USING_BMA400 is not set
# CONFIG_PKG_USING_BMI160_BMX160 is not set
# CONFIG_PKG_USING_SPL0601 is not set
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
CONFIG_PKG_USING_KENDRYTE_SDK=y
CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk"
CONFIG_PKG_USING_KENDRYTE_SDK_V052=y
# CONFIG_PKG_USING_KENDRYTE_SDK_V052 is not set
# CONFIG_PKG_USING_KENDRYTE_SDK_V053 is not set
# CONFIG_PKG_USING_KENDRYTE_SDK_V054 is not set
CONFIG_PKG_USING_KENDRYTE_SDK_V055=y
# CONFIG_PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set
CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.2"
CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.5"
CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
#
# miscellaneous packages
@@ -385,6 +389,34 @@ CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.2"
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
#
# Privated Packages of RealThread
#
# CONFIG_PKG_USING_CODEC is not set
# CONFIG_PKG_USING_PLAYER is not set
# CONFIG_PKG_USING_MPLAYER is not set
# CONFIG_PKG_USING_PERSIMMON_SRC is not set
# CONFIG_PKG_USING_JS_PERSIMMON is not set
# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
#
# Network Utilities
#
# CONFIG_PKG_USING_WICED is not set
# CONFIG_PKG_USING_CLOUDSDK is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_POWER_MANAGER is not set
# CONFIG_PKG_USING_RT_OTA is not set
# CONFIG_PKG_USING_RDBD_SRC is not set
# CONFIG_PKG_USING_RTINSIGHT is not set
# CONFIG_PKG_USING_SMARTCONFIG is not set
# CONFIG_PKG_USING_RTX is not set
# CONFIG_RT_USING_TESTCASE is not set
# CONFIG_PKG_USING_NGHTTP2 is not set
# CONFIG_PKG_USING_AVS is not set
# CONFIG_PKG_USING_STS is not set
# CONFIG_PKG_USING_DLMS is not set
CONFIG_BOARD_K210_EVB=y
CONFIG_BSP_USING_UART_HS=y
# CONFIG_BSP_USING_UART1 is not set
bsp/k210/driver/board.h
+6
View File
@@ -11,6 +11,12 @@
#ifndef BOARD_H__
#define BOARD_H__
#include <rtconfig.h>
#if PKG_KENDRYTE_SDK_VERNUM < 0x0054
#error The version of Kendryte sdk is too old, please update to V0.5.4 or newer
#endif
extern unsigned int __bss_start;
extern unsigned int __bss_end;
bsp/k210/rtconfig.h
+48 -17
View File
@@ -7,6 +7,7 @@
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
/* RT_USING_ARCH_DATA_TYPE is not set */
#define RT_USING_SMP
#define RT_CPUS_NR 2
#define RT_ALIGN_SIZE 8
@@ -19,7 +20,7 @@
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDEL_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 1024
#define IDLE_THREAD_STACK_SIZE 4096
/* RT_USING_TIMER_SOFT is not set */
#define RT_DEBUG
#define RT_DEBUG_COLOR
@@ -42,7 +43,7 @@
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* RT_USING_SIGNALS is not set */
#define RT_USING_SIGNALS
/* Memory Management */
@@ -130,6 +131,7 @@
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
/* RT_USING_SYSTEM_WORKQUEUE is not set */
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
@@ -187,6 +189,10 @@
/* RT_USING_SAL is not set */
/* Network interface device */
/* RT_USING_NETDEV is not set */
/* light weight TCP/IP stack */
/* RT_USING_LWIP is not set */
@@ -205,7 +211,6 @@
/* Utilities */
/* RT_USING_LOGTRACE is not set */
/* RT_USING_RYM is not set */
/* RT_USING_ULOG is not set */
/* RT_USING_UTEST is not set */
@@ -240,6 +245,7 @@
/* PKG_USING_NOPOLL is not set */
/* PKG_USING_NETUTILS is not set */
/* PKG_USING_AT_DEVICE is not set */
/* PKG_USING_ATSRV_SOCKET is not set */
/* PKG_USING_WIZNET is not set */
/* IoT Cloud */
@@ -251,6 +257,7 @@
/* PKG_USING_TENCENT_IOTKIT is not set */
/* PKG_USING_NIMBLE is not set */
/* PKG_USING_OTA_DOWNLOADER is not set */
/* PKG_USING_IPMSG is not set */
/* security packages */
@@ -268,6 +275,7 @@
/* PKG_USING_OPENMV is not set */
/* PKG_USING_MUPDF is not set */
/* PKG_USING_STEMWIN is not set */
/* tools packages */
@@ -294,34 +302,31 @@
/* PKG_USING_CMSIS is not set */
/* PKG_USING_DFS_YAFFS is not set */
/* PKG_USING_LITTLEFS is not set */
/* PKG_USING_THREAD_POOL is not set */
/* peripheral libraries and drivers */
/* sensors drivers */
/* PKG_USING_LSM6DSL is not set */
/* PKG_USING_LPS22HB is not set */
/* PKG_USING_HTS221 is not set */
/* PKG_USING_LSM303AGR is not set */
/* PKG_USING_BME280 is not set */
/* PKG_USING_BMA400 is not set */
/* PKG_USING_BMI160_BMX160 is not set */
/* PKG_USING_SPL0601 is not set */
/* PKG_USING_SENSORS_DRIVERS is not set */
/* PKG_USING_REALTEK_AMEBA is not set */
/* PKG_USING_SHT2X is not set */
/* PKG_USING_AHT10 is not set */
/* PKG_USING_AP3216C is not set */
/* PKG_USING_STM32_SDIO is not set */
/* PKG_USING_ICM20608 is not set */
/* PKG_USING_U8G2 is not set */
/* PKG_USING_BUTTON is not set */
/* PKG_USING_MPU6XXX is not set */
/* PKG_USING_PCF8574 is not set */
/* PKG_USING_SX12XX is not set */
/* PKG_USING_SIGNAL_LED is not set */
#define PKG_USING_KENDRYTE_SDK
#define PKG_USING_KENDRYTE_SDK_V052
/* PKG_USING_KENDRYTE_SDK_V052 is not set */
/* PKG_USING_KENDRYTE_SDK_V053 is not set */
/* PKG_USING_KENDRYTE_SDK_V054 is not set */
#define PKG_USING_KENDRYTE_SDK_V055
/* PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set */
#define PKG_KENDRYTE_SDK_VERNUM 0x0055
/* PKG_USING_INFRARED is not set */
/* PKG_USING_ROSSERIAL is not set */
/* PKG_USING_AT24CXX is not set */
/* PKG_USING_MOTIONDRIVER2RTT is not set */
/* miscellaneous packages */
@@ -345,6 +350,32 @@
/* PKG_USING_PERIPHERAL_SAMPLES is not set */
/* PKG_USING_HELLO is not set */
/* PKG_USING_VI is not set */
/* Privated Packages of RealThread */
/* PKG_USING_CODEC is not set */
/* PKG_USING_PLAYER is not set */
/* PKG_USING_MPLAYER is not set */
/* PKG_USING_PERSIMMON_SRC is not set */
/* PKG_USING_JS_PERSIMMON is not set */
/* PKG_USING_JERRYSCRIPT_WIN32 is not set */
/* Network Utilities */
/* PKG_USING_WICED is not set */
/* PKG_USING_CLOUDSDK is not set */
/* PKG_USING_COREMARK is not set */
/* PKG_USING_POWER_MANAGER is not set */
/* PKG_USING_RT_OTA is not set */
/* PKG_USING_RDBD_SRC is not set */
/* PKG_USING_RTINSIGHT is not set */
/* PKG_USING_SMARTCONFIG is not set */
/* PKG_USING_RTX is not set */
/* RT_USING_TESTCASE is not set */
/* PKG_USING_NGHTTP2 is not set */
/* PKG_USING_AVS is not set */
/* PKG_USING_STS is not set */
/* PKG_USING_DLMS is not set */
#define BOARD_K210_EVB
#define BSP_USING_UART_HS
/* BSP_USING_UART1 is not set */
bsp/k210/rtconfig.py
Regular → Executable
+3 -3
View File
@@ -15,7 +15,7 @@ if os.getenv('RTT_CC'):
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'/opt/riscv64-unknown-elf/bin'
EXEC_PATH = r'/opt/gnu-mcu-eclipse/riscv-none-gcc/8.2.0-2.1-20190425-1021/bin'
else:
print('Please make sure your toolchains is GNU GCC!')
exit(0)
@@ -38,8 +38,8 @@ if PLATFORM == 'gcc':
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcmodel=medany'
CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields '
DEVICE = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64d'
CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'
CPATH = ''
bsp/lpc1114/.config
+295
View File
@@ -0,0 +1,295 @@
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
# CONFIG_RT_USING_OVERFLOW_CHECK is not set
# CONFIG_RT_USING_HOOK is not set
# CONFIG_RT_USING_IDLE_HOOK is not set
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
# CONFIG_RT_DEBUG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
CONFIG_RT_VER_NUM=0x40001
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M0=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=512
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
# CONFIG_RT_USING_FINSH is not set
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=128
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
#
# Using WiFi
#
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
#
# sample package
#
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set
CONFIG_SOC_LPC1114=y
bsp/lpc1114/Kconfig
+29
View File
@@ -0,0 +1,29 @@
mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../.."
# you can change the RTT_ROOT default "../.." to your rtthread_root,
# example : default "F:/git_repositories/rt-thread"
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_LPC1114
bool
select ARCH_ARM_CORTEX_M0
default y
#source "$BSP_DIR/drivers/Kconfig"
bsp/lpc1114/SConscript
+14
View File
@@ -0,0 +1,14 @@
# for module compiling
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
bsp/lpc1114/SConstruct
+27
View File
@@ -0,0 +1,27 @@
import os
import sys
import rtconfig
from rtconfig import RTT_ROOT
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CC, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)
bsp/lpc1114/applications/SConscript
+9
View File
@@ -0,0 +1,9 @@
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lpc1114/applications/main.c
+56
View File
@@ -0,0 +1,56 @@
/*
* Copyright (c) 2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-05 jg1uaa the first version
*/
#include <rtthread.h>
#include <rthw.h>
/* for Z111xP board (LED is connected to PIO3_5, low=ON) */
#define IOCON_PIO3_5 HWREG32(0x40044048)
#define GPIO3DIR HWREG32(0x50038000)
#define GPIO3DATA_5 HWREG32(0x50030080)
static void led_off(void)
{
GPIO3DATA_5 = 0x20;
}
static void led_on(void)
{
GPIO3DATA_5 = 0x00;
}
static void led_setup(void)
{
IOCON_PIO3_5 = 0xd0; // (default)
GPIO3DIR = 0x20; // select output
led_off();
}
static void led_demo(void)
{
led_setup();
while (1) {
led_on();
rt_thread_delay(50); // 500msec, tick@100Hz
led_off();
rt_thread_delay(50);
}
}
int main(int argc, char **argv)
{
rt_kprintf("Hello, world!\n");
led_demo();
/* NOTREACHED */
return 0;
}
bsp/lpc1114/driver/SConscript
+16
View File
@@ -0,0 +1,16 @@
from building import *
cwd = GetCurrentDir()
src = Glob('*.[cs]')
list = os.listdir(cwd)
CPPPATH = [cwd]
objs = []
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
objs = objs + group
Return('objs')
bsp/lpc1114/driver/board.c
+182
View File
@@ -0,0 +1,182 @@
/*
* Copyright (c) 2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-05 jg1uaa the first version
*/
#include <rtthread.h>
#include <rthw.h>
#include "board.h"
#include "drv_uart.h"
#define SYSCON_BASE 0x40048000
#define MEMMAP HWREG32(SYSCON_BASE + 0x000)
#define SYSPLLCTRL HWREG32(SYSCON_BASE + 0x008)
#define SYSPLLSTAT HWREG32(SYSCON_BASE + 0x00c)
#define SYSPLLCLKSEL HWREG32(SYSCON_BASE + 0x040)
#define SYSPLLCLKUEN HWREG32(SYSCON_BASE + 0x044)
#define MAINCLKSEL HWREG32(SYSCON_BASE + 0x070)
#define MAINCLKUEN HWREG32(SYSCON_BASE + 0x074)
#define AHBCLKCTRL HWREG32(SYSCON_BASE + 0x080)
#define PDRUNCFG HWREG32(SYSCON_BASE + 0x238)
#define SCB_BASE 0xe000e000
#define SYST_CSR HWREG32(SCB_BASE + 0x010)
#define SYST_RVR HWREG32(SCB_BASE + 0x014)
#define NVIC_ISER HWREG32(SCB_BASE + 0x100)
#define NVIC_ICER HWREG32(SCB_BASE + 0x180)
#define NVIC_ISPR HWREG32(SCB_BASE + 0x200)
#define NVIC_ICPR HWREG32(SCB_BASE + 0x280)
#define NVIC_IPR(irqno) HWREG32(SCB_BASE + 0x400 + (((irqno) / 4) << 2))
#define SCB_SHPR3 HWREG32(SCB_BASE + 0xd20)
extern unsigned char __bss_end__[];
extern unsigned char _ram_end[];
/**
* This is the timer interrupt service routine.
*/
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
void os_clock_init(void)
{
/* bump up system clock 12MHz to 48MHz, using IRC (internal RC) osc. */
MAINCLKSEL = 0; // main clock: IRC @12MHz (default, for safety)
MAINCLKUEN = 0;
MAINCLKUEN = 1;
PDRUNCFG &= ~0x80; // power up System PLL
SYSPLLCLKSEL = 0; // PLL clock source: IRC osc
SYSPLLCLKUEN = 0;
SYSPLLCLKUEN = 1;
SYSPLLCTRL = 0x23; // Fcco = 2 x P x FCLKOUT
// 192MHz = 2 x 2 x 48MHz
// M = FCLKOUT / FCLKIN
// 4 = 48MHz / 12MHz
while (!(SYSPLLSTAT & 1)); // wait for lock PLL
MAINCLKSEL = 3; // main clock: system PLL
MAINCLKUEN = 0;
MAINCLKUEN = 1;
AHBCLKCTRL |= (1 << 16); // power up IOCON
}
void SysTick_init(void)
{
rt_uint32_t shpr3;
/* set SysTick interrupt priority */
shpr3 = SCB_SHPR3;
shpr3 &= ~0xff000000;
shpr3 |= 0x40 << 24;
SCB_SHPR3 = shpr3;
/* start SysTick */
SYST_CSR = 0x06; // Clock source:Core, SysTick Exception:enable
SYST_RVR = (CPU_CLOCK / RT_TICK_PER_SECOND) - 1;
SYST_CSR = 0x07; // Counter:enable
}
/**
* This function initializes LPC1114 SoC.
*/
void rt_hw_board_init(void)
{
os_clock_init();
/* init SysTick */
SysTick_init();
#ifdef RT_USING_HEAP
/* initialize system heap */
rt_system_heap_init((void *)&__bss_end__, (void *)&_ram_end);
#endif
/* initialize uart */
rt_hw_uart_init();
#ifdef RT_USING_CONSOLE
/* set console device */
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
/**
* Enable External Interrupt
*/
void NVIC_EnableIRQ(rt_int32_t irqno)
{
NVIC_ISER = 1UL << (irqno & 0x1f);
}
/**
* Disable External Interrupt
*/
void NVIC_DisableIRQ(rt_int32_t irqno)
{
NVIC_ICER = 1UL << (irqno & 0x1f);
}
/**
* Get Pending Interrupt
* Different from CMSIS implementation,
* returns zero/non-zero, not zero/one.
*/
rt_uint32_t NVIC_GetPendingIRQ(rt_int32_t irqno)
{
return NVIC_ISPR & (1UL << (irqno & 0x1f));
}
/**
* Set Pending Interrupt
*/
void NVIC_SetPendingIRQ(rt_int32_t irqno)
{
NVIC_ISPR = 1UL << (irqno & 0x1f);
}
/**
* Clear Pending Interrupt
*/
void NVIC_ClearPendingIRQ(rt_int32_t irqno)
{
NVIC_ICPR = 1UL << (irqno & 0x1f);
}
/**
* Set Interrupt Priority
* Different from CMSIS implementation,
* this code supports only external (device specific) interrupt.
*/
void NVIC_SetPriority(rt_int32_t irqno, rt_uint32_t priority)
{
rt_uint32_t shift, ipr;
shift = (irqno % 4) * 8;
ipr = NVIC_IPR(irqno);
ipr &= ~(0xffUL << shift);
ipr |= (priority & 0xff) << shift;
NVIC_IPR(irqno) = ipr;
}
bsp/lpc1114/driver/board.h
+25
View File
@@ -0,0 +1,25 @@
/*
* Copyright (c) 2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-05 jg1uaa the first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#define CPU_CLOCK 48000000 // Hz
void rt_hw_board_init(void);
void NVIC_EnableIRQ(rt_int32_t irqno);
void NVIC_DisableIRQ(rt_int32_t irqno);
rt_uint32_t NVIC_GetPendingIRQ(rt_int32_t irqno);
void NVIC_SetPendingIRQ(rt_int32_t irqno);
void NVIC_ClearPendingIRQ(rt_int32_t irqno);
void NVIC_SetPriority(rt_int32_t irqno, rt_uint32_t priority);
#endif /* __BOARD_H__ */
bsp/lpc1114/driver/drv_uart.c
+177
View File
@@ -0,0 +1,177 @@
/*
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-05-18 Bernard The first version for LPC40xx
* 2019-05-05 jg1uaa port to LPC1114
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <rthw.h>
#include "board.h" // CPU_CLOCK
#include "drv_uart.h"
#ifdef RT_USING_SERIAL
#define UART_BASE 0x40008000 // UART (only one)
#define UART_IRQ 21
#define UART_CLOCK (CPU_CLOCK / 1) // Hz
#define URBR HWREG32(UART_BASE + 0x00) // R-
#define UTHR HWREG32(UART_BASE + 0x00) // -W
#define UIER HWREG32(UART_BASE + 0x04) // RW
#define UIIR HWREG32(UART_BASE + 0x08) // R-
#define UFCR HWREG32(UART_BASE + 0x08) // -W
#define ULCR HWREG32(UART_BASE + 0x0c) // RW
#define UMCR HWREG32(UART_BASE + 0x10) // RW
#define ULSR HWREG32(UART_BASE + 0x14) // R-
#define UMSR HWREG32(UART_BASE + 0x18) // R-
#define UDLL HWREG32(UART_BASE + 0x00) // RW
#define UDLM HWREG32(UART_BASE + 0x04) // RW
#define IOCONFIG_BASE 0x40044000
#define IOCON_PIO1_6 HWREG32(IOCONFIG_BASE + 0xa4)
#define IOCON_PIO1_7 HWREG32(IOCONFIG_BASE + 0xa8)
#define SYSCON_BASE 0x40048000
#define AHBCLKCTRL HWREG32(SYSCON_BASE + 0x80)
#define UARTCLKDIV HWREG32(SYSCON_BASE + 0x98)
static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
rt_uint32_t Fdiv = 0;
RT_ASSERT(serial != RT_NULL);
/* Initialize UART Configuration parameter structure to default state:
* Baudrate = 115200 bps
* 8 data bit
* 1 Stop bit
* None parity
*/
/* set DLAB=1 */
ULCR |= 0x80;
/* config uart baudrate */
Fdiv = UART_CLOCK / (cfg->baud_rate * 16);
UDLM = Fdiv / 256;
UDLL = Fdiv % 256;
/* set DLAB=0 */
ULCR &= ~0x80;
/* config to 8 data bit,1 Stop bit,None parity */
ULCR |= 0x03;
/*enable and reset FIFO*/
UFCR = 0x07;
return RT_EOK;
}
static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
{
RT_ASSERT(serial != RT_NULL);
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
UIER &= ~0x01;
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
UIER |= 0x01;
break;
}
return RT_EOK;
}
static int lpc_putc(struct rt_serial_device *serial, char c)
{
while (!(ULSR & 0x20));
UTHR = c;
return 1;
}
static int lpc_getc(struct rt_serial_device *serial)
{
if (ULSR & 0x01)
return URBR;
else
return -1;
}
static const struct rt_uart_ops lpc_uart_ops =
{
lpc_configure,
lpc_control,
lpc_putc,
lpc_getc,
};
struct rt_serial_device serial;
void UART_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
switch (UIIR & 0x0e)
{
case 0x04:
case 0x0C:
rt_hw_serial_isr(&serial, RT_SERIAL_EVENT_RX_IND);
break;
case 0x06:
(void)ULSR;
break;
default:
(void)ULSR;
break;
}
/* leave interrupt */
rt_interrupt_leave();
}
int rt_hw_uart_init(void)
{
rt_err_t ret = RT_EOK;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
serial.ops = &lpc_uart_ops;
serial.config = config;
serial.parent.user_data = NULL;
/*
* Initialize UART pin connect
* P1.6: U0_RXD
* P1.7: U0_TXD
*/
IOCON_PIO1_6 = 0xc1;
IOCON_PIO1_7 = 0xc1;
/* setup the uart power and clock */
UARTCLKDIV = 0x01; // UART PCLK = system clock / 1
AHBCLKCTRL |= (1 << 12); // UART power-up
/* priority = 1 */
NVIC_SetPriority(UART_IRQ, 0x01 << 6);
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(UART_IRQ);
/* register UART device */
ret = rt_hw_serial_register(&serial, "uart",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
NULL);
return ret;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
#endif /* RT_USING_SERIAL */
bsp/lpc1114/driver/drv_uart.h
+16
View File
@@ -0,0 +1,16 @@
/*
* Copyright (c) 2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-05 jg1uaa the first version
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
int rt_hw_uart_init(void);
#endif
bsp/lpc1114/driver/startup_gcc.s
+130
View File
@@ -0,0 +1,130 @@
/*
* Copyright (c) 2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-05 jg1uaa the first version
*/
#include "../rtconfig.h"
/* Interrupt Vectors */
.section .isr_vector
.thumb
.align 0
.long _estack // MSP default value
.long Reset_Handler + 1 // 1: Reset
.long default_handler + 1 // 2: NMI
.long HardFault_Handler + 1 // 3: HardFault
.long default_handler + 1 // 4: reserved
.long default_handler + 1 // 5: reserved
.long default_handler + 1 // 6: reserved
.long default_handler + 1 // 7: reserved
.long default_handler + 1 // 8: reserved
.long default_handler + 1 // 9: reserved
.long default_handler + 1 // 10: reserved
.long default_handler + 1 // 11: SVCall
.long default_handler + 1 // 12: reserved
.long default_handler + 1 // 13: reserved
.long PendSV_Handler + 1 // 14: PendSV
.long SysTick_Handler + 1 // 15: SysTick
.long default_handler + 1 // 16: External Interrupt(0)
.long default_handler + 1 // 17: External Interrupt(1)
.long default_handler + 1 // 18: External Interrupt(2)
.long default_handler + 1 // 19: External Interrupt(3)
.long default_handler + 1 // 20: External Interrupt(4)
.long default_handler + 1 // 21: External Interrupt(5)
.long default_handler + 1 // 22: External Interrupt(6)
.long default_handler + 1 // 23: External Interrupt(7)
.long default_handler + 1 // 24: External Interrupt(8)
.long default_handler + 1 // 25: External Interrupt(9)
.long default_handler + 1 // 26: External Interrupt(10)
.long default_handler + 1 // 27: External Interrupt(11)
.long default_handler + 1 // 28: External Interrupt(12)
.long default_handler + 1 // 29: External Interrupt(13) C_CAN
.long default_handler + 1 // 30: External Interrupt(14) SPI/SSP1
.long default_handler + 1 // 31: External Interrupt(15) I2C
.long default_handler + 1 // 32: External Interrupt(16) CT16B0
.long default_handler + 1 // 33: External Interrupt(17) CT16B1
.long default_handler + 1 // 34: External Interrupt(18) CT32B0
.long default_handler + 1 // 35: External Interrupt(19) CT32B1
.long default_handler + 1 // 36: External Interrupt(20) SPI/SSP0
.long UART_IRQHandler + 1 // 37: External Interrupt(21) UART
.long default_handler + 1 // 38: External Interrupt(22)
.long default_handler + 1 // 39: External Interrupt(23)
.long default_handler + 1 // 40: External Interrupt(24) ADC
.long default_handler + 1 // 41: External Interrupt(25) WDT
.long default_handler + 1 // 42: External Interrupt(26) BOD
.long default_handler + 1 // 43: External Interrupt(27)
.long default_handler + 1 // 44: External Interrupt(28) PIO_3
.long default_handler + 1 // 45: External Interrupt(29) PIO_2
.long default_handler + 1 // 46: External Interrupt(30) PIO_1
.long default_handler + 1 // 47: External Interrupt(31) PIO_0
.long default_handler + 1 // 48: External Interrupt(32)
.long default_handler + 1 // 49: External Interrupt(33)
.long default_handler + 1 // 50: External Interrupt(34)
.long default_handler + 1 // 51: External Interrupt(35)
.long default_handler + 1 // 52: External Interrupt(36)
.long default_handler + 1 // 53: External Interrupt(37)
.long default_handler + 1 // 54: External Interrupt(38)
.long default_handler + 1 // 55: External Interrupt(39)
.long default_handler + 1 // 56: External Interrupt(40)
.long default_handler + 1 // 57: External Interrupt(41)
.long default_handler + 1 // 58: External Interrupt(42)
.long default_handler + 1 // 59: External Interrupt(43)
.long default_handler + 1 // 60: External Interrupt(44)
.long default_handler + 1 // 61: External Interrupt(45)
.long default_handler + 1 // 62: External Interrupt(46)
.long default_handler + 1 // 63: External Interrupt(47)
/* startup */
.section .text
.thumb
.align 0
.global Reset_Handler
Reset_Handler:
/* initialize .data */
data_init:
ldr r1, =_sidata
ldr r2, =_sdata
ldr r3, =_edata
cmp r2, r3
beq bss_init
data_loop:
ldrb r0, [r1]
add r1, r1, #1
strb r0, [r2]
add r2, r2, #1
cmp r2, r3
bne data_loop
/* initialize .bss */
bss_init:
mov r0, #0
ldr r2, =_sbss // sbss/ebss is 4byte aligned by link.lds
ldr r3, =_ebss
cmp r2, r3
beq start_main
bss_loop:
str r0, [r2]
add r2, r2, #4
cmp r2, r3
bne bss_loop
/* launch main() */
start_main:
#ifdef RT_USING_USER_MAIN
bl entry
#else
bl main
#endif
default_handler:
die:
b die
.pool
bsp/lpc1114/link.lds
+138
View File
@@ -0,0 +1,138 @@
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 32k /* 32KB flash */
DATA (rw) : ORIGIN = 0x10000000, LENGTH = 4k /* 4K sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x100;
_ram_end = ORIGIN(DATA) + LENGTH(DATA);
SECTIONS
{
.text :
{
. = ALIGN(4);
_stext = .;
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
. = ALIGN(4);
_etext = .;
} > CODE = 0
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
} > CODE
__exidx_end = .;
/* .data section which is used for initialized data */
.data : AT (_sidata)
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_sdata = . ;
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >DATA
.stack :
{
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >DATA
__bss_start__ = .;
.bss :
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_ebss = . ;
*(.bss.init)
} > DATA
__bss_end__ = .;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}
bsp/lpc1114/rtconfig.h
+258
View File
@@ -0,0 +1,258 @@
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
/* RT_USING_ARCH_DATA_TYPE is not set */
/* RT_USING_SMP is not set */
#define RT_ALIGN_SIZE 4
/* RT_THREAD_PRIORITY_8 is not set */
#define RT_THREAD_PRIORITY_32
/* RT_THREAD_PRIORITY_256 is not set */
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
/* RT_USING_OVERFLOW_CHECK is not set */
/* RT_USING_HOOK is not set */
/* RT_USING_IDLE_HOOK is not set */
#define IDLE_THREAD_STACK_SIZE 256
/* RT_USING_TIMER_SOFT is not set */
/* RT_DEBUG is not set */
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* RT_USING_SIGNALS is not set */
/* Memory Management */
#define RT_USING_MEMPOOL
/* RT_USING_MEMHEAP is not set */
/* RT_USING_NOHEAP is not set */
#define RT_USING_SMALL_MEM
/* RT_USING_SLAB is not set */
/* RT_USING_MEMTRACE is not set */
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
/* RT_USING_DEVICE_OPS is not set */
/* RT_USING_INTERRUPT_INFO is not set */
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart"
#define RT_VER_NUM 0x40001
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M0
/* ARCH_CPU_STACK_GROWS_UPWARD is not set */
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 512
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* RT_USING_CPLUSPLUS is not set */
/* Command shell */
/* RT_USING_FINSH is not set */
/* Device virtual file system */
/* RT_USING_DFS is not set */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 128
/* RT_USING_SYSTEM_WORKQUEUE is not set */
#define RT_USING_SERIAL
/* RT_SERIAL_USING_DMA is not set */
#define RT_SERIAL_RB_BUFSZ 64
/* RT_USING_CAN is not set */
/* RT_USING_HWTIMER is not set */
/* RT_USING_CPUTIME is not set */
/* RT_USING_I2C is not set */
#define RT_USING_PIN
/* RT_USING_ADC is not set */
/* RT_USING_PWM is not set */
/* RT_USING_MTD_NOR is not set */
/* RT_USING_MTD_NAND is not set */
/* RT_USING_MTD is not set */
/* RT_USING_PM is not set */
/* RT_USING_RTC is not set */
/* RT_USING_SDIO is not set */
/* RT_USING_SPI is not set */
/* RT_USING_WDT is not set */
/* RT_USING_AUDIO is not set */
/* RT_USING_SENSOR is not set */
/* Using WiFi */
/* RT_USING_WIFI is not set */
/* Using USB */
/* RT_USING_USB_HOST is not set */
/* RT_USING_USB_DEVICE is not set */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
/* RT_USING_PTHREADS is not set */
/* Network */
/* Socket abstraction layer */
/* RT_USING_SAL is not set */
/* Network interface device */
/* RT_USING_NETDEV is not set */
/* light weight TCP/IP stack */
/* RT_USING_LWIP is not set */
/* Modbus master and slave stack */
/* RT_USING_MODBUS is not set */
/* AT commands */
/* RT_USING_AT is not set */
/* VBUS(Virtual Software BUS) */
/* RT_USING_VBUS is not set */
/* Utilities */
/* RT_USING_RYM is not set */
/* RT_USING_ULOG is not set */
/* RT_USING_UTEST is not set */
/* RT_USING_LWP is not set */
/* RT-Thread online packages */
/* IoT - internet of things */
/* PKG_USING_PAHOMQTT is not set */
/* PKG_USING_WEBCLIENT is not set */
/* PKG_USING_MONGOOSE is not set */
/* PKG_USING_WEBTERMINAL is not set */
/* PKG_USING_CJSON is not set */
/* PKG_USING_JSMN is not set */
/* PKG_USING_LJSON is not set */
/* PKG_USING_EZXML is not set */
/* PKG_USING_NANOPB is not set */
/* Wi-Fi */
/* Marvell WiFi */
/* PKG_USING_WLANMARVELL is not set */
/* Wiced WiFi */
/* PKG_USING_WLAN_WICED is not set */
/* PKG_USING_COAP is not set */
/* PKG_USING_NOPOLL is not set */
/* PKG_USING_NETUTILS is not set */
/* PKG_USING_AT_DEVICE is not set */
/* IoT Cloud */
/* PKG_USING_ONENET is not set */
/* PKG_USING_GAGENT_CLOUD is not set */
/* PKG_USING_ALI_IOTKIT is not set */
/* PKG_USING_AZURE is not set */
/* security packages */
/* PKG_USING_MBEDTLS is not set */
/* PKG_USING_libsodium is not set */
/* PKG_USING_TINYCRYPT is not set */
/* language packages */
/* PKG_USING_LUA is not set */
/* PKG_USING_JERRYSCRIPT is not set */
/* PKG_USING_MICROPYTHON is not set */
/* multimedia packages */
/* PKG_USING_OPENMV is not set */
/* PKG_USING_MUPDF is not set */
/* tools packages */
/* PKG_USING_CMBACKTRACE is not set */
/* PKG_USING_EASYFLASH is not set */
/* PKG_USING_EASYLOGGER is not set */
/* PKG_USING_SYSTEMVIEW is not set */
/* system packages */
/* PKG_USING_GUIENGINE is not set */
/* PKG_USING_CAIRO is not set */
/* PKG_USING_PIXMAN is not set */
/* PKG_USING_LWEXT4 is not set */
/* PKG_USING_PARTITION is not set */
/* PKG_USING_FAL is not set */
/* PKG_USING_SQLITE is not set */
/* PKG_USING_RTI is not set */
/* PKG_USING_LITTLEVGL2RTT is not set */
/* PKG_USING_CMSIS is not set */
/* PKG_USING_DFS_YAFFS is not set */
/* peripheral libraries and drivers */
/* PKG_USING_REALTEK_AMEBA is not set */
/* PKG_USING_SHT2X is not set */
/* PKG_USING_AHT10 is not set */
/* PKG_USING_AP3216C is not set */
/* PKG_USING_STM32_SDIO is not set */
/* PKG_USING_ICM20608 is not set */
/* miscellaneous packages */
/* PKG_USING_LIBCSV is not set */
/* PKG_USING_OPTPARSE is not set */
/* PKG_USING_FASTLZ is not set */
/* PKG_USING_MINILZO is not set */
/* PKG_USING_QUICKLZ is not set */
/* PKG_USING_MULTIBUTTON is not set */
/* PKG_USING_CANFESTIVAL is not set */
/* PKG_USING_ZLIB is not set */
/* PKG_USING_DSTR is not set */
/* sample package */
/* samples: kernel and components samples */
/* PKG_USING_KERNEL_SAMPLES is not set */
/* PKG_USING_FILESYSTEM_SAMPLES is not set */
/* PKG_USING_NETWORK_SAMPLES is not set */
/* PKG_USING_PERIPHERAL_SAMPLES is not set */
/* example package: hello */
/* PKG_USING_HELLO is not set */
#define SOC_LPC1114
#endif
bsp/lpc1114/rtconfig.py
+58
View File
@@ -0,0 +1,58 @@
import os
# toolchains options
ARCH ='arm'
CPU ='cortex-m0'
CROSS_TOOL ='gcc'
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = '../..'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'/usr/bin'
else:
print 'Please make sure your toolchains is GNU GCC!'
exit(0)
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'release'
# BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'g++'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -Wall'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T link.lds'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -Os'
CXXFLAGS = CFLAGS
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
bsp/ls1cdev/drivers/drv_wdt.c
+199
View File
@@ -0,0 +1,199 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-06 sundm75 first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#ifdef RT_USING_WDT
#include <drivers/watchdog.h>
#include "drv_wdt.h"
#include "ls1c_wdog.h"
#include "ls1c_clock.h"
typedef enum
{
RESTENABLE = 0x0,
INTERRUPTENABLE = 0x1,
}wdt_enable_mode;
static rt_uint32_t heartbeat = 0;
static rt_err_t wdt_stop(void)
{
rt_err_t ret = RT_EOK;
Wdog_Reset();
ret = (rt_err_t) Wdog_Disable();
if (ret != RT_EOK)
{
rt_kprintf("Wdog_Disable error!\n");
return RT_ERROR;
}
return ret;
}
static rt_err_t wdt_start(int mode)
{
rt_err_t ret = RT_EOK;
wdt_enable_mode wdt_mode = RESTENABLE;
ret = (rt_err_t) Wdog_Disable();
if (ret != RT_EOK)
{
rt_kprintf("Wdog_Disable error!\n");
return RT_ERROR;
}
if((mode == RESTENABLE) || (mode == INTERRUPTENABLE))
{
wdt_mode = mode;
}
Wdog_Enable();
Wdog_Set();
if (ret != RT_EOK)
{
rt_kprintf("Wdog_Enable error!\n");
return RT_ERROR;
}
return ret;
}
static rt_err_t wdt_keepalive(void)
{
rt_err_t ret = RT_EOK;
rt_uint32_t index = 0;
index = heartbeat * clk_get_apb_rate();
ret = (rt_err_t) Wdog_LoadValue(index);
Wdog_Set();
if (ret != 0)
{
rt_kprintf("LS1C_Wdog_ClrTimeout error!\n");
return RT_ERROR;
}
return ret;
}
static rt_uint32_t wdt_get_timeleft(void)
{
rt_uint32_t cnt = 0;
rt_uint32_t second = 0;
cnt = (rt_uint32_t) Wdog_GetValue();
second = cnt/clk_get_apb_rate();
return second;
}
static rt_err_t wdt_set_timeout(rt_uint32_t second)
{
rt_err_t ret = RT_EOK;
rt_uint32_t index = 0;
index = second * clk_get_apb_rate();
ret = (rt_err_t) Wdog_LoadValue(index);
if (ret != RT_EOK)
{
rt_kprintf("Wdog_LoadValue error!\n");
return RT_ERROR;
}
return ret;
}
static rt_err_t watchdog_init(rt_watchdog_t *wdt)
{
struct wdt_driver *wdt_drv = wdt->parent.user_data;
if (wdt_drv->in_use) return -RT_EBUSY;
Wdog_Init();
return RT_EOK;
}
static rt_err_t watchdog_ctrl(rt_watchdog_t *wdt, int cmd, void *arg)
{
rt_uint32_t val;
int mode;
switch (cmd)
{
case RT_DEVICE_CTRL_WDT_START:
mode = *((int *)(arg));
wdt_start(mode);
break;
case RT_DEVICE_CTRL_WDT_STOP:
Wdog_Disable();
break;
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
wdt_keepalive();
break;
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
heartbeat = *((rt_uint32_t *)(arg));
wdt_set_timeout(heartbeat);
break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
arg = &heartbeat;
break;
case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
val = (rt_uint32_t) wdt_get_timeleft();
arg = &val;
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
struct rt_watchdog_ops watchdog_ops =
{
.init = &watchdog_init,
.control = &watchdog_ctrl,
};
int wdt_exit(void *priv_data)
{
return 0;
}
int rt_hw_wdt_init(void)
{
rt_watchdog_t *wdt_dev;
struct wdt_driver *wdt_drv;
wdt_drv = (struct wdt_driver *)rt_malloc(sizeof(struct wdt_driver));
rt_memset(wdt_drv, 0, sizeof(struct wdt_driver));
wdt_dev = (rt_watchdog_t *)rt_malloc(sizeof(rt_watchdog_t));
if (wdt_dev == RT_NULL)
{
rt_kprintf("ERROR: %s rt_watchdog_t malloc failed\n", __func__);
}
wdt_dev->ops = &watchdog_ops;
rt_hw_watchdog_register(wdt_dev, "wdt", RT_DEVICE_OFLAG_RDWR, wdt_drv);
return 0;
}
INIT_BOARD_EXPORT(rt_hw_wdt_init);
#endif
bsp/ls1cdev/drivers/drv_wdt.h
+23
View File
@@ -0,0 +1,23 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-06 sundm75 first version
*/
#ifndef WDT_H_
#define WDT_H_
struct wdt_driver
{
unsigned long in_use;
void* priv;
};
int rt_hw_wdt_init(void);
#endif /* WDT_H_ */
bsp/ls1cdev/libraries/ls1c_wdog.c
+91
View File
@@ -0,0 +1,91 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-06 sundm75 first version
*/
#include "ls1c.h"
#include "ls1c_wdog.h"
/*
系统先配置看门狗使能位 WDT_EN;
然后配置看门狗计数器的初始值 WDT_TIMER;
当设置 WDT_SET 后，计数器开始减计数;
当还没有减到 0 时，重置看门狗计数器，系统不会重启;
当看门狗计数器减到 0 时，则系统重启。
*/
static unsigned int WDT_timer = 0;
/* 暂时为空 */
unsigned int Wdog_Init(void)
{
return 0;
}
/* 配置看门狗使能寄存器(WDT_EN) */
unsigned int Wdog_Enable(void)
{
unsigned int ctrl;
ctrl = (WDT_EN);
ctrl |= 0x01;
WDT_EN = ctrl;
return 0;
}
/* 配置看门狗失能寄存器(WDT_EN) */
unsigned int Wdog_Disable(void)
{
unsigned int ctrl;
ctrl = (WDT_EN);
ctrl &= ~0x01;
WDT_EN = ctrl;
return 0;
}
/* 配置看门狗设置寄存器 (WDT_SET) */
unsigned int Wdog_Set(void)
{
unsigned int ctrl;
ctrl = (WDT_SET);
ctrl |= 0x01;
WDT_SET = ctrl;
return 0;
}
/* 配置看门狗设置寄存器 (WDT_SET) */
unsigned int Wdog_Reset(void)
{
unsigned int ctrl;
ctrl = (WDT_SET);
ctrl &= ~0x01;
WDT_SET = ctrl;
return 0;
}
/* 获得看门狗计数器(WDT_timer) 的值*/
unsigned int Wdog_GetValue(void)
{
unsigned int cnt;
cnt = (WDT_TIMER);
return cnt;
}
/* 配置看门狗计数器(WDT_timer)的值*/
unsigned int Wdog_LoadValue(unsigned int cnt)
{
WDT_TIMER = cnt;
WDT_timer = cnt;
return 0;
}
/* 获得看门狗计数器设定值 */
unsigned int Wdog_GetPreValue(void)
{
return WDT_timer;
}
bsp/ls1cdev/libraries/ls1c_wdog.h
+32
View File
@@ -0,0 +1,32 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-05-06 sundm75 first version
*/
#ifndef _LS1C_WDOG_H_
#define _LS1C_WDOG_H_
#ifdef __cplusplus
extern "C" {
#endif
unsigned int Wdog_Init(void); // 暂时为空
unsigned int Wdog_Enable(void); // 看门狗使能寄存器（WDT_EN）
unsigned int Wdog_Disable(void); // 看门狗失能寄存器（WDT_EN）
unsigned int Wdog_Set(void); // 看门狗设置寄存器 (WDT_SET)
unsigned int Wdog_Reset(void); // 看门狗设置寄存器 (WDT_SET)
unsigned int Wdog_GetValue(void); // 获得看门狗计数器（WDT_timer）
unsigned int Wdog_LoadValue(unsigned int cnt); // 设置看门狗计数器（WDT_timer）
unsigned int Wdog_GetPreValue(void); // 获得看门狗计数器设定值
#ifdef __cplusplus
}
#endif
#endif /* _LS1C_WDOG_H_ */
bsp/mm32l07x/drivers/board.h
+1 -1
View File
@@ -16,7 +16,7 @@
#define SRAM_SIZE 0x2000
#define SRAM_END (SRAM_BASE + SRAM_SIZE)
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
bsp/nuvoton_m451/applications/startup.c
+1 -1
View File
@@ -29,7 +29,7 @@ extern int finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define M451_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
bsp/qemu-vexpress-a9/.cproject
+175
View File
File diff suppressed because one or more lines are too long
bsp/qemu-vexpress-a9/.gitignore
+44
View File
@@ -0,0 +1,44 @@
*.pyc
*.map
*.dblite
*.elf
*.bin
*.hex
*.axf
*.exe
*.pdb
*.idb
*.ilk
*.old
build
Debug
documentation/html
packages/
*~
*.o
*.obj
*.out
*.bak
*.dep
*.lib
*.i
*.d
.DS_Stor*
.config 3
.config 4
.config 5
Midea-X1
*.uimg
GPATH
GRTAGS
GTAGS
.vscode
JLinkLog.txt
JLinkSettings.ini
DebugConfig/
RTE/
settings/
*.uvguix*
cconfig.h
.settings
drivers/automac.h
bsp/qemu-vexpress-a9/.project
+53
View File
@@ -0,0 +1,53 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>qemu-vexpress-a9</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources>
<link>
<name>rt-thread</name>
<type>2</type>
<locationURI>virtual:/virtual</locationURI>
</link>
<link>
<name>rt-thread/components</name>
<type>2</type>
<locationURI>$%7BPARENT-2-PROJECT_LOC%7D/components</locationURI>
</link>
<link>
<name>rt-thread/include</name>
<type>2</type>
<locationURI>$%7BPARENT-2-PROJECT_LOC%7D/include</locationURI>
</link>
<link>
<name>rt-thread/libcpu</name>
<type>2</type>
<locationURI>$%7BPARENT-2-PROJECT_LOC%7D/libcpu</locationURI>
</link>
<link>
<name>rt-thread/src</name>
<type>2</type>
<locationURI>$%7BPARENT-2-PROJECT_LOC%7D/src</locationURI>
</link>
</linkedResources>
</projectDescription>
bsp/qemu-vexpress-a9/drivers/automac.h
+15
View File
@@ -0,0 +1,15 @@
#ifndef __MAC_AUTO_GENERATE_H__
#define __MAC_AUTO_GENERATE_H__
/* Automatically generated file; DO NOT EDIT. */
/* mac configure file for RT-Thread qemu */
#define AUTOMAC0 0x52
#define AUTOMAC1 0x54
#define AUTOMAC2 0x00
#define AUTOMAC3 0x28
#define AUTOMAC4 0xae
#define AUTOMAC5 0xeb
#endif
bsp/qemu-vexpress-a9/drivers/drv_sdio.c
+1 -4
View File
@@ -440,14 +440,11 @@ int pl180_init(void)
sdhci->priv = pdat;
write32(pdat->virt + PL180_POWER, 0xbf);
// rt_kprintf("power:0x%08x\n", read32(pdat->virt + PL180_POWER));
host->ops = &ops;
host->freq_min = 400000;
host->freq_max = 50000000;
host->valid_ocr = VDD_32_33 | VDD_33_34;
// host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ | MMCSD_BUSWIDTH_4;
host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ;
host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ | MMCSD_BUSWIDTH_4;
host->max_seg_size = 2048;
host->max_dma_segs = 10;
host->max_blk_size = 512;
bsp/qemu-vexpress-a9/drivers/drv_smc911x.c
+7 -6
View File
@@ -2,6 +2,7 @@
#include <rtthread.h>
#include <netif/ethernetif.h>
#include <lwipopts.h>
#include <automac.h>
#define MAX_ADDR_LEN 6
#define SMC911X_EMAC_DEVICE(eth) (struct eth_device_smc911x*)(eth)
@@ -512,12 +513,12 @@ int smc911x_emac_hw_init(void)
smc911x_reg_write(&_emac, INT_CFG, INT_CFG_IRQ_POL | INT_CFG_IRQ_TYPE);
/* test MAC address */
_emac.enetaddr[0] = 0x52;
_emac.enetaddr[1] = 0x54;
_emac.enetaddr[2] = 0x00;
_emac.enetaddr[3] = 0x11;
_emac.enetaddr[4] = 0x22;
_emac.enetaddr[5] = 0x33;
_emac.enetaddr[0] = AUTOMAC0;
_emac.enetaddr[1] = AUTOMAC1;
_emac.enetaddr[2] = AUTOMAC2;
_emac.enetaddr[3] = AUTOMAC3;
_emac.enetaddr[4] = AUTOMAC4;
_emac.enetaddr[5] = AUTOMAC5;
#ifdef RT_USING_DEVICE_OPS
_emac.parent.parent.ops = &smc911x_emac_ops;
bsp/qemu-vexpress-a9/drivers/secondary_cpu.c
+2
View File
@@ -17,6 +17,8 @@
#include "drv_timer.h"
#ifdef RT_USING_SMP
#include <interrupt.h>
static void rt_hw_timer2_isr(int vector, void *param)
{
rt_tick_increase();
bsp/qemu-vexpress-a9/makefile.targets
+4
View File
@@ -0,0 +1,4 @@
clean2:
-$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(SECONDARY_FLASH)$(SECONDARY_SIZE)$(ASM_DEPS)$(S_UPPER_DEPS)$(C_DEPS)$(CPP_DEPS)
-$(RM) $(OBJS) *.elf
-@echo ' '
bsp/qemu-vexpress-a9/rtconfig.py
+24
View File
@@ -1,5 +1,29 @@
import os
import uuid
def get_mac_address():
mac=uuid.UUID(int = uuid.getnode()).hex[-12:]
return "#define AUTOMAC".join([str(e/2 + 1) + ' 0x' + mac[e:e+2] + '\n' for e in range(5,11,2)])
header = '''
#ifndef __MAC_AUTO_GENERATE_H__
#define __MAC_AUTO_GENERATE_H__
/* Automatically generated file; DO NOT EDIT. */
/* mac configure file for RT-Thread qemu */
#define AUTOMAC0 0x52
#define AUTOMAC1 0x54
#define AUTOMAC2 0x00
#define AUTOMAC'''
end = '''
#endif
'''
with open('drivers/automac.h', 'w') as f:
f.write(header + get_mac_address() + end)
# toolchains options
ARCH='arm'
CPU='cortex-a'
bsp/samd21/applications/startup.c
+2 -2
View File
@@ -29,7 +29,7 @@ extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
@@ -78,7 +78,7 @@ void rtthread_startup(void)
rt_system_timer_init();
#ifdef RT_USING_HEAP
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);
bsp/stm32/libraries/HAL_Drivers/SConscript
+7 -2
View File
@@ -27,9 +27,10 @@ if GetDepend(['RT_USING_QSPI']):
src += ['drv_qspi.c']
if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
src += ['drv_soft_i2c.c']
if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
src += ['drv_soft_i2c.c']
if GetDepend('RT_USING_LWIP'):
if GetDepend('BSP_USING_ETH'):
src += ['drv_eth.c']
if GetDepend(['RT_USING_ADC']):
@@ -38,6 +39,10 @@ if GetDepend(['RT_USING_ADC']):
if GetDepend(['RT_USING_CAN']):
src += ['drv_can.c']
if GetDepend(['RT_USING_PM', 'SOC_SERIES_STM32L4']):
src += ['drv_pm.c']
src += ['drv_lptim.c']
if GetDepend('BSP_USING_SDRAM'):
src += ['drv_sdram.c']
bsp/stm32/libraries/HAL_Drivers/drv_eth.c
+25 -22
View File
@@ -91,10 +91,10 @@ static rt_err_t rt_stm32_eth_init(rt_device_t dev)
EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE;
#ifdef RT_LWIP_USING_HW_CHECKSUM
EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
#else
#else
EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_SOFTWARE;
#endif
HAL_ETH_DeInit(&EthHandle);
/* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */
@@ -431,31 +431,34 @@ static void phy_monitor_thread_entry(void *parameter)
uint8_t phy_addr = 0xFF;
uint8_t phy_speed_new = 0;
rt_uint32_t status = 0;
uint8_t detected_count = 0;
/* phy search */
rt_uint32_t i, temp;
for (i = 0; i <= 0x1F; i++)
while(phy_addr == 0xFF)
{
EthHandle.Init.PhyAddress = i;
HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ID1_REG, (uint32_t *)&temp);
if (temp != 0xFFFF && temp != 0x00)
/* phy search */
rt_uint32_t i, temp;
for (i = 0; i <= 0x1F; i++)
{
phy_addr = i;
break;
EthHandle.Init.PhyAddress = i;
HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ID1_REG, (uint32_t *)&temp);
if (temp != 0xFFFF && temp != 0x00)
{
phy_addr = i;
break;
}
}
detected_count++;
rt_thread_mdelay(1000);
if (detected_count > 10)
{
LOG_E("No PHY device was detected, please check hardware!");
}
}
if (phy_addr == 0xFF)
{
LOG_E("phy not probe!");
return;
}
else
{
LOG_D("found a phy, address:0x%02X", phy_addr);
}
LOG_D("Found a phy, address:0x%02X", phy_addr);
/* RESET PHY */
LOG_D("RESET PHY!");
@@ -667,4 +670,4 @@ __exit:
return state;
}
INIT_APP_EXPORT(rt_hw_stm32_eth_init);
INIT_DEVICE_EXPORT(rt_hw_stm32_eth_init);
bsp/stm32/libraries/HAL_Drivers/drv_gpio.c
+3
View File
@@ -756,6 +756,9 @@ int rt_hw_pin_init(void)
#endif
#if defined(__HAL_RCC_GPIOG_CLK_ENABLE)
#ifdef SOC_SERIES_STM32L4
HAL_PWREx_EnableVddIO2();
#endif
__HAL_RCC_GPIOG_CLK_ENABLE();
#endif
bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c
+1 -1
View File
@@ -399,7 +399,7 @@ void TIM8_UP_TIM13_IRQHandler(void)
}
#endif
#ifdef BSP_USING_TIM14
#if defined(SOC_SERIES_STM32F4)
#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
void TIM8_TRG_COM_TIM14_IRQHandler(void)
#elif defined(SOC_SERIES_STM32F0)
void TIM14_IRQHandler(void)

Some files were not shown because too many files have changed in this diff Show More