Upload mm32l07x BSP。

2026-11-09 20:45:41 +08:00 · 2019-03-29 17:04:48 +08:00
1 parent 0f22a85eba
commit 9da6917881
@@ -0,0 +1,20 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "drivers/Kconfig"
@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        17. January 2013
+* $Revision:    V1.4.1
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_common_tables.h
+*
+* Description:  This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+extern const uint16_t armBitRevTable[1024];
+extern const q15_t armRecipTableQ15[64];
+extern const q31_t armRecipTableQ31[64];
+extern const q31_t realCoefAQ31[1024];
+extern const q31_t realCoefBQ31[1024];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
+extern const q31_t twiddleCoefQ31[6144];
+extern const q15_t twiddleCoefQ15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+
+#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
+#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
+#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
+#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
+
+#endif /*  ARM_COMMON_TABLES_H */
@@ -0,0 +1,85 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        17. January 2013
+* $Revision:    V1.4.1
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_const_structs.h
+*
+* Description:  This file has constant structs that are initialized for
+*               user convenience.  For example, some can be given as
+*               arguments to the arm_cfft_f32() function.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
+      16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
+      32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
+      64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
+      128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
+      256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
+      512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
+      1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
+      2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
+      4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH
+   };
+
+#endif
@@ -0,0 +1,136 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
+*
+* $Date:        31. July 2014
+* $Revision: 	V1.4.4
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_common_tables.h
+*
+* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+extern const uint16_t armBitRevTable[1024];
+extern const q15_t armRecipTableQ15[64];
+extern const q31_t armRecipTableQ31[64];
+//extern const q31_t realCoefAQ31[1024];
+//extern const q31_t realCoefBQ31[1024];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
+extern const q31_t twiddleCoef_16_q31[24];
+extern const q31_t twiddleCoef_32_q31[48];
+extern const q31_t twiddleCoef_64_q31[96];
+extern const q31_t twiddleCoef_128_q31[192];
+extern const q31_t twiddleCoef_256_q31[384];
+extern const q31_t twiddleCoef_512_q31[768];
+extern const q31_t twiddleCoef_1024_q31[1536];
+extern const q31_t twiddleCoef_2048_q31[3072];
+extern const q31_t twiddleCoef_4096_q31[6144];
+extern const q15_t twiddleCoef_16_q15[24];
+extern const q15_t twiddleCoef_32_q15[48];
+extern const q15_t twiddleCoef_64_q15[96];
+extern const q15_t twiddleCoef_128_q15[192];
+extern const q15_t twiddleCoef_256_q15[384];
+extern const q15_t twiddleCoef_512_q15[768];
+extern const q15_t twiddleCoef_1024_q15[1536];
+extern const q15_t twiddleCoef_2048_q15[3072];
+extern const q15_t twiddleCoef_4096_q15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+
+/* floating-point bit reversal tables */
+#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
+#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
+#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
+#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
+
+/* fixed-point bit reversal tables */
+#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12  )
+#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24  )
+#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
+#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
+#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
+#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
+#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
+#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+
+/* Tables for Fast Math Sine and Cosine */
+extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+
+#endif /*  ARM_COMMON_TABLES_H */
@@ -0,0 +1,79 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
+*
+* $Date:        31. July 2014
+* $Revision: 	V1.4.4
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_const_structs.h
+*
+* Description:	This file has constant structs that are initialized for
+*              user convenience.  For example, some can be given as
+*              arguments to the arm_cfft_f32() function.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+
+#endif
@@ -0,0 +1,6 @@
+
+Release Notes
+
+
+2017-04-21
+MM32L0xx  std lib version is updated to Ver2.0.0
@@ -0,0 +1,88 @@
+/**
+******************************************************************************
+* @file  HAL_bkp.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the BKP firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_BKP_H
+#define __HAL_BKP_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+
+#define BKP_DR1                          ((uint16_t)0x0050)
+#define BKP_DR2                          ((uint16_t)0x0054)
+#define BKP_DR3                          ((uint16_t)0x0058)
+#define BKP_DR4                          ((uint16_t)0x005C)
+#define BKP_DR5                          ((uint16_t)0x0060)
+#define BKP_DR6                          ((uint16_t)0x0064)
+#define BKP_DR7                          ((uint16_t)0x0068)
+#define BKP_DR8                          ((uint16_t)0x006C)
+#define BKP_DR9                          ((uint16_t)0x0070)
+#define BKP_DR10                         ((uint16_t)0x0074)
+
+#define IS_BKP_DR(DR) (((DR) == BKP_DR1)  || ((DR) == BKP_DR2)  || ((DR) == BKP_DR3)  || \
+((DR) == BKP_DR4)  || ((DR) == BKP_DR5)  || ((DR) == BKP_DR6)  || \
+  ((DR) == BKP_DR7)  || ((DR) == BKP_DR8)  || ((DR) == BKP_DR9)  || \
+    ((DR) == BKP_DR10))
+
+#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup BKP_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup BKP_Exported_Functions
+* @{
+*/
+
+
+void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data);
+uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR);
+
+#endif /* __HAL_BKP_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,43 @@
+/**
+******************************************************************************
+* @file  HAL_conf.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains Header file for generic microcontroller.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+#ifndef __HAL_CONF_H__
+#define __HAL_CONF_H__
+
+/*´Ë´¦¿ÉÌí¼Ó»òÉ¾³ýÍâÉè*/
+#include "HAL_device.h"
+#include "HAL_adc.h"
+#include "HAL_bkp.h"
+#include "HAL_dma.h"
+#include "HAL_exti.h"
+#include "HAL_flash.h"
+#include "HAL_gpio.h"
+#include "HAL_i2c.h"
+#include "HAL_iwdg.h"
+#include "HAL_pwr.h"
+#include "HAL_rcc.h"
+#include "HAL_spi.h"
+#include "HAL_tim.h"
+#include "HAL_uart.h"
+#include "HAL_wwdg.h"
+#include "HAL_misc.h"
+#include "HAL_syscfg.h"
+#endif
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,168 @@
+/**
+******************************************************************************
+* @file  HAL_exti.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the EXTI 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_EXTI_H
+#define __HAL_EXTI_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup EXTI
+* @{
+*/
+
+/** @defgroup EXTI_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  EXTI mode enumeration  
+*/
+
+typedef enum
+{
+    EXTI_Mode_Interrupt = 0x00,
+    EXTI_Mode_Event = 0x04
+}EXTIMode_TypeDef;
+
+#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
+
+/** 
+* @brief  EXTI Trigger enumeration  
+*/
+
+typedef enum
+{
+    EXTI_Trigger_Rising = 0x08,
+    EXTI_Trigger_Falling = 0x0C,  
+    EXTI_Trigger_Rising_Falling = 0x10
+}EXTITrigger_TypeDef;
+
+#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
+((TRIGGER) == EXTI_Trigger_Falling) || \
+    ((TRIGGER) == EXTI_Trigger_Rising_Falling))
+/** 
+* @brief  EXTI Init Structure definition  
+*/
+
+typedef struct
+{
+    uint32_t EXTI_Line;
+    EXTIMode_TypeDef EXTI_Mode;
+    EXTITrigger_TypeDef EXTI_Trigger;
+    FunctionalState EXTI_LineCmd;
+}EXTI_InitTypeDef;
+
+/**
+* @}
+*/
+
+/** @defgroup EXTI_Exported_Constants
+* @{
+*/
+
+/** @defgroup EXTI_Lines 
+* @{
+*/
+
+#define EXTI_Line0       ((uint32_t)0x00001)  /* External interrupt line 0 */
+#define EXTI_Line1       ((uint32_t)0x00002)  /* External interrupt line 1 */
+#define EXTI_Line2       ((uint32_t)0x00004)  /* External interrupt line 2 */
+#define EXTI_Line3       ((uint32_t)0x00008)  /* External interrupt line 3 */
+#define EXTI_Line4       ((uint32_t)0x00010)  /* External interrupt line 4 */
+#define EXTI_Line5       ((uint32_t)0x00020)  /* External interrupt line 5 */
+#define EXTI_Line6       ((uint32_t)0x00040)  /* External interrupt line 6 */
+#define EXTI_Line7       ((uint32_t)0x00080)  /* External interrupt line 7 */
+#define EXTI_Line8       ((uint32_t)0x00100)  /* External interrupt line 8 */
+#define EXTI_Line9       ((uint32_t)0x00200)  /* External interrupt line 9 */
+#define EXTI_Line10      ((uint32_t)0x00400)  /* External interrupt line 10 */
+#define EXTI_Line11      ((uint32_t)0x00800)  /* External interrupt line 11 */
+#define EXTI_Line12      ((uint32_t)0x01000)  /* External interrupt line 12 */
+#define EXTI_Line13      ((uint32_t)0x02000)  /* External interrupt line 13 */
+#define EXTI_Line14      ((uint32_t)0x04000)  /* External interrupt line 14 */
+#define EXTI_Line15      ((uint32_t)0x08000)  /* External interrupt line 15 */
+#define EXTI_Line16      ((uint32_t)0x10000)  /* External interrupt line 16 Connected to the PVD Output */
+//#define EXTI_Line17      ((uint32_t)0x20000)  /* External interrupt line 17 Connected to the RTC Alarm event */
+#define EXTI_Line18      ((uint32_t)0x40000)  /* External interrupt line 18 Connected to the USB Wakeup from suspend event */
+#define EXTI_Line19      ((uint32_t)0x80000)  /* External interrupt line 19 Connected to the COMP1 event */
+#define EXTI_Line20      ((uint32_t)0x100000)  /* External interrupt line 20 Connected to the COMP2 event */
+
+#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF80000) == 0x00) && ((LINE) != (uint16_t)0x00))
+
+#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
+((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
+	((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
+		((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
+			((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
+				((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
+					((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
+						((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
+							((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line18)) || \
+                             ((LINE) == EXTI_Line19) || ((LINE) == EXTI_Line20))
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup EXTI_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup EXTI_Exported_Functions
+* @{
+*/
+
+void EXTI_DeInit(void);
+void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
+void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
+void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
+FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
+void EXTI_ClearFlag(uint32_t EXTI_Line);
+ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
+void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
+
+#endif /* __HAL_EXTI_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,131 @@
+/**
+******************************************************************************
+* @file  HAL_iwdg.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the IWDG 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_IWDG_H
+#define __HAL_IWDG_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup IWDG
+* @{
+*/
+
+/** @defgroup IWDG_Exported_Types
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Exported_Constants
+* @{
+*/
+
+/** @defgroup Write_access_to_IWDG_PR_and_IWDG_RLR_registers 
+* @{
+*/
+
+#define IWDG_WriteAccess_Enable     ((uint16_t)0x5555)
+#define IWDG_WriteAccess_Disable    ((uint16_t)0x0000)
+#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
+((ACCESS) == IWDG_WriteAccess_Disable))
+/**
+* @}
+*/
+
+/** @defgroup IWDG_prescaler 
+* @{
+*/
+
+#define IWDG_Prescaler_4            ((uint8_t)0x00)
+#define IWDG_Prescaler_8            ((uint8_t)0x01)
+#define IWDG_Prescaler_16           ((uint8_t)0x02)
+#define IWDG_Prescaler_32           ((uint8_t)0x03)
+#define IWDG_Prescaler_64           ((uint8_t)0x04)
+#define IWDG_Prescaler_128          ((uint8_t)0x05)
+#define IWDG_Prescaler_256          ((uint8_t)0x06)
+#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4)  || \
+((PRESCALER) == IWDG_Prescaler_8)  || \
+    ((PRESCALER) == IWDG_Prescaler_16) || \
+        ((PRESCALER) == IWDG_Prescaler_32) || \
+            ((PRESCALER) == IWDG_Prescaler_64) || \
+                ((PRESCALER) == IWDG_Prescaler_128)|| \
+                    ((PRESCALER) == IWDG_Prescaler_256))
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Flag 
+* @{
+*/
+
+#define IWDG_FLAG_PVU               ((uint16_t)0x0001)
+#define IWDG_FLAG_RVU               ((uint16_t)0x0002)
+#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
+#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Exported_Functions
+* @{
+*/
+
+void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
+void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
+void IWDG_SetReload(uint16_t Reload);
+void IWDG_ReloadCounter(void);
+void IWDG_Enable(void);
+FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
+
+#endif /* __HAL_IWDG_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,136 @@
+/**
+******************************************************************************
+* @file  HAL_misc.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the 
+*         miscellaneous firmware library functions.
+******************************************************************************
+
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_MISC_H
+#define __HAL_MISC_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup MISC
+* @{
+*/
+
+/** @defgroup MISC_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  NVIC Init Structure definition  
+*/
+
+typedef struct
+{
+  uint8_t NVIC_IRQChannel;             /*!< Specifies the IRQ channel to be enabled or disabled.
+                                            This parameter can be a value of @ref IRQn_Type 
+                                            (For the complete MM32 Devices IRQ Channels list, 
+                                            please refer to HAL_device.h file) */
+
+  uint8_t NVIC_IRQChannelPriority;     /*!< Specifies the priority level for the IRQ channel specified
+                                            in NVIC_IRQChannel. This parameter can be a value
+                                            between 0 and 3.  */
+
+  FunctionalState NVIC_IRQChannelCmd;  /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
+                                            will be enabled or disabled. 
+                                            This parameter can be set either to ENABLE or DISABLE */   
+} NVIC_InitTypeDef;
+
+/**
+* @}
+*/
+
+/** @defgroup MISC_Exported_Constants
+* @{
+*/
+
+/** @defgroup MISC_System_Low_Power 
+  * @{
+  */
+
+#define NVIC_LP_SEVONPEND            ((uint8_t)0x10)
+#define NVIC_LP_SLEEPDEEP            ((uint8_t)0x04)
+#define NVIC_LP_SLEEPONEXIT          ((uint8_t)0x02)
+#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
+((LP) == NVIC_LP_SLEEPDEEP) || \
+  ((LP) == NVIC_LP_SLEEPONEXIT))
+/**
+* @}
+*/
+
+/** @defgroup MISC_Preemption_Priority_Group 
+  * @{
+  */
+#define IS_NVIC_PRIORITY(PRIORITY)  ((PRIORITY) < 0x04)
+
+/**
+* @}
+*/
+
+/** @defgroup SysTick_clock_source 
+* @{
+*/
+
+#define SysTick_CLKSource_HCLK_Div8    ((uint32_t)0xFFFFFFFB)
+#define SysTick_CLKSource_HCLK         ((uint32_t)0x00000004)
+#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
+((SOURCE) == SysTick_CLKSource_HCLK_Div8))
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup MISC_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup MISC_Exported_Functions
+* @{
+*/
+
+void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
+void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
+void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HAL_MISC_H */
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,152 @@
+/**
+******************************************************************************
+* @file  HAL_pwr.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the PWR firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_PWR_H
+#define __HAL_PWR_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup PWR
+* @{
+*/ 
+
+/** @defgroup PWR_Exported_Types
+* @{
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup PWR_Exported_Constants
+* @{
+*/ 
+
+/** @defgroup PVD_detection_level 
+* @{
+*/ 
+
+#define PWR_PVDLevel_1V8          ((uint32_t)0x00000000)
+#define PWR_PVDLevel_2V1          ((uint32_t)0x00000200)
+#define PWR_PVDLevel_2V4          ((uint32_t)0x00000400)
+#define PWR_PVDLevel_2V7          ((uint32_t)0x00000600)
+#define PWR_PVDLevel_3V0          ((uint32_t)0x00000800)
+#define PWR_PVDLevel_3V3          ((uint32_t)0x00000A00)
+#define PWR_PVDLevel_3V6          ((uint32_t)0x00000C00)
+#define PWR_PVDLevel_3V9          ((uint32_t)0x00000E00)
+#define PWR_PVDLevel_4V2          ((uint32_t)0x00001000)
+#define PWR_PVDLevel_4V5          ((uint32_t)0x00001200)
+#define PWR_PVDLevel_4V8          ((uint32_t)0x00001400)
+#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_1V8) || ((LEVEL) == PWR_PVDLevel_2V1)|| \
+((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
+    ((LEVEL) == PWR_PVDLevel_3V0) || ((LEVEL) == PWR_PVDLevel_3V3)|| \
+        ((LEVEL) == PWR_PVDLevel_3V6) || ((LEVEL) == PWR_PVDLevel_3V9)|| \
+            ((LEVEL) == PWR_PVDLevel_4V2) || ((LEVEL) == PWR_PVDLevel_4V5)|| \
+                ((LEVEL) == PWR_PVDLevel_4V8))
+/**
+* @}
+*/
+
+/** @defgroup Regulator_state_is_STOP_mode 
+* @{
+*/
+
+#define PWR_Regulator_ON          ((uint32_t)0x00000000)
+#define PWR_Regulator_LowPower    ((uint32_t)0x00000002)
+#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
+((REGULATOR) == PWR_Regulator_LowPower))
+/**
+* @}
+*/
+
+/** @defgroup STOP_mode_entry 
+* @{
+*/
+
+#define PWR_STOPEntry_WFI         ((uint8_t)0x01)
+#define PWR_STOPEntry_WFE         ((uint8_t)0x02)
+#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
+
+/**
+* @}
+*/
+
+/** @defgroup PWR_Flag 
+* @{
+*/
+
+#define PWR_FLAG_WU               ((uint32_t)0x00000001)
+#define PWR_FLAG_SB               ((uint32_t)0x00000002)
+#define PWR_FLAG_PVDO             ((uint32_t)0x00000004)
+#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
+((FLAG) == PWR_FLAG_PVDO))
+
+#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup PWR_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup PWR_Exported_Functions
+* @{
+*/
+
+void PWR_DeInit(void);
+void PWR_BackupAccessCmd(FunctionalState NewState);
+void PWR_PVDCmd(FunctionalState NewState);
+void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
+void PWR_WakeUpPinCmd(FunctionalState NewState);
+void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
+void PWR_EnterSTANDBYMode(void);
+FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
+void PWR_ClearFlag(uint32_t PWR_FLAG);
+
+#endif /* __HAL_PWR_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,180 @@
+/**
+******************************************************************************
+* @file    HAL_syscfg.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief   This file contains all the functions prototypes for the SYSCFG firmware 
+*          library.
+******************************************************************************
+* @attention
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*
+*/
+
+/*!< Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_SYSCFG_H
+#define __HAL_SYSCFG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+    
+    /*!< Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+    
+    /** @addtogroup StdPeriph_Driver
+    * @{
+    */
+    
+    /** @addtogroup SYSCFG
+    * @{
+    */
+    /* Exported types ------------------------------------------------------------*/
+    /* Exported constants --------------------------------------------------------*/
+    
+    /** @defgroup SYSCFG_Exported_Constants
+    * @{
+    */ 
+    
+    /** @defgroup SYSCFG_EXTI_Port_Sources 
+    * @{
+    */ 
+#define EXTI_PortSourceGPIOA       ((uint8_t)0x00)
+#define EXTI_PortSourceGPIOB       ((uint8_t)0x01)
+#define EXTI_PortSourceGPIOC       ((uint8_t)0x02)
+#define EXTI_PortSourceGPIOD       ((uint8_t)0x03) 
+#define EXTI_PortSourceGPIOE       ((uint8_t)0x04) 
+#define EXTI_PortSourceGPIOF       ((uint8_t)0x05)
+    
+#define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
+    ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
+        ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
+            ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
+                ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
+                    ((PORTSOURCE) == EXTI_PortSourceGPIOF)) 
+/**
+* @}
+*/
+
+/** @defgroup SYSCFG_EXTI_Pin_sources 
+* @{
+*/ 
+#define EXTI_PinSource0            ((uint8_t)0x00)
+#define EXTI_PinSource1            ((uint8_t)0x01)
+#define EXTI_PinSource2            ((uint8_t)0x02)
+#define EXTI_PinSource3            ((uint8_t)0x03)
+#define EXTI_PinSource4            ((uint8_t)0x04)
+#define EXTI_PinSource5            ((uint8_t)0x05)
+#define EXTI_PinSource6            ((uint8_t)0x06)
+#define EXTI_PinSource7            ((uint8_t)0x07)
+#define EXTI_PinSource8            ((uint8_t)0x08)
+#define EXTI_PinSource9            ((uint8_t)0x09)
+#define EXTI_PinSource10           ((uint8_t)0x0A)
+#define EXTI_PinSource11           ((uint8_t)0x0B)
+#define EXTI_PinSource12           ((uint8_t)0x0C)
+#define EXTI_PinSource13           ((uint8_t)0x0D)
+#define EXTI_PinSource14           ((uint8_t)0x0E)
+#define EXTI_PinSource15           ((uint8_t)0x0F)
+
+#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
+((PINSOURCE) == EXTI_PinSource1) || \
+    ((PINSOURCE) == EXTI_PinSource2) || \
+        ((PINSOURCE) == EXTI_PinSource3) || \
+            ((PINSOURCE) == EXTI_PinSource4) || \
+                ((PINSOURCE) == EXTI_PinSource5) || \
+                    ((PINSOURCE) == EXTI_PinSource6) || \
+                        ((PINSOURCE) == EXTI_PinSource7) || \
+                            ((PINSOURCE) == EXTI_PinSource8) || \
+                                ((PINSOURCE) == EXTI_PinSource9) || \
+                                    ((PINSOURCE) == EXTI_PinSource10) || \
+                                        ((PINSOURCE) == EXTI_PinSource11) || \
+                                            ((PINSOURCE) == EXTI_PinSource12) || \
+                                                ((PINSOURCE) == EXTI_PinSource13) || \
+                                                    ((PINSOURCE) == EXTI_PinSource14) || \
+                                                        ((PINSOURCE) == EXTI_PinSource15))
+/**
+* @}
+*/
+
+/** @defgroup SYSCFG_Memory_Remap_Config 
+* @{
+*/ 
+#define SYSCFG_MemoryRemap_Flash                ((uint8_t)0x00)
+#define SYSCFG_MemoryRemap_SystemMemory         ((uint8_t)0x01)
+#define SYSCFG_MemoryRemap_SRAM                 ((uint8_t)0x03)
+
+
+#define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
+((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \
+    ((REMAP) == SYSCFG_MemoryRemap_SRAM))
+
+/**
+* @}
+*/
+
+/** @defgroup SYSCFG_DMA_Remap_Config 
+* @{
+*/ 
+#define SYSCFG_DMARemap_TIM17       SYSCFG_CFGR_TIM17_DMA_RMP    /* Remap TIM17 DMA requests from channel1 to channel2 */
+#define SYSCFG_DMARemap_TIM16       SYSCFG_CFGR_TIM16_DMA_RMP    /* Remap TIM16 DMA requests from channel3 to channel4 */
+#define SYSCFG_DMARemap_UART1Rx    SYSCFG_CFGR_UART1RX_DMA_RMP /* Remap UART1 Rx DMA requests from channel3 to channel5 */
+#define SYSCFG_DMARemap_UART1Tx    SYSCFG_CFGR_UART1TX_DMA_RMP /* Remap UART1 Tx DMA requests from channel2 to channel4 */
+#define SYSCFG_DMARemap_ADC1        SYSCFG_CFGR_ADC_DMA_RMP      /* Remap ADC1 DMA requests from channel1 to channel2 */
+
+#define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \
+((REMAP) == SYSCFG_DMARemap_TIM16) || \
+    ((REMAP) == SYSCFG_DMARemap_UART1Rx) || \
+        ((REMAP) == SYSCFG_DMARemap_UART1Tx) || \
+            ((REMAP) == SYSCFG_CFGR1_TIM3_DMA_RMP) || \
+                ((REMAP) == SYSCFG_CFGR1_TIM2_DMA_RMP) || \
+                    ((REMAP) == SYSCFG_CFGR1_TIM1_DMA_RMP) || \
+                        ((REMAP) == SYSCFG_CFGR1_I2C1_DMA_RMP) || \
+                            ((REMAP) == SYSCFG_CFGR1_UART3_DMA_RMP) || \
+                                ((REMAP) == SYSCFG_CFGR1_UART2_DMA_RMP) || \
+                                    ((REMAP) == SYSCFG_CFGR1_SPI2_DMA_RMP) || \
+                                        ((REMAP) == SYSCFG_CFGR1_TIM17_DMA_RMP2) || \
+                                            ((REMAP) == SYSCFG_CFGR1_TIM16_DMA_RMP2) || \
+                                                ((REMAP) == SYSCFG_DMARemap_ADC1))
+
+
+/**
+* @}
+*/
+
+
+
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+/*  Function used to set the SYSCFG configuration to the default reset state **/
+void SYSCFG_DeInit(void);
+
+/* SYSCFG configuration functions *********************************************/ 
+void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap);
+void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState);
+void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState);
+void SYSCFG_IRDAEnvSelection(uint32_t SYSCFG_IRDAEnv);
+void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
+uint32_t SYSCFG_GetPendingIT(uint32_t ITSourceLine);
+void SYSCFG_BreakConfig(uint32_t SYSCFG_Break);
+FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag);
+void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__HAL_SYSCFG_H */
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,106 @@
+/**
+******************************************************************************
+* @file  HAL_wwdg.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the WWDG 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_WWDG_H
+#define __HAL_WWDG_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup WWDG
+* @{
+*/ 
+
+/** @defgroup WWDG_Exported_Types
+* @{
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup WWDG_Exported_Constants
+* @{
+*/ 
+
+/** @defgroup WWDG_Prescaler 
+* @{
+*/ 
+
+#define WWDG_Prescaler_1    ((uint32_t)0x00000000)
+#define WWDG_Prescaler_2    ((uint32_t)0x00000080)
+#define WWDG_Prescaler_4    ((uint32_t)0x00000100)
+#define WWDG_Prescaler_8    ((uint32_t)0x00000180)
+#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
+((PRESCALER) == WWDG_Prescaler_2) || \
+    ((PRESCALER) == WWDG_Prescaler_4) || \
+        ((PRESCALER) == WWDG_Prescaler_8))
+#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
+#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup WWDG_Exported_Macros
+* @{
+*/ 
+/**
+* @}
+*/ 
+
+/** @defgroup WWDG_Exported_Functions
+* @{
+*/ 
+
+void WWDG_DeInit(void);
+void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
+void WWDG_SetWindowValue(uint8_t WindowValue);
+void WWDG_EnableIT(void);
+void WWDG_SetCounter(uint8_t Counter);
+void WWDG_Enable(uint8_t Counter);
+FlagStatus WWDG_GetFlagStatus(void);
+void WWDG_ClearFlag(void);
+
+#endif /* __HAL_WWDG_H */
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,56 @@
+/****************************************Copyright (c)****************************************************
+** 
+
+**--------------File Info---------------------------------------------------------------------------------
+** File name:			dtype.h
+** modified Date:  		22/08/2017
+** Last Version:		V2.0.0
+** Descriptions:		定义工程要用到的数据类型，包括函数库和应用代码都应该使用本文件里定义的数据类型
+**	
+*********************************************************************************************************/
+#ifndef _DTYPE_H_
+#define _DTYPE_H_     //这样处理是为了避免同一个文件重复包含该头文件
+
+/*********************************************************************************************************
+/定义数据的读写特性，常用于外围寄存器的存储限制
+*********************************************************************************************************/
+#define     __I     volatile const    //只读 
+#define     __O     volatile          //只写
+#define     __IO    volatile          //读写
+
+/*********************************************************************************************************
+常用数据类型定义
+*********************************************************************************************************/
+typedef unsigned char  int8u;         //无符号8位整型变量 
+typedef signed   char  int8s;		  //有符号8位整型变量 
+typedef unsigned short int16u;        //无符号16位整型变量
+typedef signed   short int16s;        //有符号16位整型变量
+typedef unsigned int   int32u;        //无符号32位整型变量
+typedef signed   int   int32s;        //有符号32位整型变量 
+typedef float          fp32;          //单精度浮点数（32位长度）
+typedef double         fp64;          //双精度浮点数（64位长度）
+
+/*********************************************************************************************************
+标准函数库用到的数据类型定义
+*********************************************************************************************************/
+//typedef   signed          char int8_t;
+//typedef   signed short     int int16_t;
+//typedef   signed           int int32_t;
+//
+//typedef unsigned          char uint8_t;
+//typedef unsigned short     int uint16_t;
+//typedef unsigned           int uint32_t;
+//
+//typedef int32_t   s32;
+//typedef int16_t   s16;
+//typedef int8_t    s8;
+//typedef uint32_t  u32;
+//typedef uint16_t  u16;
+//typedef uint8_t   u8;
+/*
+typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
+typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;	
+typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+*/
+#endif  //_DTYPE_H_
@@ -0,0 +1,60 @@
+/**
+******************************************************************************
+* @file  HAL_bkp.c
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file provides all the BKP firmware functions.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_bkp.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @defgroup BKP 
+* @brief BKP driver modules
+* @{
+*/
+
+/**
+* @brief  Writes user data to the specified Data Backup Register.
+* @param BKP_DR: specifies the Data Backup Register.
+*   This parameter can be BKP_DRx where x:[1, 42]
+* @param Data: data to write
+* @retval : None
+*/
+void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data)
+{
+  /* Check the parameters */
+  assert_param(IS_BKP_DR(BKP_DR));
+  *(__IO uint16_t *) (BKP_BASE + BKP_DR) = Data;
+}
+
+/**
+* @brief  Reads data from the specified Data Backup Register.
+* @param BKP_DR: specifies the Data Backup Register.
+*   This parameter can be BKP_DRx where x:[1, 42]
+* @retval : The content of the specified Data Backup Register
+*/
+uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR)
+{
+  /* Check the parameters */
+  assert_param(IS_BKP_DR(BKP_DR));
+  return (*(__IO uint16_t *) (BKP_BASE + BKP_DR));
+}
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,194 @@
+/**
+******************************************************************************
+* @file  HAL_iwdg.c
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file provides all the IWDG firmware functions.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_iwdg.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @defgroup IWDG 
+* @brief IWDG driver modules
+* @{
+*/ 
+
+/** @defgroup IWDG_Private_TypesDefinitions
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Private_Defines
+* @{
+*/ 
+
+/* ---------------------- IWDG registers bit mask ----------------------------*/
+
+/* KR register bit mask */
+#define KR_KEY_Reload    ((uint16_t)0xAAAA)
+#define KR_KEY_Enable    ((uint16_t)0xCCCC)
+
+/**
+* @}
+*/ 
+
+/** @defgroup IWDG_Private_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Private_Variables
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Private_FunctionPrototypes
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Private_Functions
+* @{
+*/
+
+/**
+* @brief  Enables or disables write access to IWDG_PR and IWDG_RLR
+*   registers.
+* @param IWDG_WriteAccess: new state of write access to IWDG_PR and
+*   IWDG_RLR registers.
+*   This parameter can be one of the following values:
+* @arg IWDG_WriteAccess_Enable: Enable write access to 
+*   IWDG_PR and IWDG_RLR registers
+* @arg IWDG_WriteAccess_Disable: Disable write access to
+*   IWDG_PR and IWDG_RLR registers
+* @retval : None
+*/
+void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
+{
+    /* Check the parameters */
+    assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
+    IWDG->KR = IWDG_WriteAccess;
+}
+
+/**
+* @brief  Sets IWDG Prescaler value.
+* @param IWDG_Prescaler: specifies the IWDG Prescaler value.
+*   This parameter can be one of the following values:
+* @arg IWDG_Prescaler_4: IWDG prescaler set to 4
+* @arg IWDG_Prescaler_8: IWDG prescaler set to 8
+* @arg IWDG_Prescaler_16: IWDG prescaler set to 16
+* @arg IWDG_Prescaler_32: IWDG prescaler set to 32
+* @arg IWDG_Prescaler_64: IWDG prescaler set to 64
+* @arg IWDG_Prescaler_128: IWDG prescaler set to 128
+* @arg IWDG_Prescaler_256: IWDG prescaler set to 256
+* @retval : None
+*/
+void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
+{
+    /* Check the parameters */
+    assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
+    IWDG->PR = IWDG_Prescaler;
+}
+
+/**
+* @brief  Sets IWDG Reload value.
+* @param Reload: specifies the IWDG Reload value.
+*   This parameter must be a number between 0 and 0x0FFF.
+* @retval : None
+*/
+void IWDG_SetReload(uint16_t Reload)
+{
+    /* Check the parameters */
+    assert_param(IS_IWDG_RELOAD(Reload));
+    IWDG->RLR = Reload;
+}
+
+/**
+* @brief  Reloads IWDG counter with value defined in the reload register
+*   (write access to IWDG_PR and IWDG_RLR registers disabled).
+* @param  None
+* @retval : None
+*/
+void IWDG_ReloadCounter(void)
+{
+    IWDG->KR = KR_KEY_Reload;
+}
+
+/**
+* @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers
+*   disabled).
+* @param  None
+* @retval : None
+*/
+void IWDG_Enable(void)
+{
+    IWDG->KR = KR_KEY_Enable;
+}
+
+/**
+* @brief  Checks whether the specified IWDG flag is set or not.
+* @param IWDG_FLAG: specifies the flag to check.
+*   This parameter can be one of the following values:
+* @arg IWDG_FLAG_PVU: Prescaler Value Update on going
+* @arg IWDG_FLAG_RVU: Reload Value Update on going
+* @retval : The new state of IWDG_FLAG (SET or RESET).
+*/
+FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
+{
+    FlagStatus bitstatus = RESET;
+    /* Check the parameters */
+    assert_param(IS_IWDG_FLAG(IWDG_FLAG));
+    if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
+    {
+        bitstatus = SET;
+    }
+    else
+    {
+        bitstatus = RESET;
+    }
+    /* Return the flag status */
+    return bitstatus;
+}
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,163 @@
+/**
+******************************************************************************
+* @file    HAL_misc.c
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief   This file provides all the miscellaneous firmware functions (add-on
+*          to CMSIS functions).
+******************************************************************************
+* @attention
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+******************************************************************************
+*/
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_misc.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @defgroup MISC 
+* @brief MISC driver modules
+* @{
+*/
+
+/** @defgroup MISC_Private_TypesDefinitions
+* @{
+*/
+
+/**
+* @}
+*/ 
+
+/** @defgroup MISC_Private_Defines
+* @{
+*/
+
+#define AIRCR_VECTKEY_MASK    ((uint32_t)0x05FA0000)
+/**
+* @}
+*/
+
+
+/**
+* @brief  Initializes the NVIC peripheral according to the specified
+*         parameters in the NVIC_InitStruct.
+* @param  NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
+*         the configuration information for the specified NVIC peripheral.
+* @retval None
+*/
+void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
+{
+  uint32_t tmppriority = 0x00;
+  
+  /* Check the parameters */
+  assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
+  assert_param(IS_NVIC_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPriority));  
+    
+  if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
+  {
+    /* Compute the Corresponding IRQ Priority --------------------------------*/    
+    tmppriority = NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02];
+    tmppriority &= (uint32_t)(~(((uint32_t)0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8)));
+    tmppriority |= (uint32_t)((((uint32_t)NVIC_InitStruct->NVIC_IRQChannelPriority << 6) & 0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8));    
+    
+    NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02] = tmppriority;
+    
+    /* Enable the Selected IRQ Channels --------------------------------------*/
+    NVIC->ISER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
+  }
+  else
+  {
+    /* Disable the Selected IRQ Channels -------------------------------------*/
+    NVIC->ICER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
+  }
+}
+
+/**
+* @brief  Sets the vector table location and Offset.
+* @param  NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
+*   This parameter can be one of the following values:
+*     @arg NVIC_VectTab_RAM
+*     @arg NVIC_VectTab_FLASH
+* @param  Offset: Vector Table base offset field. This value must be a multiple 
+*         of 0x200.
+* @retval None
+*/
+void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
+{ 
+//    SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
+}
+
+/**
+* @brief  Selects the condition for the system to enter low power mode.
+* @param  LowPowerMode: Specifies the new mode for the system to enter low power mode.
+*   This parameter can be one of the following values:
+*     @arg NVIC_LP_SEVONPEND
+*     @arg NVIC_LP_SLEEPDEEP
+*     @arg NVIC_LP_SLEEPONEXIT
+* @param  NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
+* @retval None
+*/
+void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
+{
+  /* Check the parameters */
+  assert_param(IS_NVIC_LP(LowPowerMode));
+  
+  assert_param(IS_FUNCTIONAL_STATE(NewState));  
+    if (NewState != DISABLE)
+    {
+        SCB->SCR |= LowPowerMode;
+    }
+    else
+    {
+        SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
+    }
+}
+
+/**
+* @brief  Configures the SysTick clock source.
+* @param  SysTick_CLKSource: specifies the SysTick clock source.
+*   This parameter can be one of the following values:
+*     @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
+*     @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
+* @retval None
+*/
+void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
+{
+    /* Check the parameters */
+assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
+    
+    if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
+    {
+        SysTick->CTRL |= SysTick_CLKSource_HCLK;
+    }
+    else
+    {
+        SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
+    }
+}
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,199 @@
+/**
+******************************************************************************
+* @file    HAL_syscfg.c
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief   This file provides firmware functions to manage the following 
+*          functionalities of the SYSCFG peripheral:
+*           + Remapping the memory mapped at 0x00000000  
+*           + Remapping the DMA channels
+*           + Enabling I2C fast mode plus driving capability for I2C pins   
+*           + Configuring the EXTI lines connection to the GPIO port
+*           + Configuring the CFGR2 features (Connecting some internal signal
+*             to the break input of TIM1)
+*   
+*  @verbatim
+===============================================================================
+##### How to use this driver #####
+===============================================================================
+[..] 
+The SYSCFG registers can be accessed only when the SYSCFG 
+interface APB clock is enabled.
+To enable SYSCFG APB clock use:
+RCC_APBPeriphClockCmd(RCC_APBPeriph_SYSCFG, ENABLE).
+*  @endverbatim
+*
+******************************************************************************
+* @attention
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+******************************************************************************
+*/
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_syscfg.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @defgroup SYSCFG 
+* @brief SYSCFG driver modules
+* @{
+*/ 
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup SYSCFG_Private_Functions
+* @{
+*/ 
+
+/** @defgroup SYSCFG_Group1 SYSCFG Initialization and Configuration functions
+*  @brief   SYSCFG Initialization and Configuration functions 
+*
+@verbatim
+===============================================================================
+##### SYSCFG Initialization and Configuration functions #####
+===============================================================================
+
+@endverbatim
+* @{
+*/
+
+/**
+* @brief  Deinitializes the SYSCFG registers to their default reset values.
+* @param  None
+* @retval None
+* @note   MEM_MODE bits are not affected by APB reset.
+* @note   MEM_MODE bits took the value from the user option bytes.
+* @note   CFGR2 register is not affected by APB reset.
+* @note   CLABBB configuration bits are locked when set.
+* @note   To unlock the configuration, perform a system reset.
+*/
+void SYSCFG_DeInit(void)
+{
+    /* Set SYSCFG_CFGR1 register to reset value without affecting MEM_MODE bits */
+    SYSCFG->CFGR &= SYSCFG_CFGR_MEM_MODE;
+    /* Set EXTICRx registers to reset value */
+    SYSCFG->EXTICR[0] = 0;
+    SYSCFG->EXTICR[1] = 0;
+    SYSCFG->EXTICR[2] = 0;
+    SYSCFG->EXTICR[3] = 0;
+    
+}
+
+/**
+* @brief  Configures the memory mapping at address 0x00000000.
+* @param  SYSCFG_MemoryRemap: selects the memory remapping.
+*          This parameter can be one of the following values:
+*            @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000  
+*            @arg SYSCFG_MemoryRemap_SystemMemory: System Flash memory mapped at 0x00000000
+*            @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000
+* @retval None
+*/
+void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap)
+{
+    uint32_t tmpctrl = 0;
+    
+    /* Check the parameter */
+    assert_param(IS_SYSCFG_MEMORY_REMAP(SYSCFG_MemoryRemap));
+    
+    /* Get CFGR1 register value */
+    tmpctrl = SYSCFG->CFGR;
+    
+    /* Clear MEM_MODE bits */
+    tmpctrl &= (uint32_t) (~SYSCFG_CFGR_MEM_MODE);
+    
+    /* Set the new MEM_MODE bits value */
+    tmpctrl |= (uint32_t) SYSCFG_MemoryRemap;
+    
+    /* Set CFGR1 register with the new memory remap configuration */
+    SYSCFG->CFGR = tmpctrl;
+}
+
+/**
+* @brief  Configure the DMA channels remapping.
+* @param  SYSCFG_DMARemap: selects the DMA channels remap.
+*          This parameter can be one of the following values:
+*            @arg SYSCFG_DMARemap_TIM17: Remap TIM17 DMA requests from channel1 to channel2
+*            @arg SYSCFG_DMARemap_TIM16: Remap TIM16 DMA requests from channel3 to channel4
+*            @arg SYSCFG_DMARemap_UART1Rx: Remap UART1 Rx DMA requests from channel3 to channel5
+*            @arg SYSCFG_DMARemap_UART1Tx: Remap UART1 Tx DMA requests from channel2 to channel4
+*            @arg SYSCFG_DMARemap_ADC1: Remap ADC1 DMA requests from channel1 to channel2
+* @param  NewState: new state of the DMA channel remapping. 
+*         This parameter can be: ENABLE or DISABLE.
+* @note   When enabled, DMA channel of the selected peripheral is remapped
+* @note   When disabled, Default DMA channel is mapped to the selected peripheral
+* @note   By default TIM17 DMA requests is mapped to channel 1, 
+*         use SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Enable) to remap
+*         TIM17 DMA requests to channel 2 and use
+*         SYSCFG_DMAChannelRemapConfig(SYSCFG_DMARemap_TIM17, Disable) to map
+*         TIM17 DMA requests to channel 1 (default mapping)
+* @retval None
+*/
+void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState)
+{
+    /* Check the parameters */
+    assert_param(IS_SYSCFG_DMA_REMAP(SYSCFG_DMARemap));
+    assert_param(IS_FUNCTIONAL_STATE(NewState));
+    
+    if (NewState != DISABLE)
+    {
+        /* Remap the DMA channel */
+        SYSCFG->CFGR |= (uint32_t)SYSCFG_DMARemap;
+    }
+    else
+    {
+        /* use the default DMA channel mapping */
+        SYSCFG->CFGR &= (uint32_t)(~SYSCFG_DMARemap);
+    }
+}
+
+
+
+/**
+* @brief  Selects the GPIO pin used as EXTI Line.
+* @param  EXTI_PortSourceGPIOx: selects the GPIO port to be used as source 
+*                               for EXTI lines where x can be (A, B, C, D, E or F).
+* @param  EXTI_PinSourcex: specifies the EXTI line to be configured.
+* @note   This parameter can be EXTI_PinSourcex where x can be:
+*         For MCU: (0..15) for GPIOA, GPIOB, (13..15) for GPIOC and (0..1, 6..7) for GPIOD.
+* @retval None
+*/
+void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
+{
+    uint32_t tmp = 0x00;
+    
+    /* Check the parameters */
+    assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
+    assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
+    
+    tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
+    SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
+    SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
+}
+
+
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
@@ -0,0 +1,31 @@
+/**************************************************************************//**
+* @file HAL_device.h
+* @brief CMSIS Cortex-M Peripheral Access Layer for MindMotion
+*        microcontroller devices
+*
+* This is a convenience header file for defining the part number on the
+* build command line, instead of specifying the part specific header file.
+*
+* Example: Add "MM32L073PF" to your build options, to define part
+*          Add "#include "HAL_device.h" to your source files
+*
+*
+* @version 2.0.0
+*
+*
+*****************************************************************************/
+
+#ifndef __HAL_device_H
+#define __HAL_device_H
+
+#define  MM32L0xxxx
+
+#if defined(MM32L0xxxx)
+
+#include "MM32L0xx.h"
+#include "system_MM32L0xx.h"
+#else
+#error "HAL_device.h: PART NUMBER undefined"
+#endif
+#endif /* __HAL_device_H */
+/*-------------------------(C) COPYRIGHT 2016 MindMotion ----------------------*/
@@ -0,0 +1,2 @@
+extern uint32_t SystemCoreClock;
+extern void SystemInit(void);
@@ -0,0 +1,18 @@
+from building import *
+import rtconfig
+cwd     = GetCurrentDir()
+src	= ['MM32L0xx/Source/system_MM32L0xx.c']
+CPPPATH = [cwd + '/CMSIS/CORE', cwd + '/MM32L0xx/Include',  cwd + '/MM32L0xx/Source', cwd + '/MM32L0xx/HAL_lib/inc']
+
+src += Glob('MM32L0xx/HAL_lib/src/*.c')
+CPPDEFINES = ['USE_STDPERIPH_DRIVER']
+
+if rtconfig.CROSS_TOOL == 'gcc':
+    src += ['MM32L0xx/Source/GCC_StartAsm/startup_MM32L0xx.s']
+elif rtconfig.CROSS_TOOL == 'keil':
+    src += ['MM32L0xx/Source/KEIL_StartAsm/startup_MM32L0xx.s']
+elif rtconfig.CROSS_TOOL == 'iar':
+    src += ['MM32L0xx/Source/IAR_StartAsm/startup_MM32L0xx.s']
+group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
+
+Return('group')
@@ -0,0 +1,109 @@
+# MM32 MiniBoard Rev.D2 开发板BSP 说明
+
+标签： MM32、Cortex-M0、MM32L073PF、国产MCU
+
+---
+
+## 1. 简介
+
+本文档为上海灵动微电子AE团队为MM32 MiniBoard开发板提供的BSP(板级支持包) 说明。通过阅读本文档，开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
+
+### 1.1  开发板介绍
+
+MM32 MiniBoard Rev.D2 是为了用户快速上手、了解学习MM32系列MCU的一块入门级开发板，可满足基础测试及高端开发需求。
+
+开发板外观如下图所示：
+
+MM32 MiniBoard Rev.D2 
+
+![MM32 MiniBoard Rev.D2](figures/MM32%20MiniBoard%20Rev.D2_1.jpg)
+
+MM32 MiniBoard Rev.D2 开发板板载资源如下：
+
+- MCU：MM32L073PF  ARM 32-bit Cortex-M0，主频 48MHz，128KB FLASH ，8KB SRAM
+- 常用外设
+  - LED：4个4色LED，可用于测试GPIO功能
+  - 按键：1个复位按键、 1个WakeUp按键、两个普通按键
+  - SPI Flash W25P80，容量8M bit，速度50MHz
+  - I2C接口EEPROM芯片，AT24C02，容量256字节
+  - 1个旋转式电位计（变阻器），用于ADC测试
+  - 能耗测试开关：待机模式和运行模式
+- 常用接口：Micro-USB接口，RS-232接口，UART接口
+- 调试接口：SWD，支持J-Link、U-LINK2、MM32-LINK调试器
+
+更多详细信息请咨询[灵动微电子技术支持][http://www.mm32.com.cn]
+
+### 1.2  MCU 简介
+
+MM32L073PF 是一款面向电机驱动、工业应用、消费电子、白色家电等领域的低功耗芯片。包括如下硬件特性：
+
+| 硬件 | 描述 |
+| -- | -- |
+|芯片型号| MM32L073PF |
+|CPU| ARM Cortex-M0 |
+|主频| 48MHz |
+|片内SRAM| 8KB |
+|片内Flash|  128KB |
+
+## 2. 编译说明
+
+本 BSP 为开发者提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+
+双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。
+
+> 工程默认配置使用 Jlink 仿真器下载程序，在通过 Jlink 连接开发板到 PC 的基础上，点击下载按钮即可下载程序到开发板
+
+推荐熟悉 RT_Thread 的用户使用[env工具](https://www.rt-thread.org/page/download.html)，可以在console下进入到 `bsp/mm32l07x` 目录中，运行以下命令：
+
+`scons`
+
+来编译这个板级支持包。如果编译正确无误，会产生rtthread.elf、rtthread.bin文件。其中 rtthread.bin 可以烧写到设备中运行。
+
+## 3. 烧写及执行
+
+### 3.1 硬件连接
+
+使用 MM32-LINK 或 Jlink 等调试工具连接开发板到 PC ，通过调试调试工具供电或使用 Micro-USB 供电。若使用 Jlink 等调试工具，还需要将 UART1_TX(PA9)、UART1_RX(PA10)、GND 接到串口工具上。
+
+使用MM32-LINK连接开发板如下图所示：
+
+MM32-LINK+MiniBoard Rev.D2
+
+![MM32-LINK+MiniBoard Rev.D2](figures/MM32%20MiniBoard%20Rev.D2_2.jpg)
+
+### 3.2 运行结果
+
+如果编译 & 烧写无误，当复位设备后，会看到板子上的4个 LED 闪烁。串口打印 RT-Thread 的启动logo信息：
+
+```
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.0.0 build Dec 11 2018
+ 2006 - 2018 Copyright by rt-thread team
+msh />
+```
+
+## 4. 驱动支持情况及计划
+
+| 驱动       | 支持情况 | 备注                         |
+| ---------- | :------: | :--------------------------: |
+| UART       | 支持     | UART1/2                   |
+| GPIO       | 支持     | / |
+
+## 5. 联系人信息
+
+维护人：
+
+-[Henryhuang](https://github.com/huangzushui) email: huangzushui@mindmotion.com.cn
+
+## 6. 参考
+
+- [MM32L0xx_n系列数据手册](http://www.mm32.com.cn/getfile.aspx?id=615)
+
+- [MM32L0xx_n系列用户手册](http://www.mm32.com.cn/getfile.aspx?id=611)
+
+- [MiniBoardStartKit资料包](http://www.mm32.com.cn/download.aspx?cid=2545)
+
+- [keil pack安装包](http://www.mm32.com.cn/download.aspx?cid=2546)
+
+- [MM32 支持工具包](http://www.mm32.com.cn/download.aspx?cid=2547)
@@ -0,0 +1,11 @@
+from building import *
+
+cwd = GetCurrentDir()
+
+objs = []
+list = os.listdir(cwd)
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+Return('objs')
@@ -0,0 +1,39 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# make a building
+DoBuilding(TARGET, objs)
@@ -0,0 +1,9 @@
+from building import *
+
+cwd     = GetCurrentDir()
+CPPPATH = [cwd, str(Dir('#'))]
+src	= Glob('*.c')
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2017-2019, MindMotion AE Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-13     henryhuang   first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "HAL_device.h"
+/********************************************************************************************************
+* led_init(void)
+********************************************************************************************************/
+void led_init(void)
+{
+    GPIO_InitTypeDef  GPIO_InitStructure;
+    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
+    GPIO_InitStructure.GPIO_Pin  =  GPIO_Pin_15;
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+    GPIO_Init(GPIOA, &GPIO_InitStructure);
+}
+
+int main(void)
+{
+    int count = 1;
+    led_init();
+    while (count++)
+    {
+        GPIO_SetBits(GPIOA, GPIO_Pin_15);
+        rt_thread_mdelay(500);
+        GPIO_ResetBits(GPIOA, GPIO_Pin_15);
+        rt_thread_mdelay(500);
+    }
+    return RT_EOK;
+}
@@ -0,0 +1,18 @@
+menu "Hardware Drivers Config"
+
+    menu "On-chip Peripheral Drivers"
+
+        menu "UART Drivers"
+            config BSP_USING_UART1
+                bool "Enable UART1 PA9/10(T/R)"
+                select RT_USING_SERIAL
+                default n
+        
+            config BSP_USING_UART2
+                bool "Enable UART2 PA2/3(T/R)"
+                select RT_USING_SERIAL
+                default y
+        endmenu 
+    endmenu
+        
+endmenu
@@ -0,0 +1,20 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd = GetCurrentDir()
+
+# add the general drivers.
+src = Split("""
+board.c
+""")
+
+# add serial driver code
+if  GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2'):
+    src += ['drv_uart.c']
+
+CPPPATH = [cwd]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2017-2019, MindMotion AE Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-13     henryhuang   first version
+ */
+
+#include <board.h>
+extern uint32_t SystemCoreClock;
+extern void SystemInit(void);
+static void bsp_clock_config(void)
+{
+    SystemInit();
+    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
+    SysTick->CTRL |= 0x00000004UL;
+}
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+void rt_hw_board_init()
+{
+    bsp_clock_config();
+#if defined(RT_USING_HEAP)
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+}
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017-2019, MindMotion AE Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-13     henryhuang   first version
+ */
+
+#ifndef BOARD_H__
+#define BOARD_H__
+#include <rtthread.h>
+#include <hal_device.h>
+
+#define SRAM_SIZE 0x2000
+
+#define SRAM_END (SRAM_BASE + SRAM_SIZE)
+#ifdef __CC_ARM
+    extern int Image$$RW_IRAM1$$ZI$$Limit;
+    #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+    #pragma section = "HEAP"
+    #define HEAP_BEGIN (__segment_end("HEAP"))
+#else
+    extern int __bss_end;
+    #define HEAP_BEGIN ((void *)&__bss_end)
+#endif
+#define HEAP_END SRAM_END
+#define HEAP_SIZE (HEAP_END - (rt_uint32_t)HEAP_BEGIN)
+extern void rt_hw_board_init(void);
+#endif
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2017-2019, MindMotion AE Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-13     henryhuang   first version
+ */
+
+#ifndef DRV_UART_H__
+#define DRV_UART_H__
+
+int rt_hw_uart_init(void);
+
+#endif
@@ -0,0 +1,36 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_IROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_IROM_end__   = 0x0001FFFF;
+define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_IRAM_end__   = 0x20001FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__     = 0x0800;
+define symbol __ICFEDIT_size_proc_stack__ = 0x0;
+define symbol __ICFEDIT_size_heap__       = 0x0800;
+/**** End of ICF editor section. ###ICF###*/
+define memory mem with size = 4G;
+define region IROM_region   =   mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM_end__];
+define region IRAM_region   =   mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM_end__];
+define block CSTACK     with alignment = 8, size = __ICFEDIT_size_cstack__     { };
+define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
+define block HEAP       with alignment = 8, size = __ICFEDIT_size_heap__       { };
+
+do not initialize  { section .noinit };
+initialize by copy { readwrite };
+if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
+{
+  // Required in a multi-threaded application
+  initialize by copy with packing = none { section __DLIB_PERTHREAD };
+}
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in IROM_region  { readonly };
+place in EROM_region  { readonly section application_specific_ro };
+place in IRAM_region  { readwrite, block CSTACK, block PROC_STACK, block HEAP };
+place in ERAM_region  { readwrite section application_specific_rw };
@@ -0,0 +1,137 @@
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+    CODE (rx) : ORIGIN = 0x08000000, LENGTH = 128k /* 128KB flash */
+    DATA (rw) : ORIGIN = 0x20000000, LENGTH =  8k /* 8K sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x200;
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        . = ALIGN(4);
+        _etext = .;
+    } > CODE = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > CODE
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >DATA
+
+    .stack : 
+    {
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >DATA
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+        
+        *(.bss.init)
+    } > DATA
+    __bss_end = .;
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}
@@ -0,0 +1,15 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00020000  {    ; load region size_region
+  ER_IROM1 0x08000000 0x00020000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  RW_IRAM1 0x20000000 0x00002000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\project.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+
@@ -0,0 +1,157 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 100
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDEL_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+#define RT_DEBUG
+#define RT_DEBUG_COLOR
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_MEMHEAP
+#define RT_USING_SMALL_MEM
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart1"
+#define RT_VER_NUM 0x40001
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 516
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 1024
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_RB_BUFSZ 64
+
+/* Using WiFi */
+
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* light weight TCP/IP stack */
+
+
+/* Modbus master and slave stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+
+/* Hardware Drivers Config */
+
+/* On-chip Peripheral Drivers */
+
+/* UART Drivers */
+
+#define BSP_USING_UART1
+
+#endif
@@ -0,0 +1,135 @@
+# BSP Note: For TI EK-TM4C1294XL Tiva C Series Connected LancuhPad	(REV D)
+
+import os
+import sys
+# toolchains options
+CROSS_TOOL = 'gcc'
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+# device options
+ARCH = 'arm'
+CPU = 'cortex-m0'
+
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if CROSS_TOOL == 'gcc':
+    PLATFORM = 'gcc'
+    EXEC_PATH = '/Users/zhangyihong/.env/gcc-arm-none-eabi-5_4-2016q3/bin'
+elif CROSS_TOOL == 'keil':
+    PLATFORM = 'armcc'
+    EXEC_PATH = 'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+    PLATFORM = 'iar'
+    EXEC_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.2'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+#BUILD = 'release'
+
+if PLATFORM == 'gcc':
+    PREFIX = 'arm-none-eabi-'
+    CC = PREFIX + 'gcc'
+    CXX = PREFIX + 'g++'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=' + CPU + '-mthumb -ffunction-sections -fdata-sections -Wall'
+    CFLAGS = DEVICE + ' -std=c99'
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2 -g'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu ' + CPU 
+    CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --scatter "drivers/linker_scripts/link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
+
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC'
+    LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/ARMCC/LIB'
+
+    CFLAGS += ' -D__MICROLIB '
+    AFLAGS += ' --pd "__MICROLIB SETA 1" '
+    LFLAGS += ' --library_type=microlib '
+    EXEC_PATH += '/arm/armcc/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iar':
+    # toolchains
+    CC = 'iccarm'
+    AS = 'iasmarm'
+    AR = 'iarchive'
+    LINK = 'ilinkarm'
+    TARGET_EXT = 'out'
+
+    DEVICE = '-Dewarm' # + ' -D' + PART_TYPE
+
+    CFLAGS = DEVICE
+    CFLAGS += ' --diag_suppress Pa050'
+    CFLAGS += ' --no_cse' 
+    CFLAGS += ' --no_unroll' 
+    CFLAGS += ' --no_inline' 
+    CFLAGS += ' --no_code_motion' 
+    CFLAGS += ' --no_tbaa' 
+    CFLAGS += ' --no_clustering' 
+    CFLAGS += ' --no_scheduling' 
+
+    CFLAGS += ' --endian=little' 
+    CFLAGS += ' --cpu=Cortex-M4' 
+    CFLAGS += ' -e' 
+
+    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'    
+    CFLAGS += ' --silent'
+        
+    AFLAGS = DEVICE
+    AFLAGS += ' -s+' 
+    AFLAGS += ' -w+' 
+    AFLAGS += ' -r' 
+    AFLAGS += ' --cpu ' + CPU
+
+    AFLAGS += ' -S'
+
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = ' --config "drivers/linker_scripts/link.icf"'
+    LFLAGS += ' --entry __iar_program_start'    
+    #LFLAGS += ' --silent'
+
+    EXEC_PATH = EXEC_PATH + '/arm/bin/'
+    POST_ACTION = ''
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\template.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+