Upload mm32l07x BSP。

2026-03-28 02:03:20 +08:00 · 2019-03-29 17:04:48 +08:00
parent 0f22a85eba
commit 9da6917881
103 changed files with 71745 additions and 0 deletions
--- a/bsp/mm32l07x/.config
+++ b/bsp/mm32l07x/.config
@@ -0,0 +1,332 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+# CONFIG_RT_USING_TIMER_SOFT is not set
+CONFIG_RT_DEBUG=y
+CONFIG_RT_DEBUG_COLOR=y
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_MEMHEAP=y
+# CONFIG_RT_USING_NOHEAP is not set
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+CONFIG_RT_VER_NUM=0x40001
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=516
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=1024
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PIN is not set
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_MTD is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+
+#
+# Using WiFi
+#
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+# CONFIG_RT_USING_LIBC is not set
+# CONFIG_RT_USING_PTHREADS is not set
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# Modbus master and slave stack
+#
+# CONFIG_RT_USING_MODBUS is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_LOGTRACE is not set
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_AHT10 is not set
+# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_MPU6XXX is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+
+#
+# Hardware Drivers Config
+#
+
+#
+# On-chip Peripheral Drivers
+#
+
+#
+# UART Drivers
+#
+CONFIG_BSP_USING_UART1=y
+# CONFIG_BSP_USING_UART2 is not set
--- a/bsp/mm32l07x/Kconfig
+++ b/bsp/mm32l07x/Kconfig
@@ -0,0 +1,20 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "drivers/Kconfig"
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/arm_common_tables.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/arm_common_tables.h
@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        17. January 2013
+* $Revision:    V1.4.1
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_common_tables.h
+*
+* Description:  This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+extern const uint16_t armBitRevTable[1024];
+extern const q15_t armRecipTableQ15[64];
+extern const q31_t armRecipTableQ31[64];
+extern const q31_t realCoefAQ31[1024];
+extern const q31_t realCoefBQ31[1024];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
+extern const q31_t twiddleCoefQ31[6144];
+extern const q15_t twiddleCoefQ15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+
+#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
+#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
+#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
+#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
+
+#endif /*  ARM_COMMON_TABLES_H */
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/arm_const_structs.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/arm_const_structs.h
@@ -0,0 +1,85 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        17. January 2013
+* $Revision:    V1.4.1
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_const_structs.h
+*
+* Description:  This file has constant structs that are initialized for
+*               user convenience.  For example, some can be given as
+*               arguments to the arm_cfft_f32() function.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
+      16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
+      32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
+      64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
+      128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
+      256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
+      512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
+      1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
+      2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH
+   };
+
+   const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
+      4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH
+   };
+
+#endif
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/arm_math.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/arm_math.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm0.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm0.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm0plus.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm0plus.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm3.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm3.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm4.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm4.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm4_simd.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cm4_simd.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cmFunc.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cmFunc.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cmInstr.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_cmInstr.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_sc000.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_sc000.h
--- a/bsp/mm32l07x/Libraries/CMSIS/CORE/core_sc300.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/CORE/core_sc300.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/arm_common_tables.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/arm_common_tables.h
@@ -0,0 +1,136 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
+*
+* $Date:        31. July 2014
+* $Revision: 	V1.4.4
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_common_tables.h
+*
+* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+extern const uint16_t armBitRevTable[1024];
+extern const q15_t armRecipTableQ15[64];
+extern const q31_t armRecipTableQ31[64];
+//extern const q31_t realCoefAQ31[1024];
+//extern const q31_t realCoefBQ31[1024];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
+extern const q31_t twiddleCoef_16_q31[24];
+extern const q31_t twiddleCoef_32_q31[48];
+extern const q31_t twiddleCoef_64_q31[96];
+extern const q31_t twiddleCoef_128_q31[192];
+extern const q31_t twiddleCoef_256_q31[384];
+extern const q31_t twiddleCoef_512_q31[768];
+extern const q31_t twiddleCoef_1024_q31[1536];
+extern const q31_t twiddleCoef_2048_q31[3072];
+extern const q31_t twiddleCoef_4096_q31[6144];
+extern const q15_t twiddleCoef_16_q15[24];
+extern const q15_t twiddleCoef_32_q15[48];
+extern const q15_t twiddleCoef_64_q15[96];
+extern const q15_t twiddleCoef_128_q15[192];
+extern const q15_t twiddleCoef_256_q15[384];
+extern const q15_t twiddleCoef_512_q15[768];
+extern const q15_t twiddleCoef_1024_q15[1536];
+extern const q15_t twiddleCoef_2048_q15[3072];
+extern const q15_t twiddleCoef_4096_q15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+
+/* floating-point bit reversal tables */
+#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
+#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
+#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
+#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
+
+/* fixed-point bit reversal tables */
+#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12  )
+#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24  )
+#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
+#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
+#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
+#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
+#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
+#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+
+/* Tables for Fast Math Sine and Cosine */
+extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+
+#endif /*  ARM_COMMON_TABLES_H */
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/arm_const_structs.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/arm_const_structs.h
@@ -0,0 +1,79 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
+*
+* $Date:        31. July 2014
+* $Revision: 	V1.4.4
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_const_structs.h
+*
+* Description:	This file has constant structs that are initialized for
+*              user convenience.  For example, some can be given as
+*              arguments to the arm_cfft_f32() function.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+
+#endif
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/arm_math.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/arm_math.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm0.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm0.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm0plus.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm0plus.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm3.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm3.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm4.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm4.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm7.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cm7.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cmFunc.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cmFunc.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cmInstr.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cmInstr.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cmSimd.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_cmSimd.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_sc000.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_sc000.h
--- a/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_sc300.h
+++ b/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/core_sc300.h
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/MM32L0xx_lib_version.txt
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/MM32L0xx_lib_version.txt
@@ -0,0 +1,6 @@
+
+Release Notes
+
+
+2017-04-21
+MM32L0xx  std lib version is updated to Ver2.0.0
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_adc.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_adc.h
@@ -0,0 +1,312 @@
+/**
+******************************************************************************
+* @file  HAL_adc.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the ADC firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_ADC_H
+#define __HAL_ADC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup ADC
+* @{
+*/
+
+/** @defgroup ADC_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  ADC Init structure definition  
+*/
+
+/*
+typedef struct
+{
+uint32_t ADC_Mode;
+FunctionalState ADC_ScanConvMode; 
+FunctionalState ADC_ContinuousConvMode;
+uint32_t ADC_ExternalTrigConv;
+uint32_t ADC_DataAlign;
+uint8_t ADC_NbrOfChannel;
+}ADC_InitTypeDef;
+*/
+typedef struct
+{
+    uint32_t ADC_Resolution;  
+    uint32_t ADC_PRESCARE;
+    uint32_t ADC_Mode;
+    FunctionalState ADC_ContinuousConvMode;
+    uint32_t ADC_TRGEN;
+    uint32_t ADC_ExternalTrigConv;   
+    uint32_t ADC_DataAlign;
+}ADC_InitTypeDef;
+/**
+* @}
+*/
+
+/** @defgroup ADC_Exported_Constants
+* @{
+*/
+
+#define IS_ADC_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
+((*(uint32_t*)&(PERIPH)) == ADC2_BASE))
+
+#define IS_ADC_DMA_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == ADC1_BASE) || \
+((*(uint32_t*)&(PERIPH)) == ADC2_BASE))
+
+/** @defgroup ADC_Resolution
+* @{
+*/ 
+#define ADC_Resolution_12b                         ((uint32_t)0x00000000)
+#define ADC_Resolution_11b                         ((uint32_t)0x00000080)
+#define ADC_Resolution_10b                         ((uint32_t)0x00000100)
+#define ADC_Resolution_9b                          ((uint32_t)0x00000180)
+#define ADC_Resolution_8b                          ((uint32_t)0x00000200)
+
+#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
+((RESOLUTION) == ADC_Resolution_10b) || \
+    ((RESOLUTION) == ADC_Resolution_8b) || \
+        ((RESOLUTION) == ADC_Resolution_6b))
+
+/** 
+* @brief  for ADC1, ADC2
+*/
+
+#define ADC_PCLK2_PRESCARE_2						 ((uint32_t)0x00000000)
+#define ADC_PCLK2_PRESCARE_4						 ((uint32_t)0x00000010)
+#define ADC_PCLK2_PRESCARE_6						 ((uint32_t)0x00000020)
+#define ADC_PCLK2_PRESCARE_8						 ((uint32_t)0x00000030)
+#define ADC_PCLK2_PRESCARE_10						 ((uint32_t)0x00000040)
+#define ADC_PCLK2_PRESCARE_12						 ((uint32_t)0x00000050)
+#define ADC_PCLK2_PRESCARE_14						 ((uint32_t)0x00000060)
+#define ADC_PCLK2_PRESCARE_16						 ((uint32_t)0x00000070)
+
+
+
+/** @defgroup ADC_dual_mode 
+* @{
+*/
+
+#define ADC_Mode_Single                     ((uint32_t)0x00000000)
+#define ADC_Mode_Single_Period              ((uint32_t)0x00000200)
+#define ADC_Mode_Continuous_Scan            ((uint32_t)0x00000400)
+
+#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Single) || \
+((MODE) == ADC_Mode_Single_Period) || \
+    ((MODE) == ADC_Mode_Continuous_Scan))
+/**
+* @}
+*/
+
+#define ADC_TRG_Disable   ((uint32_t)0xfffffffB)
+#define ADC_TRG_Enable    ((uint32_t)0x00000004)
+
+/** @defgroup ADC_extrenal_trigger_sources_for_regular_channels_conversion 
+* @{
+*/
+
+/** 
+* @brief  for ADC1  
+*/
+
+#define ADC_ExternalTrigConv_T1_CC1         	((uint32_t)0x00000000)
+#define ADC_ExternalTrigConv_T1_CC2   			  ((uint32_t)0x00000010)
+#define ADC_ExternalTrigConv_T1_CC3     		  ((uint32_t)0x00000020)
+#define ADC_ExternalTrigConv_T2_CC2  			    ((uint32_t)0x00000030)
+#define ADC_ExternalTrigConv_T3_TRGO      		((uint32_t)0x00000040)
+#define ADC_ExternalTrigConv_T3_CC1      		  ((uint32_t)0x00000060)
+#define ADC_ExternalTrigConv_EXTI_11     	    ((uint32_t)0x00000070)
+
+#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
+((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
+    ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
+        ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
+            ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
+                ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
+                    ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
+                        ((REGTRIG) == ADC_ExternalTrigConv_EXTI_11) || \
+                            ((REGTRIG) == ADC_ExternalTrigConv_T1_TRGO) || \
+                                ((REGTRIG) == ADC_ExternalTrigConv_T1_CC4) || \
+                                    ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \
+                                        ((REGTRIG) == ADC_ExternalTrigConv_T2_CC1) || \
+                                            ((REGTRIG) == ADC_ExternalTrigConv_T3_CC4) || \
+                                                ((REGTRIG) == ADC_ExternalTrigConv_T4_TRGO) || \
+                                                    ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
+                                                        ((REGTRIG) == ADC_ExternalTrigConv_EXTI_15))
+/**
+* @}
+*/
+
+/** @defgroup ADC_data_align 
+* @{
+*/
+
+#define ADC_DataAlign_Right                        ((uint32_t)0x00000000)
+#define ADC_DataAlign_Left                         ((uint32_t)0x00000800)
+#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
+((ALIGN) == ADC_DataAlign_Left))
+/**
+* @}
+*/
+
+/** @defgroup ADC_channels 
+* @{
+*/
+
+#define ADC_Channel_0                               ((uint8_t)0x00)
+#define ADC_Channel_1                               ((uint8_t)0x01)
+#define ADC_Channel_2                               ((uint8_t)0x02)
+#define ADC_Channel_3                               ((uint8_t)0x03)
+#define ADC_Channel_4                               ((uint8_t)0x04)
+#define ADC_Channel_5                               ((uint8_t)0x05)
+#define ADC_Channel_6                               ((uint8_t)0x06)
+#define ADC_Channel_7                               ((uint8_t)0x07)
+#define ADC_Channel_8                               ((uint8_t)0x08)
+#define ADC_Channel_9                               ((uint8_t)0x09)
+#define ADC_Channel_10                              ((uint8_t)0x0A) //tempsensor
+#define ADC_Channel_11                              ((uint8_t)0x0B)//vref 1.2V
+#define ADC_Channel_All															((uint8_t)0x0f)
+
+
+#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
+((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
+    ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
+        ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
+            ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_All))
+
+
+
+/** @defgroup ADC_sampling_times 
+* @{
+*/ 
+
+#define ADC_SampleTime_1_5Cycles                     ((uint8_t)0x00)
+#define ADC_SampleTime_7_5Cycles                     ((uint8_t)0x01)
+#define ADC_SampleTime_13_5Cycles                    ((uint8_t)0x02)
+#define ADC_SampleTime_28_5Cycles                    ((uint8_t)0x03)
+#define ADC_SampleTime_41_5Cycles                    ((uint8_t)0x04)
+#define ADC_SampleTime_55_5Cycles                    ((uint8_t)0x05)
+#define ADC_SampleTime_71_5Cycles                    ((uint8_t)0x06)
+#define ADC_SampleTime_239_5Cycles                   ((uint8_t)0x07)
+
+#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1_5Cycles)   || \
+((TIME) == ADC_SampleTime_7_5Cycles)   || \
+    ((TIME) == ADC_SampleTime_13_5Cycles)  || \
+        ((TIME) == ADC_SampleTime_28_5Cycles)  || \
+            ((TIME) == ADC_SampleTime_41_5Cycles)  || \
+                ((TIME) == ADC_SampleTime_55_5Cycles)  || \
+                    ((TIME) == ADC_SampleTime_71_5Cycles)  || \
+                        ((TIME) == ADC_SampleTime_239_5Cycles))
+
+
+
+
+/** @defgroup ADC_analog_watchdog_selection 
+* @{
+*/
+
+#define ADC_AnalogWatchdog_SingleRegEnable         ((uint32_t)0x00000002)
+#define ADC_AnalogWatchdog_None                    ((uint32_t)0x00000000)
+
+#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
+((WATCHDOG) == ADC_AnalogWatchdog_None))
+/**
+* @}
+*/
+
+/** @defgroup ADC_interrupts_definition 
+* @{
+*/
+
+#define ADC_IT_EOC                                 ((uint16_t)0x0001)
+#define ADC_IT_AWD                                 ((uint16_t)0x0002)
+
+#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xFFFC) == 0x00) && ((IT) != 0x00))
+
+#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD)) 
+
+/**
+* @}
+*/
+
+/** @defgroup ADC_flags_definition 
+* @{
+*/
+
+#define ADC_FLAG_AWD                               ((uint8_t)0x02) //ADWIF ±È½Ï±êÖ¾Î»
+#define ADC_FLAG_EOC                               ((uint8_t)0x01) //ADIF  ×ª»»½áÊø±êÖ¾Î»
+#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xF0) == 0x00) && ((FLAG) != 0x00))
+#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC))
+
+/**
+* @}
+*/ 
+
+
+/** @defgroup ADC_Exported_Functions
+* @{
+*/
+
+void ADC_DeInit(ADC_TypeDef* ADCx);
+void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
+void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
+void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
+void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
+void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
+void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
+FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
+void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
+void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
+uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
+void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
+void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
+void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
+
+void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx,FunctionalState NewState);
+void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
+void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
+void ADC_TempSensorCmd(FunctionalState NewState);
+void ADC_VrefintCmd(FunctionalState NewState);
+FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
+void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
+ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
+void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
+
+#endif /*__HAL_ADC_H */
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_bkp.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_bkp.h
@@ -0,0 +1,88 @@
+/**
+******************************************************************************
+* @file  HAL_bkp.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the BKP firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_BKP_H
+#define __HAL_BKP_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+
+#define BKP_DR1                          ((uint16_t)0x0050)
+#define BKP_DR2                          ((uint16_t)0x0054)
+#define BKP_DR3                          ((uint16_t)0x0058)
+#define BKP_DR4                          ((uint16_t)0x005C)
+#define BKP_DR5                          ((uint16_t)0x0060)
+#define BKP_DR6                          ((uint16_t)0x0064)
+#define BKP_DR7                          ((uint16_t)0x0068)
+#define BKP_DR8                          ((uint16_t)0x006C)
+#define BKP_DR9                          ((uint16_t)0x0070)
+#define BKP_DR10                         ((uint16_t)0x0074)
+
+#define IS_BKP_DR(DR) (((DR) == BKP_DR1)  || ((DR) == BKP_DR2)  || ((DR) == BKP_DR3)  || \
+((DR) == BKP_DR4)  || ((DR) == BKP_DR5)  || ((DR) == BKP_DR6)  || \
+  ((DR) == BKP_DR7)  || ((DR) == BKP_DR8)  || ((DR) == BKP_DR9)  || \
+    ((DR) == BKP_DR10))
+
+#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup BKP_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup BKP_Exported_Functions
+* @{
+*/
+
+
+void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data);
+uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR);
+
+#endif /* __HAL_BKP_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_can.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_can.h
@@ -0,0 +1,379 @@
+/**
+******************************************************************************
+* @file  HAL_can.h
+* @author  AE Team
+* @version  V1.5.0
+* @date  02/08/2017
+* @brief  This file contains all the functions prototypes for the BKP firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_CAN_H
+#define __HAL_CAN_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+
+/** @defgroup CAN_sleep_constants 
+* @{
+*/
+
+#define CANINITFAILED              ((uint8_t)0x00) /* CAN initialization failed */
+#define CANINITOK                  ((uint8_t)0x01) /* CAN initialization ok */
+
+/**
+* @}
+*/
+
+
+
+/** @defgroup CAN_sleep_constants 
+* @{
+*/
+
+#define CANSLEEPFAILED              ((uint8_t)0x00) /* CAN did not enter the sleep mode */
+#define CANSLEEPOK                  ((uint8_t)0x01) /* CAN entered the sleep mode */
+
+/**
+* @}
+*/
+
+
+/** @defgroup CAN_wake_up_constants 
+* @{
+*/
+
+#define CANWAKEUPFAILED             ((uint8_t)0x00) /* CAN did not leave the sleep mode */
+#define CANWAKEUPOK                 ((uint8_t)0x01) /* CAN leaved the sleep mode */
+
+/**
+* @}
+*/
+
+/**
+* @brief  parasmeter of CAN Mode 
+*/
+#define CAN_BASICMode ((uint32_t)0x0)
+#define CAN_PELIMode  ((uint32_t)0x80)
+#define CAN_WorkMode		((uint32_t)0x80)
+#define CAN_ResetMode 		((uint32_t)0x1)
+#define CAN_ListenOnlyMode	((uint32_t)0x2)
+#define CAN_SeftTestMode	((uint32_t)0x4)
+#define CAN_FilterMode_Singal	((uint32_t)0x8)
+#define CAN_FilterMode_Double	((uint32_t)0xf7)
+#define CAN_SleepMode		((uint32_t)0x10)
+
+/**
+* @}
+*/
+
+/**
+* @brief  parasmeter of BASIC CAN interrupt 
+*/
+#define CAN_IT_RIE	((uint32_t)0x2)
+#define CAN_IT_TIE	((uint32_t)0x4)
+#define CAN_IT_EIE	((uint32_t)0x8)
+#define CAN_IT_OIE	((uint32_t)0x10)
+
+/**
+* @}
+*/
+
+/**
+* @brief  parasmeter of PELI CAN interrupt 
+*/
+#define CAN_IT_RI	((uint32_t)0x1)
+#define CAN_IT_TI	((uint32_t)0x2)
+#define CAN_IT_EI	((uint32_t)0x4)
+#define CAN_IT_DOI	((uint32_t)0x8)
+#define CAN_IT_WUI	((uint32_t)0x10)
+#define CAN_IT_EPI	((uint32_t)0x20)
+#define CAN_IT_ALI	((uint32_t)0x40)
+#define CAN_IT_BEI	((uint32_t)0x80)
+#define CAN_IT_ALL	((uint32_t)0xff)
+
+/**
+* @}
+*/
+
+/**
+* @brief  parasmeter of CAN Status 
+*/
+#define CAN_STATUS_RBS	((uint32_t)0x1)
+#define CAN_STATUS_DOS	((uint32_t)0x2)
+#define CAN_STATUS_TBS	((uint32_t)0x4)
+#define CAN_STATUS_TCS	((uint32_t)0x8)
+#define CAN_STATUS_RS	((uint32_t)0x10)
+#define CAN_STATUS_TS	((uint32_t)0x20)
+#define CAN_STATUS_ES	((uint32_t)0x40)
+#define CAN_STATUS_BS	((uint32_t)0x80)
+
+/**
+* @}
+*/
+
+/**
+* @brief  parasmeter of CAN Command register 
+*/
+#define CAN_TR	0x1
+#define CAN_AT	0x2
+#define CAN_RRB	0x4
+#define CAN_CDO	0x8
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Basic init structure definition
+*/
+typedef struct
+{
+  uint8_t SJW;
+  uint8_t BRP;
+  FlagStatus SAM;
+  uint8_t TESG2;
+  uint8_t TESG1;
+  FunctionalState GTS;
+  uint8_t CDCLK;
+  uint8_t CLOSE_OPEN_CLK;
+  uint8_t RXINTEN;
+  uint8_t CBP;
+}CAN_Basic_InitTypeDef;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Peli init structure definition
+*/
+typedef struct
+{
+  uint8_t SJW;
+  uint8_t BRP;
+  FlagStatus SAM;
+  uint8_t TESG2;
+  uint8_t TESG1;
+  FunctionalState LOM;
+  FunctionalState STM;
+  FunctionalState SM; 
+  FunctionalState SRR;
+  uint32_t EWLR;
+}CAN_Peli_InitTypeDef;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Basic filter init structure definition
+*/
+typedef struct
+{
+  uint8_t CAN_FilterId;         /*!< Specifies the filter identification number .
+  This parameter can be a value between 0x00 and 0xFF */
+  
+  uint8_t CAN_FilterMaskId;     /*!< Specifies the filter mask number or identification number,
+  This parameter can be a value between 0x00 and 0xFF */
+} CAN_Basic_FilterInitTypeDef;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Peli filter init structure definition
+*/
+typedef struct
+{
+  uint8_t AFM;
+  uint8_t CAN_FilterId0;         /*!< Specifies the filter identification number 
+  This parameter can be a value between 0x00 and 0xFF */
+  uint8_t CAN_FilterId1;
+  uint8_t CAN_FilterId2;
+  uint8_t CAN_FilterId3;
+  
+  uint8_t CAN_FilterMaskId0;     /*!< Specifies the filter mask number or identification number,
+  This parameter can be a value between 0x00 and 0xFF */
+  uint8_t CAN_FilterMaskId1;
+  uint8_t CAN_FilterMaskId2;
+  uint8_t CAN_FilterMaskId3;
+} CAN_Peli_FilterInitTypeDef;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Peli transmit frame definition  
+*/
+typedef enum {DataFrame = 0,RemoteFrame = !DataFrame}TransFrame;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Basic Tx message structure definition  
+*/
+typedef struct
+{
+  uint8_t IDH;  /*!< Specifies the standard high identifier.
+  This parameter can be a value between 0 to 0xFF. */
+  uint8_t IDL;  /*!< Specifies the standard low identifier.
+  This parameter can be a value between 0 to 0x7. */
+  uint8_t RTR;     /*!< Specifies the type of frame for the message that will 
+  be transmitted. This parameter can be @TransFrame */
+  
+  uint8_t DLC;     /*!< Specifies the length of the frame that will be 
+  transmitted. This parameter can be a value between 
+  0 to 8 */
+  
+  uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 
+  to 0xFF. */
+} CanBasicTxMsg;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Basic Rx message structure definition  
+*/
+typedef struct
+{
+  uint16_t ID;  /*!< Specifies the standard identifier.
+  This parameter can be a value between 0 to 0x7FF. */
+  uint8_t RTR;     /*!< Specifies the type of frame for the received message.
+  This parameter can be a value of 
+  @ref TransFrame */
+  
+  uint8_t DLC;     /*!< Specifies the length of the frame that will be received.
+  This parameter can be a value between 0 to 8 */
+  
+  uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to 
+  0xFF. */
+  
+} CanBasicRxMsg;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN_Peli_Tx message structure definition  
+*/
+typedef struct
+{
+  uint8_t IDLL;  /*!< Specifies the extended identifier.
+  This parameter can be a value between 0 to 0xFF. */
+  uint8_t IDLH;
+  uint8_t IDHL;
+  uint8_t IDHH;
+  uint8_t FF;     /*!< Specifies the type of identifier for the message that 
+  will be transmitted. This parameter can be a value 
+  of @ref CAN_identifier_type */
+  
+  uint8_t RTR;     /*!< Specifies the type of frame for the message that will 
+  be transmitted. This parameter can be a value of 
+  @ref TransFrame */
+  
+  uint8_t DLC;     /*!< Specifies the length of the frame that will be 
+  transmitted. This parameter can be a value between 
+  0 to 8 */
+  
+  uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 
+  to 0xFF. */
+} CanPeliTxMsg;
+
+/**
+* @}
+*/
+
+/** 
+* @brief  CAN Rx message structure definition  
+*/
+typedef struct
+{
+  uint32_t ID;  /*!< Specifies the extended identifier.
+  This parameter can be a value between 0 to 0x1FFFFFFF. */
+  uint8_t FF;     /*!< Specifies the type of identifier for the message that 
+  will be received. This parameter can be a value of 
+  @ref CAN_identifier_type */
+  
+  uint8_t RTR;     /*!< Specifies the type of frame for the received message.
+  This parameter can be a value of 
+  @ref TransFrame */
+  
+  uint8_t DLC;     /*!< Specifies the length of the frame that will be received.
+  This parameter can be a value between 0 to 8 */
+  
+  uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to 
+  0xFF. */
+  
+} CanPeliRxMsg;
+
+
+
+
+#define CANTXFAILED                 ((uint8_t)0x00) /* CAN transmission failed */
+#define CANTXOK                     ((uint8_t)0x01) /* CAN transmission succeeded */
+#define CANTXPENDING                ((uint8_t)0x02) /* CAN transmission pending */
+#define CAN_NO_MB                   ((uint8_t)0x04) /* CAN cell did not provide an empty mailbox */
+
+
+/************************ Basic and Peli Work all need function ********************/
+
+void CAN_Mode_Cmd(CAN_TypeDef* CANx, uint32_t CAN_MODE);
+void CAN_ResetMode_Cmd(CAN_TypeDef* CANx,FunctionalState NewState);
+void CAN_ClearDataOverflow(CAN_TypeDef* CANx);
+void CAN_ClearITPendingBit(CAN_TypeDef* CANx);
+
+
+/************************ Basic Work function ********************/
+void CAN_DeInit(CAN_TypeDef* CANx);
+uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_Basic_InitTypeDef* CAN_Basic_InitStruct);
+void CAN_FilterInit(CAN_Basic_FilterInitTypeDef* CAN_Basic_FilterInitStruct);
+void CAN_StructInit(CAN_Basic_InitTypeDef* CAN_Basic_InitStruct);
+void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState Newstate);
+uint8_t CAN_Transmit(CAN_TypeDef* CANx,CanBasicTxMsg* BasicTxMessage);
+void CAN_CancelTransmit(CAN_TypeDef* CANx);
+void CAN_FIFORelease(CAN_TypeDef* CANx);
+void CAN_Receive(CAN_TypeDef* CANx,CanBasicRxMsg* BasicRxMessage);
+uint8_t CAN_Sleep(CAN_TypeDef* CANx);
+uint8_t CAN_WakeUp(CAN_TypeDef* CANx);
+FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx,uint32_t CAN_FLAG);
+ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT);
+
+
+/************************ Peli Work function *********************/
+void CAN_Peli_SleepMode_Cmd(FunctionalState NewState);
+void CAN_Peli_Init(CAN_Peli_InitTypeDef* CAN_InitStruct);
+void CAN_Peli_StructInit(CAN_Peli_InitTypeDef* CAN_Peli_InitStruct);
+void CAN_Peli_FilterInit(CAN_Peli_FilterInitTypeDef* CAN_Peli_FilterInitStruct);
+void CAN_Peli_FilterStructInit(CAN_Peli_FilterInitTypeDef* CAN_Peli_FilterInitStruct);
+void CAN_Peli_Transmit(CanPeliTxMsg* PeliTxMessage);
+void CAN_Peli_TransmitRepeat(CanPeliTxMsg* PeliTxMessage);
+void CAN_Peli_Receive(CanPeliRxMsg* PeliRxMessage);
+uint32_t CAN_Peli_GetRxFIFOInfo(void);
+uint8_t CAN_Peli_GetLastErrorCode(void);
+uint8_t CAN_Peli_GetReceiveErrorCounter(void);
+uint8_t CAN_Peli_GetLSBTransmitErrorCounter(void);
+void CAN_Peli_ITConfig(uint32_t CAN_IT, FunctionalState NewState);
+ITStatus CAN_Peli_GetITStatus(uint32_t CAN_IT);
+void CAN_AutoCfg_BaudParam(CAN_Peli_InitTypeDef  *CAN_Peli_InitStruct,unsigned int SrcClk,unsigned int baud );
+#endif /* __HAL_CAN_H */
+
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_comp.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_comp.h
@@ -0,0 +1,301 @@
+/**
+******************************************************************************
+* @file    HAL_comp.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief   This file contains all the functions prototypes for the COMP firmware 
+*          library.
+******************************************************************************
+* @attention
+*
+* <h2><center>&copy; 2017 MindMotion</center></h2>
+******************************************************************************
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_COMP_H
+#define __HAL_COMP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  
+  /* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+  
+  /** @addtogroup 
+  * @{
+  */
+  
+  /** @addtogroup COMP
+  * @{
+  */
+  
+  /* Exported types ------------------------------------------------------------*/
+  
+  /** 
+  * @brief  COMP Init structure definition  
+  */
+  
+  typedef struct
+  {
+    
+    uint32_t COMP_InvertingInput;     /*!< Selects the inverting input of the comparator.
+    This parameter can be a value of @ref COMP_InvertingInput */
+    
+    uint32_t COMP_NonInvertingInput;  /*!< Selects the non inverting input of the comparator.
+    This parameter can be a value of @ref COMP_NonInvertingInput */
+    
+    uint32_t COMP_Output;             /*!< Selects the output redirection of the comparator.
+    This parameter can be a value of @ref COMP_Output */
+    
+    uint32_t COMP_BlankingSrce;      /*!< Selects the output blanking source of the comparator.
+    This parameter can be a value of @ref COMP_BlankingSrce */
+    
+    uint32_t COMP_OutputPol;           /*!< Selects the output polarity of the comparator.
+    This parameter can be a value of @ref COMP_OutputPoloarity */
+    
+    uint32_t COMP_Hysteresis;         /*!< Selects the hysteresis voltage of the comparator.
+    This parameter can be a value of @ref COMP_Hysteresis */
+    
+    uint32_t COMP_Mode;               /*!< Selects the operating mode of the comparator
+    and allows to adjust the speed/consumption.
+    This parameter can be a value of @ref COMP_Mode */
+    
+  }COMP_InitTypeDef;
+  
+  /* Exported constants --------------------------------------------------------*/
+  
+  /** @defgroup COMP_Exported_Constants
+  * @{
+  */ 
+  
+  /** @defgroup COMP_Selection
+  * @{
+  */
+  
+#define COMP_Selection_COMP1                    ((uint32_t)0x00000000) /*!< COMP1 Selection */
+#define COMP_Selection_COMP2                    ((uint32_t)0x00000004) /*!< COMP2 Selection */
+  
+  
+#define IS_COMP_ALL_PERIPH(PERIPH) (((PERIPH) == COMP_Selection_COMP1) || \
+  ((PERIPH) == COMP_Selection_COMP2))
+
+/**
+* @}
+*/ 
+
+/** @defgroup COMP_InvertingInput
+* @{
+*/
+
+#define COMP_InvertingInput_1_4VREFINT          ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input */
+#define COMP_InvertingInput_1_2VREFINT          ((uint32_t)0x00000010) /*!< 1/2 VREFINT connected to comparator inverting input */
+#define COMP_InvertingInput_3_4VREFINT          ((uint32_t)0x00000020) /*!< 3/4 VREFINT connected to comparator inverting input */
+#define COMP_InvertingInput_VREFINT             ((uint32_t)0x00000030) /*!< VREFINT connected to comparator inverting input */
+#define COMP_InvertingInput_DAC1                ((uint32_t)0x00000040) /*!< DAC1_OUT (PA4) connected to comparator inverting input */
+#define COMP_InvertingInput_DAC2                ((uint32_t)0x00000050) /*!< DAC2_OUT (PA5) connected to comparator inverting input */
+#define COMP_InvertingInput_IO1                 ((uint32_t)0x00000060) /*!< I/O1 (PA0 for COMP1, PA2 for COMP2) connected to comparator inverting input */
+#define COMP_InvertingInput_IO2                 ((uint32_t)0x00000070) /*!< I/O2 (PA6 for COMP1, PA6 for COMP2) connected to comparator inverting input */
+
+
+#define IS_COMP_INVERTING_INPUT(INPUT) (((INPUT) == COMP_InvertingInput_1_4VREFINT) || \
+((INPUT) == COMP_InvertingInput_1_2VREFINT) || \
+  ((INPUT) == COMP_InvertingInput_3_4VREFINT) || \
+    ((INPUT) == COMP_InvertingInput_VREFINT)    || \
+      ((INPUT) == COMP_InvertingInput_DAC1)       || \
+        ((INPUT) == COMP_InvertingInput_DAC2)       || \
+          ((INPUT) == COMP_InvertingInput_IO1)        || \
+            ((INPUT) == COMP_InvertingInput_IO2))
+/**
+* @}
+*/ 
+
+/** @defgroup COMP_NonInvertingInput
+* @{
+*/
+
+#define COMP_NonInvertingInput_IO1                 ((uint32_t)0x00000000) /*!< I/O1 (PA0 for COMP1, PA0 for COMP2) connected to comparator non inverting input */
+
+#define COMP_NonInvertingInput_IO2                 ((uint32_t)0x00000080) /*!< I/O2 (PA1 for COMP1, PA1 for COMP2) connected to comparator non inverting input */
+
+#define COMP_NonInvertingInput_IO3                 ((uint32_t)0x00000100) /*!< I/O2 (PA2 for COMP1, PA2 for COMP2) connected to comparator non inverting input */
+
+#define COMP_NonInvertingInput_IO4                 ((uint32_t)0x00000180) /*!< I/O2 (PA3 for COMP1, PA3 for COMP2) connected to comparator non inverting input */
+
+#define COMP_NonInvertingInput_IO5                 ((uint32_t)0x00000200) /*!< I/O2 (PA4 for COMP1, PA4 for COMP2) connected to comparator non inverting input */
+
+#define COMP_NonInvertingInput_IO6                 ((uint32_t)0x00000280) /*!< I/O2 (PA5 for COMP1, PA5 for COMP2) connected to comparator non inverting input */
+
+#define COMP_NonInvertingInput_IO7                 ((uint32_t)0x00000300) /*!< I/O2 (PA6 for COMP1, PA6 for COMP2) connected to comparator non inverting input */
+
+#define COMP_NonInvertingInput_IO8                 ((uint32_t)0x00000380) /*!< I/O2 (PA7 for COMP1, PA7 for COMP2) connected to comparator non inverting input */
+
+#define IS_COMP_NONINVERTING_INPUT(INPUT)     (((INPUT) == COMP_NonInvertingInput_IO1)  || \
+((INPUT) == COMP_NonInvertingInput_IO1)  || \
+  ((INPUT) == COMP_NonInvertingInput_IO2)  || \
+    ((INPUT) == COMP_NonInvertingInput_IO3)  || \
+      ((INPUT) == COMP_NonInvertingInput_IO4)  || \
+        ((INPUT) == COMP_NonInvertingInput_IO5)  || \
+          ((INPUT) == COMP_NonInvertingInput_IO6)  || \
+            ((INPUT) == COMP_NonInvertingInput_IO7)  || \
+              ((INPUT) == COMP_NonInvertingInput_IO8))
+
+/**
+* @}
+*/ 
+
+/** @defgroup COMP_Output
+* @{
+*/
+
+#define COMP_Output_None                  ((uint32_t)0x00000000)   /*!< COMP output isn't connected to other peripherals */
+
+/* Output Redirection common for all comparators COMP1...COMP2 */
+#define COMP_Output_TIM1BKIN              ((uint32_t)0x00000800) /*!< COMP output connected to TIM1 Break Input (BKIN) */
+
+/* Output Redirection common for COMP1 and COMP2 */
+#define COMP_Output_TIM1OCREFCLR          ((uint32_t)0x00001800)   /*!< COMP output connected to TIM1 OCREF Clear */
+#define COMP_Output_TIM1IC1               ((uint32_t)0x00001C00)   /*!< COMP output connected to TIM1 Input Capture 1 */
+#define COMP_Output_TIM2IC4               ((uint32_t)0x00002000)   /*!< COMP output connected to TIM2 Input Capture 4 */
+#define COMP_Output_TIM2OCREFCLR          ((uint32_t)0x00002400)   /*!< COMP output connected to TIM2 OCREF Clear */
+#define COMP_Output_TIM3IC1               ((uint32_t)0x00002800)   /*!< COMP output connected to TIM3 Input Capture 1 */
+#define COMP_Output_TIM3OCREFCLR          ((uint32_t)0x00002C00)   /*!< COMP output connected to TIM3 OCREF Clear */
+
+
+#define IS_COMP_OUTPUT(OUTPUT) 		(((OUTPUT) == COMP_Output_None)  || \
+((OUTPUT) == COMP_Output_TIM1BKIN)  || \
+  ((OUTPUT) == COMP_Output_TIM1IC1)  || \
+    ((OUTPUT) == COMP_Output_TIM1OCREFCLR)  || \
+      ((OUTPUT) == COMP_Output_TIM2IC4)  || \
+        ((OUTPUT) == COMP_Output_TIM2OCREFCLR)  || \
+          ((OUTPUT) == COMP_Output_TIM3IC1)  || \
+            ((OUTPUT) == COMP_Output_TIM3OCREFCLR))
+
+/**
+* @}
+*/ 
+
+/** @defgroup COMP_BlankingSrce
+* @{
+*/
+
+/* No blanking source can be selected for all comparators */
+#define COMP_BlankingSrce_None                   ((uint32_t)0x00000000)    /*!< No blanking source */
+
+
+#define IS_COMP_BLANKING_SOURCE(SOURCE) (((SOURCE) == COMP_BlankingSrce_None))   
+
+/**
+* @}
+*/ 
+
+/** @defgroup COMP_OutputPoloarity
+* @{
+*/
+#define COMP_OutputPol_NonInverted          ((uint32_t)0x00000000)  /*!< COMP output on GPIO isn't inverted */
+#define COMP_OutputPol_Inverted             ((uint32_t)0x00008000)  /*!< COMP output on GPIO is inverted */
+
+#define IS_COMP_OUTPUT_POL(POL) (((POL) == COMP_OutputPol_NonInverted)  || \
+((POL) == COMP_OutputPol_Inverted))
+
+/**
+* @}
+*/ 
+
+/** @defgroup COMP_Hysteresis
+* @{
+*/
+/* Please refer to the electrical characteristics in the device datasheet for
+the hysteresis level */
+#define COMP_Hysteresis_No                         0x00000000           /*!< No hysteresis */
+#define COMP_Hysteresis_Low                        ((uint32_t)0x00010000) /*!< Hysteresis level low */
+#define COMP_Hysteresis_Medium                     ((uint32_t)0x00020000) /*!< Hysteresis level medium */
+#define COMP_Hysteresis_High                       ((uint32_t)0x00030000)   /*!< Hysteresis level high */
+
+#define IS_COMP_HYSTERESIS(HYSTERESIS)    (((HYSTERESIS) == COMP_Hysteresis_No)     || \
+((HYSTERESIS) == COMP_Hysteresis_Low)    || \
+  ((HYSTERESIS) == COMP_Hysteresis_Medium) || \
+    ((HYSTERESIS) == COMP_Hysteresis_High))
+/**
+* @}
+*/
+
+/** @defgroup COMP_Mode
+* @{
+*/
+/* Please refer to the electrical characteristics in the device datasheet for
+the power consumption values */
+#define COMP_Mode_HighSpeed                     ((uint32_t)0x0000000C)  /*!< High Speed */
+#define COMP_Mode_MediumSpeed                   ((uint32_t)0x00000008)  /*!< Medium Speed */
+#define COMP_Mode_LowPower                      ((uint32_t)0x00000004)  /*!< Low power mode */
+#define COMP_Mode_UltraLowPower                 0x00000000            /*!< Ultra-low power mode */
+
+#define IS_COMP_MODE(MODE)    (((MODE) == COMP_Mode_UltraLowPower) || \
+((MODE) == COMP_Mode_LowPower)      || \
+  ((MODE) == COMP_Mode_MediumSpeed)   || \
+    ((MODE) == COMP_Mode_HighSpeed))
+/**
+* @}
+*/
+
+/** @defgroup COMP_OutputLevel
+* @{
+*/ 
+/* When output polarity is not inverted, comparator output is high when
+the non-inverting input is at a higher voltage than the inverting input */
+#define COMP_OutputLevel_High                   ((uint32_t)0x40000000)
+/* When output polarity is not inverted, comparator output is low when
+the non-inverting input is at a lower voltage than the inverting input*/
+#define COMP_OutputLevel_Low                    ((uint32_t)0x00000000)
+
+/**
+* @}
+*/ 
+
+/** @defgroup COMP_WindowMode
+* @{
+*/
+#define IS_COMP_WINDOW(WINDOW)  (((WINDOW) == COMP_Selection_COMP2) || \
+((WINDOW) == COMP_Selection_COMP4) || \
+  ((WINDOW) == COMP_Selection_COMP6))
+/**
+* @}
+*/
+
+/**
+* @}
+*/ 
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+/*  Function used to set the COMP configuration to the default reset state ****/
+void COMP_DeInit(uint32_t COMP_Selection);
+
+/* Initialization and Configuration functions *********************************/
+void COMP_Init(uint32_t COMP_Selection, COMP_InitTypeDef* COMP_InitStruct);
+void COMP_StructInit(COMP_InitTypeDef* COMP_InitStruct);
+void COMP_Cmd(uint32_t COMP_Selection, FunctionalState NewState);
+void COMP_SwitchCmd(uint32_t COMP_Selection, FunctionalState NewState);
+uint32_t COMP_GetOutputLevel(uint32_t COMP_Selection);
+
+/* COMP configuration locking function ****************************************/
+void COMP_LockConfig(uint32_t COMP_Selection);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__HAL_COMP_H */
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_conf.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_conf.h
@@ -0,0 +1,43 @@
+/**
+******************************************************************************
+* @file  HAL_conf.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains Header file for generic microcontroller.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+#ifndef __HAL_CONF_H__
+#define __HAL_CONF_H__
+
+/*´Ë´¦¿ÉÌí¼Ó»òÉ¾³ýÍâÉè*/
+#include "HAL_device.h"
+#include "HAL_adc.h"
+#include "HAL_bkp.h"
+#include "HAL_dma.h"
+#include "HAL_exti.h"
+#include "HAL_flash.h"
+#include "HAL_gpio.h"
+#include "HAL_i2c.h"
+#include "HAL_iwdg.h"
+#include "HAL_pwr.h"
+#include "HAL_rcc.h"
+#include "HAL_spi.h"
+#include "HAL_tim.h"
+#include "HAL_uart.h"
+#include "HAL_wwdg.h"
+#include "HAL_misc.h"
+#include "HAL_syscfg.h"
+#endif
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_dma.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_dma.h
@@ -0,0 +1,332 @@
+/**
+******************************************************************************
+* @file  HAL_dma.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the DMA firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_DMA_H
+#define __HAL_DMA_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup DMA
+* @{
+*/
+
+/** @defgroup DMA_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  DMA Init structure definition
+*/
+
+typedef struct
+{
+    uint32_t DMA_PeripheralBaseAddr;
+    uint32_t DMA_MemoryBaseAddr;
+    uint32_t DMA_DIR;
+    uint32_t DMA_BufferSize;
+    uint32_t DMA_PeripheralInc;
+    uint32_t DMA_MemoryInc;
+    uint32_t DMA_PeripheralDataSize;
+    uint32_t DMA_MemoryDataSize;
+    uint32_t DMA_Mode;
+    uint32_t DMA_Priority;
+    uint32_t DMA_M2M;
+}DMA_InitTypeDef;
+
+/**
+* @}
+*/
+
+/** @defgroup DMA_Exported_Constants
+* @{
+*/
+
+#define IS_DMA_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == DMA1_Channel1_BASE) || \
+((*(uint32_t*)&(PERIPH)) == DMA1_Channel2_BASE)  || \
+    ((*(uint32_t*)&(PERIPH)) == DMA1_Channel3_BASE)  || \
+        ((*(uint32_t*)&(PERIPH)) == DMA1_Channel4_BASE)  || \
+            ((*(uint32_t*)&(PERIPH)) == DMA1_Channel5_BASE))
+
+
+
+/** @defgroup DMA_data_transfer_direction 
+* @{
+*/
+
+#define DMA_DIR_PeripheralDST              ((uint32_t)0x00000010) //mtop
+#define DMA_DIR_PeripheralSRC              ((uint32_t)0x00000000) //ptom
+#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \
+((DIR) == DMA_DIR_PeripheralSRC))
+/**
+* @}
+*/
+
+/** @defgroup DMA_peripheral_incremented_mode 
+* @{
+*/
+
+#define DMA_PeripheralInc_Enable           ((uint32_t)0x00000040)
+#define DMA_PeripheralInc_Disable          ((uint32_t)0x00000000)
+#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \
+((STATE) == DMA_PeripheralInc_Disable))
+/**
+* @}
+*/
+
+/** @defgroup DMA_memory_incremented_mode 
+* @{
+*/
+
+#define DMA_MemoryInc_Enable               ((uint32_t)0x00000080)
+#define DMA_MemoryInc_Disable              ((uint32_t)0x00000000)
+#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \
+((STATE) == DMA_MemoryInc_Disable))
+/**
+* @}
+*/
+
+/** @defgroup DMA_peripheral_data_size 
+* @{
+*/
+
+#define DMA_PeripheralDataSize_Byte        ((uint32_t)0x00000000)
+#define DMA_PeripheralDataSize_HalfWord    ((uint32_t)0x00000100)
+#define DMA_PeripheralDataSize_Word        ((uint32_t)0x00000200)
+#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \
+((SIZE) == DMA_PeripheralDataSize_HalfWord) || \
+    ((SIZE) == DMA_PeripheralDataSize_Word))
+/**
+* @}
+*/
+
+/** @defgroup DMA_memory_data_size 
+* @{
+*/
+
+#define DMA_MemoryDataSize_Byte            ((uint32_t)0x00000000)
+#define DMA_MemoryDataSize_HalfWord        ((uint32_t)0x00000400)
+#define DMA_MemoryDataSize_Word            ((uint32_t)0x00000800)
+#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \
+((SIZE) == DMA_MemoryDataSize_HalfWord) || \
+    ((SIZE) == DMA_MemoryDataSize_Word))
+/**
+* @}
+*/
+
+/** @defgroup DMA_circular_normal_mode 
+* @{
+*/
+
+#define DMA_Mode_Circular                  ((uint32_t)0x00000020)
+#define DMA_Mode_Normal                    ((uint32_t)0x00000000)
+#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))
+/**
+* @}
+*/
+
+/** @defgroup DMA_priority_level 
+* @{
+*/
+
+#define DMA_Priority_VeryHigh              ((uint32_t)0x00003000)
+#define DMA_Priority_High                  ((uint32_t)0x00002000)
+#define DMA_Priority_Medium                ((uint32_t)0x00001000)
+#define DMA_Priority_Low                   ((uint32_t)0x00000000)
+#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \
+((PRIORITY) == DMA_Priority_High) || \
+    ((PRIORITY) == DMA_Priority_Medium) || \
+        ((PRIORITY) == DMA_Priority_Low))
+/**
+* @}
+*/
+
+/** @defgroup DMA_memory_to_memory 
+* @{
+*/
+
+#define DMA_M2M_Enable                     ((uint32_t)0x00004000)
+#define DMA_M2M_Disable                    ((uint32_t)0x00000000)
+#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))
+
+/**
+* @}
+*/
+
+/** @defgroup DMA_interrupts_definition 
+* @{
+*/
+
+#define DMA_IT_TC                          ((uint32_t)0x00000002)
+#define DMA_IT_HT                          ((uint32_t)0x00000004)
+#define DMA_IT_TE                          ((uint32_t)0x00000008)
+#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))
+
+/** 
+* @brief  For DMA1
+*/
+
+#define DMA1_IT_GL1                        ((uint32_t)0x00000001)
+#define DMA1_IT_TC1                        ((uint32_t)0x00000002)
+#define DMA1_IT_HT1                        ((uint32_t)0x00000004)
+#define DMA1_IT_TE1                        ((uint32_t)0x00000008)
+#define DMA1_IT_GL2                        ((uint32_t)0x00000010)
+#define DMA1_IT_TC2                        ((uint32_t)0x00000020)
+#define DMA1_IT_HT2                        ((uint32_t)0x00000040)
+#define DMA1_IT_TE2                        ((uint32_t)0x00000080)
+#define DMA1_IT_GL3                        ((uint32_t)0x00000100)
+#define DMA1_IT_TC3                        ((uint32_t)0x00000200)
+#define DMA1_IT_HT3                        ((uint32_t)0x00000400)
+#define DMA1_IT_TE3                        ((uint32_t)0x00000800)
+#define DMA1_IT_GL4                        ((uint32_t)0x00001000)
+#define DMA1_IT_TC4                        ((uint32_t)0x00002000)
+#define DMA1_IT_HT4                        ((uint32_t)0x00004000)
+#define DMA1_IT_TE4                        ((uint32_t)0x00008000)
+#define DMA1_IT_GL5                        ((uint32_t)0x00010000)
+#define DMA1_IT_TC5                        ((uint32_t)0x00020000)
+#define DMA1_IT_HT5                        ((uint32_t)0x00040000)
+#define DMA1_IT_TE5                        ((uint32_t)0x00080000)
+
+
+#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00))
+
+#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \
+((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \
+    ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \
+        ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \
+            ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \
+                ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \
+                    ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \
+                        ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \
+                            ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \
+                                ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5))
+
+
+/**
+* @}
+*/
+
+/** @defgroup DMA_flags_definition 
+* @{
+*/
+
+/** 
+* @brief  For DMA1
+*/
+
+#define DMA1_FLAG_GL1                      ((uint32_t)0x00000001)
+#define DMA1_FLAG_TC1                      ((uint32_t)0x00000002)
+#define DMA1_FLAG_HT1                      ((uint32_t)0x00000004)
+#define DMA1_FLAG_TE1                      ((uint32_t)0x00000008)
+#define DMA1_FLAG_GL2                      ((uint32_t)0x00000010)
+#define DMA1_FLAG_TC2                      ((uint32_t)0x00000020)
+#define DMA1_FLAG_HT2                      ((uint32_t)0x00000040)
+#define DMA1_FLAG_TE2                      ((uint32_t)0x00000080)
+#define DMA1_FLAG_GL3                      ((uint32_t)0x00000100)
+#define DMA1_FLAG_TC3                      ((uint32_t)0x00000200)
+#define DMA1_FLAG_HT3                      ((uint32_t)0x00000400)
+#define DMA1_FLAG_TE3                      ((uint32_t)0x00000800)
+#define DMA1_FLAG_GL4                      ((uint32_t)0x00001000)
+#define DMA1_FLAG_TC4                      ((uint32_t)0x00002000)
+#define DMA1_FLAG_HT4                      ((uint32_t)0x00004000)
+#define DMA1_FLAG_TE4                      ((uint32_t)0x00008000)
+#define DMA1_FLAG_GL5                      ((uint32_t)0x00010000)
+#define DMA1_FLAG_TC5                      ((uint32_t)0x00020000)
+#define DMA1_FLAG_HT5                      ((uint32_t)0x00040000)
+#define DMA1_FLAG_TE5                      ((uint32_t)0x00080000)
+
+
+
+
+#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00))
+
+#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \
+((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \
+    ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \
+        ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \
+            ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \
+                ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \
+                    ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \
+                        ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \
+                            ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \
+                                ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5))
+
+
+/**
+* @}
+*/
+
+/** @defgroup DMA_Buffer_Size 
+* @{
+*/
+
+#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup DMA_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup DMA_Exported_Functions
+* @{
+*/
+
+void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx);
+void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct);
+void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);
+void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState);
+void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
+uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx);
+FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG);
+void DMA_ClearFlag(uint32_t DMA_FLAG);
+ITStatus DMA_GetITStatus(uint32_t DMA_IT);
+void DMA_ClearITPendingBit(uint32_t DMA_IT);
+
+#endif /*__HAL_DMA_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*------------------ (C) COPYRIGHT 2017 MindMotion ------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_exti.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_exti.h
@@ -0,0 +1,168 @@
+/**
+******************************************************************************
+* @file  HAL_exti.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the EXTI 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_EXTI_H
+#define __HAL_EXTI_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup EXTI
+* @{
+*/
+
+/** @defgroup EXTI_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  EXTI mode enumeration  
+*/
+
+typedef enum
+{
+    EXTI_Mode_Interrupt = 0x00,
+    EXTI_Mode_Event = 0x04
+}EXTIMode_TypeDef;
+
+#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
+
+/** 
+* @brief  EXTI Trigger enumeration  
+*/
+
+typedef enum
+{
+    EXTI_Trigger_Rising = 0x08,
+    EXTI_Trigger_Falling = 0x0C,  
+    EXTI_Trigger_Rising_Falling = 0x10
+}EXTITrigger_TypeDef;
+
+#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
+((TRIGGER) == EXTI_Trigger_Falling) || \
+    ((TRIGGER) == EXTI_Trigger_Rising_Falling))
+/** 
+* @brief  EXTI Init Structure definition  
+*/
+
+typedef struct
+{
+    uint32_t EXTI_Line;
+    EXTIMode_TypeDef EXTI_Mode;
+    EXTITrigger_TypeDef EXTI_Trigger;
+    FunctionalState EXTI_LineCmd;
+}EXTI_InitTypeDef;
+
+/**
+* @}
+*/
+
+/** @defgroup EXTI_Exported_Constants
+* @{
+*/
+
+/** @defgroup EXTI_Lines 
+* @{
+*/
+
+#define EXTI_Line0       ((uint32_t)0x00001)  /* External interrupt line 0 */
+#define EXTI_Line1       ((uint32_t)0x00002)  /* External interrupt line 1 */
+#define EXTI_Line2       ((uint32_t)0x00004)  /* External interrupt line 2 */
+#define EXTI_Line3       ((uint32_t)0x00008)  /* External interrupt line 3 */
+#define EXTI_Line4       ((uint32_t)0x00010)  /* External interrupt line 4 */
+#define EXTI_Line5       ((uint32_t)0x00020)  /* External interrupt line 5 */
+#define EXTI_Line6       ((uint32_t)0x00040)  /* External interrupt line 6 */
+#define EXTI_Line7       ((uint32_t)0x00080)  /* External interrupt line 7 */
+#define EXTI_Line8       ((uint32_t)0x00100)  /* External interrupt line 8 */
+#define EXTI_Line9       ((uint32_t)0x00200)  /* External interrupt line 9 */
+#define EXTI_Line10      ((uint32_t)0x00400)  /* External interrupt line 10 */
+#define EXTI_Line11      ((uint32_t)0x00800)  /* External interrupt line 11 */
+#define EXTI_Line12      ((uint32_t)0x01000)  /* External interrupt line 12 */
+#define EXTI_Line13      ((uint32_t)0x02000)  /* External interrupt line 13 */
+#define EXTI_Line14      ((uint32_t)0x04000)  /* External interrupt line 14 */
+#define EXTI_Line15      ((uint32_t)0x08000)  /* External interrupt line 15 */
+#define EXTI_Line16      ((uint32_t)0x10000)  /* External interrupt line 16 Connected to the PVD Output */
+//#define EXTI_Line17      ((uint32_t)0x20000)  /* External interrupt line 17 Connected to the RTC Alarm event */
+#define EXTI_Line18      ((uint32_t)0x40000)  /* External interrupt line 18 Connected to the USB Wakeup from suspend event */
+#define EXTI_Line19      ((uint32_t)0x80000)  /* External interrupt line 19 Connected to the COMP1 event */
+#define EXTI_Line20      ((uint32_t)0x100000)  /* External interrupt line 20 Connected to the COMP2 event */
+
+#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF80000) == 0x00) && ((LINE) != (uint16_t)0x00))
+
+#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
+((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
+	((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
+		((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
+			((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
+				((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
+					((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
+						((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
+							((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line18)) || \
+                             ((LINE) == EXTI_Line19) || ((LINE) == EXTI_Line20))
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup EXTI_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup EXTI_Exported_Functions
+* @{
+*/
+
+void EXTI_DeInit(void);
+void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
+void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
+void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
+FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
+void EXTI_ClearFlag(uint32_t EXTI_Line);
+ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
+void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
+
+#endif /* __HAL_EXTI_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_flash.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_flash.h
@@ -0,0 +1,307 @@
+/**
+******************************************************************************
+* @file  HAL_flash.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the FLASH 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_FLASH_H
+#define __HAL_FLASH_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup FLASH
+* @{
+*/
+
+/** @defgroup FLASH_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  FLASH Status  
+*/
+
+typedef enum
+{ 
+    FLASH_BUSY = 1,
+    FLASH_ERROR_PG,
+    FLASH_ERROR_WRP,
+    FLASH_COMPLETE,
+    FLASH_TIMEOUT
+}FLASH_Status;
+
+/**
+* @}
+*/
+
+/** @defgroup FLASH_Exported_Constants
+* @{
+*/
+
+/** @defgroup Flash_Latency 
+* @{
+*/
+
+#define FLASH_Latency_0                ((uint32_t)0x00000000)  /* FLASH Zero Latency cycle */
+#define FLASH_Latency_1                ((uint32_t)0x00000001)  /* FLASH One Latency cycle */
+#define FLASH_Latency_2                ((uint32_t)0x00000002)  /* FLASH Two Latency cycles */
+#define FLASH_Latency_3                ((uint32_t)0x00000003)  /* FLASH Three Latency cycles */
+#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
+((LATENCY) == FLASH_Latency_1) || \
+    ((LATENCY) == FLASH_Latency_2) || \
+        ((LATENCY) == FLASH_Latency_3))
+/**
+* @}
+*/
+
+/** @defgroup Half_Cycle_Enable_Disable 
+* @{
+*/
+
+#define FLASH_HalfCycleAccess_Enable   ((uint32_t)0x00000008)  /* FLASH Half Cycle Enable */
+#define FLASH_HalfCycleAccess_Disable  ((uint32_t)0x00000000)  /* FLASH Half Cycle Disable */
+#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \
+((STATE) == FLASH_HalfCycleAccess_Disable)) 
+/**
+* @}
+*/
+
+/** @defgroup Prefetch_Buffer_Enable_Disable 
+* @{
+*/
+
+#define FLASH_PrefetchBuffer_Enable    ((uint32_t)0x00000010)  /* FLASH Prefetch Buffer Enable */
+#define FLASH_PrefetchBuffer_Disable   ((uint32_t)0x00000000)  /* FLASH Prefetch Buffer Disable */
+#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \
+((STATE) == FLASH_PrefetchBuffer_Disable)) 
+/**
+* @}
+*/
+
+/** @defgroup Option_Bytes_Write_Protection 
+* @{
+*/
+
+/* Values to be used with microcontroller Medium-density devices: FLASH memory density
+ranges between 32 and 128 Kbytes with page size equal to 1 Kbytes */
+#define FLASH_WRProt_Pages0to3         ((uint32_t)0x00000001) /* Write protection of page 0 to 3 */
+#define FLASH_WRProt_Pages4to7         ((uint32_t)0x00000002) /* Write protection of page 4 to 7 */
+#define FLASH_WRProt_Pages8to11        ((uint32_t)0x00000004) /* Write protection of page 8 to 11 */
+#define FLASH_WRProt_Pages12to15       ((uint32_t)0x00000008) /* Write protection of page 12 to 15 */
+#define FLASH_WRProt_Pages16to19       ((uint32_t)0x00000010) /* Write protection of page 16 to 19 */
+#define FLASH_WRProt_Pages20to23       ((uint32_t)0x00000020) /* Write protection of page 20 to 23 */
+#define FLASH_WRProt_Pages24to27       ((uint32_t)0x00000040) /* Write protection of page 24 to 27 */
+#define FLASH_WRProt_Pages28to31       ((uint32_t)0x00000080) /* Write protection of page 28 to 31 */
+#define FLASH_WRProt_Pages32to35       ((uint32_t)0x00000100) /* Write protection of page 32 to 35 */
+#define FLASH_WRProt_Pages36to39       ((uint32_t)0x00000200) /* Write protection of page 36 to 39 */
+#define FLASH_WRProt_Pages40to43       ((uint32_t)0x00000400) /* Write protection of page 40 to 43 */
+#define FLASH_WRProt_Pages44to47       ((uint32_t)0x00000800) /* Write protection of page 44 to 47 */
+#define FLASH_WRProt_Pages48to51       ((uint32_t)0x00001000) /* Write protection of page 48 to 51 */
+#define FLASH_WRProt_Pages52to55       ((uint32_t)0x00002000) /* Write protection of page 52 to 55 */
+#define FLASH_WRProt_Pages56to59       ((uint32_t)0x00004000) /* Write protection of page 56 to 59 */
+#define FLASH_WRProt_Pages60to63       ((uint32_t)0x00008000) /* Write protection of page 60 to 63 */
+#define FLASH_WRProt_Pages64to67       ((uint32_t)0x00010000) /* Write protection of page 64 to 67 */
+#define FLASH_WRProt_Pages68to71       ((uint32_t)0x00020000) /* Write protection of page 68 to 71 */
+#define FLASH_WRProt_Pages72to75       ((uint32_t)0x00040000) /* Write protection of page 72 to 75 */
+#define FLASH_WRProt_Pages76to79       ((uint32_t)0x00080000) /* Write protection of page 76 to 79 */
+#define FLASH_WRProt_Pages80to83       ((uint32_t)0x00100000) /* Write protection of page 80 to 83 */
+#define FLASH_WRProt_Pages84to87       ((uint32_t)0x00200000) /* Write protection of page 84 to 87 */
+#define FLASH_WRProt_Pages88to91       ((uint32_t)0x00400000) /* Write protection of page 88 to 91 */
+#define FLASH_WRProt_Pages92to95       ((uint32_t)0x00800000) /* Write protection of page 92 to 95 */
+#define FLASH_WRProt_Pages96to99       ((uint32_t)0x01000000) /* Write protection of page 96 to 99 */
+#define FLASH_WRProt_Pages100to103     ((uint32_t)0x02000000) /* Write protection of page 100 to 103 */
+#define FLASH_WRProt_Pages104to107     ((uint32_t)0x04000000) /* Write protection of page 104 to 107 */
+#define FLASH_WRProt_Pages108to111     ((uint32_t)0x08000000) /* Write protection of page 108 to 111 */
+#define FLASH_WRProt_Pages112to115     ((uint32_t)0x10000000) /* Write protection of page 112 to 115 */
+#define FLASH_WRProt_Pages116to119     ((uint32_t)0x20000000) /* Write protection of page 115 to 119 */
+#define FLASH_WRProt_Pages120to123     ((uint32_t)0x40000000) /* Write protection of page 120 to 123 */
+#define FLASH_WRProt_Pages124to127     ((uint32_t)0x80000000) /* Write protection of page 124 to 127 */
+
+/* Values to be used with microcontroller High-density devices: FLASH memory density
+ranges between 256 and 512 Kbytes with page size equal to 2 Kbytes */
+#define FLASH_WRProt_Pages0to1         ((uint32_t)0x00000001) /* Write protection of page 0 to 1 */
+#define FLASH_WRProt_Pages2to3         ((uint32_t)0x00000002) /* Write protection of page 2 to 3 */
+#define FLASH_WRProt_Pages4to5         ((uint32_t)0x00000004) /* Write protection of page 4 to 5 */
+#define FLASH_WRProt_Pages6to7         ((uint32_t)0x00000008) /* Write protection of page 6 to 7 */
+#define FLASH_WRProt_Pages8to9         ((uint32_t)0x00000010) /* Write protection of page 8 to 9 */
+#define FLASH_WRProt_Pages10to11       ((uint32_t)0x00000020) /* Write protection of page 10 to 11 */
+#define FLASH_WRProt_Pages12to13       ((uint32_t)0x00000040) /* Write protection of page 12 to 13 */
+#define FLASH_WRProt_Pages14to15       ((uint32_t)0x00000080) /* Write protection of page 14 to 15 */
+#define FLASH_WRProt_Pages16to17       ((uint32_t)0x00000100) /* Write protection of page 16 to 17 */
+#define FLASH_WRProt_Pages18to19       ((uint32_t)0x00000200) /* Write protection of page 18 to 19 */
+#define FLASH_WRProt_Pages20to21       ((uint32_t)0x00000400) /* Write protection of page 20 to 21 */
+#define FLASH_WRProt_Pages22to23       ((uint32_t)0x00000800) /* Write protection of page 22 to 23 */
+#define FLASH_WRProt_Pages24to25       ((uint32_t)0x00001000) /* Write protection of page 24 to 25 */
+#define FLASH_WRProt_Pages26to27       ((uint32_t)0x00002000) /* Write protection of page 26 to 27 */
+#define FLASH_WRProt_Pages28to29       ((uint32_t)0x00004000) /* Write protection of page 28 to 29 */
+#define FLASH_WRProt_Pages30to31       ((uint32_t)0x00008000) /* Write protection of page 30 to 31 */
+#define FLASH_WRProt_Pages32to33       ((uint32_t)0x00010000) /* Write protection of page 32 to 33 */
+#define FLASH_WRProt_Pages34to35       ((uint32_t)0x00020000) /* Write protection of page 34 to 35 */
+#define FLASH_WRProt_Pages36to37       ((uint32_t)0x00040000) /* Write protection of page 36 to 37 */
+#define FLASH_WRProt_Pages38to39       ((uint32_t)0x00080000) /* Write protection of page 38 to 39 */
+#define FLASH_WRProt_Pages40to41       ((uint32_t)0x00100000) /* Write protection of page 40 to 41 */
+#define FLASH_WRProt_Pages42to43       ((uint32_t)0x00200000) /* Write protection of page 42 to 43 */
+#define FLASH_WRProt_Pages44to45       ((uint32_t)0x00400000) /* Write protection of page 44 to 45 */
+#define FLASH_WRProt_Pages46to47       ((uint32_t)0x00800000) /* Write protection of page 46 to 47 */
+#define FLASH_WRProt_Pages48to49       ((uint32_t)0x01000000) /* Write protection of page 48 to 49 */
+#define FLASH_WRProt_Pages50to51       ((uint32_t)0x02000000) /* Write protection of page 50 to 51 */
+#define FLASH_WRProt_Pages52to53       ((uint32_t)0x04000000) /* Write protection of page 52 to 53 */
+#define FLASH_WRProt_Pages54to55       ((uint32_t)0x08000000) /* Write protection of page 54 to 55 */
+#define FLASH_WRProt_Pages56to57       ((uint32_t)0x10000000) /* Write protection of page 56 to 57 */
+#define FLASH_WRProt_Pages58to59       ((uint32_t)0x20000000) /* Write protection of page 58 to 59 */
+#define FLASH_WRProt_Pages60to61       ((uint32_t)0x40000000) /* Write protection of page 60 to 61 */
+#define FLASH_WRProt_Pages62to255      ((uint32_t)0x80000000) /* Write protection of page 62 to 255 */
+#define FLASH_WRProt_AllPages          ((uint32_t)0xFFFFFFFF) /* Write protection of all Pages */
+
+#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000))
+
+#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF))
+
+#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806))
+
+/**
+* @}
+*/
+
+/** @defgroup Option_Bytes_IWatchdog 
+* @{
+*/
+
+#define OB_IWDG_SW                     ((uint16_t)0x0001)  /* Software IWDG selected */
+#define OB_IWDG_HW                     ((uint16_t)0x0000)  /* Hardware IWDG selected */
+#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
+
+/**
+* @}
+*/
+
+/** @defgroup Option_Bytes_nRST_STOP 
+* @{
+*/
+
+#define OB_STOP_NoRST                  ((uint16_t)0x0002) /* No reset generated when entering in STOP */
+#define OB_STOP_RST                    ((uint16_t)0x0000) /* Reset generated when entering in STOP */
+#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
+
+/**
+* @}
+*/
+
+/** @defgroup Option_Bytes_nRST_STDBY 
+* @{
+*/
+
+#define OB_STDBY_NoRST                 ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */
+#define OB_STDBY_RST                   ((uint16_t)0x0000) /* Reset generated when entering in STANDBY */
+#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
+
+/**
+* @}
+*/
+
+/** @defgroup FLASH_Interrupts 
+* @{
+*/
+
+#define FLASH_IT_ERROR                 ((uint32_t)0x00000400)  /* FPEC error interrupt source */
+#define FLASH_IT_EOP                   ((uint32_t)0x00001000)  /* End of FLASH Operation Interrupt source */
+#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
+
+/**
+* @}
+*/
+
+/** @defgroup FLASH_Flags 
+* @{
+*/
+
+#define FLASH_FLAG_BSY                 ((uint32_t)0x00000001)  /* FLASH Busy flag */
+#define FLASH_FLAG_EOP                 ((uint32_t)0x00000020)  /* FLASH End of Operation flag */
+#define FLASH_FLAG_PGERR               ((uint32_t)0x00000004)  /* FLASH Program error flag */
+#define FLASH_FLAG_WRPRTERR            ((uint32_t)0x00000010)  /* FLASH Write protected error flag */
+#define FLASH_FLAG_OPTERR              ((uint32_t)0x00000001)  /* FLASH Option Byte error flag */
+
+#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000))
+#define IS_FLASH_GET_FLAG(FLAG)  (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
+((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \
+    ((FLAG) == FLASH_FLAG_OPTERR))
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup FLASH_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup FLASH_Exported_Functions
+* @{
+*/
+
+void FLASH_SetLatency(uint32_t FLASH_Latency);
+void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess);
+void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer);
+void FLASH_Unlock(void);
+void FLASH_Lock(void);
+FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
+FLASH_Status FLASH_EraseAllPages(void);
+FLASH_Status FLASH_EraseOptionBytes(void);
+FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
+FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
+FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
+FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages);
+FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState);
+FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY);
+uint32_t FLASH_GetUserOptionByte(void);
+uint32_t FLASH_GetWriteProtectionOptionByte(void);
+FlagStatus FLASH_GetReadOutProtectionStatus(void);
+FlagStatus FLASH_GetPrefetchBufferStatus(void);
+void FLASH_ITConfig(uint16_t FLASH_IT, FunctionalState NewState);
+FlagStatus FLASH_GetFlagStatus(uint16_t FLASH_FLAG);
+void FLASH_ClearFlag(uint16_t FLASH_FLAG);
+FLASH_Status FLASH_GetStatus(void);
+FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
+
+#endif /* __HAL_FLASH_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_gpio.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_gpio.h
@@ -0,0 +1,368 @@
+/**
+******************************************************************************
+* @file  HAL_gpio.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the GPIO 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_GPIO_H
+#define __HAL_GPIO_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup GPIO
+* @{
+*/
+
+/** @defgroup GPIO_Exported_Types
+* @{
+*/
+
+#define IS_GPIO_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == GPIOA_BASE) || \
+((*(uint32_t*)&(PERIPH)) == GPIOB_BASE) || \
+    ((*(uint32_t*)&(PERIPH)) == GPIOC_BASE) || \
+        ((*(uint32_t*)&(PERIPH)) == GPIOD_BASE) || \
+            ((*(uint32_t*)&(PERIPH)) == GPIOE_BASE) || \
+                ((*(uint32_t*)&(PERIPH)) == GPIOF_BASE) || \
+                    ((*(uint32_t*)&(PERIPH)) == GPIOG_BASE))
+
+/** 
+* @brief  Output Maximum frequency selection  
+*/
+
+typedef enum
+{ 
+    GPIO_Speed_10MHz = 1,
+    GPIO_Speed_2MHz, 
+    GPIO_Speed_50MHz
+}GPIOSpeed_TypeDef;
+#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
+((SPEED) == GPIO_Speed_50MHz))
+
+/** 
+* @brief  Configuration Mode enumeration  
+*/
+
+typedef enum
+{ GPIO_Mode_AIN = 0x0,  //模拟输入
+GPIO_Mode_IN_FLOATING = 0x04, //浮空输入
+GPIO_Mode_IPD = 0x28,  //下拉输入
+GPIO_Mode_IPU = 0x48,  //上拉输入
+GPIO_Mode_Out_OD = 0x14,//通用开漏输出
+GPIO_Mode_Out_PP = 0x10,//通用推免输出
+GPIO_Mode_AF_OD = 0x1C, // 复用开漏输出
+GPIO_Mode_AF_PP = 0x18  //复用推免输出
+}GPIOMode_TypeDef;
+
+#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
+((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
+    ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
+        ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
+
+/** 
+* @brief  GPIO Init structure definition  
+*/
+
+typedef struct
+{
+    uint16_t GPIO_Pin;
+    GPIOSpeed_TypeDef GPIO_Speed;
+    GPIOMode_TypeDef GPIO_Mode;
+}GPIO_InitTypeDef;
+
+/** 
+* @brief  Bit_SET and Bit_RESET enumeration  
+*/
+
+typedef enum
+{ Bit_RESET = 0,
+Bit_SET
+}BitAction;
+
+#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
+
+/**
+* @}
+*/
+
+/** @defgroup GPIO_Exported_Constants
+* @{
+*/
+
+/** @defgroup GPIO_pins_define 
+* @{
+*/
+
+#define GPIO_Pin_0                 ((uint16_t)0x0001)  /* Pin 0 selected */
+#define GPIO_Pin_1                 ((uint16_t)0x0002)  /* Pin 1 selected */
+#define GPIO_Pin_2                 ((uint16_t)0x0004)  /* Pin 2 selected */
+#define GPIO_Pin_3                 ((uint16_t)0x0008)  /* Pin 3 selected */
+#define GPIO_Pin_4                 ((uint16_t)0x0010)  /* Pin 4 selected */
+#define GPIO_Pin_5                 ((uint16_t)0x0020)  /* Pin 5 selected */
+#define GPIO_Pin_6                 ((uint16_t)0x0040)  /* Pin 6 selected */
+#define GPIO_Pin_7                 ((uint16_t)0x0080)  /* Pin 7 selected */
+#define GPIO_Pin_8                 ((uint16_t)0x0100)  /* Pin 8 selected */
+#define GPIO_Pin_9                 ((uint16_t)0x0200)  /* Pin 9 selected */
+#define GPIO_Pin_10                ((uint16_t)0x0400)  /* Pin 10 selected */
+#define GPIO_Pin_11                ((uint16_t)0x0800)  /* Pin 11 selected */
+#define GPIO_Pin_12                ((uint16_t)0x1000)  /* Pin 12 selected */
+#define GPIO_Pin_13                ((uint16_t)0x2000)  /* Pin 13 selected */
+#define GPIO_Pin_14                ((uint16_t)0x4000)  /* Pin 14 selected */
+#define GPIO_Pin_15                ((uint16_t)0x8000)  /* Pin 15 selected */
+#define GPIO_Pin_All               ((uint16_t)0xFFFF)  /* All pins selected */
+
+#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
+
+#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
+((PIN) == GPIO_Pin_1) || \
+    ((PIN) == GPIO_Pin_2) || \
+        ((PIN) == GPIO_Pin_3) || \
+            ((PIN) == GPIO_Pin_4) || \
+                ((PIN) == GPIO_Pin_5) || \
+                    ((PIN) == GPIO_Pin_6) || \
+                        ((PIN) == GPIO_Pin_7) || \
+                            ((PIN) == GPIO_Pin_8) || \
+                                ((PIN) == GPIO_Pin_9) || \
+                                    ((PIN) == GPIO_Pin_10) || \
+                                        ((PIN) == GPIO_Pin_11) || \
+                                            ((PIN) == GPIO_Pin_12) || \
+                                                ((PIN) == GPIO_Pin_13) || \
+                                                    ((PIN) == GPIO_Pin_14) || \
+                                                        ((PIN) == GPIO_Pin_15))
+
+/**
+* @}
+*/
+
+/** @defgroup GPIO_Remap_define 
+* @{
+*/
+
+#define GPIO_Remap_SPI1            ((uint32_t)0x00000001)  /* SPI1 Alternate Function mapping */
+#define GPIO_Remap_I2C1            ((uint32_t)0x00000002)  /* I2C1 Alternate Function mapping */
+#define GPIO_Remap_UART1          ((uint32_t)0x00000004)  /* UART1 Alternate Function mapping */
+
+
+#define GPIO_PartialRemap_TIM1     ((uint32_t)0x00160040)  /* TIM1 Partial Alternate Function mapping */
+#define GPIO_FullRemap_TIM1        ((uint32_t)0x001600C0)  /* TIM1 Full Alternate Function mapping */
+#define GPIO_PartialRemap1_TIM2    ((uint32_t)0x00180100)  /* TIM2 Partial1 Alternate Function mapping */
+#define GPIO_PartialRemap2_TIM2    ((uint32_t)0x00180200)  /* TIM2 Partial2 Alternate Function mapping */
+#define GPIO_FullRemap_TIM2        ((uint32_t)0x00180300)  /* TIM2 Full Alternate Function mapping */
+#define GPIO_PartialRemap_TIM3     ((uint32_t)0x001A0800)  /* TIM3 Partial Alternate Function mapping */
+#define GPIO_FullRemap_TIM3        ((uint32_t)0x001A0C00)  /* TIM3 Full Alternate Function mapping */
+
+
+#define GPIO_Remap_PD01            ((uint32_t)0x00008000)  /* PD01 Alternate Function mapping */
+
+#define GPIO_Remap_ADC1_ETRGINJ    ((uint32_t)0x00200002)  /* ADC1 External Trigger Injected Conversion remapping */
+#define GPIO_Remap_ADC1_ETRGREG    ((uint32_t)0x00200004)  /* ADC1 External Trigger Regular Conversion remapping */
+
+#define GPIO_Remap_SWJ_NoJTRST     ((uint32_t)0x00300100)  /* Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
+#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200)  /* JTAG-DP Disabled and SW-DP Enabled */
+#define GPIO_Remap_SWJ_Disable     ((uint32_t)0x00300400)  /* Full SWJ Disabled (JTAG-DP + SW-DP) */
+
+#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
+((REMAP) == GPIO_Remap_UART1) || ((REMAP) == GPIO_PartialRemap_TIM1) || \
+    ((REMAP) == GPIO_FullRemap_TIM1) ||  ((REMAP) == GPIO_PartialRemap1_TIM2) ||\
+        ((REMAP) == GPIO_PartialRemap2_TIM2) || ((REMAP) == GPIO_FullRemap_TIM2) || \
+            ((REMAP) == GPIO_PartialRemap_TIM3) || ((REMAP) == GPIO_FullRemap_TIM3) ||\
+                ((REMAP) == GPIO_Remap_TIM4) || ((REMAP) == GPIO_Remap_PD01) || \
+                    ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
+                        ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable)|| \
+                            ((REMAP) == GPIO_Remap_SWJ_Disable))
+
+/**
+* @}
+*/ 
+
+/** @defgroup GPIO_Port_Sources 
+* @{
+*/
+
+#define GPIO_PortSourceGPIOA       ((uint8_t)0x00)
+#define GPIO_PortSourceGPIOB       ((uint8_t)0x01)
+#define GPIO_PortSourceGPIOC       ((uint8_t)0x02)
+#define GPIO_PortSourceGPIOD       ((uint8_t)0x03)
+#define GPIO_PortSourceGPIOE       ((uint8_t)0x04)
+#define GPIO_PortSourceGPIOF       ((uint8_t)0x05)
+#define GPIO_PortSourceGPIOG       ((uint8_t)0x06)
+#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
+((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
+    ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
+        ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
+            ((PORTSOURCE) == GPIO_PortSourceGPIOE))
+
+#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
+((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
+    ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
+        ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
+            ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
+                ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
+                    ((PORTSOURCE) == GPIO_PortSourceGPIOG))
+
+/**
+* @}
+*/
+
+/** @defgroup GPIO_Pin_sources 
+* @{
+*/
+
+#define GPIO_PinSource0            ((uint8_t)0x00)
+#define GPIO_PinSource1            ((uint8_t)0x01)
+#define GPIO_PinSource2            ((uint8_t)0x02)
+#define GPIO_PinSource3            ((uint8_t)0x03)
+#define GPIO_PinSource4            ((uint8_t)0x04)
+#define GPIO_PinSource5            ((uint8_t)0x05)
+#define GPIO_PinSource6            ((uint8_t)0x06)
+#define GPIO_PinSource7            ((uint8_t)0x07)
+#define GPIO_PinSource8            ((uint8_t)0x08)
+#define GPIO_PinSource9            ((uint8_t)0x09)
+#define GPIO_PinSource10           ((uint8_t)0x0A)
+#define GPIO_PinSource11           ((uint8_t)0x0B)
+#define GPIO_PinSource12           ((uint8_t)0x0C)
+#define GPIO_PinSource13           ((uint8_t)0x0D)
+#define GPIO_PinSource14           ((uint8_t)0x0E)
+#define GPIO_PinSource15           ((uint8_t)0x0F)
+
+#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
+((PINSOURCE) == GPIO_PinSource1) || \
+    ((PINSOURCE) == GPIO_PinSource2) || \
+        ((PINSOURCE) == GPIO_PinSource3) || \
+            ((PINSOURCE) == GPIO_PinSource4) || \
+                ((PINSOURCE) == GPIO_PinSource5) || \
+                    ((PINSOURCE) == GPIO_PinSource6) || \
+                        ((PINSOURCE) == GPIO_PinSource7) || \
+                            ((PINSOURCE) == GPIO_PinSource8) || \
+                                ((PINSOURCE) == GPIO_PinSource9) || \
+                                    ((PINSOURCE) == GPIO_PinSource10) || \
+                                        ((PINSOURCE) == GPIO_PinSource11) || \
+                                            ((PINSOURCE) == GPIO_PinSource12) || \
+                                                ((PINSOURCE) == GPIO_PinSource13) || \
+                                                    ((PINSOURCE) == GPIO_PinSource14) || \
+                                                        ((PINSOURCE) == GPIO_PinSource15))
+
+/**
+* @}
+*/
+/**
+* @}
+*/
+
+/** @defgroup GPIO_Alternate_function_selection_define 
+* @{
+*/
+
+/** 
+* @brief  AF 0 selection
+*/
+#define GPIO_AF_0            ((uint8_t)0x00) /* SPI1, MC0, TIM17_BKIN, SWDIO,SWCLK,
+UART1*/
+/** 
+* @brief  AF 1 selection
+*/
+#define GPIO_AF_1            ((uint8_t)0x01) /* UART1, TIM3_CH1, TIM3_CH2, TIM3_CH3,
+TIM3_CH4, I2C1*/
+/** 
+* @brief  AF 2 selection
+*/
+#define GPIO_AF_2            ((uint8_t)0x02) /* TIM2_CH1_ETR, TIM2_CH2, TIM2_CH3, 
+TIM2_CH3, TIM2_CH4, TIM1_BKIN,
+TIM1_CH1N, TIM1_CH1, TIM1_CH2,
+TIM1_CH3, TIM1_CH4, TIM1_ETR,
+TIM1_CH2N, TIM1_CH3N, TIM2_CH2,
+TIM1 6_BKIN, TIM16_CH1N, TIM17_CH1N,
+TIM1 6_CH1, TIM17_CH1 */
+/** 
+* @brief  AF 3 selection
+*/
+#define GPIO_AF_3            ((uint8_t)0x03) /*  */
+
+/** 
+* @brief  AF 4 selection
+*/
+#define GPIO_AF_4            ((uint8_t)0x04) /* TIM14_CH1, I2C1*/
+
+/** 
+* @brief  AF 5 selection
+*/
+#define GPIO_AF_5            ((uint8_t)0x05) /*  */
+
+/** 
+* @brief  AF 6 selection
+*/
+#define GPIO_AF_6            ((uint8_t)0x06) /*  */
+/** 
+* @brief  AF 7 selection
+*/
+#define GPIO_AF_7            ((uint8_t)0x07) /*  */
+
+#define IS_GPIO_AF(AF)   (((AF) == GPIO_AF_0) || ((AF) == GPIO_AF_1) || \
+((AF) == GPIO_AF_2) || ((AF) == GPIO_AF_3) || \
+    ((AF) == GPIO_AF_4) || ((AF) == GPIO_AF_5) || \
+        ((AF) == GPIO_AF_6) || ((AF) == GPIO_AF_7))
+
+/**
+* @}
+*/
+
+/** @defgroup GPIO_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup GPIO_Exported_Functions
+* @{
+*/
+
+void GPIO_DeInit(GPIO_TypeDef* GPIOx);
+void GPIO_AFIODeInit(void);
+void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
+void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
+uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
+uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
+uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
+uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
+void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
+void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
+void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
+void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
+void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
+void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF);
+#endif /* __HAL_GPIO_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_i2c.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_i2c.h
@@ -0,0 +1,330 @@
+/**
+******************************************************************************
+* @file  HAL_i2c.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the I2C firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_I2C_H
+#define __HAL_I2C_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup I2C
+* @{
+*/
+
+/** @defgroup I2C_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  I2C Init structure definition  
+*/
+/*
+typedef struct
+{
+uint16_t I2C_Mode;
+uint16_t I2C_DutyCycle;
+uint16_t I2C_OwnAddress1;
+uint16_t I2C_Ack;
+uint16_t I2C_AcknowledgedAddress;
+uint32_t I2C_ClockSpeed;
+}I2C_InitTypeDef;
+*/
+typedef struct
+{
+    uint16_t I2C_Mode;
+    uint16_t I2C_Speed;
+    uint16_t I2C_OwnAddress;
+    uint32_t I2C_ClockSpeed;
+}I2C_InitTypeDef;
+
+/**
+* @}
+*/ 
+
+
+/** @defgroup I2C_Exported_Constants
+* @{
+*/
+
+#define IS_I2C_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == I2C1_BASE) || \
+((*(uint32_t*)&(PERIPH)) == I2C2_BASE))
+/** @defgroup I2C_modes 
+* @{
+*/
+
+#define   TX_EMPTY_CTRL						(0x0001<<8)
+#define		IC_SLAVE_DISABLE				(0x0001<<6)
+#define		IC_SLAVE_ENABLE					(0x0000<<6)
+#define		IC_RESTART_EN						(0x0001<<5)
+#define		IC_7BITADDR_MASTER			(0x0000<<4)
+#define		IC_7BITADDR_SLAVE				(0x0000<<3)
+
+#define 	I2C_Speed_STANDARD      ((uint16_t)0x0002)
+#define 	I2C_Speed_FAST         	((uint16_t)0x0004)
+#define 	I2C_Mode_MASTER					((uint16_t)0x0001)
+#define 	I2C_Mode_SLAVE					((uint16_t)0x0000)
+
+#define 	TDMAE_SET								((uint16_t)0x0002)
+#define 	RDMAE_SET								((uint16_t)0x0001)
+
+#define 	CMD_READ								((uint16_t)0x0100)
+#define 	CMD_WRITE								((uint16_t)0x0000)
+
+
+
+
+#define I2C_Mode_I2C                    ((uint16_t)0x0000)
+
+#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C))
+
+/**
+* @}
+*/
+
+
+/** @defgroup I2C_transfer_direction 
+* @{
+*/
+
+#define  I2C_Direction_Transmitter      ((uint8_t)0x00)
+#define  I2C_Direction_Receiver         ((uint8_t)0x01)
+#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
+((DIRECTION) == I2C_Direction_Receiver))
+/**
+* @}
+*/
+
+/** @defgroup I2C_acknowledged_address_defines 
+* @{
+*/
+
+#define I2C_AcknowledgedAddress_7bit    ((uint16_t)0x4000)
+#define I2C_AcknowledgedAddress_10bit   ((uint16_t)0xC000)
+#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
+((ADDRESS) == I2C_AcknowledgedAddress_10bit))
+
+/**
+* @}
+*/ 
+
+/** @defgroup I2C_interrupts_definition 
+* @{
+*/
+
+
+#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
+/**
+* @}
+*/ 
+
+/** @defgroup I2C_interrupts_definition 
+* @{
+*/
+
+#define I2C_IT_RX_UNDER					((uint16_t)0x0001)
+#define I2C_IT_RX_OVER					((uint16_t)0x0002)
+#define I2C_IT_RX_FULL  				((uint16_t)0x0004)
+#define I2C_IT_TX_OVER					((uint16_t)0x0008)
+#define I2C_IT_TX_EMPTY					((uint16_t)0x0010)
+#define I2C_IT_RD_REQ						((uint16_t)0x0020)
+#define I2C_IT_TX_ABRT					((uint16_t)0x0040)
+#define I2C_IT_RX_DONE					((uint16_t)0x0080)
+#define I2C_IT_ACTIVITY					((uint16_t)0x0100)
+#define I2C_IT_STOP_DET					((uint16_t)0x0200)
+#define I2C_IT_START_DET				((uint16_t)0x0400)
+#define I2C_IT_GEN_CALL				((uint16_t)0x0800)
+
+#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0xF000) == 0x00) && ((IT) != (uint16_t)0x00))
+
+#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_RX_UNDER) || ((IT) == I2C_IT_RX_OVER) || \
+((IT) == I2C_IT_RX_FULL) || ((IT) == I2C_IT_TX_OVER) || \
+    ((IT) == I2C_IT_TX_EMPTY) || ((IT) == I2C_IT_RD_REQ) || \
+        ((IT) == I2C_IT_TX_ABRT) || ((IT) == I2C_IT_RX_DONE) || \
+            ((IT) == I2C_IT_ACTIVITY) || ((IT) == I2C_IT_STOP_DET) || \
+                ((IT) == I2C_IT_START_DET) || ((IT) == I2C_IT_GEN_CALL))
+/**
+* @}
+*/
+
+/** @defgroup I2C_flags_definition 
+* @{
+*/
+
+
+
+#define I2C_FLAG_RX_UNDER					((uint16_t)0x0001)
+#define I2C_FLAG_RX_OVER					((uint16_t)0x0002)
+#define I2C_FLAG_RX_FULL  				((uint16_t)0x0004)
+#define I2C_FLAG_TX_OVER					((uint16_t)0x0008)
+#define I2C_FLAG_TX_EMPTY					((uint16_t)0x0010)
+#define I2C_FLAG_RD_REQ						((uint16_t)0x0020)
+#define I2C_FLAG_TX_ABRT					((uint16_t)0x0040)
+#define I2C_FLAG_RX_DONE					((uint16_t)0x0080)
+#define I2C_FLAG_ACTIVITY					((uint16_t)0x0100)
+#define I2C_FLAG_STOP_DET					((uint16_t)0x0200)
+#define I2C_FLAG_START_DET				((uint16_t)0x0400)
+#define I2C_FLAG_GEN_CALL					((uint16_t)0x0800)
+
+
+
+
+
+
+#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xF000) == 0x00) && ((FLAG) != (uint16_t)0x00))
+
+#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_RX_UNDER) || ((FLAG) == I2C_FLAG_RX_OVER) || \
+((FLAG) == I2C_FLAG_RX_FULL) || ((FLAG) == I2C_FLAG_TX_OVER) || \
+    ((FLAG) == I2C_FLAG_TX_EMPTY) || ((FLAG) == I2C_FLAG_RD_REQ) || \
+        ((FLAG) == I2C_FLAG_TX_ABRT) || ((FLAG) == I2C_FLAG_RX_DONE) || \
+            ((FLAG) == I2C_FLAG_ACTIVITY) || ((FLAG) == I2C_FLAG_STOP_DET) || \
+                ((FLAG) == I2C_FLAG_START_DET) || ((FLAG) == I2C_FLAG_GEN_CALL))
+
+
+/** @defgroup I2C_Statusflags_definition 
+* @{
+*/
+
+#define I2C_STATUS_FLAG_ACTIVITY				((uint16_t)0x8001)
+#define I2C_STATUS_FLAG_TFNF					((uint16_t)0x8002)
+#define I2C_STATUS_FLAG_TFE						((uint16_t)0x8004)
+#define I2C_STATUS_FLAG_RFNE					((uint16_t)0x8008)
+#define I2C_STATUS_FLAG_RFF						((uint16_t)0x8010)
+#define I2C_STATUS_FLAG_M_ACTIVITY				((uint16_t)0x8020)
+#define I2C_STATUS_FLAG_S_ACTIVITY				((uint16_t)0x8040)
+
+
+/**
+* @}
+*/
+
+/** @defgroup I2C_Events 
+* @{
+*/
+
+
+#define I2C_EVENT_RX_UNDER				((uint32_t)0x0001)
+#define I2C_EVENT_RX_OVER				((uint32_t)0x0002)
+#define I2C_EVENT_RX_FULL  				((uint32_t)0x0004)
+#define I2C_EVENT_TX_OVER				((uint32_t)0x0008)
+#define I2C_EVENT_TX_EMPTY				((uint32_t)0x0010)
+#define I2C_EVENT_RD_REQ				((uint32_t)0x0020)
+#define I2C_EVENT_TX_ABRT				((uint32_t)0x0040)
+#define I2C_EVENT_RX_DONE				((uint32_t)0x0080)
+#define I2C_EVENT_ACTIVITY				((uint32_t)0x0100)
+#define I2C_EVENT_STOP_DET				((uint32_t)0x0200)
+#define I2C_EVENT_START_DET				((uint32_t)0x0400)
+#define I2C_EVENT_GEN_CALL				((uint32_t)0x0800)
+
+
+#define IS_I2C_EVENT(EVENT)  (((EVENT) == I2C_EVENT_RX_UNDER) || \
+((EVENT) == I2C_EVENT_RX_OVER) || \
+    ((EVENT) == I2C_EVENT_RX_FULL) || \
+        ((EVENT) == I2C_EVENT_TX_OVER) || \
+            ((EVENT) == I2C_EVENT_RD_REQ) || \
+                ((EVENT) == I2C_EVENT_TX_ABRT) || \
+                    ((EVENT) == I2C_EVENT_RX_DONE) || \
+                        ((EVENT) == (I2C_EVENT_ACTIVITY | I2C_EVENT_STOP_DET)) || \
+                            ((EVENT) == (I2C_EVENT_START_DET | I2C_EVENT_GEN_CALL)))
+
+/**
+* @}
+*/
+
+/** @defgroup I2C_own_address1 
+* @{
+*/
+
+#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
+/**
+* @}
+*/
+
+/** @defgroup I2C_clock_speed 
+* @{
+*/
+
+#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup I2C_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup I2C_Exported_Functions
+* @{
+*/
+
+void I2C_DeInit(I2C_TypeDef* I2Cx);
+void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
+void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
+void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
+void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
+void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
+void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
+void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
+
+void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
+void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
+void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
+void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
+void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
+uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
+void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
+uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
+
+uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
+ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
+FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
+void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
+ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
+void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
+void I2C_ReadCmd(I2C_TypeDef* I2Cx);
+
+
+#endif /*__HAL_I2C_H */
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_iwdg.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_iwdg.h
@@ -0,0 +1,131 @@
+/**
+******************************************************************************
+* @file  HAL_iwdg.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the IWDG 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_IWDG_H
+#define __HAL_IWDG_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup IWDG
+* @{
+*/
+
+/** @defgroup IWDG_Exported_Types
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Exported_Constants
+* @{
+*/
+
+/** @defgroup Write_access_to_IWDG_PR_and_IWDG_RLR_registers 
+* @{
+*/
+
+#define IWDG_WriteAccess_Enable     ((uint16_t)0x5555)
+#define IWDG_WriteAccess_Disable    ((uint16_t)0x0000)
+#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
+((ACCESS) == IWDG_WriteAccess_Disable))
+/**
+* @}
+*/
+
+/** @defgroup IWDG_prescaler 
+* @{
+*/
+
+#define IWDG_Prescaler_4            ((uint8_t)0x00)
+#define IWDG_Prescaler_8            ((uint8_t)0x01)
+#define IWDG_Prescaler_16           ((uint8_t)0x02)
+#define IWDG_Prescaler_32           ((uint8_t)0x03)
+#define IWDG_Prescaler_64           ((uint8_t)0x04)
+#define IWDG_Prescaler_128          ((uint8_t)0x05)
+#define IWDG_Prescaler_256          ((uint8_t)0x06)
+#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4)  || \
+((PRESCALER) == IWDG_Prescaler_8)  || \
+    ((PRESCALER) == IWDG_Prescaler_16) || \
+        ((PRESCALER) == IWDG_Prescaler_32) || \
+            ((PRESCALER) == IWDG_Prescaler_64) || \
+                ((PRESCALER) == IWDG_Prescaler_128)|| \
+                    ((PRESCALER) == IWDG_Prescaler_256))
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Flag 
+* @{
+*/
+
+#define IWDG_FLAG_PVU               ((uint16_t)0x0001)
+#define IWDG_FLAG_RVU               ((uint16_t)0x0002)
+#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
+#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup IWDG_Exported_Functions
+* @{
+*/
+
+void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
+void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
+void IWDG_SetReload(uint16_t Reload);
+void IWDG_ReloadCounter(void);
+void IWDG_Enable(void);
+FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
+
+#endif /* __HAL_IWDG_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_misc.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_misc.h
@@ -0,0 +1,136 @@
+/**
+******************************************************************************
+* @file  HAL_misc.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the 
+*         miscellaneous firmware library functions.
+******************************************************************************
+
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_MISC_H
+#define __HAL_MISC_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup MISC
+* @{
+*/
+
+/** @defgroup MISC_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  NVIC Init Structure definition  
+*/
+
+typedef struct
+{
+  uint8_t NVIC_IRQChannel;             /*!< Specifies the IRQ channel to be enabled or disabled.
+                                            This parameter can be a value of @ref IRQn_Type 
+                                            (For the complete MM32 Devices IRQ Channels list, 
+                                            please refer to HAL_device.h file) */
+
+  uint8_t NVIC_IRQChannelPriority;     /*!< Specifies the priority level for the IRQ channel specified
+                                            in NVIC_IRQChannel. This parameter can be a value
+                                            between 0 and 3.  */
+
+  FunctionalState NVIC_IRQChannelCmd;  /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
+                                            will be enabled or disabled. 
+                                            This parameter can be set either to ENABLE or DISABLE */   
+} NVIC_InitTypeDef;
+
+/**
+* @}
+*/
+
+/** @defgroup MISC_Exported_Constants
+* @{
+*/
+
+/** @defgroup MISC_System_Low_Power 
+  * @{
+  */
+
+#define NVIC_LP_SEVONPEND            ((uint8_t)0x10)
+#define NVIC_LP_SLEEPDEEP            ((uint8_t)0x04)
+#define NVIC_LP_SLEEPONEXIT          ((uint8_t)0x02)
+#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
+((LP) == NVIC_LP_SLEEPDEEP) || \
+  ((LP) == NVIC_LP_SLEEPONEXIT))
+/**
+* @}
+*/
+
+/** @defgroup MISC_Preemption_Priority_Group 
+  * @{
+  */
+#define IS_NVIC_PRIORITY(PRIORITY)  ((PRIORITY) < 0x04)
+
+/**
+* @}
+*/
+
+/** @defgroup SysTick_clock_source 
+* @{
+*/
+
+#define SysTick_CLKSource_HCLK_Div8    ((uint32_t)0xFFFFFFFB)
+#define SysTick_CLKSource_HCLK         ((uint32_t)0x00000004)
+#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
+((SOURCE) == SysTick_CLKSource_HCLK_Div8))
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup MISC_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup MISC_Exported_Functions
+* @{
+*/
+
+void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
+void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
+void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HAL_MISC_H */
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_pwr.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_pwr.h
@@ -0,0 +1,152 @@
+/**
+******************************************************************************
+* @file  HAL_pwr.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the PWR firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_PWR_H
+#define __HAL_PWR_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup PWR
+* @{
+*/ 
+
+/** @defgroup PWR_Exported_Types
+* @{
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup PWR_Exported_Constants
+* @{
+*/ 
+
+/** @defgroup PVD_detection_level 
+* @{
+*/ 
+
+#define PWR_PVDLevel_1V8          ((uint32_t)0x00000000)
+#define PWR_PVDLevel_2V1          ((uint32_t)0x00000200)
+#define PWR_PVDLevel_2V4          ((uint32_t)0x00000400)
+#define PWR_PVDLevel_2V7          ((uint32_t)0x00000600)
+#define PWR_PVDLevel_3V0          ((uint32_t)0x00000800)
+#define PWR_PVDLevel_3V3          ((uint32_t)0x00000A00)
+#define PWR_PVDLevel_3V6          ((uint32_t)0x00000C00)
+#define PWR_PVDLevel_3V9          ((uint32_t)0x00000E00)
+#define PWR_PVDLevel_4V2          ((uint32_t)0x00001000)
+#define PWR_PVDLevel_4V5          ((uint32_t)0x00001200)
+#define PWR_PVDLevel_4V8          ((uint32_t)0x00001400)
+#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_1V8) || ((LEVEL) == PWR_PVDLevel_2V1)|| \
+((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
+    ((LEVEL) == PWR_PVDLevel_3V0) || ((LEVEL) == PWR_PVDLevel_3V3)|| \
+        ((LEVEL) == PWR_PVDLevel_3V6) || ((LEVEL) == PWR_PVDLevel_3V9)|| \
+            ((LEVEL) == PWR_PVDLevel_4V2) || ((LEVEL) == PWR_PVDLevel_4V5)|| \
+                ((LEVEL) == PWR_PVDLevel_4V8))
+/**
+* @}
+*/
+
+/** @defgroup Regulator_state_is_STOP_mode 
+* @{
+*/
+
+#define PWR_Regulator_ON          ((uint32_t)0x00000000)
+#define PWR_Regulator_LowPower    ((uint32_t)0x00000002)
+#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
+((REGULATOR) == PWR_Regulator_LowPower))
+/**
+* @}
+*/
+
+/** @defgroup STOP_mode_entry 
+* @{
+*/
+
+#define PWR_STOPEntry_WFI         ((uint8_t)0x01)
+#define PWR_STOPEntry_WFE         ((uint8_t)0x02)
+#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
+
+/**
+* @}
+*/
+
+/** @defgroup PWR_Flag 
+* @{
+*/
+
+#define PWR_FLAG_WU               ((uint32_t)0x00000001)
+#define PWR_FLAG_SB               ((uint32_t)0x00000002)
+#define PWR_FLAG_PVDO             ((uint32_t)0x00000004)
+#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
+((FLAG) == PWR_FLAG_PVDO))
+
+#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup PWR_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup PWR_Exported_Functions
+* @{
+*/
+
+void PWR_DeInit(void);
+void PWR_BackupAccessCmd(FunctionalState NewState);
+void PWR_PVDCmd(FunctionalState NewState);
+void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
+void PWR_WakeUpPinCmd(FunctionalState NewState);
+void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
+void PWR_EnterSTANDBYMode(void);
+FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
+void PWR_ClearFlag(uint32_t PWR_FLAG);
+
+#endif /* __HAL_PWR_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_rcc.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_rcc.h
@@ -0,0 +1,368 @@
+/**
+******************************************************************************
+* @file  HAL_rcc.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the RCC firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+//SJH&TM change
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_RCC_H
+#define __HAL_RCC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup RCC
+* @{
+*/
+
+/** @defgroup RCC_Exported_Types
+* @{
+*/
+
+typedef struct
+{
+    uint32_t SYSCLK_Frequency;
+    uint32_t HCLK_Frequency;
+    uint32_t PCLK1_Frequency;
+    uint32_t PCLK2_Frequency;
+}RCC_ClocksTypeDef;
+
+/**
+* @}
+*/
+
+/** @defgroup RCC_Exported_Constants
+* @{
+*/
+
+/** @defgroup HSE_configuration 
+* @{
+*/
+
+#define RCC_HSE_OFF                      ((uint32_t)0x00000000)
+#define RCC_HSE_ON                       ((uint32_t)0x00010000)
+#define RCC_HSE_Bypass                   ((uint32_t)0x00040000)
+#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
+((HSE) == RCC_HSE_Bypass))
+
+/**
+* @}
+*/ 
+
+/** @defgroup PLL_entry_clock_source 
+* @{
+*/
+
+#define RCC_PLLSource_HSI_Div4           ((uint32_t)0x00000000)
+#define RCC_PLLSource_HSE_Div1           ((uint32_t)0x00010000)
+#define RCC_PLLSource_HSE_Div2           ((uint32_t)0x00030000)
+#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div4) || \
+((SOURCE) == RCC_PLLSource_HSE_Div1) || \
+    ((SOURCE) == RCC_PLLSource_HSE_Div2))
+/**
+* @}
+*/ 
+
+
+/** @defgroup System_clock_source 
+* @{
+*/
+
+#define RCC_SYSCLKSource_HSI             ((uint32_t)0x00000000)
+#define RCC_SYSCLKSource_HSE             ((uint32_t)0x00000001)
+#define RCC_SYSCLKSource_PLLCLK          ((uint32_t)0x00000002)
+#define RCC_SYSCLKSource_LSI       		   ((uint32_t)0x00000003)
+#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
+((SOURCE) == RCC_SYSCLKSource_HSE) || \
+    ((SOURCE) == RCC_SYSCLKSource_PLLCLK||(SOURCE) == RCC_SYSCLKSource_LSI))
+/**
+* @}
+*/
+
+/** @defgroup AHB_clock_source 
+* @{
+*/
+
+#define RCC_SYSCLK_Div1                  ((uint32_t)0x00000000)
+#define RCC_SYSCLK_Div2                  ((uint32_t)0x00000080)
+#define RCC_SYSCLK_Div4                  ((uint32_t)0x00000090)
+#define RCC_SYSCLK_Div8                  ((uint32_t)0x000000A0)
+#define RCC_SYSCLK_Div16                 ((uint32_t)0x000000B0)
+#define RCC_SYSCLK_Div64                 ((uint32_t)0x000000C0)
+#define RCC_SYSCLK_Div128                ((uint32_t)0x000000D0)
+#define RCC_SYSCLK_Div256                ((uint32_t)0x000000E0)
+#define RCC_SYSCLK_Div512                ((uint32_t)0x000000F0)
+#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
+((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
+    ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
+        ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
+            ((HCLK) == RCC_SYSCLK_Div512))
+/**
+* @}
+*/ 
+
+/** @defgroup APB1_APB2_clock_source 
+* @{
+*/
+
+#define RCC_HCLK_Div1                    ((uint32_t)0x00000000)
+#define RCC_HCLK_Div2                    ((uint32_t)0x00000400)
+#define RCC_HCLK_Div4                    ((uint32_t)0x00000500)
+#define RCC_HCLK_Div8                    ((uint32_t)0x00000600)
+#define RCC_HCLK_Div16                   ((uint32_t)0x00000700)
+#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
+((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
+    ((PCLK) == RCC_HCLK_Div16))
+
+/**
+* @}
+*/ 
+
+/** @defgroup PLL_multiplication_factor 
+* @{
+*/
+
+#define RCC_PLLMul_2                     ((uint32_t)0x00000000)
+#define RCC_PLLMul_3                     ((uint32_t)0x00040000)
+#define RCC_PLLMul_4                     ((uint32_t)0x00080000)
+#define RCC_PLLMul_5                     ((uint32_t)0x000C0000)
+#define RCC_PLLMul_6                     ((uint32_t)0x00100000)
+#define RCC_PLLMul_7                     ((uint32_t)0x00140000)
+#define RCC_PLLMul_8                     ((uint32_t)0x00180000)
+#define RCC_PLLMul_9                     ((uint32_t)0x001C0000)
+#define RCC_PLLMul_10                    ((uint32_t)0x00200000)
+#define RCC_PLLMul_11                    ((uint32_t)0x00240000)
+#define RCC_PLLMul_12                    ((uint32_t)0x00280000)
+#define RCC_PLLMul_13                    ((uint32_t)0x002C0000)
+#define RCC_PLLMul_14                    ((uint32_t)0x00300000)
+#define RCC_PLLMul_15                    ((uint32_t)0x00340000)
+#define RCC_PLLMul_16                    ((uint32_t)0x00380000)
+
+#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3)   || \
+((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5)   || \
+    ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7)   || \
+        ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9)   || \
+            ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
+                ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
+                    ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
+                        ((MUL) == RCC_PLLMul_16))													 
+
+
+/**
+* @}
+*/
+
+/** @defgroup RCC_Interrupt_source 
+* @{
+*/
+
+#define RCC_IT_LSIRDY                    ((uint8_t)0x01)
+#define RCC_IT_HSIRDY                    ((uint8_t)0x04)
+#define RCC_IT_HSERDY                    ((uint8_t)0x08)
+#define RCC_IT_PLLRDY                    ((uint8_t)0x10)
+#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))
+#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || \
+((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
+    ((IT) == RCC_IT_PLLRDY))
+
+#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))
+/**
+* @}
+*/
+
+/** @defgroup USB_clock_source 
+* @{
+*/
+
+#define RCC_USBCLKSource_PLLCLK_Div1     ((uint32_t)0x00000000)
+#define RCC_USBCLKSource_PLLCLK_Div2     ((uint32_t)0x00400000)
+#define RCC_USBCLKSource_PLLCLK_Div3     ((uint32_t)0x00800000)
+#define RCC_USBCLKSource_PLLCLK_Div4     ((uint32_t)0x00c00000)
+#define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1) || \
+((SOURCE) == RCC_USBCLKSource_PLLCLK_Div2) || ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div3)|| \
+((SOURCE) == RCC_USBCLKSource_PLLCLK_Div4))
+
+
+/** @defgroup AHB_peripheral 
+* @{
+*/
+
+#define RCC_AHBPeriph_DMA1               ((uint32_t)0x00000001)
+#define RCC_AHBPeriph_SRAM               ((uint32_t)0x00000004)
+#define RCC_AHBPeriph_FLITF              ((uint32_t)0x00000010)
+#define RCC_AHBPeriph_AES                ((uint32_t)0x00000080)
+#define RCC_AHBPeriph_GPIOA              ((uint32_t)0x00020000)
+#define RCC_AHBPeriph_GPIOB              ((uint32_t)0x00040000)
+#define RCC_AHBPeriph_GPIOC              ((uint32_t)0x00080000)
+#define RCC_AHBPeriph_GPIOD              ((uint32_t)0x00100000)
+
+
+#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFE1FF6A) == 0x00) && ((PERIPH) != 0x00))
+/**
+* @}
+*/
+
+/** @defgroup APB2_peripheral 
+* @{
+*/
+
+#define RCC_APB2Periph_SYSCFG            ((uint32_t)0x00000001)
+#define RCC_APB2Periph_ADC1              ((uint32_t)0x00000200)
+#define RCC_APB2Periph_TIM1              ((uint32_t)0x00000800)
+#define RCC_APB2Periph_SPI1              ((uint32_t)0x00001000)
+#define RCC_APB2Periph_UART1             ((uint32_t)0x00004000)
+#define RCC_APB2Periph_COMP              ((uint32_t)0x00008000)
+#define RCC_APB2Periph_TIM14             ((uint32_t)0x00010000)
+#define RCC_APB2Periph_TIM16             ((uint32_t)0x00020000)
+#define RCC_APB2Periph_TIM17             ((uint32_t)0x00040000)
+#define RCC_APB2Periph_DBGMCU            ((uint32_t)0x00400000)
+#define RCC_APB2Periph_ALL               ((uint32_t)0x0047DA01)
+#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFB825FE) == 0x00) && ((PERIPH) != 0x00))
+/**
+* @}
+*/ 
+
+/** @defgroup APB1_peripheral 
+* @{
+*/
+
+#define RCC_APB1Periph_TIM2              ((uint32_t)0x00000001)
+#define RCC_APB1Periph_TIM3              ((uint32_t)0x00000002)
+
+#define RCC_APB1Periph_WWDG              ((uint32_t)0x00000800)
+#define RCC_APB1Periph_SPI2              ((uint32_t)0x00004000)
+#define RCC_APB1Periph_UART2             ((uint32_t)0x00020000)
+
+#define RCC_APB1Periph_I2C1              ((uint32_t)0x00200000)
+
+#define RCC_APB1Periph_USB               ((uint32_t)0x00800000)
+#define RCC_APB1Periph_CAN1              ((uint32_t)0x02000000)
+#define RCC_APB1Periph_PWR               ((uint32_t)0x10000000)
+#define RCC_APB1Periph_CRS               ((uint32_t)0x08000000)
+
+#define RCC_APB1Periph_ALL               ((uint32_t)0x1AA24803)
+
+#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xE55DB7FC) == 0x00) && ((PERIPH) != 0x00))
+/**
+* @}
+*/
+
+/** @defgroup Clock_source_to_output_on_MCO_pin 
+* @{
+*/
+
+#define RCC_MCO_NoClock                  ((uint8_t)0x00)
+#define RCC_MCO_SYSCLK                   ((uint8_t)0x04)
+#define RCC_MCO_HSI                      ((uint8_t)0x05)
+#define RCC_MCO_HSE                      ((uint8_t)0x06)
+#define RCC_MCO_PLLCLK_Div2              ((uint8_t)0x07)
+#define RCC_MCO_LSI                      ((uint8_t)0x02)
+#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
+((MCO) == RCC_MCO_SYSCLK)  || ((MCO) == RCC_MCO_HSE) || \
+    ((MCO) == RCC_MCO_PLLCLK_Div2)||((MCO) == RCC_MCO_LSI))
+/**
+* @}
+*/
+
+/** @defgroup RCC_Flag 
+* @{
+*/
+
+#define RCC_FLAG_HSIRDY                  ((uint8_t)0x21)
+#define RCC_FLAG_HSERDY                  ((uint8_t)0x31)
+#define RCC_FLAG_PLLRDY                  ((uint8_t)0x39)
+#define RCC_FLAG_LSIRDY                  ((uint8_t)0x61)
+#define RCC_FLAG_PINRST                  ((uint8_t)0x7A)
+#define RCC_FLAG_PORRST                  ((uint8_t)0x7B)
+#define RCC_FLAG_SFTRST                  ((uint8_t)0x7C)
+#define RCC_FLAG_IWDGRST                 ((uint8_t)0x7D)
+#define RCC_FLAG_WWDGRST                 ((uint8_t)0x7E)
+#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
+((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
+    ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
+        ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
+            ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST))
+
+#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup RCC_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup RCC_Exported_Functions
+* @{
+*/
+
+void RCC_DeInit(void);
+void RCC_HSEConfig(uint32_t RCC_HSE);
+ErrorStatus RCC_WaitForHSEStartUp(void);
+void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
+void RCC_HSICmd(FunctionalState NewState);
+void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
+void RCC_PLLCmd(FunctionalState NewState);
+void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
+uint8_t RCC_GetSYSCLKSource(void);
+void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
+void RCC_PCLK1Config(uint32_t RCC_HCLK);
+void RCC_PCLK2Config(uint32_t RCC_HCLK);
+void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
+void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
+void RCC_LSICmd(FunctionalState NewState);
+void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
+void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
+void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
+void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
+void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
+void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
+void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
+void RCC_MCOConfig(uint8_t RCC_MCO);
+FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
+void RCC_ClearFlag(void);
+ITStatus RCC_GetITStatus(uint8_t RCC_IT);
+void RCC_ClearITPendingBit(uint8_t RCC_IT);
+
+#endif /* __HAL_RCC_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/ 
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_spi.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_spi.h
@@ -0,0 +1,418 @@
+/**
+******************************************************************************
+* @file  HAL_spi.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the SPI firmware 
+*         library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_SPI_H
+#define __HAL_SPI_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup SPI
+* @{
+*/ 
+
+/** @defgroup SPI_Exported_Types
+* @{
+*/
+
+/** 
+* @brief  SPI Init structure definition  
+*/
+
+typedef struct
+{
+    uint16_t SPI_Mode;
+    uint16_t SPI_DataSize;
+    uint16_t SPI_DataWidth;
+    uint16_t SPI_CPOL;
+    uint16_t SPI_CPHA;
+    uint16_t SPI_NSS;
+    uint16_t SPI_BaudRatePrescaler;
+    uint16_t SPI_FirstBit; 
+}SPI_InitTypeDef;
+
+
+/**
+* @}
+*/
+
+/** @defgroup SPI_Exported_Constants
+* @{
+*/
+
+#define IS_SPI_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI0_BASE) || \
+((*(uint32_t*)&(PERIPH)) == SPI1_BASE))
+
+#define IS_SPI_2_PERIPH(PERIPH) ((*(uint32_t*)&(PERIPH)) == SPI1_BASE)
+
+
+/**
+* @}
+*/
+
+/** @defgroup SPI_master_slave_mode 
+* @{
+*/
+
+#define SPI_Mode_Master                 ((uint16_t)0x0004)
+#define SPI_Mode_Slave                  ((uint16_t)0x0000)
+#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
+((MODE) == SPI_Mode_Slave))
+/**
+* @}
+*/
+
+/** @defgroup SPI_data_size 
+* @{
+*/
+
+#define SPI_DataSize_32b                ((uint16_t)0x0800)
+#define SPI_DataSize_8b                 ((uint16_t)0x0000)
+#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_32b) || \
+((DATASIZE) == SPI_DataSize_8b))
+
+/**
+* @}
+*/
+
+
+/** @defgroup SPI_7bit_8bit data width 
+* @{
+*/
+
+#define SPI_DataWidth_1b                  ((uint16_t)0x0001)
+#define SPI_DataWidth_2b                  ((uint16_t)0x0002)
+#define SPI_DataWidth_3b                  ((uint16_t)0x0003)
+#define SPI_DataWidth_4b                  ((uint16_t)0x0004)
+#define SPI_DataWidth_5b                  ((uint16_t)0x0005)
+#define SPI_DataWidth_6b                  ((uint16_t)0x0006)
+#define SPI_DataWidth_7b                  ((uint16_t)0x0007)
+#define SPI_DataWidth_8b                ((uint16_t)0x0008)
+#define SPI_DataWidth_9b                  ((uint16_t)0x0009)
+#define SPI_DataWidth_10b                 ((uint16_t)0x000a)
+#define SPI_DataWidth_11b                 ((uint16_t)0x000b)
+#define SPI_DataWidth_12b                 ((uint16_t)0x000c)
+#define SPI_DataWidth_13b                 ((uint16_t)0x000d)
+#define SPI_DataWidth_14b                 ((uint16_t)0x000e)
+#define SPI_DataWidth_15b                 ((uint16_t)0x000f)
+#define SPI_DataWidth_16b                 ((uint16_t)0x0010)
+#define SPI_DataWidth_17b                 ((uint16_t)0x0011)
+#define SPI_DataWidth_18b                 ((uint16_t)0x0012)
+#define SPI_DataWidth_19b                 ((uint16_t)0x0013)
+#define SPI_DataWidth_20b                 ((uint16_t)0x0014)
+#define SPI_DataWidth_21b                 ((uint16_t)0x0015)
+#define SPI_DataWidth_22b                 ((uint16_t)0x0016)
+#define SPI_DataWidth_23b                 ((uint16_t)0x0017)
+#define SPI_DataWidth_24b                 ((uint16_t)0x0018)
+#define SPI_DataWidth_25b                 ((uint16_t)0x0019)
+#define SPI_DataWidth_26b                 ((uint16_t)0x001a)
+#define SPI_DataWidth_27b                 ((uint16_t)0x001b)
+#define SPI_DataWidth_28b                 ((uint16_t)0x001c)
+#define SPI_DataWidth_29b                 ((uint16_t)0x001d)
+#define SPI_DataWidth_30b                 ((uint16_t)0x001e)
+#define SPI_DataWidth_31b                 ((uint16_t)0x001f)
+#define SPI_DataWidth_32b                 ((uint16_t)0x0000)
+#define IS_SPI_DATAWIDRH(WIDTH) (((WIDTH) == SPI_DataWidth_1b) || ((WIDTH) == SPI_DataWidth_2b)||\
+                                ((WIDTH) == SPI_DataWidth_3b)||((WIDTH) == SPI_DataWidth_4b)||\
+															  ((WIDTH) == SPI_DataWidth_5b)||((WIDTH) == SPI_DataWidth_6b)||\
+															  ((WIDTH) == SPI_DataWidth_7b)||((WIDTH) == SPI_DataWidth_8b)||\
+															  ((WIDTH) == SPI_DataWidth_9b)||((WIDTH) == SPI_DataWidth_10b)||\
+															  ((WIDTH) == SPI_DataWidth_11b)||((WIDTH) == SPI_DataWidth_12b)||\
+															  ((WIDTH) == SPI_DataWidth_13b)||((WIDTH) == SPI_DataWidth_14b)||\
+															  ((WIDTH) == SPI_DataWidth_15b)||((WIDTH) == SPI_DataWidth_16b)||\
+															  ((WIDTH) == SPI_DataWidth_17b)||((WIDTH) == SPI_DataWidth_18b)||\
+															  ((WIDTH) == SPI_DataWidth_19b)||((WIDTH) == SPI_DataWidth_20b)||\
+															  ((WIDTH) == SPI_DataWidth_21b)||((WIDTH) == SPI_DataWidth_22b)||\
+															  ((WIDTH) == SPI_DataWidth_23b)||((WIDTH) == SPI_DataWidth_24b)||\
+															  ((WIDTH) == SPI_DataWidth_25b)||((WIDTH) == SPI_DataWidth_26b)||\
+															  ((WIDTH) == SPI_DataWidth_27b)||((WIDTH) == SPI_DataWidth_28b)||\
+															  ((WIDTH) == SPI_DataWidth_29b)||((WIDTH) == SPI_DataWidth_30b)||\
+															  ((WIDTH) == SPI_DataWidth_31b)||((WIDTH) == SPI_DataWidth_32b)||)
+/**
+* @}
+*/
+
+
+/** @defgroup SPI_Clock_Polarity 
+* @{
+*/
+
+#define SPI_CPOL_Low                    ((uint16_t)0x0000)
+#define SPI_CPOL_High                   ((uint16_t)0x0002)
+#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
+((CPOL) == SPI_CPOL_High))
+/**
+* @}
+*/
+
+/** @defgroup SPI_Clock_Phase 
+* @{
+*/
+
+#define SPI_CPHA_1Edge                  ((uint16_t)0x0001)
+#define SPI_CPHA_2Edge                  ((uint16_t)0x0000)
+#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
+((CPHA) == SPI_CPHA_2Edge))
+/**
+* @}
+*/
+
+/** @defgroup SPI_Slave_Select_management 
+* @{
+*/
+
+#define SPI_NSS_Soft                    ((uint16_t)0x0000)
+#define SPI_NSS_Hard                    ((uint16_t)0x0400)
+#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
+((NSS) == SPI_NSS_Hard))
+
+
+/**
+* @}
+*/
+
+/** @defgroup SPI_NSS_internal_software_mangement 
+* @{
+*/
+
+#define SPI_NSSInternalSoft_Set         ((uint16_t)0x0001)
+#define SPI_NSSInternalSoft_Reset       ((uint16_t)0xFFFE)
+#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
+((INTERNAL) == SPI_NSSInternalSoft_Reset))
+/**
+* @}
+*/
+
+/**
+* @}
+*/ 
+
+/** @defgroup SPI_BaudRate_Prescaler_ 
+* @{
+*/
+
+
+#define SPI_BaudRatePrescaler_2         ((uint16_t)0x0002)
+#define SPI_BaudRatePrescaler_4         ((uint16_t)0x0004)
+#define SPI_BaudRatePrescaler_8         ((uint16_t)0x0008)
+#define SPI_BaudRatePrescaler_16        ((uint16_t)0x0010)
+#define SPI_BaudRatePrescaler_32        ((uint16_t)0x0020)
+#define SPI_BaudRatePrescaler_64        ((uint16_t)0x0040)
+#define SPI_BaudRatePrescaler_128       ((uint16_t)0x0080)
+#define SPI_BaudRatePrescaler_256       ((uint16_t)0x0100)
+#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
+((PRESCALER) == SPI_BaudRatePrescaler_4) || \
+    ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
+        ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
+            ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
+                ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
+                    ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
+                        ((PRESCALER) == SPI_BaudRatePrescaler_256))
+/**
+* @}
+*/ 
+
+/** @defgroup SPI_MSB_LSB_transmission 
+* @{
+*/
+
+#define SPI_FirstBit_MSB                ((uint16_t)0x0000)
+#define SPI_FirstBit_LSB                ((uint16_t)0x0004)
+#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
+((BIT) == SPI_FirstBit_LSB))
+
+
+/**
+* @}
+*/
+
+/** @defgroup SPI_DMA_transfer_requests 
+* @{
+*/
+
+#define SPI_DMAReq_EN               		((uint16_t)0x0200)
+#define IS_SPI_DMAREQ(DMAREQ) ((DMAREQ)  == SPI_DMAReq_EN)
+
+
+/**
+* @}
+*/
+
+/** @defgroup SPI TX Fifo and RX Fifo trigger level 
+* @{
+*/
+#define SPI_TXTLF               		    ((uint16_t)0x0080)
+#define SPI_RXTLF               		    ((uint16_t)0x0020)
+#define IS_SPI_FIFOTRIGGER(TRIGGER) (((TRIGGER)  == SPI_TXTLF) && ((TRIGGER) == SPI_RXTLF))
+
+
+
+
+
+
+
+/**
+* @}
+*/
+
+/** @defgroup SPI_NSS_internal_software_mangement 
+* @{
+*/
+
+#define SPI_CS_BIT0                   ((uint16_t)0xfffe)
+#define SPI_CS_BIT1                   ((uint16_t)0xfffd)
+#define SPI_CS_BIT2                   ((uint16_t)0xfffb)
+#define SPI_CS_BIT3                   ((uint16_t)0xfff7)
+#define SPI_CS_BIT4                   ((uint16_t)0xffef)
+#define SPI_CS_BIT5                   ((uint16_t)0xffdf)
+#define SPI_CS_BIT6                   ((uint16_t)0xffbf)
+#define SPI_CS_BIT7                   ((uint16_t)0xff7f)
+#define IS_SPI_CS(CS)        (((CS) == SPI_CS_BIT0) || ((CS) == SPI_CS_BIT1)||\
+((CS) == SPI_CS_BIT2) || ((CS) == SPI_CS_BIT3)||\
+    ((CS) == SPI_CS_BIT4) || ((CS) == SPI_CS_BIT5)||\
+        ((CS) == SPI_CS_BIT6) || ((CS) == SPI_CS_BIT7))
+/**
+* @}
+*/
+
+
+/** @defgroup SPI_direction_transmit_receive 
+* @{
+*/
+
+#define SPI_Direction_Rx                ((uint16_t)0x0010)
+#define SPI_Direction_Tx                ((uint16_t)0x0008)
+#define SPI_Disable_Tx                	((uint16_t)0xfff7)
+#define SPI_Disable_Rx                	((uint16_t)0xffef)
+#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
+((DIRECTION) == SPI_Direction_Tx) || \
+    ((DIRECTION) == SPI_Disable_Tx) || \
+        ((DIRECTION) == SPI_Disable_Rx))
+/**
+* @}
+*/
+
+/** @defgroup SPI_interrupts_definition 
+* @{
+*/
+#define SPI_INT_EN                    ((uint16_t)0x0002)
+
+#define SPI_IT_TX                     ((uint8_t)0x01)
+#define SPI_IT_RX                     ((uint8_t)0x02)
+
+#define IS_SPI_CONFIG_IT(IT) (((IT) == SPI_IT_TX) || \
+((IT) == SPI_IT_RX))
+
+#define SPI_IT_UNDERRUN                ((uint8_t)0x04)
+#define SPI_IT_RXOVER                  ((uint8_t)0x08)
+#define SPI_IT_RXMATCH                 ((uint8_t)0x10)
+#define SPI_IT_RXFULL                  ((uint8_t)0x20)
+#define SPI_IT_TXEPT                   ((uint8_t)0x40)
+
+#define IS_SPI_GET_IT(IT) (((IT) == SPI_IT_TX) || ((IT) == SPI_IT_RX) || \
+((IT) == SPI_IT_UNDERRUN) || ((IT) == SPI_IT_RXOVER) || \
+    ((IT) == SPI_IT_RXMATCH) || ((IT) == SPI_IT_RXFULL) || \
+        ((IT) == SPI_IT_TXEPT))
+/**
+* @}
+*/
+
+/** @defgroup SPI_flags_definition 
+* @{
+*/
+
+
+#define SPI_FLAG_RXAVL                ((uint16_t)0x0002)
+#define SPI_FLAG_TXEPT                ((uint16_t)0x0001)
+
+#define IS_SPI_GET_FLAG(FLAG) (((FLAG) == SPI_FLAG_RXAVL) || \
+((FLAG) == SPI_FLAG_TXEPT))
+
+/**
+* @}
+*/
+
+/** @defgroup SPI mode tx data transmit phase adjust set 
+*in slave mode according to txedge bit of CCTL register
+* @{
+*/
+
+
+#define SPI_SlaveAdjust_FAST          ((uint16_t)0x0020)
+#define SPI_SlaveAdjust_LOW           ((uint16_t)0xffdf)
+
+#define IS_SPI_SlaveAdjust(ADJUST) (((ADJUST) == SPI_SlaveAdjust_FAST) || \
+((ADJUST) == SPI_SlaveAdjust_LOW))
+
+
+/**
+* @}
+*/
+
+/** @defgroup SPI_Exported_Macros
+* @{
+*/
+
+/**
+* @}
+*/
+
+/** @defgroup SPI_Exported_Functions
+* @{
+*/
+
+void SPI_DeInit(SPI_TypeDef* SPIx);
+void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
+void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
+void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
+void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState);
+void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState);
+void SPI_FifoTrigger(SPI_TypeDef* SPIx, uint16_t SPI_FifoTriggerValue, FunctionalState NewState);
+void SPI_SendData(SPI_TypeDef* SPIx, uint32_t Data);
+uint32_t SPI_ReceiveData(SPI_TypeDef* SPIx);
+void SPI_CSInternalSelected(SPI_TypeDef* SPIx, uint16_t SPI_CSInternalSelected,FunctionalState NewState);
+void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
+void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
+void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
+FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
+ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);
+void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT);
+void SPI_RxBytes(SPI_TypeDef* SPIx, uint16_t Number);
+void SPI_SlaveAdjust(SPI_TypeDef* SPIx, uint16_t AdjustValue);
+#endif /*__HAL_SPI_H */
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_syscfg.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_syscfg.h
@@ -0,0 +1,180 @@
+/**
+******************************************************************************
+* @file    HAL_syscfg.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief   This file contains all the functions prototypes for the SYSCFG firmware 
+*          library.
+******************************************************************************
+* @attention
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*
+*/
+
+/*!< Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_SYSCFG_H
+#define __HAL_SYSCFG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+    
+    /*!< Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+    
+    /** @addtogroup StdPeriph_Driver
+    * @{
+    */
+    
+    /** @addtogroup SYSCFG
+    * @{
+    */
+    /* Exported types ------------------------------------------------------------*/
+    /* Exported constants --------------------------------------------------------*/
+    
+    /** @defgroup SYSCFG_Exported_Constants
+    * @{
+    */ 
+    
+    /** @defgroup SYSCFG_EXTI_Port_Sources 
+    * @{
+    */ 
+#define EXTI_PortSourceGPIOA       ((uint8_t)0x00)
+#define EXTI_PortSourceGPIOB       ((uint8_t)0x01)
+#define EXTI_PortSourceGPIOC       ((uint8_t)0x02)
+#define EXTI_PortSourceGPIOD       ((uint8_t)0x03) 
+#define EXTI_PortSourceGPIOE       ((uint8_t)0x04) 
+#define EXTI_PortSourceGPIOF       ((uint8_t)0x05)
+    
+#define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
+    ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
+        ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
+            ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
+                ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
+                    ((PORTSOURCE) == EXTI_PortSourceGPIOF)) 
+/**
+* @}
+*/
+
+/** @defgroup SYSCFG_EXTI_Pin_sources 
+* @{
+*/ 
+#define EXTI_PinSource0            ((uint8_t)0x00)
+#define EXTI_PinSource1            ((uint8_t)0x01)
+#define EXTI_PinSource2            ((uint8_t)0x02)
+#define EXTI_PinSource3            ((uint8_t)0x03)
+#define EXTI_PinSource4            ((uint8_t)0x04)
+#define EXTI_PinSource5            ((uint8_t)0x05)
+#define EXTI_PinSource6            ((uint8_t)0x06)
+#define EXTI_PinSource7            ((uint8_t)0x07)
+#define EXTI_PinSource8            ((uint8_t)0x08)
+#define EXTI_PinSource9            ((uint8_t)0x09)
+#define EXTI_PinSource10           ((uint8_t)0x0A)
+#define EXTI_PinSource11           ((uint8_t)0x0B)
+#define EXTI_PinSource12           ((uint8_t)0x0C)
+#define EXTI_PinSource13           ((uint8_t)0x0D)
+#define EXTI_PinSource14           ((uint8_t)0x0E)
+#define EXTI_PinSource15           ((uint8_t)0x0F)
+
+#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
+((PINSOURCE) == EXTI_PinSource1) || \
+    ((PINSOURCE) == EXTI_PinSource2) || \
+        ((PINSOURCE) == EXTI_PinSource3) || \
+            ((PINSOURCE) == EXTI_PinSource4) || \
+                ((PINSOURCE) == EXTI_PinSource5) || \
+                    ((PINSOURCE) == EXTI_PinSource6) || \
+                        ((PINSOURCE) == EXTI_PinSource7) || \
+                            ((PINSOURCE) == EXTI_PinSource8) || \
+                                ((PINSOURCE) == EXTI_PinSource9) || \
+                                    ((PINSOURCE) == EXTI_PinSource10) || \
+                                        ((PINSOURCE) == EXTI_PinSource11) || \
+                                            ((PINSOURCE) == EXTI_PinSource12) || \
+                                                ((PINSOURCE) == EXTI_PinSource13) || \
+                                                    ((PINSOURCE) == EXTI_PinSource14) || \
+                                                        ((PINSOURCE) == EXTI_PinSource15))
+/**
+* @}
+*/
+
+/** @defgroup SYSCFG_Memory_Remap_Config 
+* @{
+*/ 
+#define SYSCFG_MemoryRemap_Flash                ((uint8_t)0x00)
+#define SYSCFG_MemoryRemap_SystemMemory         ((uint8_t)0x01)
+#define SYSCFG_MemoryRemap_SRAM                 ((uint8_t)0x03)
+
+
+#define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
+((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \
+    ((REMAP) == SYSCFG_MemoryRemap_SRAM))
+
+/**
+* @}
+*/
+
+/** @defgroup SYSCFG_DMA_Remap_Config 
+* @{
+*/ 
+#define SYSCFG_DMARemap_TIM17       SYSCFG_CFGR_TIM17_DMA_RMP    /* Remap TIM17 DMA requests from channel1 to channel2 */
+#define SYSCFG_DMARemap_TIM16       SYSCFG_CFGR_TIM16_DMA_RMP    /* Remap TIM16 DMA requests from channel3 to channel4 */
+#define SYSCFG_DMARemap_UART1Rx    SYSCFG_CFGR_UART1RX_DMA_RMP /* Remap UART1 Rx DMA requests from channel3 to channel5 */
+#define SYSCFG_DMARemap_UART1Tx    SYSCFG_CFGR_UART1TX_DMA_RMP /* Remap UART1 Tx DMA requests from channel2 to channel4 */
+#define SYSCFG_DMARemap_ADC1        SYSCFG_CFGR_ADC_DMA_RMP      /* Remap ADC1 DMA requests from channel1 to channel2 */
+
+#define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \
+((REMAP) == SYSCFG_DMARemap_TIM16) || \
+    ((REMAP) == SYSCFG_DMARemap_UART1Rx) || \
+        ((REMAP) == SYSCFG_DMARemap_UART1Tx) || \
+            ((REMAP) == SYSCFG_CFGR1_TIM3_DMA_RMP) || \
+                ((REMAP) == SYSCFG_CFGR1_TIM2_DMA_RMP) || \
+                    ((REMAP) == SYSCFG_CFGR1_TIM1_DMA_RMP) || \
+                        ((REMAP) == SYSCFG_CFGR1_I2C1_DMA_RMP) || \
+                            ((REMAP) == SYSCFG_CFGR1_UART3_DMA_RMP) || \
+                                ((REMAP) == SYSCFG_CFGR1_UART2_DMA_RMP) || \
+                                    ((REMAP) == SYSCFG_CFGR1_SPI2_DMA_RMP) || \
+                                        ((REMAP) == SYSCFG_CFGR1_TIM17_DMA_RMP2) || \
+                                            ((REMAP) == SYSCFG_CFGR1_TIM16_DMA_RMP2) || \
+                                                ((REMAP) == SYSCFG_DMARemap_ADC1))
+
+
+/**
+* @}
+*/
+
+
+
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+/*  Function used to set the SYSCFG configuration to the default reset state **/
+void SYSCFG_DeInit(void);
+
+/* SYSCFG configuration functions *********************************************/ 
+void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap);
+void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState);
+void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState);
+void SYSCFG_IRDAEnvSelection(uint32_t SYSCFG_IRDAEnv);
+void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
+uint32_t SYSCFG_GetPendingIT(uint32_t ITSourceLine);
+void SYSCFG_BreakConfig(uint32_t SYSCFG_Break);
+FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag);
+void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__HAL_SYSCFG_H */
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_tim.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_tim.h
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_uart.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_uart.h
@@ -0,0 +1,247 @@
+/**
+******************************************************************************
+* @file  HAL_UART.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the UART 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_UART_H
+#define __HAL_UART_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup UART
+* @{
+*/ 
+
+/** @defgroup UART_Exported_Types
+* @{
+*/ 
+
+/** 
+* @brief  UART Init Structure definition  
+*/ 
+
+typedef struct
+{
+    uint32_t UART_BaudRate;
+    uint16_t UART_WordLength;
+    uint16_t UART_StopBits;
+    uint16_t UART_Parity;
+    uint16_t UART_Mode;
+    uint16_t UART_HardwareFlowControl; 
+} UART_InitTypeDef;
+
+
+/**
+* @}
+*/ 
+
+/** @defgroup UART_Exported_Constants
+* @{
+*/ 
+
+#define IS_UART_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == UART1_BASE) || \
+((*(uint32_t*)&(PERIPH)) == UART2_BASE) || \
+    ((*(uint32_t*)&(PERIPH)) == UART3_BASE))
+#define IS_UART_123_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == UART1_BASE) || \
+((*(uint32_t*)&(PERIPH)) == UART2_BASE) || \
+    ((*(uint32_t*)&(PERIPH)) == UART3_BASE))
+
+/** @defgroup UART_Word_Length 
+* @{
+*/ 
+
+#define UART_WordLength_5b                  ((uint16_t)0x0000)
+#define UART_WordLength_6b                  ((uint16_t)0x0010)
+#define UART_WordLength_7b                  ((uint16_t)0x0020)
+#define UART_WordLength_8b                  ((uint16_t)0x0030)
+
+
+#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WordLength_5b) || \
+((LENGTH) == UART_WordLength_6b) || \
+    ((LENGTH) == UART_WordLength_7b) || \
+        ((LENGTH) == UART_WordLength_8b))
+/**
+* @}
+*/ 
+
+/** @defgroup UART_Stop_Bits 
+* @{
+*/ 
+
+#define UART_StopBits_1                     ((uint16_t)0x0000)
+#define UART_StopBits_2                     ((uint16_t)0x0004)
+
+#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_StopBits_1) || \
+((STOPBITS) == UART_StopBits_2)) 
+
+/**
+* @}
+*/ 
+
+/** @defgroup UART_Parity 
+* @{
+*/ 
+
+#define UART_Parity_No                      ((uint16_t)0x0000)
+#define UART_Parity_Even                    ((uint16_t)0x0003)
+#define UART_Parity_Odd                     ((uint16_t)0x0001) 
+#define IS_UART_PARITY(PARITY) (((PARITY) == UART_Parity_No) || \
+((PARITY) == UART_Parity_Even) || \
+    ((PARITY) == UART_Parity_Odd))
+/**
+* @}
+*/ 
+
+/** @defgroup UART_Mode 
+* @{
+*/ 
+
+#define UART_Mode_Rx                        ((uint16_t)0x0008)
+#define UART_Mode_Tx                        ((uint16_t)0x0010)
+#define IS_UART_MODE(MODE) ((((MODE) & (uint16_t)0xFFE7) == 0x00) && ((MODE) != (uint16_t)0x00))
+
+#define UART_EN                             ((uint16_t)0x0001)
+
+/**
+* @}
+*/ 
+
+/** @defgroup UART_Hardware_Flow_Control 
+* @{
+*/ 
+#define UART_HardwareFlowControl_None       ((uint16_t)0x0000)
+
+#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
+(((CONTROL) == UART_HardwareFlowControl_None) || \
+    ((CONTROL) == UART_HardwareFlowControl_RTS) || \
+        ((CONTROL) == UART_HardwareFlowControl_CTS) || \
+            ((CONTROL) == UART_HardwareFlowControl_RTS_CTS))
+
+/** @defgroup UART_Interrupt_definition 
+* @{
+*/
+
+
+#define UART_IT_ERR            ((uint16_t)0x0020)
+#define UART_IT_PE             ((uint16_t)0x0010)
+#define UART_OVER_ERR          ((uint16_t)0x0008)
+#define UART_TIMEOUT_ERR       ((uint16_t)0x0004)
+#define UART_IT_RXIEN          ((uint16_t)0x0002)
+#define UART_IT_TXIEN          ((uint16_t)0x0001)
+
+#define IS_UART_CONFIG_IT(IT) (((IT) == UART_IT_PE) || ((IT) == UART_IT_TXIEN) || \
+((IT) == UART_IT_RXIEN) || ((IT) == UART_IT_ERR))
+
+#define IS_UART_GET_IT(IT) (((IT) == UART_IT_PE) || ((IT) == UART_IT_TXIEN) || \
+((IT) == UART_IT_ERR) || ((IT) == UART_IT_RXIEN) || \
+    ((IT) == UART_OVER_ERR) || ((IT) == UART_TIMEOUT_ERR))
+
+#define IS_UART_CLEAR_IT(IT) ((IT) == UART_IT_RXIEN)
+
+
+/**
+* @}
+*/
+
+/** @defgroup UART_DMA_Requests 
+* @{
+*/
+#define UART_DMAReq_EN                      ((uint16_t)0x0002)
+
+#define IS_UART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFD) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
+
+/**
+* @}
+*/ 
+
+
+/** @defgroup UART_Flags 
+* @{
+*/
+
+
+#define UART_FLAG_TXEMPTY                   ((uint16_t)0x0008)
+#define UART_FLAG_TXFULL                    ((uint16_t)0x0004)
+#define UART_FLAG_RXAVL                     ((uint16_t)0x0002)
+#define UART_FLAG_TXEPT                     ((uint16_t)0x0001)
+
+
+#define IS_UART_FLAG(FLAG) (((FLAG) == UART_FLAG_TXEMPTY) || ((FLAG) == UART_FLAG_TXFULL) || \
+((FLAG) == UART_FLAG_RXAVL) || ((FLAG) == UART_FLAG_TXEPT))
+
+
+#define IS_UART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x00FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
+
+#define IS_UART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
+#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
+#define IS_UART_DATA(DATA) ((DATA) <= 0x1FF)
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup UART_Exported_Macros
+* @{
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup UART_Exported_Functions
+* @{
+*/
+
+void UART_DeInit(UART_TypeDef* UARTx);
+void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct);
+void UART_StructInit(UART_InitTypeDef* UART_InitStruct);
+void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState);
+void UART_ITConfig(UART_TypeDef* UARTx, uint16_t UART_IT, FunctionalState NewState);
+void UART_DMACmd(UART_TypeDef* UARTx, uint16_t UART_DMAReq, FunctionalState NewState);
+void UART_SendData(UART_TypeDef* UARTx, uint16_t Data);
+uint16_t UART_ReceiveData(UART_TypeDef* UARTx);
+FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, uint16_t UART_FLAG);
+void UART_ClearFlag(UART_TypeDef* UARTx, uint16_t UART_FLAG);
+ITStatus UART_GetITStatus(UART_TypeDef* UARTx, uint16_t UART_IT);
+void UART_ClearITPendingBit(UART_TypeDef* UARTx, uint16_t UART_IT);
+
+#endif /* __HAL_UART_H */
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_wwdg.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/HAL_wwdg.h
@@ -0,0 +1,106 @@
+/**
+******************************************************************************
+* @file  HAL_wwdg.h
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file contains all the functions prototypes for the WWDG 
+*         firmware library.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HAL_WWDG_H
+#define __HAL_WWDG_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_device.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @addtogroup WWDG
+* @{
+*/ 
+
+/** @defgroup WWDG_Exported_Types
+* @{
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup WWDG_Exported_Constants
+* @{
+*/ 
+
+/** @defgroup WWDG_Prescaler 
+* @{
+*/ 
+
+#define WWDG_Prescaler_1    ((uint32_t)0x00000000)
+#define WWDG_Prescaler_2    ((uint32_t)0x00000080)
+#define WWDG_Prescaler_4    ((uint32_t)0x00000100)
+#define WWDG_Prescaler_8    ((uint32_t)0x00000180)
+#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
+((PRESCALER) == WWDG_Prescaler_2) || \
+    ((PRESCALER) == WWDG_Prescaler_4) || \
+        ((PRESCALER) == WWDG_Prescaler_8))
+#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
+#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/** @defgroup WWDG_Exported_Macros
+* @{
+*/ 
+/**
+* @}
+*/ 
+
+/** @defgroup WWDG_Exported_Functions
+* @{
+*/ 
+
+void WWDG_DeInit(void);
+void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
+void WWDG_SetWindowValue(uint8_t WindowValue);
+void WWDG_EnableIT(void);
+void WWDG_SetCounter(uint8_t Counter);
+void WWDG_Enable(uint8_t Counter);
+FlagStatus WWDG_GetFlagStatus(void);
+void WWDG_ClearFlag(void);
+
+#endif /* __HAL_WWDG_H */
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/**
+* @}
+*/ 
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/dtype.h
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/dtype.h
@@ -0,0 +1,56 @@
+/****************************************Copyright (c)****************************************************
+** 
+
+**--------------File Info---------------------------------------------------------------------------------
+** File name:			dtype.h
+** modified Date:  		22/08/2017
+** Last Version:		V2.0.0
+** Descriptions:		定义工程要用到的数据类型，包括函数库和应用代码都应该使用本文件里定义的数据类型
+**	
+*********************************************************************************************************/
+#ifndef _DTYPE_H_
+#define _DTYPE_H_     //这样处理是为了避免同一个文件重复包含该头文件
+
+/*********************************************************************************************************
+/定义数据的读写特性，常用于外围寄存器的存储限制
+*********************************************************************************************************/
+#define     __I     volatile const    //只读 
+#define     __O     volatile          //只写
+#define     __IO    volatile          //读写
+
+/*********************************************************************************************************
+常用数据类型定义
+*********************************************************************************************************/
+typedef unsigned char  int8u;         //无符号8位整型变量 
+typedef signed   char  int8s;		  //有符号8位整型变量 
+typedef unsigned short int16u;        //无符号16位整型变量
+typedef signed   short int16s;        //有符号16位整型变量
+typedef unsigned int   int32u;        //无符号32位整型变量
+typedef signed   int   int32s;        //有符号32位整型变量 
+typedef float          fp32;          //单精度浮点数（32位长度）
+typedef double         fp64;          //双精度浮点数（64位长度）
+
+/*********************************************************************************************************
+标准函数库用到的数据类型定义
+*********************************************************************************************************/
+//typedef   signed          char int8_t;
+//typedef   signed short     int int16_t;
+//typedef   signed           int int32_t;
+//
+//typedef unsigned          char uint8_t;
+//typedef unsigned short     int uint16_t;
+//typedef unsigned           int uint32_t;
+//
+//typedef int32_t   s32;
+//typedef int16_t   s16;
+//typedef int8_t    s8;
+//typedef uint32_t  u32;
+//typedef uint16_t  u16;
+//typedef uint8_t   u8;
+/*
+typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
+typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;	
+typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+*/
+#endif  //_DTYPE_H_
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_adc.c
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_adc.c
--- a/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_bkp.c
+++ b/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/HAL_bkp.c
@@ -0,0 +1,60 @@
+/**
+******************************************************************************
+* @file  HAL_bkp.c
+* @author  AE Team
+* @version  V2.0.0
+* @date  22/08/2017
+* @brief  This file provides all the BKP firmware functions.
+******************************************************************************
+* @copy
+*
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
+* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*
+* <h2><center>&copy; COPYRIGHT 2017 MindMotion</center></h2>
+*/ 
+
+/* Includes ------------------------------------------------------------------*/
+#include "HAL_bkp.h"
+
+/** @addtogroup StdPeriph_Driver
+* @{
+*/
+
+/** @defgroup BKP 
+* @brief BKP driver modules
+* @{
+*/
+
+/**
+* @brief  Writes user data to the specified Data Backup Register.
+* @param BKP_DR: specifies the Data Backup Register.
+*   This parameter can be BKP_DRx where x:[1, 42]
+* @param Data: data to write
+* @retval : None
+*/
+void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data)
+{
+  /* Check the parameters */
+  assert_param(IS_BKP_DR(BKP_DR));
+  *(__IO uint16_t *) (BKP_BASE + BKP_DR) = Data;
+}
+
+/**
+* @brief  Reads data from the specified Data Backup Register.
+* @param BKP_DR: specifies the Data Backup Register.
+*   This parameter can be BKP_DRx where x:[1, 42]
+* @retval : The content of the specified Data Backup Register
+*/
+uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR)
+{
+  /* Check the parameters */
+  assert_param(IS_BKP_DR(BKP_DR));
+  return (*(__IO uint16_t *) (BKP_BASE + BKP_DR));
+}
+
+/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
--- a/Show More
+++ b/Show More