mirror of
https://github.com/RT-Thread/rt-thread.git
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[bsp/nxp/mcx/mcxe]: Add MCX E247 and FRDM-MCXE247 support. #10654
This commit is contained in:
Yilin Sun
@@ -247,6 +247,7 @@
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"nxp/mcx/mcxa/frdm-mcxa153",
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"nxp/mcx/mcxa/frdm-mcxa156",
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"nxp/mcx/mcxa/frdm-mcxa346",
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"nxp/mcx/mcxe/frdm-mcxe247",
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"renesas/ebf_qi_min_6m5",
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"renesas/ra6m4-cpk",
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"renesas/ra6m4-iot",
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,6 @@
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config SOC_MCX
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bool
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select ARCH_ARM_CORTEX_M4
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select ARCH_ARM_CORTEX_FPU
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select PKG_USING_NXP_MCX_CMSIS_DRIVER
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select PKG_USING_NXP_MCX_SERIES_DRIVER
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@@ -0,0 +1,41 @@
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from building import *
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cwd = GetCurrentDir()
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src = []
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if GetDepend('BSP_USING_PIN'):
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src += ['drv_pin.c']
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if GetDepend('BSP_USING_UART'):
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src += ['drv_uart.c']
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if GetDepend('BSP_USING_RTC'):
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src += ['drv_rtc.c']
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if GetDepend('BSP_USING_SPI'):
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src += ['drv_spi.c']
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if GetDepend('BSP_USING_I2C'):
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src += ['drv_i2c.c']
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if GetDepend('BSP_USING_ADC'):
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src += ['drv_adc.c']
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if GetDepend('BSP_USING_HWTIMER'):
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src += ['drv_hwtimer.c']
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if GetDepend('BSP_USING_WDT'):
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src += ['drv_wdt.c']
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if GetDepend('BSP_USING_PWM'):
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src += ['drv_pwm.c']
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if GetDepend('BSP_USING_FLASH'):
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src += ['drv_chipflash.c']
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path = [cwd,cwd + '/config']
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
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Return('group')
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@@ -0,0 +1,167 @@
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-05-16 shelton first version
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* 2024-07-21 liujianhua added mcxa153
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*
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*/
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#include <rtconfig.h>
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#include <rtdevice.h>
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#include "fsl_adc12.h"
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#include "fsl_pmc.h"
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#define DBG_TAG "drv.adc"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#ifdef RT_USING_ADC
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#define ADC_VBG_CH 27
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#define ADC_VBG_VOLT 1000
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struct mcx_adc
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{
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struct rt_adc_device adc_device;
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ADC_Type *adc_base;
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clock_ip_name_t clock_ip_name;
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clock_ip_src_t clock_ip_src;
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uint8_t resolution_bits;
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uint8_t max_channels;
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uint32_t vref;
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char *name;
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};
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static struct mcx_adc mcx_adc_obj[] =
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{
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#ifdef BSP_USING_ADC0
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{
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.adc_base = ADC0,
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.clock_ip_name = kCLOCK_Adc0,
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.clock_ip_src = kCLOCK_IpSrcSysOscAsync,
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.resolution_bits = 12,
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.max_channels = 32,
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.name = "adc0",
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},
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#endif
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#ifdef BSP_USING_ADC1
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{
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.adc_base = ADC1,
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.clock_ip_name = kCLOCK_Adc1,
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.clock_ip_src = kCLOCK_IpSrcSysOscAsync,
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.resolution_bits = 12,
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.max_channels = 32,
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.name = "adc1",
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},
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#endif
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};
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static uint16_t mcx_adc_get_raw(struct mcx_adc *adc, uint32_t channel)
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{
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adc12_channel_config_t chnl_cfg = {0};
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chnl_cfg.channelNumber = channel;
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chnl_cfg.enableInterruptOnConversionCompleted = false;
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ADC12_SetChannelConfig(adc->adc_base, 0, &chnl_cfg);
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while ((ADC12_GetChannelStatusFlags(adc->adc_base, 0) & kADC12_ChannelConversionCompletedFlag) == 0U)
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{
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}
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return ADC12_GetChannelConversionValue(adc->adc_base, 0);
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}
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static rt_err_t mcx_adc_set_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
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{
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RT_ASSERT(device != RT_NULL);
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struct mcx_adc *adc = device->parent.user_data;
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/* ADC is enabled by global probe. */
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RT_UNUSED(adc);
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return RT_EOK;
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}
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static rt_int16_t mcx_get_vref(struct rt_adc_device *device)
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{
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RT_ASSERT(device != RT_NULL);
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struct mcx_adc *adc = device->parent.user_data;
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return (int16_t)adc->vref;
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}
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static rt_err_t mcx_adc_get_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
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{
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RT_ASSERT(device != RT_NULL);
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struct mcx_adc *adc = device->parent.user_data;
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*value = mcx_adc_get_raw(adc, channel);
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return RT_EOK;
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}
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static rt_uint8_t mcx_adc_get_resolution(struct rt_adc_device *device)
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{
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RT_ASSERT(device != RT_NULL);
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struct mcx_adc *adc = device->parent.user_data;
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return adc->resolution_bits;
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}
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static const struct rt_adc_ops mcx_adc_ops =
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{
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.get_resolution = mcx_adc_get_resolution,
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.enabled = mcx_adc_set_enabled,
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.convert = mcx_adc_get_value,
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.get_vref = mcx_get_vref,
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};
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static int rt_hw_adc_init(void)
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{
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int result = RT_EOK;
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int i = 0;
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for (i = 0; i < sizeof(mcx_adc_obj) / sizeof(mcx_adc_obj[0]); i++)
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{
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struct mcx_adc *adc = &mcx_adc_obj[i];
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CLOCK_SetIpSrc(adc->clock_ip_name, adc->clock_ip_src);
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adc12_config_t cfg;
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ADC12_GetDefaultConfig(&cfg);
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cfg.clockSource = kADC12_ClockSourceAlt0; /* Only available selection. */
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cfg.resolution = kADC12_Resolution12Bit;
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cfg.sampleClockCount = 64;
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ADC12_Init(adc->adc_base, &cfg);
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ADC12_EnableHardwareTrigger(adc->adc_base, false);
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if (ADC12_DoAutoCalibration(adc->adc_base) != kStatus_Success)
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{
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return -RT_ERROR;
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}
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uint32_t vref_raw = mcx_adc_get_raw(adc, ADC_VBG_CH);
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adc->vref = (1U << adc->resolution_bits) * ADC_VBG_VOLT / vref_raw;
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if (rt_hw_adc_register(&mcx_adc_obj[i].adc_device, mcx_adc_obj[i].name, &mcx_adc_ops, &mcx_adc_obj[i]) != RT_EOK)
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{
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return -RT_ERROR;
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}
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif /* BSP_USING_ADC */
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@@ -0,0 +1,170 @@
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/*
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* Copyright (c) 2006-2024 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-08-21 hywing The first version
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*/
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#include <rtdevice.h>
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#include "fsl_lpi2c.h"
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#ifdef RT_USING_I2C
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#define DBG_TAG "drv.i2c"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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enum
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{
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#ifdef BSP_USING_I2C0
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I2C0_INDEX,
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#endif
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#ifdef BSP_USING_I2C1
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I2C1_INDEX,
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#endif
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};
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struct mcx_i2c_bus
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{
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struct rt_i2c_bus_device i2c_bus;
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LPI2C_Type *i2c_base;
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uint32_t baud;
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clock_ip_name_t clock_ip_name;
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clock_ip_src_t clock_ip_src;
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char *name;
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};
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static struct mcx_i2c_bus i2c_buses[] =
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{
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#ifdef BSP_USING_I2C0
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{
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.i2c_base = LPI2C0,
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.baud = 100000U,
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.clock_ip_name = kCLOCK_Lpi2c0,
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.clock_ip_src = kCLOCK_IpSrcSysOscAsync,
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.name = "i2c0",
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},
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#endif
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#ifdef BSP_USING_I2C1
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{
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.i2c_base = LPI2C1,
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.baud = 100000U,
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.clock_ip_name = kCLOCK_Lpi2c1,
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.clock_ip_src = kCLOCK_IpSrcSysOscAsync,
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.name = "i2c1",
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},
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#endif
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};
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static rt_ssize_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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lpi2c_master_transfer_t xfer = {0};
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rt_uint32_t i;
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rt_ssize_t ret = 0;
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struct mcx_i2c_bus *priv = (struct mcx_i2c_bus *)bus;
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for (i = 0; i < num; i++)
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{
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msg = &msgs[i];
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if (msg->flags & RT_I2C_RD)
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{
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xfer.slaveAddress = msg->addr;
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xfer.direction = kLPI2C_Read;
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xfer.subaddress = 0;
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xfer.subaddressSize = 0;
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xfer.data = msg->buf;
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xfer.dataSize = msg->len;
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xfer.flags = kLPI2C_TransferDefaultFlag;
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if (i != 0)
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{
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xfer.flags |= kLPI2C_TransferRepeatedStartFlag;
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}
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if (i != num - 1)
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{
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xfer.flags |= kLPI2C_TransferNoStopFlag;
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}
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if (LPI2C_MasterTransferBlocking(priv->i2c_base, &xfer) != kStatus_Success)
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{
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LOG_D("i2c bus read failed!\n");
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return i;
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}
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}
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else
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{
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xfer.slaveAddress = msg->addr;
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xfer.direction = kLPI2C_Write;
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xfer.subaddress = 0;
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xfer.subaddressSize = 0;
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xfer.data = msg->buf;
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xfer.dataSize = msg->len;
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xfer.flags = kLPI2C_TransferDefaultFlag;
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if (i != 0)
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{
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xfer.flags |= kLPI2C_TransferRepeatedStartFlag;
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}
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if (i != num - 1)
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{
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xfer.flags |= kLPI2C_TransferNoStopFlag;
|
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}
|
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|
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if (LPI2C_MasterTransferBlocking(priv->i2c_base, &xfer) != kStatus_Success)
|
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{
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LOG_D("i2c bus write failed!\n");
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return i;
|
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}
|
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}
|
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}
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ret = i;
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return ret;
|
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}
|
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static const struct rt_i2c_bus_device_ops i2c_ops = {
|
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.master_xfer = lpc_i2c_xfer,
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.slave_xfer = RT_NULL,
|
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.i2c_bus_control = RT_NULL,
|
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};
|
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|
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int rt_hw_i2c_init(void)
|
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{
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int i;
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lpi2c_master_config_t masterConfig;
|
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|
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for (i = 0; i < ARRAY_SIZE(i2c_buses); i++)
|
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{
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struct mcx_i2c_bus *priv = &i2c_buses[i];
|
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|
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CLOCK_SetIpSrc(priv->clock_ip_name, priv->clock_ip_src);
|
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|
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LPI2C_MasterGetDefaultConfig(&masterConfig);
|
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masterConfig.baudRate_Hz = priv->baud;
|
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|
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LPI2C_MasterInit(priv->i2c_base, &masterConfig, CLOCK_GetIpFreq(priv->clock_ip_name));
|
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|
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priv->i2c_bus.ops = &i2c_ops;
|
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|
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rt_i2c_bus_device_register(&priv->i2c_bus, priv->name);
|
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}
|
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|
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return RT_EOK;
|
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}
|
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
|
||||
|
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#endif /* RT_USING_I2C */
|
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|
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|
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,22 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-03-13 Liuguang the first version.
|
||||
* 2018-03-19 Liuguang add GPIO interrupt mode support.
|
||||
* 2024-02-06 yandld The first version for MCX
|
||||
*/
|
||||
|
||||
#ifndef __DRV_PIN_H__
|
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#define __DRV_PIN_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
|
||||
extern int rt_hw_pin_init(void);
|
||||
|
||||
#endif /* __DRV_PIN_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,159 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-08-1 hywing The first version for MCXA
|
||||
*/
|
||||
#include "rtdevice.h"
|
||||
#include "drv_spi.h"
|
||||
#include "fsl_lpspi.h"
|
||||
|
||||
|
||||
#ifdef RT_USING_SPI
|
||||
|
||||
#define DBG_TAG "drv.spi"
|
||||
#define DBG_LVL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
enum
|
||||
{
|
||||
#ifdef BSP_USING_SPI0
|
||||
SPI0_INDEX,
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI1
|
||||
SPI1_INDEX,
|
||||
#endif
|
||||
};
|
||||
|
||||
struct mcx_spi_bus
|
||||
{
|
||||
struct rt_spi_bus spi_bus;
|
||||
LPSPI_Type *spi_base;
|
||||
clock_ip_name_t clock_ip_name;
|
||||
clock_ip_src_t clock_ip_src;
|
||||
rt_sem_t sem;
|
||||
char *name;
|
||||
};
|
||||
|
||||
static struct mcx_spi_bus mcx_spi_buses[] =
|
||||
{
|
||||
#ifdef BSP_USING_SPI0
|
||||
{
|
||||
.spi_base = LPSPI0,
|
||||
.clock_ip_name = kCLOCK_Lpspi0,
|
||||
.clock_ip_src = kCLOCK_IpSrcSysOscAsync,
|
||||
.name = "spi0",
|
||||
},
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI1
|
||||
{
|
||||
.spi_base = LPSPI1,
|
||||
.clock_ip_name = kCLOCK_Lpspi1,
|
||||
.clock_ip_src = kCLOCK_IpSrcSysOscAsync,
|
||||
.name = "spi1",
|
||||
},
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI2
|
||||
{
|
||||
.spi_base = LPSPI2,
|
||||
.clock_ip_name = kCLOCK_Lpspi2,
|
||||
.clock_ip_src = kCLOCK_IpSrcSysOscAsync,
|
||||
.name = "spi2",
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin)
|
||||
{
|
||||
struct rt_spi_device *spi_device = rt_malloc(sizeof(struct rt_spi_device));
|
||||
if (!spi_device)
|
||||
{
|
||||
return -RT_ENOMEM;
|
||||
}
|
||||
|
||||
return rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, pin, NULL);
|
||||
}
|
||||
|
||||
static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
|
||||
static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
|
||||
{
|
||||
lpspi_transfer_t transfer = {0};
|
||||
status_t status;
|
||||
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
RT_ASSERT(device->bus != RT_NULL);
|
||||
RT_ASSERT(device->bus->parent.user_data != RT_NULL);
|
||||
|
||||
struct mcx_spi_bus *spi = device->bus->parent.user_data;
|
||||
|
||||
if (message->cs_take)
|
||||
{
|
||||
rt_pin_write(device->cs_pin, PIN_LOW);
|
||||
}
|
||||
|
||||
transfer.dataSize = message->length;
|
||||
transfer.rxData = (uint8_t *)(message->recv_buf);
|
||||
transfer.txData = (uint8_t *)(message->send_buf);
|
||||
transfer.configFlags = kLPSPI_MasterPcs0;
|
||||
|
||||
// Use blocking transfer instead of DMA
|
||||
status = LPSPI_MasterTransferBlocking(spi->spi_base, &transfer);
|
||||
|
||||
if (message->cs_release)
|
||||
{
|
||||
rt_pin_write(device->cs_pin, PIN_HIGH);
|
||||
}
|
||||
|
||||
if (status != kStatus_Success)
|
||||
{
|
||||
return 0; // Transfer failed
|
||||
}
|
||||
|
||||
return message->length;
|
||||
}
|
||||
|
||||
|
||||
static struct rt_spi_ops lpc_spi_ops =
|
||||
{
|
||||
.configure = spi_configure,
|
||||
.xfer = spixfer};
|
||||
|
||||
int rt_hw_spi_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mcx_spi_buses); i++)
|
||||
{
|
||||
struct mcx_spi_bus *priv = &mcx_spi_buses[i];
|
||||
|
||||
|
||||
CLOCK_SetIpSrc(priv->clock_ip_name, priv->clock_ip_src);
|
||||
|
||||
priv->spi_bus.parent.user_data = &mcx_spi_buses[i];
|
||||
priv->sem = rt_sem_create("sem_spi", 0, RT_IPC_FLAG_FIFO);
|
||||
|
||||
lpspi_master_config_t masterConfig;
|
||||
LPSPI_MasterGetDefaultConfig(&masterConfig);
|
||||
masterConfig.baudRate = 10 * 1000 * 1000;
|
||||
masterConfig.pcsToSckDelayInNanoSec = 1000000000U / masterConfig.baudRate * 1U;
|
||||
masterConfig.lastSckToPcsDelayInNanoSec = 1000000000U / masterConfig.baudRate * 1U;
|
||||
masterConfig.betweenTransferDelayInNanoSec = 1000000000U / masterConfig.baudRate * 1U;
|
||||
|
||||
LPSPI_MasterInit(priv->spi_base, &masterConfig, CLOCK_GetIpFreq(priv->clock_ip_name));
|
||||
|
||||
rt_spi_bus_register(&priv->spi_bus, priv->name, &lpc_spi_ops);
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_spi_init);
|
||||
|
||||
#endif /* RT_USING_SPI */
|
||||
|
||||
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-03-22 Jisheng Zhang The first version for mcxn
|
||||
*/
|
||||
|
||||
#ifndef DRV_SPI_H
|
||||
#define DRV_SPI_H
|
||||
|
||||
#include <rtdevice.h>
|
||||
|
||||
rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin);
|
||||
|
||||
int rt_hw_spi_init(void);
|
||||
|
||||
#endif //DRV_SPI_H
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-02-06 yandld The first version for MCX
|
||||
*/
|
||||
|
||||
#ifndef __DRV_UART_H__
|
||||
#define __DRV_UART_H__
|
||||
|
||||
extern int rt_hw_uart_init(void);
|
||||
|
||||
|
||||
#endif /* __DRV_UART_H__ */
|
||||
@@ -0,0 +1,121 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-11-25 hywing The first version for NXP MCXA153 Board
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "drv_wdt.h"
|
||||
|
||||
#include "fsl_wdog32.h"
|
||||
#include "fsl_clock.h"
|
||||
|
||||
#ifdef RT_USING_WDT
|
||||
|
||||
#define WDT WDOG
|
||||
#define WDT_CLOCK_SOURCE kWDOG32_ClockSource1 /* 0: Bus, 1: LPO, 2: SOSC, 3: SIRC */
|
||||
#define WDT_CLOCK_SOURCE_FREQ (128 * 1000 / 256) /* 128kHz LPO divided by 256 */
|
||||
|
||||
#define APP_WDT_IRQn WDOG_EWM_IRQn
|
||||
#define APP_WDT_IRQ_HANDLER WDOG_EWM_IRQHandler
|
||||
|
||||
struct mcx_wdt
|
||||
{
|
||||
rt_watchdog_t watchdog;
|
||||
WDOG_Type *wdt_base;
|
||||
};
|
||||
|
||||
static struct mcx_wdt wdt_dev;
|
||||
|
||||
void APP_WDT_IRQ_HANDLER(void)
|
||||
{
|
||||
/* ---- There's no WARN feature for WDOG32, will reset. ---- */
|
||||
for (;;)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
static rt_err_t wdt_init(rt_watchdog_t *wdt)
|
||||
{
|
||||
wdog32_config_t config;
|
||||
|
||||
WDOG32_GetDefaultConfig(&config);
|
||||
|
||||
config.enableWdog32 = false;
|
||||
config.clockSource = WDT_CLOCK_SOURCE;
|
||||
config.prescaler = kWDOG32_ClockPrescalerDivide256;
|
||||
config.timeoutValue = WDT_CLOCK_SOURCE_FREQ * 5;
|
||||
config.enableInterrupt = true;
|
||||
|
||||
WDOG32_Init(WDT, &config);
|
||||
NVIC_EnableIRQ(APP_WDT_IRQn);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
|
||||
{
|
||||
/* Feed fast path */
|
||||
if (cmd == RT_DEVICE_CTRL_WDT_KEEPALIVE)
|
||||
{
|
||||
WDOG32_Refresh(wdt_dev.wdt_base);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
__disable_irq();
|
||||
WDOG32_Unlock(wdt_dev.wdt_base);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_WDT_START:
|
||||
WDOG32_Enable(wdt_dev.wdt_base);
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_WDT_STOP:
|
||||
WDOG32_Disable(wdt_dev.wdt_base);
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
|
||||
if (arg != RT_NULL)
|
||||
{
|
||||
uint32_t timeout = *((uint32_t *)arg);
|
||||
timeout = timeout * WDT_CLOCK_SOURCE_FREQ;
|
||||
WDOG32_SetTimeoutValue(wdt_dev.wdt_base, timeout);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
__enable_irq();
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static struct rt_watchdog_ops wdt_ops =
|
||||
{
|
||||
wdt_init,
|
||||
wdt_control,
|
||||
};
|
||||
|
||||
int rt_hw_wdt_init(void)
|
||||
{
|
||||
wdt_dev.wdt_base = WDT;
|
||||
wdt_dev.watchdog.ops = &wdt_ops;
|
||||
|
||||
if (rt_hw_watchdog_register(&wdt_dev.watchdog, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK)
|
||||
{
|
||||
rt_kprintf("wdt register failed\n");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
INIT_BOARD_EXPORT(rt_hw_wdt_init);
|
||||
|
||||
#endif /* RT_USING_WDT */
|
||||
@@ -0,0 +1,19 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-11-25 hywing The first version for NXP MCXA153 Board
|
||||
*/
|
||||
|
||||
#ifndef __DRV_WDT_H__
|
||||
#define __DRV_WDT_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
int rt_hw_wdt_init(void);
|
||||
|
||||
#endif /* __DRV_WDT_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,17 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
BSP_DIR := .
|
||||
|
||||
RTT_DIR := ../../../../..
|
||||
|
||||
PKGS_DIR := packages
|
||||
|
||||
config SOC_MCX
|
||||
bool
|
||||
select ARCH_ARM_CORTEX_M4
|
||||
default y
|
||||
|
||||
source "$(RTT_DIR)/Kconfig"
|
||||
osource "$PKGS_DIR/Kconfig"
|
||||
rsource "../Libraries/Kconfig"
|
||||
rsource "board/Kconfig"
|
||||
@@ -0,0 +1,14 @@
|
||||
# for module compiling
|
||||
import os
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,83 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
def bsp_pkg_check():
|
||||
import subprocess
|
||||
|
||||
check_paths = [
|
||||
os.path.join("packages", "nxp-mcx-cmsis-latest"),
|
||||
os.path.join("packages", "nxp-mcx-series-latest"),
|
||||
]
|
||||
|
||||
need_update = not all(os.path.exists(p) for p in check_paths)
|
||||
|
||||
if need_update:
|
||||
print("\n===============================================================================")
|
||||
print("Dependency packages missing, please running 'pkgs --update'...")
|
||||
print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...")
|
||||
print("===============================================================================")
|
||||
exit(1)
|
||||
|
||||
RegisterPreBuildingAction(bsp_pkg_check)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
if rtconfig.PLATFORM == 'armcc':
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
|
||||
# overwrite cflags, because cflags has '--C99'
|
||||
CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES')
|
||||
else:
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
|
||||
CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
|
||||
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
|
||||
if os.path.exists(SDK_ROOT + '/Libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/Libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/Libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,15 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('*.c')
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,73 @@
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef BSP_USING_RW007
|
||||
#include <rtdbg.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#include <spi_wifi_rw007.h>
|
||||
|
||||
#define BOARD_RW007_DEVICE_NAME "rw007"
|
||||
|
||||
extern void spi_wifi_isr(int vector);
|
||||
|
||||
static void rw007_gpio_init(void)
|
||||
{
|
||||
/* Configure IO */
|
||||
rt_pin_mode(BOARD_RW007_RST_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_mode(BOARD_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN);
|
||||
|
||||
/* Reset rw007 and config mode */
|
||||
rt_pin_write(BOARD_RW007_RST_PIN, PIN_LOW);
|
||||
|
||||
rt_thread_delay(rt_tick_from_millisecond(100));
|
||||
rt_pin_write(BOARD_RW007_RST_PIN, PIN_HIGH);
|
||||
|
||||
/* Wait rw007 ready(exit busy stat) */
|
||||
while (!rt_pin_read(BOARD_RW007_INT_BUSY_PIN))
|
||||
{
|
||||
rt_thread_delay(5);
|
||||
}
|
||||
|
||||
rt_thread_delay(rt_tick_from_millisecond(200));
|
||||
rt_pin_mode(BOARD_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP);
|
||||
}
|
||||
|
||||
int wifi_spi_device_init(void)
|
||||
{
|
||||
int ret = 0;
|
||||
char sn_version[32];
|
||||
|
||||
struct rt_spi_device *spi_device = rt_malloc(sizeof(struct rt_spi_device));
|
||||
if (!spi_device) return -1;
|
||||
|
||||
rw007_gpio_init();
|
||||
ret = rt_spi_bus_attach_device_cspin(spi_device, BOARD_RW007_DEVICE_NAME, BOARD_RW007_SPI_BUS_NAME, BOARD_RW007_CS_PIN, RT_NULL);
|
||||
if (ret != RT_EOK) return -2;
|
||||
|
||||
rt_hw_wifi_init("rw007");
|
||||
|
||||
rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION);
|
||||
rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP);
|
||||
|
||||
rw007_sn_get(sn_version);
|
||||
rt_kprintf("\nrw007 sn: [%s]\n", sn_version);
|
||||
rw007_version_get(sn_version);
|
||||
rt_kprintf("rw007 ver: [%s]\n\n", sn_version);
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_APP_EXPORT(wifi_spi_device_init);
|
||||
|
||||
static void int_wifi_irq(void *p)
|
||||
{
|
||||
((void)p);
|
||||
spi_wifi_isr(0);
|
||||
}
|
||||
|
||||
void spi_wifi_hw_init(void)
|
||||
{
|
||||
rt_pin_attach_irq(BOARD_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0);
|
||||
rt_pin_irq_enable(BOARD_RW007_INT_BUSY_PIN, RT_TRUE);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,63 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
* Copyright (c) 2019-2020, Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-10-24 Magicoe first version
|
||||
* 2020-01-10 Kevin/Karl Add PS demo
|
||||
* 2020-09-21 supperthomas fix the main.c
|
||||
*
|
||||
*/
|
||||
|
||||
#include <rtdevice.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "drv_pin.h"
|
||||
|
||||
#define LED_PIN ((2 * 32) + 13) /* PTC13, RGB LED RED */
|
||||
#define BTN_PIN ((2 * 32) + 10) /* PTC10, SW3 (User) */
|
||||
|
||||
static rt_bool_t s_led_state = RT_FALSE; /* Current LED state */
|
||||
|
||||
static void app_btn_irq_callback(void *args)
|
||||
{
|
||||
RT_UNUSED(args);
|
||||
|
||||
rt_kprintf("SW3 pressed\n");
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_write(LED_PIN, PIN_LOW);
|
||||
|
||||
rt_pin_mode(BTN_PIN, PIN_MODE_INPUT_PULLUP);
|
||||
rt_pin_attach_irq(BTN_PIN, PIN_IRQ_MODE_FALLING, app_btn_irq_callback, RT_NULL);
|
||||
rt_pin_irq_enable(BTN_PIN, PIN_IRQ_ENABLE);
|
||||
|
||||
#if defined(__CC_ARM)
|
||||
rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
|
||||
#elif defined(__clang__)
|
||||
rt_kprintf("using armclang, version: %d\n", __ARMCC_VERSION);
|
||||
#elif defined(__ICCARM__)
|
||||
rt_kprintf("using iccarm, version: %d\n", __VER__);
|
||||
#elif defined(__GNUC__)
|
||||
rt_kprintf("using gcc, version: %d.%d\n", __GNUC__, __GNUC_MINOR__);
|
||||
#endif
|
||||
|
||||
rt_kprintf("NXP MCXE247\r\n");
|
||||
|
||||
while (1)
|
||||
{
|
||||
/* Toggle LED state */
|
||||
s_led_state = !s_led_state;
|
||||
rt_pin_write(LED_PIN, s_led_state ? PIN_HIGH : PIN_LOW);
|
||||
|
||||
rt_thread_mdelay(500); /* Delay 500mS */
|
||||
}
|
||||
}
|
||||
|
||||
// end file
|
||||
@@ -0,0 +1,175 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_MCXE247
|
||||
bool
|
||||
select SOC_MCXE247_SERIES
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
config BSP_USING_PIN
|
||||
bool "Enable GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
config BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
select RT_USING_UART
|
||||
default y
|
||||
|
||||
if BSP_USING_UART
|
||||
config BSP_USING_UART0
|
||||
bool "Enable LPUART0"
|
||||
default n
|
||||
|
||||
config BSP_USING_UART1
|
||||
bool "Enable LPUART1"
|
||||
default n
|
||||
|
||||
config BSP_USING_UART2
|
||||
bool "Enable LPUART2"
|
||||
default y
|
||||
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
config BSP_USING_I2C
|
||||
bool "Enable I2C"
|
||||
select RT_USING_I2C
|
||||
default y
|
||||
|
||||
if BSP_USING_I2C
|
||||
config BSP_USING_I2C0
|
||||
bool "Enable LPI2C0"
|
||||
default n
|
||||
|
||||
config BSP_USING_I2C1
|
||||
bool "Enable LPI2C1"
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
config BSP_USING_SPI
|
||||
bool "Enable SPI"
|
||||
select RT_USING_SPI
|
||||
default y
|
||||
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI0
|
||||
bool "Enable LPSPI0"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable LPSPI1"
|
||||
default y
|
||||
|
||||
config BSP_USING_SPI2
|
||||
bool "Enable LPSPI2"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
config BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
select RT_USING_ADC
|
||||
default y
|
||||
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC0
|
||||
bool "Enable ADC0"
|
||||
default n
|
||||
|
||||
config BSP_USING_ADC1
|
||||
bool "Enable ADC1"
|
||||
default n
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_RTC
|
||||
bool "Enable RTC"
|
||||
select RT_USING_RTC
|
||||
default y
|
||||
|
||||
config BSP_USING_WDT
|
||||
bool "Enable WatchDog"
|
||||
select RT_USING_WDT
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_HWTIMER
|
||||
config BSP_USING_HWTIMER
|
||||
bool "Enable Timer"
|
||||
select RT_USING_HWTIMER
|
||||
default y
|
||||
|
||||
if BSP_USING_HWTIMER
|
||||
config BSP_USING_CTIMER0
|
||||
bool "Enable CIMER0"
|
||||
default y
|
||||
|
||||
config BSP_USING_CTIMER1
|
||||
bool "Enable CIMER1"
|
||||
default n
|
||||
|
||||
config BSP_USING_CTIMER3
|
||||
bool "Enable CIMER3"
|
||||
default n
|
||||
|
||||
config BSP_USING_CTIMER4
|
||||
bool "Enable CIMER4"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
config BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
select RT_USING_PWM
|
||||
default n
|
||||
|
||||
if BSP_USING_PWM
|
||||
config BSP_USING_PWM0
|
||||
bool "Enable eFlex PWM0"
|
||||
default n
|
||||
config BSP_USING_PWM1
|
||||
bool "Enable eFlex PWM1"
|
||||
default n
|
||||
config BSP_USING_PWM2
|
||||
bool "Enable eFlex PWM2"
|
||||
default n
|
||||
endif
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
menuconfig BSP_USING_RW007
|
||||
bool "Enable RW007"
|
||||
default n
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI1
|
||||
select PKG_USING_RW007
|
||||
select RT_USING_MEMPOOL
|
||||
select RW007_NOT_USE_EXAMPLE_DRIVERS
|
||||
|
||||
if BSP_USING_RW007
|
||||
config BOARD_RW007_SPI_BUS_NAME
|
||||
string "RW007 BUS NAME"
|
||||
default "spi1"
|
||||
|
||||
config BOARD_RW007_CS_PIN
|
||||
int "CS pin index"
|
||||
default 16
|
||||
|
||||
config BOARD_RW007_INT_BUSY_PIN
|
||||
int "INT/BUSY pin index"
|
||||
default 143
|
||||
|
||||
config BOARD_RW007_RST_PIN
|
||||
hex "RESET pin index"
|
||||
default 42
|
||||
endif
|
||||
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,125 @@
|
||||
/*
|
||||
* Copyright 2025 NXP
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/* RT-Thread Configuration */
|
||||
#include "rtconfig.h"
|
||||
|
||||
/* SDK drivers */
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_port.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
static void BOARD_InitUARTPins(void);
|
||||
static void BOARD_InitI2CPins(void);
|
||||
static void BOARD_InitSPIPins(void);
|
||||
|
||||
void BOARD_InitBootPins(void)
|
||||
{
|
||||
BOARD_InitPins();
|
||||
BOARD_InitUARTPins();
|
||||
BOARD_InitI2CPins();
|
||||
BOARD_InitSPIPins();
|
||||
}
|
||||
|
||||
static void BOARD_InitUARTPins(void)
|
||||
{
|
||||
#if defined(BSP_USING_UART0)
|
||||
BOARD_InitUART0Pins();
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
BOARD_InitUART1Pins();
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_UART2)
|
||||
BOARD_InitUART2Pins();
|
||||
#endif
|
||||
}
|
||||
|
||||
static void BOARD_InitI2CPins(void)
|
||||
{
|
||||
#if defined(BSP_USING_I2C0)
|
||||
BOARD_InitI2C0Pins();
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_I2C1)
|
||||
BOARD_InitI2C1Pins();
|
||||
#endif
|
||||
}
|
||||
|
||||
static void BOARD_InitSPIPins(void)
|
||||
{
|
||||
#if defined(BSP_USING_SPI0)
|
||||
BOARD_InitSPI0Pins();
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_SPI1)
|
||||
BOARD_InitSPI1Pins();
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_SPI2)
|
||||
BOARD_InitSPI2Pins();
|
||||
#endif
|
||||
}
|
||||
|
||||
void BOARD_InitPins(void)
|
||||
{
|
||||
CLOCK_EnableClock(kCLOCK_PortA);
|
||||
CLOCK_EnableClock(kCLOCK_PortB);
|
||||
CLOCK_EnableClock(kCLOCK_PortC);
|
||||
CLOCK_EnableClock(kCLOCK_PortD);
|
||||
CLOCK_EnableClock(kCLOCK_PortE);
|
||||
}
|
||||
|
||||
void BOARD_InitUART0Pins(void)
|
||||
{
|
||||
/* UART 0 pins are not used on this board. */
|
||||
}
|
||||
|
||||
void BOARD_InitUART1Pins(void)
|
||||
{
|
||||
PORT_SetPinMux(PORTC, 8U, kPORT_MuxAlt2); /* Default route to UART TX/RX pins on MikroBUS */
|
||||
PORT_SetPinMux(PORTC, 9U, kPORT_MuxAlt2); /* Default route to UART TX/RX pins on MikroBUS */
|
||||
}
|
||||
|
||||
void BOARD_InitUART2Pins(void)
|
||||
{
|
||||
PORT_SetPinMux(PORTD, 17U, kPORT_MuxAlt3); /* Default route to Arduino D0/D1 and MCU-Link Virtual COM Port */
|
||||
PORT_SetPinMux(PORTE, 12U, kPORT_MuxAlt3); /* Default route to Arduino D0/D1 and MCU-Link Virtual COM Port */
|
||||
}
|
||||
|
||||
void BOARD_InitI2C0Pins(void)
|
||||
{
|
||||
PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt3); /* Default route to I2C SCL/SDA pins on MikroBUS */
|
||||
PORT_SetPinMux(PORTA, 3U, kPORT_MuxAlt3); /* Default route to I2C SCL/SDA pins on MikroBUS */
|
||||
}
|
||||
|
||||
void BOARD_InitI2C1Pins(void)
|
||||
{
|
||||
PORT_SetPinMux(PORTD, 8U, kPORT_MuxAlt2); /* Default route to Arduino D18/D19 */
|
||||
PORT_SetPinMux(PORTD, 9U, kPORT_MuxAlt2); /* Default route to Arduino D18/D19 */
|
||||
}
|
||||
|
||||
void BOARD_InitSPI0Pins(void)
|
||||
{
|
||||
PORT_SetPinMux(PORTB, 3U, kPORT_MuxAlt3); /* Default route to SPI SCK/SIN/SOUT pins on MikroBUS */
|
||||
PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt2); /* Default route to SPI SCK/SIN/SOUT pins on MikroBUS */
|
||||
PORT_SetPinMux(PORTE, 2U, kPORT_MuxAlt2); /* Default route to SPI SCK/SIN/SOUT pins on MikroBUS */
|
||||
}
|
||||
|
||||
void BOARD_InitSPI1Pins(void)
|
||||
{
|
||||
PORT_SetPinMux(PORTB, 14U, kPORT_MuxAlt3); /* Default route to Arduino D11/D12/D13 */
|
||||
PORT_SetPinMux(PORTB, 15U, kPORT_MuxAlt3); /* Default route to Arduino D11/D12/D13 */
|
||||
PORT_SetPinMux(PORTD, 2U, kPORT_MuxAlt3); /* Default route to Arduino D11/D12/D13 */
|
||||
}
|
||||
|
||||
void BOARD_InitSPI2Pins(void)
|
||||
{
|
||||
PORT_SetPinMux(PORTA, 8U, kPORT_MuxAlt3); /* Default route to SPI SCK/SIN/SOUT pins on PMOD (DNP by default) */
|
||||
PORT_SetPinMux(PORTC, 15U, kPORT_MuxAlt3); /* Default route to SPI SCK/SIN/SOUT pins on PMOD (DNP by default) */
|
||||
PORT_SetPinMux(PORTE, 16U, kPORT_MuxAlt3); /* Default route to SPI SCK/SIN/SOUT pins on PMOD (DNP by default) */
|
||||
}
|
||||
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* Copyright 2025 NXP
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PIN_MUX_H
|
||||
#define PIN_MUX_H
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void BOARD_InitBootPins(void);
|
||||
void BOARD_InitPins(void);
|
||||
void BOARD_InitUART0Pins(void);
|
||||
void BOARD_InitUART1Pins(void);
|
||||
void BOARD_InitUART2Pins(void);
|
||||
void BOARD_InitI2C0Pins(void);
|
||||
void BOARD_InitI2C1Pins(void);
|
||||
void BOARD_InitSPI0Pins(void);
|
||||
void BOARD_InitSPI1Pins(void);
|
||||
void BOARD_InitSPI2Pins(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PIN_MUX_H */
|
||||
@@ -0,0 +1,25 @@
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add the general drivers.
|
||||
src = Split("""
|
||||
board.c
|
||||
MCUX_Config/board/clock_config.c
|
||||
MCUX_Config/board/pin_mux.c
|
||||
""")
|
||||
|
||||
if GetDepend(['BSP_USING_RW007']):
|
||||
src += Glob('ports/drv_spi_sample_rw007.c')
|
||||
|
||||
CPPPATH = [cwd, cwd + '/MCUX_Config/board']
|
||||
CPPDEFINES = ['DEBUG', 'CPU_MCXE247VLQ']
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,104 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
* Copyright (c) 2019-2020, Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2024-02-06 yandld first implementation
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "clock_config.h"
|
||||
#include "drv_uart.h"
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initial board.
|
||||
*/
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
BOARD_InitBootPins();
|
||||
BOARD_InitBootClocks();
|
||||
|
||||
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
/* set pend exception priority */
|
||||
NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
|
||||
|
||||
/*init uart device*/
|
||||
rt_hw_uart_init();
|
||||
|
||||
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
/* initialization board with RT-Thread Components */
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END);
|
||||
rt_system_heap_init((void *)HEAP_BEGIN, (void *)(HEAP_END));
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void rt_hw_us_delay(rt_uint32_t us)
|
||||
{
|
||||
rt_uint32_t ticks;
|
||||
rt_uint32_t told, tnow, tcnt = 0;
|
||||
rt_uint32_t reload = SysTick->LOAD;
|
||||
|
||||
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1)
|
||||
{
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told)
|
||||
{
|
||||
if (tnow < told)
|
||||
{
|
||||
tcnt += told - tnow;
|
||||
}
|
||||
else
|
||||
{
|
||||
tcnt += reload - tnow + told;
|
||||
}
|
||||
told = tnow;
|
||||
if (tcnt >= ticks)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will called when memory fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
extern void HardFault_Handler(void);
|
||||
|
||||
rt_kprintf("Memory Fault!\n");
|
||||
HardFault_Handler();
|
||||
}
|
||||
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-09-22 Bernard add board.h to this bsp
|
||||
* 2010-02-04 Magicoe add board.h to LPC176x bsp
|
||||
* 2013-12-18 Bernard porting to LPC4088 bsp
|
||||
* 2017-08-02 XiaoYang porting to LPC54608 bsp
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "clock_config.h"
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_gpio.h"
|
||||
#include "pin_mux.h"
|
||||
#include "fsl_edma.h"
|
||||
|
||||
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
|
||||
|
||||
// </RDTConfigurator>
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern int Image$$ARM_LIB_HEAP$$ZI$$Base;
|
||||
extern int Image$$ARM_LIB_STACK$$ZI$$Base;
|
||||
#define HEAP_BEGIN ((void *)&Image$$ARM_LIB_HEAP$$ZI$$Base)
|
||||
#define HEAP_END ((void *)&Image$$ARM_LIB_STACK$$ZI$$Base)
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma section = "HEAP"
|
||||
#define HEAP_BEGIN (__segment_end("HEAP"))
|
||||
extern void __RTT_HEAP_END;
|
||||
#define HEAP_END (&__RTT_HEAP_END)
|
||||
#elif defined(__GNUC__)
|
||||
extern int __HeapBase;
|
||||
extern int __HeapLimit;
|
||||
#define HEAP_BEGIN ((void *)&__HeapBase)
|
||||
#define HEAP_END ((void *)&__HeapLimit)
|
||||
#endif
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,81 @@
|
||||
#!armclang --target=arm-arm-none-eabi -mcpu=cortex-m4 -E -x c
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MCXE247VLL
|
||||
** MCXE247VLQ
|
||||
**
|
||||
** Compiler: Keil ARM C/C++ Compiler
|
||||
** Reference manual: MCXE24x RM Rev.1
|
||||
** Version: rev. 1.0, 2025-02-21
|
||||
** Build: b250311
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the Keil ARM C/C++ Compiler
|
||||
**
|
||||
** Copyright 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016-2025 NXP
|
||||
** SPDX-License-Identifier: BSD-3-Clause
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
#define m_interrupts_start 0x00000000
|
||||
#define m_interrupts_size 0x00000400
|
||||
|
||||
#define m_flash_config_start 0x00000400
|
||||
#define m_flash_config_size 0x00000010
|
||||
|
||||
#define m_text_start 0x00000410
|
||||
#define m_text_size 0x0017FBF0
|
||||
|
||||
#define m_data_start 0x1FFE0000
|
||||
#define m_data_size 0x00020000
|
||||
|
||||
#define m_data_2_start 0x20000000
|
||||
#define m_data_2_size 0x0001F000
|
||||
|
||||
/* Sizes */
|
||||
#if (defined(__stack_size__))
|
||||
#define Stack_Size __stack_size__
|
||||
#else
|
||||
#define Stack_Size 0x0400
|
||||
#endif
|
||||
|
||||
#if (defined(__heap_size__))
|
||||
#define Heap_Size __heap_size__
|
||||
#else
|
||||
#define Heap_Size 0x0400
|
||||
#endif
|
||||
|
||||
LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
|
||||
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
|
||||
* (.isr_vector,+FIRST)
|
||||
}
|
||||
ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
|
||||
* (.FlashConfig,+FIRST)
|
||||
}
|
||||
ER_m_text m_text_start m_text_size { ; load address = execution address
|
||||
* (InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
RW_m_data m_data_start m_data_size { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
* (RamFunction)
|
||||
* (NonCacheable.init)
|
||||
* (*NonCacheable)
|
||||
* (CodeQuickAccess)
|
||||
* (DataQuickAccess)
|
||||
}
|
||||
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
ARM_LIB_HEAP ((ImageLimit(RW_m_data_2) == m_data_2_start) ? m_data_2_start : +0) EMPTY Heap_Size { ; Heap region growing up
|
||||
}
|
||||
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
|
||||
}
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,198 @@
|
||||
import os
|
||||
import sys
|
||||
|
||||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='cortex-m4'
|
||||
CROSS_TOOL='gcc'
|
||||
BOARD_NAME = 'frdm-mcxe247'
|
||||
BSP_LIBRARY_TYPE = 'MCXE247'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
|
||||
# cross_tool provides the cross compiler
|
||||
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armclang'
|
||||
EXEC_PATH = r'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iccarm'
|
||||
EXEC_PATH = r'C:\Program Files\IAR Systems\Embedded Workbench 9.1'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
#BUILD = 'release'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
STRIP = PREFIX + 'strip'
|
||||
|
||||
DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -Wall -D__FPU_PRESENT'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__START=entry -D__STARTUP_CLEAR_BSS'
|
||||
LFLAGS = DEVICE + ' -specs=nano.specs -specs=nosys.specs -Wl,--defsym=__heap_size__=0x10000,--gc-sections,-Map=rtthread.map,--print-memory-usage -Tboard/linker_scripts/MCXE247_flash.ld'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -gdwarf-2'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
CFLAGS += ' -O0'
|
||||
else:
|
||||
CFLAGS += ' -O2 -Os'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary --remove-section=.boot_data --remove-section=.image_vertor_table --remove-section=.ncache $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
# module setting
|
||||
CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti'
|
||||
CXXFLAGS += CFLAGS
|
||||
|
||||
M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
|
||||
M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
|
||||
M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' + \
|
||||
' -shared -fPIC -nostartfiles -static-libgcc'
|
||||
M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
CXX = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu ' + CPU + '.fp.sp'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --libpath "' + EXEC_PATH + '/ARM/ARMCC/lib" --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter "./MCXE247_flash.scf" '
|
||||
|
||||
LFLAGS += ' --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab)'
|
||||
|
||||
CFLAGS += ' --diag_suppress=66,1296,186,6134'
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' --c99'
|
||||
|
||||
POST_ACTION = 'fromelf -z $TARGET'
|
||||
# POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'armclang':
|
||||
# toolchains
|
||||
CC = 'armclang'
|
||||
CXX = 'armclang'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu Cortex-M4 '
|
||||
CFLAGS = ' --target=arm-arm-none-eabi'
|
||||
CFLAGS += ' -mcpu=' + CPU
|
||||
CFLAGS += ' -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
|
||||
CFLAGS += ' -gdwarf-3 -ffunction-sections '
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
|
||||
LFLAGS += ' --list rt-thread.map '
|
||||
LFLAGS += r' --strict --scatter "board\linker_scripts\MCXE247_flash.sct" '
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
|
||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
|
||||
|
||||
EXEC_PATH += '/ARM/ARMCLANG/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O1' # armclang recommend
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
CFLAGS += ' -std=c99'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iccarm':
|
||||
CC = 'iccarm'
|
||||
CXX = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = ' -D__FPU_PRESENT'
|
||||
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=' + CPU
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' -Ol'
|
||||
CFLAGS += ' --use_c++_inline'
|
||||
|
||||
AFLAGS = ''
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu ' + CPU
|
||||
AFLAGS += ' --fpu None'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = ' --config "board/linker_scripts/MCXE247_flash.icf"'
|
||||
LFLAGS += ' --redirect _Printf=_PrintfTiny'
|
||||
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), '..', 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
|
||||
@@ -0,0 +1,172 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc; *.md</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>rtthread-frdm-mcxe247</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>0</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>BIN\UL2CM3.DLL</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD1FFE0000 -FC3F000 -FN1 -FF0MCXE247_P1536_4KB_SEC -FS00 -FL0180000 -FP0($$Device:MCXE247VLQ$devices\MCXE247\arm\MCXE247_P1536_4KB_SEC.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
</ProjectOpt>
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user