mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-11-09 20:45:41 +08:00
Merge pull request #460 from ArdaFu/master
[cpu] Split ARM926 cpu code from SAM9260 BSP
This commit is contained in:
Bernard Xiong committed
commit
97a8426ce0
27 files changed
+2868
-1388
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@@ -47,19 +47,18 @@ extern void rt_application_init(void);
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/*@{*/
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#if defined(__CC_ARM)
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extern int Image$$ER_ZI$$ZI$$Base;
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extern int Image$$ER_ZI$$ZI$$Length;
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extern int Image$$ER_ZI$$ZI$$Limit;
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||||
extern int Image$$ER_ZI$$ZI$$Limit;
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#define HEAP_START ((void*)&Image$$ER_ZI$$ZI$$Limit)
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#elif (defined (__GNUC__))
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rt_uint8_t _irq_stack_start[1024];
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rt_uint8_t _fiq_stack_start[1024];
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rt_uint8_t _undefined_stack_start[512];
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rt_uint8_t _abort_stack_start[512];
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rt_uint8_t _svc_stack_start[4096] SECTION(".nobss");
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extern unsigned char __bss_start;
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extern unsigned char __bss_end;
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extern unsigned char __bss_end__;
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#define HEAP_START ((void*)&__bss_end__)
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#elif (defined (__ICCARM__))
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#pragma section="HEAP"
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#define HEAP_START (__section_begin("HEAP"))
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#endif
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#define HEAP_END ((void*)0x24000000)
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#ifdef RT_USING_FINSH
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extern void finsh_system_init(void);
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#endif
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@@ -96,11 +95,7 @@ void rtthread_startup(void)
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rt_system_timer_init();
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/* initialize heap memory system */
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#ifdef __CC_ARM
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rt_system_heap_init((void*)&Image$$ER_ZI$$ZI$$Limit, (void*)0x24000000);
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#else
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rt_system_heap_init((void*)&__bss_end, (void*)0x23f00000);
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#endif
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rt_system_heap_init(HEAP_START, HEAP_END);
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#ifdef RT_USING_MODULE
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/* initialize module system*/
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File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,81 @@
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//*****************************************************************************
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//
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// blinky.icf - Linker configuration file for blinky.
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//
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// Copyright (c) 2013-2014 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Texas Instruments (TI) is supplying this software for use solely and
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// exclusively on TI's microcontroller products. The software is owned by
|
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// TI and/or its suppliers, and is protected under applicable copyright
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// laws. You may not combine this software with "viral" open-source
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// software in order to form a larger program.
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||||
//
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// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
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// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
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// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
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// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
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// DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
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//
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//*****************************************************************************
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//
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// Define a memory region that covers the entire 4 GB addressible space of the
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// processor.
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//
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define memory mem with size = 4G;
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//
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// Define a region for the on-chip flash.
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//
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define region FLASH = mem:[from 0x20000000 to 0x207FFFFF];
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//
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// Define a region for the on-chip SRAM.
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//
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define region SRAM = mem:[from 0x20800000 to 0x23FFFFFF];
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//
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// Define a block for the heap. The size should be set to something other
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// than zero if things in the C library that require the heap are used.
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//
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define block HEAP with alignment = 8, size = 0x02000000 { };
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//
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// Indicate that the read/write values should be initialized by copying from
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// flash.
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//
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initialize by copy { readwrite };
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//
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// Indicate that the noinit values should be left alone. This includes the
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// stack, which if initialized will destroy the return address from the
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// initialization code, causing the processor to branch to zero and fault.
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//
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do not initialize { section .noinit };
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//
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// Place the interrupt vectors at the start of flash.
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//
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place at start of FLASH { readonly section .intvec };
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//
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// Place the remainder of the read-only items into flash.
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//
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place in FLASH { readonly };
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//
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// Place the RAM vector table at the start of SRAM.
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//
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place at start of SRAM { section VTABLE };
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//
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// Place all read/write items into SRAM.
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//
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place in SRAM { readwrite, block HEAP };
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keep { section FSymTab };
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keep { section VSymTab };
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keep { section .rti_fn* };
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Executable → Regular
+5
-6
@@ -1,6 +1,6 @@
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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ENTRY(entry)
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SECTIONS
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{
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. = 0x20000000;
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@@ -66,12 +66,11 @@ SECTIONS
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. = ALIGN(4);
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.nobss : { *(.nobss) }
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. = 0x20300000;
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. = ALIGN(4);
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__bss_start = .;
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.bss : { *(.bss) }
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__bss_end = .;
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__bss_start__ = .;
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.bss : { *(.bss)}
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__bss_end__ = .;
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/* stabs debugging sections. */
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.stab 0 : { *(.stab) }
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@@ -0,0 +1,58 @@
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; * ----------------------------------------------------------------------------
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; * ATMEL Microcontroller Software Support
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; * ----------------------------------------------------------------------------
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; * Copyright (c) 2008, Atmel Corporation
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; *
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; * All rights reserved.
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; *
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; * Redistribution and use in source and binary forms, with or without
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; * modification, are permitted provided that the following conditions are met:
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; *
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; * - Redistributions of source code must retain the above copyright notice,
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; * this list of conditions and the disclaimer below.
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; *
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; * Atmel's name may not be used to endorse or promote products derived from
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; * this software without specific prior written permission.
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; *
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; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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||||
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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; * ----------------------------------------------------------------------------
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; *------------------------------------------------------------------------------
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; * Linker scatter for running in external SDRAM on the AT91SAM9260
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; *----------------------------------------------------------------------------*/
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Load_region 0x20000000 0x00800000
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{
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Fixed_region 0x20000000
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{
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* (RESET +First)
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.ANY (+RO +RW)
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}
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ER_ZI +0
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{
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* (+ZI)
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} ; Application ZI data (.bss)
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;Relocate_region 0x200000 0x1000
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;{
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; *.o (VECTOR, +First)
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;}
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ARM_LIB_HEAP 0x21FFE000 EMPTY 0x1000
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{
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}
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ARM_LIB_STACK 0x22000000 EMPTY -0x1000
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{
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}
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}
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@@ -24,7 +24,7 @@
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#include <rthw.h>
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#include "at91sam926x.h"
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#include "interrupt.h"
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#define MAX_HANDLERS (AIC_IRQS + PIN_IRQS)
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extern rt_uint32_t rt_interrupt_nest;
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@@ -374,6 +374,53 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
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return 0;
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}
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rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq, rt_uint32_t* id)
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{
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rt_uint32_t irqstat;
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if (fiq_irq == INT_FIQ)
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{
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*id = 0;
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}
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else //IRQ
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{
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/* get irq number */
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*id = (rt_uint32_t)at91_sys_read(AT91_AIC_IVR);
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/* clear pending register */
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irqstat = (rt_uint32_t)at91_sys_read(AT91_AIC_ISR);
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}
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return irqstat;
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}
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void rt_hw_interrupt_ack(rt_uint32_t fiq_irq)
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{
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if (fiq_irq == INT_FIQ)
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{
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/* new FIQ generation */
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}
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else
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{
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// EIOCR must be write any value after interrupt,
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// or else can't response next interrupt
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/* new IRQ generation */
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at91_sys_write(AT91_AIC_EOICR, 0x55555555);
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}
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}
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#ifdef RT_USING_FINSH
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void list_irq(void)
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{
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@@ -0,0 +1,25 @@
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/*
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* File : interrupt.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2011, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2013-07-06 Bernard first version
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*/
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#ifndef __INTERRUPT_H__
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#define __INTERRUPT_H__
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#define INT_IRQ 0x00
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#define INT_FIQ 0x01
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rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq, rt_uint32_t* id);
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void rt_hw_interrupt_ack(rt_uint32_t fiq_irq);
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#endif
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@@ -0,0 +1,33 @@
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/*
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||||
* File : rt_low_level_gcc.inc
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* This file is part of RT-Thread RTOS
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||||
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2015-04-14 ArdaFu first version
|
||||
*/
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/*--------- Stack size of CPU modes ------------------------------------------*/
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.equ UND_STK_SIZE, 2048
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.equ SVC_STK_SIZE, 4096
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.equ ABT_STK_SIZE, 2048
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.equ IRQ_STK_SIZE, 4096
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.equ FIQ_STK_SIZE, 4096
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.equ SYS_STK_SIZE, 2048
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/* vector table start should be 0x00000000 or 0xFFFF0000 */
|
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.equ VECTOR_TABLE_START, 0x00000000
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@@ -0,0 +1,33 @@
|
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/*
|
||||
* File : rt_low_level_iar.inc
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2015-04-14 ArdaFu first version
|
||||
*/
|
||||
|
||||
/*-------- Stack size of CPU modes -------------------------------------------*/
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#define UND_STK_SIZE 512
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#define SVC_STK_SIZE 4096
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#define ABT_STK_SIZE 512
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#define IRQ_STK_SIZE 1024
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#define FIQ_STK_SIZE 1024
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#define SYS_STK_SIZE 512
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/* vector table start should be 0x00000000 or 0xFFFF0000 */
|
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#define VECTOR_TABLE_START 0x00000000
|
||||
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* File : rt_low_level_init.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2015-04-14 ArdaFu first version
|
||||
*/
|
||||
|
||||
/* write register a=address, v=value */
|
||||
#define write_reg(a,v) (*(volatile unsigned int *)(a) = (v))
|
||||
/* Processor Reset */
|
||||
#define AT91_RSTC_PROCRST (1 << 0)
|
||||
#define AT91_RSTC_PERRST (1 << 2)
|
||||
#define AT91_RSTC_KEY (0xa5 << 24)
|
||||
#define AT91_MATRIX_BASE (0XFFFFEE00)
|
||||
/* Master Remap Control Register */
|
||||
#define AT91_MATRIX_MRCR (AT91_MATRIX_BASE + 0x100)
|
||||
/* Remap Command for AHB Master 0 (ARM926EJ-S InSTRuction Master) */
|
||||
#define AT91_MATRIX_RCB0 (1 << 0)
|
||||
/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
|
||||
#define AT91_MATRIX_RCB1 (1 << 1)
|
||||
|
||||
#define AT91_AIC_BASE (0XFFFFF000)
|
||||
/* Interrupt DisaBLe Command Register */
|
||||
#define AT91_AIC_IDCR (AT91_AIC_BASE + 0x124)
|
||||
/* Interrupt Clear Command Register */
|
||||
#define AT91_AIC_ICCR (AT91_AIC_BASE + 0x128)
|
||||
|
||||
#define AT91_WDT_BASE (0XFFFFFD40)
|
||||
#define AT91_WDT_CR (AT91_WDT_BASE + 0x00)
|
||||
#define AT91_WDT_CR_KEY (0xA5000000)
|
||||
#define AT91_WDT_CR_WDRSTT (0x00000001)
|
||||
#define AT91_WDT_MR (AT91_WDT_BASE + 0x04)
|
||||
#define AT91_WDT_MR_WDDIS (0x00008000)
|
||||
|
||||
void rt_low_level_init(void)
|
||||
{
|
||||
// Mask all IRQs by clearing all bits in the INTMRS
|
||||
write_reg(AT91_AIC_IDCR, 0xFFFFFFFF);
|
||||
write_reg(AT91_AIC_ICCR, 0xFFFFFFFF);
|
||||
// Remap internal ram to 0x00000000 Address
|
||||
write_reg(AT91_MATRIX_MRCR, AT91_MATRIX_RCB0 | AT91_MATRIX_RCB1);
|
||||
// Disable the watchdog
|
||||
write_reg(AT91_WDT_CR, AT91_WDT_CR_KEY|AT91_WDT_CR_WDRSTT);
|
||||
write_reg(AT91_WDT_MR, AT91_WDT_MR_WDDIS);
|
||||
|
||||
}
|
||||
|
||||
@@ -0,0 +1,34 @@
|
||||
;/*
|
||||
; * File : rt_low_level_keil.inc
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
|
||||
; *
|
||||
; * This program is free software; you can redistribute it and/or modify
|
||||
; * it under the terms of the GNU General Public License as published by
|
||||
; * the Free Software Foundation; either version 2 of the License, or
|
||||
; * (at your option) any later version.
|
||||
; *
|
||||
; * This program is distributed in the hope that it will be useful,
|
||||
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
; * GNU General Public License for more details.
|
||||
; *
|
||||
; * You should have received a copy of the GNU General Public License along
|
||||
; * with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * 2015-04-14 ArdaFu first version
|
||||
; */
|
||||
|
||||
;/*-------- Stack size of CPU modes ------------------------------------------*/
|
||||
UND_STK_SIZE EQU 512
|
||||
SVC_STK_SIZE EQU 4096
|
||||
ABT_STK_SIZE EQU 512
|
||||
IRQ_STK_SIZE EQU 1024
|
||||
FIQ_STK_SIZE EQU 1024
|
||||
SYS_STK_SIZE EQU 512
|
||||
;/* vector table start should be 0x00000000 or 0xFFFF0000 */
|
||||
VECTOR_TABLE_START EQU 0x00000000
|
||||
END
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -1,185 +0,0 @@
|
||||
/*
|
||||
* File : trap.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-01-13 weety modified from mini2440
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
|
||||
#include "at91sam926x.h"
|
||||
|
||||
/**
|
||||
* @addtogroup AT91SAM926X
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
extern struct rt_thread *rt_current_thread;
|
||||
#ifdef RT_USING_FINSH
|
||||
extern long list_thread(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* this function will show registers of CPU
|
||||
*
|
||||
* @param regs the registers point
|
||||
*/
|
||||
|
||||
void rt_hw_show_register (struct rt_hw_register *regs)
|
||||
{
|
||||
rt_kprintf("Execption:\n");
|
||||
rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
|
||||
rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
|
||||
rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
|
||||
rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
|
||||
rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
|
||||
rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
|
||||
}
|
||||
|
||||
/**
|
||||
* When ARM7TDMI comes across an instruction which it cannot handle,
|
||||
* it takes the undefined instruction trap.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_udef(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("undefined instruction\n");
|
||||
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
list_thread();
|
||||
#endif
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* The software interrupt instruction (SWI) is used for entering
|
||||
* Supervisor mode, usually to request a particular supervisor
|
||||
* function.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_swi(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("software interrupt\n");
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* An abort indicates that the current memory access cannot be completed,
|
||||
* which occurs during an instruction prefetch.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_pabt(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("prefetch abort\n");
|
||||
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
list_thread();
|
||||
#endif
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* An abort indicates that the current memory access cannot be completed,
|
||||
* which occurs during a data access.
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_dabt(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_hw_show_register(regs);
|
||||
|
||||
rt_kprintf("data abort\n");
|
||||
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
list_thread();
|
||||
#endif
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
/**
|
||||
* Normally, system will never reach here
|
||||
*
|
||||
* @param regs system registers
|
||||
*
|
||||
* @note never invoke this function in application
|
||||
*/
|
||||
void rt_hw_trap_resv(struct rt_hw_register *regs)
|
||||
{
|
||||
rt_kprintf("not used\n");
|
||||
rt_hw_show_register(regs);
|
||||
rt_hw_cpu_shutdown();
|
||||
}
|
||||
|
||||
extern struct rt_irq_desc irq_desc[];
|
||||
|
||||
void rt_hw_trap_irq()
|
||||
{
|
||||
rt_isr_handler_t isr_func;
|
||||
rt_uint32_t irqstat, irq, mask;
|
||||
void *param;
|
||||
//rt_kprintf("irq interrupt request\n");
|
||||
/* get irq number */
|
||||
irq = at91_sys_read(AT91_AIC_IVR);
|
||||
/* clear pending register */
|
||||
irqstat = at91_sys_read(AT91_AIC_ISR);
|
||||
if (irqstat == 0)
|
||||
{
|
||||
rt_kprintf("No interrupt occur\n");
|
||||
at91_sys_write(AT91_AIC_EOICR, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
/* get interrupt service routine */
|
||||
isr_func = irq_desc[irq].handler;
|
||||
param = irq_desc[irq].param;
|
||||
|
||||
/* turn to interrupt service routine */
|
||||
isr_func(irq, param);
|
||||
at91_sys_write(AT91_AIC_EOICR, 0x55555555); //EIOCR must be write any value after interrupt, or else can't response next interrupt
|
||||
irq_desc[irq].counter ++;
|
||||
}
|
||||
|
||||
void rt_hw_trap_fiq()
|
||||
{
|
||||
rt_kprintf("fast interrupt request\n");
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
+78
-23
@@ -1,26 +1,23 @@
|
||||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH = 'arm'
|
||||
CPU = 'arm926'
|
||||
TextBase = '0x20000000'
|
||||
|
||||
# toolchains options
|
||||
CROSS_TOOL = 'gcc'
|
||||
|
||||
#------- toolchains path -------------------------------------------------------
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = '/opt/arm-2010q1/bin/'
|
||||
EXEC_PATH = 'D:/ArdaArmTools/Sourcery_Lite/bin'
|
||||
#EXEC_PATH = 'D:/ArdaArmTools/GNUARM_4.9_2015q1/bin'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'C:/Keil'
|
||||
EXEC_PATH = 'C:/Keil_v5'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
print '================ERROR============================'
|
||||
print 'Not support yet!'
|
||||
print '================================================='
|
||||
exit(0)
|
||||
PLATFORM = 'iar'
|
||||
IAR_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.0'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
@@ -28,6 +25,12 @@ if os.getenv('RTT_EXEC_PATH'):
|
||||
#BUILD = 'debug'
|
||||
BUILD = 'release'
|
||||
|
||||
CORE = 'arm926ej-s'
|
||||
MAP_FILE = 'rtthread_at91sam9260.map'
|
||||
LINK_FILE = 'link_scripts/at91sam9260_ram'
|
||||
TARGET_NAME = 'rtthread.bin'
|
||||
|
||||
#------- GCC settings ----------------------------------------------------------
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
@@ -43,8 +46,11 @@ if PLATFORM == 'gcc':
|
||||
|
||||
DEVICE = ' -mcpu=arm926ej-s'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_at91sam9260.map,-cref,-u,_start -T at91sam9260_ram.ld' + ' -Ttext ' + TextBase
|
||||
AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
|
||||
AFLAGS += ' -Iplatform'
|
||||
LFLAGS = DEVICE
|
||||
LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE
|
||||
LFLAGS += ' -T ' + LINK_FILE + '.ld'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
@@ -55,8 +61,9 @@ if PLATFORM == 'gcc':
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
|
||||
POST_ACTION += SIZE + ' $TARGET\n'
|
||||
#------- Keil settings ---------------------------------------------------------
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
@@ -64,16 +71,15 @@ elif PLATFORM == 'armcc':
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
EXEC_PATH += '/arm/armcc/bin/'
|
||||
|
||||
DEVICE = ' --device DARMATS9'
|
||||
DEVICE = ' --cpu=' + CORE
|
||||
CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-at91sam9260.map --ro-base 0x20000000 --entry Entry_Point --first Entry_Point'
|
||||
|
||||
CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"'
|
||||
LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
AFLAGS = DEVICE + ' -Iplatform'
|
||||
LFLAGS = DEVICE + ' --strict'
|
||||
LFLAGS += ' --info sizes --info totals --info unused --info veneers'
|
||||
LFLAGS += ' --list ' + MAP_FILE
|
||||
LFLAGS += ' --scatter ' + LINK_FILE + '.scat'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
@@ -81,4 +87,53 @@ elif PLATFORM == 'armcc':
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output ' + TARGET_NAME + ' \n'
|
||||
POST_ACTION += 'fromelf -z $TARGET\n'
|
||||
#------- IAR settings ----------------------------------------------------------
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = CORE
|
||||
|
||||
CFLAGS = '--cpu=' + DEVICE
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=none'
|
||||
CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' --silent'
|
||||
|
||||
AFLAGS = '--cpu '+ DEVICE
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --fpu none'
|
||||
AFLAGS += ' -S'
|
||||
AFLAGS += ' -Iplatform'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' -On'
|
||||
else:
|
||||
CFLAGS += ' -Oh'
|
||||
|
||||
LFLAGS = '--config ' + LINK_FILE +'.icf'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
LFLAGS += ' --map ' + MAP_FILE
|
||||
LFLAGS += ' --silent'
|
||||
|
||||
EXEC_PATH = IAR_PATH + '/arm/bin/'
|
||||
POST_ACTION = 'ielftool --silent --bin $TARGET ' + TARGET_NAME
|
||||
@@ -1,110 +1,92 @@
|
||||
/*
|
||||
* File : context.S
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2011-01-13 weety copy from mini2440
|
||||
*/
|
||||
;/*
|
||||
; * File : context_iar.S
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
; *
|
||||
; * This program is free software; you can redistribute it and/or modify
|
||||
; * it under the terms of the GNU General Public License as published by
|
||||
; * the Free Software Foundation; either version 2 of the License, or
|
||||
; * (at your option) any later version.
|
||||
; *
|
||||
; * This program is distributed in the hope that it will be useful,
|
||||
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
; * GNU General Public License for more details.
|
||||
; *
|
||||
; * You should have received a copy of the GNU General Public License along
|
||||
; * with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * 2011-08-14 weety copy from mini2440
|
||||
; */
|
||||
|
||||
/*!
|
||||
* \addtogroup AT91SAM926X
|
||||
*/
|
||||
/*@{*/
|
||||
#define NOINT 0xC0
|
||||
|
||||
#define NOINT 0xc0
|
||||
|
||||
|
||||
/*
|
||||
* rt_base_t rt_hw_interrupt_disable();
|
||||
*/
|
||||
.globl rt_hw_interrupt_disable
|
||||
;/*
|
||||
; * rt_base_t rt_hw_interrupt_disable();
|
||||
; */
|
||||
.globl rt_hw_interrupt_disable
|
||||
rt_hw_interrupt_disable:
|
||||
mrs r0, cpsr
|
||||
orr r1, r0, #NOINT
|
||||
msr cpsr_c, r1
|
||||
mov pc, lr
|
||||
MRS R0, CPSR
|
||||
ORR R1, R0, #NOINT
|
||||
MSR CPSR_c, R1
|
||||
BX LR
|
||||
|
||||
/*
|
||||
* void rt_hw_interrupt_enable(rt_base_t level);
|
||||
*/
|
||||
.globl rt_hw_interrupt_enable
|
||||
.globl rt_hw_interrupt_enable
|
||||
rt_hw_interrupt_enable:
|
||||
msr cpsr, r0
|
||||
mov pc, lr
|
||||
MSR CPSR, R0
|
||||
BX LR
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
|
||||
* r0 --> from
|
||||
* r1 --> to
|
||||
*/
|
||||
.globl rt_hw_context_switch
|
||||
.globl rt_hw_context_switch
|
||||
rt_hw_context_switch:
|
||||
stmfd sp!, {lr} @ push pc (lr should be pushed in place of PC)
|
||||
stmfd sp!, {r0-r12, lr} @ push lr & register file
|
||||
|
||||
mrs r4, cpsr
|
||||
stmfd sp!, {r4} @ push cpsr
|
||||
mrs r4, spsr
|
||||
stmfd sp!, {r4} @ push spsr
|
||||
|
||||
str sp, [r0] @ store sp in preempted tasks TCB
|
||||
ldr sp, [r1] @ get new task stack pointer
|
||||
|
||||
ldmfd sp!, {r4} @ pop new task spsr
|
||||
msr spsr_cxsf, r4
|
||||
ldmfd sp!, {r4} @ pop new task cpsr
|
||||
msr spsr_cxsf, r4
|
||||
|
||||
ldmfd sp!, {r0-r12, lr, pc}^ @ pop new task r0-r12, lr & pc
|
||||
stmfd sp!, {lr} @; push pc (lr should be pushed in place of pc)
|
||||
stmfd sp!, {r0-r12, lr} @; push lr & register file
|
||||
mrs r4, cpsr
|
||||
stmfd sp!, {r4} @; push cpsr
|
||||
str sp, [r0] @; store sp in preempted tasks tcb
|
||||
ldr sp, [r1] @; get new task stack pointer
|
||||
ldmfd sp!, {r4} @; pop new task spsr
|
||||
msr spsr_cxsf, r4
|
||||
ldmfd sp!, {r0-r12, lr, pc}^ @; pop new task r0-r12, lr & pc
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch_to(rt_uint32 to);
|
||||
* r0 --> to
|
||||
*/
|
||||
.globl rt_hw_context_switch_to
|
||||
.globl rt_hw_context_switch_to
|
||||
rt_hw_context_switch_to:
|
||||
ldr sp, [r0] @ get new task stack pointer
|
||||
|
||||
ldmfd sp!, {r4} @ pop new task spsr
|
||||
msr spsr_cxsf, r4
|
||||
ldmfd sp!, {r4} @ pop new task cpsr
|
||||
msr cpsr_cxsf, r4
|
||||
|
||||
ldmfd sp!, {r0-r12, lr, pc} @ pop new task r0-r12, lr & pc
|
||||
ldr sp, [r0] @; get new task stack pointer
|
||||
ldmfd sp!, {r4} @; pop new task cpsr
|
||||
msr spsr_cxsf, r4
|
||||
ldmfd sp!, {r0-r12, lr, pc}^ @; pop new task r0-r12, lr & pc
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
|
||||
*/
|
||||
.globl rt_thread_switch_interrupt_flag
|
||||
.globl rt_interrupt_from_thread
|
||||
.globl rt_interrupt_to_thread
|
||||
.globl rt_hw_context_switch_interrupt
|
||||
.globl rt_thread_switch_interrupt_flag
|
||||
.globl rt_interrupt_from_thread
|
||||
.globl rt_interrupt_to_thread
|
||||
.globl rt_hw_context_switch_interrupt
|
||||
rt_hw_context_switch_interrupt:
|
||||
ldr r2, =rt_thread_switch_interrupt_flag
|
||||
ldr r3, [r2]
|
||||
cmp r3, #1
|
||||
beq _reswitch
|
||||
mov r3, #1 @ set rt_thread_switch_interrupt_flag to 1
|
||||
str r3, [r2]
|
||||
ldr r2, =rt_interrupt_from_thread @ set rt_interrupt_from_thread
|
||||
str r0, [r2]
|
||||
LDR R2, =rt_thread_switch_interrupt_flag
|
||||
LDR R3, [R2]
|
||||
CMP R3, #1
|
||||
BEQ _reswitch
|
||||
MOV R3, #1 @; set flag to 1
|
||||
STR R3, [R2]
|
||||
LDR R2, =rt_interrupt_from_thread @; set rt_interrupt_from_thread
|
||||
STR R0, [R2]
|
||||
_reswitch:
|
||||
ldr r2, =rt_interrupt_to_thread @ set rt_interrupt_to_thread
|
||||
str r1, [r2]
|
||||
mov pc, lr
|
||||
LDR R2, =rt_interrupt_to_thread @; set rt_interrupt_to_thread
|
||||
STR R1, [R2]
|
||||
BX LR
|
||||
@@ -0,0 +1,96 @@
|
||||
;/*
|
||||
; * File : context_iar.S
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
; *
|
||||
; * This program is free software; you can redistribute it and/or modify
|
||||
; * it under the terms of the GNU General Public License as published by
|
||||
; * the Free Software Foundation; either version 2 of the License, or
|
||||
; * (at your option) any later version.
|
||||
; *
|
||||
; * This program is distributed in the hope that it will be useful,
|
||||
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
; * GNU General Public License for more details.
|
||||
; *
|
||||
; * You should have received a copy of the GNU General Public License along
|
||||
; * with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * 2011-08-14 weety copy from mini2440
|
||||
; * 2015-04-15 ArdaFu convert from context_gcc.s
|
||||
; */
|
||||
|
||||
#define NOINT 0xc0
|
||||
|
||||
SECTION .text:CODE(6)
|
||||
/*
|
||||
* rt_base_t rt_hw_interrupt_disable();
|
||||
*/
|
||||
PUBLIC rt_hw_interrupt_disable
|
||||
rt_hw_interrupt_disable:
|
||||
MRS R0, CPSR
|
||||
ORR R1, R0, #NOINT
|
||||
MSR CPSR_C, R1
|
||||
MOV PC, LR
|
||||
|
||||
/*
|
||||
* void rt_hw_interrupt_enable(rt_base_t level);
|
||||
*/
|
||||
PUBLIC rt_hw_interrupt_enable
|
||||
rt_hw_interrupt_enable:
|
||||
MSR CPSR_CXSF, R0
|
||||
MOV PC, LR
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
|
||||
* r0 --> from
|
||||
* r1 --> to
|
||||
*/
|
||||
PUBLIC rt_hw_context_switch
|
||||
rt_hw_context_switch:
|
||||
STMFD SP!, {LR} ; push pc (lr should be pushed in place of PC)
|
||||
STMFD SP!, {R0-R12, LR} ; push lr & register file
|
||||
MRS R4, CPSR
|
||||
STMFD SP!, {R4} ; push cpsr
|
||||
STR SP, [R0] ; store sp in preempted tasks TCB
|
||||
LDR SP, [R1] ; get new task stack pointer
|
||||
LDMFD SP!, {R4} ; pop new task spsr
|
||||
MSR SPSR_cxsf, R4
|
||||
LDMFD SP!, {R0-R12, LR, PC}^ ; pop new task r0-r12, lr & pc
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch_to(rt_uint32 to);
|
||||
* r0 --> to
|
||||
*/
|
||||
PUBLIC rt_hw_context_switch_to
|
||||
rt_hw_context_switch_to:
|
||||
LDR SP, [R0] ; get new task stack pointer
|
||||
LDMFD SP!, {R4} ; pop new task spsr
|
||||
MSR SPSR_cxsf, R4
|
||||
LDMFD SP!, {R0-R12, LR, PC}^ ; pop new task r0-r12, lr & pc
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
|
||||
*/
|
||||
IMPORT rt_thread_switch_interrupt_flag
|
||||
IMPORT rt_interrupt_from_thread
|
||||
IMPORT rt_interrupt_to_thread
|
||||
PUBLIC rt_hw_context_switch_interrupt
|
||||
rt_hw_context_switch_interrupt:
|
||||
LDR R2, =rt_thread_switch_interrupt_flag
|
||||
LDR R3, [R2]
|
||||
CMP R3, #1
|
||||
BEQ _reswitch
|
||||
MOV R3, #1 ; set flag to 1
|
||||
STR R3, [R2]
|
||||
LDR R2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
|
||||
STR R0, [R2]
|
||||
_reswitch:
|
||||
LDR R2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
|
||||
STR R1, [R2]
|
||||
MOV PC, LR
|
||||
END
|
||||
|
||||
@@ -1,117 +1,105 @@
|
||||
;/*
|
||||
; * File : context_rvds.S
|
||||
; * This file is part of RT-Thread RTOS
|
||||
; * COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
; * file : context_rvds.s
|
||||
; * this file is part of rt-thread rtos
|
||||
; * copyright (c) 2006, rt-thread development team
|
||||
; *
|
||||
; * This program is free software; you can redistribute it and/or modify
|
||||
; * it under the terms of the GNU General Public License as published by
|
||||
; * the Free Software Foundation; either version 2 of the License, or
|
||||
; * this program is free software; you can redistribute it and/or modify
|
||||
; * it under the terms of the gnu general public license as published by
|
||||
; * the free software foundation; either version 2 of the license, or
|
||||
; * (at your option) any later version.
|
||||
; *
|
||||
; * This program is distributed in the hope that it will be useful,
|
||||
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
; * GNU General Public License for more details.
|
||||
; * this program is distributed in the hope that it will be useful,
|
||||
; * but without any warranty; without even the implied warranty of
|
||||
; * merchantability or fitness for a particular purpose. see the
|
||||
; * gnu general public license for more details.
|
||||
; *
|
||||
; * You should have received a copy of the GNU General Public License along
|
||||
; * with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
; * you should have received a copy of the gnu general public license along
|
||||
; * with this program; if not, write to the free software foundation, inc.,
|
||||
; * 51 franklin street, fifth floor, boston, ma 02110-1301 usa.
|
||||
; *
|
||||
; * Change Logs:
|
||||
; * Date Author Notes
|
||||
; * change logs:
|
||||
; * date author notes
|
||||
; * 2011-08-14 weety copy from mini2440
|
||||
; */
|
||||
|
||||
NOINT EQU 0xc0 ; disable interrupt in psr
|
||||
NOINT EQU 0XC0 ; disable interrupt in psr
|
||||
|
||||
AREA |.text|, CODE, READONLY, ALIGN=2
|
||||
ARM
|
||||
REQUIRE8
|
||||
PRESERVE8
|
||||
AREA |.TEXT|, CODE, READONLY, ALIGN=2
|
||||
ARM
|
||||
REQUIRE8
|
||||
PRESERVE8
|
||||
|
||||
;/*
|
||||
; * rt_base_t rt_hw_interrupt_disable();
|
||||
; */
|
||||
rt_hw_interrupt_disable PROC
|
||||
EXPORT rt_hw_interrupt_disable
|
||||
MRS r0, cpsr
|
||||
ORR r1, r0, #NOINT
|
||||
MSR cpsr_c, r1
|
||||
BX lr
|
||||
ENDP
|
||||
rt_hw_interrupt_disable PROC
|
||||
EXPORT rt_hw_interrupt_disable
|
||||
MRS R0, CPSR
|
||||
ORR R1, R0, #NOINT
|
||||
MSR CPSR_C, R1
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;/*
|
||||
; * void rt_hw_interrupt_enable(rt_base_t level);
|
||||
; */
|
||||
rt_hw_interrupt_enable PROC
|
||||
EXPORT rt_hw_interrupt_enable
|
||||
MSR cpsr_c, r0
|
||||
BX lr
|
||||
ENDP
|
||||
rt_hw_interrupt_enable proc
|
||||
export rt_hw_interrupt_enable
|
||||
msr cpsr_c, r0
|
||||
bx lr
|
||||
endp
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
|
||||
; * r0 --> from
|
||||
; * r1 --> to
|
||||
; */
|
||||
rt_hw_context_switch PROC
|
||||
EXPORT rt_hw_context_switch
|
||||
STMFD sp!, {lr} ; push pc (lr should be pushed in place of PC)
|
||||
STMFD sp!, {r0-r12, lr} ; push lr & register file
|
||||
|
||||
MRS r4, cpsr
|
||||
STMFD sp!, {r4} ; push cpsr
|
||||
MRS r4, spsr
|
||||
STMFD sp!, {r4} ; push spsr
|
||||
|
||||
STR sp, [r0] ; store sp in preempted tasks TCB
|
||||
LDR sp, [r1] ; get new task stack pointer
|
||||
|
||||
LDMFD sp!, {r4} ; pop new task spsr
|
||||
MSR spsr_cxsf, r4
|
||||
LDMFD sp!, {r4} ; pop new task cpsr
|
||||
MSR spsr_cxsf, r4
|
||||
|
||||
LDMFD sp!, {r0-r12, lr, pc}^ ; pop new task r0-r12, lr & pc
|
||||
ENDP
|
||||
rt_hw_context_switch proc
|
||||
export rt_hw_context_switch
|
||||
stmfd sp!, {lr} ; push pc (lr should be pushed in place of pc)
|
||||
stmfd sp!, {r0-r12, lr} ; push lr & register file
|
||||
mrs r4, cpsr
|
||||
stmfd sp!, {r4} ; push cpsr
|
||||
str sp, [r0] ; store sp in preempted tasks tcb
|
||||
ldr sp, [r1] ; get new task stack pointer
|
||||
ldmfd sp!, {r4} ; pop new task spsr
|
||||
msr spsr_cxsf, r4
|
||||
ldmfd sp!, {r0-r12, lr, pc}^ ; pop new task r0-r12, lr & pc
|
||||
endp
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch_to(rt_uint32 to);
|
||||
; * r0 --> to
|
||||
; */
|
||||
rt_hw_context_switch_to PROC
|
||||
EXPORT rt_hw_context_switch_to
|
||||
LDR sp, [r0] ; get new task stack pointer
|
||||
|
||||
LDMFD sp!, {r4} ; pop new task spsr
|
||||
MSR spsr_cxsf, r4
|
||||
LDMFD sp!, {r4} ; pop new task cpsr
|
||||
MSR cpsr_cxsf, r4
|
||||
|
||||
LDMFD sp!, {r0-r12, lr, pc} ; pop new task r0-r12, lr & pc
|
||||
ENDP
|
||||
rt_hw_context_switch_to proc
|
||||
export rt_hw_context_switch_to
|
||||
ldr sp, [r0] ; get new task stack pointer
|
||||
ldmfd sp!, {r4} ; pop new task spsr
|
||||
msr spsr_cxsf, r4
|
||||
ldmfd sp!, {r0-r12, lr, pc}^ ; pop new task r0-r12, lr & pc
|
||||
endp
|
||||
|
||||
;/*
|
||||
; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
|
||||
; */
|
||||
IMPORT rt_thread_switch_interrupt_flag
|
||||
IMPORT rt_interrupt_from_thread
|
||||
IMPORT rt_interrupt_to_thread
|
||||
import rt_thread_switch_interrupt_flag
|
||||
import rt_interrupt_from_thread
|
||||
import rt_interrupt_to_thread
|
||||
|
||||
rt_hw_context_switch_interrupt PROC
|
||||
EXPORT rt_hw_context_switch_interrupt
|
||||
LDR r2, =rt_thread_switch_interrupt_flag
|
||||
LDR r3, [r2]
|
||||
CMP r3, #1
|
||||
BEQ _reswitch
|
||||
MOV r3, #1 ; set rt_thread_switch_interrupt_flag to 1
|
||||
STR r3, [r2]
|
||||
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
|
||||
STR r0, [r2]
|
||||
rt_hw_context_switch_interrupt proc
|
||||
export rt_hw_context_switch_interrupt
|
||||
ldr r2, =rt_thread_switch_interrupt_flag
|
||||
ldr r3, [r2]
|
||||
cmp r3, #1
|
||||
beq _reswitch
|
||||
mov r3, #1 ; set flag to 1
|
||||
str r3, [r2]
|
||||
ldr r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
|
||||
str r0, [r2]
|
||||
_reswitch
|
||||
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
|
||||
STR r1, [r2]
|
||||
BX lr
|
||||
ENDP
|
||||
ldr r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
|
||||
str r1, [r2]
|
||||
bx lr
|
||||
endp
|
||||
|
||||
END
|
||||
end
|
||||
+119
-86
File diff suppressed because it is too large.
Load diff
+328
-134
File diff suppressed because it is too large.
Load diff
+25
-25
@@ -26,38 +26,38 @@
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#define CACHE_LINE_SIZE 32
|
||||
#define CACHE_LINE_SIZE 32
|
||||
|
||||
#define DESC_SEC (0x2|(1<<4))
|
||||
#define CB (3<<2) //cache_on, write_back
|
||||
#define CNB (2<<2) //cache_on, write_through
|
||||
#define NCB (1<<2) //cache_off,WR_BUF on
|
||||
#define NCNB (0<<2) //cache_off,WR_BUF off
|
||||
#define AP_RW (3<<10) //supervisor=RW, user=RW
|
||||
#define AP_RO (2<<10) //supervisor=RW, user=RO
|
||||
#define DESC_SEC (0x2|(1<<4))
|
||||
#define CB (3<<2) //cache_on, write_back
|
||||
#define CNB (2<<2) //cache_on, write_through
|
||||
#define NCB (1<<2) //cache_off,WR_BUF on
|
||||
#define NCNB (0<<2) //cache_off,WR_BUF off
|
||||
#define AP_RW (3<<10) //supervisor=RW, user=RW
|
||||
#define AP_RO (2<<10) //supervisor=RW, user=RO
|
||||
|
||||
#define DOMAIN_FAULT (0x0)
|
||||
#define DOMAIN_CHK (0x1)
|
||||
#define DOMAIN_NOTCHK (0x3)
|
||||
#define DOMAIN0 (0x0<<5)
|
||||
#define DOMAIN1 (0x1<<5)
|
||||
#define DOMAIN_FAULT (0x0)
|
||||
#define DOMAIN_CHK (0x1)
|
||||
#define DOMAIN_NOTCHK (0x3)
|
||||
#define DOMAIN0 (0x0<<5)
|
||||
#define DOMAIN1 (0x1<<5)
|
||||
|
||||
#define DOMAIN0_ATTR (DOMAIN_CHK<<0)
|
||||
#define DOMAIN1_ATTR (DOMAIN_FAULT<<2)
|
||||
#define DOMAIN0_ATTR (DOMAIN_CHK<<0)
|
||||
#define DOMAIN1_ATTR (DOMAIN_FAULT<<2)
|
||||
|
||||
#define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC) /* Read/Write, cache, write back */
|
||||
#define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC) /* Read/Write, cache, write through */
|
||||
#define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
|
||||
#define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
|
||||
#define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC) /* Read/Write, cache, write back */
|
||||
#define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC) /* Read/Write, cache, write through */
|
||||
#define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
|
||||
#define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
|
||||
|
||||
struct mem_desc {
|
||||
rt_uint32_t vaddr_start;
|
||||
rt_uint32_t vaddr_end;
|
||||
rt_uint32_t paddr_start;
|
||||
rt_uint32_t attr;
|
||||
struct mem_desc
|
||||
{
|
||||
rt_uint32_t vaddr_start;
|
||||
rt_uint32_t vaddr_end;
|
||||
rt_uint32_t paddr_start;
|
||||
rt_uint32_t attr;
|
||||
};
|
||||
|
||||
void rt_hw_mmu_init(struct mem_desc *mdesc, rt_uint32_t size);
|
||||
|
||||
#endif
|
||||
|
||||
+34
-32
@@ -26,50 +26,52 @@
|
||||
/*****************************/
|
||||
/* CPU Mode */
|
||||
/*****************************/
|
||||
#define USERMODE 0x10
|
||||
#define FIQMODE 0x11
|
||||
#define IRQMODE 0x12
|
||||
#define SVCMODE 0x13
|
||||
#define ABORTMODE 0x17
|
||||
#define UNDEFMODE 0x1b
|
||||
#define MODEMASK 0x1f
|
||||
#define NOINT 0xc0
|
||||
#define USERMODE 0x10
|
||||
#define FIQMODE 0x11
|
||||
#define IRQMODE 0x12
|
||||
#define SVCMODE 0x13
|
||||
#define ABORTMODE 0x17
|
||||
#define UNDEFMODE 0x1b
|
||||
#define MODEMASK 0x1f
|
||||
#define NOINT 0xc0
|
||||
|
||||
/**
|
||||
* This function will initialize thread stack
|
||||
*
|
||||
* @param tentry the entry of thread
|
||||
* @param parameter the parameter of entry
|
||||
* @param parameter the parameter of entry
|
||||
* @param stack_addr the beginning stack address
|
||||
* @param texit the function will be called when thread exit
|
||||
*
|
||||
* @return stack address
|
||||
*/
|
||||
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
|
||||
rt_uint8_t *stack_addr, void *texit)
|
||||
rt_uint8_t *stack_addr, void *texit)
|
||||
{
|
||||
rt_uint32_t *stk;
|
||||
rt_uint32_t *stk;
|
||||
|
||||
stk = (rt_uint32_t*)stack_addr;
|
||||
*(stk) = (rt_uint32_t)tentry; /* entry point */
|
||||
*(--stk) = (rt_uint32_t)texit; /* lr */
|
||||
*(--stk) = 0; /* r12 */
|
||||
*(--stk) = 0; /* r11 */
|
||||
*(--stk) = 0; /* r10 */
|
||||
*(--stk) = 0; /* r9 */
|
||||
*(--stk) = 0; /* r8 */
|
||||
*(--stk) = 0; /* r7 */
|
||||
*(--stk) = 0; /* r6 */
|
||||
*(--stk) = 0; /* r5 */
|
||||
*(--stk) = 0; /* r4 */
|
||||
*(--stk) = 0; /* r3 */
|
||||
*(--stk) = 0; /* r2 */
|
||||
*(--stk) = 0; /* r1 */
|
||||
*(--stk) = (rt_uint32_t)parameter; /* r0 : argument */
|
||||
*(--stk) = SVCMODE; /* cpsr */
|
||||
*(--stk) = SVCMODE; /* spsr */
|
||||
stk = (rt_uint32_t*)stack_addr;
|
||||
*(stk) = (rt_uint32_t)tentry; /* entry point */
|
||||
*(--stk) = (rt_uint32_t)texit; /* lr */
|
||||
*(--stk) = 0; /* r12 */
|
||||
*(--stk) = 0; /* r11 */
|
||||
*(--stk) = 0; /* r10 */
|
||||
*(--stk) = 0; /* r9 */
|
||||
*(--stk) = 0; /* r8 */
|
||||
*(--stk) = 0; /* r7 */
|
||||
*(--stk) = 0; /* r6 */
|
||||
*(--stk) = 0; /* r5 */
|
||||
*(--stk) = 0; /* r4 */
|
||||
*(--stk) = 0; /* r3 */
|
||||
*(--stk) = 0; /* r2 */
|
||||
*(--stk) = 0; /* r1 */
|
||||
*(--stk) = (rt_uint32_t)parameter; /* r0 : argument */
|
||||
/* cpsr */
|
||||
if ((rt_uint32_t)tentry & 0x01)
|
||||
*(--stk) = SVCMODE | 0x20; /* thumb mode */
|
||||
else
|
||||
*(--stk) = SVCMODE; /* arm mode */
|
||||
|
||||
/* return task's current stack address */
|
||||
return (rt_uint8_t *)stk;
|
||||
/* return task's current stack address */
|
||||
return (rt_uint8_t *)stk;
|
||||
}
|
||||
|
||||
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File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
Reference in new issue
Block a user