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[ch32]修正接口数据类型 (#7025)

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This commit is contained in:
charlown
2023-03-08 22:52:07 -05:00
committed by GitHub
parent cfc6bf9b12
commit 95fea2f159
8 changed files with 162 additions and 430 deletions
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bsp/wch/arm/Libraries/ch32_drivers/drv_gpio_ch32f10x.c
+6 -6
View File
@@ -269,7 +269,7 @@ static rt_err_t exti_line_irq_list_unbind(rt_int16_t pin)
return ret;
}
void ch32f1_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
void ch32f1_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
const struct pin_info *item;
GPIO_InitTypeDef gpio_initstruct;
@@ -309,7 +309,7 @@ void ch32f1_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
GPIO_Init(item->gpio, &gpio_initstruct);
}
void ch32f1_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
void ch32f1_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
const struct pin_info *item;
@@ -323,7 +323,7 @@ void ch32f1_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
GPIO_WriteBit(item->gpio, item->gpio_pin, (BitAction)value);
}
int ch32f1_pin_read(rt_device_t dev, rt_base_t pin)
rt_int8_t ch32f1_pin_read(rt_device_t dev, rt_base_t pin)
{
const struct pin_info *item;
@@ -337,7 +337,7 @@ int ch32f1_pin_read(rt_device_t dev, rt_base_t pin)
return GPIO_ReadInputDataBit(item->gpio, item->gpio_pin);
}
rt_err_t ch32f1_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args),
rt_err_t ch32f1_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args),
void *args)
{
struct rt_pin_irq_hdr bind_item;
@@ -350,12 +350,12 @@ rt_err_t ch32f1_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint
return exti_line_irq_list_bind(&bind_item);
}
rt_err_t ch32f1_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
rt_err_t ch32f1_pin_detach_irq(struct rt_device *device, rt_base_t pin)
{
return exti_line_irq_list_unbind(pin);
}
rt_err_t ch32f1_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
rt_err_t ch32f1_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
{
struct exti_line_irq *find;
const struct pin_info *item;
bsp/wch/arm/Libraries/ch32_drivers/drv_gpio_ch32f20x.c
+38 -38
View File
@@ -30,10 +30,10 @@ struct pin_info
};
/*
*pin: assign number, start 0
*group: such GPIOA, use 'A'
*gpio_pin: such GPIO_PIN_0, use '0'
*/
*pin: assign number, start 0
*group: such GPIOA, use 'A'
*gpio_pin: such GPIO_PIN_0, use '0'
*/
#define ASSIGN_PIN(pin, group, gpio_pin) \
{ \
pin, GPIO_Pin_##gpio_pin, GPIO_PortSourceGPIO##group, GPIO_PinSource##gpio_pin, GPIO##group \
@@ -102,37 +102,37 @@ static const struct pin_info pin_info_list[] = {
ASSIGN_PIN(48, D, 0),
ASSIGN_PIN(49, D, 1),
ASSIGN_PIN(50, D, 2),
ASSIGN_PIN(51, D, 3),
ASSIGN_PIN(52, D, 4),
ASSIGN_PIN(53, D, 5),
ASSIGN_PIN(54, D, 6),
ASSIGN_PIN(55, D, 7),
ASSIGN_PIN(56, D, 8),
ASSIGN_PIN(57, D, 9),
ASSIGN_PIN(58, D, 10),
ASSIGN_PIN(59, D, 11),
ASSIGN_PIN(60, D, 12),
ASSIGN_PIN(61, D, 13),
ASSIGN_PIN(62, D, 14),
ASSIGN_PIN(63, D, 15),
ASSIGN_PIN(51, D, 3),
ASSIGN_PIN(52, D, 4),
ASSIGN_PIN(53, D, 5),
ASSIGN_PIN(54, D, 6),
ASSIGN_PIN(55, D, 7),
ASSIGN_PIN(56, D, 8),
ASSIGN_PIN(57, D, 9),
ASSIGN_PIN(58, D, 10),
ASSIGN_PIN(59, D, 11),
ASSIGN_PIN(60, D, 12),
ASSIGN_PIN(61, D, 13),
ASSIGN_PIN(62, D, 14),
ASSIGN_PIN(63, D, 15),
#endif
#if defined(GPIOE)
ASSIGN_PIN(64, E, 0),
ASSIGN_PIN(65, E, 1),
ASSIGN_PIN(66, E, 2),
ASSIGN_PIN(67, E, 3),
ASSIGN_PIN(68, E, 4),
ASSIGN_PIN(69, E, 5),
ASSIGN_PIN(70, E, 6),
ASSIGN_PIN(71, E, 7),
ASSIGN_PIN(72, E, 8),
ASSIGN_PIN(73, E, 9),
ASSIGN_PIN(74, E, 10),
ASSIGN_PIN(75, E, 11),
ASSIGN_PIN(76, E, 12),
ASSIGN_PIN(77, E, 13),
ASSIGN_PIN(78, E, 14),
ASSIGN_PIN(79, E, 15),
ASSIGN_PIN(67, E, 3),
ASSIGN_PIN(68, E, 4),
ASSIGN_PIN(69, E, 5),
ASSIGN_PIN(70, E, 6),
ASSIGN_PIN(71, E, 7),
ASSIGN_PIN(72, E, 8),
ASSIGN_PIN(73, E, 9),
ASSIGN_PIN(74, E, 10),
ASSIGN_PIN(75, E, 11),
ASSIGN_PIN(76, E, 12),
ASSIGN_PIN(77, E, 13),
ASSIGN_PIN(78, E, 14),
ASSIGN_PIN(79, E, 15),
#endif
};
@@ -167,8 +167,8 @@ static rt_base_t pin_info_list_find_pin(rt_uint16_t portsource, rt_uint16_t pins
}
/*
*use: 0 using the exti line, -1 do not using
*/
*use: 0 using the exti line, -1 do not using
*/
struct exti_line_irq
{
rt_uint16_t nvic_priority;
@@ -300,7 +300,7 @@ static rt_err_t exti_line_irq_list_unbind(rt_int16_t pin)
return ret;
}
void ch32f2_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
void ch32f2_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
const struct pin_info *item;
GPIO_InitTypeDef gpio_initstruct;
@@ -340,7 +340,7 @@ void ch32f2_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
GPIO_Init(item->gpio, &gpio_initstruct);
}
void ch32f2_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
void ch32f2_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
const struct pin_info *item;
@@ -354,7 +354,7 @@ void ch32f2_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
GPIO_WriteBit(item->gpio, item->gpio_pin, (BitAction)value);
}
int ch32f2_pin_read(rt_device_t dev, rt_base_t pin)
rt_int8_t ch32f2_pin_read(rt_device_t dev, rt_base_t pin)
{
const struct pin_info *item;
@@ -368,7 +368,7 @@ int ch32f2_pin_read(rt_device_t dev, rt_base_t pin)
return GPIO_ReadInputDataBit(item->gpio, item->gpio_pin);
}
rt_err_t ch32f2_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args),
rt_err_t ch32f2_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args),
void *args)
{
struct rt_pin_irq_hdr bind_item;
@@ -381,12 +381,12 @@ rt_err_t ch32f2_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint
return exti_line_irq_list_bind(&bind_item);
}
rt_err_t ch32f2_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
rt_err_t ch32f2_pin_detach_irq(struct rt_device *device, rt_base_t pin)
{
return exti_line_irq_list_unbind(pin);
}
rt_err_t ch32f2_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
rt_err_t ch32f2_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
{
struct exti_line_irq *find;
const struct pin_info *item;
bsp/wch/arm/Libraries/ch32_drivers/drv_rtc_ch32f10x.c
+2 -2
View File
@@ -76,7 +76,7 @@ static rt_err_t ch32f1_rt_rtc_init(void)
return RT_EOK;
}
static rt_err_t ch32f1_get_secs(void *args)
static rt_err_t ch32f1_get_secs(time_t *args)
{
*(rt_uint32_t *)args = RTC_GetCounter();
LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
@@ -84,7 +84,7 @@ static rt_err_t ch32f1_get_secs(void *args)
return RT_EOK;
}
static rt_err_t ch32f1_set_secs(void *args)
static rt_err_t ch32f1_set_secs(time_t *args)
{
/* Set the RTC counter value */
RTC_SetCounter(*(rt_uint32_t *)args);
bsp/wch/arm/Libraries/ch32_drivers/drv_rtc_ch32f20x.c
+2 -2
View File
@@ -76,7 +76,7 @@ static rt_err_t ch32f2_rt_rtc_init(void)
return RT_EOK;
}
static rt_err_t ch32f2_get_secs(void *args)
static rt_err_t ch32f2_get_secs(time_t *args)
{
*(rt_uint32_t *)args = RTC_GetCounter();
LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
@@ -84,7 +84,7 @@ static rt_err_t ch32f2_get_secs(void *args)
return RT_EOK;
}
static rt_err_t ch32f2_set_secs(void *args)
static rt_err_t ch32f2_set_secs(time_t *args)
{
/* Set the RTC counter value */
RTC_SetCounter(*(rt_uint32_t *)args);
bsp/wch/arm/Libraries/ch32_drivers/drv_spi_ch32f10x.c
+1 -1
View File
@@ -189,7 +189,7 @@ static rt_err_t ch32f1_spi_configure(struct rt_spi_device *device, struct rt_spi
return RT_EOK;
};
static rt_uint32_t ch32f1_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
static rt_ssize_t ch32f1_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
{
struct rt_spi_bus *spi_bus;
struct spi_bus_device *spi_bus_dev;
bsp/wch/arm/Libraries/ch32_drivers/drv_spi_ch32f20x.c
+1 -1
View File
@@ -194,7 +194,7 @@ static rt_err_t ch32f2_spi_configure(struct rt_spi_device *device, struct rt_spi
return RT_EOK;
};
static rt_uint32_t ch32f2_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
static rt_ssize_t ch32f2_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
{
struct rt_spi_bus *spi_bus;
struct spi_bus_device *spi_bus_dev;
bsp/wch/arm/ch32f103c8-core/project.uvprojx
+55 -181
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bsp/wch/arm/ch32f203r-evt/project.uvprojx
+57 -199
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File diff suppressed because it is too large Load Diff