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Merge branch 'master' of https://github.com/RT-Thread/rt-thread into fixed

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This commit is contained in:
weety
2016-05-31 20:23:32 +08:00
parent 714f00679e c8cfc14b82
commit 94e1935f1f
235 changed files with 1250 additions and 69021 deletions
Download Patch File Download Diff File Expand all files Collapse all files
bsp/stm32f10x/drivers/gpio.c
Regular → Executable
+58 -5
View File
@@ -8,8 +8,9 @@
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2015-03-24 Bright the first version
* Date Author Notes
* 2015-03-24 Bright the first version
* 2016-05-23 Margguo@gmail.com Add 48 pins IC define
*/
#include <rthw.h>
@@ -19,7 +20,7 @@
#ifdef RT_USING_PIN
#define STM32F10X_PIN_NUMBERS 100 //[ 64, 100, 144 ]
#define STM32F10X_PIN_NUMBERS 100 //[48, 64, 100, 144 ]
#define __STM32_PIN(index, rcc, gpio, gpio_index) { 0, RCC_##rcc##Periph_GPIO##gpio, GPIO##gpio, GPIO_Pin_##gpio_index}
#define __STM32_PIN_DEFAULT {-1, 0, 0, 0}
@@ -35,6 +36,58 @@ struct pin_index
static const struct pin_index pins[] =
{
#if (STM32F10X_PIN_NUMBERS == 48)
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(2, APB2, C, 13),
__STM32_PIN(3, APB2, C, 14),
__STM32_PIN(4, APB2, C, 15),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(10, APB2, A, 0),
__STM32_PIN(11, APB2, A, 1),
__STM32_PIN(12, APB2, A, 2),
__STM32_PIN(13, APB2, A, 3),
__STM32_PIN(14, APB2, A, 4),
__STM32_PIN(15, APB2, A, 5),
__STM32_PIN(16, APB2, A, 6),
__STM32_PIN(17, APB2, A, 7),
__STM32_PIN(18, APB2, B, 0),
__STM32_PIN(19, APB2, B, 1),
__STM32_PIN(20, APB2, B, 2),
__STM32_PIN(21, APB2, B, 10),
__STM32_PIN(22, APB2, B, 11),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(25, APB2, B, 12),
__STM32_PIN(26, APB2, B, 13),
__STM32_PIN(27, APB2, B, 14),
__STM32_PIN(28, APB2, B, 15),
__STM32_PIN(29, APB2, A, 8),
__STM32_PIN(30, APB2, A, 9),
__STM32_PIN(31, APB2, A, 10),
__STM32_PIN(32, APB2, A, 11),
__STM32_PIN(33, APB2, A, 12),
__STM32_PIN(34, APB2, A, 13),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
__STM32_PIN(37, APB2, A, 14),
__STM32_PIN(38, APB2, A, 15),
__STM32_PIN(39, APB2, B, 3),
__STM32_PIN(40, APB2, B, 4),
__STM32_PIN(41, APB2, B, 5),
__STM32_PIN(42, APB2, B, 6),
__STM32_PIN(43, APB2, B, 7),
__STM32_PIN_DEFAULT,
__STM32_PIN(45, APB2, B, 8),
__STM32_PIN(46, APB2, B, 9),
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
#endif
#if (STM32F10X_PIN_NUMBERS == 64)
__STM32_PIN_DEFAULT,
__STM32_PIN_DEFAULT,
@@ -216,7 +269,7 @@ static const struct pin_index pins[] =
__STM32_PIN(7, APB2, C, 13),
__STM32_PIN(8, APB2, C, 14),
__STM32_PIN(9, APB2, C, 15),
__STM32_PIN(10, APB2, F, 0),
__STM32_PIN(11, APB2, F, 1),
__STM32_PIN(12, APB2, F, 2),
@@ -472,7 +525,7 @@ const static struct rt_pin_ops _stm32_pin_ops =
int stm32_hw_pin_init(void)
{
int result;
result = rt_device_pin_register("pin", &_stm32_pin_ops, RT_NULL);
return result;
}
bsp/stm32f10x/drivers/usart.c
+233 -97
View File
@@ -13,6 +13,7 @@
* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
* 2013-05-13 aozima update for kehong-lingtai.
* 2015-01-31 armink make sure the serial transmit complete in putc()
* 2016-05-13 armink add DMA Rx mode
*/
#include "stm32f10x.h"
@@ -44,10 +45,22 @@
/* STM32 uart driver */
struct stm32_uart
{
USART_TypeDef* uart_device;
USART_TypeDef *uart_device;
IRQn_Type irq;
struct stm32_uart_dma {
/* dma channel */
DMA_Channel_TypeDef *rx_ch;
/* dma global flag */
uint32_t rx_gl_flag;
/* dma irq channel */
uint8_t rx_irq_ch;
/* last receive index */
rt_size_t last_recv_len;
} dma;
};
static void DMA_Configuration(struct rt_serial_device *serial);
static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct stm32_uart* uart;
@@ -93,6 +106,7 @@ static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_c
static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct stm32_uart* uart;
rt_uint32_t ctrl_arg = (rt_uint32_t)(arg);
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
@@ -113,8 +127,13 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar
/* enable interrupt */
USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
break;
/* USART config */
case RT_DEVICE_CTRL_CONFIG :
if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) {
DMA_Configuration(serial);
}
break;
}
return RT_EOK;
}
@@ -148,6 +167,91 @@ static int stm32_getc(struct rt_serial_device *serial)
return ch;
}
/**
* Serial port receive idle process. This need add to uart idle ISR.
*
* @param serial serial device
*/
static void dma_uart_rx_idle_isr(struct rt_serial_device *serial) {
struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
rt_size_t recv_total_len, recv_len;
/* disable dma, stop receive data */
DMA_Cmd(uart->dma.rx_ch, DISABLE);
recv_total_len = serial->config.bufsz - DMA_GetCurrDataCounter(uart->dma.rx_ch);
if (recv_total_len > uart->dma.last_recv_len) {
recv_len = recv_total_len - uart->dma.last_recv_len;
} else {
recv_len = recv_total_len;
}
uart->dma.last_recv_len = recv_total_len;
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
/* read a data for clear receive idle interrupt flag */
USART_ReceiveData(uart->uart_device);
DMA_ClearFlag(uart->dma.rx_gl_flag);
DMA_Cmd(uart->dma.rx_ch, ENABLE);
}
/**
* DMA receive done process. This need add to DMA receive done ISR.
*
* @param serial serial device
*/
static void dma_rx_done_isr(struct rt_serial_device *serial) {
struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
rt_size_t recv_total_len, recv_len;
/* disable dma, stop receive data */
DMA_Cmd(uart->dma.rx_ch, DISABLE);
recv_total_len = serial->config.bufsz - DMA_GetCurrDataCounter(uart->dma.rx_ch);
if (recv_total_len > uart->dma.last_recv_len) {
recv_len = recv_total_len - uart->dma.last_recv_len;
} else {
recv_len = recv_total_len;
}
uart->dma.last_recv_len = recv_total_len;
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
DMA_ClearFlag(uart->dma.rx_gl_flag);
/* reload */
DMA_SetCurrDataCounter(uart->dma.rx_ch, serial->config.bufsz);
DMA_Cmd(uart->dma.rx_ch, ENABLE);
}
/**
* Uart common interrupt process. This need add to uart ISR.
*
* @param serial serial device
*/
static void uart_isr(struct rt_serial_device *serial) {
struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
}
if(USART_GetITStatus(uart->uart_device, USART_IT_IDLE) != RESET)
{
dma_uart_rx_idle_isr(serial);
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
{
stm32_getc(serial);
}
}
static const struct rt_uart_ops stm32_uart_ops =
{
stm32_configure,
@@ -162,70 +266,68 @@ struct stm32_uart uart1 =
{
USART1,
USART1_IRQn,
{
DMA1_Channel5,
DMA1_FLAG_GL5,
DMA1_Channel5_IRQn,
0,
},
};
struct rt_serial_device serial1;
void USART1_IRQHandler(void)
{
struct stm32_uart* uart;
uart = &uart1;
/* enter interrupt */
rt_interrupt_enter();
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND);
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
{
stm32_getc(&serial1);
}
uart_isr(&serial1);
/* leave interrupt */
rt_interrupt_leave();
}
void DMA1_Channel5_IRQHandler(void) {
/* enter interrupt */
rt_interrupt_enter();
dma_rx_done_isr(&serial1);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART1 */
#if defined(RT_USING_UART2)
/* UART1 device driver structure */
/* UART2 device driver structure */
struct stm32_uart uart2 =
{
USART2,
USART2_IRQn,
{
DMA1_Channel6,
DMA1_FLAG_GL6,
DMA1_Channel6_IRQn,
0,
},
};
struct rt_serial_device serial2;
void USART2_IRQHandler(void)
{
struct stm32_uart* uart;
uart = &uart2;
/* enter interrupt */
rt_interrupt_enter();
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
{
stm32_getc(&serial2);
}
uart_isr(&serial2);
/* leave interrupt */
rt_interrupt_leave();
}
void DMA1_Channel6_IRQHandler(void) {
/* enter interrupt */
rt_interrupt_enter();
dma_rx_done_isr(&serial2);
/* leave interrupt */
rt_interrupt_leave();
@@ -238,32 +340,31 @@ struct stm32_uart uart3 =
{
USART3,
USART3_IRQn,
{
DMA1_Channel3,
DMA1_FLAG_GL3,
DMA1_Channel3_IRQn,
0,
},
};
struct rt_serial_device serial3;
void USART3_IRQHandler(void)
{
struct stm32_uart* uart;
uart = &uart3;
/* enter interrupt */
rt_interrupt_enter();
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
rt_hw_serial_isr(&serial3, RT_SERIAL_EVENT_RX_IND);
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
{
stm32_getc(&serial3);
}
uart_isr(&serial3);
/* leave interrupt */
rt_interrupt_leave();
}
void DMA1_Channel3_IRQHandler(void) {
/* enter interrupt */
rt_interrupt_enter();
dma_rx_done_isr(&serial3);
/* leave interrupt */
rt_interrupt_leave();
@@ -276,69 +377,66 @@ struct stm32_uart uart4 =
{
UART4,
UART4_IRQn,
{
DMA2_Channel3,
DMA2_FLAG_GL3,
DMA2_Channel3_IRQn,
0,
},
};
struct rt_serial_device serial4;
void UART4_IRQHandler(void)
{
struct stm32_uart* uart;
uart = &uart4;
/* enter interrupt */
rt_interrupt_enter();
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
{
rt_hw_serial_isr(&serial4, RT_SERIAL_EVENT_RX_IND);
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
{
/* clear interrupt */
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
{
stm32_getc(&serial4);
}
uart_isr(&serial4);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART3 */
void DMA2_Channel3_IRQHandler(void) {
/* enter interrupt */
rt_interrupt_enter();
dma_rx_done_isr(&serial4);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* RT_USING_UART4 */
static void RCC_Configuration(void)
{
#if defined(RT_USING_UART1)
/* Enable UART GPIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
/* Enable UART clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
#endif /* RT_USING_UART1 */
#if defined(RT_USING_UART2)
/* Enable UART GPIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
/* Enable UART clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
#endif /* RT_USING_UART2 */
#if defined(RT_USING_UART3)
/* Enable UART GPIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
/* Enable UART clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
#endif /* RT_USING_UART3 */
#if defined(RT_USING_UART4)
/* Enable UART GPIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE);
/* Enable UART clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
#endif /* RT_USING_UART4 */
}
static void GPIO_Configuration(void)
@@ -390,7 +488,6 @@ static void GPIO_Configuration(void)
GPIO_InitStructure.GPIO_Pin = UART4_GPIO_TX;
GPIO_Init(UART4_GPIO, &GPIO_InitStructure);
#endif /* RT_USING_UART4 */
}
static void NVIC_Configuration(struct stm32_uart* uart)
@@ -405,6 +502,46 @@ static void NVIC_Configuration(struct stm32_uart* uart)
NVIC_Init(&NVIC_InitStructure);
}
static void DMA_Configuration(struct rt_serial_device *serial) {
struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/* enable transmit idle interrupt */
USART_ITConfig(uart->uart_device, USART_IT_IDLE , ENABLE);
/* DMA clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE);
/* rx dma config */
DMA_DeInit(uart->dma.rx_ch);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(uart->uart_device->DR);
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) rx_fifo->buffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = serial->config.bufsz;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(uart->dma.rx_ch, &DMA_InitStructure);
DMA_ClearFlag(uart->dma.rx_gl_flag);
DMA_ITConfig(uart->dma.rx_ch, DMA_IT_TC, ENABLE);
USART_DMACmd(uart->uart_device, USART_DMAReq_Rx, ENABLE);
DMA_Cmd(uart->dma.rx_ch, ENABLE);
/* rx dma interrupt config */
NVIC_InitStructure.NVIC_IRQChannel = uart->dma.rx_irq_ch;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
void rt_hw_usart_init(void)
{
struct stm32_uart* uart;
@@ -420,11 +557,11 @@ void rt_hw_usart_init(void)
serial1.ops = &stm32_uart_ops;
serial1.config = config;
NVIC_Configuration(&uart1);
NVIC_Configuration(uart);
/* register UART1 device */
rt_hw_serial_register(&serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX ,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
uart);
#endif /* RT_USING_UART1 */
@@ -435,11 +572,11 @@ void rt_hw_usart_init(void)
serial2.ops = &stm32_uart_ops;
serial2.config = config;
NVIC_Configuration(&uart2);
NVIC_Configuration(uart);
/* register UART1 device */
/* register UART2 device */
rt_hw_serial_register(&serial2, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
uart);
#endif /* RT_USING_UART2 */
@@ -451,11 +588,11 @@ void rt_hw_usart_init(void)
serial3.ops = &stm32_uart_ops;
serial3.config = config;
NVIC_Configuration(&uart3);
NVIC_Configuration(uart);
/* register UART1 device */
/* register UART3 device */
rt_hw_serial_register(&serial3, "uart3",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
uart);
#endif /* RT_USING_UART3 */
@@ -467,12 +604,11 @@ void rt_hw_usart_init(void)
serial4.ops = &stm32_uart_ops;
serial4.config = config;
NVIC_Configuration(&uart4);
NVIC_Configuration(uart);
/* register UART4 device */
rt_hw_serial_register(&serial4, "uart4",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
uart);
#endif /* RT_USING_UART4 */
}
components/dfs/filesystems/lwip/SConscript → components/dfs/filesystems/net/SConscript
+1 -1
View File
@@ -6,6 +6,6 @@ cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('Filesystem', src, depend = ['RT_USING_DFS', 'RT_USING_DFS_LWIP'], CPPPATH = CPPPATH)
group = DefineGroup('Filesystem', src, depend = ['RT_USING_DFS', 'RT_USING_DFS_NET'], CPPPATH = CPPPATH)
Return('group')
components/dfs/filesystems/lwip/arpa/inet.h → components/dfs/filesystems/net/arpa/inet.h
View File
components/dfs/filesystems/lwip/dfs_lwip.c → components/dfs/filesystems/net/dfs_net.c
+22 -21
View File
@@ -1,7 +1,7 @@
/*
* File : dfs_lwip.c
* File : dfs_net.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Development Team
* COPYRIGHT (C) 2015-2016, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -20,15 +20,16 @@
* Change Logs:
* Date Author Notes
* 2015-02-17 Bernard First version
* 2016-05-07 Bernard Rename dfs_lwip to dfs_net
*/
#include <rtthread.h>
#include <dfs.h>
#include <dfs_fs.h>
#include "dfs_lwip.h"
#include "dfs_net.h"
int dfs_lwip_getsocket(int fd)
int dfs_net_getsocket(int fd)
{
struct dfs_fd *_dfs_fd;
@@ -40,12 +41,12 @@ int dfs_lwip_getsocket(int fd)
return (int)_dfs_fd->data;
}
int dfs_lwip_ioctl(struct dfs_fd* file, int cmd, void* args)
int dfs_net_ioctl(struct dfs_fd* file, int cmd, void* args)
{
return -DFS_STATUS_EIO;
}
int dfs_lwip_read(struct dfs_fd* file, void *buf, rt_size_t count)
int dfs_net_read(struct dfs_fd* file, void *buf, rt_size_t count)
{
int sock;
@@ -55,7 +56,7 @@ int dfs_lwip_read(struct dfs_fd* file, void *buf, rt_size_t count)
return count;
}
int dfs_lwip_write(struct dfs_fd *file, const void *buf, rt_size_t count)
int dfs_net_write(struct dfs_fd *file, const void *buf, rt_size_t count)
{
int sock;
@@ -65,7 +66,7 @@ int dfs_lwip_write(struct dfs_fd *file, const void *buf, rt_size_t count)
return count;
}
int dfs_lwip_close(struct dfs_fd* file)
int dfs_net_close(struct dfs_fd* file)
{
int sock;
int result;
@@ -78,9 +79,9 @@ int dfs_lwip_close(struct dfs_fd* file)
return -result;
}
static const struct dfs_filesystem_operation _lwip_fs_ops =
static const struct dfs_filesystem_operation _net_fs_ops =
{
"lwip",
"net",
DFS_FS_FLAG_DEFAULT,
RT_NULL, /* mount */
RT_NULL, /* unmont */
@@ -88,10 +89,10 @@ static const struct dfs_filesystem_operation _lwip_fs_ops =
RT_NULL, /* statfs */
RT_NULL, /* open */
dfs_lwip_close,
dfs_lwip_ioctl,
dfs_lwip_read,
dfs_lwip_write,
dfs_net_close,
dfs_net_ioctl,
dfs_net_read,
dfs_net_write,
RT_NULL,
RT_NULL, /* lseek */
RT_NULL, /* getdents */
@@ -100,28 +101,28 @@ static const struct dfs_filesystem_operation _lwip_fs_ops =
RT_NULL, /* rename */
};
static struct dfs_filesystem _lwip_fs =
static struct dfs_filesystem _net_fs =
{
0, /* dev_id */
RT_NULL, /* path */
&_lwip_fs_ops,
&_net_fs_ops,
RT_NULL /* data */
};
struct dfs_filesystem* dfs_lwip_get_fs(void)
struct dfs_filesystem* dfs_net_get_fs(void)
{
return &_lwip_fs;
return &_net_fs;
}
/*
NOTE: Beause we don't need to mount lwIP file system, the filesystem_ops is not
registered to the system.
int dfs_lwip_system_init(void)
int dfs_net_system_init(void)
{
dfs_register(&_lwip_fs_ops);
dfs_register(&_net_fs_ops);
return 0;
}
INIT_FS_EXPORT(dfs_lwip_system_init);
INIT_FS_EXPORT(dfs_net_system_init);
*/
components/dfs/filesystems/lwip/dfs_lwip.h → components/dfs/filesystems/net/dfs_net.h
+8 -7
View File
@@ -1,7 +1,7 @@
/*
* File : dfs_lwip.h
* File : dfs_net.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Development Team
* COPYRIGHT (C) 2015-2016, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -20,10 +20,11 @@
* Change Logs:
* Date Author Notes
* 2015-02-17 Bernard First version
* 2016-05-05 Bernard rename dfs_lwip to dfs_net.
*/
#ifndef DFS_LWIP_H__
#define DFS_LWIP_H__
#ifndef DFS_NET_H__
#define DFS_NET_H__
#ifdef __cplusplus
extern "C" {
@@ -31,10 +32,10 @@ extern "C" {
#include <lwip/sockets.h>
struct dfs_filesystem* dfs_lwip_get_fs(void);
int dfs_lwip_getsocket(int fd);
struct dfs_filesystem* dfs_net_get_fs(void);
int dfs_net_getsocket(int fd);
int dfs_lwip_system_init(void);
int dfs_net_system_init(void);
#ifdef __cplusplus
}
components/dfs/filesystems/lwip/lwip_netdb.c → components/dfs/filesystems/net/net_netdb.c
View File
components/dfs/filesystems/lwip/lwip_select.c → components/dfs/filesystems/net/net_select.c
+2 -2
View File
@@ -27,7 +27,7 @@
#ifdef RT_USING_LWIP
#include "dfs_lwip.h"
#include "dfs_net.h"
int
select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset,
@@ -48,7 +48,7 @@ select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset,
for (index = 0; index < maxfdp1; index ++)
{
/* convert fd to sock */
sock = dfs_lwip_getsocket(index);
sock = dfs_net_getsocket(index);
if (sock == -1) continue;
if (sock > maxfd) maxfd = sock;
components/dfs/filesystems/lwip/lwip_sockets.c → components/dfs/filesystems/net/net_sockets.c
+16 -16
View File
@@ -28,12 +28,12 @@
#include <sys/socket.h>
#include "dfs_lwip.h"
#include "dfs_net.h"
int accept(int s, struct sockaddr *addr, socklen_t *addrlen)
{
int new_client = -1;
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
new_client = lwip_accept(sock, addr, addrlen);
if (new_client != -1)
@@ -58,7 +58,7 @@ int accept(int s, struct sockaddr *addr, socklen_t *addrlen)
d->type = FT_SOCKET;
d->path = RT_NULL;
d->fs = dfs_lwip_get_fs();
d->fs = dfs_net_get_fs();
d->flags = DFS_O_RDWR; /* set flags as read and write */
d->size = 0;
@@ -79,7 +79,7 @@ RTM_EXPORT(accept);
int bind(int s, const struct sockaddr *name, socklen_t namelen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_bind(sock, name, namelen);
}
@@ -98,7 +98,7 @@ int shutdown(int s, int how)
return -1;
}
sock = dfs_lwip_getsocket(s);
sock = dfs_net_getsocket(s);
if (lwip_shutdown(sock, how) == 0)
{
/* socket has been closed, delete it from file system fd */
@@ -114,7 +114,7 @@ RTM_EXPORT(shutdown);
int getpeername(int s, struct sockaddr *name, socklen_t *namelen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_getpeername(sock, name, namelen);
}
@@ -122,7 +122,7 @@ RTM_EXPORT(getpeername);
int getsockname(int s, struct sockaddr *name, socklen_t *namelen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_getsockname(sock, name, namelen);
}
@@ -130,7 +130,7 @@ RTM_EXPORT(getsockname);
int getsockopt(int s, int level, int optname, void *optval, socklen_t *optlen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_getsockopt(sock, level, optname, optval, optlen);
}
@@ -138,7 +138,7 @@ RTM_EXPORT(getsockopt);
int setsockopt(int s, int level, int optname, const void *optval, socklen_t optlen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_setsockopt(sock, level, optname, optval, optlen);
}
@@ -146,7 +146,7 @@ RTM_EXPORT(setsockopt);
int connect(int s, const struct sockaddr *name, socklen_t namelen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_connect(sock, name, namelen);
}
@@ -154,7 +154,7 @@ RTM_EXPORT(connect);
int listen(int s, int backlog)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_listen(sock, backlog);
}
@@ -162,7 +162,7 @@ RTM_EXPORT(listen);
int recv(int s, void *mem, size_t len, int flags)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_recv(sock, mem, len, flags);
}
@@ -171,7 +171,7 @@ RTM_EXPORT(recv);
int recvfrom(int s, void *mem, size_t len, int flags,
struct sockaddr *from, socklen_t *fromlen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_recvfrom(sock, mem, len, flags, from, fromlen);
}
@@ -179,7 +179,7 @@ RTM_EXPORT(recvfrom);
int send(int s, const void *dataptr, size_t size, int flags)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_send(sock, dataptr, size, flags);
}
@@ -188,7 +188,7 @@ RTM_EXPORT(send);
int sendto(int s, const void *dataptr, size_t size, int flags,
const struct sockaddr *to, socklen_t tolen)
{
int sock = dfs_lwip_getsocket(s);
int sock = dfs_net_getsocket(s);
return lwip_sendto(sock, dataptr, size, flags, to, tolen);
}
@@ -219,7 +219,7 @@ int socket(int domain, int type, int protocol)
d->type = FT_SOCKET;
d->path = RT_NULL;
d->fs = dfs_lwip_get_fs();
d->fs = dfs_net_get_fs();
d->flags = DFS_O_RDWR; /* set flags as read and write */
d->size = 0;
components/dfs/filesystems/lwip/netdb.h → components/dfs/filesystems/net/netdb.h
View File
components/dfs/filesystems/lwip/netinet/in.h → components/dfs/filesystems/net/netinet/in.h
View File
components/dfs/filesystems/lwip/netinet/tcp.h → components/dfs/filesystems/net/netinet/tcp.h
View File
components/dfs/filesystems/lwip/netinet/udp.h → components/dfs/filesystems/net/netinet/udp.h
View File
components/dfs/filesystems/lwip/sys/select.h → components/dfs/filesystems/net/sys/select.h
View File
components/dfs/filesystems/lwip/sys/socket.h → components/dfs/filesystems/net/sys/socket.h
View File
components/drivers/include/drivers/mmcsd_core.h
+4
View File
@@ -220,6 +220,10 @@ rt_inline rt_uint32_t fls(rt_uint32_t val)
return bit;
}
#define MMCSD_HOST_PLUGED 0
#define MMCSD_HOST_UNPLUGED 1
int mmcsd_wait_cd_changed(rt_int32_t timeout);
void mmcsd_host_lock(struct rt_mmcsd_host *host);
void mmcsd_host_unlock(struct rt_mmcsd_host *host);
void mmcsd_req_complete(struct rt_mmcsd_host *host);
components/drivers/include/drivers/serial.h
+14 -12
View File
@@ -33,12 +33,15 @@
#define BAUD_RATE_2400 2400
#define BAUD_RATE_4800 4800
#define BAUD_RATE_9600 9600
#define BAUD_RATE_19200 19200
#define BAUD_RATE_38400 38400
#define BAUD_RATE_57600 57600
#define BAUD_RATE_115200 115200
#define BAUD_RATE_230400 230400
#define BAUD_RATE_460800 460800
#define BAUD_RATE_921600 921600
#define BAUD_RATE_2000000 2000000
#define BAUD_RATE_3000000 3000000
#define DATA_BITS_5 5
#define DATA_BITS_6 6
@@ -106,7 +109,7 @@ struct serial_configure
rt_uint32_t parity :2;
rt_uint32_t bit_order :1;
rt_uint32_t invert :1;
rt_uint32_t bufsz :16;
rt_uint32_t bufsz :16;
rt_uint32_t reserved :4;
};
@@ -115,15 +118,15 @@ struct serial_configure
*/
struct rt_serial_rx_fifo
{
/* software fifo */
rt_uint8_t *buffer;
/* software fifo */
rt_uint8_t *buffer;
rt_uint16_t put_index, get_index;
rt_uint16_t put_index, get_index;
};
struct rt_serial_tx_fifo
{
struct rt_completion completion;
struct rt_completion completion;
};
/*
@@ -131,13 +134,13 @@ struct rt_serial_tx_fifo
*/
struct rt_serial_rx_dma
{
rt_bool_t activated;
rt_bool_t activated;
};
struct rt_serial_tx_dma
{
rt_bool_t activated;
struct rt_data_queue data_queue;
rt_bool_t activated;
struct rt_data_queue data_queue;
};
struct rt_serial_device
@@ -147,8 +150,8 @@ struct rt_serial_device
const struct rt_uart_ops *ops;
struct serial_configure config;
void *serial_rx;
void *serial_tx;
void *serial_rx;
void *serial_tx;
};
typedef struct rt_serial_device rt_serial_t;
@@ -163,7 +166,7 @@ struct rt_uart_ops
int (*putc)(struct rt_serial_device *serial, char c);
int (*getc)(struct rt_serial_device *serial);
rt_size_t (*dma_transmit)(struct rt_serial_device *serial, const rt_uint8_t *buf, rt_size_t size, int direction);
rt_size_t (*dma_transmit)(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
};
void rt_hw_serial_isr(struct rt_serial_device *serial, int event);
@@ -174,4 +177,3 @@ rt_err_t rt_hw_serial_register(struct rt_serial_device *serial,
void *data);
#endif
components/drivers/sdio/mmcsd_core.c
+28 -2
View File
@@ -44,6 +44,8 @@ static struct rt_thread mmcsd_detect_thread;
static rt_uint8_t mmcsd_stack[RT_MMCSD_STACK_SIZE];
static struct rt_mailbox mmcsd_detect_mb;
static rt_uint32_t mmcsd_detect_mb_pool[4];
static struct rt_mailbox mmcsd_hotpluge_mb;
static rt_uint32_t mmcsd_hotpluge_mb_pool[4];
void mmcsd_host_lock(struct rt_mmcsd_host *host)
{
@@ -594,6 +596,24 @@ static void mmcsd_power_off(struct rt_mmcsd_host *host)
mmcsd_set_iocfg(host);
}
int mmcsd_wait_cd_changed(rt_int32_t timeout)
{
struct rt_mmcsd_host *host;
if (rt_mb_recv(&mmcsd_hotpluge_mb, (rt_uint32_t*)&host, timeout) == RT_EOK)
{
if(host->card == RT_NULL)
{
return MMCSD_HOST_UNPLUGED;
}
else
{
return MMCSD_HOST_PLUGED;
}
}
return -RT_ETIMEOUT;
}
RTM_EXPORT(mmcsd_wait_cd_changed);
void mmcsd_change(struct rt_mmcsd_host *host)
{
rt_mb_send(&mmcsd_detect_mb, (rt_uint32_t)host);
@@ -647,6 +667,7 @@ void mmcsd_detect(void *param)
if (init_mmc(host, ocr))
mmcsd_power_off(host);
mmcsd_host_unlock(host);
rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
continue;
}
mmcsd_host_unlock(host);
@@ -667,6 +688,7 @@ void mmcsd_detect(void *param)
host->card = RT_NULL;
}
mmcsd_host_unlock(host);
rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
}
}
}
@@ -711,11 +733,15 @@ void rt_mmcsd_core_init(void)
/* initialize detect SD cart thread */
/* initialize mailbox and create detect SD card thread */
ret = rt_mb_init(&mmcsd_detect_mb, "mmcsdmb",
&mmcsd_detect_mb_pool[0], sizeof(mmcsd_detect_mb_pool),
&mmcsd_detect_mb_pool[0], sizeof(mmcsd_detect_mb_pool) / sizeof(mmcsd_detect_mb_pool[0]),
RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
ret = rt_thread_init(&mmcsd_detect_thread, "mmcsd_detect", mmcsd_detect, RT_NULL,
ret = rt_mb_init(&mmcsd_hotpluge_mb, "mmcsdhotplugmb",
&mmcsd_hotpluge_mb_pool[0], sizeof(mmcsd_hotpluge_mb_pool) / sizeof(mmcsd_hotpluge_mb_pool[0]),
RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
ret = rt_thread_init(&mmcsd_detect_thread, "mmcsd_detect", mmcsd_detect, RT_NULL,
&mmcsd_stack[0], RT_MMCSD_STACK_SIZE, RT_MMCSD_THREAD_PREORITY, 20);
if (ret == RT_EOK)
{
components/drivers/serial/serial.c
+200 -55
View File
@@ -27,9 +27,10 @@
* the size of ring buffer.
* 2014-07-10 bernard rewrite serial framework
* 2014-12-31 bernard use open_flag for poll_tx stream mode.
* 2015-05-19 Quintin fix DMA tx mod tx_dma->activated flag !=RT_FALSE BUG
* 2015-05-19 Quintin fix DMA tx mod tx_dma->activated flag !=RT_FALSE BUG
* in open function.
* 2015-11-10 bernard fix the poll rx issue when there is no data.
* 2016-05-10 armink add fifo mode to DMA rx when serial->config.bufsz != 0.
*/
#include <rthw.h>
@@ -37,13 +38,13 @@
#include <rtdevice.h>
/*
* Serial poll routines
* Serial poll routines
*/
rt_inline int _serial_poll_rx(struct rt_serial_device *serial, rt_uint8_t *data, int length)
{
int ch;
int size;
RT_ASSERT(serial != RT_NULL);
size = length;
@@ -52,7 +53,7 @@ rt_inline int _serial_poll_rx(struct rt_serial_device *serial, rt_uint8_t *data,
ch = serial->ops->getc(serial);
if (ch == -1) break;
*data = ch;
*data = ch;
data ++; length --;
if (ch == '\n') break;
@@ -77,9 +78,9 @@ rt_inline int _serial_poll_tx(struct rt_serial_device *serial, const rt_uint8_t
{
serial->ops->putc(serial, '\r');
}
serial->ops->putc(serial, *data);
++ data;
-- length;
}
@@ -96,8 +97,8 @@ rt_inline int _serial_int_rx(struct rt_serial_device *serial, rt_uint8_t *data,
struct rt_serial_rx_fifo* rx_fifo;
RT_ASSERT(serial != RT_NULL);
size = length;
size = length;
rx_fifo = (struct rt_serial_rx_fifo*) serial->serial_rx;
RT_ASSERT(rx_fifo != RT_NULL);
@@ -136,7 +137,7 @@ rt_inline int _serial_int_tx(struct rt_serial_device *serial, const rt_uint8_t *
{
int size;
struct rt_serial_tx_fifo *tx;
RT_ASSERT(serial != RT_NULL);
size = length;
@@ -157,32 +158,136 @@ rt_inline int _serial_int_tx(struct rt_serial_device *serial, const rt_uint8_t *
return size - length;
}
/**
* Calculate DMA received data length.
*
* @param serial serial device
*
* @return length
*/
static rt_size_t rt_dma_calc_recved_len(struct rt_serial_device *serial) {
static rt_size_t rx_length;
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
RT_ASSERT(rx_fifo != RT_NULL);
rx_length = (rx_fifo->put_index >= rx_fifo->get_index)? (rx_fifo->put_index - rx_fifo->get_index):
(serial->config.bufsz - (rx_fifo->get_index - rx_fifo->put_index));
return rx_length;
}
/**
* Read data finish by DMA mode then update the gut index for receive fifo.
*
* @param serial serial device
* @param len get data length for this operate
*/
static void rt_dma_recv_update_get_index(struct rt_serial_device *serial, rt_size_t len) {
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
RT_ASSERT(rx_fifo != RT_NULL);
RT_ASSERT(len <= rt_dma_calc_recved_len(serial));
rx_fifo->get_index += len;
if (rx_fifo->get_index > serial->config.bufsz ) {
rx_fifo->get_index -= serial->config.bufsz;
}
}
/**
* DMA received finish then update put index for receive fifo.
*
* @param serial serial device
* @param len received length for this transmit
*/
static void rt_dma_recv_update_put_index(struct rt_serial_device *serial, rt_size_t len) {
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
rt_size_t i;
RT_ASSERT(rx_fifo != RT_NULL);
if (rx_fifo->get_index <= rx_fifo->put_index) {
rx_fifo->put_index += len;
/* beyond the fifo end */
if (rx_fifo->put_index >= serial->config.bufsz) {
for (i = 0; i <= len / serial->config.bufsz; i++) {
rx_fifo->put_index -= serial->config.bufsz;
}
/* force overwrite get index */
if (rx_fifo->put_index >= rx_fifo->get_index) {
rx_fifo->get_index = rx_fifo->put_index + 1;
}
}
} else {
rx_fifo->put_index += len;
if(rx_fifo->put_index >= rx_fifo->get_index) {
/* beyond the fifo end */
if(rx_fifo->put_index >= serial->config.bufsz) {
for (i = 0; i <= len / serial->config.bufsz; i++) {
rx_fifo->put_index -= serial->config.bufsz;
}
}
/* force overwrite get index */
rx_fifo->get_index = rx_fifo->put_index + 1;
}
}
}
/*
* Serial DMA routines
*/
rt_inline int _serial_dma_rx(struct rt_serial_device *serial, rt_uint8_t *data, int length)
{
rt_base_t level;
int result = RT_EOK;
struct rt_serial_rx_dma *rx_dma;
RT_ASSERT((serial != RT_NULL) && (data != RT_NULL));
rx_dma = (struct rt_serial_rx_dma*)serial->serial_rx;
RT_ASSERT(rx_dma != RT_NULL);
level = rt_hw_interrupt_disable();
if (rx_dma->activated != RT_TRUE)
{
rx_dma->activated = RT_TRUE;
serial->ops->dma_transmit(serial, data, length, RT_SERIAL_DMA_RX);
if (serial->config.bufsz == 0) {
int result = RT_EOK;
struct rt_serial_rx_dma *rx_dma;
rx_dma = (struct rt_serial_rx_dma*)serial->serial_rx;
RT_ASSERT(rx_dma != RT_NULL);
if (rx_dma->activated != RT_TRUE)
{
rx_dma->activated = RT_TRUE;
RT_ASSERT(serial->ops->dma_transmit != RT_NULL);
serial->ops->dma_transmit(serial, data, length, RT_SERIAL_DMA_RX);
}
else result = -RT_EBUSY;
rt_hw_interrupt_enable(level);
if (result == RT_EOK) return length;
rt_set_errno(result);
return 0;
} else {
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
rt_size_t recv_len = 0, fifo_recved_len = rt_dma_calc_recved_len(serial);
RT_ASSERT(rx_fifo != RT_NULL);
if (length < fifo_recved_len) {
recv_len = length;
} else {
recv_len = fifo_recved_len;
}
if (rx_fifo->get_index + recv_len < serial->config.bufsz) {
rt_memcpy(data, rx_fifo->buffer + rx_fifo->get_index, recv_len);
} else {
rt_memcpy(data, rx_fifo->buffer + rx_fifo->get_index,
serial->config.bufsz - rx_fifo->get_index);
rt_memcpy(data + serial->config.bufsz - rx_fifo->get_index, rx_fifo->buffer,
recv_len + rx_fifo->get_index - serial->config.bufsz);
}
rt_dma_recv_update_get_index(serial, recv_len);
rt_hw_interrupt_enable(level);
return recv_len;
}
else result = -RT_EBUSY;
rt_hw_interrupt_enable(level);
if (result == RT_EOK) return length;
rt_set_errno(result);
return 0;
}
rt_inline int _serial_dma_tx(struct rt_serial_device *serial, const rt_uint8_t *data, int length)
@@ -192,8 +297,8 @@ rt_inline int _serial_dma_tx(struct rt_serial_device *serial, const rt_uint8_t *
struct rt_serial_tx_dma *tx_dma;
tx_dma = (struct rt_serial_tx_dma*)(serial->serial_tx);
result = rt_data_queue_push(&(tx_dma->data_queue), data, length, RT_WAITING_FOREVER);
result = rt_data_queue_push(&(tx_dma->data_queue), data, length, RT_WAITING_FOREVER);
if (result == RT_EOK)
{
level = rt_hw_interrupt_disable();
@@ -203,7 +308,7 @@ rt_inline int _serial_dma_tx(struct rt_serial_device *serial, const rt_uint8_t *
rt_hw_interrupt_enable(level);
/* make a DMA transfer */
serial->ops->dma_transmit(serial, data, length, RT_SERIAL_DMA_TX);
serial->ops->dma_transmit(serial, (rt_uint8_t *)data, length, RT_SERIAL_DMA_TX);
}
else
{
@@ -250,7 +355,7 @@ static rt_err_t rt_serial_open(struct rt_device *dev, rt_uint16_t oflag)
serial = (struct rt_serial_device *)dev;
/* check device flag with the open flag */
if ((oflag & RT_DEVICE_FLAG_DMA_RX) && !(dev->flag & RT_DEVICE_FLAG_DMA_RX))
if ((oflag & RT_DEVICE_FLAG_DMA_RX) && !(dev->flag & RT_DEVICE_FLAG_DMA_RX))
return -RT_EIO;
if ((oflag & RT_DEVICE_FLAG_DMA_TX) && !(dev->flag & RT_DEVICE_FLAG_DMA_TX))
return -RT_EIO;
@@ -261,26 +366,41 @@ static rt_err_t rt_serial_open(struct rt_device *dev, rt_uint16_t oflag)
/* get open flags */
dev->open_flag = oflag & 0xff;
/* initialize the Rx/Tx structure according to open flag */
if (serial->serial_rx == RT_NULL)
{
if (oflag & RT_DEVICE_FLAG_DMA_RX)
{
struct rt_serial_rx_dma* rx_dma;
if (serial->config.bufsz == 0) {
struct rt_serial_rx_dma* rx_dma;
rx_dma = (struct rt_serial_rx_dma*) rt_malloc (sizeof(struct rt_serial_rx_dma));
RT_ASSERT(rx_dma != RT_NULL);
rx_dma->activated = RT_FALSE;
rx_dma = (struct rt_serial_rx_dma*) rt_malloc (sizeof(struct rt_serial_rx_dma));
RT_ASSERT(rx_dma != RT_NULL);
rx_dma->activated = RT_FALSE;
serial->serial_rx = rx_dma;
serial->serial_rx = rx_dma;
} else {
struct rt_serial_rx_fifo* rx_fifo;
rx_fifo = (struct rt_serial_rx_fifo*) rt_malloc (sizeof(struct rt_serial_rx_fifo) +
serial->config.bufsz);
RT_ASSERT(rx_fifo != RT_NULL);
rx_fifo->buffer = (rt_uint8_t*) (rx_fifo + 1);
rt_memset(rx_fifo->buffer, 0, serial->config.bufsz);
rx_fifo->put_index = 0;
rx_fifo->get_index = 0;
serial->serial_rx = rx_fifo;
/* configure fifo address and length to low level device */
serial->ops->control(serial, RT_DEVICE_CTRL_CONFIG, (void *) RT_DEVICE_FLAG_DMA_RX);
}
dev->open_flag |= RT_DEVICE_FLAG_DMA_RX;
}
else if (oflag & RT_DEVICE_FLAG_INT_RX)
{
struct rt_serial_rx_fifo* rx_fifo;
rx_fifo = (struct rt_serial_rx_fifo*) rt_malloc (sizeof(struct rt_serial_rx_fifo) +
rx_fifo = (struct rt_serial_rx_fifo*) rt_malloc (sizeof(struct rt_serial_rx_fifo) +
serial->config.bufsz);
RT_ASSERT(rx_fifo != RT_NULL);
rx_fifo->buffer = (rt_uint8_t*) (rx_fifo + 1);
@@ -308,7 +428,7 @@ static rt_err_t rt_serial_open(struct rt_device *dev, rt_uint16_t oflag)
tx_dma = (struct rt_serial_tx_dma*) rt_malloc (sizeof(struct rt_serial_tx_dma));
RT_ASSERT(tx_dma != RT_NULL);
tx_dma->activated = RT_FALSE;
rt_data_queue_init(&(tx_dma->data_queue), 8, 4, RT_NULL);
serial->serial_tx = tx_dma;
@@ -346,7 +466,7 @@ static rt_err_t rt_serial_close(struct rt_device *dev)
/* this device has more reference count */
if (dev->ref_count > 1) return RT_EOK;
if (dev->open_flag & RT_DEVICE_FLAG_INT_RX)
{
struct rt_serial_rx_fifo* rx_fifo;
@@ -362,12 +482,23 @@ static rt_err_t rt_serial_close(struct rt_device *dev)
}
else if (dev->open_flag & RT_DEVICE_FLAG_DMA_RX)
{
struct rt_serial_rx_dma* rx_dma;
if (serial->config.bufsz == 0) {
struct rt_serial_rx_dma* rx_dma;
rx_dma = (struct rt_serial_rx_dma*)serial->serial_tx;
RT_ASSERT(rx_dma != RT_NULL);
rx_dma = (struct rt_serial_rx_dma*)serial->serial_rx;
RT_ASSERT(rx_dma != RT_NULL);
rt_free(rx_dma);
rt_free(rx_dma);
} else {
struct rt_serial_rx_fifo* rx_fifo;
rx_fifo = (struct rt_serial_rx_fifo*)serial->serial_rx;
RT_ASSERT(rx_fifo != RT_NULL);
rt_free(rx_fifo);
}
/* configure low level device */
serial->ops->control(serial, RT_DEVICE_CTRL_CLR_INT, (void *) RT_DEVICE_FLAG_DMA_RX);
serial->serial_rx = RT_NULL;
dev->open_flag &= ~RT_DEVICE_FLAG_DMA_RX;
}
@@ -376,7 +507,7 @@ static rt_err_t rt_serial_close(struct rt_device *dev)
{
struct rt_serial_tx_fifo* tx_fifo;
tx_fifo = (struct rt_serial_tx_fifo*)serial->serial_rx;
tx_fifo = (struct rt_serial_tx_fifo*)serial->serial_tx;
RT_ASSERT(tx_fifo != RT_NULL);
rt_free(tx_fifo);
@@ -534,30 +665,30 @@ void rt_hw_serial_isr(struct rt_serial_device *serial, int event)
ch = serial->ops->getc(serial);
if (ch == -1) break;
/* disable interrupt */
level = rt_hw_interrupt_disable();
rx_fifo->buffer[rx_fifo->put_index] = ch;
rx_fifo->put_index += 1;
if (rx_fifo->put_index >= serial->config.bufsz) rx_fifo->put_index = 0;
/* if the next position is read index, discard this 'read char' */
if (rx_fifo->put_index == rx_fifo->get_index)
{
rx_fifo->get_index += 1;
if (rx_fifo->get_index >= serial->config.bufsz) rx_fifo->get_index = 0;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
/* invoke callback */
if (serial->parent.rx_indicate != RT_NULL)
{
rt_size_t rx_length;
/* get rx length */
level = rt_hw_interrupt_disable();
rx_length = (rx_fifo->put_index >= rx_fifo->get_index)? (rx_fifo->put_index - rx_fifo->get_index):
@@ -584,19 +715,19 @@ void rt_hw_serial_isr(struct rt_serial_device *serial, int event)
struct rt_serial_tx_dma* tx_dma;
tx_dma = (struct rt_serial_tx_dma*) serial->serial_tx;
rt_data_queue_pop(&(tx_dma->data_queue), &last_data_ptr, &data_size, 0);
if (rt_data_queue_peak(&(tx_dma->data_queue), &data_ptr, &data_size) == RT_EOK)
{
/* transmit next data node */
tx_dma->activated = RT_TRUE;
serial->ops->dma_transmit(serial, data_ptr, data_size, RT_SERIAL_DMA_TX);
serial->ops->dma_transmit(serial, (rt_uint8_t *)data_ptr, data_size, RT_SERIAL_DMA_TX);
}
else
{
tx_dma->activated = RT_FALSE;
}
/* invoke callback */
if (serial->parent.tx_complete != RT_NULL)
{
@@ -607,13 +738,27 @@ void rt_hw_serial_isr(struct rt_serial_device *serial, int event)
case RT_SERIAL_EVENT_RX_DMADONE:
{
int length;
struct rt_serial_rx_dma* rx_dma;
rx_dma = (struct rt_serial_rx_dma*)serial->serial_rx;
/* get DMA rx length */
length = (event & (~0xff)) >> 8;
serial->parent.rx_indicate(&(serial->parent), length);
rx_dma->activated = RT_FALSE;
if (serial->config.bufsz == 0) {
struct rt_serial_rx_dma* rx_dma;
rx_dma = (struct rt_serial_rx_dma*)serial->serial_rx;
RT_ASSERT(rx_dma != RT_NULL);
RT_ASSERT(serial->parent.rx_indicate != RT_NULL);
serial->parent.rx_indicate(&(serial->parent), length);
rx_dma->activated = RT_FALSE;
} else {
/* update fifo put index */
rt_dma_recv_update_put_index(serial, length);
/* invoke callback */
if (serial->parent.rx_indicate != RT_NULL) {
serial->parent.rx_indicate(&(serial->parent), rt_dma_calc_recved_len(serial));
}
}
break;
}
}
components/drivers/spi/SConscript
+3
View File
@@ -21,6 +21,9 @@ if GetDepend('RT_USING_AT45DBXX'):
if GetDepend('RT_USING_SST25VFXX'):
src_device += ['spi_flash_sst25vfxx.c']
if GetDepend('RT_USING_GD'):
src_device += ['spi_flash_gd.c']
src += src_device
group = DefineGroup('DeviceDrivers', src, depend = ['RT_USING_SPI'], CPPPATH = CPPPATH)
components/drivers/spi/enc28j60.c
+1 -1
View File
@@ -675,7 +675,7 @@ static struct pbuf *enc28j60_rx(rt_device_t dev)
else
{
/* allocation pbuf */
p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
p = pbuf_alloc(PBUF_LINK, len, PBUF_POOL);
if (p != RT_NULL)
{
struct pbuf* q;
components/drivers/spi/spi_flash.h
+36
View File
@@ -0,0 +1,36 @@
/*
* File : spi_flash.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2016, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2016/5/20 bernard the first version
*/
#ifndef SPI_FLASH_H__
#define SPI_FLASH_H__
struct spi_flash_device
{
struct rt_device flash_device;
struct rt_device_blk_geometry geometry;
struct rt_spi_device * rt_spi_device;
struct rt_mutex lock;
};
#endif
components/drivers/spi/spi_flash_at45dbxx.c
+14 -4
View File
@@ -1,11 +1,21 @@
/*
* File : rtdef.h
* File : spi_flash_at45dbxx.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
components/drivers/spi/spi_flash_at45dbxx.h
+24
View File
@@ -1,3 +1,27 @@
/*
* File : spi_flash_at45dbxx.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2011-12-16 aozima the first version
*/
#ifndef SPI_FLASH_AT45DBXX_H_INCLUDED
#define SPI_FLASH_AT45DBXX_H_INCLUDED
components/drivers/spi/spi_flash_gd.c
+346
View File
@@ -0,0 +1,346 @@
/*
* File : spi_flash_gd.c
* This file is part of RT-Thread RTOS
* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-10-11 fullhan copy from winbond flash
*/
#include <stdint.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "spi_flash.h"
#include "spi_flash_gd.h"
#define FLASH_DEBUG
#ifdef FLASH_DEBUG
#define FLASH_TRACE rt_kprintf
#else
#define FLASH_TRACE(...)
#endif /* #ifdef FLASH_DEBUG */
#define PAGE_SIZE 4096
/* JEDEC Manufacturer's ID */
#define MF_ID (0xC8)
/* JEDEC Device ID: Memory type and Capacity */
#define MTC_GD25Q128 (0x4018)
/* command list */
#define CMD_WRSR (0x01) /* Write Status Register */
#define CMD_PP (0x02) /* Page Program */
#define CMD_READ (0x03) /* Read Data */
#define CMD_WRDI (0x04) /* Write Disable */
#define CMD_RDSR1 (0x05) /* Read Status Register-1 */
#define CMD_WREN (0x06) /* Write Enable */
#define CMD_FAST_READ (0x0B) /* Fast Read */
#define CMD_ERASE_4K (0x20) /* Sector Erase:4K */
#define CMD_RDSR2 (0x35) /* Read Status Register-2 */
#define CMD_ERASE_32K (0x52) /* 32KB Block Erase */
#define CMD_JEDEC_ID (0x9F) /* Read JEDEC ID */
#define CMD_ERASE_full (0xC7) /* Chip Erase */
#define CMD_ERASE_64K (0xD8) /* 64KB Block Erase */
#define DUMMY (0xFF)
static struct spi_flash_device spi_flash_device;
static void flash_lock(struct spi_flash_device * flash_device)
{
rt_mutex_take(&flash_device->lock, RT_WAITING_FOREVER);
}
static void flash_unlock(struct spi_flash_device * flash_device)
{
rt_mutex_release(&flash_device->lock);
}
static uint8_t w25qxx_read_status(void)
{
return rt_spi_sendrecv8(spi_flash_device.rt_spi_device, CMD_RDSR1);
}
static void w25qxx_wait_busy(void)
{
while( w25qxx_read_status() & (0x01));
}
/** \brief read [size] byte from [offset] to [buffer]
*
* \param offset uint32_t unit : byte
* \param buffer uint8_t*
* \param size uint32_t unit : byte
* \return uint32_t byte for read
*
*/
static uint32_t w25qxx_read(uint32_t offset, uint8_t * buffer, uint32_t size)
{
uint8_t send_buffer[4];
send_buffer[0] = CMD_WRDI;
rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
send_buffer[0] = CMD_READ;
send_buffer[1] = (uint8_t)(offset>>16);
send_buffer[2] = (uint8_t)(offset>>8);
send_buffer[3] = (uint8_t)(offset);
rt_spi_send_then_recv(spi_flash_device.rt_spi_device,
send_buffer, 4,
buffer, size);
return size;
}
/** \brief write N page on [page]
*
* \param page_addr uint32_t unit : byte (4096 * N,1 page = 4096byte)
* \param buffer const uint8_t*
* \return uint32_t
*
*/
static uint32_t w25qxx_page_write(uint32_t page_addr, const uint8_t* buffer)
{
uint32_t index;
uint8_t send_buffer[4];
RT_ASSERT((page_addr&0xFF) == 0); /* page addr must align to 256byte. */
send_buffer[0] = CMD_WREN;
rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
send_buffer[0] = CMD_ERASE_4K;
send_buffer[1] = (page_addr >> 16);
send_buffer[2] = (page_addr >> 8);
send_buffer[3] = (page_addr);
rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 4);
w25qxx_wait_busy(); // wait erase done.
for(index=0; index < (PAGE_SIZE / 256); index++)
{
send_buffer[0] = CMD_WREN;
rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
send_buffer[0] = CMD_PP;
send_buffer[1] = (uint8_t)(page_addr >> 16);
send_buffer[2] = (uint8_t)(page_addr >> 8);
send_buffer[3] = (uint8_t)(page_addr);
rt_spi_send_then_send(spi_flash_device.rt_spi_device,
send_buffer,
4,
buffer,
256);
buffer += 256;
page_addr += 256;
w25qxx_wait_busy();
}
send_buffer[0] = CMD_WRDI;
rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
return PAGE_SIZE;
}
/* RT-Thread device interface */
static rt_err_t w25qxx_flash_init(rt_device_t dev)
{
return RT_EOK;
}
static rt_err_t w25qxx_flash_open(rt_device_t dev, rt_uint16_t oflag)
{
uint8_t send_buffer[3];
flash_lock((struct spi_flash_device *)dev);
send_buffer[0] = CMD_WREN;
rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 1);
send_buffer[0] = CMD_WRSR;
send_buffer[1] = 0;
send_buffer[2] = 0;
rt_spi_send(spi_flash_device.rt_spi_device, send_buffer, 3);
w25qxx_wait_busy();
flash_unlock((struct spi_flash_device *)dev);
return RT_EOK;
}
static rt_err_t w25qxx_flash_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_err_t w25qxx_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
RT_ASSERT(dev != RT_NULL);
if (cmd == RT_DEVICE_CTRL_BLK_GETGEOME)
{
struct rt_device_blk_geometry *geometry;
geometry = (struct rt_device_blk_geometry *)args;
if (geometry == RT_NULL) return -RT_ERROR;
geometry->bytes_per_sector = spi_flash_device.geometry.bytes_per_sector;
geometry->sector_count = spi_flash_device.geometry.sector_count;
geometry->block_size = spi_flash_device.geometry.block_size;
}
return RT_EOK;
}
static rt_size_t w25qxx_flash_read(rt_device_t dev,
rt_off_t pos,
void* buffer,
rt_size_t size)
{
flash_lock((struct spi_flash_device *)dev);
w25qxx_read(pos*spi_flash_device.geometry.bytes_per_sector,
buffer,
size*spi_flash_device.geometry.bytes_per_sector);
flash_unlock((struct spi_flash_device *)dev);
return size;
}
static rt_size_t w25qxx_flash_write(rt_device_t dev,
rt_off_t pos,
const void* buffer,
rt_size_t size)
{
rt_size_t i = 0;
rt_size_t block = size;
const uint8_t * ptr = buffer;
flash_lock((struct spi_flash_device *)dev);
while(block--)
{
w25qxx_page_write((pos + i)*spi_flash_device.geometry.bytes_per_sector,
ptr);
ptr += PAGE_SIZE;
i++;
}
flash_unlock((struct spi_flash_device *)dev);
return size;
}
rt_err_t gd_init(const char * flash_device_name, const char * spi_device_name)
{
struct rt_spi_device * rt_spi_device;
/* initialize mutex */
if (rt_mutex_init(&spi_flash_device.lock, spi_device_name, RT_IPC_FLAG_FIFO) != RT_EOK)
{
rt_kprintf("init sd lock mutex failed\n");
return -RT_ENOSYS;
}
rt_spi_device = (struct rt_spi_device *)rt_device_find(spi_device_name);
if(rt_spi_device == RT_NULL)
{
FLASH_TRACE("spi device %s not found!\r\n", spi_device_name);
return -RT_ENOSYS;
}
spi_flash_device.rt_spi_device = rt_spi_device;
/* config spi */
{
struct rt_spi_configuration cfg;
cfg.data_width = 8;
cfg.mode = RT_SPI_MODE_0 | RT_SPI_MSB; /* SPI Compatible: Mode 0 and Mode 3 */
cfg.max_hz = 50 * 1000 * 1000; /* 50M */
rt_spi_configure(spi_flash_device.rt_spi_device, &cfg);
}
/* init flash */
{
rt_uint8_t cmd;
rt_uint8_t id_recv[3];
uint16_t memory_type_capacity;
flash_lock(&spi_flash_device);
cmd = 0xFF; /* reset SPI FLASH, cancel all cmd in processing. */
rt_spi_send(spi_flash_device.rt_spi_device, &cmd, 1);
cmd = CMD_WRDI;
rt_spi_send(spi_flash_device.rt_spi_device, &cmd, 1);
/* read flash id */
cmd = CMD_JEDEC_ID;
rt_spi_send_then_recv(spi_flash_device.rt_spi_device, &cmd, 1, id_recv, 3);
flash_unlock(&spi_flash_device);
if(id_recv[0] != MF_ID)
{
FLASH_TRACE("Manufacturers ID error!\r\n");
FLASH_TRACE("JEDEC Read-ID Data : %02X %02X %02X\r\n", id_recv[0], id_recv[1], id_recv[2]);
return -RT_ENOSYS;
}
spi_flash_device.geometry.bytes_per_sector = 4096;
spi_flash_device.geometry.block_size = 4096; /* block erase: 4k */
/* get memory type and capacity */
memory_type_capacity = id_recv[1];
memory_type_capacity = (memory_type_capacity << 8) | id_recv[2];
if(memory_type_capacity == MTC_GD25Q128)
{
FLASH_TRACE("GD128 detection\r\n");
spi_flash_device.geometry.sector_count = 4096;
}
else
{
FLASH_TRACE("Memory Capacity error!\r\n");
return -RT_ENOSYS;
}
}
/* register device */
spi_flash_device.flash_device.type = RT_Device_Class_Block;
spi_flash_device.flash_device.init = w25qxx_flash_init;
spi_flash_device.flash_device.open = w25qxx_flash_open;
spi_flash_device.flash_device.close = w25qxx_flash_close;
spi_flash_device.flash_device.read = w25qxx_flash_read;
spi_flash_device.flash_device.write = w25qxx_flash_write;
spi_flash_device.flash_device.control = w25qxx_flash_control;
/* no private */
spi_flash_device.flash_device.user_data = RT_NULL;
rt_device_register(&spi_flash_device.flash_device, flash_device_name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
return RT_EOK;
}
components/drivers/spi/spi_flash_gd.h
+32
View File
@@ -0,0 +1,32 @@
/*
* File : spi_flash_gd.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2016, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-10-11 fullhan copy from winbond flash
*/
#ifndef SPI_FLASH_GD_H_
#define SPI_FLASH_GD_H_
#include <rtthread.h>
extern rt_err_t gd_init(const char * flash_device_name, const char * spi_device_name);
#endif /* SPI_FLASH_GD_H_ */
components/drivers/spi/spi_flash_sst25vfxx.c
+14 -4
View File
@@ -1,11 +1,21 @@
/*
* File : rtdef.h
* File : spi_flash_sst25vfxx.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
components/drivers/spi/spi_flash_sst25vfxx.h
+14 -4
View File
@@ -1,11 +1,21 @@
/*
* File : rtdef.h
* File : spi_flash_sst25vxx.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
components/drivers/spi/spi_flash_w25qxx.c
+17 -6
View File
@@ -3,9 +3,19 @@
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
@@ -13,10 +23,12 @@
* 2012-05-06 aozima can page write.
* 2012-08-23 aozima add flash lock.
* 2012-08-24 aozima fixed write status register BUG.
* 2015-05-13 bernard add GD25Q flash ID.
*/
#include <stdint.h>
#include <rtdevice.h>
#include "spi_flash.h"
#include "spi_flash_w25qxx.h"
#define FLASH_DEBUG
@@ -31,7 +43,6 @@
/* JEDEC Manufacturer��s ID */
#define MF_ID (0xEF)
#define GD_ID (0xC8)
/* JEDEC Device ID: Memory type and Capacity */
#define MTC_W25Q80_BV (0x4014) /* W25Q80BV */
@@ -301,7 +312,7 @@ rt_err_t w25qxx_init(const char * flash_device_name, const char * spi_device_nam
flash_unlock(&spi_flash_device);
if(id_recv[0] != MF_ID && id_recv[0] != GD_ID)
if(id_recv[0] != MF_ID)
{
FLASH_TRACE("Manufacturers ID error!\r\n");
FLASH_TRACE("JEDEC Read-ID Data : %02X %02X %02X\r\n", id_recv[0], id_recv[1], id_recv[2]);
components/drivers/spi/spi_flash_w25qxx.h
+13 -13
View File
@@ -3,9 +3,19 @@
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
@@ -17,18 +27,8 @@
#define SPI_FLASH_W25QXX_H_INCLUDED
#include <rtthread.h>
#include <drivers/spi.h>
struct spi_flash_device
{
struct rt_device flash_device;
struct rt_device_blk_geometry geometry;
struct rt_spi_device * rt_spi_device;
struct rt_mutex lock;
};
extern rt_err_t w25qxx_init(const char * flash_device_name,
const char * spi_device_name);
#endif // SPI_FLASH_W25QXX_H_INCLUDED
components/external/cairo/SConscript
Vendored
+2 -4
View File
@@ -1,11 +1,9 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
import os
CAIRO_VERSION = '1.10.2'
CAIRO_PATH = 'cairo-' + CAIRO_VERSION
cwd = GetCurrentDir()
if GetDepend('RT_USING_CAIRO') and not os.path.exists(CAIRO_PATH):
print '================ERROR============================'
@@ -99,7 +97,7 @@ cairo.c
for item in range(len(src)):
src[item] = CAIRO_PATH + '/src/' + src[item]
CPPPATH = [RTT_ROOT + '/components/external/cairo/' + CAIRO_PATH + '/src', RTT_ROOT + '/components/external/cairo/']
CPPPATH = [cwd + '/' + CAIRO_PATH + '/src', cwd]
group = DefineGroup('cairo', src, depend = ['RT_USING_CAIRO', 'RT_USING_NEWLIB', 'RTGUI_IMAGE_PNG', 'RT_USING_PTHREADS'], CPPPATH = CPPPATH)
Return('group')
components/external/lzo/SConscript
Vendored
+2 -3
View File
@@ -1,12 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Split('''
minilzo.c
lzo.c
''')
CPPPATH = [RTT_ROOT + '/components/external/lzo']
CPPPATH = [cwd]
group = DefineGroup('lzo', src, depend = ['RT_USING_LZO'], CPPPATH = CPPPATH)
components/external/nanopb/SConscript
Vendored
+2 -3
View File
@@ -1,13 +1,12 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Split('''
pb_common.c
pb_decode.c
pb_encode.c
''')
CPPPATH = [RTT_ROOT + '/components/external/nanopb']
CPPPATH = [cwd]
group = DefineGroup('Nanopb', src, depend = ['RT_USING_NANOPB'], CPPPATH = CPPPATH)
components/libc/SConscript
+3
View File
@@ -17,4 +17,7 @@ else:
if rtconfig.PLATFORM == 'gcc' and rtconfig.ARCH != 'sim':
objs = objs + SConscript('minilibc/SConscript')
objs = objs + SConscript('pthreads/SConscript')
objs = objs + SConscript('libdl/SConscript')
Return('objs')
components/libdl/SConscript → components/libc/libdl/SConscript
+3 -3
View File
@@ -1,9 +1,9 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
src = Glob('*.c')
CPPPATH = [RTT_ROOT + '/components/libdl']
cwd = GetCurrentDir()
CPPPATH = [cwd]
group = DefineGroup('libdl', src, depend = ['RT_USING_MODULE', 'RT_USING_LIBDL'], CPPPATH = CPPPATH)
Return('group')
components/libdl/dlclose.c → components/libc/libdl/dlclose.c
View File
components/libdl/dlerror.c → components/libc/libdl/dlerror.c
View File
components/libdl/dlfcn.h → components/libc/libdl/dlfcn.h
View File
components/libdl/dlopen.c → components/libc/libdl/dlopen.c
View File
components/libdl/dlsym.c → components/libc/libdl/dlsym.c
View File
components/libc/newlib/syscalls.c
+15
View File
@@ -447,3 +447,18 @@ void __libc_init_array(void)
{
/* we not use __libc init_aray to initialize C++ objects */
}
void abort(void)
{
if (rt_thread_self())
{
rt_thread_t self = rt_thread_self();
rt_kprintf("thread:%-8.*s abort!\n", RT_NAME_MAX, self->name);
rt_thread_suspend(self);
rt_schedule();
}
while (1);
}
components/pthreads/SConscript → components/libc/pthreads/SConscript
+3 -2
View File
@@ -1,8 +1,9 @@
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [RTT_ROOT + '/components/pthreads']
CPPPATH = [cwd]
group = DefineGroup('pthreads', src, depend = ['RT_USING_PTHREADS', 'RT_USING_LIBC'], CPPPATH = CPPPATH)
Return('group')
components/pthreads/clock_time.c → components/libc/pthreads/clock_time.c
View File
components/pthreads/mqueue.c → components/libc/pthreads/mqueue.c
View File
components/pthreads/mqueue.h → components/libc/pthreads/mqueue.h
View File
components/pthreads/posix_types.h → components/libc/pthreads/posix_types.h
View File
components/pthreads/pthread.c → components/libc/pthreads/pthread.c
View File
components/pthreads/pthread.h → components/libc/pthreads/pthread.h
+14
View File
@@ -142,6 +142,20 @@ typedef struct pthread_barrier pthread_barrier_t;
/* pthread thread interface */
int pthread_attr_destroy(pthread_attr_t *attr);
int pthread_attr_init(pthread_attr_t *attr);
int pthread_attr_setdetachstate(pthread_attr_t *attr, int state);
int pthread_attr_getdetachstate(pthread_attr_t const *attr, int *state);
int pthread_attr_setschedpolicy(pthread_attr_t *attr, int policy);
int pthread_attr_getschedpolicy(pthread_attr_t const *attr, int *policy);
int pthread_attr_setstacksize(pthread_attr_t *attr, size_t stack_size);
int pthread_attr_getstacksize(pthread_attr_t const *attr, size_t *stack_size);
int pthread_attr_setstackaddr(pthread_attr_t *attr, void *stack_addr);
int pthread_attr_getstackaddr(pthread_attr_t const *attr, void **stack_addr);
int pthread_attr_setstack(pthread_attr_t *attr,
void *stack_base,
size_t stack_size);
int pthread_attr_getstack(pthread_attr_t const *attr,
void **stack_base,
size_t *stack_size);
int pthread_system_init(void);
int pthread_create (pthread_t *tid, const pthread_attr_t *attr,
components/pthreads/pthread_attr.c → components/libc/pthreads/pthread_attr.c
View File
components/pthreads/pthread_barrier.c → components/libc/pthreads/pthread_barrier.c
View File

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