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Merge branch 'pr-11239' into copilot/fix-aarch64-github-actions-job

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This commit is contained in:
copilot-swe-agent[bot]
2026-06-08 01:39:26 +00:00
committed by GitHub
parent 961de42773 299f52d8d1
commit 925c51e6e7
28 changed files with 1566 additions and 967 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.github/ALL_BSP_COMPILE.json
+2 -1
View File
@@ -394,7 +394,8 @@
"qemu-virt64-aarch64",
"raspberry-pi/raspi3-64",
"raspberry-pi/raspi4-64",
"nxp/imx/imx91"
"nxp/imx/imx91",
"zynqmp-a53-dfzu2eg"
]
},
{
.github/workflows/utest_auto_run.yml
+23 -5
View File
@@ -79,6 +79,10 @@ jobs:
- { UTEST: "AARCH64-rtsmart", RTT_BSP: "bsp/qemu-virt64-aarch64", QEMU_ARCH: "aarch64", QEMU_MACHINE: "virt", SD_FILE: "sd.bin", KERNEL: "rtsmart", "SMP_RUN":"" }
- { UTEST: "AARCH64-smp", RTT_BSP: "bsp/qemu-virt64-aarch64", QEMU_ARCH: "aarch64", QEMU_MACHINE: "virt", SD_FILE: "sd.bin", KERNEL: "standard", "SMP_RUN":"smp" }
- { UTEST: "AARCH64", RTT_BSP: "bsp/zynqmp-a53-dfzu2eg", QEMU_ARCH: "aarch64", QEMU_MACHINE: "xlnx-zcu102", SD_FILE: "None", KERNEL: "standard", "SMP_RUN":"" }
- { UTEST: "AARCH64-rtsmart", RTT_BSP: "bsp/zynqmp-a53-dfzu2eg", QEMU_ARCH: "aarch64", QEMU_MACHINE: "xlnx-zcu102", SD_FILE: "None", KERNEL: "rtsmart", "SMP_RUN":"" }
- { UTEST: "AARCH64-smp", RTT_BSP: "bsp/zynqmp-a53-dfzu2eg", QEMU_ARCH: "aarch64", QEMU_MACHINE: "xlnx-zcu102", SD_FILE: "None", KERNEL: "standard", "SMP_RUN":"smp" }
config_file:
- "default.cfg"
@@ -158,7 +162,7 @@ jobs:
shell: bash
run: |
sudo apt-get update
sudo apt-get -yqq install scons qemu-system git
sudo apt-get -yqq install scons qemu-system git device-tree-compiler
pip3 install kconfiglib
- name: Install ToolChains
@@ -284,10 +288,24 @@ jobs:
fi
if [[ "${{ matrix.platform.QEMU_ARCH }}" == "aarch64" ]]; then
qemu-system-$TEST_QEMU_ARCH -M virt,gic-version=2 -cpu cortex-a53 -smp 4 -kernel $TEST_BSP_ROOT/rtthread.bin -nographic \
-drive if=none,file=$TEST_BSP_ROOT/sd.bin,format=raw,id=blk0 -device virtio-blk-device,drive=blk0,bus=virtio-mmio-bus.0 \
-netdev user,id=net0 -device virtio-net-device,netdev=net0,bus=virtio-mmio-bus.1 \
> qemu_output_$TEST_QEMU_ARCH.log 2>&1 &
sudo apt-get -yqq install device-tree-compiler
if [[ "${{ matrix.platform.QEMU_MACHINE }}" == "virt" ]]; then
qemu-system-$TEST_QEMU_ARCH -M virt,gic-version=2 -cpu cortex-a53 -smp 4 -kernel $TEST_BSP_ROOT/rtthread.bin -nographic \
-drive if=none,file=$TEST_BSP_ROOT/sd.bin,format=raw,id=blk0 -device virtio-blk-device,drive=blk0,bus=virtio-mmio-bus.0 \
-netdev user,id=net0 -device virtio-net-device,netdev=net0,bus=virtio-mmio-bus.1 \
> qemu_output_$TEST_QEMU_ARCH.log 2>&1 &
elif [[ "${{ matrix.platform.QEMU_MACHINE }}" == "xlnx-zcu102" ]]; then
heap=$(grep -E '^#define[[:space:]]+ARCH_HEAP_SIZE' $TEST_BSP_ROOT/rtconfig.h | awk '{print $3}')
page=$(grep -E '^#define[[:space:]]+ARCH_INIT_PAGE_SIZE' $TEST_BSP_ROOT/rtconfig.h | awk '{print $3}')
heap=$(echo "$heap" | tr -d '()')
page=$(echo "$page" | tr -d '()')
heap_val=$((heap))
page_val=$((page))
mem=$((heap_val + page_val))
mem=$((128 + mem / (1024 * 1024)))
qemu-system-$TEST_QEMU_ARCH -M xlnx-zcu102 -m $mem -kernel $TEST_BSP_ROOT/rtthread.bin -nographic \
> qemu_output_$TEST_QEMU_ARCH.log 2>&1 &
fi
elif [[ "${{ matrix.platform.UTEST }}" == "XUANTIE-rtsmart" ]]; then
sudo apt-get install -y dos2unix libcapstone-dev libbrlapi-dev
wget -q https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1736318325160/Xuantie-qemu-x86_64-Ubuntu-20.04-V5.0.5-B20250108-0335.tar.gz
bsp/zynqmp-a53-dfzu2eg/.config
+66 -48
View File
@@ -11,18 +11,8 @@
# rt_vsnprintf options
#
# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set
CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG=y
CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD=y
CONFIG_RT_KLIBC_USING_VSNPRINTF_DECIMAL_SPECIFIERS=y
CONFIG_RT_KLIBC_USING_VSNPRINTF_EXPONENTIAL_SPECIFIERS=y
CONFIG_RT_KLIBC_USING_VSNPRINTF_WRITEBACK_SPECIFIER=y
CONFIG_RT_KLIBC_USING_VSNPRINTF_CHECK_NUL_IN_FORMAT_SPECIFIER=y
# CONFIG_RT_KLIBC_USING_VSNPRINTF_MSVC_STYLE_INTEGER_SPECIFIERS is not set
CONFIG_RT_KLIBC_USING_VSNPRINTF_INTEGER_BUFFER_SIZE=32
CONFIG_RT_KLIBC_USING_VSNPRINTF_DECIMAL_BUFFER_SIZE=32
CONFIG_RT_KLIBC_USING_VSNPRINTF_FLOAT_PRECISION=6
CONFIG_RT_KLIBC_USING_VSNPRINTF_MAX_INTEGRAL_DIGITS_FOR_DECIMAL=9
CONFIG_RT_KLIBC_USING_VSNPRINTF_LOG10_TAYLOR_TERMS=4
# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set
# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set
# end of rt_vsnprintf options
#
@@ -121,8 +111,8 @@ CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_NANO is not set
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_CPUS_NR=1
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=4
CONFIG_RT_ALIGN_SIZE=8
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
@@ -136,11 +126,12 @@ CONFIG_RT_HOOK_USING_FUNC_PTR=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=8192
CONFIG_SYSTEM_THREAD_STACK_SIZE=8192
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=8192
# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
CONFIG_RT_USING_CPU_USAGE_TRACER=y
#
# kservice options
@@ -153,6 +144,8 @@ CONFIG_RT_DEBUGING_ASSERT=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_AUTO_INIT is not set
# CONFIG_RT_DEBUGING_SPINLOCK is not set
CONFIG_RT_DEBUGING_CRITICAL=y
# CONFIG_RT_USING_CI_ACTION is not set
#
@@ -296,7 +289,7 @@ CONFIG_RT_USING_DFS_ROMFS=y
#
# Device Drivers
#
# CONFIG_RT_USING_DM is not set
CONFIG_RT_USING_DM=y
CONFIG_RT_USING_DEV_BUS=y
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_UNAMED_PIPE_NUMBER=64
@@ -308,9 +301,14 @@ CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=256
# CONFIG_RT_USING_SERIAL_BYPASS is not set
CONFIG_RT_USING_SERIAL_BYPASS=y
# CONFIG_RT_SERIAL_EARLY_HVC is not set
# CONFIG_RT_SERIAL_PL011 is not set
# CONFIG_RT_SERIAL_8250 is not set
CONFIG_RT_SERIAL_XILINX_PS=y
# CONFIG_RT_USING_CAN is not set
CONFIG_RT_USING_CLOCK_TIME=y
CONFIG_RT_CLOCK_TIME_ARM_ARCH=y
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
# CONFIG_RT_USING_PHY_V2 is not set
@@ -324,38 +322,68 @@ CONFIG_RT_USING_RANDOM=y
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
CONFIG_RT_USING_PM=y
CONFIG_PM_TICKLESS_THRESHOLD_TIME=2
# CONFIG_PM_USING_CUSTOM_CONFIG is not set
# CONFIG_PM_ENABLE_DEBUG is not set
# CONFIG_PM_ENABLE_SUSPEND_SLEEP_MODE is not set
# CONFIG_PM_ENABLE_THRESHOLD_SLEEP_MODE is not set
# CONFIG_RT_USING_PM is not set
CONFIG_RT_USING_RTC=y
# CONFIG_RT_USING_ALARM is not set
CONFIG_RT_USING_SOFT_RTC=y
CONFIG_RT_USING_ALARM=y
CONFIG_RT_ALARM_STACK_SIZE=8192
CONFIG_RT_ALARM_TIMESLICE=5
CONFIG_RT_ALARM_PRIORITY=10
# CONFIG_RT_ALARM_USING_LOCAL_TIME is not set
# CONFIG_RT_USING_SOFT_RTC is not set
# CONFIG_RT_RTC_GOLDFISH is not set
# CONFIG_RT_RTC_PL031 is not set
CONFIG_RT_RTC_ZYNQMP=y
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_LCD is not set
# CONFIG_RT_USING_GRAPHIC is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_LED is not set
# CONFIG_RT_USING_INPUT is not set
# CONFIG_RT_USING_MBOX is not set
# CONFIG_RT_USING_HWSPINLOCK is not set
# CONFIG_RT_USING_PHYE is not set
# CONFIG_RT_USING_BLK is not set
# CONFIG_RT_USING_SCSI is not set
# CONFIG_RT_USING_FIRMWARE is not set
# CONFIG_RT_USING_HWCACHE is not set
# CONFIG_RT_USING_REGULATOR is not set
CONFIG_RT_USING_RESET=y
# CONFIG_RT_RESET_SIMPLE is not set
#
# Power Management (PM) Domains device drivers
#
# end of Power Management (PM) Domains device drivers
# CONFIG_RT_USING_POWER_RESET is not set
# CONFIG_RT_USING_POWER_SUPPLY is not set
CONFIG_RT_USING_VIRTIO=y
CONFIG_RT_USING_VIRTIO10=y
CONFIG_RT_USING_VIRTIO_MMIO_ALIGN=y
CONFIG_RT_USING_VIRTIO_BLK=y
# CONFIG_RT_USING_VIRTIO_NET is not set
CONFIG_RT_USING_VIRTIO_CONSOLE=y
CONFIG_RT_USING_VIRTIO_CONSOLE_PORT_MAX_NR=4
CONFIG_RT_USING_VIRTIO_GPU=y
CONFIG_RT_USING_VIRTIO_INPUT=y
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_THERMAL is not set
# CONFIG_RT_USING_DMA is not set
# CONFIG_RT_USING_MFD is not set
CONFIG_RT_USING_OFW=y
CONFIG_RT_USING_BUILTIN_FDT=y
CONFIG_RT_BUILTIN_FDT_PATH="zynqmp.dtb"
CONFIG_RT_FDT_EARLYCON_MSG_SIZE=128
CONFIG_RT_USING_OFW_BUS_RANGES_NUMBER=8
# CONFIG_RT_USING_PCI is not set
CONFIG_RT_USING_PIC=y
# CONFIG_RT_USING_PIC_STATISTICS is not set
CONFIG_MAX_HANDLERS=256
CONFIG_RT_PIC_ARM_GIC=y
# CONFIG_RT_PIC_ARM_GIC_V3 is not set
CONFIG_RT_PIC_ARM_GIC_MAX_NR=1
# CONFIG_RT_USING_PIN is not set
CONFIG_RT_USING_CLK=y
# CONFIG_RT_USING_CHERRYUSB is not set
#
# SoC (System on Chip) Drivers
#
# end of Device Drivers
#
@@ -452,7 +480,8 @@ CONFIG_RT_USING_ADT_REF=y
# CONFIG_RT_PAGE_MPR_SIZE_DYNAMIC is not set
CONFIG_RT_PAGE_AFFINITY_BLOCK_SIZE=0x1000
CONFIG_RT_PAGE_MAX_ORDER=11
# CONFIG_RT_USING_MEMBLOCK is not set
CONFIG_RT_USING_MEMBLOCK=y
CONFIG_RT_INIT_MEMORY_REGIONS=128
#
# Debugging
@@ -1543,14 +1572,3 @@ CONFIG_RT_PAGE_MAX_ORDER=11
# end of RT-Thread online packages
CONFIG_SOC_ZYNQMP_AARCH64=y
#
# Hardware Drivers Config
#
CONFIG_BSP_SUPPORT_FPU=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
CONFIG_BSP_USING_GIC=y
CONFIG_BSP_USING_GICV2=y
# CONFIG_BSP_USING_GICV3 is not set
# end of Hardware Drivers Config
bsp/zynqmp-a53-dfzu2eg/Kconfig
+6 -8
View File
@@ -6,20 +6,18 @@ RTT_DIR := ../../
PKGS_DIR := packages
SOC_DM_RTC_DIR := $(BSP_DIR)/drivers/rtc
SOC_DM_SERIAL_DIR := $(BSP_DIR)/drivers/serial
source "$(RTT_DIR)/Kconfig"
osource "$PKGS_DIR/Kconfig"
config SOC_ZYNQMP_AARCH64
bool
select ARCH_ARMV8
select ARCH_CPU_64BIT
select ARCH_ARM_MMU
select RT_USING_CACHE
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select RT_USING_GIC
select BSP_USING_GIC
select ARCH_MM_MMU
select ARCH_CPU_64BIT
select RT_USING_CACHE
select RT_USING_STDC_ATOMIC
default y
source "$(BSP_DIR)/drivers/Kconfig"
bsp/zynqmp-a53-dfzu2eg/README.md
+2 -1
View File
@@ -95,7 +95,7 @@ setenv gatewayip 192.168.1.1
setenv netmask 255.255.255.0
setenv serverip 192.168.1.3
tftpboot 0x00200000 rtthread.bin
go 0x00200000
booti 0x00200000 - ${fdt_addr}
```
其中`192.168.1.3`为TFTP服务器的PC机的IP地址，大家可以根据自己的实际情况进行修改。
@@ -141,6 +141,7 @@ msh />
| 驱动 | 支持情况 | 备注 |
| ------ | ---- | :------: |
| UART | 支持 | UART0 |
| RTC | 支持 | - |
| GPIO | 暂不支持 | - |
| SPI | 暂不支持 | - |
| SDIO | 暂不支持 | - |
bsp/zynqmp-a53-dfzu2eg/SConstruct
+3
View File
@@ -11,6 +11,9 @@ else:
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
import dtc
dtc.dts_to_dtb(RTT_ROOT, ["zynqmp.dts"], include_paths = [os.getcwd()], ignore_warning = ["simple_bus_reg", "unit_address_vs_reg", "clocks_is_cell", "gpios_property"])
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
TRACE_CONFIG = ""
bsp/zynqmp-a53-dfzu2eg/drivers/Kconfig
-32
View File
@@ -1,32 +0,0 @@
menu "Hardware Drivers Config"
config BSP_SUPPORT_FPU
bool "Using Float"
default y
menuconfig BSP_USING_UART
bool "Using UART"
select RT_USING_SERIAL
default y
if BSP_USING_UART
config BSP_USING_UART0
bool "Enabel UART 0"
default y
endif
config BSP_USING_GIC
bool
default y
choice
prompt "GIC Version"
default BSP_USING_GICV2
config BSP_USING_GICV2
bool "GICv2"
config BSP_USING_GICV3
bool "GICv3"
endchoice
endmenu
bsp/zynqmp-a53-dfzu2eg/drivers/SConscript
+7 -1
View File
@@ -4,7 +4,13 @@ from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd , cwd + '/zynqmp']
CPPPATH = [cwd, cwd + "/../../../components/drivers/rtc"]
if GetDepend(['RT_RTC_ZYNQMP']):
src += ['rtc/rtc-zynqmp.c']
if GetDepend(['RT_SERIAL_XILINX_PS']):
src += ['serial/xilinx_uartps.c']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
bsp/zynqmp-a53-dfzu2eg/drivers/board.c
+3 -63
View File
@@ -6,72 +6,12 @@
* Change Logs:
* Date Author Notes
* 2024-04-11 liYony the first version
* 2024-07-07 GuEe-GUI init common
*/
#include <mmu.h>
#include <board.h>
#include <mm_aspace.h>
#include <mm_page.h>
#include <drv_uart.h>
#include <gtimer.h>
extern size_t MMUTable[];
#ifdef RT_USING_SMART
struct mem_desc platform_mem_desc[] = {
{KERNEL_VADDR_START, KERNEL_VADDR_START + 0x7FF00000 - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM}
};
#else
struct mem_desc platform_mem_desc[] =
{
{0x00200000, 0x7FF00000 - 1, 0x00200000, NORMAL_MEM},
{GIC400_DISTRIBUTOR_PPTR, GIC400_DISTRIBUTOR_PPTR + GIC400_SIZE - 1, GIC400_DISTRIBUTOR_PPTR, DEVICE_MEM},
{GIC400_CONTROLLER_PPTR, GIC400_CONTROLLER_PPTR + GIC400_SIZE - 1, GIC400_CONTROLLER_PPTR, DEVICE_MEM},
};
#endif
const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
void idle_wfi(void)
{
asm volatile("wfi");
}
#include <setup.h>
void rt_hw_board_init(void)
{
#ifdef RT_USING_SMART
rt_hw_mmu_map_init(&rt_kernel_space, (void *)0xfffffffff0000000, 0x10000000, MMUTable, PV_OFFSET);
#else
rt_hw_mmu_map_init(&rt_kernel_space, (void *)0xffffd0000000, 0x10000000, MMUTable, 0);
#endif
rt_region_t init_page_region;
init_page_region.start = PAGE_START;
init_page_region.end = PAGE_END;
rt_page_init(init_page_region);
rt_hw_mmu_setup(&rt_kernel_space, platform_mem_desc, platform_mem_desc_size);
#ifdef RT_USING_HEAP
/* initialize system heap */
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
/* initialize hardware interrupt */
rt_hw_interrupt_init();
/* initialize uart */
rt_hw_uart_init();
/* initialize timer for os tick */
rt_hw_gtimer_init();
rt_thread_idle_sethook(idle_wfi);
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
/* set console device */
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
rt_kprintf("heap: [0x%08x - 0x%08x]\n", HEAP_BEGIN, HEAP_END);
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
rt_hw_common_setup();
}
bsp/zynqmp-a53-dfzu2eg/drivers/board.h
-20
View File
@@ -11,26 +11,6 @@
#ifndef __BOARD_H__
#define __BOARD_H__
#include <zynqmp.h>
extern unsigned char __bss_end;
#define HEAP_BEGIN ((void*)&__bss_end)
#ifdef RT_USING_SMART
#define HEAP_END ((size_t)KERNEL_VADDR_START + 64 * 1024 * 1024)
#define PAGE_START HEAP_END
#define PAGE_END ((size_t)KERNEL_VADDR_START + 128 * 1024 * 1024)
#else
#define KERNEL_VADDR_START 0x0
#define HEAP_END (KERNEL_VADDR_START + 64 * 1024 * 1024)
#define PAGE_START HEAP_END
#define PAGE_END ((size_t)PAGE_START + 64 * 1024 * 1024)
#endif
void rt_hw_board_init(void);
int rt_hw_uart_init(void);
#endif /* __BOARD_H__ */
bsp/zynqmp-a53-dfzu2eg/drivers/drv_uart.c
-346
View File
File diff suppressed because it is too large Load Diff
bsp/zynqmp-a53-dfzu2eg/drivers/drv_uart.h
-18
View File
@@ -1,18 +0,0 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-04-11 liYony the first version
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#include <rtthread.h>
int rt_hw_uart_init(void);
#endif /* __DRV_UART_H__ */
bsp/zynqmp-a53-dfzu2eg/drivers/rtc/Kconfig
Executable
+5
View File
@@ -0,0 +1,5 @@
config RT_RTC_ZYNQMP
bool "Xilinx Zynq Ultrascale+ MPSoC RTC"
depends on RT_USING_RTC
select RT_USING_ALARM
default y
bsp/zynqmp-a53-dfzu2eg/drivers/rtc/rtc-zynqmp.c
Executable
+346
View File
File diff suppressed because it is too large Load Diff
bsp/zynqmp-a53-dfzu2eg/drivers/serial/Kconfig
Executable
+5
View File
@@ -0,0 +1,5 @@
config RT_SERIAL_XILINX_PS
bool "Cadence (Xilinx Zynq) UART"
depends on RT_USING_CLK
depends on RT_USING_RESET
default y
bsp/zynqmp-a53-dfzu2eg/drivers/serial/xilinx_uartps.c
Executable
+826
View File
File diff suppressed because it is too large Load Diff
bsp/zynqmp-a53-dfzu2eg/drivers/zynqmp.h
-52
View File
@@ -1,52 +0,0 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-04-11 liYony the first version
*/
#ifndef __ZYNQMP_H__
#define __ZYNQMP_H__
#include <rtdef.h>
#include <ioremap.h>
#ifdef RT_USING_SMART
#include <mmu.h>
#endif
#define __REG32(x) (*((volatile unsigned int *)(x)))
#define __REG16(x) (*((volatile unsigned short *)(x)))
/* UART */
#define ZYNQMP_UART0_BASE 0xFF000000
#define ZYNQMP_UART0_SIZE 0x00010000
#define ZYNQMP_UART0_IRQNUM (32 + 21)
#define ZYNQMP_UART0_CLK_FREQ_HZ (99999001)
/* GIC */
#define MAX_HANDLERS 195
#define GIC_IRQ_START 0
#define ARM_GIC_NR_IRQS 195
#define ARM_GIC_MAX_NR 1
/* GICv2 */
#define GIC400_DISTRIBUTOR_PPTR 0xF9010000U
#define GIC400_CONTROLLER_PPTR 0xF9020000U
#define GIC400_SIZE 0x00001000U
/* the basic constants and interfaces needed by gic */
rt_inline rt_ubase_t platform_get_gic_dist_base(void)
{
return GIC400_DISTRIBUTOR_PPTR;
}
rt_inline rt_ubase_t platform_get_gic_cpu_base(void)
{
return GIC400_CONTROLLER_PPTR;
}
#endif /* __ZYNQMP_H__ */
bsp/zynqmp-a53-dfzu2eg/drivers/zynqmp/zynqmp_reg.h
-38
View File
@@ -1,38 +0,0 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ZYNQMP_REG_H__
#define __ZYNQMP_REG_H__
/* bit field helpers. */
#define __M(n) (~(~0<<(n)))
#define __RBF(number, n) ((number)&__M(n))
#define __BF(number, n, m) __RBF((number>>m), (n-m+1))
#define REG_BF(number, n, m) (m<n ? __BF(number, n, m) : __BF(number, m, n))
#define readb(reg) (*((volatile unsigned char *)(reg)))
#define readw(reg) (*((volatile unsigned short *)(reg)))
#define readl(reg) (*((volatile unsigned int *)(reg)))
#define readq(reg) (*((volatile unsigned long long *)(reg)))
#define writeb(data, reg) ((*((volatile unsigned char *)(reg))) = (unsigned char)(data))
#define writew(data, reg) ((*((volatile unsigned short *)(reg))) = (unsigned short)(data))
#define writel(data, reg) ((*((volatile unsigned int *)(reg))) = (unsigned int)(data))
#define writeq(data, reg) ((*((volatile unsigned long long *)(reg))) = (unsigned long long)(data))
#define clrsetreg(addr, clr, set) writel(((clr) | (set)) << 16 | (set), addr)
#define clrreg(addr, clr) writel((clr) << 16, addr)
#define setreg(addr, set) writel((set) << 16 | (set), addr)
#define DUMP_REG(base, reg) \
do { \
rt_uint32_t status = 0x00000000; \
status = readl(base + reg); \
rt_kprintf(#reg ":\n"); \
rt_kprintf("\t%p 0x%.8x\n", base + reg, status); \
} while(0);
#endif /* __ZYNQMP_REG_H__ */
bsp/zynqmp-a53-dfzu2eg/drivers/zynqmp/zynqmp_uart.h
-300
View File
File diff suppressed because it is too large Load Diff
bsp/zynqmp-a53-dfzu2eg/qemu.py
Executable
+43
View File
@@ -0,0 +1,43 @@
#!/bin/python3
# -*- coding: utf-8 -*-
import os, sys, re
with open('rtconfig.h', 'r') as file:
rtconfig_header = file.read()
if os.getenv('RTT_QEMU_ROOT'):
RTT_QEMU_ROOT = os.getenv('RTT_QEMU_ROOT')
else:
RTT_QEMU_ROOT = ""
opt = sys.argv
q_graphic = "-nographic"
q_debug = ""
def is_opt(key, inkey):
if str("-" + key) == inkey:
return True
return False
for i in range(len(opt)):
if i == 0:
continue
inkey = opt[i]
if is_opt("debug", inkey): q_debug = "-S -s"
if is_opt("graphic", inkey): q_graphic = ""
mem = int(re.findall(r'#define\s+ARCH_HEAP_SIZE\s+(.+)', rtconfig_header)[0], 16)
mem += int(re.findall(r'#define\s+ARCH_INIT_PAGE_SIZE\s+(.+)', rtconfig_header)[0], 16)
mem = 128 + int(mem / (1024 * 1024))
os.system("""
{}qemu-system-aarch64 \
-M xlnx-zcu102 \
-m {} \
-kernel rtthread.bin \
{} \
{} \
-serial mon:stdio
""".format(RTT_QEMU_ROOT, mem, q_graphic, q_debug))
bsp/zynqmp-a53-dfzu2eg/rtconfig.h
+34 -33
View File
@@ -7,17 +7,6 @@
/* rt_vsnprintf options */
#define RT_KLIBC_USING_VSNPRINTF_LONGLONG
#define RT_KLIBC_USING_VSNPRINTF_STANDARD
#define RT_KLIBC_USING_VSNPRINTF_DECIMAL_SPECIFIERS
#define RT_KLIBC_USING_VSNPRINTF_EXPONENTIAL_SPECIFIERS
#define RT_KLIBC_USING_VSNPRINTF_WRITEBACK_SPECIFIER
#define RT_KLIBC_USING_VSNPRINTF_CHECK_NUL_IN_FORMAT_SPECIFIER
#define RT_KLIBC_USING_VSNPRINTF_INTEGER_BUFFER_SIZE 32
#define RT_KLIBC_USING_VSNPRINTF_DECIMAL_BUFFER_SIZE 32
#define RT_KLIBC_USING_VSNPRINTF_FLOAT_PRECISION 6
#define RT_KLIBC_USING_VSNPRINTF_MAX_INTEGRAL_DIGITS_FOR_DECIMAL 9
#define RT_KLIBC_USING_VSNPRINTF_LOG10_TAYLOR_TERMS 4
/* end of rt_vsnprintf options */
/* rt_vsscanf options */
@@ -73,7 +62,8 @@
/* end of rt_strnlen options */
/* end of klibc options */
#define RT_NAME_MAX 16
#define RT_CPUS_NR 1
#define RT_USING_SMP
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 8
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
@@ -84,9 +74,11 @@
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 8192
#define SYSTEM_THREAD_STACK_SIZE 8192
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 8192
#define RT_USING_CPU_USAGE_TRACER
/* kservice options */
@@ -95,6 +87,7 @@
#define RT_DEBUGING_ASSERT
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
#define RT_DEBUGING_CRITICAL
/* Inter-Thread communication */
@@ -197,6 +190,7 @@
/* Device Drivers */
#define RT_USING_DM
#define RT_USING_DEV_BUS
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
@@ -207,23 +201,37 @@
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 256
#define RT_USING_SERIAL_BYPASS
#define RT_SERIAL_XILINX_PS
#define RT_USING_CLOCK_TIME
#define RT_CLOCK_TIME_ARM_ARCH
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_PM
#define PM_TICKLESS_THRESHOLD_TIME 2
#define RT_USING_RTC
#define RT_USING_SOFT_RTC
#define RT_USING_VIRTIO
#define RT_USING_VIRTIO10
#define RT_USING_VIRTIO_MMIO_ALIGN
#define RT_USING_VIRTIO_BLK
#define RT_USING_VIRTIO_CONSOLE
#define RT_USING_VIRTIO_CONSOLE_PORT_MAX_NR 4
#define RT_USING_VIRTIO_GPU
#define RT_USING_VIRTIO_INPUT
#define RT_USING_PIN
#define RT_USING_ALARM
#define RT_ALARM_STACK_SIZE 8192
#define RT_ALARM_TIMESLICE 5
#define RT_ALARM_PRIORITY 10
#define RT_RTC_ZYNQMP
#define RT_USING_RESET
/* Power Management (PM) Domains device drivers */
/* end of Power Management (PM) Domains device drivers */
#define RT_USING_OFW
#define RT_USING_BUILTIN_FDT
#define RT_BUILTIN_FDT_PATH "zynqmp.dtb"
#define RT_FDT_EARLYCON_MSG_SIZE 128
#define RT_USING_OFW_BUS_RANGES_NUMBER 8
#define RT_USING_PIC
#define MAX_HANDLERS 256
#define RT_PIC_ARM_GIC
#define RT_PIC_ARM_GIC_MAX_NR 1
#define RT_USING_CLK
/* SoC (System on Chip) Drivers */
/* end of Device Drivers */
/* C/C++ and POSIX layer */
@@ -284,6 +292,8 @@
#define RT_PAGE_AFFINITY_BLOCK_SIZE 0x1000
#define RT_PAGE_MAX_ORDER 11
#define RT_USING_MEMBLOCK
#define RT_INIT_MEMORY_REGIONS 128
/* Debugging */
@@ -509,13 +519,4 @@
/* end of RT-Thread online packages */
#define SOC_ZYNQMP_AARCH64
/* Hardware Drivers Config */
#define BSP_SUPPORT_FPU
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_USING_GIC
#define BSP_USING_GICV2
/* end of Hardware Drivers Config */
#endif
bsp/zynqmp-a53-dfzu2eg/rtconfig.py
+1 -1
View File
@@ -28,7 +28,7 @@ if PLATFORM == 'gcc':
CPPFLAGS= ' -E -P -x assembler-with-cpp'
CXXFLAGS= DEVICE + CFPFLAGS + ' -Wall -fdiagnostics-color=always'
CFLAGS = DEVICE + CFPFLAGS + ' -Wall -Wno-cpp -std=gnu99 -fdiagnostics-color=always'
CFLAGS = DEVICE + CFPFLAGS + ' -Wall -Wno-cpp -fdiagnostics-color=always'
AFLAGS = ' -c' + AFPFLAGS + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,system_vectors -T link.lds' + ' -lsupc++ -lgcc -static'
CPATH = ''
bsp/zynqmp-a53-dfzu2eg/zynqmp.dts
Executable
+133
View File
@@ -0,0 +1,133 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-07-07 GuEe-GUI the first version
*/
/dts-v1/;
#include <rtconfig.h>
#include <dt-bindings/size.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/* Kernel and DMA heap */
#define BASE_SIZE (SIZE_MB + (128 * SIZE_MB))
/ {
compatible = "xlnx,zynqmp";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
chosen {
bootargs = "earlycon console=ttyPS0";
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &uart0;
};
memory {
reg = <0x0 (ARCH_RAM_OFFSET + ARCH_TEXT_OFFSET) 0x0 (BASE_SIZE + ARCH_HEAP_SIZE + ARCH_INIT_PAGE_SIZE)>;
device_type = "memory";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x0>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x1>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x2>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
enable-method = "psci";
reg = <0x3>;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
amba_apu: amba-apu@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0 0 0xffffffff>;
gic: interrupt-controller@f9010000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
reg = <0x0 0xf9010000 0x10000>,
<0x0 0xf9020000 0x20000>,
<0x0 0xf9040000 0x20000>,
<0x0 0xf9060000 0x20000>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
};
clk100: clk100 {
compatible = "fixed-clock";
clock-output-names = "clk100mhz";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
amba: amba {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
reg = <0x0 0xffa60000 0x0 0x100>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "alarm", "sec";
calibration = <0x7fff>;
};
uart0: serial@ff000000 {
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0 0xff000000 0x0 0x1000>;
clocks = <&clk100 &clk100>;
clock-names = "uart_clk", "pclk";
};
};
};
components/drivers/include/dt-bindings/interrupt-controller/arm-gic.h
+24
View File
@@ -0,0 +1,24 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H__
#define __DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H__
#include <dt-bindings/interrupt-controller/irq.h>
/* interrupt specifier cell 0 */
#define GIC_SPI 0
#define GIC_PPI 1
/*
* Interrupt specifier cell 2.
* The flags in irq.h are valid, plus those below.
*/
#define GIC_CPU_MASK_RAW(x) ((x) << 8)
#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H__ */
components/drivers/include/dt-bindings/interrupt-controller/irq.h
+17
View File
@@ -0,0 +1,17 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H__
#define __DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H__
#define IRQ_TYPE_NONE 0
#define IRQ_TYPE_EDGE_RISING 1
#define IRQ_TYPE_EDGE_FALLING 2
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH 4
#define IRQ_TYPE_LEVEL_LOW 8
#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H__ */
libcpu/aarch64/common/SConscript
+10
View File
@@ -7,6 +7,7 @@ Import('rtconfig')
cwd = GetCurrentDir()
src = Glob('*.c') + Glob('*.cpp') + Glob('*.S')
CPPPATH = [cwd, cwd + '/include']
bsp_path = Dir('#').abspath
if GetDepend('RT_USING_SMP'):
core_model = 'mp'
@@ -17,6 +18,15 @@ src += Glob(core_model + '/*.S')
if GetDepend('RT_USING_OFW') == False:
SrcRemove(src, ['setup.c', 'cpu_psci.c', 'psci.c'])
else:
if GetDepend('RT_BUILTIN_FDT_PATH'):
dtb_path = os.path.join(bsp_path, GetDepend('RT_BUILTIN_FDT_PATH').strip('"'))
obj_path = os.path.join(os.getcwd(), 'builtin_fdt_gcc.o')
if os.path.exists(dtb_path) and os.path.exists(obj_path):
dtb_mtime = os.path.getmtime(dtb_path)
obj_mtime = os.path.getmtime(obj_path)
if dtb_mtime > obj_mtime:
os.remove(obj_path)
if GetDepend('RT_USING_PIC') == True:
SrcRemove(src, ['gicv3.c', 'gic.c', 'gtimer.c', 'interrupt.c'])
libcpu/aarch64/common/trap.c
+3
View File
@@ -15,6 +15,9 @@
#include <armv8.h>
#include "interrupt.h"
#include "mm_aspace.h"
#ifdef RT_USING_PIC
#include <drivers/pic.h>
#endif
#define DBG_TAG "libcpu.trap"
#define DBG_LVL DBG_LOG
src/utest/smp/smp_interrupt_pri_tc.c
+7
View File
@@ -12,6 +12,13 @@
#include "utest.h"
#include <interrupt.h>
#ifdef RT_USING_PIC
#include <rtdevice.h>
#define rt_hw_interrupt_get_priority rt_pic_irq_get_priority
#define rt_hw_interrupt_set_priority rt_pic_irq_set_priority
#endif
/**
* @brief Setting the Interrupt Priority Test.
*