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Merge pull request #1217 from uestczyh222/master

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[BSP][tina] New bsp for allwinner tina
This commit is contained in:
Bernard Xiong authored and GitHub committed 2018-02-09 16:49:02 +08:00
2 parents ae425c6eef 9bf2a755e0
commit 8e8fba798d
33 files changed
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.travis.yml
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@@ -27,6 +27,7 @@ env:
# - RTT_BSP='apollo2' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='asm9260t' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='at91sam9260' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='allwinner_tina' RTT_TOOL_CHAIN='sourcery-arm'
# - RTT_BSP='avr32uc3b0' RTT_TOOL_CHAIN='atmel-avr32'
# - RTT_BSP='bf533' # no scons
- RTT_BSP='efm32' RTT_TOOL_CHAIN='sourcery-arm'
bsp/allwinner_tina/.config
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bsp/allwinner_tina/Kconfig
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mainmenu "RT-Thread Configuration"
config $BSP_DIR
string
option env="BSP_ROOT"
default "."
config $RTT_DIR
string
option env="RTT_ROOT"
default "../.."
# you can change the RTT_ROOT default "../.." to your rtthread_root,
# example : default "F:/git_repositories/rt-thread"
config $PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/KConfig"
source "$PKGS_DIR/KConfig"
config SOC_TINA
bool
select ARCH_ARM_ARM9
default y
source "$BSP_DIR/drivers/Kconfig"
bsp/allwinner_tina/README.md
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# Allwinner tina板级支持包
## 1. 简介
Allwinner tina 是由全志公司推出的ARM9内核的SOC
包括如下硬件特性：
| 硬件 | 描述 |
| -- | -- |
|芯片型号| tina系列 |
|CPU| ARM9 |
|主频| 408MHz |
|片内DDR | 32MB |
|板载SPI Nor Flash | 8/16MB|
## 2. 编译说明
| 环境 | 说明 |
| --- | --- |
|PC操作系统|Linux/MacOS|
|编译器|arm-none-eabi-gcc version 6.3.1 20170620 (release)|
|构建工具|scons|
1) 下载源码
```
git clone https://github.com/RT-Thread/rt-thread.git
```
2) 配置工程并准备env
```
cd rt-thread/bsp/allwinner_tina
scons --menuconfig
source ~/.env/env.sh
pkgs --upgrade
```
3) 编译安装下载工具
```
pushd /tmp
git clone https://github.com/Icenowy/sunxi-tools.git
pushd sunxi-tools
git checkout -b f1c100s
git checkout -b f1c100s origin/f1c100s
make
sudo make install
popd
popd
```
4) 编译
```
scons
```
如果编译正确无误，会产生rtthread.elf、rtthread.bin文件。其中rtthread.bin需要烧写到设备中进行运行。
## 3. 烧写及执行
**烧写工具目前仅支持Linux/MacOS环境,请在Linux/MaxOS环境下进行烧写操作**
当正确编译产生出rtthread.bin映像文件后可以使用下面的方式来烧写到设备中。
1)编译初始化引导文件
编译依赖 arm-eabi-gcc
```
pushd ../../..
git clone https://github.com/uestczyh222/tina-spl.git
pushd tina-spl
make
cp output/f1c100s.bin ../rt-thread/bsp/tina/tina-spl.bin
popd
popd
```
2)下载并运行
```
1.短接flash 1、4脚(当flash中无可引导代码时无需此步骤)
2.连接USB
3.松开短接的引脚
4.输入下列指令
```
```
sudo sunxi-fel -p write 0x00000000 tina-spl.bin
sudo sunxi-fel exec 0x00000000
sudo sunxi-fel -p write 0x80000000 rtthread.bin
sudo sunxi-fel exec 0x80000000
```
### 3.1 运行结果
如果编译 & 烧写无误，会在串口0上看到RT-Thread的启动logo信息：
```
\ | /
- RT - Thread Operating System
/ | \ 3.0.2 build Feb 8 2018
2006 - 2017 Copyright by rt-thread team
periph_get_pll_clk:600000000
cpu_get_clk:408000000
ahb_get_clk:200000000
apb_get_clk:100000000
msh />
```
## 4. 驱动支持情况及计划
| 驱动 | 支持情况 | 备注 |
| ------ | :----: | :------: |
| UART | 支持 | UART0/1/2 |
| GPIO | 支持 | / |
| clock | 支持 | / |
| mmu | 支持 | / |
### 4.1 IO在板级支持包中的映射情况
| IO号 | 板级包中的定义 |
| -- | -- |
| PE8 | USART2 RX |
| PE7 | USART2 TX |
| PA3 | USART1 RX |
| PA2 | USART1 TX |
| PE1 | USART0 TX |
| PE0 | USART0 RX |
## 5. 联系人信息
维护人:
[uestczyh222][4] < [lymz@foxmail.com][5] >
[1]: https://www.rt-thread.org/page/download.html
[4]: https://github.com/uestczyh222
[5]: mailto:lymz@foxmail.com
bsp/allwinner_tina/SConscript
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# for module compiling
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
bsp/allwinner_tina/SConstruct
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import os
import sys
import rtconfig
from rtconfig import RTT_ROOT
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CC, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=True)
# make a building
DoBuilding(TARGET, objs)
bsp/allwinner_tina/applications/SConscript
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from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/allwinner_tina/applications/main.c
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/*
* File : main.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-5-30 Bernard the first version
*/
#include "rtthread.h"
#include "drv_clock.h"
int main(int argc, char **argv)
{
rt_kprintf("periph_get_pll_clk:%d\n", periph_get_pll_clk());
rt_kprintf("cpu_get_clk:%d\n", cpu_get_clk());
rt_kprintf("ahb_get_clk:%d\n", ahb_get_clk());
rt_kprintf("apb_get_clk:%d\n", apb_get_clk());
return 0;
}
bsp/allwinner_tina/drivers/Kconfig
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config TINA_USING_UART0
bool "Using UART0"
select RT_USING_SERIAL
default n
config TINA_USING_UART1
bool "Using UART1"
select RT_USING_SERIAL
default y
config TINA_USING_UART2
bool "Using UART2"
select RT_USING_SERIAL
default y
bsp/allwinner_tina/drivers/SConscript
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from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
list = os.listdir(cwd)
CPPPATH = [cwd]
objs = []
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
objs = objs + group
Return('objs')
bsp/allwinner_tina/drivers/board.c
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/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-5-30 Bernard the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "drv_uart.h"
#include "interrupt.h"
#include "mmu.h"
static void os_clock_irq_handle(int irqno, void *param)
{
volatile rt_uint32_t *temp_addr = (rt_uint32_t *)(0x01C20C00 + 0x04);
/* clear timer */
*temp_addr |= 0x01;
rt_tick_increase();
}
static void mmu_init(void)
{
struct mem_desc r6_mem_desc[] =
{
{ 0x00000000, 0xFFFFFFFF, 0x00000000, RW_NCNB }, /* None cached for 4G memory */
{ 0x80000000, 0x82000000 - 1, 0x80000000, RW_CB }, /* 32M cached SDRAM memory */
//{ 0x00000000, 0x00001000-1, 0x80000000, RW_CB }, /* isr vector table */
//here not set mmu
//start_gcc.S Copy vector to the correct address
};
rt_hw_mmu_init(r6_mem_desc, sizeof(r6_mem_desc) / sizeof(r6_mem_desc[0]));
}
static void os_clock_init(void)
{
rt_uint32_t temp;
volatile rt_uint32_t *temp_addr;
/* reload value */
temp = 0xB71B00 / RT_TICK_PER_SECOND;
temp_addr = (rt_uint32_t *)(0x01C20C00 + 0x14);
*temp_addr = temp;
/* continuous | /2 | 24Mhz | reload*/
temp = (0x00 << 7) | (0x01 << 4) | (0x01 << 2) | (0x00 << 1);
temp_addr = (rt_uint32_t *)(0x01C20C00 + 0x10);
*temp_addr &= 0xffffff00;
*temp_addr |= temp;
/* open timer irq */
temp = 0x01 << 0;
temp_addr = (rt_uint32_t *)(0x01C20C00);
*temp_addr |= temp;
/* set init value */
temp_addr = (rt_uint32_t *)(0x01C20C00 + 0x18);
*temp_addr = 0;
/* begin run timer */
temp = 0x01 << 0;
temp_addr = (rt_uint32_t *)(0x01C20C00 + 0x10);
*temp_addr |= temp;
temp_addr = (rt_uint32_t *)(0x01C20C00);
/* set irq handle */
rt_hw_interrupt_install(TIMER0_INTERRUPT, os_clock_irq_handle, (void *)temp_addr, "timer");
rt_hw_interrupt_umask(TIMER0_INTERRUPT);
}
void rt_hw_board_init(void)
{
mmu_init();
rt_hw_interrupt_init();
#ifdef RT_USING_HEAP
/* init memory system */
rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
#endif
/* init hardware interrupt */
rt_hw_uart_init();
#ifdef RT_USING_CONSOLE
/* set console device */
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif /* RT_USING_CONSOLE */
os_clock_init();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
bsp/allwinner_tina/drivers/board.h
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/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-5-30 Bernard the first version
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include <stdint.h>
extern unsigned char __bss_start;
extern unsigned char __bss_end;
#define RT_HW_HEAP_BEGIN (void*)&__bss_end
#define RT_HW_HEAP_END (void*)(0x80000000 + 32 * 1024 * 1024)
void rt_hw_board_init(void);
#endif
bsp/allwinner_tina/drivers/drv_clock.c
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bsp/allwinner_tina/drivers/drv_clock.h
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bsp/allwinner_tina/drivers/drv_gpio.c
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bsp/allwinner_tina/drivers/drv_gpio.h
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bsp/allwinner_tina/drivers/drv_uart.c
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bsp/allwinner_tina/drivers/drv_uart.h
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/*
* File : drv_uart.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-02-08 RT-Thread the first version
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#define UART0_BASE_ADDR (0x01C25000)
#define UART1_BASE_ADDR (0x01C25400)
#define UART2_BASE_ADDR (0x01C25800)
#define UART_THR (0X00)
#define UART_RHB (0X00)
#define UART_DLL (0X00)
#define UART_DLH (0X04)
#define UART_IER (0X04)
#define UART_IIR (0X08)
#define UART_FCR (0X08)
#define UART_LCR (0X0C)
#define UART_MCR (0X10)
#define UART_LSR (0X14)
#define UART_MSR (0X18)
#define UART_SCH (0X1C)
#define UART_USR (0X7C)
#define UART_TFL (0X80)
#define UART_RFL (0X84)
#define UART_HSK (0X88)
#define UART_HALT (0XA4)
#define UART_DBG_DLL (0XB0)
#define UART_DBG_DLH (0XB4)
struct tina_uart
{
volatile rt_uint32_t rx_tx_dll; /* 0x00 */
volatile rt_uint32_t dlh_ier; /* 0x04 */
volatile rt_uint32_t iir_fcr; /* 0x08 */
volatile rt_uint32_t lcr; /* 0x0C */
volatile rt_uint32_t mcr; /* 0x10 */
volatile rt_uint32_t lsr; /* 0x14 */
volatile rt_uint32_t msr; /* 0x18 */
volatile rt_uint32_t sch; /* 0x1C */
volatile rt_uint32_t reserved0[23];
volatile rt_uint32_t usr; /* 0x7c */
volatile rt_uint32_t tfl; /* 0x80 */
volatile rt_uint32_t rfl; /* 0x84 */
volatile rt_uint32_t hsk; /* 0x88 */
volatile rt_uint32_t reserved1[6];
volatile rt_uint32_t halt; /* 0xa4 */
volatile rt_uint32_t reserved2[2];
volatile rt_uint32_t dbg_dll; /* 0xb0 */
volatile rt_uint32_t dbg_dlh; /* 0xb4 */
};
typedef struct tina_uart *tina_uart_t;
#define UART0 ((tina_gpio_t)UART0_BASE_ADDR)
#define UART1 ((tina_gpio_t)UART1_BASE_ADDR)
#define UART2 ((tina_gpio_t)UART2_BASE_ADDR)
int rt_hw_uart_init(void);
#endif /* __DRV_UART_H__ */
bsp/allwinner_tina/libcpu/SConscript
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Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
if rtconfig.PLATFORM == 'gcc':
src += Glob('*_gcc.S')
group = DefineGroup('CPU', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/allwinner_tina/libcpu/context_gcc.S
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;/*
; * File : context_iar.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2006, RT-Thread Development Team
; *
; * This program is free software; you can redistribute it and/or modify
; * it under the terms of the GNU General Public License as published by
; * the Free Software Foundation; either version 2 of the License, or
; * (at your option) any later version.
; *
; * This program is distributed in the hope that it will be useful,
; * but WITHOUT ANY WARRANTY; without even the implied warranty of
; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; * GNU General Public License for more details.
; *
; * You should have received a copy of the GNU General Public License along
; * with this program; if not, write to the Free Software Foundation, Inc.,
; * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
; *
; * Change Logs:
; * Date Author Notes
; * 2011-08-14 weety copy from mini2440
; */
#define NOINT 0xC0
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
.globl rt_hw_interrupt_disable
rt_hw_interrupt_disable:
MRS R0, CPSR
ORR R1, R0, #NOINT
MSR CPSR_c, R1
BX LR
/*
* void rt_hw_interrupt_enable(rt_base_t level);
*/
.globl rt_hw_interrupt_enable
rt_hw_interrupt_enable:
MSR CPSR, R0
BX LR
/*
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
* r0 --> from
* r1 --> to
*/
.globl rt_hw_context_switch
rt_hw_context_switch:
STMFD SP!, {LR} @; push pc (lr should be pushed in place of pc)
STMFD SP!, {R0-R12, LR} @; push lr & register file
MRS R4, CPSR
STMFD SP!, {R4} @; push cpsr
STR SP, [R0] @; store sp in preempted tasks tcb
LDR SP, [R1] @; get new task stack pointer
LDMFD SP!, {R4} @; pop new task spsr
MSR SPSR_cxsf, R4
LDMFD SP!, {R0-R12, LR, PC}^ @; pop new task r0-r12, lr & pc
/*
* void rt_hw_context_switch_to(rt_uint32 to);
* r0 --> to
*/
.globl rt_hw_context_switch_to
rt_hw_context_switch_to:
LDR SP, [R0] @; get new task stack pointer
LDMFD SP!, {R4} @; pop new task cpsr
MSR SPSR_cxsf, R4
LDMFD SP!, {R0-R12, LR, PC}^ @; pop new task r0-r12, lr & pc
/*
* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
*/
.globl rt_thread_switch_interrupt_flag
.globl rt_interrupt_from_thread
.globl rt_interrupt_to_thread
.globl rt_hw_context_switch_interrupt
rt_hw_context_switch_interrupt:
LDR R2, =rt_thread_switch_interrupt_flag
LDR R3, [R2]
CMP R3, #1
BEQ _reswitch
MOV R3, #1 @; set flag to 1
STR R3, [R2]
LDR R2, =rt_interrupt_from_thread @; set rt_interrupt_from_thread
STR R0, [R2]
_reswitch:
LDR R2, =rt_interrupt_to_thread @; set rt_interrupt_to_thread
STR R1, [R2]
BX LR
bsp/allwinner_tina/libcpu/cpu.c
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/*
* File : cpu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-02-08 RT-Thread the first version
*/
#include <rthw.h>
#include <rtthread.h>
RT_WEAK void machine_reset(void)
{
rt_kprintf("reboot system...\n");
rt_hw_interrupt_disable();
while (1);
}
RT_WEAK void machine_shutdown(void)
{
rt_kprintf("shutdown...\n");
rt_hw_interrupt_disable();
while (1);
}
bsp/allwinner_tina/libcpu/cpuport.c
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bsp/allwinner_tina/libcpu/interrupt.c
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bsp/allwinner_tina/libcpu/interrupt.h
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/*
* File : interrupt.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-02-08 RT-Thread the first version
*/
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__
/* Max number of interruptions */
#define INTERRUPTS_MAX (64)
/* a group num */
#define GROUP_NUM (32)
/* Interrupt Source */
#define NMI_INTERRUPT (0)
#define UART0_INTERRUPT (1)
#define UART1_INTERRUPT (2)
#define UART2_INTERRUPT (3)
#define OWA_INTERRUPT (5)
#define CIR_INTERRUPT (6)
#define TWI0_INTERRUPT (7)
#define TWI1_INTERRUPT (8)
#define TWI2_INTERRUPT (9)
#define SPI0_INTERRUPT (10)
#define SPI1_INTERRUPT (11)
#define TIMER0_INTERRUPT (13)
#define TIMER1_INTERRUPT (14)
#define TIMER2_INTERRUPT (15)
#define WATCHDOG_INTERRUPT (16)
#define RSB_INTERRUPT (17)
#define DMA_INTERRUPT (18)
#define TOUCHPANEL_INTERRUPT (20)
#define AUDIOCODEC_INTERRUPT (21)
#define KEYADC_INTERRUPT (22)
#define SDC0_INTERRUPT (23)
#define SDC1_INTERRUPT (24)
#define USB_OTG_INTERRUPT (26)
#define TVD_INTERRUPT (27)
#define TVE_INTERRUPT (28)
#define TCON_INTERRUPT (29)
#define DE_FE_INTERRUPT (30)
#define DE_BE_INTERRUPT (31)
#define CSI_INTERRUPT (32)
#define DE_INTERLACER_INTERRUPT (33)
#define VE_INTERRUPT (34)
#define DAUDIO_INTERRUPT (35)
#define PIOD_INTERRUPT (38)
#define PIOE_INTERRUPT (39)
#define PIOF_INTERRUPT (40)
/* intc register address */
#define INTC_BASE_ADDR (0x01C20400)
struct tina_intc
{
volatile rt_uint32_t vector_reg; /* 0x00 */
volatile rt_uint32_t base_addr_reg; /* 0x04 */
volatile rt_uint32_t reserved0;
volatile rt_uint32_t nmi_ctrl_reg; /* 0x0C */
volatile rt_uint32_t pend_reg0; /* 0x10 */
volatile rt_uint32_t pend_reg1; /* 0x14 */
volatile rt_uint32_t reserved1[2];
volatile rt_uint32_t en_reg0; /* 0x20 */
volatile rt_uint32_t en_reg1; /* 0x24 */
volatile rt_uint32_t reserved2[2];
volatile rt_uint32_t mask_reg0; /* 0x30 */
volatile rt_uint32_t mask_reg1; /* 0x34 */
volatile rt_uint32_t reserved3[2];
volatile rt_uint32_t resp_reg0; /* 0x40 */
volatile rt_uint32_t resp_reg1; /* 0x44 */
volatile rt_uint32_t reserved4[2];
volatile rt_uint32_t ff_reg0; /* 0x50 */
volatile rt_uint32_t ff_reg1; /* 0x54 */
volatile rt_uint32_t reserved5[2];
volatile rt_uint32_t prio_reg0; /* 0x60 */
volatile rt_uint32_t prio_reg1; /* 0x64 */
volatile rt_uint32_t prio_reg2; /* 0x68 */
volatile rt_uint32_t prio_reg3; /* 0x6C */
} ;
typedef struct tina_intc *tina_intc_t;
#define INTC ((tina_intc_t)INTC_BASE_ADDR)
void rt_hw_interrupt_init(void);
void rt_hw_interrupt_mask(int vector);
void rt_hw_interrupt_umask(int vector);
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, char *name);
#endif /* __INTERRUPT_H__ */
bsp/allwinner_tina/libcpu/mmu.c
+457
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bsp/allwinner_tina/libcpu/mmu.h
+65
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/*
* File : mmu.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-02-08 RT-Thread the first version
*/
#ifndef __MMU_H__
#define __MMU_H__
#include <rtthread.h>
#define CACHE_LINE_SIZE 32
#define DESC_SEC (0x2|(1<<4))
#define CB (3<<2) //cache_on, write_back
#define CNB (2<<2) //cache_on, write_through
#define NCB (1<<2) //cache_off,WR_BUF on
#define NCNB (0<<2) //cache_off,WR_BUF off
#define AP_RW (3<<10) //supervisor=RW, user=RW
#define AP_RO (2<<10) //supervisor=RW, user=RO
#define DOMAIN_FAULT (0x0)
#define DOMAIN_CHK (0x1)
#define DOMAIN_NOTCHK (0x3)
#define DOMAIN0 (0x0<<5)
#define DOMAIN1 (0x1<<5)
#define DOMAIN0_ATTR (DOMAIN_CHK<<0)
#define DOMAIN1_ATTR (DOMAIN_FAULT<<2)
#define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC) /* Read/Write, cache, write back */
#define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC) /* Read/Write, cache, write through */
#define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
#define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
struct mem_desc
{
rt_uint32_t vaddr_start;
rt_uint32_t vaddr_end;
rt_uint32_t paddr_start;
rt_uint32_t attr;
};
void rt_hw_mmu_init(struct mem_desc *mdesc, rt_uint32_t size);
void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size);
void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size);
void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size);
#endif
bsp/allwinner_tina/libcpu/rt_low_level_init.c
+81
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/*
* File : rt_low_level_init.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-02-08 RT-Thread the first version
*/
void rt_low_level_init(void)
{
volatile unsigned int *addr;
volatile unsigned int time;
int i;
//change cpu clk source to 24M
addr = (unsigned int *)(0x01c20000 + 0x050);
*addr = 0x10000;
//init cpu pll clk 408M
addr = (unsigned int *)(0x01c20000 + 0x000);
*addr = 0x80001000;
time = 0xffff;
while ((!(*addr & (0x1 << 28))) && (time--));
//change cpu clk source to pll
if (time > 0)
{
addr = (unsigned int *)(0x01c20000 + 0x050);
*addr = 0x20000;
}
//init periph pll clk:600M
//init ahb pll clk:200M
//init apb pll clk:100M
addr = (unsigned int *)(0x01c20000 + 0x028);
if (*addr & (0x1 << 31))
return;
addr = (unsigned int *)(0x01c20000 + 0x200);
*addr = 0x1ff;
addr = (unsigned int *)(0x01c20000 + 0x204);
*addr = 0x1ff;
addr = (unsigned int *)(0x01c20000 + 0x028);
*addr |= (0x1 << 31);
while (!(*addr & (0x1 << 28)));
addr = (unsigned int *)(0x01c20000 + 0x054);
*addr = (0x0 << 16) | (0x3 << 12) | (0x0 << 8) | (0x2 << 6) | (0x0 << 4);
//init gpio config
for (i = 0; i < 6; i++)
{
if (i == 1)
continue;// not config gpio B
addr = (unsigned int *)(0x01c20800 + i * 0x24 + 0x00);
*addr = 0x77777777;
addr = (unsigned int *)(0x01c20800 + i * 0x24 + 0x04);
*addr = 0x77777777;
addr = (unsigned int *)(0x01c20800 + i * 0x24 + 0x08);
*addr = 0x77777777;
addr = (unsigned int *)(0x01c20800 + i * 0x24 + 0x0C);
*addr = 0x77777777;
}
}
bsp/allwinner_tina/libcpu/stack.c
+81
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/*
* File : stack.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-02-08 RT-Thread the first version
*/
#include <rtthread.h>
/*****************************/
/* CPU Mode */
/*****************************/
#define USERMODE 0x10
#define FIQMODE 0x11
#define IRQMODE 0x12
#define SVCMODE 0x13
#define ABORTMODE 0x17
#define UNDEFMODE 0x1b
#define MODEMASK 0x1f
#define NOINT 0xc0
/**
* This function will initialize thread stack
*
* @param tentry the entry of thread
* @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
* @return stack address
*/
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{
rt_uint32_t *stk;
//stk = (rt_uint32_t*)stack_addr;
stack_addr += sizeof(rt_uint32_t);
stack_addr = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
stk = (rt_uint32_t *)stack_addr;
*(--stk) = (rt_uint32_t)tentry; /* entry point */
*(--stk) = (rt_uint32_t)texit; /* lr */
*(--stk) = 0xdeadbeef; /* r12 */
*(--stk) = 0xdeadbeef; /* r11 */
*(--stk) = 0xdeadbeef; /* r10 */
*(--stk) = 0xdeadbeef; /* r9 */
*(--stk) = 0xdeadbeef; /* r8 */
*(--stk) = 0xdeadbeef; /* r7 */
*(--stk) = 0xdeadbeef; /* r6 */
*(--stk) = 0xdeadbeef; /* r5 */
*(--stk) = 0xdeadbeef; /* r4 */
*(--stk) = 0xdeadbeef; /* r3 */
*(--stk) = 0xdeadbeef; /* r2 */
*(--stk) = 0xdeadbeef; /* r1 */
*(--stk) = (rt_uint32_t)parameter; /* r0 : argument */
/* cpsr */
if ((rt_uint32_t)tentry & 0x01)
*(--stk) = SVCMODE | 0x20; /* thumb mode */
else
*(--stk) = SVCMODE; /* arm mode */
/* return task's current stack address */
return (rt_uint8_t *)stk;
}
bsp/allwinner_tina/libcpu/start_gcc.S
+346
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bsp/allwinner_tina/libcpu/trap.c
+223
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bsp/allwinner_tina/link.lds
+148
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SECTIONS
{
. = 0x80000000;
. = ALIGN(4);
__text_start = .;
.text :
{
*(.vectors)
*(.text)
*(.text.*)
KEEP(*(.fini))
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
/* section information for initialization */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
} =0
__text_end = .;
__rodata_start = .;
.rodata : { *(.rodata) *(.rodata.*) *(.eh_frame) }
__rodata_end = .;
. = ALIGN(4);
.ctors :
{
PROVIDE(__ctors_start__ = .);
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
PROVIDE(__ctors_end__ = .);
}
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
}
/* The .ARM.exidx section is used for C++ exception handling. */
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
}
__exidx_end = .;
.dtors :
{
PROVIDE(__dtors_start__ = .);
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
PROVIDE(__dtors_end__ = .);
}
__data_start = .;
. = ALIGN(4);
.data :
{
*(.data)
*(.data.*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
*(.gnu.linkonce.d*)
}
__data_end = .;
. = ALIGN(4);
__bss_start = .;
.bss :
{
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
}
. = ALIGN(4);
__bss_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
_end = .;
}
bsp/allwinner_tina/rtconfig.h
+235
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bsp/allwinner_tina/rtconfig.py
+58
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import os
# toolchains options
ARCH ='arm'
CPU ='R6'
CROSS_TOOL ='gcc'
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = '../..'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'E:\work\env\tools\gnu_gcc\arm_gcc\mingw\bin'
else:
print 'Please make sure your toolchains is GNU GCC!'
exit(0)
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'release'
# BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'g++'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=arm926ej-s -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -Wall'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,system_vectors -T link.lds'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'