[nxp][imxrt1170] format files

bsp/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/MCUX_Config.mex

@@ -482,4 +482,4 @@
          <user_memory_regions/>
       </tee>
    </tools>
-</configuration>
+</configuration>

bsp/imxrt/imxrt1170-nxp-evk/board/linker_scripts/evkmimxrt1170_flexspi_nor_sdram.ini

@@ -32,7 +32,7 @@ FUNC void SDRAM_WaitIpCmdDone(void)
   {
     reg = _RDWORD(0x400D403C);
   }while((reg & 0x3) == 0);
-  
+
   _WDWORD(0x400D403C,0x00000003); // clear IPCMDERR and IPCMDDONE bits
 }
 
@@ -74,7 +74,7 @@ FUNC void EnablePllLdo(void)
   reg |= 0x10000;
   _WDWORD(0x40C84500,reg);
   _Sleep_(100);
-  
+
   // PMU_POWER_DETECT_CTRL
   _WDWORD(0x40C84580,0x00000100);
   _Sleep_(1);
@@ -142,7 +142,7 @@ FUNC void InitSysPll2(void)
   reg &= ~(0x802000);
   reg |= 0x40000000;
   _WDWORD(0x40C84240, reg);
-  
+
   // ANADIG_PLL_PLL_528_MFN
   _WDWORD(0x40C84280, 0);
   // ANADIG_PLL_PLL_528_MFI
@@ -182,7 +182,7 @@ FUNC void SetSemcClock(void)
   EnablePllLdo();
   InitSysPll2();
   InitSysPll2Pfd1();
-  
+
   // Set SEMC root clock
   // Use sys pll2 pfd1 divided by 3: 198Mhz
   _WDWORD(0x40CC0200,0x00000602);
@@ -259,7 +259,7 @@ FUNC void _sdr_Init(void)
   _WDWORD(0x400E8100, 0x00000000);
   _WDWORD(0x400E8104, 0x00000000);
   _WDWORD(0x400E8108, 0x00000000);
-  
+
   // PAD ctrl
   // PDRV = 1b (normal); PULL = 10b (PD)
   _WDWORD(0x400E8254, 0x00000008);
@@ -331,17 +331,17 @@ FUNC void _sdr_Init(void)
   _WDWORD(0x400d4008,0x00000081); // BMCR0
   _WDWORD(0x400d400C,0x00000081); // BMCR1
   _WDWORD(0x400d4010,0x8000001D); // BR0, 64MB
-  
+
   _WDWORD(0x400d4040,0x00000F32); // SDRAMCR0, 32bit
   _WDWORD(0x400d4044,0x00772A22); // SDRAMCR1
   _WDWORD(0x400d4048,0x00010A0D); // SDRAMCR2
   _WDWORD(0x400d404C,0x21210408); // SDRAMCR3
-                        
+
   _WDWORD(0x400d4090,0x80000000); // IPCR0
   _WDWORD(0x400d4094,0x00000002); // IPCR1
   _WDWORD(0x400d4098,0x00000000); // IPCR2
 
-  
+
   _WDWORD(0x400d409C,0xA55A000F); // IPCMD, SD_CC_IPREA
   SDRAM_WaitIpCmdDone();
   _WDWORD(0x400d409C,0xA55A000C); // SD_CC_IAF

bsp/imxrt/imxrt1170-nxp-evk/board/linker_scripts/link.lds

@@ -261,7 +261,7 @@ SECTIONS
     stack_end = .;
     __StackTop = .;
   } > m_dtcm
-  
+
   .RTT_HEAP :
   {
     heap_start = .;

bsp/imxrt/libraries/MIMXRT1170/MIMXRT1176/utilities/incbin/fsl_incbin.S

@@ -1,37 +1,37 @@
-;/*
-; * Copyright 2020 NXP
-; *
-; * All rights reserved.
-; *
-; * SPDX-License-Identifier: BSD-3-Clause
-; */
-
-#if defined(__CC_ARM)
-
-        AREA core1_code, DATA, READONLY, PREINIT_ARRAY, ALIGN=3
-        EXPORT core1_image_start
-        EXPORT core1_image_end
-core1_image_start
-        INCBIN core1_image.bin
-core1_image_end
-        END
-
-#elif defined(__GNUC__) || defined(__ARMCC_VERSION)
-
-        .section .core1_code, "ax" @progbits @preinit_array
-        .global core1_image_start
-        .type core1_image_start, %object
-        .align 4
-core1_image_start:
-        .incbin "core1_image.bin"
-        .global core1_image_end
-        .type core1_image_end, %object
-core1_image_end:
-        .global core1_image_size
-        .type core1_image_size, %object
-        .align 4
-core1_image_size:
-        .int  core1_image_end - core1_image_start
-        .end
-
-#endif
+;/*
+; * Copyright 2020 NXP
+; *
+; * All rights reserved.
+; *
+; * SPDX-License-Identifier: BSD-3-Clause
+; */
+
+#if defined(__CC_ARM)
+
+        AREA core1_code, DATA, READONLY, PREINIT_ARRAY, ALIGN=3
+        EXPORT core1_image_start
+        EXPORT core1_image_end
+core1_image_start
+        INCBIN core1_image.bin
+core1_image_end
+        END
+
+#elif defined(__GNUC__) || defined(__ARMCC_VERSION)
+
+        .section .core1_code, "ax" @progbits @preinit_array
+        .global core1_image_start
+        .type core1_image_start, %object
+        .align 4
+core1_image_start:
+        .incbin "core1_image.bin"
+        .global core1_image_end
+        .type core1_image_end, %object
+core1_image_end:
+        .global core1_image_size
+        .type core1_image_size, %object
+        .align 4
+core1_image_size:
+        .int  core1_image_end - core1_image_start
+        .end
+
+#endif