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[bsp][ch32v307]增加软件spi驱动 (#6532)

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This commit is contained in:
zhaohaisheng
2022-10-19 00:23:25 -04:00
committed by GitHub
parent 2bcc22f6b0
commit 88179b75a1
4 changed files with 350 additions and 0 deletions
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bsp/wch/risc-v/Libraries/ch32_drivers/SConscript
+3
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@@ -20,6 +20,9 @@ if GetDepend('SOC_RISCV_FAMILY_CH32'):
if GetDepend('BSP_USING_SOFT_I2C'):
src += ['drv_soft_i2c.c']
if GetDepend('BSP_USING_SPI'):
src += ['drv_soft_spi.c','drv_spi.c']
if GetDepend('BSP_USING_RTC'):
src += ['drv_rtc.c']
bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_spi.c
+228
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File diff suppressed because it is too large Load Diff
bsp/wch/risc-v/Libraries/ch32_drivers/drv_soft_spi.h
+56
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@@ -0,0 +1,56 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-10-01 zhs the first version which add from wch
*/
#ifndef LIBRARIES_HAL_DRIVERS_DRV_SOFT_SPI_H_
#define LIBRARIES_HAL_DRIVERS_DRV_SOFT_SPI_H_
#include <rthw.h>
#include <rtdevice.h>
#include <spi-bit-ops.h>
/* ch32 soft spi config */
struct ch32_soft_spi_config
{
rt_uint8_t sck;
rt_uint8_t mosi;
rt_uint8_t miso;
const char *bus_name;
};
/* ch32 soft spi dirver */
struct ch32_soft_spi
{
struct rt_spi_bit_obj spi;
struct ch32_soft_spi_config *cfg;
};
#ifdef BSP_USING_SOFT_SPI1
#define SOFT_SPI1_BUS_CONFIG \
{ \
.sck = BSP_S_SPI1_SCK_PIN, \
.mosi = BSP_S_SPI1_MOSI_PIN, \
.miso = BSP_S_SPI1_MISO_PIN, \
.bus_name = "sspi1", \
}
#endif /* BSP_USING_SOFT_SPI1 */
#ifdef BSP_USING_SOFT_SPI2
#define SOFT_SPI2_BUS_CONFIG \
{ \
.sck = BSP_S_SPI2_SCK_PIN, \
.mosi = BSP_S_SPI2_MOSI_PIN, \
.miso = BSP_S_SPI2_MISO_PIN, \
.bus_name = "sspi2", \
}
#endif /* BSP_USING_SOFT_SPI2 */
rt_err_t rt_hw_soft_spi_device_attach(const char *bus_name, const char *device_name, const char *pin_name);
int rt_soft_spi_init(void);
#endif /* __DRV_SOFT_SPI__ */
bsp/wch/risc-v/ch32v307v-r1/board/Kconfig
+63
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@@ -131,6 +131,69 @@ menu "On-chip Peripheral Drivers"
endif
endif
menuconfig BSP_USING_SPI
bool "Enable SPI"
select RT_USING_SPI_BITOPS
select RT_USING_SPI
if BSP_USING_SPI
config BSP_USING_SPI1
bool "Enable SPI1"
default n
config BSP_USING_SPI2
bool "Enable SPI2"
default n
config BSP_USING_SPI3
bool "Enable SPI3"
default n
if BSP_USING_SPI3
config BSP_USING_SPI_FLASH
bool "Enable SPI Flash"
default n
endif
config BSP_USING_SOFT_SPI1
bool "Enable SSPI1 Bus (User SPI)"
default n
if BSP_USING_SOFT_SPI1
comment "Notice: PB9 --> 25; PB8 --> 24; PB7 --> 23"
config BSP_S_SPI1_SCK_PIN
int "sspi1 SCL pin number"
range 1 79
default 25
config BSP_S_SPI1_MOSI_PIN
int "sspi1 MISO pin number"
range 1 79
default 24
config BSP_S_SPI1_MISO_PIN
int "sspi1 MOSI pin number"
range 1 79
default 23
endif
config BSP_USING_SOFT_SPI2
bool "Enable SSPI2 Bus (soft SPI)"
default n
if BSP_USING_SOFT_SPI2
comment "Notice: PE0 --> 64; PE1 --> 65; PE2 --> 66"
config BSP_S_SPI2_SCK_PIN
int "sspi2 SCL pin number"
range 1 79
default 64
config BSP_S_SPI2_MOSI_PIN
int "sspi2 MISO pin number"
range 1 79
default 65
config BSP_S_SPI2_MISO_PIN
int "sspi2 MOSI pin number"
range 1 79
default 66
endif
endif
config BSP_USING_RTC
bool "Enable RTC"
select RT_USING_RTC