mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-03-24 17:33:58 +08:00
@@ -15,8 +15,8 @@ if GetDepend(['RT_USING_SERIAL']):
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else:
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src += ['drv_uart.c']
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# if GetDepend('RT_USING_PIN'):
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# src += ['drv_gpio.c']
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if GetDepend('RT_USING_PIN'):
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src += ['drv_gpio.c']
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# if GetDepend('BSP_USING_LCD'):
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# src += ['drv_lcd.c']
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@@ -76,6 +76,11 @@ void rt_hw_board_init(void)
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rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
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#endif
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/* GPIO driver initialization is open by default */
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#ifdef RT_USING_PIN
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rt_hw_pin_init();
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#endif
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/* UART driver initialization is open by default */
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#ifdef RT_USING_SERIAL
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rt_hw_uart_init();
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208
bsp/bl808/m0/drivers/drv_gpio.c
Normal file
208
bsp/bl808/m0/drivers/drv_gpio.c
Normal file
@@ -0,0 +1,208 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023/01/5 chushicheng first version
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*
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*/
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#include "drv_gpio.h"
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#include <stdbool.h>
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#include "bl808_gpio.h"
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#include "bl808_glb.h"
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#include "bl808.h"
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#ifdef RT_USING_PIN
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#define DBG_TAG "drv.gpio"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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static void GPIO0_IRQHandler(void);
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struct gpio_int_cfg_private
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{
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slist_t list;
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uint32_t pin;
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void (*hdr)(uint32_t pin);
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};
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static slist_t gpio_int_head = SLIST_OBJECT_INIT(gpio_int_head);
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static void bl808_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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GLB_GPIO_Write(pin, value);
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}
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static int bl808_pin_read(rt_device_t dev, rt_base_t pin)
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{
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int value;
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value = GLB_GPIO_Read(pin);;
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return value;
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}
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static void bl808_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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GLB_GPIO_Cfg_Type gpio_cfg;
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gpio_cfg.gpioFun = GPIO_FUN_GPIO;
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gpio_cfg.gpioPin = pin;
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gpio_cfg.drive = 0;
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gpio_cfg.smtCtrl = 1;
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gpio_cfg.outputMode = 0;
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switch (mode)
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{
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case GPIO_OUTPUT_MODE:
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gpio_cfg.gpioMode = GPIO_MODE_OUTPUT;
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gpio_cfg.pullType = GPIO_PULL_NONE;
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break;
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case GPIO_OUTPUT_PP_MODE:
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gpio_cfg.gpioMode = GPIO_MODE_OUTPUT;
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gpio_cfg.pullType = GPIO_PULL_UP;
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break;
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case GPIO_OUTPUT_PD_MODE:
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gpio_cfg.gpioMode = GPIO_MODE_OUTPUT;
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gpio_cfg.pullType = GPIO_PULL_DOWN;
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break;
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case GPIO_INPUT_MODE:
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gpio_cfg.gpioMode = GPIO_MODE_INPUT;
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gpio_cfg.pullType = GPIO_PULL_NONE;
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break;
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case GPIO_INPUT_PP_MODE:
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gpio_cfg.gpioMode = GPIO_MODE_INPUT;
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gpio_cfg.pullType = GPIO_PULL_UP;
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break;
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case GPIO_INPUT_PD_MODE:
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gpio_cfg.gpioMode = GPIO_MODE_INPUT;
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gpio_cfg.pullType = GPIO_PULL_DOWN;
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break;
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case GPIO_HZ_MODE:
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GLB_GPIO_Set_HZ(pin);
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default:
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CPU_Interrupt_Disable(GPIO_INT0_IRQn);
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GLB_GPIO_IntMask(pin, MASK);
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GLB_GPIO_INT_Cfg_Type intCfg;
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intCfg.gpioPin = pin;
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intCfg.intMask = MASK;
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gpio_cfg.gpioMode = GPIO_MODE_INPUT;
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if (mode == GPIO_ASYNC_RISING_TRIGER_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_DOWN;
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intCfg.trig = GLB_GPIO_INT_TRIG_ASYNC_RISING_EDGE;
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}
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else if (mode == GPIO_ASYNC_FALLING_TRIGER_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_UP;
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intCfg.trig = GLB_GPIO_INT_TRIG_ASYNC_FALLING_EDGE;
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}
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else if (mode == GPIO_ASYNC_HIGH_LEVEL_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_DOWN;
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intCfg.trig = GLB_GPIO_INT_TRIG_ASYNC_HIGH_LEVEL;
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}
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else if (mode == GPIO_ASYNC_LOW_LEVEL_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_UP;
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intCfg.trig = GLB_GPIO_INT_TRIG_ASYNC_LOW_LEVEL;
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}
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else if (mode == GPIO_SYNC_RISING_TRIGER_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_DOWN;
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intCfg.trig = GLB_GPIO_INT_TRIG_SYNC_RISING_EDGE;
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}
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else if (mode == GPIO_SYNC_FALLING_TRIGER_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_UP;
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intCfg.trig = GLB_GPIO_INT_TRIG_SYNC_FALLING_EDGE;
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}
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else if (mode == GPIO_SYNC_FALLING_TRIGER_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_NONE;
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intCfg.trig = GLB_GPIO_INT_TRIG_SYNC_FALLING_RISING_EDGE;
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}
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else if (mode == GPIO_SYNC_HIGH_LEVEL_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_DOWN;
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intCfg.trig = GLB_GPIO_INT_TRIG_SYNC_HIGH_LEVEL;
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}
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else if (mode == GPIO_SYNC_LOW_LEVEL_INT_MODE)
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{
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gpio_cfg.pullType = GPIO_PULL_UP;
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intCfg.trig = GLB_GPIO_INT_TRIG_SYNC_LOW_LEVEL;
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}
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GLB_GPIO_Int_Init(&intCfg);
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break;
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}
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GLB_GPIO_Init(&gpio_cfg);
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}
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static rt_err_t bl808_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t irq_mode, void (*hdr)(void *args), void *args)
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{
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struct gpio_int_cfg_private *int_cfg = malloc(sizeof(struct gpio_int_cfg_private));
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int_cfg->hdr = hdr;
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int_cfg->pin = pin;
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slist_add_tail(&gpio_int_head, &int_cfg->list);
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CPU_Interrupt_Disable(GPIO_INT0_IRQn);
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Interrupt_Handler_Register(GPIO_INT0_IRQn, GPIO0_IRQHandler);
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CPU_Interrupt_Enable(GPIO_INT0_IRQn);
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return RT_EOK;
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}
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static rt_err_t bl808_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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if (enabled)
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{
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GLB_GPIO_IntMask(pin, UNMASK);
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}
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else
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{
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GLB_GPIO_IntMask(pin, MASK);
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}
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return RT_EOK;
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}
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const static struct rt_pin_ops _bl808_pin_ops =
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{
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bl808_pin_mode,
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bl808_pin_write,
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bl808_pin_read,
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bl808_pin_attach_irq,
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bl808_pin_irq_enable,
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NULL,
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};
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int rt_hw_pin_init(void)
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{
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return rt_device_pin_register("pin", &_bl808_pin_ops, RT_NULL);
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}
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INIT_BOARD_EXPORT(rt_hw_pin_init);
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/* irq handle */
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void GPIO0_IRQHandler(void)
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{
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rt_interrupt_enter();
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// GPIO_INT0_IRQHandler();
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rt_interrupt_leave();
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}
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#endif /* RT_USING_PIN */
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39
bsp/bl808/m0/drivers/drv_gpio.h
Normal file
39
bsp/bl808/m0/drivers/drv_gpio.h
Normal file
@@ -0,0 +1,39 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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||||
* Date Author Notes
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* 2023/01/5 chushicheng first version
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*
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*/
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#ifndef __DRV_GPIO_H__
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#define __DRV_GPIO_H__
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#include <board.h>
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#include <rtdevice.h>
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#include "drv_device.h"
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#define GPIO_OUTPUT_MODE 0
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#define GPIO_OUTPUT_PP_MODE 1
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#define GPIO_OUTPUT_PD_MODE 2
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#define GPIO_INPUT_MODE 3
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#define GPIO_INPUT_PP_MODE 4
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#define GPIO_INPUT_PD_MODE 5
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#define GPIO_ASYNC_RISING_TRIGER_INT_MODE 6
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#define GPIO_ASYNC_FALLING_TRIGER_INT_MODE 7
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#define GPIO_ASYNC_HIGH_LEVEL_INT_MODE 8
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#define GPIO_ASYNC_LOW_LEVEL_INT_MODE 9
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#define GPIO_SYNC_RISING_TRIGER_INT_MODE 10
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#define GPIO_SYNC_FALLING_TRIGER_INT_MODE 11
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#define GPIO_SYNC_RISING_FALLING_TRIGER_INT_MODE 12
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#define GPIO_SYNC_HIGH_LEVEL_INT_MODE 13
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#define GPIO_SYNC_LOW_LEVEL_INT_MODE 14
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#define GPIO_HZ_MODE 15
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int rt_hw_pin_init(void);
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#endif /* __DRV_GPIO_H__ */
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@@ -91,6 +91,8 @@ src += Split("""
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""")
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path += [cwd + r'/platform/hosal/bl808_e907_hal']
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path += [cwd + r'/platform/soc/bl808/bl808_e907_std/common/device',
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cwd + r'/platform/soc/bl808/bl808_e907_std/common/list']
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libpath = []
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libs = []
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@@ -85,7 +85,7 @@ static int __hw_init(bl_audio_dev_t *p_dev)
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AUIDO_RAMP_RATE_2_FS,
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AUIDO_ZERO_CROSS_RATE_2_FS,
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};
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GLB_Config_AUDIO_PLL(GLB_XTAL_40M, audioPllCfg_451P584M);
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/* ungate audio */
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GLB_PER_Clock_UnGate(GLB_AHB_CLOCK_AUDIO);
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@@ -202,7 +202,7 @@ static int __hw_init(bl_audio_dev_t *p_dev)
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static void __audio_lli_init(bl_audio_dev_t *p_dev)
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{
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p_dev->lli_tx_buffer_size = p_dev->lli_tx_buffer_size / 2;
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switch (p_dev->playBitWidth) {
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case AUDIO_BIT_WIDTH_16:
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dmaCtrlRegVal.SWidth = DMA_TRNS_WIDTH_16BITS;
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@@ -230,7 +230,7 @@ static void __audio_lli_init(bl_audio_dev_t *p_dev)
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//private_bflb_platform_printf("BIT WIDTH Is Invaild\r\n");
|
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break;
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}
|
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|
||||
|
||||
p_dev->lli_tx_list[0].srcDmaAddr = (uint32_t)p_dev->lli_tx_buffer;
|
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p_dev->lli_tx_list[0].destDmaAddr = AUDIO_TX_FIFO_ADDR;
|
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p_dev->lli_tx_list[0].nextLLI = (uint32_t)&p_dev->lli_tx_list[1];
|
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@@ -246,7 +246,7 @@ static void __audio_lli_init(bl_audio_dev_t *p_dev)
|
||||
|
||||
if (p_dev->rx_enable) {
|
||||
p_dev->lli_rx_buffer_size = p_dev->lli_rx_buffer_size / 2;
|
||||
|
||||
|
||||
switch (p_dev->playBitWidth) {
|
||||
case AUDIO_BIT_WIDTH_16:
|
||||
dmaCtrlRegVal.SWidth = DMA_TRNS_WIDTH_16BITS;
|
||||
|
||||
@@ -47,14 +47,14 @@ PtTable_Error_Type PtTable_Update_Entry(const SPI_Flash_Cfg_Type *pFlashCfg,
|
||||
if(ptEntry==NULL||ptStuff==NULL){
|
||||
return PT_ERROR_PARAMETER;
|
||||
}
|
||||
|
||||
|
||||
ptTable=&ptStuff->ptTable;
|
||||
ptEntries=ptStuff->ptEntries;
|
||||
|
||||
|
||||
if(targetTableID==PT_TABLE_ID_INVALID){
|
||||
return PT_ERROR_TABLE_NOT_VALID;
|
||||
}
|
||||
|
||||
|
||||
if(targetTableID==PT_TABLE_ID_0){
|
||||
writeAddr=BFLB_PT_TABLE0_ADDRESS;
|
||||
}else{
|
||||
@@ -75,17 +75,17 @@ PtTable_Error_Type PtTable_Update_Entry(const SPI_Flash_Cfg_Type *pFlashCfg,
|
||||
return PT_ERROR_ENTRY_UPDATE_FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Prepare write back to flash */
|
||||
/* Update age */
|
||||
ptTable->age++;
|
||||
ptTable->crc32=BFLB_Soft_CRC32((uint8_t*)ptTable,sizeof(PtTable_Config)-4);
|
||||
|
||||
|
||||
/* Update entries CRC */
|
||||
entriesLen=ptTable->entryCnt*sizeof(PtTable_Entry_Config);
|
||||
pCrc32=(uint32_t *)((uint32_t)ptEntries+entriesLen);
|
||||
*pCrc32=BFLB_Soft_CRC32((uint8_t *)&ptEntries[0],entriesLen);
|
||||
|
||||
|
||||
/* Write back to flash */
|
||||
/* Erase flash first */
|
||||
ret=bl_flash_erase(writeAddr,sizeof(PtTable_Config)+entriesLen+4);
|
||||
@@ -108,7 +108,7 @@ PtTable_Error_Type PtTable_Get_Active_Entries(PtTable_Stuff_Config *ptStuff,
|
||||
PtTable_Entry_Config *ptEntry)
|
||||
{
|
||||
uint32_t i=0;
|
||||
|
||||
|
||||
if(ptStuff==NULL||ptEntry==NULL){
|
||||
return PT_ERROR_PARAMETER;
|
||||
}
|
||||
@@ -130,16 +130,16 @@ PtTable_Error_Type PtTable_Get_Active_Entries_By_Name(PtTable_Stuff_Config *ptSt
|
||||
|
||||
if(ptStuff==NULL||ptEntry==NULL){
|
||||
return PT_ERROR_PARAMETER;
|
||||
}
|
||||
}
|
||||
for (i=0; i < ptStuff->ptTable.entryCnt; i++) {
|
||||
if (strlen((char *)ptStuff->ptEntries[i].name) == len &&
|
||||
memcmp((char *)ptStuff->ptEntries[i].name,(char *)name,len) == 0){
|
||||
memcmp((char *)ptStuff->ptEntries[i].name,(char *)name,len) == 0){
|
||||
//BL602_MemCpy_Fast(ptEntry,&ptStuff->ptEntries[i],sizeof(PtTable_Entry_Config));
|
||||
/*FIXME :need fast memory copy*/
|
||||
memcpy(ptEntry,&ptStuff->ptEntries[i],sizeof(PtTable_Entry_Config));
|
||||
return PT_ERROR_SUCCESS;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return PT_ERROR_ENTRY_NOT_FOUND;
|
||||
}
|
||||
|
||||
|
||||
@@ -184,8 +184,8 @@ PtTable_ID_Type targetTableID,
|
||||
PtTable_Stuff_Config *ptStuff,
|
||||
PtTable_Entry_Config *ptEntry);
|
||||
PtTable_Error_Type PtTable_Create(const SPI_Flash_Cfg_Type *pFlashCfg,PtTable_ID_Type ptID);
|
||||
PtTable_Error_Type PtTable_Get_Active_Entries_By_Name(PtTable_Stuff_Config *ptStuff,
|
||||
uint8_t *name,
|
||||
PtTable_Error_Type PtTable_Get_Active_Entries_By_Name(PtTable_Stuff_Config *ptStuff,
|
||||
uint8_t *name,
|
||||
PtTable_Entry_Config *ptEntry);
|
||||
|
||||
/*@} end of group PARTITION_Public_Functions */
|
||||
|
||||
@@ -75,9 +75,9 @@ int bl_efuse_ctrl_program_R0(uint32_t index, uint32_t *data, uint32_t len)
|
||||
bdiv = BL_GET_REG_BITS_VAL(BL_RD_REG(GLB_BASE, GLB_SYS_CFG0), GLB_REG_BCLK_DIV);
|
||||
|
||||
HBN_Set_MCU_Root_CLK_Sel(HBN_MCU_ROOT_CLK_XCLK);
|
||||
|
||||
|
||||
EF_Ctrl_Program_Direct_R0(index, data, len);
|
||||
|
||||
|
||||
GLB_Set_System_CLK_Div(hdiv, bdiv);
|
||||
HBN_Set_MCU_Root_CLK_Sel(rtClk);
|
||||
|
||||
@@ -96,9 +96,9 @@ int bl_efuse_ctrl_read_R0(uint32_t index, uint32_t *data, uint32_t len)
|
||||
|
||||
|
||||
HBN_Set_MCU_Root_CLK_Sel(HBN_MCU_ROOT_CLK_XCLK);
|
||||
|
||||
|
||||
EF_Ctrl_Read_Direct_R0(index, data, len);
|
||||
|
||||
|
||||
GLB_Set_System_CLK_Div(hdiv, bdiv);
|
||||
HBN_Set_MCU_Root_CLK_Sel(rtClk);
|
||||
|
||||
@@ -116,8 +116,8 @@ int bl_efuse_read_mac_opt(uint8_t slot, uint8_t mac[6], uint8_t reload)
|
||||
bdiv = BL_GET_REG_BITS_VAL(BL_RD_REG(GLB_BASE, GLB_SYS_CFG0), GLB_REG_BCLK_DIV);
|
||||
|
||||
HBN_Set_MCU_Root_CLK_Sel(HBN_MCU_ROOT_CLK_XCLK);
|
||||
|
||||
// EF_Ctrl_Read_MAC_Address_Opt(slot, mac, reload);
|
||||
|
||||
// EF_Ctrl_Read_MAC_Address_Opt(slot, mac, reload);
|
||||
EF_Ctrl_Read_MAC_Address_Raw(mac);
|
||||
|
||||
GLB_Set_System_CLK_Div(hdiv, bdiv);
|
||||
|
||||
@@ -338,12 +338,12 @@ static struct pbuf *low_level_input(struct netif *netif)
|
||||
uint16_t max_len, min_len;
|
||||
struct pbuf *h = NULL;
|
||||
EMAC_BD_Desc_Type *bd;
|
||||
bd = &thiz->bd[thiz->rxIndexCPU];
|
||||
if(bd->C_S_L & EMAC_BD_FIELD_MSK(RX_E)){
|
||||
bd = &thiz->bd[thiz->rxIndexCPU];
|
||||
if(bd->C_S_L & EMAC_BD_FIELD_MSK(RX_E)){
|
||||
// MSG("RX BD is empty\r\n");
|
||||
h = NULL;
|
||||
} else {
|
||||
emac_get_fram_len(&max_len, &min_len);
|
||||
} else {
|
||||
emac_get_fram_len(&max_len, &min_len);
|
||||
pkt_len = (bd->C_S_L & EMAC_BD_FIELD_MSK(RX_LEN)) >> BD_RX_LEN_POS;
|
||||
//check length
|
||||
if (pkt_len > max_len) {
|
||||
|
||||
@@ -166,7 +166,7 @@ static void _dump_flash_config()
|
||||
extern uint8_t __boot2_flashCfg_src;
|
||||
|
||||
USER_UNUSED(__boot2_flashCfg_src);
|
||||
|
||||
|
||||
blog_info("======= FlashCfg magiccode @%p=======\r\n", &__boot2_flashCfg_src);
|
||||
blog_info("mid \t\t0x%X\r\n", g_flash_cfg.mid);
|
||||
blog_info("clkDelay \t0x%X\r\n", g_flash_cfg.clkDelay);
|
||||
|
||||
@@ -116,7 +116,7 @@ void bl_irq_default(void)
|
||||
}
|
||||
|
||||
static void (*handler_list[2][16 + 64])(void) = {
|
||||
|
||||
|
||||
};
|
||||
|
||||
|
||||
@@ -139,7 +139,7 @@ void bl_irq_register_with_ctx(int irqnum, void *handler, void *ctx)
|
||||
handler_list[0][irqnum]
|
||||
);
|
||||
}
|
||||
|
||||
|
||||
if (handler == NULL) {
|
||||
blog_error("handler is NULL pointer! \r\n");
|
||||
return;
|
||||
@@ -155,7 +155,7 @@ void bl_irq_register_with_ctx(int irqnum, void *handler, void *ctx)
|
||||
}
|
||||
|
||||
return;
|
||||
|
||||
|
||||
}
|
||||
|
||||
void bl_irq_ctx_get(int irqnum, void **ctx)
|
||||
@@ -177,8 +177,8 @@ void bl_irq_ctx_count_cost(int irqnum, uint64_t cost)
|
||||
struct irq_ctx *ctx;
|
||||
_irq_num_check(irqnum);
|
||||
if(handler_list[0][irqnum] != NULL) {
|
||||
ctx = (struct irq_ctx *)(handler_list[1][irqnum]);
|
||||
ctx->irq_run_time += cost;
|
||||
ctx = (struct irq_ctx *)(handler_list[1][irqnum]);
|
||||
ctx->irq_run_time += cost;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -206,7 +206,7 @@ void bl_irq_unregister(int irqnum, void *handler)
|
||||
#endif
|
||||
}
|
||||
|
||||
void interrupt_entry(uint32_t mcause)
|
||||
void interrupt_entry(uint32_t mcause)
|
||||
{
|
||||
void *handler = NULL;
|
||||
mcause &= 0x7FFFFFF;
|
||||
@@ -342,9 +342,9 @@ extern void misaligned_store_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t m
|
||||
|
||||
#ifdef DBG_RECORD_EXCEP_VAL
|
||||
struct{
|
||||
uint32_t mcause;
|
||||
uint32_t mepc;
|
||||
uint32_t mtval;
|
||||
uint32_t mcause;
|
||||
uint32_t mepc;
|
||||
uint32_t mtval;
|
||||
}rval[4];
|
||||
int rval_idx;
|
||||
#endif /* DBG_RECORD_EXCEP_VAL */
|
||||
@@ -358,24 +358,24 @@ void exception_entry(uint32_t mcause, uint32_t mepc, uint32_t mtval, uintptr_t *
|
||||
rval_idx++;
|
||||
#endif /* DBG_RECORD_EXCEP_VAL */
|
||||
if ((mcause & 0x3ff) == EXCPT_LOAD_MISALIGNED) {
|
||||
//misaligned_load_trap(regs, mcause, mepc);
|
||||
//misaligned_load_trap(regs, mcause, mepc);
|
||||
} else if ((mcause & 0x3ff) == EXCPT_STORE_MISALIGNED){
|
||||
//misaligned_store_trap(regs, mcause, mepc);
|
||||
//misaligned_store_trap(regs, mcause, mepc);
|
||||
}
|
||||
{
|
||||
//registerdump(tasksp);
|
||||
puts("Exception Entry--->>>\r\n");
|
||||
blog_info("mcause %08lx, mepc %08lx, mtval %08lx\r\n",
|
||||
mcause,
|
||||
mepc,
|
||||
mtval
|
||||
);
|
||||
//registerdump(tasksp);
|
||||
puts("Exception Entry--->>>\r\n");
|
||||
blog_info("mcause %08lx, mepc %08lx, mtval %08lx\r\n",
|
||||
mcause,
|
||||
mepc,
|
||||
mtval
|
||||
);
|
||||
__dump_exception_code_str(mcause & 0xFFFF);
|
||||
//backtrace_now_task((int (*)(const char *s))puts, regs);
|
||||
//backtrace_now_task((int (*)(const char *s))puts, regs);
|
||||
while (1) {
|
||||
/*Deap loop now*/
|
||||
/*Deap loop now*/
|
||||
#ifdef SYS_ENABLE_COREDUMP
|
||||
/* For stack check */
|
||||
/* For stack check */
|
||||
extern uintptr_t _sp_main, _sp_base;
|
||||
|
||||
/* XXX change sp to irq stack base */
|
||||
|
||||
@@ -83,7 +83,7 @@ static void get_mm_cpu_pll_clk(uint32_t reg_val)
|
||||
static void dump_mm_cpu_clk(void)
|
||||
{
|
||||
uint32_t tmpVal = 0, cpu_root_clk = 0;
|
||||
|
||||
|
||||
tmpVal = BL_RD_REG(CLKRST_CTRL_BASE, MM_GLB_MM_CLK_CTRL_CPU);
|
||||
cpu_root_clk = BL_GET_REG_BITS_VAL(tmpVal, MM_GLB_REG_CPU_ROOT_CLK_SEL);
|
||||
switch (cpu_root_clk) {
|
||||
|
||||
@@ -103,7 +103,7 @@ static int pm_env_init(void)
|
||||
INIT_UTILS_DLIST_HEAD(&(gp_pm_env->pm_list)[i]);
|
||||
}
|
||||
|
||||
gp_pm_env->state = PM_STATE_INITED;
|
||||
gp_pm_env->state = PM_STATE_INITED;
|
||||
|
||||
///for debug
|
||||
gp_pm_env->bt_capacity.cap = 0xffff;
|
||||
@@ -136,13 +136,13 @@ static int pm_deinit(void)
|
||||
|
||||
vPortFree(gp_pm_env->pm_list);
|
||||
gp_pm_env->pm_list = NULL;
|
||||
|
||||
|
||||
vSemaphoreDelete(gp_pm_env->pm_mux);
|
||||
gp_pm_env->pm_mux = NULL;
|
||||
|
||||
|
||||
vPortFree(gp_pm_env);
|
||||
gp_pm_env = NULL;
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -180,7 +180,7 @@ static void pm_node_add(struct pm_node *pnode, utils_dlist_t *queue)
|
||||
utils_dlist_add(&(pnode->dlist_item), pre_save);
|
||||
xSemaphoreGive(gp_pm_env->pm_mux);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
pre_save = &(node->dlist_item);
|
||||
}
|
||||
@@ -225,7 +225,7 @@ static int pm_pmlist_traverse(enum PM_EVEMT event, utils_dlist_t *queue, uint32_
|
||||
}
|
||||
|
||||
utils_dlist_for_each_entry_safe(queue, tmp, node, struct pm_node, dlist_item) {
|
||||
if ((node->enable) && (code == node->code) && (gp_pm_env->wlan_capacity.cap & node->cap_bit) &&
|
||||
if ((node->enable) && (code == node->code) && (gp_pm_env->wlan_capacity.cap & node->cap_bit) &&
|
||||
(gp_pm_env->bt_capacity.cap & node->cap_bit)) {
|
||||
|
||||
if (pm_state_exec_func_check(event, code)) {
|
||||
@@ -286,8 +286,8 @@ static int pm_internal_process_event(enum PM_EVEMT event, uint32_t code)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -296,7 +296,7 @@ int pm_post_event(enum PM_EVEMT event, uint32_t code, uint32_t *retval)
|
||||
if (!gp_pm_env) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
pm_pmlist_traverse(event, &(gp_pm_env->pm_list)[event], code, retval);
|
||||
pm_internal_process_event(event, code);
|
||||
|
||||
@@ -322,9 +322,9 @@ int bl_pm_event_register(enum PM_EVEMT event, uint32_t code, uint32_t cap_bit, u
|
||||
p_node->ops = ops;
|
||||
p_node->ctx = arg;
|
||||
p_node->enable = enable;
|
||||
|
||||
|
||||
pm_node_add(p_node, &(gp_pm_env->pm_list)[event]);
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -344,7 +344,7 @@ int bl_pm_event_switch(enum PM_EVEMT event, uint32_t code, enum PM_EVENT_ABLE en
|
||||
utils_dlist_for_each_entry_safe(queue, tmp, node, struct pm_node, dlist_item) {
|
||||
if (code == node->code) {
|
||||
node->enable = enable;
|
||||
|
||||
|
||||
ret = 0;
|
||||
}
|
||||
}
|
||||
@@ -396,8 +396,8 @@ int bl_pm_state_run(void)
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -467,7 +467,7 @@ int bl_pm_capacity_set(enum PM_LEVEL level)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pm_set_wlan_capacity(capacity);
|
||||
|
||||
|
||||
@@ -261,7 +261,7 @@ void SDH_CMDTransferFinished_CallBack(SDH_Handle_Cfg_Type *handle, SDH_Stat_Type
|
||||
*******************************************************************************/
|
||||
static void SDH_INT_Init(void)
|
||||
{
|
||||
System_NVIC_SetPriority(SDH_SDCARD_IRQn, 7, 1);
|
||||
System_NVIC_SetPriority(SDH_SDCARD_IRQn, 7, 1);
|
||||
CPU_Interrupt_Enable(SDH_SDCARD_IRQn);
|
||||
|
||||
SDH_EnableIntStatus(SDH_INT_ALL);
|
||||
@@ -1272,10 +1272,10 @@ status_t SDH_Init(uint32_t bus_wide, sd_card_t *pOutCardInfo)
|
||||
/* gpio init */
|
||||
SDH_GPIO_Init(bus_wide);
|
||||
|
||||
/* config sdh clock */
|
||||
GLB_PER_Clock_UnGate(GLB_AHB_CLOCK_SDH);
|
||||
/* config sdh clock */
|
||||
GLB_PER_Clock_UnGate(GLB_AHB_CLOCK_SDH);
|
||||
GLB_Set_SDH_CLK(1, GLB_SDH_CLK_WIFIPLL_96M, 0);
|
||||
SDH_ClockSet(400000, 96000000, 96000000);
|
||||
SDH_ClockSet(400000, 96000000, 96000000);
|
||||
|
||||
#if SDIO_SDCARD_INT_MODE
|
||||
SDH_INT_Init();
|
||||
|
||||
@@ -79,7 +79,7 @@ int bl_sha_finish(bl_sha_ctx_t *ctx, uint8_t *hash);
|
||||
int bl_sec_ccm_encrypt_and_tag(const uint8_t *key, unsigned int key_bytelen, size_t length, const unsigned char *iv, size_t iv_len, const unsigned char *add, size_t add_len,
|
||||
const unsigned char *input, unsigned char *output, unsigned char *tag, size_t tag_len);
|
||||
int bl_sec_ccm_auth_decrypt(const uint8_t *key, unsigned int key_bytelen, size_t length,const unsigned char *iv, size_t iv_len, const unsigned char *add,
|
||||
size_t add_len, const unsigned char *input, unsigned char *output, const unsigned char *tag, size_t tag_len);
|
||||
size_t add_len, const unsigned char *input, unsigned char *output, const unsigned char *tag, size_t tag_len);
|
||||
int bl_sec_aes_ecb_encrypt(const uint8_t *key, unsigned int key_bytelen, size_t length, const unsigned char *input, unsigned char *output);
|
||||
int bl_sec_aes_ecb_decrypt(const uint8_t *key, unsigned int key_bytelen, size_t length, const unsigned char *input, unsigned char *output);
|
||||
#endif
|
||||
|
||||
@@ -125,10 +125,10 @@ void sha256_test_case0(void)
|
||||
.linkCfg.shaMsgLen = 1,
|
||||
.linkCfg.shaSrcAddr = 0x50020000,
|
||||
};
|
||||
static const uint8_t sha256_test_result[] =
|
||||
static const uint8_t sha256_test_result[] =
|
||||
{
|
||||
0x31, 0x38, 0xbb, 0x9b, 0xc7, 0x8d, 0xf2, 0x7c, 0x47, 0x3e, 0xcf, 0xd1, 0x41, 0x0f, 0x7b, 0xd4,
|
||||
0x5e, 0xba, 0xc1, 0xf5, 0x9c, 0xf3, 0xff, 0x9c, 0xfe, 0x4d, 0xb7, 0x7a, 0xab, 0x7a, 0xed, 0xd3,
|
||||
0x5e, 0xba, 0xc1, 0xf5, 0x9c, 0xf3, 0xff, 0x9c, 0xfe, 0x4d, 0xb7, 0x7a, 0xab, 0x7a, 0xed, 0xd3,
|
||||
};
|
||||
|
||||
|
||||
|
||||
@@ -213,7 +213,7 @@ int bl_sys_early_init(void)
|
||||
|
||||
extern void freertos_risc_v_trap_handler(void); //freertos_riscv_ram/portable/GCC/RISC-V/portASM.S
|
||||
write_csr(mtvec, &freertos_risc_v_trap_handler);
|
||||
|
||||
|
||||
/* reset here for use wtd first then init hwtimer later*/
|
||||
GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_TMR);
|
||||
/*debuger may NOT ready don't print anything*/
|
||||
|
||||
@@ -171,7 +171,7 @@ int bl_wifi_power_table_set(bl_tx_pwr_tbl_t* tx_pwr_tbl)
|
||||
}
|
||||
#endif
|
||||
|
||||
int bl_wifi_ap_info_set(uint8_t* ssid, uint8_t ssid_len,
|
||||
int bl_wifi_ap_info_set(uint8_t* ssid, uint8_t ssid_len,
|
||||
uint8_t* psk, uint8_t psk_len,
|
||||
uint8_t chan)
|
||||
{
|
||||
|
||||
@@ -42,7 +42,7 @@ int bl_wifi_sta_mac_addr_set(uint8_t mac[6]);
|
||||
int bl_wifi_ap_mac_addr_set(uint8_t mac[6]);
|
||||
int bl_wifi_mac_addr_set(uint8_t mac[6]);
|
||||
int bl_wifi_country_code_set(uint8_t country_code);
|
||||
int bl_wifi_ap_info_set(uint8_t* ssid, uint8_t ssid_len,
|
||||
int bl_wifi_ap_info_set(uint8_t* ssid, uint8_t ssid_len,
|
||||
uint8_t* psk, uint8_t psk_len,
|
||||
uint8_t chan);
|
||||
int bl_wifi_mac_addr_get(uint8_t mac[6]);
|
||||
|
||||
@@ -27,4 +27,4 @@
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#include "phy_8720.c"
|
||||
#include "phy_8720.c"
|
||||
|
||||
@@ -337,7 +337,7 @@ static void update_xtal_config_rftv(uint32_t tlv_addr)
|
||||
uint8_t buffer[20] = {0};
|
||||
uint32_t capcode[5] = {0};
|
||||
char xtal_mode[3] = {0};
|
||||
|
||||
|
||||
if (rftlv_get(tlv_addr, RFTLV_API_TYPE_XTAL_MODE, 3, xtal_mode) > 0) {
|
||||
xtal_mode[sizeof(xtal_mode) - 1] = '\0';
|
||||
blog_info("xtal_mode is %s\r\n", xtal_mode);
|
||||
@@ -505,7 +505,7 @@ break_scan:
|
||||
log_buf_int8(poweroffset, sizeof(poweroffset));
|
||||
#ifdef CFG_BLE_ENABLE
|
||||
extern void ble_rf_set_pwr_offset_table(int8_t *poweroffset_table);
|
||||
ble_rf_set_pwr_offset_table(poweroffset);
|
||||
ble_rf_set_pwr_offset_table(poweroffset);
|
||||
#endif
|
||||
//zys phy_powroffset_set(poweroffset);
|
||||
}
|
||||
@@ -608,7 +608,7 @@ break_scan:
|
||||
log_buf_int8(poweroffset, sizeof(poweroffset));
|
||||
#ifdef CFG_BLE_ENABLE
|
||||
extern void ble_rf_set_pwr_offset_table(int8_t *poweroffset_table);
|
||||
ble_rf_set_pwr_offset_table(poweroffset);
|
||||
ble_rf_set_pwr_offset_table(poweroffset);
|
||||
#endif
|
||||
//zys phy_powroffset_set(poweroffset);
|
||||
}
|
||||
@@ -671,7 +671,7 @@ static int update_ap_field(const void *fdt, int wifi_offset, const char *name)
|
||||
int countindex = 0, lentmp = 0;
|
||||
const char *result = 0;
|
||||
const uint8_t *addr_prop = 0;
|
||||
|
||||
|
||||
/* set ssid pwd */
|
||||
uint8_t ap_ssid[32];
|
||||
uint8_t ap_ssid_len = 0;
|
||||
@@ -764,8 +764,8 @@ static int update_rf_temp_field(const void *fdt, int wifi_offset, const char *na
|
||||
}
|
||||
|
||||
addr_prop = fdt_getprop(fdt, offset1, "Tchannels", &lentmp);
|
||||
if (lentmp == TCAL_PARA_CHANNELS*4) {
|
||||
memcpy(tmp, addr_prop, TCAL_PARA_CHANNELS*4);
|
||||
if (lentmp == TCAL_PARA_CHANNELS*4) {
|
||||
memcpy(tmp, addr_prop, TCAL_PARA_CHANNELS*4);
|
||||
blog_info_user(dts, "Tchannels:");
|
||||
for (i = 0; i < TCAL_PARA_CHANNELS; i++){
|
||||
tcal_param_tmp.Tchannels[i]=fdt32_to_cpu(tmp[i]);
|
||||
@@ -778,8 +778,8 @@ static int update_rf_temp_field(const void *fdt, int wifi_offset, const char *na
|
||||
}
|
||||
|
||||
addr_prop = fdt_getprop(fdt, offset1, "Tchannel_os", &lentmp);
|
||||
if (lentmp == TCAL_PARA_CHANNELS*4) {
|
||||
memcpy(tmp, addr_prop, TCAL_PARA_CHANNELS*4);
|
||||
if (lentmp == TCAL_PARA_CHANNELS*4) {
|
||||
memcpy(tmp, addr_prop, TCAL_PARA_CHANNELS*4);
|
||||
blog_info_user(dts, "Tchannel_os:");
|
||||
for (i = 0; i < TCAL_PARA_CHANNELS; i++){
|
||||
tcal_param_tmp.Tchannel_os[i]=fdt32_to_cpu(tmp[i]);
|
||||
@@ -792,8 +792,8 @@ static int update_rf_temp_field(const void *fdt, int wifi_offset, const char *na
|
||||
}
|
||||
|
||||
addr_prop = fdt_getprop(fdt, offset1, "Tchannel_os_low", &lentmp);
|
||||
if (lentmp == TCAL_PARA_CHANNELS*4) {
|
||||
memcpy(tmp, addr_prop, TCAL_PARA_CHANNELS*4);
|
||||
if (lentmp == TCAL_PARA_CHANNELS*4) {
|
||||
memcpy(tmp, addr_prop, TCAL_PARA_CHANNELS*4);
|
||||
blog_info_user(dts, "Tchannel_os_low:");
|
||||
for (i = 0; i < TCAL_PARA_CHANNELS; i++){
|
||||
tcal_param_tmp.Tchannel_os_low[i]=fdt32_to_cpu(tmp[i]);
|
||||
@@ -828,7 +828,7 @@ static int hal_board_load_rftv_info(uint32_t rftlv_addr)
|
||||
int8_t pwr_table[24];
|
||||
|
||||
int pwr_table_ble = 0;
|
||||
|
||||
|
||||
if (!rftlv_valid(rftlv_addr)) {
|
||||
return -2;
|
||||
}
|
||||
@@ -910,7 +910,7 @@ static int hal_board_load_rftv_info(uint32_t rftlv_addr)
|
||||
#endif
|
||||
|
||||
vPortFree(p_buffer);
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -102,7 +102,7 @@ uint32_t hal_boot2_get_flash_addr(void)
|
||||
{
|
||||
extern uint8_t __boot2_flashCfg_src;
|
||||
|
||||
return (uint32_t)(&__boot2_flashCfg_src +
|
||||
return (uint32_t)(&__boot2_flashCfg_src +
|
||||
(sizeof(boot2_partition_table.table.ptEntries[0]) * boot2_partition_table.table.ptTable.entryCnt));
|
||||
}
|
||||
|
||||
@@ -247,12 +247,12 @@ uint8_t hal_boot2_get_active_partition(void)
|
||||
return boot2_partition_table.partition_active_idx;
|
||||
}
|
||||
|
||||
int hal_boot2_get_active_entries_byname(uint8_t *name, HALPartition_Entry_Config *ptEntry_hal)
|
||||
int hal_boot2_get_active_entries_byname(uint8_t *name, HALPartition_Entry_Config *ptEntry_hal)
|
||||
{
|
||||
PtTable_Entry_Config *ptEntry = (PtTable_Entry_Config*)ptEntry_hal;
|
||||
if (PtTable_Get_Active_Entries_By_Name(&boot2_partition_table.table, name, ptEntry)) {
|
||||
return -1;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -286,7 +286,7 @@ int hal_boot2_init(void)
|
||||
}
|
||||
|
||||
#if 0
|
||||
#define PT_OTA_TYPE_NAME "FW"
|
||||
#define PT_OTA_TYPE_NAME "FW"
|
||||
#define PT_MEDIA_TYPE_NAME "mfg"
|
||||
void hal_update_mfg_ptable(void)
|
||||
{
|
||||
@@ -298,14 +298,14 @@ void hal_update_mfg_ptable(void)
|
||||
if (0 == hal_boot2_get_active_entries_byname((uint8_t *)PT_OTA_TYPE_NAME, (HALPartition_Entry_Config *)(&ptEntry_fw))) { // ota
|
||||
if (0 == hal_boot2_get_active_entries_byname((uint8_t *)PT_MEDIA_TYPE_NAME, (HALPartition_Entry_Config *)(&ptEntry_media))) { // media
|
||||
if (ptEntry_fw.Address[1] == ptEntry_media.Address[0]) {
|
||||
|
||||
|
||||
memset(ptEntry_media.name, 0, sizeof(ptEntry_media.name));
|
||||
PtTable_Update_Entry(NULL, !boot2_partition_table.partition_active_idx, &boot2_partition_table.table, &ptEntry_media);
|
||||
|
||||
|
||||
printf("===== update mfg partition =====\r\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
printf("====================\r\n");
|
||||
printf("update mfg table.\r\n");
|
||||
|
||||
@@ -60,9 +60,9 @@ typedef enum {
|
||||
/**
|
||||
* @brief Error type definition
|
||||
*/
|
||||
typedef enum
|
||||
typedef enum
|
||||
{
|
||||
HAL_SUCCESS = 0,
|
||||
HAL_SUCCESS = 0,
|
||||
HAL_ERROR = 1,
|
||||
} HAL_Err_Type;
|
||||
|
||||
|
||||
@@ -332,9 +332,9 @@ void emac_irq_process(void)
|
||||
EMAC_ID_Type emacId = EMAC_USED_ID;
|
||||
uint32_t tmpVal;
|
||||
uint32_t EMACx = emacAddr[emacId];
|
||||
|
||||
|
||||
tmpVal = BL_RD_REG(EMACx,EMAC_INT_MASK);
|
||||
|
||||
|
||||
if (SET == EMAC_GetIntStatus(emacId,EMAC_INT_TX_DONE) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_TXB_M)) {
|
||||
EMAC_ClrIntStatus(emacId,EMAC_INT_TX_DONE);
|
||||
EMAC_IntMask(emacId, EMAC_INT_TX_DONE, MASK);
|
||||
@@ -499,7 +499,7 @@ int emac_bd_tx_enqueue(uint32_t flags, uint32_t len, const uint8_t *data_in)
|
||||
}
|
||||
|
||||
/* following two lines is for cache test since tmpbuf is in cache range */
|
||||
//ARCH_MemCpy_Fast(tmpbuf, data_in, len);
|
||||
//ARCH_MemCpy_Fast(tmpbuf, data_in, len);
|
||||
//DMADesc->Buffer = (uint32_t)tmpbuf;
|
||||
#ifdef EMAC_DO_FLUSH_DATA
|
||||
if(L1C_Is_DCache_Range((uintptr_t)DMADesc->Buffer)){
|
||||
|
||||
@@ -83,7 +83,7 @@ static void uart_dev_setdef(uart_dev_t **pdev, uint8_t id)
|
||||
|
||||
(*pdev)->port = id;
|
||||
(*pdev)->read_block_flag = UART_READ_CFG_NOBLOCK;
|
||||
|
||||
|
||||
(*pdev)->config.baud_rate = 2000000;
|
||||
(*pdev)->config.data_width = DATA_WIDTH_8BIT;
|
||||
(*pdev)->config.parity = NO_PARITY;
|
||||
@@ -231,7 +231,7 @@ int32_t hal_uart_send(uart_dev_t *uart, const void *data, uint32_t size, uint32_
|
||||
|
||||
int32_t hal_uart_send_flush(uart_dev_t *uart, uint32_t timeout)
|
||||
{
|
||||
bl_uart_flush(uart->port);
|
||||
bl_uart_flush(uart->port);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -141,7 +141,7 @@ static int adc_get_channel_by_gpio(GLB_GPIO_Type pin)
|
||||
case GLB_GPIO_PIN_40:
|
||||
channel = 5;
|
||||
break;
|
||||
|
||||
|
||||
default :
|
||||
channel = -1;
|
||||
break;
|
||||
@@ -170,7 +170,7 @@ static void adc_freq_init(hosal_adc_sample_mode_t mode, uint32_t freq)
|
||||
}
|
||||
|
||||
if (div > 64) {
|
||||
div = 64;
|
||||
div = 64;
|
||||
}
|
||||
|
||||
/*adc clk can not more than 2M*/
|
||||
@@ -201,7 +201,7 @@ static void adc_dma_lli_init(DMA_LLI_Ctrl_Type *pstlli, uint32_t *buf, uint32_t
|
||||
|
||||
pstlli[0].srcDmaAddr = GPIP_BASE+GPIP_GPADC_DMA_RDATA_OFFSET;
|
||||
pstlli[0].destDmaAddr = (uint32_t)&buf[0];
|
||||
pstlli[0].nextLLI = (uint32_t)&pstlli[1];
|
||||
pstlli[0].nextLLI = (uint32_t)&pstlli[1];
|
||||
pstlli[0].dmaCtrl= dma_ctrl_reg;
|
||||
|
||||
pstlli[1].srcDmaAddr = GPIP_BASE+GPIP_GPADC_DMA_RDATA_OFFSET;
|
||||
@@ -219,7 +219,7 @@ static int adc_dma_init(hosal_adc_dev_t *adc, uint32_t data_num)
|
||||
.srcPeriph = DMA_REQ_GPADC_RX,
|
||||
.dstPeriph = DMA_REQ_NONE,
|
||||
};
|
||||
|
||||
|
||||
hosal_adc_ctx_t *pstctx = (hosal_adc_ctx_t *)adc->priv;
|
||||
|
||||
if (data_num < 1) {
|
||||
@@ -262,7 +262,7 @@ static void adc_init(hosal_adc_dev_t *adc)
|
||||
{
|
||||
int i, chan;
|
||||
uint8_t channel_table[ADC_CHANNEL_MAX] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11};
|
||||
|
||||
|
||||
hosal_adc_sample_mode_t mode = adc->config.mode;
|
||||
GLB_GPIO_Type pin = adc->config.pin;
|
||||
|
||||
@@ -301,7 +301,7 @@ static void adc_init(hosal_adc_dev_t *adc)
|
||||
ADC_Reset();
|
||||
|
||||
ADC_Init(&adccfg);
|
||||
|
||||
|
||||
if (mode == HOSAL_ADC_ONE_SHOT) {
|
||||
for (i = 0; i < ADC_CHANNEL_MAX; i++) {
|
||||
pos_chlist_single[i] = channel_table[i];;
|
||||
@@ -309,7 +309,7 @@ static void adc_init(hosal_adc_dev_t *adc)
|
||||
}
|
||||
|
||||
ADC_Scan_Channel_Config(pos_chlist_single, neg_chlist_single, ADC_CHANNEL_MAX, ENABLE);
|
||||
}
|
||||
}
|
||||
else {
|
||||
chan = adc_get_channel_by_gpio(pin);
|
||||
ADC_Channel_Config(chan, ADC_CHAN_GND, ENABLE);
|
||||
@@ -340,7 +340,7 @@ static int adc_parse_data(uint32_t *parr, int data_size, int channel)
|
||||
|
||||
return data;
|
||||
}
|
||||
}
|
||||
}
|
||||
blog_error("error!\r\n");
|
||||
return -1;
|
||||
}
|
||||
@@ -366,7 +366,7 @@ int hosal_adc_init(hosal_adc_dev_t *adc)
|
||||
blog_error("pin is error!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
pstctx = (hosal_adc_ctx_t *)pvPortMalloc(sizeof(hosal_adc_ctx_t));
|
||||
if (NULL == pstctx) {
|
||||
blog_error("not have enough memory!\r\n");
|
||||
@@ -381,7 +381,7 @@ int hosal_adc_init(hosal_adc_dev_t *adc)
|
||||
blog_error("illegal freq. for mode0, freq 20HZ ~ 1250HZ \r\n");
|
||||
return -1;
|
||||
}
|
||||
/* init gpio */
|
||||
/* init gpio */
|
||||
GLB_GPIO_Func_Init(GPIO_FUN_ANALOG, &pin, 1);
|
||||
|
||||
/* init freq */
|
||||
@@ -393,7 +393,7 @@ int hosal_adc_init(hosal_adc_dev_t *adc)
|
||||
blog_error("not support continue mode!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
pgdevice = adc;
|
||||
|
||||
return 0;
|
||||
@@ -450,22 +450,22 @@ int hosal_adc_value_get(hosal_adc_dev_t *adc, uint32_t channel, uint32_t timeout
|
||||
{
|
||||
int val = -1;
|
||||
hosal_adc_ctx_t *pstctx = (hosal_adc_ctx_t *)adc->priv;
|
||||
|
||||
|
||||
if (NULL == adc) {
|
||||
blog_error("parameter is error!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (channel > 11) {
|
||||
blog_error("channel is error!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (((1 << channel) & pstctx->chan_init_table) == 0) {
|
||||
blog_error("channel = %d not init as adc \r\n", channel);
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
if (pstctx->channel_data == NULL) {
|
||||
blog_error("adc sampling not finish. \r\n");
|
||||
return -1;
|
||||
@@ -479,13 +479,13 @@ int hosal_adc_value_get(hosal_adc_dev_t *adc, uint32_t channel, uint32_t timeout
|
||||
}
|
||||
vTaskDelay(1);
|
||||
}
|
||||
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
int hosal_adc_tsen_value_get(hosal_adc_dev_t *adc)
|
||||
{
|
||||
blog_error("not support now!\r\n");
|
||||
blog_error("not support now!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
@@ -503,7 +503,7 @@ int hosal_adc_start(hosal_adc_dev_t *adc, void *data, uint32_t size)
|
||||
|
||||
int hosal_adc_stop(hosal_adc_dev_t *adc)
|
||||
{
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int hosal_adc_finalize(hosal_adc_dev_t *adc)
|
||||
|
||||
@@ -79,7 +79,7 @@ static void __dma_irq_process(void *p_arg)
|
||||
pfn = gp_hosal_dma_dev->used_chan[ch].callback;
|
||||
parg = gp_hosal_dma_dev->used_chan[ch].p_arg;
|
||||
if (pfn) {
|
||||
pfn(parg, HOSAL_DMA_INT_TRANS_COMPLETE);
|
||||
pfn(parg, HOSAL_DMA_INT_TRANS_COMPLETE);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -94,7 +94,7 @@ static void __dma_irq_process(void *p_arg)
|
||||
pfn = gp_hosal_dma_dev->used_chan[ch].callback;
|
||||
parg = gp_hosal_dma_dev->used_chan[ch].p_arg;
|
||||
if (pfn) {
|
||||
pfn(parg, HOSAL_DMA_INT_TRANS_ERROR);
|
||||
pfn(parg, HOSAL_DMA_INT_TRANS_ERROR);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -144,16 +144,16 @@ static void hosal_spi_gpio_init(hosal_spi_dev_t *arg)
|
||||
GLB_GPIO_Func_Init(GPIO_FUN_SPI0, gpiopins, sizeof(gpiopins)/sizeof(gpiopins[0]));
|
||||
|
||||
if (arg->config.mode == 0) {
|
||||
if(arg->port == SPI0_ID) {
|
||||
GLB_Set_MCU_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_MASTER);
|
||||
} else {
|
||||
GLB_Set_DSP_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_MASTER);
|
||||
if(arg->port == SPI0_ID) {
|
||||
GLB_Set_MCU_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_MASTER);
|
||||
} else {
|
||||
GLB_Set_DSP_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_MASTER);
|
||||
}
|
||||
} else {
|
||||
if(arg->port == SPI0_ID) {
|
||||
GLB_Set_MCU_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_SLAVE);
|
||||
} else {
|
||||
GLB_Set_DSP_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_SLAVE);
|
||||
if(arg->port == SPI0_ID) {
|
||||
GLB_Set_MCU_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_SLAVE);
|
||||
} else {
|
||||
GLB_Set_DSP_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_SLAVE);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -103,11 +103,11 @@ static void __uart_rx_dma_irq(void *p_arg, uint32_t flag)
|
||||
hosal_uart_dev_t *uart = (hosal_uart_dev_t *)p_arg;
|
||||
|
||||
if (flag != HOSAL_DMA_INT_TRANS_COMPLETE) {
|
||||
blog_error("DMA RX TRANS ERROR\r\n");
|
||||
blog_error("DMA RX TRANS ERROR\r\n");
|
||||
}
|
||||
|
||||
if (uart->rxdma_cb) {
|
||||
uart->rxdma_cb(uart->p_rxdma_arg);
|
||||
uart->rxdma_cb(uart->p_rxdma_arg);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -116,34 +116,34 @@ static void __uart_tx_dma_irq(void *p_arg, uint32_t flag)
|
||||
hosal_uart_dev_t *uart = (hosal_uart_dev_t *)p_arg;
|
||||
|
||||
if (flag != HOSAL_DMA_INT_TRANS_COMPLETE) {
|
||||
blog_error("DMA TX TRANS ERROR\r\n");
|
||||
blog_error("DMA TX TRANS ERROR\r\n");
|
||||
}
|
||||
|
||||
if (uart->txdma_cb) {
|
||||
uart->txdma_cb(uart->p_txdma_arg);
|
||||
uart->txdma_cb(uart->p_txdma_arg);
|
||||
}
|
||||
}
|
||||
|
||||
static int __uart_dma_txcfg(hosal_uart_dev_t *uart, hosal_uart_dma_cfg_t *dma_cfg)
|
||||
{
|
||||
if (dma_cfg->dma_buf == NULL || dma_cfg->dma_buf_size == 0) {
|
||||
return -1;
|
||||
}
|
||||
DMA_Channel_Cfg_Type txchCfg = {
|
||||
(uint32_t)dma_cfg->dma_buf,
|
||||
g_uart_addr[uart->port] + UART_FIFO_WDATA_OFFSET,
|
||||
dma_cfg->dma_buf_size,
|
||||
DMA_TRNS_M2P,
|
||||
DMA_CH0,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_BURST_SIZE_4,
|
||||
DMA_BURST_SIZE_4,
|
||||
DMA_MINC_ENABLE,
|
||||
DMA_PINC_DISABLE,
|
||||
DMA_REQ_NONE,
|
||||
DMA_REQ_UART0_TX,
|
||||
};
|
||||
if (dma_cfg->dma_buf == NULL || dma_cfg->dma_buf_size == 0) {
|
||||
return -1;
|
||||
}
|
||||
DMA_Channel_Cfg_Type txchCfg = {
|
||||
(uint32_t)dma_cfg->dma_buf,
|
||||
g_uart_addr[uart->port] + UART_FIFO_WDATA_OFFSET,
|
||||
dma_cfg->dma_buf_size,
|
||||
DMA_TRNS_M2P,
|
||||
DMA_CH0,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_BURST_SIZE_4,
|
||||
DMA_BURST_SIZE_4,
|
||||
DMA_MINC_ENABLE,
|
||||
DMA_PINC_DISABLE,
|
||||
DMA_REQ_NONE,
|
||||
DMA_REQ_UART0_TX,
|
||||
};
|
||||
UART_FifoCfg_Type fifoCfg =
|
||||
{
|
||||
.txFifoDmaThreshold = 0x10,
|
||||
@@ -153,52 +153,52 @@ static int __uart_dma_txcfg(hosal_uart_dev_t *uart, hosal_uart_dma_cfg_t *dma_cf
|
||||
};
|
||||
|
||||
if (uart->dma_tx_chan >= 0) {
|
||||
DMA_Channel_Update_SrcMemcfg(uart->dma_tx_chan,
|
||||
(uint32_t)dma_cfg->dma_buf, dma_cfg->dma_buf_size);
|
||||
return 0;
|
||||
DMA_Channel_Update_SrcMemcfg(uart->dma_tx_chan,
|
||||
(uint32_t)dma_cfg->dma_buf, dma_cfg->dma_buf_size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
uart->dma_tx_chan = hosal_dma_chan_request(0);
|
||||
if (uart->dma_tx_chan < 0) {
|
||||
blog_error("dma_tx_chan request failed !\r\n");
|
||||
return -1;
|
||||
}
|
||||
uart->dma_tx_chan = hosal_dma_chan_request(0);
|
||||
if (uart->dma_tx_chan < 0) {
|
||||
blog_error("dma_tx_chan request failed !\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
hosal_dma_chan_stop(uart->dma_tx_chan);
|
||||
hosal_dma_chan_stop(uart->dma_tx_chan);
|
||||
|
||||
/* FIFO Config*/
|
||||
fifoCfg.rxFifoDmaEnable = (uart->dma_rx_chan < 0) ? DISABLE : ENABLE;
|
||||
fifoCfg.rxFifoDmaEnable = (uart->dma_rx_chan < 0) ? DISABLE : ENABLE;
|
||||
UART_FifoConfig(uart->port, &fifoCfg);
|
||||
|
||||
txchCfg.ch = uart->dma_tx_chan;
|
||||
txchCfg.dstPeriph = (uart->port == 0) ? DMA_REQ_UART0_TX : DMA_REQ_UART1_TX;
|
||||
DMA_Channel_Init(&txchCfg);
|
||||
hosal_dma_irq_callback_set(uart->dma_tx_chan, __uart_tx_dma_irq, (void *)uart);
|
||||
txchCfg.ch = uart->dma_tx_chan;
|
||||
txchCfg.dstPeriph = (uart->port == 0) ? DMA_REQ_UART0_TX : DMA_REQ_UART1_TX;
|
||||
DMA_Channel_Init(&txchCfg);
|
||||
hosal_dma_irq_callback_set(uart->dma_tx_chan, __uart_tx_dma_irq, (void *)uart);
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __uart_dma_rxcfg(hosal_uart_dev_t *uart, hosal_uart_dma_cfg_t *dma_cfg)
|
||||
{
|
||||
if (dma_cfg->dma_buf == NULL || dma_cfg->dma_buf_size == 0) {
|
||||
return -1;
|
||||
}
|
||||
if (dma_cfg->dma_buf == NULL || dma_cfg->dma_buf_size == 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
DMA_Channel_Cfg_Type rxchCfg = {
|
||||
g_uart_addr[uart->port] + UART_FIFO_RDATA_OFFSET,
|
||||
(uint32_t)dma_cfg->dma_buf,
|
||||
dma_cfg->dma_buf_size,
|
||||
DMA_TRNS_P2M,
|
||||
DMA_CH0,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_BURST_SIZE_16,
|
||||
DMA_BURST_SIZE_16,
|
||||
DMA_PINC_DISABLE,
|
||||
DMA_MINC_ENABLE,
|
||||
DMA_REQ_UART0_RX,
|
||||
DMA_REQ_NONE,
|
||||
};
|
||||
DMA_Channel_Cfg_Type rxchCfg = {
|
||||
g_uart_addr[uart->port] + UART_FIFO_RDATA_OFFSET,
|
||||
(uint32_t)dma_cfg->dma_buf,
|
||||
dma_cfg->dma_buf_size,
|
||||
DMA_TRNS_P2M,
|
||||
DMA_CH0,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_TRNS_WIDTH_8BITS,
|
||||
DMA_BURST_SIZE_16,
|
||||
DMA_BURST_SIZE_16,
|
||||
DMA_PINC_DISABLE,
|
||||
DMA_MINC_ENABLE,
|
||||
DMA_REQ_UART0_RX,
|
||||
DMA_REQ_NONE,
|
||||
};
|
||||
UART_FifoCfg_Type fifoCfg =
|
||||
{
|
||||
.txFifoDmaThreshold = 0x10,
|
||||
@@ -208,30 +208,30 @@ static int __uart_dma_rxcfg(hosal_uart_dev_t *uart, hosal_uart_dma_cfg_t *dma_cf
|
||||
};
|
||||
|
||||
if (uart->dma_rx_chan >= 0) {
|
||||
DMA_Channel_Update_DstMemcfg(uart->dma_rx_chan,
|
||||
(uint32_t)dma_cfg->dma_buf, dma_cfg->dma_buf_size);
|
||||
return 0;
|
||||
DMA_Channel_Update_DstMemcfg(uart->dma_rx_chan,
|
||||
(uint32_t)dma_cfg->dma_buf, dma_cfg->dma_buf_size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
uart->dma_rx_chan = hosal_dma_chan_request(0);
|
||||
if (uart->dma_rx_chan < 0) {
|
||||
blog_error("dma_rx_chan request failed !\r\n");
|
||||
return -1;
|
||||
}
|
||||
uart->dma_rx_chan = hosal_dma_chan_request(0);
|
||||
if (uart->dma_rx_chan < 0) {
|
||||
blog_error("dma_rx_chan request failed !\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
hosal_dma_chan_stop(uart->dma_rx_chan);
|
||||
hosal_dma_chan_stop(uart->dma_rx_chan);
|
||||
|
||||
/* FIFO Config*/
|
||||
fifoCfg.txFifoDmaEnable = (uart->dma_tx_chan < 0) ? DISABLE : ENABLE;
|
||||
fifoCfg.txFifoDmaEnable = (uart->dma_tx_chan < 0) ? DISABLE : ENABLE;
|
||||
UART_FifoConfig(uart->port, &fifoCfg);
|
||||
|
||||
rxchCfg.ch = uart->dma_rx_chan;
|
||||
rxchCfg.srcPeriph = (uart->port == 0) ? DMA_REQ_UART0_RX : DMA_REQ_UART1_RX;
|
||||
rxchCfg.ch = uart->dma_rx_chan;
|
||||
rxchCfg.srcPeriph = (uart->port == 0) ? DMA_REQ_UART0_RX : DMA_REQ_UART1_RX;
|
||||
|
||||
DMA_Channel_Init(&rxchCfg);
|
||||
hosal_dma_irq_callback_set(uart->dma_rx_chan, __uart_rx_dma_irq, (void *)uart);
|
||||
DMA_Channel_Init(&rxchCfg);
|
||||
hosal_dma_irq_callback_set(uart->dma_rx_chan, __uart_rx_dma_irq, (void *)uart);
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
static void __uart_config_set(hosal_uart_dev_t *uart, const hosal_uart_config_t *cfg)
|
||||
@@ -258,17 +258,17 @@ static void __uart_config_set(hosal_uart_dev_t *uart, const hosal_uart_config_t
|
||||
uartCfg.parity = (UART_Parity_Type)cfg->parity;
|
||||
|
||||
if (cfg->flow_control == HOSAL_FLOW_CONTROL_CTS) {
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
} else if (cfg->flow_control == HOSAL_FLOW_CONTROL_RTS) {
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
} else if (cfg->flow_control == HOSAL_FLOW_CONTROL_CTS_RTS) {
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
} else {
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
}
|
||||
|
||||
//uartCfg.uartClk = (160 * 1000 * 1000) / (uart_div + 1);
|
||||
@@ -280,12 +280,12 @@ static void __uart_config_set(hosal_uart_dev_t *uart, const hosal_uart_config_t
|
||||
UART_Init(id, &uartCfg);
|
||||
#endif
|
||||
if (cfg->mode == HOSAL_UART_MODE_INT) {
|
||||
bl_uart_int_tx_notify_register(uart->port, __uart_tx_irq, uart);
|
||||
bl_uart_int_rx_notify_register(uart->port, __uart_rx_irq, uart);
|
||||
bl_uart_int_enable(uart->port);
|
||||
bl_uart_int_tx_disable(uart->port);
|
||||
bl_uart_int_tx_notify_register(uart->port, __uart_tx_irq, uart);
|
||||
bl_uart_int_rx_notify_register(uart->port, __uart_rx_irq, uart);
|
||||
bl_uart_int_enable(uart->port);
|
||||
bl_uart_int_tx_disable(uart->port);
|
||||
} else {
|
||||
bl_uart_int_disable(uart->port);
|
||||
bl_uart_int_disable(uart->port);
|
||||
}
|
||||
|
||||
/* Enable uart */
|
||||
@@ -341,17 +341,17 @@ int hosal_uart_init(hosal_uart_dev_t *uart)
|
||||
uartCfg.parity = (UART_Parity_Type)cfg->parity;
|
||||
|
||||
if (cfg->flow_control == HOSAL_FLOW_CONTROL_CTS) {
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
} else if (cfg->flow_control == HOSAL_FLOW_CONTROL_RTS) {
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
} else if (cfg->flow_control == HOSAL_FLOW_CONTROL_CTS_RTS) {
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
uartCfg.ctsFlowControl = 1;
|
||||
uartCfg.rtsSoftwareControl = 1;
|
||||
} else {
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
uartCfg.ctsFlowControl = 0;
|
||||
uartCfg.rtsSoftwareControl = 0;
|
||||
}
|
||||
|
||||
//uartCfg.uartClk = (40 * 1000 * 1000) / (uart_div + 1);
|
||||
@@ -376,12 +376,12 @@ int hosal_uart_init(hosal_uart_dev_t *uart)
|
||||
UART_FifoConfig(id, &fifoCfg);
|
||||
|
||||
if (cfg->mode == HOSAL_UART_MODE_INT) {
|
||||
bl_uart_int_tx_notify_register(uart->port, __uart_tx_irq, uart);
|
||||
bl_uart_int_rx_notify_register(uart->port, __uart_rx_irq, uart);
|
||||
bl_uart_int_enable(uart->port);
|
||||
bl_uart_int_tx_disable(uart->port);
|
||||
bl_uart_int_tx_notify_register(uart->port, __uart_tx_irq, uart);
|
||||
bl_uart_int_rx_notify_register(uart->port, __uart_rx_irq, uart);
|
||||
bl_uart_int_enable(uart->port);
|
||||
bl_uart_int_tx_disable(uart->port);
|
||||
} else {
|
||||
bl_uart_int_disable(uart->port);
|
||||
bl_uart_int_disable(uart->port);
|
||||
}
|
||||
|
||||
/* Enable uart */
|
||||
@@ -418,7 +418,7 @@ int hosal_uart_send(hosal_uart_dev_t *uart, const void *data, uint32_t size)
|
||||
int hosal_uart_ioctl(hosal_uart_dev_t *uart, int ctl, void *p_arg)
|
||||
{
|
||||
#if 0
|
||||
hosal_uart_dma_cfg_t *dma_cfg;
|
||||
hosal_uart_dma_cfg_t *dma_cfg;
|
||||
#endif
|
||||
|
||||
switch (ctl) {
|
||||
@@ -490,26 +490,26 @@ int hosal_uart_ioctl(hosal_uart_dev_t *uart, int ctl, void *p_arg)
|
||||
bl_uart_flush(uart->port);
|
||||
break;
|
||||
case HOSAL_UART_TX_TRIGGER_ON:
|
||||
bl_uart_int_tx_enable(uart->port);
|
||||
break;
|
||||
bl_uart_int_tx_enable(uart->port);
|
||||
break;
|
||||
case HOSAL_UART_TX_TRIGGER_OFF:
|
||||
bl_uart_int_tx_disable(uart->port);
|
||||
break;
|
||||
bl_uart_int_tx_disable(uart->port);
|
||||
break;
|
||||
#if 0
|
||||
case HOSAL_UART_DMA_TX_START:
|
||||
dma_cfg = (hosal_uart_dma_cfg_t *)p_arg;
|
||||
if (__uart_dma_txcfg(uart, dma_cfg) != 0) {
|
||||
return -1;
|
||||
}
|
||||
hosal_dma_chan_start(uart->dma_tx_chan);
|
||||
break;
|
||||
dma_cfg = (hosal_uart_dma_cfg_t *)p_arg;
|
||||
if (__uart_dma_txcfg(uart, dma_cfg) != 0) {
|
||||
return -1;
|
||||
}
|
||||
hosal_dma_chan_start(uart->dma_tx_chan);
|
||||
break;
|
||||
case HOSAL_UART_DMA_RX_START:
|
||||
dma_cfg = (hosal_uart_dma_cfg_t *)p_arg;
|
||||
if (__uart_dma_rxcfg(uart, dma_cfg) != 0) {
|
||||
return -1;
|
||||
}
|
||||
hosal_dma_chan_start(uart->dma_rx_chan);
|
||||
break;
|
||||
dma_cfg = (hosal_uart_dma_cfg_t *)p_arg;
|
||||
if (__uart_dma_rxcfg(uart, dma_cfg) != 0) {
|
||||
return -1;
|
||||
}
|
||||
hosal_dma_chan_start(uart->dma_rx_chan);
|
||||
break;
|
||||
#endif
|
||||
default :
|
||||
return -1;
|
||||
@@ -547,10 +547,10 @@ int hosal_uart_finalize(hosal_uart_dev_t *uart)
|
||||
UART_Disable(uart->port, UART_TXRX);
|
||||
#if 0
|
||||
if (uart->dma_rx_chan > 0) {
|
||||
hosal_dma_chan_release(uart->dma_rx_chan);
|
||||
hosal_dma_chan_release(uart->dma_rx_chan);
|
||||
}
|
||||
if (uart->dma_tx_chan > 0) {
|
||||
hosal_dma_chan_release(uart->dma_tx_chan);
|
||||
hosal_dma_chan_release(uart->dma_tx_chan);
|
||||
}
|
||||
#endif
|
||||
return 0;
|
||||
|
||||
@@ -97,7 +97,7 @@ typedef void (*hosal_adc_irq_t)(void *parg);
|
||||
typedef struct {
|
||||
uint8_t port; /**< @brief adc port */
|
||||
hosal_adc_config_t config; /**< @brief adc config */
|
||||
hosal_dma_chan_t dma_chan; /**< @brief adc dma channel */
|
||||
hosal_dma_chan_t dma_chan; /**< @brief adc dma channel */
|
||||
hosal_adc_irq_t cb; /**< @brief adc callback */
|
||||
void *p_arg; /**< @brief p_arg data */
|
||||
void *priv; /**< @brief priv data */
|
||||
@@ -116,9 +116,9 @@ typedef void (*hosal_adc_cb_t)(hosal_adc_event_t event, void *data, uint32_t siz
|
||||
*
|
||||
* @param[in] adc the interface which should be initialised
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_init(hosal_adc_dev_t *adc);
|
||||
|
||||
@@ -128,9 +128,9 @@ int hosal_adc_init(hosal_adc_dev_t *adc);
|
||||
* @param[in] adc the interface which should be sampled
|
||||
* @param[in] channel adc channel
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_add_channel(hosal_adc_dev_t *adc, uint32_t channel);
|
||||
|
||||
@@ -140,18 +140,18 @@ int hosal_adc_add_channel(hosal_adc_dev_t *adc, uint32_t channel);
|
||||
* @param[in] adc the interface which should be sampled
|
||||
* @param[in] channel adc channel
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_remove_channel(hosal_adc_dev_t *adc, uint32_t channel);
|
||||
|
||||
/**
|
||||
* @brief Takes adc device handle from an ADC interface
|
||||
*
|
||||
* @return
|
||||
* - other get adc device success
|
||||
* - NULL if an error occurred with any step
|
||||
* @return
|
||||
* - other get adc device success
|
||||
* - NULL if an error occurred with any step
|
||||
*/
|
||||
hosal_adc_dev_t *hosal_adc_device_get(void);
|
||||
|
||||
@@ -162,9 +162,9 @@ hosal_adc_dev_t *hosal_adc_device_get(void);
|
||||
* @param[in] channel adc channel
|
||||
* @param[in] timeout ms timeout
|
||||
*
|
||||
* @return
|
||||
* - other get adc data success
|
||||
* - -1 if an error occurred with any step
|
||||
* @return
|
||||
* - other get adc data success
|
||||
* - -1 if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_value_get(hosal_adc_dev_t *adc, uint32_t channel, uint32_t timeout);
|
||||
|
||||
@@ -173,9 +173,9 @@ int hosal_adc_value_get(hosal_adc_dev_t *adc, uint32_t channel, uint32_t timeout
|
||||
*
|
||||
* @param[in] adc the interface which should be sampled
|
||||
*
|
||||
* @return
|
||||
* - other get adc data success
|
||||
* - -1 if an error occurred with any step
|
||||
* @return
|
||||
* - other get adc data success
|
||||
* - -1 if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_tsen_value_get(hosal_adc_dev_t *adc);
|
||||
|
||||
@@ -188,9 +188,9 @@ int hosal_adc_tsen_value_get(hosal_adc_dev_t *adc);
|
||||
* adc in cb must be the same pointer with adc pointer passed to hosal_adc_sample_cb_reg
|
||||
* driver must notify upper layer by calling cb if ADC data is ready in HW or memory(DMA)
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_sample_cb_reg(hosal_adc_dev_t *adc, hosal_adc_cb_t cb);
|
||||
|
||||
@@ -201,9 +201,9 @@ int hosal_adc_sample_cb_reg(hosal_adc_dev_t *adc, hosal_adc_cb_t cb);
|
||||
* @param[in] data adc data buffer
|
||||
* @param[in] size data buffer size aligned with resolution (until the next power of two)
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_start(hosal_adc_dev_t *adc, void *data, uint32_t size);
|
||||
|
||||
@@ -212,9 +212,9 @@ int hosal_adc_start(hosal_adc_dev_t *adc, void *data, uint32_t size);
|
||||
*
|
||||
* @param[in] adc the ADC interface
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_stop(hosal_adc_dev_t *adc);
|
||||
|
||||
@@ -223,9 +223,9 @@ int hosal_adc_stop(hosal_adc_dev_t *adc);
|
||||
*
|
||||
* @param[in] adc the interface which should be de-initialised
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_adc_finalize(hosal_adc_dev_t *adc);
|
||||
|
||||
|
||||
@@ -78,9 +78,9 @@ typedef struct {
|
||||
*
|
||||
* @param[in] dac the interface which should be initialised
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_init(hosal_dac_dev_t *dac);
|
||||
|
||||
@@ -89,9 +89,9 @@ int hosal_dac_init(hosal_dac_dev_t *dac);
|
||||
*
|
||||
* @param[in] dac the interface which should be de-initialised
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_finalize(hosal_dac_dev_t *dac);
|
||||
|
||||
@@ -100,9 +100,9 @@ int hosal_dac_finalize(hosal_dac_dev_t *dac);
|
||||
*
|
||||
* @param[in] dac the interface which should be started
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_start(hosal_dac_dev_t *dac);
|
||||
|
||||
@@ -111,9 +111,9 @@ int hosal_dac_start(hosal_dac_dev_t *dac);
|
||||
*
|
||||
* @param[in] dac the interface which should be stopped
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_stop(hosal_dac_dev_t *dac);
|
||||
|
||||
@@ -122,11 +122,11 @@ int hosal_dac_stop(hosal_dac_dev_t *dac);
|
||||
*
|
||||
* @param[in] dac the interface to set value
|
||||
*
|
||||
* @param[in] data the value to output, output unit: μV
|
||||
* @param[in] data the value to output, output unit: μV
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_set_value(hosal_dac_dev_t *dac, uint32_t data);
|
||||
|
||||
@@ -145,23 +145,23 @@ int hosal_dac_get_value(hosal_dac_dev_t *dac);
|
||||
* @param [in] dac the DAC interface
|
||||
* @param [in] callback callback handler
|
||||
* @param [in] arg callback arg
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_dma_cb_reg(hosal_dac_dev_t *dac, hosal_dac_cb_t callback, void *arg);
|
||||
|
||||
/**
|
||||
* @brief DAC use DMA mode
|
||||
*
|
||||
*
|
||||
* @param[in] adc the DAC interface
|
||||
* @param[in] data dac data buffer
|
||||
* @param[in] size data buffer size
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_dma_start(hosal_dac_dev_t *dac, uint32_t *data, uint32_t size);
|
||||
|
||||
@@ -170,9 +170,9 @@ int hosal_dac_dma_start(hosal_dac_dev_t *dac, uint32_t *data, uint32_t size);
|
||||
*
|
||||
* @param[in] dac the interface which should be stopped
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_dac_dma_stop(hosal_dac_dev_t *dac);
|
||||
|
||||
|
||||
@@ -40,11 +40,11 @@ extern "C" {
|
||||
*
|
||||
* @param[in] addr efuse address
|
||||
* @param[in] data store data
|
||||
* @param[in] len data length
|
||||
* @param[in] len data length
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_efuse_read(uint32_t addr, uint32_t *data, uint32_t len);
|
||||
|
||||
@@ -53,11 +53,11 @@ int hosal_efuse_read(uint32_t addr, uint32_t *data, uint32_t len);
|
||||
*
|
||||
* @param[in] addr efuse address
|
||||
* @param[in] data store data
|
||||
* @param[in] len data length
|
||||
* @param[in] len data length
|
||||
*
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
int hosal_efuse_write(uint32_t addr, uint32_t *data, uint32_t len);
|
||||
|
||||
|
||||
@@ -216,7 +216,7 @@ int hosal_flash_raw_write(void *buffer, uint32_t address, uint32_t length);
|
||||
* - 0 On success
|
||||
* - otherwise is error
|
||||
*/
|
||||
int hosal_flash_raw_erase(uint32_t start_addr, uint32_t length);
|
||||
int hosal_flash_raw_erase(uint32_t start_addr, uint32_t length);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
@@ -81,7 +81,7 @@ typedef struct {
|
||||
*
|
||||
* @param[in] i2c the device for which the i2c port should be initialised
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 on success
|
||||
* - EIO if an error occurred with any step
|
||||
*/
|
||||
|
||||
@@ -66,7 +66,7 @@ typedef struct {
|
||||
*
|
||||
* @param[in] pwm the PWM device
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -77,9 +77,9 @@ int hosal_pwm_init(hosal_pwm_dev_t *pwm);
|
||||
*
|
||||
* @param[in] pwm the PWM device
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : fail
|
||||
* - other : fail
|
||||
*/
|
||||
int hosal_pwm_start(hosal_pwm_dev_t *pwm);
|
||||
|
||||
@@ -88,7 +88,7 @@ int hosal_pwm_start(hosal_pwm_dev_t *pwm);
|
||||
*
|
||||
* @param[in] pwm the PWM device
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -100,7 +100,7 @@ int hosal_pwm_stop(hosal_pwm_dev_t *pwm);
|
||||
* @param[in] pwm the PWM device
|
||||
* @param[in] para the para of pwm
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -112,7 +112,7 @@ int hosal_pwm_para_chg(hosal_pwm_dev_t *pwm, hosal_pwm_config_t para);
|
||||
* @param[in] pwm the PWM device
|
||||
* @param[in] freq the PWM frequency (0~40M under limited duty)
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -124,7 +124,7 @@ int hosal_pwm_freq_set(hosal_pwm_dev_t *pwm, uint32_t freq);
|
||||
* @param[in] pwm the PWM device
|
||||
* @param[out] p_freq the pointer to memory frequency
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -136,7 +136,7 @@ int hosal_pwm_freq_get(hosal_pwm_dev_t *pwm, uint32_t *p_freq);
|
||||
* @param[in] pwm the PWM device
|
||||
* @param[in] duty the PWM duty (original duty * 100)
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -148,7 +148,7 @@ int hosal_pwm_duty_set(hosal_pwm_dev_t *pwm, uint32_t duty);
|
||||
* @param[in] pwm the PWM device
|
||||
* @param[out] p_duty the pointer to memory duty(original duty * 100)
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -159,7 +159,7 @@ int hosal_pwm_duty_get(hosal_pwm_dev_t *pwm, uint32_t *p_duty);
|
||||
*
|
||||
* @param[in] pwm the interface which should be de-initialised
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
|
||||
@@ -45,7 +45,7 @@ extern "C" {
|
||||
/**
|
||||
* @brief init rng
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -58,7 +58,7 @@ int hosal_rng_init(void);
|
||||
* in this memory with random numbers after executed
|
||||
* @param[in] bytes Length of the memory buffer (bytes)
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
|
||||
@@ -75,9 +75,9 @@ typedef struct {
|
||||
*
|
||||
* @param[in] rtc rtc device
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : fail
|
||||
* - other : fail
|
||||
*/
|
||||
int hosal_rtc_init(hosal_rtc_dev_t *rtc);
|
||||
|
||||
@@ -87,9 +87,9 @@ int hosal_rtc_init(hosal_rtc_dev_t *rtc);
|
||||
* @param[in] rtc rtc device
|
||||
* @param[in] time pointer to a time structure
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : fail
|
||||
* - other : fail
|
||||
*/
|
||||
int hosal_rtc_set_time(hosal_rtc_dev_t *rtc, const hosal_rtc_time_t *time);
|
||||
|
||||
@@ -99,9 +99,9 @@ int hosal_rtc_set_time(hosal_rtc_dev_t *rtc, const hosal_rtc_time_t *time);
|
||||
* @param[in] rtc rtc device
|
||||
* @param[out] time pointer to a time structure
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : fail
|
||||
* - other : fail
|
||||
*/
|
||||
int hosal_rtc_get_time(hosal_rtc_dev_t *rtc, hosal_rtc_time_t *time);
|
||||
|
||||
@@ -111,9 +111,9 @@ int hosal_rtc_get_time(hosal_rtc_dev_t *rtc, hosal_rtc_time_t *time);
|
||||
* @param[in] rtc rtc device
|
||||
* @param[in] time_stamp new time value
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : fail
|
||||
* - other : fail
|
||||
*/
|
||||
int hosal_rtc_set_count(hosal_rtc_dev_t *rtc, uint64_t *time_stamp);
|
||||
|
||||
@@ -121,11 +121,11 @@ int hosal_rtc_set_count(hosal_rtc_dev_t *rtc, uint64_t *time_stamp);
|
||||
* @brief This function will return the value of time read from the on board CPU real time clock.
|
||||
*
|
||||
* @param[in] rtc rtc device
|
||||
* @param[in] time_stamp new time value
|
||||
* @param[in] time_stamp new time value
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : fail
|
||||
* - other : fail
|
||||
*/
|
||||
int hosal_rtc_get_count(hosal_rtc_dev_t *rtc, uint64_t *time_stamp);
|
||||
|
||||
@@ -134,9 +134,9 @@ int hosal_rtc_get_count(hosal_rtc_dev_t *rtc, uint64_t *time_stamp);
|
||||
*
|
||||
* @param[in] RTC the interface which should be de-initialised
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : fail
|
||||
* - other : fail
|
||||
*/
|
||||
int hosal_rtc_finalize(hosal_rtc_dev_t *rtc);
|
||||
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup hosal_spi SPI
|
||||
/** @addtogroup hosal_spi SPI
|
||||
* HOSAL SPI API
|
||||
*
|
||||
* @{
|
||||
@@ -50,8 +50,8 @@ extern "C" {
|
||||
|
||||
typedef void (*hosal_spi_irq_t)(void *parg); /**< spi irq callback function */
|
||||
|
||||
/**
|
||||
* @brief Define spi config args
|
||||
/**
|
||||
* @brief Define spi config args
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t mode; /**< spi communication mode */
|
||||
@@ -63,7 +63,7 @@ typedef struct {
|
||||
uint8_t pin_miso; /**< spi miso pin */
|
||||
} hosal_spi_config_t;
|
||||
|
||||
/**
|
||||
/**
|
||||
* @brief Define spi dev handle
|
||||
*/
|
||||
typedef struct {
|
||||
@@ -79,8 +79,8 @@ typedef struct {
|
||||
*
|
||||
* @param[in] spi the spi device
|
||||
*
|
||||
* @return
|
||||
* - 0 : on success
|
||||
* @return
|
||||
* - 0 : on success
|
||||
* - other : error
|
||||
*/
|
||||
int hosal_spi_init(hosal_spi_dev_t *spi);
|
||||
@@ -94,8 +94,8 @@ int hosal_spi_init(hosal_spi_dev_t *spi);
|
||||
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
|
||||
* if you want to wait forever
|
||||
*
|
||||
* @return
|
||||
* - 0 : on success
|
||||
* @return
|
||||
* - 0 : on success
|
||||
* - other : error
|
||||
*/
|
||||
int hosal_spi_send(hosal_spi_dev_t *spi, const uint8_t *data, uint32_t size, uint32_t timeout);
|
||||
@@ -109,7 +109,7 @@ int hosal_spi_send(hosal_spi_dev_t *spi, const uint8_t *data, uint32_t size, uin
|
||||
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
|
||||
* if you want to wait forever
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : error
|
||||
*/
|
||||
@@ -125,8 +125,8 @@ int hosal_spi_recv(hosal_spi_dev_t *spi, uint8_t *data, uint16_t size, uint32_t
|
||||
* @param[in] timeout timeout in milisecond, set this value to HAL_WAIT_FOREVER
|
||||
* if you want to wait forever
|
||||
*
|
||||
* @return
|
||||
* - 0 : success
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : error
|
||||
*/
|
||||
int hosal_spi_send_recv(hosal_spi_dev_t *spi, uint8_t *tx_data, uint8_t *rx_data, uint16_t size, uint32_t timeout);
|
||||
@@ -138,7 +138,7 @@ int hosal_spi_send_recv(hosal_spi_dev_t *spi, uint8_t *tx_data, uint8_t *rx_data
|
||||
* @param pfn callback function
|
||||
* @param p_arg callback function parameter
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - othe : error
|
||||
*/
|
||||
@@ -150,7 +150,7 @@ int hosal_spi_irq_callback_set(hosal_spi_dev_t *spi, hosal_spi_irq_t pfn, void *
|
||||
* @param[in] pin cs pin
|
||||
* @param[in] value 0 or 1
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : error
|
||||
*/
|
||||
@@ -162,8 +162,8 @@ int hosal_spi_set_cs(uint8_t pin, uint8_t value);
|
||||
*
|
||||
* @param[in] spi the SPI device to be de-initialised
|
||||
*
|
||||
* @return
|
||||
* - 0 : success
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : error
|
||||
*/
|
||||
int hosal_spi_finalize(hosal_spi_dev_t *spi);
|
||||
|
||||
@@ -48,7 +48,7 @@ extern "C" {
|
||||
typedef void (*hosal_timer_cb_t)(void *arg); /**< Define timer handle function type */
|
||||
|
||||
/**
|
||||
* Define timer config args
|
||||
* Define timer config args
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t period; /**< timer period, us */
|
||||
@@ -57,8 +57,8 @@ typedef struct {
|
||||
void *arg; /**< timer handle args */
|
||||
} hosal_timer_config_t;
|
||||
|
||||
/**
|
||||
* Define timer dev handle
|
||||
/**
|
||||
* Define timer dev handle
|
||||
*/
|
||||
typedef struct {
|
||||
int8_t port; /**< timer port */
|
||||
@@ -71,8 +71,8 @@ typedef struct {
|
||||
*
|
||||
* @param[in] tim timer device
|
||||
*
|
||||
* @return
|
||||
* - 0 : success
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other :error
|
||||
*/
|
||||
int hosal_timer_init(hosal_timer_dev_t *tim);
|
||||
@@ -83,7 +83,7 @@ int hosal_timer_init(hosal_timer_dev_t *tim);
|
||||
* @param[in] tim timer device
|
||||
*
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - 0 : success
|
||||
* - other : error
|
||||
*/
|
||||
int hosal_timer_start(hosal_timer_dev_t *tim);
|
||||
@@ -102,7 +102,7 @@ void hosal_timer_stop(hosal_timer_dev_t *tim);
|
||||
*
|
||||
* @param[in] tim timer device
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other : error
|
||||
*/
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup hosal_wdg WATCHDOG
|
||||
/** @addtogroup hosal_wdg WATCHDOG
|
||||
* HOSAL WATCHDOG API
|
||||
*
|
||||
* @{
|
||||
@@ -65,7 +65,7 @@ typedef struct {
|
||||
*
|
||||
* @param[in] wdg the watch dog device
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
@@ -83,7 +83,7 @@ void hosal_wdg_reload(hosal_wdg_dev_t *wdg);
|
||||
*
|
||||
* @param[in] wdg the watch dog device
|
||||
*
|
||||
* @return
|
||||
* @return
|
||||
* - 0 : success
|
||||
* - other: fail
|
||||
*/
|
||||
|
||||
@@ -30,16 +30,16 @@
|
||||
#include <stdio.h>
|
||||
#include <platform_hal_device.h>
|
||||
|
||||
extern "C" void* operator new(size_t size)
|
||||
extern "C" void* operator new(size_t size)
|
||||
{
|
||||
/* printf("[C++] new %d\r\n", size); */
|
||||
return pvPortMalloc(size);
|
||||
return pvPortMalloc(size);
|
||||
}
|
||||
|
||||
extern "C" void* operator new[](size_t size)
|
||||
extern "C" void* operator new[](size_t size)
|
||||
{
|
||||
/* printf("[C++] new[] %d\r\n", size); */
|
||||
return pvPortMalloc(size);
|
||||
return pvPortMalloc(size);
|
||||
}
|
||||
|
||||
extern "C" void operator delete(void* ptr) {
|
||||
@@ -52,7 +52,7 @@ extern "C" void operator delete[](void* ptr) {
|
||||
vPortFree(ptr);
|
||||
}
|
||||
|
||||
BLLinkedItem::BLLinkedItem()
|
||||
BLLinkedItem::BLLinkedItem()
|
||||
{
|
||||
this->next = NULL;
|
||||
}
|
||||
@@ -81,13 +81,13 @@ BLLinkedItem* BLLinkedItem::detach()
|
||||
return tmp;
|
||||
}
|
||||
|
||||
BLLinkedList::BLLinkedList()
|
||||
BLLinkedList::BLLinkedList()
|
||||
{
|
||||
this->head = NULL;
|
||||
this->tail = NULL;
|
||||
}
|
||||
|
||||
BLLinkedList* BLLinkedList::push(class BLLinkedItem &item)
|
||||
BLLinkedList* BLLinkedList::push(class BLLinkedItem &item)
|
||||
{
|
||||
printf("[BLLinkedList] push %p\r\n", &item);
|
||||
|
||||
@@ -107,7 +107,7 @@ BLLinkedList* BLLinkedList::push(class BLLinkedItem &item)
|
||||
return this;
|
||||
}
|
||||
|
||||
BLLinkedItem* BLLinkedList::pop()
|
||||
BLLinkedItem* BLLinkedList::pop()
|
||||
{
|
||||
BLLinkedItem *item;
|
||||
|
||||
@@ -173,7 +173,7 @@ int BLAesRequest::done_set()
|
||||
int BLAesRequest::done_set_auto()
|
||||
{
|
||||
this->done = 1;
|
||||
//TODO
|
||||
//TODO
|
||||
printf("[C++] [%s] ongoing...\r\n", __PRETTY_FUNCTION__);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -295,9 +295,9 @@ bool tc_sha1()
|
||||
};
|
||||
|
||||
const uint8_t z_2047_expected[][32] = {
|
||||
{0xe3, 0x59, 0x9e, 0xf5, 0x8f, 0x6c, 0x1b, 0x77, 0x66, 0xf0, 0x45, 0x31, 0xb5, 0x01, 0xec, 0x24, 0x97, 0xb2, 0xa8, 0x2e, },
|
||||
{0xe6, 0xdb, 0x06, 0x25, 0xba, 0xb0, 0x0a, 0x65, 0xeb, 0x25, 0xeb, 0xcb, 0xe6, 0xd5, 0xc3, 0xb6, 0x6b, 0x04, 0xad, 0x12, 0xc8, 0x91, 0x25, 0xa3, 0x4e, 0x10, 0xfe, 0x6c, },
|
||||
{0xa6, 0xb4, 0xc4, 0x6a, 0xa0, 0xaa, 0xce, 0x53, 0x8f, 0x48, 0x4c, 0x2c, 0x7d, 0x3c, 0x96, 0x4b, 0x2c, 0x10, 0xb1, 0x95, 0x9b, 0xe4, 0xf9, 0xc6, 0x57, 0xa2, 0x7b, 0x37, 0xb6, 0xe7, 0x00, 0xe5, },
|
||||
{0xe3, 0x59, 0x9e, 0xf5, 0x8f, 0x6c, 0x1b, 0x77, 0x66, 0xf0, 0x45, 0x31, 0xb5, 0x01, 0xec, 0x24, 0x97, 0xb2, 0xa8, 0x2e, },
|
||||
{0xe6, 0xdb, 0x06, 0x25, 0xba, 0xb0, 0x0a, 0x65, 0xeb, 0x25, 0xeb, 0xcb, 0xe6, 0xd5, 0xc3, 0xb6, 0x6b, 0x04, 0xad, 0x12, 0xc8, 0x91, 0x25, 0xa3, 0x4e, 0x10, 0xfe, 0x6c, },
|
||||
{0xa6, 0xb4, 0xc4, 0x6a, 0xa0, 0xaa, 0xce, 0x53, 0x8f, 0x48, 0x4c, 0x2c, 0x7d, 0x3c, 0x96, 0x4b, 0x2c, 0x10, 0xb1, 0x95, 0x9b, 0xe4, 0xf9, 0xc6, 0x57, 0xa2, 0x7b, 0x37, 0xb6, 0xe7, 0x00, 0xe5, },
|
||||
};
|
||||
|
||||
while (1) {
|
||||
|
||||
@@ -3,12 +3,12 @@
|
||||
* @file bflb_bsp_driver_glue.h
|
||||
* @version 0.1
|
||||
* @date 2020-07-08
|
||||
* @brief
|
||||
* @brief
|
||||
* *****************************************************************************
|
||||
* @attention
|
||||
*
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
@@ -19,7 +19,7 @@
|
||||
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
@@ -30,7 +30,7 @@
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* *****************************************************************************
|
||||
*/
|
||||
#ifndef __bBFLB_BSP_DRIVER_GLUE_H__
|
||||
|
||||
@@ -3,12 +3,12 @@
|
||||
* @file bflb_stub.c
|
||||
* @version 0.1
|
||||
* @date 2020-07-08
|
||||
* @brief
|
||||
* @brief
|
||||
* *****************************************************************************
|
||||
* @attention
|
||||
*
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
@@ -19,7 +19,7 @@
|
||||
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
@@ -30,7 +30,7 @@
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* *****************************************************************************
|
||||
*/
|
||||
#include "bflb_stub.h"
|
||||
@@ -157,4 +157,4 @@ void BFLB_BSP_Delay_Ms(uint32_t time)
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -3,12 +3,12 @@
|
||||
* @file bflb_stub.h
|
||||
* @version 0.1
|
||||
* @date 2020-07-08
|
||||
* @brief
|
||||
* @brief
|
||||
* *****************************************************************************
|
||||
* @attention
|
||||
*
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
|
||||
*
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
@@ -19,7 +19,7 @@
|
||||
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
@@ -30,7 +30,7 @@
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*
|
||||
* *****************************************************************************
|
||||
*/
|
||||
#ifndef __BFLB_STUB__
|
||||
@@ -51,4 +51,4 @@ void BFLB_BSP_Set_Alarm_Time(uint64_t time);
|
||||
void BFLB_BSP_Deinit_Time(void);
|
||||
void BFLB_BSP_Delay_Ms(uint32_t time);
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -14,4 +14,4 @@
|
||||
#define ADC_OFFSET_CALIB_EN (0) /*!< Offset calibration enable */
|
||||
#define ADC_OFFSER_CALIB_VAL (0) /*!< Offset calibration value */
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -11,4 +11,4 @@
|
||||
*/
|
||||
#define DAC_REF_RNG_DEFAULT_SELECT (0x3) /*!< ADC 1.8V select */
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -8,4 +8,4 @@
|
||||
#define I2S_FS_INVERT DISABLE
|
||||
#define I2S_BCLK_INVERT DISABLE
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -14,4 +14,4 @@
|
||||
#define UART_FIFO_MAX_LEN 32
|
||||
#define UART_DEFAULT_RTO_TIMEOUT 100
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user