mirror of
https://github.com/RT-Thread/rt-thread.git
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[bsp][stm32][rt-spark] 更新 cubemx ports
This commit is contained in:
zhkag
guo
File diff suppressed because it is too large
Load Diff
@@ -16,6 +16,6 @@ config PKGS_DIR
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../libraries/Kconfig"
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source "board/Kconfig"
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source "$PKGS_DIR/Kconfig"
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File diff suppressed because one or more lines are too long
@@ -1,23 +1,28 @@
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#MicroXplorer Configuration settings - do not modify
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CAD.formats=
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CAD.pinconfig=
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CAD.provider=
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ETH.IPParameters=MediaInterface
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ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
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ETH.MediaInterface=HAL_ETH_RMII_MODE
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FSMC.IPParameters=WriteOperation1
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FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
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File.Version=6
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GPIO.groupedBy=Group By Peripherals
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KeepUserPlacement=false
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Mcu.CPN=STM32F407ZGT6
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Mcu.Family=STM32F4
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Mcu.IP0=DAC
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Mcu.IP1=ETH
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Mcu.IP10=SYS
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Mcu.IP11=TIM2
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Mcu.IP12=TIM4
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Mcu.IP13=TIM11
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Mcu.IP14=TIM13
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Mcu.IP15=TIM14
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Mcu.IP16=USART1
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Mcu.IP17=USART3
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Mcu.IP18=USB_OTG_FS
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Mcu.IP12=TIM3
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Mcu.IP13=TIM4
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Mcu.IP14=TIM11
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Mcu.IP15=TIM13
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Mcu.IP16=TIM14
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Mcu.IP17=USART1
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Mcu.IP18=USART3
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Mcu.IP19=USB_OTG_FS
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Mcu.IP2=FSMC
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Mcu.IP3=IWDG
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Mcu.IP4=NVIC
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@@ -26,120 +31,91 @@ Mcu.IP6=RTC
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Mcu.IP7=SDIO
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Mcu.IP8=SPI1
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Mcu.IP9=SPI2
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Mcu.IPNb=19
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Mcu.IPNb=20
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Mcu.Name=STM32F407Z(E-G)Tx
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Mcu.Package=LQFP144
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Mcu.Pin0=PC14-OSC32_IN
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Mcu.Pin1=PC15-OSC32_OUT
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Mcu.Pin10=PC1
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Mcu.Pin11=PC2
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Mcu.Pin12=PC3
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Mcu.Pin13=PA1
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Mcu.Pin14=PA2
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Mcu.Pin15=PA3
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Mcu.Pin16=PA4
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Mcu.Pin17=PA5
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Mcu.Pin18=PA7
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Mcu.Pin19=PC4
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Mcu.Pin2=PF0
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Mcu.Pin20=PC5
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Mcu.Pin21=PF12
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Mcu.Pin22=PF13
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Mcu.Pin23=PF14
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Mcu.Pin24=PF15
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Mcu.Pin25=PG0
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Mcu.Pin26=PG1
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Mcu.Pin27=PE7
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Mcu.Pin28=PE8
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Mcu.Pin29=PE9
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Mcu.Pin3=PF1
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Mcu.Pin30=PE10
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Mcu.Pin31=PE11
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Mcu.Pin32=PE12
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Mcu.Pin33=PE13
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Mcu.Pin34=PE14
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Mcu.Pin35=PE15
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Mcu.Pin36=PB10
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Mcu.Pin37=PB11
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Mcu.Pin38=PB13
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Mcu.Pin39=PD8
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Mcu.Pin4=PF2
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Mcu.Pin40=PD9
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Mcu.Pin41=PD10
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Mcu.Pin42=PD11
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Mcu.Pin43=PD12
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Mcu.Pin44=PD13
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Mcu.Pin45=PD14
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Mcu.Pin46=PD15
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Mcu.Pin47=PG2
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Mcu.Pin48=PG3
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Mcu.Pin49=PG4
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Mcu.Pin5=PF3
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Mcu.Pin50=PG5
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Mcu.Pin51=PC8
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Mcu.Pin52=PC9
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Mcu.Pin53=PA9
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Mcu.Pin54=PA10
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Mcu.Pin55=PA11
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Mcu.Pin56=PA12
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Mcu.Pin57=PA13
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Mcu.Pin58=PA14
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Mcu.Pin59=PC10
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Mcu.Pin6=PF4
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Mcu.Pin60=PC11
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Mcu.Pin61=PC12
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Mcu.Pin62=PD0
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Mcu.Pin63=PD1
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Mcu.Pin64=PD2
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Mcu.Pin65=PD4
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Mcu.Pin66=PD5
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Mcu.Pin67=PG10
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Mcu.Pin68=PG11
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Mcu.Pin69=PG13
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Mcu.Pin7=PF5
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Mcu.Pin70=PG14
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Mcu.Pin71=PB3
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Mcu.Pin72=PB4
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Mcu.Pin73=PB5
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Mcu.Pin74=PB6
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Mcu.Pin75=PB7
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Mcu.Pin76=PE0
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Mcu.Pin77=PE1
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Mcu.Pin78=VP_IWDG_VS_IWDG
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Mcu.Pin79=VP_RTC_VS_RTC_Activate
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Mcu.Pin8=PH0-OSC_IN
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Mcu.Pin80=VP_SYS_VS_Systick
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Mcu.Pin81=VP_TIM2_VS_ClockSourceINT
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Mcu.Pin82=VP_TIM11_VS_ClockSourceINT
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Mcu.Pin83=VP_TIM13_VS_ClockSourceINT
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Mcu.Pin84=VP_TIM14_VS_ClockSourceINT
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Mcu.Pin9=PH1-OSC_OUT
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Mcu.PinsNb=85
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Mcu.Pin10=PA3
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Mcu.Pin11=PA4
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Mcu.Pin12=PA5
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Mcu.Pin13=PA7
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Mcu.Pin14=PC4
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Mcu.Pin15=PC5
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Mcu.Pin16=PB1
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Mcu.Pin17=PE7
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Mcu.Pin18=PE8
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Mcu.Pin19=PE9
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Mcu.Pin2=PF9
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Mcu.Pin20=PE10
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Mcu.Pin21=PB10
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Mcu.Pin22=PB11
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Mcu.Pin23=PB13
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Mcu.Pin24=PD13
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Mcu.Pin25=PD14
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Mcu.Pin26=PD15
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Mcu.Pin27=PC8
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Mcu.Pin28=PC9
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Mcu.Pin29=PA9
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Mcu.Pin3=PH0-OSC_IN
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Mcu.Pin30=PA10
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Mcu.Pin31=PA11
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Mcu.Pin32=PA12
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Mcu.Pin33=PA13
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Mcu.Pin34=PA14
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Mcu.Pin35=PC10
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Mcu.Pin36=PC11
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Mcu.Pin37=PC12
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Mcu.Pin38=PD0
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Mcu.Pin39=PD1
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Mcu.Pin4=PH1-OSC_OUT
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Mcu.Pin40=PD2
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Mcu.Pin41=PD4
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Mcu.Pin42=PD5
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Mcu.Pin43=PG10
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Mcu.Pin44=PG11
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Mcu.Pin45=PG13
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Mcu.Pin46=PG14
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Mcu.Pin47=PB3
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Mcu.Pin48=PB4
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Mcu.Pin49=PB5
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Mcu.Pin5=PC1
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Mcu.Pin50=PB6
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Mcu.Pin51=PB7
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Mcu.Pin52=VP_IWDG_VS_IWDG
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Mcu.Pin53=VP_RTC_VS_RTC_Activate
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Mcu.Pin54=VP_SYS_VS_Systick
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Mcu.Pin55=VP_TIM2_VS_ClockSourceINT
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Mcu.Pin56=VP_TIM3_VS_ClockSourceINT
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Mcu.Pin57=VP_TIM11_VS_ClockSourceINT
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Mcu.Pin58=VP_TIM13_VS_ClockSourceINT
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Mcu.Pin59=VP_TIM14_VS_ClockSourceINT
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Mcu.Pin6=PC2
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Mcu.Pin7=PC3
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Mcu.Pin8=PA1
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Mcu.Pin9=PA2
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Mcu.PinsNb=60
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Mcu.ThirdPartyNb=0
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Mcu.UserConstants=
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Mcu.UserName=STM32F407ZGTx
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MxCube.Version=6.0.1
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MxDb.Version=DB.6.0.0
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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MxCube.Version=6.9.0
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MxDb.Version=DB.6.0.90
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.ForceEnableDMAVector=true
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true
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NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.OTG_FS_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
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NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
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NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
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NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
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NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
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NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
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NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
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NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
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NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
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NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
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PA1.Mode=RMII
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PA1.Signal=ETH_REF_CLK
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PA9.GPIOParameters=GPIO_PuPd
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PA9.GPIO_PuPd=GPIO_PULLUP
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PA9.Mode=Asynchronous
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PA9.Signal=USART1_TX
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PA10.GPIOParameters=GPIO_PuPd
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PA10.GPIO_PuPd=GPIO_PULLUP
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PA10.Mode=Asynchronous
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@@ -160,6 +136,11 @@ PA5.Locked=true
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PA5.Signal=COMP_DAC2_group
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PA7.Mode=RMII
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PA7.Signal=ETH_CRS_DV
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PA9.GPIOParameters=GPIO_PuPd
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PA9.GPIO_PuPd=GPIO_PULLUP
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PA9.Mode=Asynchronous
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PA9.Signal=USART1_TX
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PB1.Signal=S_TIM3_CH4
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PB10.GPIOParameters=GPIO_PuPd
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PB10.GPIO_PuPd=GPIO_PULLUP
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PB10.Mode=Asynchronous
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@@ -209,9 +190,6 @@ PC9.Mode=SD_4_bits_Wide_bus
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PC9.Signal=SDIO_D1
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PD0.Signal=FSMC_D2_DA2
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PD1.Signal=FSMC_D3_DA3
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PD10.Signal=FSMC_D15_DA15
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PD11.Signal=FSMC_A16_CLE
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PD12.Signal=FSMC_A17_ALE
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PD13.Signal=FSMC_A18
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PD14.Signal=FSMC_D0_DA0
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PD15.Signal=FSMC_D1_DA1
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@@ -219,31 +197,11 @@ PD2.Mode=SD_4_bits_Wide_bus
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PD2.Signal=SDIO_CMD
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PD4.Signal=FSMC_NOE
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PD5.Signal=FSMC_NWE
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PD8.Signal=FSMC_D13_DA13
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PD9.Signal=FSMC_D14_DA14
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PE0.Signal=FSMC_NBL0
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PE1.Signal=FSMC_NBL1
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PE10.Signal=FSMC_D7_DA7
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PE11.Signal=FSMC_D8_DA8
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PE12.Signal=FSMC_D9_DA9
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PE13.Signal=FSMC_D10_DA10
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PE14.Signal=FSMC_D11_DA11
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PE15.Signal=FSMC_D12_DA12
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PE7.Signal=FSMC_D4_DA4
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PE8.Signal=FSMC_D5_DA5
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PE9.Signal=FSMC_D6_DA6
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PF0.Signal=FSMC_A0
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PF1.Signal=FSMC_A1
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PF12.Signal=FSMC_A6
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PF13.Signal=FSMC_A7
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PF14.Signal=FSMC_A8
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PF15.Signal=FSMC_A9
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PF2.Signal=FSMC_A2
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PF3.Signal=FSMC_A3
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PF4.Signal=FSMC_A4
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PF5.Signal=FSMC_A5
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PG0.Signal=FSMC_A10
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PG1.Signal=FSMC_A11
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PF9.Signal=S_TIM14_CH1
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PG10.Mode=NorPsramChipSelect3_1
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PG10.Signal=FSMC_NE3
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PG11.Locked=true
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@@ -255,10 +213,6 @@ PG13.Signal=ETH_TXD0
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PG14.Locked=true
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PG14.Mode=RMII
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PG14.Signal=ETH_TXD1
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||||
PG2.Signal=FSMC_A12
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PG3.Signal=FSMC_A13
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PG4.Signal=FSMC_A14
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PG5.Signal=FSMC_A15
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PH0-OSC_IN.Mode=HSE-External-Oscillator
|
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PH0-OSC_IN.Signal=RCC_OSC_IN
|
||||
PH1-OSC_OUT.Mode=HSE-External-Oscillator
|
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@@ -273,7 +227,7 @@ ProjectManager.CustomerFirmwarePackage=
|
||||
ProjectManager.DefaultFWLocation=true
|
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ProjectManager.DeletePrevious=true
|
||||
ProjectManager.DeviceId=STM32F407ZGTx
|
||||
ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.25.2
|
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ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1
|
||||
ProjectManager.FreePins=false
|
||||
ProjectManager.HalAssertFull=false
|
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ProjectManager.HeapSize=0x200
|
||||
@@ -286,12 +240,15 @@ ProjectManager.PreviousToolchain=
|
||||
ProjectManager.ProjectBuild=false
|
||||
ProjectManager.ProjectFileName=CubeMX_Config.ioc
|
||||
ProjectManager.ProjectName=CubeMX_Config
|
||||
ProjectManager.ProjectStructure=
|
||||
ProjectManager.RegisterCallBack=
|
||||
ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=MDK-ARM V5
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_USART3_UART_Init-USART3-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG_Init-IWDG-false-HAL-true,10-MX_TIM14_Init-TIM14-false-HAL-true,11-MX_TIM13_Init-TIM13-false-HAL-true,12-MX_TIM11_Init-TIM11-false-HAL-true,13-MX_SDIO_SD_Init-SDIO-false-HAL-true,14-MX_TIM2_Init-TIM2-false-HAL-true,15-MX_SPI2_Init-SPI2-false-HAL-true,16-MX_TIM4_Init-TIM4-false-HAL-true,17-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,18-MX_FSMC_Init-FSMC-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_USART3_UART_Init-USART3-false-HAL-true,7-MX_RTC_Init-RTC-false-HAL-true,8-MX_IWDG_Init-IWDG-false-HAL-true,9-MX_TIM14_Init-TIM14-false-HAL-true,10-MX_TIM13_Init-TIM13-false-HAL-true,11-MX_TIM11_Init-TIM11-false-HAL-true,12-MX_SDIO_SD_Init-SDIO-false-HAL-true,13-MX_TIM2_Init-TIM2-false-HAL-true,14-MX_SPI2_Init-SPI2-false-HAL-true,15-MX_TIM4_Init-TIM4-false-HAL-true,16-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,17-MX_FSMC_Init-FSMC-false-HAL-true,18-MX_DAC_Init-DAC-false-HAL-true,19-MX_TIM3_Init-TIM3-false-HAL-true
|
||||
RCC.48MHZClocksFreq_Value=48000000
|
||||
RCC.AHBFreq_Value=168000000
|
||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
||||
@@ -330,86 +287,34 @@ SH.COMP_DAC1_group.0=DAC_OUT1,DAC_OUT1
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SH.COMP_DAC1_group.ConfNb=1
|
||||
SH.COMP_DAC2_group.0=DAC_OUT2,DAC_OUT2
|
||||
SH.COMP_DAC2_group.ConfNb=1
|
||||
SH.FSMC_A0.0=FSMC_A0,19b-a1
|
||||
SH.FSMC_A0.ConfNb=1
|
||||
SH.FSMC_A1.0=FSMC_A1,19b-a1
|
||||
SH.FSMC_A1.ConfNb=1
|
||||
SH.FSMC_A10.0=FSMC_A10,19b-a1
|
||||
SH.FSMC_A10.ConfNb=1
|
||||
SH.FSMC_A11.0=FSMC_A11,19b-a1
|
||||
SH.FSMC_A11.ConfNb=1
|
||||
SH.FSMC_A12.0=FSMC_A12,19b-a1
|
||||
SH.FSMC_A12.ConfNb=1
|
||||
SH.FSMC_A13.0=FSMC_A13,19b-a1
|
||||
SH.FSMC_A13.ConfNb=1
|
||||
SH.FSMC_A14.0=FSMC_A14,19b-a1
|
||||
SH.FSMC_A14.ConfNb=1
|
||||
SH.FSMC_A15.0=FSMC_A15,19b-a1
|
||||
SH.FSMC_A15.ConfNb=1
|
||||
SH.FSMC_A16_CLE.0=FSMC_A16,19b-a1
|
||||
SH.FSMC_A16_CLE.ConfNb=1
|
||||
SH.FSMC_A17_ALE.0=FSMC_A17,19b-a1
|
||||
SH.FSMC_A17_ALE.ConfNb=1
|
||||
SH.FSMC_A18.0=FSMC_A18,19b-a1
|
||||
SH.FSMC_A18.0=FSMC_A18,A18_1
|
||||
SH.FSMC_A18.ConfNb=1
|
||||
SH.FSMC_A2.0=FSMC_A2,19b-a1
|
||||
SH.FSMC_A2.ConfNb=1
|
||||
SH.FSMC_A3.0=FSMC_A3,19b-a1
|
||||
SH.FSMC_A3.ConfNb=1
|
||||
SH.FSMC_A4.0=FSMC_A4,19b-a1
|
||||
SH.FSMC_A4.ConfNb=1
|
||||
SH.FSMC_A5.0=FSMC_A5,19b-a1
|
||||
SH.FSMC_A5.ConfNb=1
|
||||
SH.FSMC_A6.0=FSMC_A6,19b-a1
|
||||
SH.FSMC_A6.ConfNb=1
|
||||
SH.FSMC_A7.0=FSMC_A7,19b-a1
|
||||
SH.FSMC_A7.ConfNb=1
|
||||
SH.FSMC_A8.0=FSMC_A8,19b-a1
|
||||
SH.FSMC_A8.ConfNb=1
|
||||
SH.FSMC_A9.0=FSMC_A9,19b-a1
|
||||
SH.FSMC_A9.ConfNb=1
|
||||
SH.FSMC_D0_DA0.0=FSMC_D0,16b-d1
|
||||
SH.FSMC_D0_DA0.0=FSMC_D0,8b-d1
|
||||
SH.FSMC_D0_DA0.ConfNb=1
|
||||
SH.FSMC_D10_DA10.0=FSMC_D10,16b-d1
|
||||
SH.FSMC_D10_DA10.ConfNb=1
|
||||
SH.FSMC_D11_DA11.0=FSMC_D11,16b-d1
|
||||
SH.FSMC_D11_DA11.ConfNb=1
|
||||
SH.FSMC_D12_DA12.0=FSMC_D12,16b-d1
|
||||
SH.FSMC_D12_DA12.ConfNb=1
|
||||
SH.FSMC_D13_DA13.0=FSMC_D13,16b-d1
|
||||
SH.FSMC_D13_DA13.ConfNb=1
|
||||
SH.FSMC_D14_DA14.0=FSMC_D14,16b-d1
|
||||
SH.FSMC_D14_DA14.ConfNb=1
|
||||
SH.FSMC_D15_DA15.0=FSMC_D15,16b-d1
|
||||
SH.FSMC_D15_DA15.ConfNb=1
|
||||
SH.FSMC_D1_DA1.0=FSMC_D1,16b-d1
|
||||
SH.FSMC_D1_DA1.0=FSMC_D1,8b-d1
|
||||
SH.FSMC_D1_DA1.ConfNb=1
|
||||
SH.FSMC_D2_DA2.0=FSMC_D2,16b-d1
|
||||
SH.FSMC_D2_DA2.0=FSMC_D2,8b-d1
|
||||
SH.FSMC_D2_DA2.ConfNb=1
|
||||
SH.FSMC_D3_DA3.0=FSMC_D3,16b-d1
|
||||
SH.FSMC_D3_DA3.0=FSMC_D3,8b-d1
|
||||
SH.FSMC_D3_DA3.ConfNb=1
|
||||
SH.FSMC_D4_DA4.0=FSMC_D4,16b-d1
|
||||
SH.FSMC_D4_DA4.0=FSMC_D4,8b-d1
|
||||
SH.FSMC_D4_DA4.ConfNb=1
|
||||
SH.FSMC_D5_DA5.0=FSMC_D5,16b-d1
|
||||
SH.FSMC_D5_DA5.0=FSMC_D5,8b-d1
|
||||
SH.FSMC_D5_DA5.ConfNb=1
|
||||
SH.FSMC_D6_DA6.0=FSMC_D6,16b-d1
|
||||
SH.FSMC_D6_DA6.0=FSMC_D6,8b-d1
|
||||
SH.FSMC_D6_DA6.ConfNb=1
|
||||
SH.FSMC_D7_DA7.0=FSMC_D7,16b-d1
|
||||
SH.FSMC_D7_DA7.0=FSMC_D7,8b-d1
|
||||
SH.FSMC_D7_DA7.ConfNb=1
|
||||
SH.FSMC_D8_DA8.0=FSMC_D8,16b-d1
|
||||
SH.FSMC_D8_DA8.ConfNb=1
|
||||
SH.FSMC_D9_DA9.0=FSMC_D9,16b-d1
|
||||
SH.FSMC_D9_DA9.ConfNb=1
|
||||
SH.FSMC_NBL0.0=FSMC_NBL0,2ByteEnable1
|
||||
SH.FSMC_NBL0.ConfNb=1
|
||||
SH.FSMC_NBL1.0=FSMC_NBL1,2ByteEnable1
|
||||
SH.FSMC_NBL1.ConfNb=1
|
||||
SH.FSMC_NOE.0=FSMC_NOE,Sram1
|
||||
SH.FSMC_NOE.0=FSMC_NOE,Lcd1
|
||||
SH.FSMC_NOE.ConfNb=1
|
||||
SH.FSMC_NWE.0=FSMC_NWE,Sram1
|
||||
SH.FSMC_NWE.0=FSMC_NWE,Lcd1
|
||||
SH.FSMC_NWE.ConfNb=1
|
||||
SH.S_TIM14_CH1.0=TIM14_CH1,PWM Generation1 CH1
|
||||
SH.S_TIM14_CH1.ConfNb=1
|
||||
SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4
|
||||
SH.S_TIM2_CH4.ConfNb=1
|
||||
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
|
||||
SH.S_TIM3_CH4.ConfNb=1
|
||||
SH.S_TIM4_CH1.0=TIM4_CH1,Encoder_Interface
|
||||
SH.S_TIM4_CH1.ConfNb=1
|
||||
SH.S_TIM4_CH2.0=TIM4_CH2,Encoder_Interface
|
||||
@@ -424,8 +329,12 @@ SPI2.Direction=SPI_DIRECTION_2LINES
|
||||
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||
SPI2.Mode=SPI_MODE_MASTER
|
||||
SPI2.VirtualType=VM_MASTER
|
||||
TIM14.Channel=TIM_CHANNEL_1
|
||||
TIM14.IPParameters=Channel
|
||||
TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||
TIM2.IPParameters=Channel-PWM Generation4 CH4
|
||||
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||
TIM3.IPParameters=Channel-PWM Generation4 CH4
|
||||
USART1.IPParameters=VirtualMode
|
||||
USART1.VirtualMode=VM_ASYNC
|
||||
USART3.IPParameters=VirtualMode
|
||||
@@ -446,4 +355,6 @@ VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer
|
||||
VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT
|
||||
VP_TIM2_VS_ClockSourceINT.Mode=Internal
|
||||
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
|
||||
VP_TIM3_VS_ClockSourceINT.Mode=Internal
|
||||
VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
|
||||
board=custom
|
||||
|
||||
@@ -80,6 +80,7 @@ void Error_Handler(void);
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
@@ -89,5 +90,3 @@ void Error_Handler(void);
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -38,7 +38,7 @@
|
||||
#define __STM32F4xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
@@ -83,5 +83,3 @@ void OTG_FS_IRQHandler(void);
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
975
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Src/main.c
Normal file
975
bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/Src/main.c
Normal file
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -86,12 +86,12 @@ extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -99,14 +99,14 @@ void NMI_Handler(void)
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -114,14 +114,14 @@ void HardFault_Handler(void)
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -129,14 +129,14 @@ void MemManage_Handler(void)
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -144,14 +144,14 @@ void BusFault_Handler(void)
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -159,12 +159,12 @@ void UsageFault_Handler(void)
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -172,12 +172,12 @@ void SVC_Handler(void)
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -185,12 +185,12 @@ void DebugMon_Handler(void)
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -198,13 +198,13 @@ void PendSV_Handler(void)
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
@@ -219,13 +219,13 @@ void SysTick_Handler(void)
|
||||
*/
|
||||
void SPI1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SPI1_IRQn 0 */
|
||||
/* USER CODE BEGIN SPI1_IRQn 0 */
|
||||
|
||||
/* USER CODE END SPI1_IRQn 0 */
|
||||
HAL_SPI_IRQHandler(&hspi1);
|
||||
/* USER CODE BEGIN SPI1_IRQn 1 */
|
||||
/* USER CODE END SPI1_IRQn 0 */
|
||||
HAL_SPI_IRQHandler(&hspi1);
|
||||
/* USER CODE BEGIN SPI1_IRQn 1 */
|
||||
|
||||
/* USER CODE END SPI1_IRQn 1 */
|
||||
/* USER CODE END SPI1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -233,13 +233,13 @@ void SPI1_IRQHandler(void)
|
||||
*/
|
||||
void USART1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_IRQn 0 */
|
||||
/* USER CODE BEGIN USART1_IRQn 0 */
|
||||
|
||||
/* USER CODE END USART1_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart1);
|
||||
/* USER CODE BEGIN USART1_IRQn 1 */
|
||||
/* USER CODE END USART1_IRQn 0 */
|
||||
HAL_UART_IRQHandler(&huart1);
|
||||
/* USER CODE BEGIN USART1_IRQn 1 */
|
||||
|
||||
/* USER CODE END USART1_IRQn 1 */
|
||||
/* USER CODE END USART1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -247,16 +247,15 @@ void USART1_IRQHandler(void)
|
||||
*/
|
||||
void OTG_FS_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN OTG_FS_IRQn 0 */
|
||||
/* USER CODE BEGIN OTG_FS_IRQn 0 */
|
||||
//You can open usb device or usb host, but open both of them is fatal error.
|
||||
/* USER CODE END OTG_FS_IRQn 0 */
|
||||
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
|
||||
/* USER CODE BEGIN OTG_FS_IRQn 1 */
|
||||
/* USER CODE END OTG_FS_IRQn 0 */
|
||||
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
|
||||
/* USER CODE BEGIN OTG_FS_IRQn 1 */
|
||||
|
||||
/* USER CODE END OTG_FS_IRQn 1 */
|
||||
/* USER CODE END OTG_FS_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
@@ -7,7 +7,7 @@ config SOC_STM32F407ZG
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
config BOARD_STM32F407_ATK_EXPLORER
|
||||
config BOARD_STM32F407_SPARK
|
||||
bool
|
||||
default y
|
||||
|
||||
@@ -19,20 +19,72 @@ menu "Onboard Peripheral Drivers"
|
||||
select BSP_USING_UART1
|
||||
default y
|
||||
|
||||
config BSP_USING_COM2
|
||||
bool "Enable COM2 (uart2 pin conflict with Ethernet and PWM)"
|
||||
depends on (!BSP_USING_ETH && !BSP_USING_PWM)
|
||||
select BSP_USING_UART
|
||||
select BSP_USING_UART2
|
||||
default n
|
||||
|
||||
config BSP_USING_COM3
|
||||
bool "Enable COM3 (uart3)"
|
||||
select BSP_USING_UART
|
||||
select BSP_USING_UART3
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_RS485
|
||||
bool "Enable RS485 (uart6)"
|
||||
select BSP_USING_UART
|
||||
select BSP_USING_UART6
|
||||
default n
|
||||
if BSP_USING_RS485
|
||||
comment "set rts pin number "
|
||||
config BSP_RS485_RTS_PIN
|
||||
int "RS485 rts pin number"
|
||||
range 1 176
|
||||
default 104
|
||||
|
||||
config RS485_UART_DEVICE_NAME
|
||||
string "the uart name for rs485"
|
||||
default "uart6"
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_SRAM
|
||||
bool "Enable SRAM"
|
||||
select BSP_USING_EXT_FMC_IO
|
||||
select BSP_USING_FMC
|
||||
default n
|
||||
|
||||
config BSP_USING_ONBOARD_LCD
|
||||
bool "Enable ATK LCD"
|
||||
bool "Enable LCD(ST7787)"
|
||||
select BSP_USING_SRAM
|
||||
default n
|
||||
if BSP_USING_ONBOARD_LCD
|
||||
config BSP_USING_ONBOARD_LCD_TEST
|
||||
bool "Enable lcd fill test"
|
||||
config BSP_USING_ONBOARD_LCD_PWM_BL
|
||||
bool "Enable pwm background light"
|
||||
default y
|
||||
select BSP_USING_PWM
|
||||
select BSP_USING_PWM14
|
||||
select BSP_USING_PWM14_CH1
|
||||
endif
|
||||
|
||||
config BSP_USING_ONBOARD_LED_MATRIX
|
||||
bool "Enable Led MATRIX"
|
||||
default n
|
||||
select BSP_USING_PWM
|
||||
select BSP_USING_PWM3
|
||||
select BSP_USING_PWM3_CH2
|
||||
if BSP_USING_ONBOARD_LED_MATRIX
|
||||
config BSP_USING_LED_MATRIX_RS485_DEMO
|
||||
bool "use led matrix rs485 example"
|
||||
default n
|
||||
select BSP_USING_RS485
|
||||
endif
|
||||
|
||||
config BSP_USING_LVGL
|
||||
bool "Enable LVGL for LCD"
|
||||
select BSP_USING_ONBOARD_LCD
|
||||
select BSP_USING_TOUCH
|
||||
select PKG_USING_LVGL
|
||||
default n
|
||||
|
||||
@@ -42,14 +94,26 @@ menu "Onboard Peripheral Drivers"
|
||||
default y
|
||||
endif
|
||||
|
||||
config BSP_USING_SOFT_SPI_FLASH
|
||||
bool "Enable soft SPI FLASH (W25Q128 sspi2)"
|
||||
select BSP_USING_SOFT_SPI
|
||||
select BSP_USING_SOFT_SPI2
|
||||
config BSP_USING_SPI_FLASH
|
||||
bool "Enable SPI FLASH (W25Q64 spi2)"
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI2
|
||||
select RT_USING_SFUD
|
||||
select RT_SFUD_USING_SFDP
|
||||
default n
|
||||
|
||||
config BSP_USING_EEPROM
|
||||
bool "Enable I2C EEPROM (i2c1)"
|
||||
select BSP_USING_I2C1
|
||||
default n
|
||||
|
||||
config BSP_USING_ENC28j60
|
||||
bool "Enable Ethernet 28j60"
|
||||
default n
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI1
|
||||
select RT_USING_ENC28J60
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable File System"
|
||||
select RT_USING_DFS
|
||||
@@ -62,18 +126,136 @@ menu "Onboard Peripheral Drivers"
|
||||
select BSP_USING_SDIO
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI_FLASH_LITTLEFS
|
||||
bool "Enable SPI-FLASH (LittleFS)"
|
||||
select RT_USING_MTD_NOR
|
||||
select BSP_USING_SPI_FLASH
|
||||
select RT_USING_FAL
|
||||
select FAL_USING_AUTO_INIT
|
||||
select FAL_PART_HAS_TABLE_CFG
|
||||
select PKG_USING_LITTLEFS
|
||||
default n
|
||||
if BSP_USING_SDCARD_FATFS
|
||||
menuconfig BSP_USING_FS_AUTO_MOUNT
|
||||
bool "Enable filesystem auto mount"
|
||||
default y
|
||||
endif
|
||||
|
||||
config BSP_USING_FLASH_FATFS
|
||||
bool "Enable FAL filesystem partition base on W25Q64"
|
||||
select BSP_USING_FAL
|
||||
default n
|
||||
if BSP_USING_FLASH_FATFS
|
||||
menuconfig BSP_USING_FLASH_FS_AUTO_MOUNT
|
||||
bool "Enable filesystem auto mount"
|
||||
default y
|
||||
endif
|
||||
endif
|
||||
|
||||
config BSP_USING_FAL
|
||||
bool "Enable FAL (enable on-chip flash and spi2 flash)"
|
||||
select BSP_USING_SPI_FLASH
|
||||
select RT_USING_FAL
|
||||
select FAL_DEBUG_CONFIG
|
||||
select FAL_PART_HAS_TABLE_CFG
|
||||
select FAL_USING_SFUD_PORT
|
||||
|
||||
if BSP_USING_FAL
|
||||
menuconfig BSP_USING_BOOTLOADER
|
||||
bool "Enable bootloader partition table"
|
||||
default n
|
||||
endif
|
||||
|
||||
|
||||
config BSP_USING_EASYFLASH
|
||||
bool "Enable Easy Flash base on FAL"
|
||||
select BSP_USING_FAL
|
||||
select PKG_USING_EASYFLASH
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_RW007_WLAN
|
||||
bool "Enable Rw007 Wlan Base on SPI2"
|
||||
default n
|
||||
select PKG_USING_RW007
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI2
|
||||
if BSP_USING_RW007_WLAN && PKG_USING_RW007
|
||||
config RW007_SPI_MAX_HZ
|
||||
int "RW007 SPI Max Hz"
|
||||
default 30000000
|
||||
config RW007_CS_PIN
|
||||
int "RW007 CS pin index"
|
||||
default 90
|
||||
config RW007_BOOT0_PIN
|
||||
int "RW007 BOOT0 pin index (same as spi clk pin)"
|
||||
default 29
|
||||
config RW007_BOOT1_PIN
|
||||
int "RW007 BOOT1 pin index (same as spi cs pin)"
|
||||
default 90
|
||||
config RW007_INT_BUSY_PIN
|
||||
int "RW007 INT/BUSY pin index"
|
||||
default 107
|
||||
config RW007_RST_PIN
|
||||
int "RW007 RESET pin index"
|
||||
default 111
|
||||
endif
|
||||
|
||||
config BSP_USING_AHT21
|
||||
bool "Enable AHT21(i2c3)"
|
||||
select BSP_USING_I2C
|
||||
select BSP_USING_I2C3
|
||||
select PKG_USING_SENSORS_DRIVERS
|
||||
select PKG_USING_AHT10
|
||||
default n
|
||||
|
||||
config BSP_USING_AP3216C
|
||||
bool "Enable AP3216C(i2c2)"
|
||||
select BSP_USING_I2C
|
||||
select BSP_USING_I2C2
|
||||
select PKG_USING_SENSORS_DRIVERS
|
||||
select PKG_USING_AP3216C
|
||||
default n
|
||||
|
||||
config BSP_USING_ICM20608
|
||||
bool "Enable ICM20608(i2c2)"
|
||||
select BSP_USING_I2C
|
||||
select BSP_USING_I2C2
|
||||
select PKG_USING_SENSORS_DRIVERS
|
||||
select PKG_USING_ICM20608
|
||||
default n
|
||||
|
||||
config BSP_USING_USB_MOUSE
|
||||
bool "Enable Usb Mouse(usb hid device)"
|
||||
select BSP_USING_USBD
|
||||
select RT_USB_DEVICE_HID
|
||||
select RT_USB_DEVICE_HID_MOUSE
|
||||
select BSP_USING_ICM20608
|
||||
|
||||
config BSP_USING_EASYFLASH
|
||||
bool "Enable Easy Flash base on FAL"
|
||||
select BSP_USING_FAL
|
||||
select PKG_USING_EASYFLASH
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable On Board CAN"
|
||||
select RT_USING_CAN
|
||||
default n
|
||||
if BSP_USING_CAN
|
||||
config BSP_USING_CAN1
|
||||
bool "Enable On Board CAN1"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_AUDIO
|
||||
bool "Enable Audio Device"
|
||||
select RT_USING_AUDIO
|
||||
select BSP_USING_I2C
|
||||
select BSP_USING_I2C2
|
||||
default n
|
||||
|
||||
if BSP_USING_AUDIO
|
||||
config BSP_USING_AUDIO_PLAY
|
||||
bool "Enable Audio Play"
|
||||
default y
|
||||
|
||||
config BSP_USING_AUDIO_RECORD
|
||||
bool "Enable Audio Record"
|
||||
default n
|
||||
endif
|
||||
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
@@ -191,6 +373,23 @@ menu "On-chip Peripheral Drivers"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ONCHIP_RTC
|
||||
bool "Enable RTC"
|
||||
select RT_USING_RTC
|
||||
default n
|
||||
if BSP_USING_ONCHIP_RTC
|
||||
choice
|
||||
prompt "Select clock source"
|
||||
default BSP_RTC_USING_LSE
|
||||
|
||||
config BSP_RTC_USING_LSE
|
||||
bool "RTC USING LSE"
|
||||
|
||||
config BSP_RTC_USING_LSI
|
||||
bool "RTC USING LSI"
|
||||
endchoice
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
@@ -204,6 +403,27 @@ menu "On-chip Peripheral Drivers"
|
||||
bool "Enable PWM2 channel4"
|
||||
default n
|
||||
endif
|
||||
menuconfig BSP_USING_PWM3
|
||||
bool "Enable timer3 output PWM"
|
||||
default n
|
||||
if BSP_USING_PWM3
|
||||
config BSP_USING_PWM3_CH2
|
||||
bool "Enable PWM3 channel2"
|
||||
default n
|
||||
endif
|
||||
if BSP_USING_PWM3
|
||||
config BSP_USING_PWM3_CH4
|
||||
bool "Enable PWM3 channel4"
|
||||
default n
|
||||
endif
|
||||
menuconfig BSP_USING_PWM14
|
||||
bool "Enable timer14 output PWM"
|
||||
default n
|
||||
if BSP_USING_PWM14
|
||||
config BSP_USING_PWM14_CH1
|
||||
bool "Enable PWM14 channel1"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
|
||||
config BSP_USING_ON_CHIP_FLASH
|
||||
@@ -234,7 +454,7 @@ menu "On-chip Peripheral Drivers"
|
||||
range 1 176
|
||||
default 91
|
||||
endif
|
||||
|
||||
|
||||
menuconfig BSP_USING_SOFT_SPI2
|
||||
bool "Enable soft SPI2 BUS (software simulation)"
|
||||
default n
|
||||
@@ -300,40 +520,68 @@ menu "On-chip Peripheral Drivers"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS (software simulation)"
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C1
|
||||
config BSP_I2C1_SCL_PIN
|
||||
int "i2c1 scl pin number"
|
||||
range 0 143
|
||||
default 24
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 0 143
|
||||
default 25
|
||||
if BSP_USING_I2C
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS (software simulation)"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C1
|
||||
config BSP_I2C1_SCL_PIN
|
||||
int "i2c1 scl pin number"
|
||||
range 0 143
|
||||
default 24
|
||||
config BSP_I2C1_SDA_PIN
|
||||
int "I2C1 sda pin number"
|
||||
range 0 143
|
||||
default 25
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C2
|
||||
bool "Enable I2C2 BUS for AP3216C/ICM20608/ES8388/ Onboard(software simulation)"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C2
|
||||
config BSP_I2C2_SCL_PIN
|
||||
int "i2c2 scl pin number, PF1"
|
||||
range 0 143
|
||||
default 81
|
||||
config BSP_I2C2_SDA_PIN
|
||||
int "I2C2 sda pin number, PF0"
|
||||
range 0 143
|
||||
default 80
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C3
|
||||
bool "Enable I2C3 BUS for AHT21 Onboard(software simulation)"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C3
|
||||
config BSP_I2C3_SCL_PIN
|
||||
int "i2c3 scl pin number, PE0"
|
||||
range 0 143
|
||||
default 64
|
||||
config BSP_I2C3_SDA_PIN
|
||||
int "I2C3 sda pin number, PE1"
|
||||
range 0 143
|
||||
default 65
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C2
|
||||
bool "Enable LCD Touch BUS (software simulation)"
|
||||
config BSP_USING_ONBOARD_PM
|
||||
bool "Enable Power Management"
|
||||
select RT_USING_PM
|
||||
select RT_USING_HOOK
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C2
|
||||
config BSP_I2C2_SCL_PIN
|
||||
int "i2c2 scl pin number, PB0"
|
||||
range 0 143
|
||||
default 16
|
||||
config BSP_I2C2_SDA_PIN
|
||||
int "I2C2 sda pin number, PF11"
|
||||
range 0 143
|
||||
default 91
|
||||
endif
|
||||
|
||||
|
||||
menuconfig BSP_USING_DAC
|
||||
bool "Enable DAC"
|
||||
default n
|
||||
@@ -408,12 +656,51 @@ menu "On-chip Peripheral Drivers"
|
||||
default n
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_EXT_FMC_IO
|
||||
bool
|
||||
default n
|
||||
|
||||
config BSP_USING_FMC
|
||||
bool
|
||||
default n
|
||||
source "../libraries/HAL_Drivers/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
menuconfig BSP_USING_AT_ESP8266
|
||||
bool "Enable ESP8266(AT Command, COM3)"
|
||||
default n
|
||||
select BSP_USING_COM3
|
||||
select PKG_USING_AT_DEVICE
|
||||
select AT_DEVICE_USING_ESP8266
|
||||
select AT_DEVICE_ESP8266_SAMPLE
|
||||
select AT_DEVICE_ESP8266_SAMPLE_BSP_TAKEOVER
|
||||
|
||||
if BSP_USING_AT_ESP8266
|
||||
|
||||
config ESP8266_SAMPLE_WIFI_SSID
|
||||
string "WIFI ssid"
|
||||
default "rtthread"
|
||||
|
||||
config ESP8266_SAMPLE_WIFI_PASSWORD
|
||||
string "WIFI password"
|
||||
default "12345678"
|
||||
|
||||
config ESP8266_SAMPLE_CLIENT_NAME
|
||||
string "AT client device name (Must be 'uart3')"
|
||||
default "uart3"
|
||||
|
||||
config ESP8266_SAMPLE_RECV_BUFF_LEN
|
||||
int "The maximum length of receive line buffer"
|
||||
default 512
|
||||
|
||||
comment "May adjust RT_SERIAL_RB_BUFSZ up to 512 if using the Serial V1 device driver"
|
||||
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
@@ -27,4 +27,13 @@ elif rtconfig.PLATFORM in ['iccarm']:
|
||||
CPPDEFINES = ['STM32F407xx']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
|
||||
# if os.path.isfile(os.path.join(cwd, "ports", 'SConscript')):
|
||||
# group = group + SConscript(os.path.join("ports", 'SConscript'))
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
|
||||
70
bsp/stm32/stm32f407-rt-spark/board/ports/SConscript
Normal file
70
bsp/stm32/stm32f407-rt-spark/board/ports/SConscript
Normal file
@@ -0,0 +1,70 @@
|
||||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add general drivers
|
||||
src = []
|
||||
path = [cwd]
|
||||
|
||||
if GetDepend(['BSP_USING_ETH']):
|
||||
src += Glob('phy_reset.c')
|
||||
|
||||
if GetDepend(['BSP_USING_RS485']):
|
||||
src += Glob('drv_rs485.c')
|
||||
|
||||
if GetDepend(['BSP_USING_SOFT_SPI_FLASH']):
|
||||
src += Glob('soft_spi_flash_init.c')
|
||||
|
||||
if GetDepend(['BSP_USING_SPI_FLASH']):
|
||||
src += Glob('spi_flash_init.c')
|
||||
|
||||
if GetDepend(['BSP_USING_FS']):
|
||||
src += Glob('drv_filesystem.c')
|
||||
|
||||
if GetDepend(['BSP_USING_FAL']):
|
||||
src += Glob('fal/fal_spi_flash_sfud_port.c')
|
||||
path += [cwd + '/fal']
|
||||
|
||||
if GetDepend(['BSP_USING_SRAM']):
|
||||
src += Glob('drv_sram.c')
|
||||
|
||||
if GetDepend(['BSP_USING_ONBOARD_LCD']):
|
||||
src += Glob('lcd/drv_lcd.c')
|
||||
path += [cwd + '/lcd']
|
||||
|
||||
if GetDepend(['BSP_USING_ONBOARD_LED_MATRIX']):
|
||||
src += Glob('led_matrix/drv_matrix_led.c')
|
||||
path += [cwd + '/led_matrix']
|
||||
|
||||
if GetDepend(['BSP_USING_EASYFLASH']):
|
||||
src += Glob('ef_fal_port.c')
|
||||
|
||||
if GetDepend(['BSP_USING_ENC28j60']):
|
||||
src += Glob('drv_enc28j60.c')
|
||||
|
||||
if GetDepend(['BSP_USING_ONBOARD_PM']):
|
||||
src += Glob('pm/drv_pm.c')
|
||||
src += Glob('pm/drv_wakeup.c')
|
||||
path += [cwd + '/pm']
|
||||
|
||||
if GetDepend(['BSP_USING_AUDIO']):
|
||||
src += Glob('audio/drv_es8388.c')
|
||||
src += Glob('audio/drv_sound.c')
|
||||
path += [cwd + '/audio']
|
||||
|
||||
if GetDepend(['BSP_USING_AUDIO_RECORD']):
|
||||
src += Glob('audio/drv_mic.c')
|
||||
|
||||
CPPDEFINES = ['STM32F407xx']
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
316
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_es8388.c
Normal file
316
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_es8388.c
Normal file
@@ -0,0 +1,316 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Date Author Notes
|
||||
* 2019-07-31 Zero-Free first implementation
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include "drv_es8388.h"
|
||||
|
||||
/* ES8388 address */
|
||||
#define ES8388_ADDR 0x10 /*0x11:CE=1;0x10:CE=0*/
|
||||
|
||||
struct es8388_device
|
||||
{
|
||||
struct rt_i2c_bus_device *i2c;
|
||||
rt_uint16_t pin;
|
||||
};
|
||||
|
||||
static struct es8388_device es_dev = {0};
|
||||
|
||||
static rt_uint16_t reg_read(rt_uint8_t addr)
|
||||
{
|
||||
struct rt_i2c_msg msg[2] = {0};
|
||||
rt_uint8_t val = 0xff;
|
||||
|
||||
RT_ASSERT(es_dev.i2c != RT_NULL);
|
||||
|
||||
msg[0].addr = ES8388_ADDR;
|
||||
msg[0].flags = RT_I2C_WR;
|
||||
msg[0].len = 1;
|
||||
msg[0].buf = &addr;
|
||||
|
||||
msg[1].addr = ES8388_ADDR;
|
||||
msg[1].flags = RT_I2C_RD;
|
||||
msg[1].len = 1;
|
||||
msg[1].buf = &val;
|
||||
|
||||
if (rt_i2c_transfer(es_dev.i2c, msg, 2) != 2)
|
||||
{
|
||||
rt_kprintf("I2C read data failed, reg = 0x%02x. \n", addr);
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
static void reg_write(rt_uint8_t addr, rt_uint8_t val)
|
||||
{
|
||||
struct rt_i2c_msg msgs[1] = {0};
|
||||
rt_uint8_t buff[2] = {0};
|
||||
|
||||
RT_ASSERT(es_dev.i2c != RT_NULL);
|
||||
|
||||
buff[0] = addr;
|
||||
buff[1] = val;
|
||||
|
||||
msgs[0].addr = ES8388_ADDR;
|
||||
msgs[0].flags = RT_I2C_WR;
|
||||
msgs[0].buf = buff;
|
||||
msgs[0].len = 2;
|
||||
|
||||
if (rt_i2c_transfer(es_dev.i2c, msgs, 1) != 1)
|
||||
{
|
||||
rt_kprintf("I2C write data failed, reg = 0x%2x. \n", addr);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static int es8388_set_adc_dac_volume(int mode, int volume, int dot)
|
||||
{
|
||||
int res = 0;
|
||||
if (volume < -96 || volume > 0)
|
||||
{
|
||||
if (volume < -96)
|
||||
volume = -96;
|
||||
else
|
||||
volume = 0;
|
||||
}
|
||||
dot = (dot >= 5 ? 1 : 0);
|
||||
volume = (-volume << 1) + dot;
|
||||
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
|
||||
{
|
||||
reg_write(ES8388_ADCCONTROL8, volume);
|
||||
reg_write(ES8388_ADCCONTROL9, volume); //ADC Right Volume=0db
|
||||
}
|
||||
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
|
||||
{
|
||||
reg_write(ES8388_DACCONTROL5, volume);
|
||||
reg_write(ES8388_DACCONTROL4, volume);
|
||||
}
|
||||
return res;
|
||||
}
|
||||
|
||||
void es8388_set_voice_mute(rt_bool_t enable)
|
||||
{
|
||||
rt_uint8_t reg = 0;
|
||||
|
||||
reg = reg_read(ES8388_DACCONTROL3);
|
||||
reg = reg & 0xFB;
|
||||
reg_write(ES8388_DACCONTROL3, reg | (((int)enable) << 2));
|
||||
}
|
||||
|
||||
rt_err_t es8388_init(const char *i2c_name, rt_uint16_t pin)
|
||||
{
|
||||
es_dev.i2c = rt_i2c_bus_device_find(i2c_name);
|
||||
if (es_dev.i2c == RT_NULL)
|
||||
{
|
||||
rt_kprintf("%s bus not found\n", i2c_name);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
es_dev.pin = pin;
|
||||
|
||||
reg_write(ES8388_DACCONTROL3, 0x04); // 0x04 mute/0x00 unmute&ramp;DAC unmute and disabled digital volume control soft ramp
|
||||
/* Chip Control and Power Management */
|
||||
reg_write(ES8388_CONTROL2, 0x50);
|
||||
reg_write(ES8388_CHIPPOWER, 0x00); //normal all and power up all
|
||||
reg_write(ES8388_MASTERMODE, 0x00); //TODO:CODEC IN I2S SLAVE MODE
|
||||
|
||||
/* dac */
|
||||
reg_write(ES8388_DACPOWER, 0xC0); //disable DAC and disable Lout/Rout/1/2
|
||||
reg_write(ES8388_CONTROL1, 0x12); //Enfr=0,Play&Record Mode,(0x17-both of mic&paly)
|
||||
// reg_write(ES8388_CONTROL2, 0); //LPVrefBuf=0,Pdn_ana=0
|
||||
reg_write(ES8388_DACCONTROL1, 0x18);//1a 0x18:16bit iis , 0x00:24
|
||||
reg_write(ES8388_DACCONTROL2, 0x02); //DACFsMode,SINGLE SPEED; DACFsRatio,256
|
||||
reg_write(ES8388_DACCONTROL16, 0x00); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2
|
||||
reg_write(ES8388_DACCONTROL17, 0x9C); // only left DAC to left mixer enable 0db
|
||||
reg_write(ES8388_DACCONTROL20, 0x9C); // only right DAC to right mixer enable 0db
|
||||
reg_write(ES8388_DACCONTROL21, 0x80); //set internal ADC and DAC use the same LRCK clock, ADC LRCK as internal LRCK
|
||||
reg_write(ES8388_DACCONTROL23, 0x00); //vroi=0
|
||||
es8388_set_adc_dac_volume(ES_MODE_DAC, 0, 0); // 0db
|
||||
|
||||
reg_write(ES8388_DACPOWER, 0x3c); //0x3c Enable DAC and Enable Lout/Rout/1/2
|
||||
/* adc */
|
||||
reg_write(ES8388_ADCPOWER, 0xFF);
|
||||
reg_write(ES8388_ADCCONTROL1, 0xbb); // MIC Left and Right channel PGA gain
|
||||
reg_write(ES8388_ADCCONTROL2, 0x00); //0x00 LINSEL & RINSEL, LIN1/RIN1 as ADC Input; DSSEL,use one DS Reg11; DSR, LINPUT1-RINPUT1
|
||||
reg_write(ES8388_ADCCONTROL3, 0x02);
|
||||
reg_write(ES8388_ADCCONTROL4, 0x0d); // Left/Right data, Left/Right justified mode, Bits length, I2S format
|
||||
reg_write(ES8388_ADCCONTROL5, 0x02); //ADCFsMode,singel SPEED,RATIO=256
|
||||
//ALC for Microphone
|
||||
es8388_set_adc_dac_volume(ES_MODE_ADC, 0, 0); // 0db
|
||||
reg_write(ES8388_ADCPOWER, 0x09); //Power on ADC, Enable LIN&RIN, Power off MICBIAS, set int1lp to low power mode
|
||||
/* enable es8388 PA */
|
||||
es8388_pa_power(RT_TRUE);
|
||||
|
||||
reg_write(ES8388_DACCONTROL24, 0x1E); // LOUT1VOL balanced noise: 0x18
|
||||
reg_write(ES8388_DACCONTROL25, 0x1E); // ROUT1VOL balanced noise: 0x18
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
rt_err_t es8388_start(enum es8388_mode mode)
|
||||
{
|
||||
int res = 0;
|
||||
rt_uint8_t prev_data = 0, data = 0;
|
||||
|
||||
prev_data = reg_read(ES8388_DACCONTROL21);
|
||||
if (mode == ES_MODE_LINE)
|
||||
{
|
||||
reg_write(ES8388_DACCONTROL16, 0x09); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2 by pass enable
|
||||
reg_write(ES8388_DACCONTROL17, 0x50); // left DAC to left mixer enable and LIN signal to left mixer enable 0db : bupass enable
|
||||
reg_write(ES8388_DACCONTROL20, 0x50); // right DAC to right mixer enable and LIN signal to right mixer enable 0db : bupass enable
|
||||
reg_write(ES8388_DACCONTROL21, 0xC0); //enable adc
|
||||
}
|
||||
else
|
||||
{
|
||||
reg_write(ES8388_DACCONTROL21, 0x80); //enable dac
|
||||
}
|
||||
data = reg_read(ES8388_DACCONTROL21);
|
||||
|
||||
if (prev_data != data)
|
||||
{
|
||||
reg_write(ES8388_CHIPPOWER, 0xF0); //start state machine
|
||||
// reg_write(ES8388_ADDR, ES8388_CONTROL1, 0x16);
|
||||
// reg_write(ES8388_ADDR, ES8388_CONTROL2, 0x50);
|
||||
reg_write(ES8388_CHIPPOWER, 0x00); //start state machine
|
||||
}
|
||||
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC || mode == ES_MODE_LINE)
|
||||
{
|
||||
reg_write(ES8388_ADCPOWER, 0x00); //power up adc and line in
|
||||
}
|
||||
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC || mode == ES_MODE_LINE)
|
||||
{
|
||||
reg_write(ES8388_DACPOWER, 0x3c); //power up dac and line out
|
||||
es8388_set_voice_mute(RT_FALSE);
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
rt_err_t es8388_stop(enum es8388_mode mode)
|
||||
{
|
||||
int res = 0;
|
||||
if (mode == ES_MODE_LINE)
|
||||
{
|
||||
reg_write(ES8388_DACCONTROL21, 0x80); //enable dac
|
||||
reg_write(ES8388_DACCONTROL16, 0x00); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2
|
||||
reg_write(ES8388_DACCONTROL17, 0x90); // only left DAC to left mixer enable 0db
|
||||
reg_write(ES8388_DACCONTROL20, 0x90); // only right DAC to right mixer enable 0db
|
||||
return res;
|
||||
}
|
||||
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
|
||||
{
|
||||
reg_write(ES8388_DACPOWER, 0x00);
|
||||
es8388_set_voice_mute(RT_TRUE); //res |= Es8388SetAdcDacVolume(ES_MODULE_DAC, -96, 5); // 0db
|
||||
// reg_write(ES8388_ADDR, ES8388_DACPOWER, 0xC0); //power down dac and line out
|
||||
}
|
||||
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
|
||||
{
|
||||
// Es8388SetAdcDacVolume(ES_MODULE_ADC, -96, 5); // 0db
|
||||
reg_write(ES8388_ADCPOWER, 0xFF); //power down adc and line in
|
||||
}
|
||||
if (mode == ES_MODE_DAC_ADC)
|
||||
{
|
||||
reg_write(ES8388_DACCONTROL21, 0x9C); //disable mclk
|
||||
// reg_write(ES8388_CONTROL1, 0x00);
|
||||
// reg_write(ES8388_CONTROL2, 0x58);
|
||||
// reg_write(ES8388_CHIPPOWER, 0xF3); //stop state machine
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
rt_err_t es8388_fmt_set(enum es8388_mode mode, enum es8388_format fmt)
|
||||
{
|
||||
rt_uint8_t reg = 0;
|
||||
|
||||
if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
|
||||
{
|
||||
reg = reg_read(ES8388_ADCCONTROL4);
|
||||
reg = reg & 0xfc;
|
||||
reg_write(ES8388_ADCCONTROL4, reg | fmt);
|
||||
}
|
||||
if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
|
||||
{
|
||||
reg = reg_read(ES8388_DACCONTROL1);
|
||||
reg = reg & 0xf9;
|
||||
reg_write(ES8388_DACCONTROL1, reg | (fmt << 1));
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
void es8388_volume_set(rt_uint8_t volume)
|
||||
{
|
||||
uint32_t real_vol = 0;
|
||||
volume = 100 - volume;
|
||||
if (volume > 100)
|
||||
volume = 100;
|
||||
|
||||
real_vol = 192 * volume / 100;
|
||||
|
||||
reg_write(ES8388_DACCONTROL4, (rt_uint8_t)real_vol); // DAC L
|
||||
reg_write(ES8388_DACCONTROL5, (rt_uint8_t)real_vol); // DAC R
|
||||
}
|
||||
|
||||
rt_uint8_t es8388_volume_get(void)
|
||||
{
|
||||
rt_uint8_t volume;
|
||||
|
||||
volume = reg_read(ES8388_DACCONTROL24);
|
||||
if (volume == 0xff)
|
||||
{
|
||||
volume = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
volume *= 3;
|
||||
if (volume == 99)
|
||||
volume = 100;
|
||||
}
|
||||
|
||||
return volume;
|
||||
}
|
||||
|
||||
void es8388_pa_power(rt_bool_t enable)
|
||||
{
|
||||
rt_pin_mode(es_dev.pin, PIN_MODE_OUTPUT);
|
||||
|
||||
if (enable)
|
||||
{
|
||||
rt_pin_write(es_dev.pin, PIN_HIGH);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_pin_write(es_dev.pin, PIN_LOW);
|
||||
}
|
||||
}
|
||||
|
||||
void estest()
|
||||
{
|
||||
|
||||
// reg_write(ES8388_DACCONTROL24, volume);
|
||||
reg_write(ES8388_ADCCONTROL1, 0x88); /* R9,左右通道PGA增益设置 */
|
||||
reg_write(ES8388_ADCCONTROL2, 0x10); // 使用板载麦克风
|
||||
// reg_write(ES8388_ADCCONTROL2,0x50); // 使用耳机麦克风
|
||||
// reg_write(ES8388_ADCCONTROL3, 0xC0);
|
||||
reg_write(ES8388_ADCCONTROL8, 0x00); // LADCVOL
|
||||
reg_write(ES8388_ADCCONTROL9, 0x00); // RADCVOL
|
||||
reg_write(ES8388_DACCONTROL16, 0x1B); // LMIXSEL RMIXSEL
|
||||
reg_write(ES8388_DACCONTROL17, 0x40); // LI2LOVOL
|
||||
|
||||
reg_write(ES8388_DACCONTROL24, 0x21); // LOUT1VOL
|
||||
reg_write(ES8388_DACCONTROL25, 0x21); // ROUT1VOL
|
||||
|
||||
reg_write(ES8388_DACCONTROL24, 33); // LOUT1VOL balanced noise: 0x18
|
||||
reg_write(ES8388_DACCONTROL25, 33); // ROUT1VOL balanced noise: 0x18
|
||||
|
||||
|
||||
}
|
||||
MSH_CMD_EXPORT(estest, test mic loop)
|
||||
95
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_es8388.h
Normal file
95
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_es8388.h
Normal file
@@ -0,0 +1,95 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Date Author Notes
|
||||
* 2019-07-31 Zero-Free first implementation
|
||||
*/
|
||||
|
||||
#ifndef __DRV_ES8388_H__
|
||||
#define __DRV_ES8388_H__
|
||||
|
||||
/* ES8388 register space */
|
||||
#define ES8388_CONTROL1 0x00
|
||||
#define ES8388_CONTROL2 0x01
|
||||
#define ES8388_CHIPPOWER 0x02
|
||||
#define ES8388_ADCPOWER 0x03
|
||||
#define ES8388_DACPOWER 0x04
|
||||
#define ES8388_CHIPLOPOW1 0x05
|
||||
#define ES8388_CHIPLOPOW2 0x06
|
||||
#define ES8388_ANAVOLMANAG 0x07
|
||||
#define ES8388_MASTERMODE 0x08
|
||||
#define ES8388_ADCCONTROL1 0x09
|
||||
#define ES8388_ADCCONTROL2 0x0a
|
||||
#define ES8388_ADCCONTROL3 0x0b
|
||||
#define ES8388_ADCCONTROL4 0x0c
|
||||
#define ES8388_ADCCONTROL5 0x0d
|
||||
#define ES8388_ADCCONTROL6 0x0e
|
||||
#define ES8388_ADCCONTROL7 0x0f
|
||||
#define ES8388_ADCCONTROL8 0x10
|
||||
#define ES8388_ADCCONTROL9 0x11
|
||||
#define ES8388_ADCCONTROL10 0x12
|
||||
#define ES8388_ADCCONTROL11 0x13
|
||||
#define ES8388_ADCCONTROL12 0x14
|
||||
#define ES8388_ADCCONTROL13 0x15
|
||||
#define ES8388_ADCCONTROL14 0x16
|
||||
|
||||
#define ES8388_DACCONTROL1 0x17
|
||||
#define ES8388_DACCONTROL2 0x18
|
||||
#define ES8388_DACCONTROL3 0x19
|
||||
#define ES8388_DACCONTROL4 0x1a
|
||||
#define ES8388_DACCONTROL5 0x1b
|
||||
#define ES8388_DACCONTROL6 0x1c
|
||||
#define ES8388_DACCONTROL7 0x1d
|
||||
#define ES8388_DACCONTROL8 0x1e
|
||||
#define ES8388_DACCONTROL9 0x1f
|
||||
#define ES8388_DACCONTROL10 0x20
|
||||
#define ES8388_DACCONTROL11 0x21
|
||||
#define ES8388_DACCONTROL12 0x22
|
||||
#define ES8388_DACCONTROL13 0x23
|
||||
#define ES8388_DACCONTROL14 0x24
|
||||
#define ES8388_DACCONTROL15 0x25
|
||||
#define ES8388_DACCONTROL16 0x26
|
||||
#define ES8388_DACCONTROL17 0x27
|
||||
#define ES8388_DACCONTROL18 0x28
|
||||
#define ES8388_DACCONTROL19 0x29
|
||||
#define ES8388_DACCONTROL20 0x2a
|
||||
#define ES8388_DACCONTROL21 0x2b
|
||||
#define ES8388_DACCONTROL22 0x2c
|
||||
#define ES8388_DACCONTROL23 0x2d
|
||||
#define ES8388_DACCONTROL24 0x2e
|
||||
#define ES8388_DACCONTROL25 0x2f
|
||||
#define ES8388_DACCONTROL26 0x30
|
||||
#define ES8388_DACCONTROL27 0x31
|
||||
#define ES8388_DACCONTROL28 0x32
|
||||
#define ES8388_DACCONTROL29 0x33
|
||||
#define ES8388_DACCONTROL30 0x34
|
||||
|
||||
enum es8388_mode
|
||||
{
|
||||
ES_MODE_NONE = 0x00,
|
||||
ES_MODE_DAC = 0x01,
|
||||
ES_MODE_ADC = 0x02,
|
||||
ES_MODE_DAC_ADC = 0x03,
|
||||
ES_MODE_LINE = 0x04,
|
||||
ES_MODE_MAX = 0x06,
|
||||
};
|
||||
|
||||
enum es8388_format
|
||||
{
|
||||
ES_FMT_NORMAL = 0,
|
||||
ES_FMT_LEFT = 1,
|
||||
ES_FMT_RIGHT = 2,
|
||||
ES_FMT_DSP = 3,
|
||||
};
|
||||
|
||||
rt_err_t es8388_init(const char *i2c_name, rt_uint16_t pin);
|
||||
rt_err_t es8388_start(enum es8388_mode mode);
|
||||
rt_err_t es8388_stop(enum es8388_mode mode);
|
||||
rt_err_t es8388_fmt_set(enum es8388_mode mode, enum es8388_format fmt);
|
||||
void es8388_volume_set(rt_uint8_t volume);
|
||||
rt_uint8_t es8388_volume_get(void);
|
||||
void es8388_pa_power(rt_bool_t enable);
|
||||
|
||||
#endif
|
||||
366
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_mic.c
Normal file
366
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_mic.c
Normal file
@@ -0,0 +1,366 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Date Author Notes
|
||||
* 2019-07-31 Zero-Free first implementation
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
|
||||
#include "drv_es8388.h"
|
||||
|
||||
#define DBG_TAG "drv.mic"
|
||||
#define DBG_LVL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define RX_FIFO_SIZE (1024)
|
||||
|
||||
struct mic_device
|
||||
{
|
||||
struct rt_audio_device audio;
|
||||
struct rt_audio_configure record_config;
|
||||
rt_uint8_t *rx_fifo;
|
||||
rt_uint8_t volume;
|
||||
};
|
||||
|
||||
static struct mic_device mic_dev = {0};
|
||||
static rt_uint16_t zero_frame[2] = {0};
|
||||
static I2S_HandleTypeDef I2S3_Handler = {0};
|
||||
static DMA_HandleTypeDef I2S3_RXDMA_Handler = {0};
|
||||
|
||||
static void I2S3_Init(void)
|
||||
{
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||
PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_I2S;
|
||||
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
|
||||
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
HAL_I2S_DeInit(&I2S3_Handler);
|
||||
|
||||
I2S3_Handler.Instance = I2S3ext;
|
||||
I2S3_Handler.Init.Mode = I2S_MODE_SLAVE_RX;
|
||||
I2S3_Handler.Init.Standard = I2S_STANDARD_PHILIPS;
|
||||
I2S3_Handler.Init.DataFormat = I2S_DATAFORMAT_16B;
|
||||
I2S3_Handler.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
|
||||
I2S3_Handler.Init.AudioFreq = I2S_AUDIOFREQ_DEFAULT;
|
||||
I2S3_Handler.Init.CPOL = I2S_CPOL_LOW;
|
||||
I2S3_Handler.Init.ClockSource = I2S_CLOCK_PLL;
|
||||
I2S3_Handler.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_ENABLE;
|
||||
if (HAL_I2S_Init(&I2S3_Handler) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
SET_BIT(I2S3_Handler.Instance->CR2, SPI_CR2_RXDMAEN);
|
||||
__HAL_I2S_ENABLE(&I2S3_Handler);
|
||||
|
||||
/* Configure DMA used for I2S3 */
|
||||
__HAL_RCC_DMA1_CLK_ENABLE();
|
||||
I2S3_RXDMA_Handler.Instance = DMA1_Stream2;
|
||||
I2S3_RXDMA_Handler.Init.Channel = DMA_CHANNEL_2;
|
||||
I2S3_RXDMA_Handler.Init.Direction = DMA_PERIPH_TO_MEMORY;
|
||||
I2S3_RXDMA_Handler.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
I2S3_RXDMA_Handler.Init.MemInc = DMA_MINC_ENABLE;
|
||||
I2S3_RXDMA_Handler.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
I2S3_RXDMA_Handler.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||
I2S3_RXDMA_Handler.Init.Mode = DMA_CIRCULAR;
|
||||
I2S3_RXDMA_Handler.Init.Priority = DMA_PRIORITY_MEDIUM;
|
||||
I2S3_RXDMA_Handler.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
|
||||
__HAL_LINKDMA(&I2S3_Handler,hdmarx,I2S3_RXDMA_Handler);
|
||||
HAL_DMA_DeInit(&I2S3_RXDMA_Handler);
|
||||
HAL_DMA_Init(&I2S3_RXDMA_Handler);
|
||||
|
||||
__HAL_DMA_DISABLE(&I2S3_RXDMA_Handler);
|
||||
__HAL_DMA_ENABLE_IT(&I2S3_RXDMA_Handler, DMA_IT_TC); /* 开启传输完成中断 */
|
||||
__HAL_DMA_CLEAR_FLAG(&I2S3_RXDMA_Handler, DMA_FLAG_TCIF2_6);
|
||||
|
||||
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
|
||||
}
|
||||
|
||||
void DMA1_Stream2_IRQHandler(void)
|
||||
{
|
||||
rt_audio_rx_done(&mic_dev.audio, &mic_dev.rx_fifo[0], RX_FIFO_SIZE);
|
||||
HAL_DMA_IRQHandler(&I2S3_RXDMA_Handler);
|
||||
}
|
||||
|
||||
static rt_err_t mic_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
struct mic_device *mic_dev;
|
||||
|
||||
RT_ASSERT(audio != RT_NULL);
|
||||
mic_dev = (struct mic_device *)audio->parent.user_data;
|
||||
|
||||
switch (caps->main_type)
|
||||
{
|
||||
case AUDIO_TYPE_QUERY: /* qurey the types of hw_codec device */
|
||||
{
|
||||
switch (caps->sub_type)
|
||||
{
|
||||
case AUDIO_TYPE_QUERY:
|
||||
caps->udata.mask = AUDIO_TYPE_INPUT | AUDIO_TYPE_MIXER;
|
||||
break;
|
||||
|
||||
default:
|
||||
result = -RT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case AUDIO_TYPE_INPUT: /* Provide capabilities of INPUT unit */
|
||||
{
|
||||
switch (caps->sub_type)
|
||||
{
|
||||
case AUDIO_DSP_PARAM:
|
||||
caps->udata.config.samplerate = mic_dev->record_config.samplerate;
|
||||
caps->udata.config.channels = mic_dev->record_config.channels;
|
||||
caps->udata.config.samplebits = mic_dev->record_config.samplebits;
|
||||
break;
|
||||
|
||||
case AUDIO_DSP_SAMPLERATE:
|
||||
caps->udata.config.samplerate = mic_dev->record_config.samplerate;
|
||||
break;
|
||||
|
||||
case AUDIO_DSP_CHANNELS:
|
||||
caps->udata.config.channels = mic_dev->record_config.channels;
|
||||
break;
|
||||
|
||||
case AUDIO_DSP_SAMPLEBITS:
|
||||
caps->udata.config.samplebits = mic_dev->record_config.samplebits;
|
||||
break;
|
||||
|
||||
default:
|
||||
result = -RT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case AUDIO_TYPE_MIXER: /* report the Mixer Units */
|
||||
{
|
||||
switch (caps->sub_type)
|
||||
{
|
||||
case AUDIO_MIXER_QUERY:
|
||||
caps->udata.mask = AUDIO_MIXER_VOLUME | AUDIO_MIXER_LINE;
|
||||
break;
|
||||
|
||||
case AUDIO_MIXER_VOLUME:
|
||||
caps->udata.value = mic_dev->volume;
|
||||
break;
|
||||
|
||||
case AUDIO_MIXER_LINE:
|
||||
break;
|
||||
|
||||
default:
|
||||
result = -RT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
result = -RT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static rt_err_t mic_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
struct mic_device *mic_dev;
|
||||
|
||||
RT_ASSERT(audio != RT_NULL);
|
||||
mic_dev = (struct mic_device *)audio->parent.user_data;
|
||||
|
||||
switch (caps->main_type)
|
||||
{
|
||||
case AUDIO_TYPE_MIXER:
|
||||
{
|
||||
switch (caps->sub_type)
|
||||
{
|
||||
case AUDIO_MIXER_VOLUME:
|
||||
{
|
||||
rt_uint32_t volume = caps->udata.value;
|
||||
mic_dev->volume = volume;
|
||||
LOG_D("set volume %d", volume);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
result = -RT_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case AUDIO_TYPE_INPUT:
|
||||
{
|
||||
switch (caps->sub_type)
|
||||
{
|
||||
case AUDIO_DSP_PARAM:
|
||||
{
|
||||
// SAIA_Frequency_Set(caps->udata.config.samplerate);
|
||||
HAL_I2S_DMAStop(&I2S3_Handler);
|
||||
// SAIB_Channels_Set(caps->udata.config.channels);
|
||||
HAL_I2S_Transmit(&I2S3_Handler, (uint16_t *)&zero_frame[0], 2, 0);
|
||||
HAL_I2S_Receive_DMA(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2);
|
||||
|
||||
/* save configs */
|
||||
mic_dev->record_config.samplerate = caps->udata.config.samplerate;
|
||||
mic_dev->record_config.channels = caps->udata.config.channels;
|
||||
mic_dev->record_config.samplebits = caps->udata.config.samplebits;
|
||||
LOG_D("set samplerate %d", mic_dev->record_config.samplerate);
|
||||
LOG_D("set channels %d", mic_dev->record_config.channels);
|
||||
break;
|
||||
}
|
||||
|
||||
case AUDIO_DSP_SAMPLERATE:
|
||||
{
|
||||
mic_dev->record_config.samplerate = caps->udata.config.samplerate;
|
||||
LOG_D("set channels %d", mic_dev->record_config.channels);
|
||||
break;
|
||||
}
|
||||
|
||||
case AUDIO_DSP_CHANNELS:
|
||||
{
|
||||
mic_dev->record_config.channels = caps->udata.config.channels;
|
||||
LOG_D("set channels %d", mic_dev->record_config.channels);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static rt_err_t mic_init(struct rt_audio_device *audio)
|
||||
{
|
||||
struct mic_device *mic_dev;
|
||||
|
||||
RT_ASSERT(audio != RT_NULL);
|
||||
mic_dev = (struct mic_device *)audio->parent.user_data;
|
||||
|
||||
es8388_init("i2c2", RT_NULL);
|
||||
I2S3_Init();
|
||||
LOG_I("ES8388 init success.");
|
||||
/* set default params */
|
||||
// SAIB_Channels_Set(mic_dev->record_config.channels);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
static rt_err_t sound_init(struct rt_audio_device *audio)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
struct sound_device *snd_dev;
|
||||
|
||||
RT_ASSERT(audio != RT_NULL);
|
||||
snd_dev = (struct sound_device *)audio->parent.user_data;
|
||||
|
||||
I2S3_Init();
|
||||
es8388_init("i2c2", RT_NULL);
|
||||
/* set default params */
|
||||
// I2S_Frequency_Set(snd_dev->replay_config.samplerate);
|
||||
// SAIA_Channels_Set(snd_dev->replay_config.channels);
|
||||
|
||||
return result;
|
||||
}
|
||||
static rt_err_t mic_start(struct rt_audio_device *audio, int stream)
|
||||
{
|
||||
struct mic_device *mic_dev;
|
||||
|
||||
RT_ASSERT(audio != RT_NULL);
|
||||
mic_dev = (struct mic_device *)audio->parent.user_data;
|
||||
|
||||
if (stream == AUDIO_STREAM_RECORD)
|
||||
{
|
||||
es8388_start(ES_MODE_ADC);
|
||||
HAL_I2S_Transmit(&I2S3_Handler, (uint16_t *)&zero_frame[0], 2, 0);
|
||||
// HAL_I2S_Receive_DMA(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2);
|
||||
while(1)
|
||||
{
|
||||
HAL_I2S_Receive(&I2S3_Handler, (uint16_t *)mic_dev->rx_fifo, RX_FIFO_SIZE / 2,10);
|
||||
for(int i=0;i<RX_FIFO_SIZE;i++)
|
||||
{
|
||||
rt_kprintf("%x",mic_dev->rx_fifo[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t mic_stop(struct rt_audio_device *audio, int stream)
|
||||
{
|
||||
if (stream == AUDIO_STREAM_RECORD)
|
||||
{
|
||||
HAL_I2S_DMAStop(&I2S3_Handler);
|
||||
es8388_stop(ES_MODE_ADC);
|
||||
LOG_D("mic stop.");
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static struct rt_audio_ops mic_ops =
|
||||
{
|
||||
.getcaps = mic_getcaps,
|
||||
.configure = mic_configure,
|
||||
.init = mic_init,
|
||||
.start = mic_start,
|
||||
.stop = mic_stop,
|
||||
.transmit = RT_NULL,
|
||||
.buffer_info = RT_NULL,
|
||||
};
|
||||
|
||||
int rt_hw_mic_init(void)
|
||||
{
|
||||
rt_uint8_t *rx_fifo;
|
||||
|
||||
if (mic_dev.rx_fifo)
|
||||
return RT_EOK;
|
||||
|
||||
rx_fifo = rt_malloc(RX_FIFO_SIZE);
|
||||
if (rx_fifo == RT_NULL)
|
||||
return -RT_ENOMEM;
|
||||
rt_memset(rx_fifo, 0, RX_FIFO_SIZE);
|
||||
mic_dev.rx_fifo = rx_fifo;
|
||||
|
||||
/* init default configuration */
|
||||
{
|
||||
mic_dev.record_config.samplerate = 44100;
|
||||
mic_dev.record_config.channels = 2;
|
||||
mic_dev.record_config.samplebits = 16;
|
||||
mic_dev.volume = 55;
|
||||
}
|
||||
|
||||
/* register sound device */
|
||||
mic_dev.audio.ops = &mic_ops;
|
||||
rt_audio_register(&mic_dev.audio, "mic0", RT_DEVICE_FLAG_RDONLY, &mic_dev);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
INIT_DEVICE_EXPORT(rt_hw_mic_init);
|
||||
514
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_sound.c
Normal file
514
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_sound.c
Normal file
File diff suppressed because it is too large
Load Diff
16
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_sound.h
Normal file
16
bsp/stm32/stm32f407-rt-spark/board/ports/audio/drv_sound.h
Normal file
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Date Author Notes
|
||||
* 2019-07-31 Zero-Free first implementation
|
||||
*/
|
||||
|
||||
#ifndef __DRV_SOUND_H__
|
||||
#define __DRV_SOUND_H__
|
||||
|
||||
int rt_hw_sound_init(void);
|
||||
int rt_hw_mic_init(void);
|
||||
|
||||
#endif
|
||||
34
bsp/stm32/stm32f407-rt-spark/board/ports/drv_enc28j60.c
Normal file
34
bsp/stm32/stm32f407-rt-spark/board/ports/drv_enc28j60.c
Normal file
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-08-27 ZYLX the first version
|
||||
*/
|
||||
|
||||
#include <drivers/pin.h>
|
||||
#include <enc28j60.h>
|
||||
#include "drv_spi.h"
|
||||
#include "board.h"
|
||||
|
||||
#define PIN_NRF_IRQ GET_PIN(E,2)
|
||||
|
||||
|
||||
int enc28j60_init(void)
|
||||
{
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
rt_hw_spi_device_attach("spi1", "spi11", GPIOA, GPIO_PIN_4);
|
||||
|
||||
/* attach enc28j60 to spi. spi11 cs - PA4 */
|
||||
enc28j60_attach("spi11");
|
||||
|
||||
/* init interrupt pin */
|
||||
rt_pin_mode(PIN_NRF_IRQ, PIN_MODE_INPUT_PULLUP);
|
||||
rt_pin_attach_irq(PIN_NRF_IRQ, PIN_IRQ_MODE_FALLING, (void(*)(void*))enc28j60_isr, RT_NULL);
|
||||
rt_pin_irq_enable(PIN_NRF_IRQ, PIN_IRQ_ENABLE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(enc28j60_init);
|
||||
123
bsp/stm32/stm32f407-rt-spark/board/ports/drv_filesystem.c
Normal file
123
bsp/stm32/stm32f407-rt-spark/board/ports/drv_filesystem.c
Normal file
@@ -0,0 +1,123 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-13 balanceTWK add sdcard port file
|
||||
* 2021-05-10 Meco Man fix a bug that cannot use fatfs in the main thread at starting up
|
||||
* 2021-07-28 Meco Man implement romfs as the root filesystem
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <dfs_romfs.h>
|
||||
#include <dfs_fs.h>
|
||||
#include <dfs_file.h>
|
||||
|
||||
#if DFS_FILESYSTEMS_MAX < 4
|
||||
#error "Please define DFS_FILESYSTEMS_MAX more than 4"
|
||||
#endif
|
||||
#if DFS_FILESYSTEM_TYPES_MAX < 4
|
||||
#error "Please define DFS_FILESYSTEM_TYPES_MAX more than 4"
|
||||
#endif
|
||||
|
||||
#define DBG_TAG "app.filesystem"
|
||||
#define DBG_LVL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
#ifdef BSP_USING_FS_AUTO_MOUNT
|
||||
#ifdef BSP_USING_SDCARD_FATFS
|
||||
static int onboard_sdcard_mount(void)
|
||||
{
|
||||
if (dfs_mount("sd0", "/sdcard", "elm", 0, 0) == RT_EOK)
|
||||
{
|
||||
LOG_I("SD card mount to '/sdcard'");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("SD card mount to '/sdcard' failed!");
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
#endif /* BSP_USING_SDCARD_FATFS */
|
||||
#endif /* BSP_USING_FS_AUTO_MOUNT */
|
||||
|
||||
#ifdef BSP_USING_FLASH_FS_AUTO_MOUNT
|
||||
#ifdef BSP_USING_FLASH_FATFS
|
||||
#define FS_PARTITION_NAME "filesystem"
|
||||
|
||||
static int onboard_fal_mount(void)
|
||||
{
|
||||
/* 初始化 fal 功能 */
|
||||
extern int fal_init(void);
|
||||
extern struct rt_device *fal_blk_device_create(const char *parition_name);
|
||||
fal_init();
|
||||
/* 在 spi flash 中名为 "filesystem" 的分区上创建一个块设备 */
|
||||
struct rt_device *flash_dev = fal_blk_device_create(FS_PARTITION_NAME);
|
||||
if (flash_dev == NULL)
|
||||
{
|
||||
LOG_E("Can't create a block device on '%s' partition.", FS_PARTITION_NAME);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_D("Create a block device on the %s partition of flash successful.", FS_PARTITION_NAME);
|
||||
}
|
||||
|
||||
/* 挂载 spi flash 中名为 "filesystem" 的分区上的文件系统 */
|
||||
if (dfs_mount(flash_dev->parent.name, "/fal", "elm", 0, 0) == 0)
|
||||
{
|
||||
LOG_I("Filesystem initialized!");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("Failed to initialize filesystem!");
|
||||
LOG_D("You should create a filesystem on the block device first!");
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
#endif /*BSP_USING_FLASH_FATFS*/
|
||||
#endif /*BSP_USING_FLASH_FS_AUTO_MOUNT*/
|
||||
|
||||
|
||||
const struct romfs_dirent _romfs_root[] =
|
||||
{
|
||||
#ifdef BSP_USING_SDCARD_FATFS
|
||||
{ROMFS_DIRENT_DIR, "sdcard", RT_NULL, 0},
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_FLASH_FATFS
|
||||
{ROMFS_DIRENT_DIR, "fal", RT_NULL, 0},
|
||||
#endif
|
||||
};
|
||||
|
||||
const struct romfs_dirent romfs_root =
|
||||
{
|
||||
ROMFS_DIRENT_DIR, "/", (rt_uint8_t *)_romfs_root, sizeof(_romfs_root) / sizeof(_romfs_root[0])
|
||||
};
|
||||
|
||||
static int filesystem_mount(void)
|
||||
{
|
||||
|
||||
#ifdef BSP_USING_FS
|
||||
if (dfs_mount(RT_NULL, "/", "rom", 0, &(romfs_root)) != 0)
|
||||
{
|
||||
LOG_E("rom mount to '/' failed!");
|
||||
}
|
||||
|
||||
/* 确保块设备注册成功之后再挂载文件系统 */
|
||||
rt_thread_delay(500);
|
||||
#endif
|
||||
#ifdef BSP_USING_FS_AUTO_MOUNT
|
||||
onboard_sdcard_mount();
|
||||
#endif /* BSP_USING_FS_AUTO_MOUNT */
|
||||
|
||||
#ifdef BSP_USING_FLASH_FS_AUTO_MOUNT
|
||||
onboard_fal_mount();
|
||||
#endif
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_APP_EXPORT(filesystem_mount);
|
||||
210
bsp/stm32/stm32f407-rt-spark/board/ports/ef_fal_port.c
Normal file
210
bsp/stm32/stm32f407-rt-spark/board/ports/ef_fal_port.c
Normal file
@@ -0,0 +1,210 @@
|
||||
/*
|
||||
* This file is part of the EasyFlash Library.
|
||||
*
|
||||
* Copyright (c) 2015, Armink, <armink.ztl@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining
|
||||
* a copy of this software and associated documentation files (the
|
||||
* 'Software'), to deal in the Software without restriction, including
|
||||
* without limitation the rights to use, copy, modify, merge, publish,
|
||||
* distribute, sublicense, and/or sell copies of the Software, and to
|
||||
* permit persons to whom the Software is furnished to do so, subject to
|
||||
* the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Function: Portable interface for FAL (Flash Abstraction Layer) partition.
|
||||
* Created on: 2018-05-19
|
||||
*/
|
||||
|
||||
#include <easyflash.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdarg.h>
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <fal.h>
|
||||
|
||||
/* EasyFlash partition name on FAL partition table */
|
||||
#define FAL_EF_PART_NAME "easyflash"
|
||||
|
||||
/* default ENV set for user */
|
||||
static const ef_env default_env_set[] = {
|
||||
{"iap_need_copy_app", "0"},
|
||||
{"iap_need_crc32_check", "0"},
|
||||
{"iap_copy_app_size", "0"},
|
||||
{"stop_in_bootloader", "0"},
|
||||
};
|
||||
|
||||
static char log_buf[RT_CONSOLEBUF_SIZE];
|
||||
static struct rt_semaphore env_cache_lock;
|
||||
static const struct fal_partition *part = NULL;
|
||||
|
||||
/**
|
||||
* Flash port for hardware initialize.
|
||||
*
|
||||
* @param default_env default ENV set for user
|
||||
* @param default_env_size default ENV size
|
||||
*
|
||||
* @return result
|
||||
*/
|
||||
EfErrCode ef_port_init(ef_env const **default_env, size_t *default_env_size) {
|
||||
EfErrCode result = EF_NO_ERR;
|
||||
|
||||
*default_env = default_env_set;
|
||||
*default_env_size = sizeof(default_env_set) / sizeof(default_env_set[0]);
|
||||
|
||||
rt_sem_init(&env_cache_lock, "env lock", 1, RT_IPC_FLAG_PRIO);
|
||||
|
||||
part = fal_partition_find(FAL_EF_PART_NAME);
|
||||
EF_ASSERT(part);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* Read data from flash.
|
||||
* @note This operation's units is word.
|
||||
*
|
||||
* @param addr flash address
|
||||
* @param buf buffer to store read data
|
||||
* @param size read bytes size
|
||||
*
|
||||
* @return result
|
||||
*/
|
||||
EfErrCode ef_port_read(uint32_t addr, uint32_t *buf, size_t size) {
|
||||
EfErrCode result = EF_NO_ERR;
|
||||
|
||||
fal_partition_read(part, addr, (uint8_t *)buf, size);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* Erase data on flash.
|
||||
* @note This operation is irreversible.
|
||||
* @note This operation's units is different which on many chips.
|
||||
*
|
||||
* @param addr flash address
|
||||
* @param size erase bytes size
|
||||
*
|
||||
* @return result
|
||||
*/
|
||||
EfErrCode ef_port_erase(uint32_t addr, size_t size) {
|
||||
EfErrCode result = EF_NO_ERR;
|
||||
|
||||
/* make sure the start address is a multiple of FLASH_ERASE_MIN_SIZE */
|
||||
EF_ASSERT(addr % EF_ERASE_MIN_SIZE == 0);
|
||||
|
||||
if (fal_partition_erase(part, addr, size) < 0)
|
||||
{
|
||||
result = EF_ERASE_ERR;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
/**
|
||||
* Write data to flash.
|
||||
* @note This operation's units is word.
|
||||
* @note This operation must after erase. @see flash_erase.
|
||||
*
|
||||
* @param addr flash address
|
||||
* @param buf the write data buffer
|
||||
* @param size write bytes size
|
||||
*
|
||||
* @return result
|
||||
*/
|
||||
EfErrCode ef_port_write(uint32_t addr, const uint32_t *buf, size_t size) {
|
||||
EfErrCode result = EF_NO_ERR;
|
||||
|
||||
if (fal_partition_write(part, addr, (uint8_t *)buf, size) < 0)
|
||||
{
|
||||
result = EF_WRITE_ERR;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* lock the ENV ram cache
|
||||
*/
|
||||
void ef_port_env_lock(void) {
|
||||
rt_sem_take(&env_cache_lock, RT_WAITING_FOREVER);
|
||||
}
|
||||
|
||||
/**
|
||||
* unlock the ENV ram cache
|
||||
*/
|
||||
void ef_port_env_unlock(void) {
|
||||
rt_sem_release(&env_cache_lock);
|
||||
}
|
||||
|
||||
/**
|
||||
* This function is print flash debug info.
|
||||
*
|
||||
* @param file the file which has call this function
|
||||
* @param line the line number which has call this function
|
||||
* @param format output format
|
||||
* @param ... args
|
||||
*
|
||||
*/
|
||||
void ef_log_debug(const char *file, const long line, const char *format, ...) {
|
||||
|
||||
#ifdef PRINT_DEBUG
|
||||
|
||||
va_list args;
|
||||
|
||||
/* args point to the first variable parameter */
|
||||
va_start(args, format);
|
||||
ef_print("[Flash] (%s:%ld) ", file, line);
|
||||
/* must use vprintf to print */
|
||||
rt_vsprintf(log_buf, format, args);
|
||||
ef_print("%s", log_buf);
|
||||
va_end(args);
|
||||
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* This function is print flash routine info.
|
||||
*
|
||||
* @param format output format
|
||||
* @param ... args
|
||||
*/
|
||||
void ef_log_info(const char *format, ...) {
|
||||
va_list args;
|
||||
|
||||
/* args point to the first variable parameter */
|
||||
va_start(args, format);
|
||||
ef_print("[Flash] ");
|
||||
/* must use vprintf to print */
|
||||
rt_vsprintf(log_buf, format, args);
|
||||
ef_print("%s", log_buf);
|
||||
va_end(args);
|
||||
}
|
||||
/**
|
||||
* This function is print flash non-package info.
|
||||
*
|
||||
* @param format output format
|
||||
* @param ... args
|
||||
*/
|
||||
void ef_print(const char *format, ...) {
|
||||
va_list args;
|
||||
|
||||
/* args point to the first variable parameter */
|
||||
va_start(args, format);
|
||||
/* must use vprintf to print */
|
||||
rt_vsprintf(log_buf, format, args);
|
||||
rt_kprintf("%s", log_buf);
|
||||
va_end(args);
|
||||
}
|
||||
59
bsp/stm32/stm32f407-rt-spark/board/ports/fal/fal_cfg.h
Normal file
59
bsp/stm32/stm32f407-rt-spark/board/ports/fal/fal_cfg.h
Normal file
@@ -0,0 +1,59 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-5 SummerGift first version
|
||||
*/
|
||||
|
||||
#ifndef _FAL_CFG_H_
|
||||
#define _FAL_CFG_H_
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
#define FLASH_SIZE_GRANULARITY_16K (4 * 16 * 1024)
|
||||
#define FLASH_SIZE_GRANULARITY_64K (8 * 64 * 1024)
|
||||
#define FLASH_SIZE_GRANULARITY_128K (8 * 128 * 1024)
|
||||
#define STM32_FLASH_START_ADRESS_16K STM32_FLASH_START_ADRESS
|
||||
#define STM32_FLASH_START_ADRESS_64K STM32_FLASH_START_ADRESS
|
||||
#define STM32_FLASH_START_ADRESS_128K STM32_FLASH_START_ADRESS
|
||||
|
||||
extern const struct fal_flash_dev stm32_onchip_flash_16k;
|
||||
extern const struct fal_flash_dev stm32_onchip_flash_64k;
|
||||
extern const struct fal_flash_dev stm32_onchip_flash_128k;
|
||||
extern struct fal_flash_dev w25q64;
|
||||
|
||||
/* flash device table */
|
||||
#define FAL_FLASH_DEV_TABLE \
|
||||
{ \
|
||||
&stm32_onchip_flash_128k, \
|
||||
&w25q64, \
|
||||
}
|
||||
|
||||
/* ====================== Partition Configuration ========================== */
|
||||
#ifdef BSP_USING_BOOTLOADER
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_128k", 0, 128 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 128 * 1024, 384 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "easyflash", "W25Q64", 0, 512 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "download", "W25Q64", 512 * 1024, 1024 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "wifi_image", "W25Q64", (512 + 1024) * 1024, 512 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "font", "W25Q64", (512 + 1024 + 512) * 1024, 3 * 1024 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "filesystem", "W25Q64", (512 + 1024 + 512 + 3 * 1024) * 1024, 3 * 1024 * 1024, 0}, \
|
||||
}
|
||||
#else
|
||||
#define FAL_PART_TABLE \
|
||||
{ \
|
||||
{FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0, 384 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "param", "onchip_flash_128k", 384 * 1024, 640 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "easyflash", "W25Q64", 0, 512 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "download", "W25Q64", 512 * 1024, 1024 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "wifi_image", "W25Q64", (512 + 1024) * 1024, 512 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "font", "W25Q64", (512 + 1024 + 512) * 1024, 3 * 1024 * 1024, 0}, \
|
||||
{FAL_PART_MAGIC_WROD, "filesystem", "W25Q64", (512 + 1024 + 512 + 3 * 1024) * 1024, 3 * 1024 * 1024, 0}, \
|
||||
}
|
||||
#endif /*FAL_PART_TABLE*/
|
||||
#endif /*BSP_USING_BOOTLOADER*/
|
||||
@@ -0,0 +1,80 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-08-07 Meco Man first version
|
||||
*/
|
||||
|
||||
#include <fal.h>
|
||||
#include <sfud.h>
|
||||
|
||||
#ifdef RT_USING_SFUD
|
||||
#include <spi_flash_sfud.h>
|
||||
#endif
|
||||
|
||||
static int init(void);
|
||||
static int read(long offset, uint8_t *buf, size_t size);
|
||||
static int write(long offset, const uint8_t *buf, size_t size);
|
||||
static int erase(long offset, size_t size);
|
||||
|
||||
static sfud_flash_t sfud_dev = NULL;
|
||||
struct fal_flash_dev w25q64 =
|
||||
{
|
||||
.name = "W25Q64",
|
||||
.addr = 0,
|
||||
.len = 8 * 1024 * 1024,
|
||||
.blk_size = 4096,
|
||||
.ops = {init, read, write, erase},
|
||||
.write_gran = 1
|
||||
};
|
||||
|
||||
static int init(void)
|
||||
{
|
||||
sfud_dev = rt_sfud_flash_find_by_dev_name("W25Q64");
|
||||
if (RT_NULL == sfud_dev)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* update the flash chip information */
|
||||
w25q64.blk_size = sfud_dev->chip.erase_gran;
|
||||
w25q64.len = sfud_dev->chip.capacity;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int read(long offset, uint8_t *buf, size_t size)
|
||||
{
|
||||
assert(sfud_dev);
|
||||
assert(sfud_dev->init_ok);
|
||||
sfud_read(sfud_dev, w25q64.addr + offset, size, buf);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
static int write(long offset, const uint8_t *buf, size_t size)
|
||||
{
|
||||
assert(sfud_dev);
|
||||
assert(sfud_dev->init_ok);
|
||||
if (sfud_write(sfud_dev, w25q64.addr + offset, size, buf) != SFUD_SUCCESS)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
static int erase(long offset, size_t size)
|
||||
{
|
||||
assert(sfud_dev);
|
||||
assert(sfud_dev->init_ok);
|
||||
if (sfud_erase(sfud_dev, w25q64.addr + offset, size) != SFUD_SUCCESS)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
1489
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd.c
Normal file
1489
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd.c
Normal file
File diff suppressed because it is too large
Load Diff
109
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd.h
Normal file
109
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd.h
Normal file
@@ -0,0 +1,109 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-12-28 unknow copy by STemwin
|
||||
*/
|
||||
#ifndef __DRV_LCD_H
|
||||
#define __DRV_LCD_H
|
||||
#include <rtthread.h>
|
||||
#include "rtdevice.h"
|
||||
#include <drv_common.h>
|
||||
#ifdef PKG_USING_QRCODE
|
||||
#include <qrcode.h>
|
||||
#endif
|
||||
|
||||
#define LCD_BASE ((uint32_t)(0x68000000 | 0x0003FFFE)) // A18 link to DCX
|
||||
#define LCD ((LCD_CONTROLLER_TypeDef *)LCD_BASE)
|
||||
#define LCD_W 240
|
||||
#define LCD_H 240
|
||||
|
||||
//LCD重要参数集
|
||||
typedef struct
|
||||
{
|
||||
uint16_t width; //LCD 宽度
|
||||
uint16_t height; //LCD 高度
|
||||
uint16_t id; //LCD ID
|
||||
uint8_t dir; //横屏还是竖屏控制：0，竖屏；1，横屏。
|
||||
uint16_t wramcmd; //开始写gram指令
|
||||
uint16_t setxcmd; //设置x坐标指令
|
||||
uint16_t setycmd; //设置y坐标指令
|
||||
}_lcd_dev;
|
||||
|
||||
//LCD参数
|
||||
extern _lcd_dev lcddev; //管理LCD重要参数
|
||||
|
||||
typedef struct
|
||||
{
|
||||
volatile uint8_t _u8_REG;
|
||||
volatile uint8_t RESERVED;
|
||||
volatile uint8_t _u8_RAM;
|
||||
volatile uint16_t _u16_RAM;
|
||||
}LCD_CONTROLLER_TypeDef;
|
||||
|
||||
|
||||
//POINT_COLOR
|
||||
#define WHITE 0xFFFF
|
||||
#define BLACK 0x0000
|
||||
#define BLUE 0x001F
|
||||
#define BRED 0XF81F
|
||||
#define GRED 0XFFE0
|
||||
#define GBLUE 0X07FF
|
||||
#define RED 0xF800
|
||||
#define MAGENTA 0xF81F
|
||||
#define GREEN 0x07E0
|
||||
#define CYAN 0x7FFF
|
||||
#define YELLOW 0xFFE0
|
||||
#define BROWN 0XBC40
|
||||
#define BRRED 0XFC07
|
||||
#define GRAY 0X8430
|
||||
#define GRAY175 0XAD75
|
||||
#define GRAY151 0X94B2
|
||||
#define GRAY187 0XBDD7
|
||||
#define GRAY240 0XF79E
|
||||
|
||||
//扫描方向定义
|
||||
#define L2R_U2D 0 //从左到右,从上到下
|
||||
#define L2R_D2U 1 //从左到右,从下到上
|
||||
#define R2L_U2D 2 //从右到左,从上到下
|
||||
#define R2L_D2U 3 //从右到左,从下到上
|
||||
|
||||
#define U2D_L2R 4 //从上到下,从左到右
|
||||
#define U2D_R2L 5 //从上到下,从右到左
|
||||
#define D2U_L2R 6 //从下到上,从左到右
|
||||
#define D2U_R2L 7 //从下到上,从右到左
|
||||
|
||||
int drv_lcd_init(void);
|
||||
void lcd_clear(rt_uint16_t color);
|
||||
void lcd_address_set(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
|
||||
void lcd_set_color(rt_uint16_t back, rt_uint16_t fore);
|
||||
|
||||
rt_uint16_t change_byte_order(rt_uint16_t word);
|
||||
void lcd_draw_point(rt_uint16_t x, rt_uint16_t y);
|
||||
void lcd_draw_circle(rt_uint16_t x0, rt_uint16_t y0, rt_uint8_t r);
|
||||
void lcd_draw_line(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
|
||||
void lcd_draw_rectangle(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
|
||||
void lcd_fill(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, rt_uint16_t color);
|
||||
|
||||
void lcd_address_set(rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
|
||||
rt_err_t lcd_write_half_word(const rt_uint16_t da);
|
||||
rt_err_t lcd_write_data_buffer(const void *send_buf, rt_size_t length);
|
||||
|
||||
void lcd_show_num(rt_uint16_t x, rt_uint16_t y, rt_uint32_t num, rt_uint8_t len, rt_uint32_t size);
|
||||
rt_err_t lcd_show_string(rt_uint16_t x, rt_uint16_t y, rt_uint32_t size, const char *fmt, ...);
|
||||
rt_err_t lcd_show_image(rt_uint16_t x, rt_uint16_t y, rt_uint16_t length, rt_uint16_t wide, const rt_uint8_t *p);
|
||||
#ifdef PKG_USING_QRCODE
|
||||
rt_err_t lcd_show_qrcode(rt_uint16_t x, rt_uint16_t y, rt_uint8_t version, rt_uint8_t ecc, const char *data, rt_uint8_t enlargement);
|
||||
#endif
|
||||
|
||||
void lcd_enter_sleep(void);
|
||||
void lcd_exit_sleep(void);
|
||||
void lcd_display_on(void);
|
||||
void lcd_display_off(void);
|
||||
|
||||
void lcd_fill_array(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, void *pcolor);
|
||||
|
||||
#endif
|
||||
795
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd_font.h
Normal file
795
bsp/stm32/stm32f407-rt-spark/board/ports/lcd/drv_lcd_font.h
Normal file
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,303 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-05-22 yuanjie first version, function
|
||||
*/
|
||||
|
||||
/**
|
||||
* WS2812B serial LED data timing flow:
|
||||
* | T0H | H | 350ns | ±150ns |
|
||||
* | T0L | L | 800ns | ±150ns |
|
||||
* | T1H | H | 700ns | ±150ns |
|
||||
* | T1L | L | 600ns | ±150ns |
|
||||
* | RES | L | ≥50us | -- |
|
||||
* When using TIM peripheral, to meet 800kHz (1250ns) refresh rate:
|
||||
* - period is: 1250ns
|
||||
* - logic 0 is: 400ns(H) + 900ns(L)
|
||||
* - logic 1 is: 900ns(H) + 400ns(L)
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
#include <drv_matrix_led.h>
|
||||
|
||||
#ifndef LED_NUM
|
||||
#define LED_NUM 19 // LED灯珠个数
|
||||
#endif
|
||||
#define LED_MATRIX_EN_PIN GET_PIN(F, 2)
|
||||
|
||||
TIM_HandleTypeDef htim3;
|
||||
DMA_HandleTypeDef hdma_tim3_ch2;
|
||||
|
||||
ALIGN(4)
|
||||
uint8_t led_buffer[LED_NUM * 24 * 2];
|
||||
|
||||
extern void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
|
||||
// 模拟bit码: 2为逻辑0, 7为逻辑1
|
||||
const uint8_t tile[] = {2, 7};
|
||||
|
||||
|
||||
// 常见颜色定义
|
||||
|
||||
const RGBColor_TypeDef DARK = {0, 0, 0};
|
||||
const RGBColor_TypeDef GREEN = {255, 0, 0};
|
||||
const RGBColor_TypeDef RED = {0, 255, 0};
|
||||
const RGBColor_TypeDef BLUE = {0, 0, 255};
|
||||
const RGBColor_TypeDef WHITE = {255, 255, 255};
|
||||
const RGBColor_TypeDef LT_RED = {0, 32, 0};
|
||||
const RGBColor_TypeDef LT_GREEN = {32, 0, 0};
|
||||
const RGBColor_TypeDef LT_BLUE = {0, 0, 32};
|
||||
const RGBColor_TypeDef LT_WHITE = {16, 16, 16};
|
||||
|
||||
// 灯颜色缓存
|
||||
RGBColor_TypeDef RGB_Data[LED_NUM] = {0};
|
||||
|
||||
void led_matrix_rst();
|
||||
/**
|
||||
* @brief This function handles DMA2 stream3 global interrupt.
|
||||
*/
|
||||
void DMA1_Stream5_IRQHandler(void)
|
||||
{
|
||||
HAL_DMA_IRQHandler(&hdma_tim3_ch2);
|
||||
}
|
||||
|
||||
void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
|
||||
{
|
||||
if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_2)
|
||||
{
|
||||
__HAL_TIM_SetCompare(htim, TIM_CHANNEL_2,0); //占空比清0
|
||||
}
|
||||
}
|
||||
/**
|
||||
* @brief matrix Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static int matrix_init(void)
|
||||
{
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
|
||||
/* TIM3_CH2 Init */
|
||||
__HAL_RCC_TIM3_CLK_ENABLE();
|
||||
|
||||
htim3.Instance = TIM3;
|
||||
htim3.Init.Prescaler = 10-1;
|
||||
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim3.Init.Period = 10-1; // 840kHz
|
||||
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim3.Init.RepetitionCounter = 0;
|
||||
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
sConfigOC.Pulse = 0;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
|
||||
HAL_TIM_MspPostInit(&htim3);
|
||||
|
||||
/* TIM3 DMA Init */
|
||||
__HAL_RCC_DMA1_CLK_ENABLE();
|
||||
|
||||
hdma_tim3_ch2.Instance = DMA1_Stream5;
|
||||
hdma_tim3_ch2.Init.Channel = DMA_CHANNEL_5;
|
||||
hdma_tim3_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||
hdma_tim3_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||
hdma_tim3_ch2.Init.MemInc = DMA_MINC_ENABLE;
|
||||
hdma_tim3_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
hdma_tim3_ch2.Init.MemDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
hdma_tim3_ch2.Init.Mode = DMA_NORMAL;
|
||||
hdma_tim3_ch2.Init.Priority = DMA_PRIORITY_HIGH;
|
||||
hdma_tim3_ch2.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_tim3_ch2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
__HAL_LINKDMA(&htim3, hdma[TIM_DMA_ID_CC2], hdma_tim3_ch2);
|
||||
|
||||
/* NVIC configuration for DMA transfer complete interrupt */
|
||||
HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
|
||||
|
||||
rt_pin_mode(LED_MATRIX_EN_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_write(LED_MATRIX_EN_PIN, PIN_LOW);
|
||||
led_matrix_rst();
|
||||
return RT_EOK;
|
||||
|
||||
}
|
||||
|
||||
INIT_APP_EXPORT(matrix_init);
|
||||
|
||||
/**
|
||||
* @brief 设置灯带颜色发送缓存
|
||||
* @param[in] ID 颜色
|
||||
*/
|
||||
void Set_LEDColor(uint16_t LedId, RGBColor_TypeDef Color)
|
||||
{
|
||||
RGB_Data[LedId].G = Color.G;
|
||||
RGB_Data[LedId].R = Color.R;
|
||||
RGB_Data[LedId].B = Color.B;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM发送控制ws2812
|
||||
* @param[in] 待发送缓存
|
||||
*/
|
||||
static void TIM_Send_WS2812(uint8_t *rgb_buffer, uint32_t size)
|
||||
{
|
||||
// 判断上次DMA有没有传输完成
|
||||
while (HAL_DMA_GetState(&hdma_tim3_ch2) != HAL_DMA_STATE_READY);
|
||||
// 发送一个24bit的RGB数据
|
||||
HAL_TIM_PWM_Start_DMA(&htim3, TIM_CHANNEL_2, (uint32_t *)rgb_buffer, size);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief 控制WS2812
|
||||
* @param[in] 待发送缓存
|
||||
*/
|
||||
|
||||
void RGB_Reflash(void)
|
||||
{
|
||||
uint8_t dat_b,dat_r,dat_g;
|
||||
// 将数组颜色转化为24个要发送的字节数据
|
||||
for (uint16_t i = 0; i < LED_NUM; i++)
|
||||
{
|
||||
dat_g = RGB_Data[i].G;
|
||||
dat_r = RGB_Data[i].R;
|
||||
dat_b = RGB_Data[i].B;
|
||||
for (uint16_t j = 0; j < 8; j++) {
|
||||
led_buffer[(14 + (i * 48))-(j<<1)] = tile[dat_g & 0x01];
|
||||
led_buffer[(14 + (i * 48))-(j<<1) + 1] = 0;
|
||||
led_buffer[(30 + (i * 48))-(j<<1)] = tile[dat_r & 0x01];
|
||||
led_buffer[(30 + (i * 48))-(j<<1) + 1] = 0;
|
||||
led_buffer[(46 + (i * 48))-(j<<1)] = tile[dat_b & 0x01];
|
||||
led_buffer[(46 + (i * 48))-(j<<1) + 1] = 0;
|
||||
dat_g >>=1;
|
||||
dat_r >>=1;
|
||||
dat_b >>=1;
|
||||
}
|
||||
}
|
||||
TIM_Send_WS2812(led_buffer, sizeof(led_buffer) / 2);
|
||||
|
||||
}
|
||||
void led_matrix_rst()
|
||||
{
|
||||
for (uint32_t i = 0; i < (LED_NUM * 24); i++)
|
||||
{
|
||||
led_buffer[ (i<<1) ] = 3;
|
||||
led_buffer[ (i<<1) + 1] = 0;
|
||||
}
|
||||
TIM_Send_WS2812(led_buffer, sizeof(led_buffer) / 2 );
|
||||
}
|
||||
|
||||
MSH_CMD_EXPORT(led_matrix_rst, Test led matrix on board)
|
||||
|
||||
void led_matrix_fill(RGBColor_TypeDef Color)
|
||||
{
|
||||
rt_memset(RGB_Data, 0x00, sizeof(RGB_Data));
|
||||
for (uint8_t i = 0; i < LED_NUM; i++)
|
||||
{
|
||||
Set_LEDColor(i, Color);
|
||||
}
|
||||
RGB_Reflash();
|
||||
}
|
||||
|
||||
void led_matrix_fill_test(uint8_t index)
|
||||
{
|
||||
switch (index)
|
||||
{
|
||||
case 0:
|
||||
led_matrix_fill(LT_RED);
|
||||
break;
|
||||
case 1:
|
||||
led_matrix_fill(LT_GREEN);
|
||||
break;
|
||||
case 2:
|
||||
led_matrix_fill(LT_BLUE);
|
||||
break;
|
||||
case 3:
|
||||
led_matrix_fill(LT_WHITE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void led_matrix_test1()
|
||||
{
|
||||
rt_memset(RGB_Data, 0x00, sizeof(RGB_Data));
|
||||
Set_LEDColor(0, RED);
|
||||
Set_LEDColor(1, GREEN);
|
||||
Set_LEDColor(2, BLUE);
|
||||
Set_LEDColor(3, RED);
|
||||
Set_LEDColor(4, GREEN);
|
||||
Set_LEDColor(5, BLUE);
|
||||
Set_LEDColor(6, RED);
|
||||
Set_LEDColor(7, GREEN);
|
||||
Set_LEDColor(8, BLUE);
|
||||
Set_LEDColor(9, WHITE);
|
||||
// led_matrix_rst();
|
||||
RGB_Reflash();
|
||||
}
|
||||
MSH_CMD_EXPORT(led_matrix_test1, Test led matrix on board)
|
||||
|
||||
void led_matrix_test2()
|
||||
{
|
||||
rt_memset(RGB_Data, 0x00, sizeof(RGB_Data));
|
||||
Set_LEDColor(0, BLUE);
|
||||
Set_LEDColor(1, RED);
|
||||
Set_LEDColor(2, GREEN);
|
||||
Set_LEDColor(3, BLUE);
|
||||
Set_LEDColor(4, RED);
|
||||
Set_LEDColor(5, GREEN);
|
||||
Set_LEDColor(6, BLUE);
|
||||
Set_LEDColor(7, RED);
|
||||
Set_LEDColor(8, GREEN);
|
||||
Set_LEDColor(9, RED);
|
||||
|
||||
Set_LEDColor(14, GREEN);
|
||||
Set_LEDColor(15, GREEN);
|
||||
Set_LEDColor(16, BLUE);
|
||||
Set_LEDColor(17, RED);
|
||||
Set_LEDColor(18, WHITE);
|
||||
|
||||
RGB_Reflash();
|
||||
}
|
||||
MSH_CMD_EXPORT(led_matrix_test2, Test led matrix on board)
|
||||
|
||||
void led_matrix_test3()
|
||||
{
|
||||
for (uint8_t i = 0; i < 4; i++)
|
||||
{
|
||||
led_matrix_fill_test(i);
|
||||
rt_thread_mdelay(1000);
|
||||
}
|
||||
led_matrix_rst();
|
||||
}
|
||||
|
||||
MSH_CMD_EXPORT(led_matrix_test3, Test led matrix on board)
|
||||
|
||||
void led_matrix_show_color(uint8_t r, uint8_t g, uint8_t b)
|
||||
{
|
||||
RGBColor_TypeDef color = {g,r,b};
|
||||
led_matrix_fill(color);
|
||||
}
|
||||
@@ -0,0 +1,21 @@
|
||||
#ifndef _LED_MATRIX
|
||||
#define _LED_MATRIX
|
||||
#include <rtthread.h>
|
||||
|
||||
typedef struct RGBColor_TypeDef
|
||||
{
|
||||
uint8_t G;
|
||||
uint8_t R;
|
||||
uint8_t B;
|
||||
} RGBColor_TypeDef; // 颜色结构体
|
||||
|
||||
extern const RGBColor_TypeDef DARK;
|
||||
extern const RGBColor_TypeDef GREEN;
|
||||
extern const RGBColor_TypeDef RED;
|
||||
extern const RGBColor_TypeDef BLUE;
|
||||
extern const RGBColor_TypeDef WHITE;
|
||||
|
||||
extern void Set_LEDColor(uint16_t LedId, RGBColor_TypeDef Color);
|
||||
extern void RGB_Reflash(void);
|
||||
extern void led_matrix_rst();
|
||||
#endif
|
||||
16
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/SConscript
Normal file
16
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/SConscript
Normal file
@@ -0,0 +1,16 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
group = []
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
group = group + DefineGroup('LVGL-port', src, depend = ['BSP_USING_LVGL'], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
@@ -0,0 +1,17 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
group = []
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
group = group + DefineGroup('LVGL-demo', src, depend = ['BSP_USING_LVGL', 'BSP_USING_LVGL_DEMO'], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
30
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/demo/lv_demo.c
Normal file
30
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/demo/lv_demo.c
Normal file
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-17 Meco Man first version
|
||||
* 2022-05-10 Meco Man improve rt-thread initialization process
|
||||
*/
|
||||
#include <lvgl.h>
|
||||
|
||||
void lv_user_gui_init(void)
|
||||
{
|
||||
/* display demo; you may replace with your LVGL application at here */
|
||||
// extern void lv_demo_pingpong(void);
|
||||
// extern lv_demo_calendar();
|
||||
// lv_demo_calendar();
|
||||
|
||||
|
||||
// extern void lv_demo_music(void);
|
||||
// lv_demo_music();
|
||||
|
||||
|
||||
extern void lv_demo_benchmark(void);
|
||||
lv_demo_benchmark();
|
||||
|
||||
// extern lv_demo_widgets();
|
||||
// lv_demo_widgets();
|
||||
}
|
||||
@@ -0,0 +1,50 @@
|
||||
#include <lvgl.h>
|
||||
#include <board.h>
|
||||
#include <drv_lcd.h>
|
||||
|
||||
static void event_handler(lv_event_t * e)
|
||||
{
|
||||
lv_event_code_t code = lv_event_get_code(e);
|
||||
lv_obj_t * obj = lv_event_get_current_target(e);
|
||||
|
||||
if(code == LV_EVENT_VALUE_CHANGED) {
|
||||
lv_calendar_date_t date;
|
||||
if(lv_calendar_get_pressed_date(obj, &date)) {
|
||||
LV_LOG_USER("Clicked date: %02d.%02d.%d", date.day, date.month, date.year);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void lv_demo_calendar(void)
|
||||
{
|
||||
lv_obj_t * calendar = lv_calendar_create(lv_scr_act());
|
||||
lv_obj_set_size(calendar, LCD_W, LCD_H);
|
||||
lv_obj_align(calendar, LV_ALIGN_CENTER, 0, 0);
|
||||
lv_obj_add_event_cb(calendar, event_handler, LV_EVENT_ALL, NULL);
|
||||
|
||||
lv_calendar_set_today_date(calendar, 2021, 02, 23);
|
||||
lv_calendar_set_showed_date(calendar, 2021, 02);
|
||||
|
||||
/*Highlight a few days*/
|
||||
static lv_calendar_date_t highlighted_days[3]; /*Only its pointer will be saved so should be static*/
|
||||
highlighted_days[0].year = 2021;
|
||||
highlighted_days[0].month = 02;
|
||||
highlighted_days[0].day = 6;
|
||||
|
||||
highlighted_days[1].year = 2021;
|
||||
highlighted_days[1].month = 02;
|
||||
highlighted_days[1].day = 11;
|
||||
|
||||
highlighted_days[2].year = 2022;
|
||||
highlighted_days[2].month = 02;
|
||||
highlighted_days[2].day = 22;
|
||||
|
||||
lv_calendar_set_highlighted_dates(calendar, highlighted_days, 3);
|
||||
|
||||
#if LV_USE_CALENDAR_HEADER_DROPDOWN
|
||||
lv_calendar_header_dropdown_create(calendar);
|
||||
#elif LV_USE_CALENDAR_HEADER_ARROW
|
||||
lv_calendar_header_arrow_create(calendar);
|
||||
#endif
|
||||
lv_calendar_set_showed_date(calendar, 2021, 10);
|
||||
}
|
||||
43
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_conf.h
Normal file
43
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_conf.h
Normal file
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-18 Meco Man First version
|
||||
*/
|
||||
|
||||
#ifndef LV_CONF_H
|
||||
#define LV_CONF_H
|
||||
|
||||
#include <rtconfig.h>
|
||||
|
||||
#define LV_COLOR_DEPTH 16
|
||||
#define LV_USE_PERF_MONITOR 1
|
||||
#define MY_DISP_HOR_RES 240
|
||||
#define MY_DISP_VER_RES 240
|
||||
//#define LV_USE_LOG 1
|
||||
|
||||
#ifdef PKG_USING_LV_MUSIC_DEMO
|
||||
/* music player demo */
|
||||
#define LV_HOR_RES_MAX MY_DISP_HOR_RES
|
||||
#define LV_VER_RES_MAX MY_DISP_VER_RES
|
||||
#define LV_USE_DEMO_RTT_MUSIC 1
|
||||
#define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1
|
||||
#define LV_FONT_MONTSERRAT_12 1
|
||||
#define LV_FONT_MONTSERRAT_16 1
|
||||
#define LV_COLOR_SCREEN_TRANSP 1
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define LV_USE_DEMO_BENCHMARK 1
|
||||
|
||||
|
||||
//#define LV_USE_DEMO_WIDGETS 1
|
||||
|
||||
|
||||
//#define LV_USE_DEMO_MUSIC 1
|
||||
|
||||
#endif
|
||||
189
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_port_disp.c
Normal file
189
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_port_disp.c
Normal file
@@ -0,0 +1,189 @@
|
||||
/**
|
||||
* @file lv_port_disp_templ.c
|
||||
*
|
||||
*/
|
||||
|
||||
/*Copy this file as "lv_port_disp.c" and set this value to "1" to enable content*/
|
||||
#if 1
|
||||
|
||||
/*********************
|
||||
* INCLUDES
|
||||
*********************/
|
||||
#include <lv_conf.h>
|
||||
#include "lv_port_disp.h"
|
||||
#include <stdbool.h>
|
||||
|
||||
/*********************
|
||||
* DEFINES
|
||||
*********************/
|
||||
#ifndef MY_DISP_HOR_RES
|
||||
#warning Please define or replace the macro MY_DISP_HOR_RES with the actual screen width, default value 320 is used for now.
|
||||
#define MY_DISP_HOR_RES 240
|
||||
#endif
|
||||
|
||||
#ifndef MY_DISP_VER_RES
|
||||
#warning Please define or replace the macro MY_DISP_HOR_RES with the actual screen height, default value 240 is used for now.
|
||||
#define MY_DISP_VER_RES 240
|
||||
#endif
|
||||
|
||||
/**********************
|
||||
* TYPEDEFS
|
||||
**********************/
|
||||
|
||||
/**********************
|
||||
* STATIC PROTOTYPES
|
||||
**********************/
|
||||
static void disp_init(void);
|
||||
|
||||
static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p);
|
||||
//static void gpu_fill(lv_disp_drv_t * disp_drv, lv_color_t * dest_buf, lv_coord_t dest_width,
|
||||
// const lv_area_t * fill_area, lv_color_t color);
|
||||
|
||||
/**********************
|
||||
* STATIC VARIABLES
|
||||
**********************/
|
||||
|
||||
/**********************
|
||||
* MACROS
|
||||
**********************/
|
||||
|
||||
/**********************
|
||||
* GLOBAL FUNCTIONS
|
||||
**********************/
|
||||
|
||||
void lv_port_disp_init(void)
|
||||
{
|
||||
/*-------------------------
|
||||
* Initialize your display
|
||||
* -----------------------*/
|
||||
disp_init();
|
||||
|
||||
/*-----------------------------
|
||||
* Create a buffer for drawing
|
||||
*----------------------------*/
|
||||
|
||||
/**
|
||||
* LVGL requires a buffer where it internally draws the widgets.
|
||||
* Later this buffer will passed to your display driver's `flush_cb` to copy its content to your display.
|
||||
* The buffer has to be greater than 1 display row
|
||||
*
|
||||
* There are 3 buffering configurations:
|
||||
* 1. Create ONE buffer:
|
||||
* LVGL will draw the display's content here and writes it to your display
|
||||
*
|
||||
* 2. Create TWO buffer:
|
||||
* LVGL will draw the display's content to a buffer and writes it your display.
|
||||
* You should use DMA to write the buffer's content to the display.
|
||||
* It will enable LVGL to draw the next part of the screen to the other buffer while
|
||||
* the data is being sent form the first buffer. It makes rendering and flushing parallel.
|
||||
*
|
||||
* 3. Double buffering
|
||||
* Set 2 screens sized buffers and set disp_drv.full_refresh = 1.
|
||||
* This way LVGL will always provide the whole rendered screen in `flush_cb`
|
||||
* and you only need to change the frame buffer's address.
|
||||
*/
|
||||
|
||||
/* Example for 1) */
|
||||
static lv_disp_draw_buf_t draw_buf_dsc_1;
|
||||
|
||||
/*GCC*/
|
||||
#if defined ( __GNUC__ )
|
||||
static lv_color_t buf_1[MY_DISP_HOR_RES * MY_DISP_HOR_RES / 2] __attribute__((section(".LVGLccm"))); /*A buffer for 10 rows*/
|
||||
/*MDK*/
|
||||
#elif defined ( __CC_ARM )
|
||||
__attribute__((at(0x10000000))) lv_color_t buf_1[LCD_H * LCD_W / 2];
|
||||
#endif
|
||||
|
||||
lv_disp_draw_buf_init(&draw_buf_dsc_1, buf_1, NULL, MY_DISP_HOR_RES * MY_DISP_HOR_RES / 2); /*Initialize the display buffer*/
|
||||
/*-----------------------------------
|
||||
* Register the display in LVGL
|
||||
*----------------------------------*/
|
||||
|
||||
static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
|
||||
lv_disp_drv_init(&disp_drv); /*Basic initialization*/
|
||||
|
||||
/*Set up the functions to access to your display*/
|
||||
|
||||
/*Set the resolution of the display*/
|
||||
disp_drv.hor_res = MY_DISP_HOR_RES;
|
||||
disp_drv.ver_res = MY_DISP_VER_RES;
|
||||
|
||||
/*Used to copy the buffer's content to the display*/
|
||||
disp_drv.flush_cb = disp_flush;
|
||||
|
||||
/*Set a display buffer*/
|
||||
disp_drv.draw_buf = &draw_buf_dsc_1;
|
||||
|
||||
/*Required for Example 3)*/
|
||||
//disp_drv.full_refresh = 1;
|
||||
|
||||
/* Fill a memory array with a color if you have GPU.
|
||||
* Note that, in lv_conf.h you can enable GPUs that has built-in support in LVGL.
|
||||
* But if you have a different GPU you can use with this callback.*/
|
||||
//disp_drv.gpu_fill_cb = gpu_fill;
|
||||
|
||||
/*Finally register the driver*/
|
||||
lv_disp_drv_register(&disp_drv);
|
||||
}
|
||||
|
||||
/**********************
|
||||
* STATIC FUNCTIONS
|
||||
**********************/
|
||||
|
||||
/*Initialize your display and the required peripherals.*/
|
||||
static void disp_init(void)
|
||||
{
|
||||
/*You code here*/
|
||||
}
|
||||
|
||||
volatile bool disp_flush_enabled = true;
|
||||
|
||||
/* Enable updating the screen (the flushing process) when disp_flush() is called by LVGL
|
||||
*/
|
||||
void disp_enable_update(void)
|
||||
{
|
||||
disp_flush_enabled = true;
|
||||
}
|
||||
|
||||
/* Disable updating the screen (the flushing process) when disp_flush() is called by LVGL
|
||||
*/
|
||||
void disp_disable_update(void)
|
||||
{
|
||||
disp_flush_enabled = false;
|
||||
}
|
||||
|
||||
/*Flush the content of the internal buffer the specific area on the display
|
||||
*You can use DMA or any hardware acceleration to do this operation in the background but
|
||||
*'lv_disp_flush_ready()' has to be called when finished.*/
|
||||
static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p)
|
||||
{
|
||||
extern void lcd_fill_array(rt_uint16_t x_start, rt_uint16_t y_start, rt_uint16_t x_end, rt_uint16_t y_end, void *pcolor);
|
||||
lcd_fill_array(area->x1, area->y1, area->x2, area->y2, color_p);
|
||||
|
||||
lv_disp_flush_ready(disp_drv);
|
||||
}
|
||||
|
||||
/*OPTIONAL: GPU INTERFACE*/
|
||||
|
||||
/*If your MCU has hardware accelerator (GPU) then you can use it to fill a memory with a color*/
|
||||
//static void gpu_fill(lv_disp_drv_t * disp_drv, lv_color_t * dest_buf, lv_coord_t dest_width,
|
||||
// const lv_area_t * fill_area, lv_color_t color)
|
||||
//{
|
||||
// /*It's an example code which should be done by your GPU*/
|
||||
// int32_t x, y;
|
||||
// dest_buf += dest_width * fill_area->y1; /*Go to the first line*/
|
||||
//
|
||||
// for(y = fill_area->y1; y <= fill_area->y2; y++) {
|
||||
// for(x = fill_area->x1; x <= fill_area->x2; x++) {
|
||||
// dest_buf[x] = color;
|
||||
// }
|
||||
// dest_buf+=dest_width; /*Go to the next line*/
|
||||
// }
|
||||
//}
|
||||
|
||||
|
||||
#else /*Enable this file at the top*/
|
||||
|
||||
/*This dummy typedef exists purely to silence -Wpedantic.*/
|
||||
typedef int keep_pedantic_happy;
|
||||
#endif
|
||||
57
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_port_disp.h
Normal file
57
bsp/stm32/stm32f407-rt-spark/board/ports/lvgl/lv_port_disp.h
Normal file
@@ -0,0 +1,57 @@
|
||||
/**
|
||||
* @file lv_port_disp_templ.h
|
||||
*
|
||||
*/
|
||||
|
||||
/*Copy this file as "lv_port_disp.h" and set this value to "1" to enable content*/
|
||||
#if 1
|
||||
|
||||
#ifndef LV_PORT_DISP_TEMPL_H
|
||||
#define LV_PORT_DISP_TEMPL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*********************
|
||||
* INCLUDES
|
||||
*********************/
|
||||
#if defined(LV_LVGL_H_INCLUDE_SIMPLE)
|
||||
#include "lvgl.h"
|
||||
#else
|
||||
#include "lvgl.h"
|
||||
#endif
|
||||
|
||||
/*********************
|
||||
* DEFINES
|
||||
*********************/
|
||||
|
||||
/**********************
|
||||
* TYPEDEFS
|
||||
**********************/
|
||||
|
||||
/**********************
|
||||
* GLOBAL PROTOTYPES
|
||||
**********************/
|
||||
/* Initialize low level display driver */
|
||||
void lv_port_disp_init(void);
|
||||
|
||||
/* Enable updating the screen (the flushing process) when disp_flush() is called by LVGL
|
||||
*/
|
||||
void disp_enable_update(void);
|
||||
|
||||
/* Disable updating the screen (the flushing process) when disp_flush() is called by LVGL
|
||||
*/
|
||||
void disp_disable_update(void);
|
||||
|
||||
/**********************
|
||||
* MACROS
|
||||
**********************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /*extern "C"*/
|
||||
#endif
|
||||
|
||||
#endif /*LV_PORT_DISP_TEMPL_H*/
|
||||
|
||||
#endif /*Disable/Enable content*/
|
||||
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-18 Meco Man The first version
|
||||
*/
|
||||
#include <lvgl.h>
|
||||
#include <stdbool.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
|
||||
void lv_port_indev_init(void)
|
||||
{
|
||||
|
||||
}
|
||||
28
bsp/stm32/stm32f407-rt-spark/board/ports/phy_reset.c
Normal file
28
bsp/stm32/stm32f407-rt-spark/board/ports/phy_reset.c
Normal file
@@ -0,0 +1,28 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-23 flybreak first version
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
|
||||
#define RESET_IO GET_PIN(D, 3)
|
||||
|
||||
void phy_reset(void)
|
||||
{
|
||||
rt_pin_write(RESET_IO, PIN_LOW);
|
||||
rt_thread_mdelay(50);
|
||||
rt_pin_write(RESET_IO, PIN_HIGH);
|
||||
}
|
||||
|
||||
int phy_init(void)
|
||||
{
|
||||
rt_pin_mode(RESET_IO, PIN_MODE_OUTPUT);
|
||||
rt_pin_write(RESET_IO, PIN_HIGH);
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_BOARD_EXPORT(phy_init);
|
||||
121
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_pm.c
Normal file
121
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_pm.c
Normal file
@@ -0,0 +1,121 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-07-31 tanek first version
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
/**
|
||||
* This function will put STM32F4xx into sleep mode.
|
||||
*
|
||||
* @param pm pointer to power manage structure
|
||||
*/
|
||||
static void sleep(struct rt_pm *pm, uint8_t mode)
|
||||
{
|
||||
switch (mode)
|
||||
{
|
||||
case PM_SLEEP_MODE_NONE:
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_IDLE:
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_LIGHT:
|
||||
HAL_SuspendTick(); /* 关闭系统时钟中断 */
|
||||
HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); /* 进入 F407 sleep 模式，这个模式会停掉所有时钟，可被任意中断唤醒 */
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_DEEP:
|
||||
HAL_SuspendTick(); /* 关闭系统时钟中断 */
|
||||
HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); /* 进入 F407 stop 模式，这个模式会停掉所有时钟，可被任意中断唤醒 */
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_STANDBY:
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_SHUTDOWN:
|
||||
break;
|
||||
|
||||
default:
|
||||
RT_ASSERT(0);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will be Called in Wake up interrupt callback
|
||||
*
|
||||
* @param pm pointer to power manage structure
|
||||
*/
|
||||
|
||||
static struct rt_device *device = RT_NULL;
|
||||
static struct rt_pm *pm = RT_NULL;
|
||||
|
||||
void pm_wk_up()
|
||||
{
|
||||
|
||||
switch (pm->sleep_mode)
|
||||
{
|
||||
case PM_SLEEP_MODE_NONE:
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_IDLE:
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_LIGHT:
|
||||
HAL_ResumeTick(); /* 启动系统时钟中断 */
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_DEEP:
|
||||
SystemClock_Config(); /* 重新配置系统时钟 */
|
||||
HAL_ResumeTick(); /* 启动系统时钟中断 */
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_STANDBY:
|
||||
break;
|
||||
|
||||
case PM_SLEEP_MODE_SHUTDOWN:
|
||||
break;
|
||||
|
||||
default:
|
||||
RT_ASSERT(0);
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* This function initialize the power manager
|
||||
*/
|
||||
static int drv_pm_hw_init(void)
|
||||
{
|
||||
static const struct rt_pm_ops _ops =
|
||||
{
|
||||
sleep,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL,
|
||||
RT_NULL
|
||||
};
|
||||
|
||||
/* initialize system pm module */
|
||||
rt_system_pm_init(&_ops, 0, RT_NULL);
|
||||
|
||||
/* get pm device */
|
||||
device = rt_device_find("pm");
|
||||
if(device == RT_NULL)
|
||||
{
|
||||
rt_kprintf("rt_pm find error");
|
||||
return 0;
|
||||
}
|
||||
pm = rt_container_of(device,struct rt_pm,parent);
|
||||
return 1;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(drv_pm_hw_init);
|
||||
44
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_wakeup.c
Normal file
44
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_wakeup.c
Normal file
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-08-07 Tanek first implementation
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <stm32F4xx.h>
|
||||
#include "board.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#define USER_WAKEUP_PIN GET_PIN(C, 5)
|
||||
#define DRV_WKUP_PIN_IRQ_MODE PIN_IRQ_MODE_FALLING
|
||||
|
||||
static void (*_wakeup_hook)(void);
|
||||
|
||||
void bsp_register_wakeup(void (*hook)(void))
|
||||
{
|
||||
RT_ASSERT(hook != RT_NULL);
|
||||
|
||||
_wakeup_hook = hook;
|
||||
}
|
||||
|
||||
static void _wakeup_callback(void *args)
|
||||
{
|
||||
extern void pm_wk_up();
|
||||
pm_wk_up(); /* wakeup from deep sleep */
|
||||
if (_wakeup_hook)
|
||||
_wakeup_hook();
|
||||
}
|
||||
|
||||
static int rt_hw_wakeup_init(void)
|
||||
{
|
||||
rt_pin_mode(USER_WAKEUP_PIN, PIN_MODE_INPUT_PULLUP);
|
||||
rt_pin_attach_irq(USER_WAKEUP_PIN, DRV_WKUP_PIN_IRQ_MODE, _wakeup_callback, RT_NULL);
|
||||
rt_pin_irq_enable(USER_WAKEUP_PIN, 1);
|
||||
return 0;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_wakeup_init);
|
||||
17
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_wakeup.h
Normal file
17
bsp/stm32/stm32f407-rt-spark/board/ports/pm/drv_wakeup.h
Normal file
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-08-07 Tanek first implementation
|
||||
*/
|
||||
|
||||
#ifndef __DRV_WAKEUP_H__
|
||||
#define __DRV_WAKEUP_H__
|
||||
|
||||
extern void bsp_register_wakeup(void (*hook)(void));
|
||||
|
||||
#endif /* __DRV_WAKEUP_H__ */
|
||||
|
||||
16
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/SConscript
Normal file
16
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/SConscript
Normal file
@@ -0,0 +1,16 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
group = []
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
group = group + DefineGroup('RS485_port', src, depend = ['BSP_USING_RS485'], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
137
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/drv_rs485.c
Normal file
137
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/drv_rs485.c
Normal file
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-24 thread-liu first version
|
||||
* 2023-05-05 yuanjie add test method
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
#include "drv_rs485.h"
|
||||
|
||||
#ifdef BSP_USING_RS485
|
||||
|
||||
#define RS485_OUT rt_pin_write(BSP_RS485_RTS_PIN, PIN_HIGH)
|
||||
#define RS485_IN rt_pin_write(BSP_RS485_RTS_PIN, PIN_LOW)
|
||||
|
||||
rt_device_t rs485_serial = {0};
|
||||
struct rt_semaphore rs485_rx_sem = {0};
|
||||
|
||||
/* uart send data callback function */
|
||||
static rt_err_t rs485_output(rt_device_t dev, void * buffer)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/* uart receive data callback function */
|
||||
static rt_err_t rs485_input(rt_device_t dev, rt_size_t size)
|
||||
{
|
||||
rt_sem_release(&rs485_rx_sem);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/* send string */
|
||||
int rs485_send_data(char *tbuf, rt_uint16_t t_len)
|
||||
{
|
||||
/* change rs485 mode */
|
||||
RS485_OUT;
|
||||
|
||||
/* send data */
|
||||
rt_device_write(rs485_serial, 0, tbuf, t_len);
|
||||
|
||||
/* change rs485 mode */
|
||||
RS485_IN;
|
||||
|
||||
rt_kprintf("\nsend:");
|
||||
for(int i =0;i<t_len;i++)
|
||||
{
|
||||
rt_kprintf("%d:%x ",i,tbuf[i]);
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
#ifndef BSP_USING_LED_MATRIX_RS485_DEMO
|
||||
static void rs485_thread_entry(void *parameter)
|
||||
{
|
||||
char ch;
|
||||
|
||||
while (1)
|
||||
{
|
||||
/* A byte of data is read from a rs485_serial port, and if it is not read, it waits for the received semaphore */
|
||||
while (rt_device_read(rs485_serial, -1, &ch, 1) != 1)
|
||||
{
|
||||
rt_sem_take(&rs485_rx_sem, RT_WAITING_FOREVER);
|
||||
}
|
||||
// rt_kprintf("%c",ch);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* rs485 rts pin init */
|
||||
int rs485_init(void)
|
||||
{
|
||||
/* find uart device */
|
||||
rs485_serial = rt_device_find(RS485_UART_DEVICE_NAME);
|
||||
if (!rs485_serial)
|
||||
{
|
||||
rt_kprintf("find %s failed!\n", RS485_UART_DEVICE_NAME);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
rt_device_open(rs485_serial, RT_DEVICE_FLAG_INT_RX);
|
||||
|
||||
/* set receive data callback function */
|
||||
rt_device_set_rx_indicate(rs485_serial, rs485_input);
|
||||
|
||||
/* set the send completion callback function */
|
||||
rt_device_set_tx_complete(rs485_serial, rs485_output);
|
||||
|
||||
rt_pin_mode(BSP_RS485_RTS_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
RS485_IN;
|
||||
|
||||
rt_sem_init(&rs485_rx_sem, "rs485_rx_sem", 0, RT_IPC_FLAG_FIFO);
|
||||
#ifndef BSP_USING_LED_MATRIX_RS485_DEMO
|
||||
/* create rs485 receive thread */
|
||||
rt_thread_t thread = rt_thread_create("rs485", rs485_thread_entry, RT_NULL, 1024, 25, 10);
|
||||
#else
|
||||
extern void led_matrix_receieve_task(void *parameter);
|
||||
rt_thread_t thread = rt_thread_create("rs485", led_matrix_receieve_task, RT_NULL, 1024, 20, 10);
|
||||
#endif
|
||||
|
||||
if (thread != RT_NULL)
|
||||
{
|
||||
rt_thread_startup(thread);
|
||||
}
|
||||
else
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
// INIT_DEVICE_EXPORT(rs485_init);
|
||||
|
||||
void rs485_test(int argc, void **argv)
|
||||
{
|
||||
char *str;
|
||||
if (argc == 1)
|
||||
{
|
||||
rt_kprintf("-t --Enter any keys to send.\n");
|
||||
}
|
||||
else if (argc == 3)
|
||||
{
|
||||
if (rt_strcmp(argv[1], "-t") == 0)
|
||||
{
|
||||
str = argv[2];
|
||||
rs485_send_data(str, rt_strnlen(str, 32));
|
||||
}
|
||||
}
|
||||
}
|
||||
MSH_CMD_EXPORT(rs485_test, test rs485 transmission);
|
||||
|
||||
#endif /* bsp_using_RS485 */
|
||||
29
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/drv_rs485.h
Normal file
29
bsp/stm32/stm32f407-rt-spark/board/ports/rs485/drv_rs485.h
Normal file
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-10-24 thread-liu first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_RS485_H__
|
||||
#define __DRV_RS485_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define RS485_SEND_MODE 0
|
||||
#define RS485_RECV_MODE 1
|
||||
|
||||
extern rt_device_t rs485_serial;
|
||||
extern struct rt_semaphore rs485_rx_sem;
|
||||
extern int rs485_send_data(char *tbuf, rt_uint16_t t_len);
|
||||
extern int rs485_init(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* drv_rs485.h */
|
||||
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-6-14 solar first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "spi_flash.h"
|
||||
#include "spi_flash_sfud.h"
|
||||
#include "drv_spi.h"
|
||||
#include "drv_soft_spi.h"
|
||||
|
||||
#ifdef BSP_USING_SOFT_SPI_FLASH
|
||||
|
||||
static int rt_soft_spi_flash_init(void)
|
||||
{
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
rt_hw_soft_spi_device_attach("sspi2", "sspi20", "PB.14");
|
||||
|
||||
if (RT_NULL == rt_sfud_flash_probe("W25Q128", "sspi20"))
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(rt_soft_spi_flash_init);
|
||||
#endif /* BSP_USING_SOFT_SPI_FLASH */
|
||||
32
bsp/stm32/stm32f407-rt-spark/board/ports/spi_flash_init.c
Normal file
32
bsp/stm32/stm32f407-rt-spark/board/ports/spi_flash_init.c
Normal file
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-27 SummerGift add spi flash port file
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "spi_flash.h"
|
||||
#include "spi_flash_sfud.h"
|
||||
#include "drv_spi.h"
|
||||
|
||||
#if defined(BSP_USING_SPI_FLASH)
|
||||
|
||||
static int rt_hw_spi_flash_init(void)
|
||||
{
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
rt_hw_spi_device_attach("spi2", "spi20", GPIOB, GPIO_PIN_12);
|
||||
|
||||
if (RT_NULL == rt_sfud_flash_probe("W25Q64", "spi20"))
|
||||
{
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
|
||||
#endif
|
||||
|
||||
@@ -20,8 +20,10 @@
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_DEBUG
|
||||
#define RT_DEBUG_COLOR
|
||||
#define RT_USING_DEBUG
|
||||
#define RT_DEBUGING_COLOR
|
||||
#define RT_DEBUGING_CONTEXT
|
||||
#define RT_DEBUGING_INIT
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
@@ -85,6 +87,7 @@
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_PWM
|
||||
|
||||
/* Using USB */
|
||||
|
||||
@@ -110,6 +113,26 @@
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
#define SOC_FAMILY_STM32
|
||||
#define SOC_SERIES_STM32F4
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_STM32F407ZG
|
||||
#define BOARD_STM32F407_SPARK
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_USB_TO_USART
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
@@ -124,6 +147,9 @@
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* CYW43012 WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
@@ -146,9 +172,6 @@
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* PainterEngine: A cross-platform graphics application framework written in C language */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
@@ -168,42 +191,64 @@
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
/* kendryte-sdk: Kendryte SDK */
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
#define SOC_FAMILY_STM32
|
||||
#define SOC_SERIES_STM32F4
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
/* Arduino libraries */
|
||||
|
||||
#define SOC_STM32F407ZG
|
||||
#define BOARD_STM32F407_ATK_EXPLORER
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
/* Projects and Demos */
|
||||
|
||||
#define BSP_USING_USB_TO_USART
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
/* Sensors */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
|
||||
/* Board extended module Drivers */
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user