Mirrors_Framework/rt-thread
1
0
Fork 0
mirror of https://github.com/RT-Thread/rt-thread.git synced 2026-10-02 14:23:19 +08:00
Code Issues Packages Projects Releases Wiki Activity

将swm320和swm341整合进synwit (#6290)

Browse Source 
* 将swm320和swm341整合进synwit
This commit is contained in:
woody
2022-08-16 12:43:24 -04:00
committed by GitHub
parent 74912a6bee
commit 7d469384b5
338 changed files with 24834 additions and 24255 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.github/workflows/action.yml
+2 -2
View File
@@ -172,8 +172,8 @@ jobs:
# - {RTT_BSP: "stm32/stm32wle5-yizhilian-lm402", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "wch/arm/ch32f103c8-core", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "wch/arm/ch32f203r-evt", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "swm320", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "swm341", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "synwit/swm320", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "synwit/swm341", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "zynqmp-r5-axu4ev", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "frdm-k64f", RTT_TOOL_CHAIN: "sourcery-arm"}
bsp/swm320/drivers/drv_adc.c
-217
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/drivers/drv_adc.h
-71
View File
@@ -1,71 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-5-26 lik first version
*/
#ifndef __DRV_ADC_H__
#define __DRV_ADC_H__
#include "board.h"
struct swm_adc_cfg
{
const char *name;
ADC_TypeDef *ADCx;
ADC_InitStructure adc_initstruct;
};
struct swm_adc
{
struct swm_adc_cfg *cfg;
struct rt_adc_device adc_device;
};
#ifdef BSP_USING_ADC0
#ifndef ADC0_CFG
#define ADC0_CFG \
{ \
.name = "adc0", \
.ADCx = ADC0, \
.adc_initstruct.clk_src = ADC_CLKSRC_VCO_DIV64, \
.adc_initstruct.clk_div = 25, \
.adc_initstruct.pga_ref = PGA_REF_INTERNAL, \
.adc_initstruct.channels = 0, \
.adc_initstruct.samplAvg = ADC_AVG_SAMPLE1, \
.adc_initstruct.trig_src = ADC_TRIGSRC_SW, \
.adc_initstruct.Continue = 0, \
.adc_initstruct.EOC_IEn = 0, \
.adc_initstruct.OVF_IEn = 0, \
.adc_initstruct.HFULL_IEn = 0, \
.adc_initstruct.FULL_IEn = 0, \
}
#endif /* ADC0_CFG */
#endif /* BSP_USING_ADC0 */
#ifdef BSP_USING_ADC1
#ifndef ADC1_CFG
#define ADC1_CFG \
{ \
.name = "adc1", \
.ADCx = ADC1, \
.adc_initstruct.clk_src = ADC_CLKSRC_VCO_DIV64, \
.adc_initstruct.clk_div = 25, \
.adc_initstruct.pga_ref = PGA_REF_INTERNAL, \
.adc_initstruct.channels = 0, \
.adc_initstruct.samplAvg = ADC_AVG_SAMPLE1, \
.adc_initstruct.trig_src = ADC_TRIGSRC_SW, \
.adc_initstruct.Continue = 0, \
.adc_initstruct.EOC_IEn = 0, \
.adc_initstruct.OVF_IEn = 0, \
.adc_initstruct.HFULL_IEn = 0, \
.adc_initstruct.FULL_IEn = 0, \
}
#endif /* ADC1_CFG */
#endif /* BSP_USING_ADC1 */
#endif /* __DRV_ADC_H__ */
bsp/swm320/drivers/drv_crypto.c
-226
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/drivers/drv_crypto.h
-40
View File
@@ -1,40 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-10 lik first version
*/
#ifndef __DRV_CRYPTO_H__
#define __DRV_CRYPTO_H__
#include "board.h"
/* swm config class */
struct swm_crc_cfg
{
CRC_TypeDef *CRCx;
uint32_t inival;
uint8_t crc_inbits;
uint8_t crc_1632;
uint8_t crc_out_not;
uint8_t crc_out_rev;
};
#ifdef BSP_USING_CRC
#define DEFAULT_CRC (CRC)
#define DEFAULT_INIVAL (0x00000000)
#define DEFAULT_INBITS (2)
#define DEFAULT_CRC1632 (0)
#define DEFAULT_OUT_NOT (0)
#define DEFAULT_OUT_REV (0)
#endif /* BSP_USING_CRC */
int rt_hw_crypto_init(void);
#endif /* __DRV_CRYPTO_H__ */
bsp/swm320/drivers/drv_gpio.h
-35
View File
@@ -1,35 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_GPIO_H__
#define __DRV_GPIO_H__
#include "board.h"
#define __SWM_PIN(index, gpio, pin_index) \
{ \
index, GPIO##gpio, PIN##pin_index, GPIO##gpio##_IRQn \
}
#define GPIO0 ((GPIO_TypeDef *)(0))
#define GPIO0_IRQn (GPIOA0_IRQn)
struct swm_pin_index
{
uint32_t index;
GPIO_TypeDef *gpio;
uint32_t pin;
IRQn_Type irq;
};
typedef struct swm_pin_index pin_t;
int rt_hw_pin_init(void);
#endif /* __DRV_GPIO_H__ */
bsp/swm320/drivers/drv_hwtimer.c
-256
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/drivers/drv_hwtimer.h
-101
View File
@@ -1,101 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#include "board.h"
struct swm_hwtimer_cfg
{
char *name;
TIMR_TypeDef *TIMRx;
};
struct swm_hwtimer
{
struct swm_hwtimer_cfg *cfg;
rt_hwtimer_t time_device;
};
#ifndef TIM_DEV_INFO_CONFIG
#define TIM_DEV_INFO_CONFIG \
{ \
.maxfreq = 120000000, \
.minfreq = 120000000, \
.maxcnt = 0xFFFFFFFF, \
.cntmode = HWTIMER_CNTMODE_DW, \
}
#endif /* TIM_DEV_INFO_CONFIG */
#ifdef BSP_USING_TIM0
#ifndef TIM0_CFG
#define TIM0_CFG \
{ \
.name = "timer0", \
.TIMRx = TIMR0, \
}
#endif /* TIM0_CFG */
#endif /* BSP_USING_TIM0 */
#ifdef BSP_USING_TIM1
#ifndef TIM1_CFG
#define TIM1_CFG \
{ \
.name = "timer1", \
.TIMRx = TIMR1, \
}
#endif /* TIM1_CFG */
#endif /* BSP_USING_TIM1 */
#ifdef BSP_USING_TIM2
#ifndef TIM2_CFG
#define TIM2_CFG \
{ \
.name = "timer2", \
.TIMRx = TIMR2, \
}
#endif /* TIM2_CFG */
#endif /* BSP_USING_TIM2 */
#ifdef BSP_USING_TIM3
#ifndef TIM3_CFG
#define TIM3_CFG \
{ \
.name = "timer3", \
.TIMRx = TIMR3, \
}
#endif /* TIM3_CFG */
#endif /* BSP_USING_TIM3 */
#ifdef BSP_USING_TIM4
#ifndef TIM4_CFG
#define TIM4_CFG \
{ \
.name = "timer4", \
.TIMRx = TIMR4, \
}
#endif /* TIM4_CFG */
#endif /* BSP_USING_TIM4 */
#ifdef BSP_USING_TIM5
#ifndef TIM5_CFG
#define TIM5_CFG \
{ \
.name = "timer5", \
.TIMRx = TIMR5, \
}
#endif /* TIM5_CFG */
#endif /* BSP_USING_TIM5 */
int rt_hw_hwtimer_init(void);
#endif /* __DRV_HWTIMER_H__ */
bsp/swm320/drivers/drv_pwm.c
-233
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/drivers/drv_pwm.h
-164
View File
@@ -1,164 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_PWM_H__
#define __DRV_PWM_H__
#include "board.h"
struct swm_pwm_cfg
{
const char *name;
PWM_TypeDef *PWMx;
PWM_InitStructure pwm_initstruct;
};
struct swm_pwm
{
struct swm_pwm_cfg *cfg;
struct rt_device_pwm pwm_device;
};
#ifdef BSP_USING_PWM0
#ifndef PWM0_CFG
#define PWM0_CFG \
{ \
.name = "pwm0", \
.PWMx = PWM0, \
.pwm_initstruct.clk_div = PWM_CLKDIV_8, \
.pwm_initstruct.mode = PWM_MODE_INDEP, \
.pwm_initstruct.cycleA = 10000, \
.pwm_initstruct.hdutyA = 5000, \
.pwm_initstruct.initLevelA = 1, \
.pwm_initstruct.cycleB = 10000, \
.pwm_initstruct.hdutyB = 5000, \
.pwm_initstruct.initLevelB = 1, \
.pwm_initstruct.HEndAIEn = 0, \
.pwm_initstruct.NCycleAIEn = 0, \
.pwm_initstruct.HEndBIEn = 0, \
.pwm_initstruct.NCycleBIEn = 0, \
}
#endif /* PWM0_CFG */
#endif /* BSP_USING_PWM0 */
#ifdef BSP_USING_PWM1
#ifndef PWM1_CFG
#define PWM1_CFG \
{ \
.name = "pwm1", \
.PWMx = PWM1, \
.pwm_initstruct.clk_div = PWM_CLKDIV_8, \
.pwm_initstruct.mode = PWM_MODE_INDEP, \
.pwm_initstruct.cycleA = 10000, \
.pwm_initstruct.hdutyA = 5000, \
.pwm_initstruct.initLevelA = 1, \
.pwm_initstruct.cycleB = 10000, \
.pwm_initstruct.hdutyB = 5000, \
.pwm_initstruct.initLevelB = 1, \
.pwm_initstruct.HEndAIEn = 0, \
.pwm_initstruct.NCycleAIEn = 0, \
.pwm_initstruct.HEndBIEn = 0, \
.pwm_initstruct.NCycleBIEn = 0, \
}
#endif /* PWM1_CFG */
#endif /* BSP_USING_PWM1 */
#ifdef BSP_USING_PWM2
#ifndef PWM2_CFG
#define PWM2_CFG \
{ \
.name = "pwm2", \
.PWMx = PWM2, \
.pwm_initstruct.clk_div = PWM_CLKDIV_8, \
.pwm_initstruct.mode = PWM_MODE_INDEP, \
.pwm_initstruct.cycleA = 10000, \
.pwm_initstruct.hdutyA = 5000, \
.pwm_initstruct.initLevelA = 1, \
.pwm_initstruct.cycleB = 10000, \
.pwm_initstruct.hdutyB = 5000, \
.pwm_initstruct.initLevelB = 1, \
.pwm_initstruct.HEndAIEn = 0, \
.pwm_initstruct.NCycleAIEn = 0, \
.pwm_initstruct.HEndBIEn = 0, \
.pwm_initstruct.NCycleBIEn = 0, \
}
#endif /* PWM2_CFG */
#endif /* BSP_USING_PWM2 */
#ifdef BSP_USING_PWM3
#ifndef PWM3_CFG
#define PWM3_CFG \
{ \
.name = "pwm3", \
.PWMx = PWM3, \
.pwm_initstruct.clk_div = PWM_CLKDIV_8, \
.pwm_initstruct.mode = PWM_MODE_INDEP, \
.pwm_initstruct.cycleA = 10000, \
.pwm_initstruct.hdutyA = 5000, \
.pwm_initstruct.initLevelA = 1, \
.pwm_initstruct.cycleB = 10000, \
.pwm_initstruct.hdutyB = 5000, \
.pwm_initstruct.initLevelB = 1, \
.pwm_initstruct.HEndAIEn = 0, \
.pwm_initstruct.NCycleAIEn = 0, \
.pwm_initstruct.HEndBIEn = 0, \
.pwm_initstruct.NCycleBIEn = 0, \
}
#endif /* PWM3_CFG */
#endif /* BSP_USING_PWM3 */
#ifdef BSP_USING_PWM4
#ifndef PWM4_CFG
#define PWM4_CFG \
{ \
.name = "pwm4", \
.PWMx = PWM4, \
.pwm_initstruct.clk_div = PWM_CLKDIV_8, \
.pwm_initstruct.mode = PWM_MODE_INDEP, \
.pwm_initstruct.cycleA = 10000, \
.pwm_initstruct.hdutyA = 5000, \
.pwm_initstruct.initLevelA = 1, \
.pwm_initstruct.cycleB = 10000, \
.pwm_initstruct.hdutyB = 5000, \
.pwm_initstruct.initLevelB = 1, \
.pwm_initstruct.HEndAIEn = 0, \
.pwm_initstruct.NCycleAIEn = 0, \
.pwm_initstruct.HEndBIEn = 0, \
.pwm_initstruct.NCycleBIEn = 0, \
}
#endif /* PWM4_CFG */
#endif /* BSP_USING_PWM4 */
#ifdef BSP_USING_PWM5
#ifndef PWM5_CFG
#define PWM5_CFG \
{ \
.name = "pwm5", \
.PWMx = PWM5, \
.pwm_initstruct.clk_div = PWM_CLKDIV_8, \
.pwm_initstruct.mode = PWM_MODE_INDEP, \
.pwm_initstruct.cycleA = 10000, \
.pwm_initstruct.hdutyA = 5000, \
.pwm_initstruct.initLevelA = 1, \
.pwm_initstruct.cycleB = 10000, \
.pwm_initstruct.hdutyB = 5000, \
.pwm_initstruct.initLevelB = 1, \
.pwm_initstruct.HEndAIEn = 0, \
.pwm_initstruct.NCycleAIEn = 0, \
.pwm_initstruct.HEndBIEn = 0, \
.pwm_initstruct.NCycleBIEn = 0, \
}
#endif /* PWM5_CFG */
#endif /* BSP_USING_PWM5 */
int rt_hw_pwm_init(void);
#endif /* __DRV_PWM_H__ */
bsp/swm320/drivers/drv_sdio.h
-42
View File
@@ -1,42 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-10 lik first version
*/
#ifndef __DRV_SDIO_H__
#define __DRV_SDIO_H__
#include "board.h"
#define SDIO_BUFF_SIZE 4096
#define SDIO_ALIGN_LEN 4
#ifndef SDIO_MAX_FREQ
#define SDIO_MAX_FREQ (30000000)
#endif
struct sdio_pkg
{
struct rt_mmcsd_cmd *cmd;
void *buff;
rt_uint32_t flag;
};
typedef rt_err_t (*sdio_txconfig)(struct sdio_pkg *pkg, rt_uint32_t *buff, int size);
typedef rt_err_t (*sdio_rxconfig)(struct sdio_pkg *pkg, rt_uint32_t *buff, int size);
typedef rt_uint32_t (*sdio_clk_get)(SDIO_TypeDef *hw_sdio);
struct swm_sdio_des
{
SDIO_TypeDef *hw_sdio;
sdio_txconfig txconfig;
sdio_rxconfig rxconfig;
sdio_clk_get clk_get;
};
#endif /* __DRV_SDIO_H__ */
bsp/swm320/drivers/drv_soft_i2c.c
-197
View File
@@ -1,197 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-05-31 ZYH first version
* 2018-12-10 Zohar_Lee format file
* 2020-07-10 lik rewrite
*/
#include "drv_soft_i2c.h"
#ifdef RT_USING_I2C
#ifdef BSP_USING_I2C
/***************************************************************
*!!!!!!!!!!!!!!!!!!!!!!!!!!!!NOTICE!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
*In order to use swm drv_soft_i2c,you need to commented out
line 114 (SDA_H(ops);) and line 167 (SDA_H(ops);) in i2c-bit-ops.c
At the same time, add one line (SDA_L(ops);)after line 154 (SCL_L(ops);)
in i2c-bit-ops.c
***************************************************************/
//#define DRV_DEBUG
#define LOG_TAG "drv.i2c"
#include <drv_log.h>
#if !defined(BSP_USING_I2C0) && !defined(BSP_USING_I2C1)
#error "Please define at least one BSP_USING_I2Cx"
/* this driver can be disabled at menuconfig ? RT-Thread Components ? Device Drivers */
#endif
static const struct swm_soft_i2c_cfg soft_i2c_cfg[] =
{
#ifdef BSP_USING_I2C0
I2C0_BUS_CFG,
#endif
#ifdef BSP_USING_I2C1
I2C1_BUS_CFG,
#endif
};
static struct swm_i2c i2c_drv[sizeof(soft_i2c_cfg) / sizeof(soft_i2c_cfg[0])];
/**
* This function initializes the i2c pin.
*
* @param swm i2c dirver class.
*/
static void swm_i2c_gpio_init(struct swm_i2c *i2c)
{
struct swm_soft_i2c_cfg *cfg = (struct swm_soft_i2c_cfg *)i2c->ops.data;
rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
rt_pin_write(cfg->scl, PIN_HIGH);
rt_pin_write(cfg->sda, PIN_HIGH);
}
/**
* This function sets the sda pin.
*
* @param swm config class.
* @param The sda pin state.
*/
static void swm_set_sda(void *data, rt_int32_t state)
{
struct swm_soft_i2c_cfg *cfg = (struct swm_soft_i2c_cfg *)data;
rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
if (state)
{
rt_pin_write(cfg->sda, PIN_HIGH);
}
else
{
rt_pin_write(cfg->sda, PIN_LOW);
}
}
/**
* This function sets the scl pin.
*
* @param swm config class.
* @param The scl pin state.
*/
static void swm_set_scl(void *data, rt_int32_t state)
{
struct swm_soft_i2c_cfg *cfg = (struct swm_soft_i2c_cfg *)data;
rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
if (state)
{
rt_pin_write(cfg->scl, PIN_HIGH);
}
else
{
rt_pin_write(cfg->scl, PIN_LOW);
}
}
/**
* This function gets the sda pin state.
*
* @param The sda pin state.
*/
static rt_int32_t swm_get_sda(void *data)
{
struct swm_soft_i2c_cfg *cfg = (struct swm_soft_i2c_cfg *)data;
rt_pin_mode(cfg->sda, PIN_MODE_INPUT_PULLUP);
return rt_pin_read(cfg->sda);
}
/**
* This function gets the scl pin state.
*
* @param The scl pin state.
*/
static rt_int32_t swm_get_scl(void *data)
{
struct swm_soft_i2c_cfg *cfg = (struct swm_soft_i2c_cfg *)data;
rt_pin_mode(cfg->scl, PIN_MODE_INPUT_PULLUP);
return rt_pin_read(cfg->scl);
}
/**
* The time delay function.
*
* @param microseconds.
*/
static void swm_udelay(rt_uint32_t us)
{
rt_uint32_t ticks;
rt_uint32_t told, tnow, tcnt = 0;
rt_uint32_t reload = SysTick->LOAD;
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
told = SysTick->VAL;
while (1)
{
tnow = SysTick->VAL;
if (tnow != told)
{
if (tnow < told)
{
tcnt += told - tnow;
}
else
{
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks)
{
break;
}
}
}
}
static const struct rt_i2c_bit_ops swm_bit_ops =
{
.data = RT_NULL,
.set_sda = swm_set_sda,
.set_scl = swm_set_scl,
.get_sda = swm_get_sda,
.get_scl = swm_get_scl,
.udelay = swm_udelay,
.delay_us = 1,
.timeout = 100};
/* I2C initialization function */
int rt_hw_i2c_init(void)
{
rt_err_t result;
for (int i = 0; i < sizeof(i2c_drv) / sizeof(struct swm_i2c); i++)
{
i2c_drv[i].ops = swm_bit_ops;
i2c_drv[i].ops.data = (void *)&soft_i2c_cfg[i];
i2c_drv[i].i2c2_bus.priv = &i2c_drv[i].ops;
swm_i2c_gpio_init(&i2c_drv[i]);
result = rt_i2c_bit_add_bus(&i2c_drv[i].i2c2_bus, soft_i2c_cfg[i].name);
RT_ASSERT(result == RT_EOK);
LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
soft_i2c_cfg[i].name,
soft_i2c_cfg[i].scl,
soft_i2c_cfg[i].sda);
}
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_i2c_init);
#endif /* BSP_USING_I2C */
#endif /* RT_USING_I2C */
bsp/swm320/drivers/drv_soft_i2c.h
-51
View File
@@ -1,51 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_SOFT_I2C_H__
#define __DRV_SOFT_I2C_H__
#include "board.h"
/* swm config class */
struct swm_soft_i2c_cfg
{
rt_uint8_t scl;
rt_uint8_t sda;
const char *name;
};
/* swm i2c dirver class */
struct swm_i2c
{
struct rt_i2c_bit_ops ops;
struct rt_i2c_bus_device i2c2_bus;
};
#ifdef BSP_USING_I2C0
#define I2C0_BUS_CFG \
{ \
.scl = BSP_I2C0_SCL_PIN, \
.sda = BSP_I2C0_SDA_PIN, \
.name = "i2c0", \
}
#endif
#ifdef BSP_USING_I2C1
#define I2C1_BUS_CFG \
{ \
.scl = BSP_I2C1_SCL_PIN, \
.sda = BSP_I2C1_SDA_PIN, \
.name = "i2c1", \
}
#endif
int rt_hw_i2c_init(void);
#endif /* __DRV_SOFT_I2C_H__ */
bsp/swm320/drivers/drv_spi.h
-80
View File
@@ -1,80 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_SPI_H__
#define __DRV_SPI_H__
#include "board.h"
struct swm_spi_cs
{
GPIO_TypeDef *GPIOx;
uint32_t gpio_pin;
};
struct swm_spi_cfg
{
const char *name;
SPI_TypeDef *SPIx;
SPI_InitStructure spi_initstruct;
};
/* swm spi dirver class */
struct swm_spi
{
struct swm_spi_cfg *cfg;
struct rt_spi_configuration *configure;
struct rt_spi_bus spi_bus;
};
#ifdef BSP_USING_SPI0
#ifndef SPI0_BUS_CONFIG
#define SPI0_BUS_CONFIG \
{ \
.name = "spi0", \
.SPIx = SPI0, \
.spi_initstruct.clkDiv = SPI_CLKDIV_32, \
.spi_initstruct.FrameFormat = SPI_FORMAT_SPI, \
.spi_initstruct.SampleEdge = SPI_SECOND_EDGE, \
.spi_initstruct.IdleLevel = SPI_HIGH_LEVEL, \
.spi_initstruct.WordSize = 8, \
.spi_initstruct.Master = 1, \
.spi_initstruct.RXHFullIEn = 0, \
.spi_initstruct.TXEmptyIEn = 0, \
.spi_initstruct.TXCompleteIEn = 0, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
#ifdef BSP_USING_SPI1
#ifndef SPI1_BUS_CONFIG
#define SPI1_BUS_CONFIG \
{ \
.name = "spi1", \
.SPIx = SPI1, \
.spi_initstruct.clkDiv = SPI_CLKDIV_32, \
.spi_initstruct.FrameFormat = SPI_FORMAT_SPI, \
.spi_initstruct.SampleEdge = SPI_SECOND_EDGE, \
.spi_initstruct.IdleLevel = SPI_HIGH_LEVEL, \
.spi_initstruct.WordSize = 8, \
.spi_initstruct.Master = 1, \
.spi_initstruct.RXHFullIEn = 0, \
.spi_initstruct.TXEmptyIEn = 0, \
.spi_initstruct.TXCompleteIEn = 0, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
//cannot be used before completion init
rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, GPIO_TypeDef *GPIOx, uint32_t n);
int rt_hw_spi_init(void);
#endif /* __DRV_SPI_H__ */
bsp/swm320/drivers/drv_uart.c
-284
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/drivers/drv_uart.h
-115
View File
@@ -1,115 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#include "board.h"
/* swm config class */
struct swm_uart_cfg
{
const char *name;
UART_TypeDef *UARTx;
IRQn_Type irq;
UART_InitStructure uart_initstruct;
};
/* swm uart dirver class */
struct swm_uart
{
struct swm_uart_cfg *cfg;
struct rt_serial_device serial_device;
};
#ifdef BSP_USING_UART0
#ifndef UART0_CFG
#define UART0_CFG \
{ \
.name = "uart0", \
.UARTx = UART0, \
.irq = UART0_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART0_CFG */
#endif /* BSP_USING_UART0 */
#ifdef BSP_USING_UART1
#ifndef UART1_CFG
#define UART1_CFG \
{ \
.name = "uart1", \
.UARTx = UART1, \
.irq = UART1_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART1_CFG */
#endif /* BSP_USING_UART1 */
#ifdef BSP_USING_UART2
#ifndef UART2_CFG
#define UART2_CFG \
{ \
.name = "uart2", \
.UARTx = UART2, \
.irq = UART2_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART2_CFG */
#endif /* BSP_USING_UART2 */
#ifdef BSP_USING_UART3
#ifndef UART3_CFG
#define UART3_CFG \
{ \
.name = "uart3", \
.UARTx = UART3, \
.irq = UART3_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART3_CFG */
#endif /* BSP_USING_UART3 */
int rt_hw_serial_init(void);
#endif /* __DRV_UART_H__ */
bsp/swm320/drivers/drv_wdt.c
-88
View File
@@ -1,88 +0,0 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik format file
*/
#include "drv_wdt.h"
#ifdef RT_USING_WDT
#ifdef BSP_USING_WDT
//#define DRV_DEBUG
#define LOG_TAG "drv.wdt"
#include <drv_log.h>
static struct swm_wdt_cfg wdt_cfg =
{
.name = "wdt",
.WDTx = WDT,
};
static struct swm_wdt wdt_drv;
static rt_err_t swm_wdt_init(rt_watchdog_t *wdt_device)
{
return RT_EOK;
}
static rt_err_t swm_wdt_control(rt_watchdog_t *wdt_device, int cmd, void *arg)
{
struct swm_wdt_cfg *cfg;
RT_ASSERT(wdt_device != RT_NULL);
cfg = wdt_device->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
WDT_Feed(cfg->WDTx);
break;
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
WDT_Init(cfg->WDTx, (SystemCoreClock * (*(rt_uint32_t *)arg)), WDT_MODE_RESET);
break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
*(rt_uint32_t *)arg = (cfg->WDTx->LOAD) / SystemCoreClock;
break;
case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
*(rt_uint32_t *)arg = WDT_GetValue(cfg->WDTx) / SystemCoreClock;
break;
case RT_DEVICE_CTRL_WDT_START:
WDT_Start(cfg->WDTx);
break;
case RT_DEVICE_CTRL_WDT_STOP:
WDT_Stop(cfg->WDTx);
break;
default:
LOG_W("This command is not supported.");
return -RT_ERROR;
}
return RT_EOK;
}
const static struct rt_watchdog_ops swm_wdt_ops =
{
swm_wdt_init,
swm_wdt_control};
int rt_hw_wdt_init(void)
{
wdt_drv.cfg = &wdt_cfg;
wdt_drv.wdt_device.ops = &swm_wdt_ops;
if (rt_hw_watchdog_register(&wdt_drv.wdt_device, wdt_drv.cfg->name, RT_DEVICE_FLAG_RDWR, wdt_drv.cfg) != RT_EOK)
{
LOG_E("wdt device register failed.");
return -RT_ERROR;
}
LOG_D("wdt device register success.");
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_hw_wdt_init);
#endif /* BSP_USING_WDT */
#endif /* RT_USING_WDT */
bsp/swm320/libraries/CMSIS/CoreSupport/core_cm0.h
-692
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/CoreSupport/core_cm0plus.h
-804
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/CoreSupport/core_cm3.h
-1624
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/CoreSupport/core_cm4.h
-1775
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/CoreSupport/core_cm7.h
-2193
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/CoreSupport/core_cmSimd.h
-830
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/DeviceSupport/SWM320.h
-3117
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/DeviceSupport/system_SWM320.h
-28
View File
@@ -1,28 +0,0 @@
#ifndef __SYSTEM_SWM320_H__
#define __SYSTEM_SWM320_H__
#ifdef __cplusplus
extern "C"
{
#endif
extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
extern uint32_t CyclesPerUs; // Cycles per micro second
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
extern void switchCLK_20MHz(void);
extern void switchCLK_40MHz(void);
extern void switchCLK_32KHz(void);
extern void switchCLK_XTAL(void);
extern void switchCLK_PLL(void);
extern void PLLInit(void);
#ifdef __cplusplus
}
#endif
#endif //__SYSTEM_SWM320_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.h
-77
View File
@@ -1,77 +0,0 @@
#ifndef __SWM320_ADC_H__
#define __SWM320_ADC_H__
typedef struct
{
uint8_t clk_src; //ADC转换时钟源：ADC_CLKSRC_HRC、ADC_CLKSRC_VCO_DIV16、ADC_CLKSRC_VCO_DIV32、ADC_CLKSRC_VCO_DIV32
uint8_t clk_div; //ADC转换时钟分频，取值1--31
uint8_t pga_ref; //PGA基准：PGA_REF_INTERNAL、PGA_REF_EXTERNAL
uint8_t channels; //ADC转换通道选中，ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
uint8_t samplAvg; //采样取平均，触发启动ADC转换后，ADC在一个通道上连续采样、转换多次，并将它们的平均值作为该通道转换结果
uint8_t trig_src; //ADC触发方式：ADC_TRIGSRC_SW、ADC_TRIGSRC_PWM、ADC_TRIGSRC_TIMR2、ADC_TRIGSRC_TIMR3
uint8_t Continue; //在软件触发模式下：1 连续转换模式，启动后一直采样、转换，直到软件清除START位
// 0 单次转换模式，转换完成后START位自动清除停止转换
uint8_t EOC_IEn; //EOC中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
uint8_t OVF_IEn; //OVF中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
uint8_t HFULL_IEn; //FIFO半满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
uint8_t FULL_IEn; //FIFO 满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
} ADC_InitStructure;
#define ADC_CH0 0x01
#define ADC_CH1 0x02
#define ADC_CH2 0x04
#define ADC_CH3 0x08
#define ADC_CH4 0x10
#define ADC_CH5 0x20
#define ADC_CH6 0x40
#define ADC_CH7 0x80
#define ADC_CLKSRC_HRC 1
#define ADC_CLKSRC_VCO_DIV16 2
#define ADC_CLKSRC_VCO_DIV32 3
#define ADC_CLKSRC_VCO_DIV64 4
#define ADC_AVG_SAMPLE1 0
#define ADC_AVG_SAMPLE2 1 //一次启动连续采样、转换2次，并计算两次结果的平均值作为转换结果
#define ADC_AVG_SAMPLE4 3
#define ADC_AVG_SAMPLE8 7
#define ADC_AVG_SAMPLE16 15
#define ADC_TRIGSRC_SW 0 //软件触发，即ADC->START.GO写1启动转换
#define ADC_TRIGSRC_PWM 1
#define PGA_REF_INTERNAL 1 //PGA输入共模电平由内部电路产生，ADC_REFP和ADC_REFN可悬空
#define PGA_REF_EXTERNAL 0 //PGA输入共模电平由外部引脚提供，(ADC_REFP + ADC_REFN) 电平值须与量程相同
void ADC_Init(ADC_TypeDef *ADCx, ADC_InitStructure *initStruct); //ADC模数转换器初始化
void ADC_Open(ADC_TypeDef *ADCx); //ADC开启，可以软件启动、或硬件触发ADC转换
void ADC_Close(ADC_TypeDef *ADCx); //ADC关闭，无法软件启动、或硬件触发ADC转换
void ADC_Start(ADC_TypeDef *ADCx); //启动指定ADC，开始模数转换
void ADC_Stop(ADC_TypeDef *ADCx); //关闭指定ADC，停止模数转换
uint32_t ADC_Read(ADC_TypeDef *ADCx, uint32_t chn); //从指定通道读取转换结果
uint32_t ADC_IsEOC(ADC_TypeDef *ADCx, uint32_t chn); //指定通道是否End Of Conversion
void ADC_ChnSelect(ADC_TypeDef *ADCx, uint32_t chns);
void ADC_IntEOCEn(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断使能
void ADC_IntEOCDis(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断禁止
void ADC_IntEOCClr(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断标志清除
uint32_t ADC_IntEOCStat(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断状态
void ADC_IntOVFEn(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断使能
void ADC_IntOVFDis(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断禁止
void ADC_IntOVFClr(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断标志清除
uint32_t ADC_IntOVFStat(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断状态
void ADC_IntHFULLEn(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断使能
void ADC_IntHFULLDis(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断禁止
void ADC_IntHFULLClr(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断标志清除
uint32_t ADC_IntHFULLStat(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断状态
void ADC_IntFULLEn(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断使能
void ADC_IntFULLDis(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断禁止
void ADC_IntFULLClr(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断标志清除
uint32_t ADC_IntFULLStat(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断状态
#endif //__SWM320_ADC_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_can.h
-134
View File
@@ -1,134 +0,0 @@
#ifndef __SWM320_CAN_H__
#define __SWM320_CAN_H__
#define CAN_FRAME_STD 0
#define CAN_FRAME_EXT 1
typedef struct
{
uint8_t Mode; //CAN_MODE_NORMAL、CAN_MODE_LISTEN、CAN_MODE_SELFTEST
uint8_t CAN_BS1; //CAN_BS1_1tq、CAN_BS1_2tq、... ... 、CAN_BS1_16tq
uint8_t CAN_BS2; //CAN_BS2_1tq、CAN_BS2_2tq、... ... 、CAN_BS2_8tq
uint8_t CAN_SJW; //CAN_SJW_1tq、CAN_SJW_2tq、CAN_SJW_3tq、CAN_SJW_4tq
uint32_t Baudrate; //波特率，即位传输速率，取值1--1000000
uint8_t FilterMode; //CAN_FILTER_16b、CAN_FILTER_32b
union
{
uint32_t FilterMask32b; //FilterCheck & (~FilterMask) == ID & (~FilterMask)的Message通过过滤
struct
{ // 0 must match 1 don't care
uint16_t FilterMask16b1;
uint16_t FilterMask16b2;
};
};
union
{
uint32_t FilterCheck32b;
struct
{
uint16_t FilterCheck16b1;
uint16_t FilterCheck16b2;
};
};
uint8_t RXNotEmptyIEn; //接收FIFO非空，有数据可读
uint8_t RXOverflowIEn; //接收FIFO溢出，有数据丢失
uint8_t ArbitrLostIEn; //控制器丢失仲裁变成接收方
uint8_t ErrPassiveIEn; //接收/发送错误计数值达到127
} CAN_InitStructure;
#define CAN_MODE_NORMAL 0 //常规模式
#define CAN_MODE_LISTEN 1 //监听模式
#define CAN_MODE_SELFTEST 2 //自测模式
#define CAN_BS1_1tq 0
#define CAN_BS1_2tq 1
#define CAN_BS1_3tq 2
#define CAN_BS1_4tq 3
#define CAN_BS1_5tq 4
#define CAN_BS1_6tq 5
#define CAN_BS1_7tq 6
#define CAN_BS1_8tq 7
#define CAN_BS1_9tq 8
#define CAN_BS1_10tq 9
#define CAN_BS1_11tq 10
#define CAN_BS1_12tq 11
#define CAN_BS1_13tq 12
#define CAN_BS1_14tq 13
#define CAN_BS1_15tq 14
#define CAN_BS1_16tq 15
#define CAN_BS2_1tq 0
#define CAN_BS2_2tq 1
#define CAN_BS2_3tq 2
#define CAN_BS2_4tq 3
#define CAN_BS2_5tq 4
#define CAN_BS2_6tq 5
#define CAN_BS2_7tq 6
#define CAN_BS2_8tq 7
#define CAN_SJW_1tq 0
#define CAN_SJW_2tq 1
#define CAN_SJW_3tq 2
#define CAN_SJW_4tq 3
#define CAN_FILTER_16b 0 //两个16位过滤器
#define CAN_FILTER_32b 1 //一个32位过滤器
typedef struct
{
uint32_t id; //消息ID
uint8_t format; //帧格式：CAN_FRAME_STD、CAN_FRAME_EXT
uint8_t remote; //消息是否为远程帧
uint8_t size; //接收到的数据个数
uint8_t data[8]; //接收到的数据
} CAN_RXMessage;
void CAN_Init(CAN_TypeDef *CANx, CAN_InitStructure *initStruct);
void CAN_Open(CAN_TypeDef *CANx);
void CAN_Close(CAN_TypeDef *CANx);
void CAN_Transmit(CAN_TypeDef *CANx, uint32_t format, uint32_t id, uint8_t data[], uint32_t size, uint32_t once);
void CAN_TransmitRequest(CAN_TypeDef *CANx, uint32_t format, uint32_t id, uint32_t once);
void CAN_Receive(CAN_TypeDef *CANx, CAN_RXMessage *msg);
uint32_t CAN_TXComplete(CAN_TypeDef *CANx);
uint32_t CAN_TXSuccess(CAN_TypeDef *CANx);
void CAN_AbortTransmit(CAN_TypeDef *CANx);
uint32_t CAN_TXBufferReady(CAN_TypeDef *CANx);
uint32_t CAN_RXDataAvailable(CAN_TypeDef *CANx);
void CAN_SetBaudrate(CAN_TypeDef *CANx, uint32_t baudrate, uint32_t CAN_BS1, uint32_t CAN_BS2, uint32_t CAN_SJW);
void CAN_SetFilter32b(CAN_TypeDef *CANx, uint32_t check, uint32_t mask);
void CAN_SetFilter16b(CAN_TypeDef *CANx, uint16_t check1, uint16_t mask1, uint16_t check2, uint16_t mask2);
void CAN_INTRXNotEmptyEn(CAN_TypeDef *CANx);
void CAN_INTRXNotEmptyDis(CAN_TypeDef *CANx);
void CAN_INTTXBufEmptyEn(CAN_TypeDef *CANx);
void CAN_INTTXBufEmptyDis(CAN_TypeDef *CANx);
void CAN_INTErrWarningEn(CAN_TypeDef *CANx);
void CAN_INTErrWarningDis(CAN_TypeDef *CANx);
void CAN_INTRXOverflowEn(CAN_TypeDef *CANx);
void CAN_INTRXOverflowDis(CAN_TypeDef *CANx);
void CAN_INTRXOverflowClear(CAN_TypeDef *CANx);
void CAN_INTWakeupEn(CAN_TypeDef *CANx);
void CAN_INTWakeupDis(CAN_TypeDef *CANx);
void CAN_INTErrPassiveEn(CAN_TypeDef *CANx);
void CAN_INTErrPassiveDis(CAN_TypeDef *CANx);
void CAN_INTArbitrLostEn(CAN_TypeDef *CANx);
void CAN_INTArbitrLostDis(CAN_TypeDef *CANx);
void CAN_INTBusErrorEn(CAN_TypeDef *CANx);
void CAN_INTBusErrorDis(CAN_TypeDef *CANx);
uint32_t CAN_INTStat(CAN_TypeDef *CANx);
#endif //__SWM320_CAN_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_dma.h
-17
View File
@@ -1,17 +0,0 @@
#ifndef __SWM320_DMA_H__
#define __SWM320_DMA_H__
#define DMA_CH0 0
#define DMA_CH1 1
#define DMA_CH2 2
void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en); //DMA通道配置，用于存储器间（如Flash和RAM间）搬运数据
void DMA_CH_Open(uint32_t chn); //DMA通道打开
void DMA_CH_Close(uint32_t chn); //DMA通道关闭
void DMA_CH_INTEn(uint32_t chn); //DMA中断使能，数据搬运完成后触发中断
void DMA_CH_INTDis(uint32_t chn); //DMA中断禁止，数据搬运完成后不触发中断
void DMA_CH_INTClr(uint32_t chn); //DMA中断标志清除
uint32_t DMA_CH_INTStat(uint32_t chn); //DMA中断状态查询，1 数据搬运完成 0 数据搬运未完成
#endif //__SWM320_DMA_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_exti.h
-18
View File
@@ -1,18 +0,0 @@
#ifndef __SWM320_EXTI_H__
#define __SWM320_EXTI_H__
void EXTI_Init(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t mode); //指定引脚外部中断初始化
void EXTI_Open(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚外部中断打开（即使能）
void EXTI_Close(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚外部中断关闭（即禁能）
uint32_t EXTI_State(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚是否触发了中断
uint32_t EXTI_RawState(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚是否满足过/了中断触发条件，当此中断关闭时可通过调用此函数以查询的方式检测引脚上是否满足过/了中断触发条件
void EXTI_Clear(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚外部中断清除（即清除中断标志，以免再次进入此中断）
#define EXTI_FALL_EDGE 0x00 //下降沿触发中断
#define EXTI_RISE_EDGE 0x01 //上升沿触发中断
#define EXTI_BOTH_EDGE 0x02 //双边沿触发中断
#define EXTI_LOW_LEVEL 0x10 //低电平触发中断
#define EXTI_HIGH_LEVEL 0x11 //高电平触发中断
#endif //__SWM320_EXTI_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_gpio.h
-22
View File
@@ -1,22 +0,0 @@
#ifndef __SWM320_GPIO_H__
#define __SWM320_GPIO_H__
void GPIO_Init(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t dir, uint32_t pull_up, uint32_t pull_down); //引脚初始化，包含引脚方向、上拉电阻、下拉电阻
void GPIO_SetBit(GPIO_TypeDef *GPIOx, uint32_t n); //将参数指定的引脚电平置高
void GPIO_ClrBit(GPIO_TypeDef *GPIOx, uint32_t n); //将参数指定的引脚电平置低
void GPIO_InvBit(GPIO_TypeDef *GPIOx, uint32_t n); //将参数指定的引脚电平反转
uint32_t GPIO_GetBit(GPIO_TypeDef *GPIOx, uint32_t n); //读取参数指定的引脚的电平状态
void GPIO_SetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平置高
void GPIO_ClrBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平置低
void GPIO_InvBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平反转
uint32_t GPIO_GetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //读取参数指定的从n开始的w位连续引脚的电平状态
void GPIO_AtomicSetBit(GPIO_TypeDef *GPIOx, uint32_t n);
void GPIO_AtomicClrBit(GPIO_TypeDef *GPIOx, uint32_t n);
void GPIO_AtomicInvBit(GPIO_TypeDef *GPIOx, uint32_t n);
void GPIO_AtomicSetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
void GPIO_AtomicClrBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
void GPIO_AtomicInvBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
#endif //__SWM320_GPIO_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_i2c.h
-31
View File
@@ -1,31 +0,0 @@
#ifndef __SWM320_I2C_H__
#define __SWM320_I2C_H__
typedef struct
{
uint8_t Master; //1 主机模式
uint8_t Addr7b; //1 7位地址 0 10位地址
uint32_t MstClk; //主机传输时钟频率
uint8_t MstIEn; //主机模式中断使能
uint16_t SlvAddr; //从机地址
uint8_t SlvRxEndIEn; //从机接收完成中断使能
uint8_t SlvTxEndIEn; //从机发送完成中断使能
uint8_t SlvSTADetIEn; //从机检测到起始中断使能
uint8_t SlvSTODetIEn; //从机检测到终止中断使能
uint8_t SlvRdReqIEn; //从机接收到读请求中断使能
uint8_t SlvWrReqIEn; //从机接收到写请求中断使能
} I2C_InitStructure;
void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitStructure *initStruct);
void I2C_Open(I2C_TypeDef *I2Cx);
void I2C_Close(I2C_TypeDef *I2Cx);
uint8_t I2C_Start(I2C_TypeDef *I2Cx, uint8_t addr);
void I2C_Stop(I2C_TypeDef *I2Cx);
uint8_t I2C_Write(I2C_TypeDef *I2Cx, uint8_t data);
uint8_t I2C_Read(I2C_TypeDef *I2Cx, uint8_t ack);
#endif //__SWM320_I2C_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_lcd.h
-70
View File
@@ -1,70 +0,0 @@
#ifndef __SWM320_LCD_H__
#define __SWM320_LCD_H__
typedef struct
{
uint16_t HnPixel; //水平方向像素个数，最大取值1024
uint16_t VnPixel; //垂直方向像素个数，最大取值 768
uint8_t Hfp; //horizonal front porch，最大取值32
uint8_t Hbp; //horizonal back porch， 最大取值128
uint8_t Vfp; //vertical front porch， 最大取值8
uint8_t Vbp; //vertical back porch， 最大取值32
uint8_t ClkDiv; //系统时钟经ClkDiv分频后产生DOCCLK，0 2分频 1 4分频 2 6分频 ... ... 31 64分频
uint8_t SamplEdge; //屏幕在DOTCLK的哪个边沿采样数据：LCD_SAMPLEDGE_RISE、LCD_SAMPLEDGE_FALL
uint8_t ClkAlways; //1 一直输出DOTCLK 0 只在传输数据时输出DOTCLK
uint8_t HsyncWidth; //HSYNC低电平持续多少个DOTCLK，取值：LCD_HSYNC_1DOTCLK、LCD_HSYNC_2DOTCLK、LCD_HSYNC_3DOTCLK、LCD_HSYNC_4DOTCLK
uint8_t IntEOTEn; //End of Transter（传输完成）中断使能
} LCD_InitStructure;
#define LCD_SAMPLEDGE_RISE 0 //屏幕在DOTCLK的上升沿采样数据
#define LCD_SAMPLEDGE_FALL 1 //屏幕在DOTCLK的下降沿采样数据
#define LCD_HSYNC_1DOTCLK 0 //1个DOTCLK
#define LCD_HSYNC_2DOTCLK 1
#define LCD_HSYNC_3DOTCLK 2
#define LCD_HSYNC_4DOTCLK 3
#define LCD_CLKDIV_2 0
#define LCD_CLKDIV_4 1
#define LCD_CLKDIV_6 2
#define LCD_CLKDIV_8 3
#define LCD_CLKDIV_10 4
#define LCD_CLKDIV_12 5
#define LCD_CLKDIV_14 6
#define LCD_CLKDIV_16 7
#define LCD_CLKDIV_18 8
#define LCD_CLKDIV_20 9
#define LCD_CLKDIV_22 10
#define LCD_CLKDIV_24 11
#define LCD_CLKDIV_26 12
#define LCD_CLKDIV_28 13
#define LCD_CLKDIV_30 14
#define LCD_CLKDIV_32 15
#define LCD_CLKDIV_34 16
#define LCD_CLKDIV_36 17
#define LCD_CLKDIV_38 18
#define LCD_CLKDIV_40 19
#define LCD_CLKDIV_42 20
#define LCD_CLKDIV_44 21
#define LCD_CLKDIV_46 22
#define LCD_CLKDIV_48 23
#define LCD_CLKDIV_50 24
#define LCD_CLKDIV_52 25
#define LCD_CLKDIV_54 26
#define LCD_CLKDIV_56 27
#define LCD_CLKDIV_58 28
#define LCD_CLKDIV_60 29
#define LCD_CLKDIV_62 30
#define LCD_CLKDIV_64 31
void LCD_Init(LCD_TypeDef *LCDx, LCD_InitStructure *initStruct);
void LCD_Start(LCD_TypeDef *LCDx);
uint32_t LCD_IsBusy(LCD_TypeDef *LCDx);
void LCD_INTEn(LCD_TypeDef *LCDx);
void LCD_INTDis(LCD_TypeDef *LCDx);
void LCD_INTClr(LCD_TypeDef *LCDx);
uint32_t LCD_INTStat(LCD_TypeDef *LCDx);
#endif //__SWM320_LCD_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_norflash.h
-34
View File
@@ -1,34 +0,0 @@
#ifndef __SWM320_NORFLASH_H__
#define __SWM320_NORFLASH_H__
typedef struct
{
uint8_t DataWidth; // 8、16
uint8_t WELowPulseTime; // WE# pulse width，单位为系统时钟周期，最大值为7
uint8_t OEPreValidTime; // Valid data output after OE# low，单位为系统时钟周期，最大值为15
uint8_t OperFinishIEn; // 操作(写入、擦除)完成中断使能
uint8_t OperTimeoutIEn;
} NORFL_InitStructure;
void NORFL_Init(NORFL_InitStructure *initStruct);
uint32_t NORFL_ChipErase(void);
uint32_t NORFL_SectorErase(uint32_t addr);
uint32_t NORFL_Write(uint32_t addr, uint32_t data);
uint32_t NORFL_Read(uint32_t addr);
uint16_t NORFL_ReadID(uint32_t id_addr);
/* 当前版本总线读只支持字读
#define NORFL_Read8(addr) *((volatile uint8_t *)(NORFLM_BASE + addr))
#define NORFL_Read16(addr) *((volatile uint16_t *)(NORFLM_BASE + addr)) */
#define NORFL_Read32(addr) *((volatile uint32_t *)(NORFLM_BASE + addr))
#define NORFL_CMD_READ 0
#define NORFL_CMD_RESET 1
#define NORFL_CMD_AUTO_SELECT 2
#define NORFL_CMD_PROGRAM 3
#define NORFL_CMD_CHIP_ERASE 4
#define NORFL_CMD_SECTOR_ERASE 5
#endif // __SWM320_NORFLASH_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.c
-220
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_port.h
-474
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_pwm.h
-57
View File
@@ -1,57 +0,0 @@
#ifndef __SWM320_PWM_H__
#define __SWM320_PWM_H__
typedef struct
{
uint8_t clk_div; //PWM_CLKDIV_1、PWM_CLKDIV_8
uint8_t mode; //PWM_MODE_INDEP、PWM_MODE_COMPL、PWM_MODE_INDEP_CALIGN、PWM_MODE_COMPL_CALIGN
uint16_t cycleA; //A路周期
uint16_t hdutyA; //A路占空比
uint16_t deadzoneA; //A路死区时长，取值0--1023
uint8_t initLevelA; //A路初始输出电平，0 低电平 1 高电平
uint16_t cycleB; //B路周期
uint16_t hdutyB; //B路占空比
uint16_t deadzoneB; //B路死区时长，取值0--1023
uint8_t initLevelB; //B路初始输出电平，0 低电平 1 高电平
uint8_t HEndAIEn; //A路高电平结束中断使能
uint8_t NCycleAIEn; //A路新周期开始中断使能
uint8_t HEndBIEn; //B路高电平结束中断使能
uint8_t NCycleBIEn; //B路新周期开始中断使能
} PWM_InitStructure;
#define PWM_CLKDIV_1 0
#define PWM_CLKDIV_8 1
#define PWM_MODE_INDEP 0 //A路和B路为两路独立输出
#define PWM_MODE_COMPL 1 //A路和B路为一路互补输出
#define PWM_MODE_INDEP_CALIGN 3 //A路和B路为两路独立输出，中心对齐
#define PWM_MODE_COMPL_CALIGN 4 //A路和B路为一路互补输出，中心对齐
#define PWM_CH_A 0
#define PWM_CH_B 1
void PWM_Init(PWM_TypeDef *PWMx, PWM_InitStructure *initStruct); //PWM初始化
void PWM_Start(PWM_TypeDef *PWMx, uint32_t chA, uint32_t chB); //启动PWM，开始PWM输出
void PWM_Stop(PWM_TypeDef *PWMx, uint32_t chA, uint32_t chB); //关闭PWM，停止PWM输出
void PWM_SetCycle(PWM_TypeDef *PWMx, uint32_t chn, uint16_t cycle); //设置周期
uint16_t PWM_GetCycle(PWM_TypeDef *PWMx, uint32_t chn); //获取周期
void PWM_SetHDuty(PWM_TypeDef *PWMx, uint32_t chn, uint16_t hduty); //设置高电平时长
uint16_t PWM_GetHDuty(PWM_TypeDef *PWMx, uint32_t chn); //获取高电平时长
void PWM_SetDeadzone(PWM_TypeDef *PWMx, uint32_t chn, uint8_t deadzone); //设置死区时长
uint8_t PWM_GetDeadzone(PWM_TypeDef *PWMx, uint32_t chn); //获取死区时长
void PWM_IntNCycleEn(PWM_TypeDef *PWMx, uint32_t chn); //新周期开始中断使能
void PWM_IntNCycleDis(PWM_TypeDef *PWMx, uint32_t chn); //新周期开始中断禁能
void PWM_IntNCycleClr(PWM_TypeDef *PWMx, uint32_t chn); //新周期开始中断标志清除
uint32_t PWM_IntNCycleStat(PWM_TypeDef *PWMx, uint32_t chn); //新周期开始中断是否发生
void PWM_IntHEndEn(PWM_TypeDef *PWMx, uint32_t chn); //高电平结束中断使能
void PWM_IntHEndDis(PWM_TypeDef *PWMx, uint32_t chn); //高电平结束中断禁能
void PWM_IntHEndClr(PWM_TypeDef *PWMx, uint32_t chn); //高电平结束中断标志清除
uint32_t PWM_IntHEndStat(PWM_TypeDef *PWMx, uint32_t chn); //高电平结束中断是否发生
#endif //__SWM320_PWM_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_rtc.h
-73
View File
@@ -1,73 +0,0 @@
#ifndef __SWM320_RTC_H__
#define __SWM320_RTC_H__
#define RTC_SUN 0x01
#define RTC_MON 0x02
#define RTC_TUE 0x04
#define RTC_WED 0x08
#define RTC_THU 0x10
#define RTC_FRI 0x20
#define RTC_SAT 0x40
typedef struct
{
uint16_t Year;
uint8_t Month; //取值1--12
uint8_t Date; //取值1--31
uint8_t Hour; //取值0--23
uint8_t Minute; //取值0--59
uint8_t Second; //取值0--59
uint8_t SecondIEn;
uint8_t MinuteIEn;
} RTC_InitStructure;
typedef struct
{
uint8_t Days; //RTC_SUN、RTC_MON、RTC_TUE、RTC_WED、RTC_THU、RTC_FRI、RTC_SAT及其或运算组合
uint8_t Hour;
uint8_t Minute;
uint8_t Second;
uint8_t AlarmIEn;
} RTC_AlarmStructure;
typedef struct
{
uint16_t Year;
uint8_t Month;
uint8_t Date;
uint8_t Day; //RTC_SUN、RTC_MON、RTC_TUE、RTC_WED、RTC_THU、RTC_FRI、RTC_SAT
uint8_t Hour;
uint8_t Minute;
uint8_t Second;
} RTC_DateTime;
void RTC_Init(RTC_TypeDef *RTCx, RTC_InitStructure *initStruct);
void RTC_Start(RTC_TypeDef *RTCx);
void RTC_Stop(RTC_TypeDef *RTCx);
void RTC_GetDateTime(RTC_TypeDef *RTCx, RTC_DateTime *dateTime);
void RTC_AlarmSetup(RTC_TypeDef *RTCx, RTC_AlarmStructure *alarmStruct);
void RTC_IntSecondEn(RTC_TypeDef *RTCx);
void RTC_IntSecondDis(RTC_TypeDef *RTCx);
void RTC_IntSecondClr(RTC_TypeDef *RTCx);
uint32_t RTC_IntSecondStat(RTC_TypeDef *RTCx);
void RTC_IntMinuteEn(RTC_TypeDef *RTCx);
void RTC_IntMinuteDis(RTC_TypeDef *RTCx);
void RTC_IntMinuteClr(RTC_TypeDef *RTCx);
uint32_t RTC_IntMinuteStat(RTC_TypeDef *RTCx);
void RTC_IntHourEn(RTC_TypeDef *RTCx);
void RTC_IntHourDis(RTC_TypeDef *RTCx);
void RTC_IntHourClr(RTC_TypeDef *RTCx);
uint32_t RTC_IntHourStat(RTC_TypeDef *RTCx);
void RTC_IntDateEn(RTC_TypeDef *RTCx);
void RTC_IntDateDis(RTC_TypeDef *RTCx);
void RTC_IntDateClr(RTC_TypeDef *RTCx);
uint32_t RTC_IntDateStat(RTC_TypeDef *RTCx);
void RTC_IntAlarmEn(RTC_TypeDef *RTCx);
void RTC_IntAlarmDis(RTC_TypeDef *RTCx);
void RTC_IntAlarmClr(RTC_TypeDef *RTCx);
uint32_t RTC_IntAlarmStat(RTC_TypeDef *RTCx);
#endif //__SWM320_RTC_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdio.h
-141
View File
@@ -1,141 +0,0 @@
#ifndef __SWM320_SDIO_H__
#define __SWM320_SDIO_H__
#define SD_CMD_GO_IDLE_STATE ((uint8_t)0)
#define SD_CMD_SEND_OP_COND ((uint8_t)1)
#define SD_CMD_ALL_SEND_CID ((uint8_t)2)
#define SD_CMD_SET_REL_ADDR ((uint8_t)3)
#define SD_CMD_SET_DSR ((uint8_t)4)
#define SD_CMD_HS_SWITCH ((uint8_t)6)
#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7)
#define SD_CMD_SEND_IF_COND ((uint8_t)8)
#define SD_CMD_SEND_CSD ((uint8_t)9)
#define SD_CMD_SEND_CID ((uint8_t)10)
#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12)
#define SD_CMD_SEND_STATUS ((uint8_t)13)
#define SD_CMD_SET_BLOCKLEN ((uint8_t)16)
#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17)
#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18)
#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24)
#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25)
#define SD_CMD_PROG_CID ((uint8_t)26)
#define SD_CMD_PROG_CSD ((uint8_t)27)
#define SD_CMD_APP_CMD ((uint8_t)55)
/*Following commands are SD Card Specific commands.
SDIO_APP_CMD should be sent before sending these commands. */
#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6)
#define SD_CMD_SD_APP_STAUS ((uint8_t)13)
#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22)
#define SD_CMD_SD_APP_OP_COND ((uint8_t)41)
#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42)
#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51)
#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52)
#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53)
#define SD_RESP_NO 0 //0 无响应
#define SD_RESP_32b 2 //2 32位响应
#define SD_RESP_128b 1 //1 128位响应
#define SD_RESP_32b_busy 3 //3 32位响应，check Busy after response
#define SD_BUSWIDTH_1b 0
#define SD_BUSWIDTH_4b 2
#define SD_RES_OK 0
#define SD_RES_ERR 1
#define SD_RES_TIMEOUT 2
typedef struct
{
__IO uint8_t CSDStruct; // CSD structure
__IO uint8_t SysSpecVersion; // System specification version
__IO uint8_t Reserved1; // Reserved
__IO uint8_t TAAC; // Data read access-time 1
__IO uint8_t NSAC; // Data read access-time 2 in CLK cycles
__IO uint8_t MaxBusClkFrec; // Max. bus clock frequency
__IO uint16_t CardComdClasses; //< Card command classes
__IO uint8_t RdBlockLen; // Max. read data block length
__IO uint8_t PartBlockRead; // Partial blocks for read allowed
__IO uint8_t WrBlockMisalign; // Write block misalignment
__IO uint8_t RdBlockMisalign; // Read block misalignment
__IO uint8_t DSRImpl; // DSR implemented
__IO uint8_t Reserved2; // Reserved
__IO uint32_t DeviceSize; // Device Size
__IO uint8_t MaxRdCurrentVDDMin; // Max. read current @ VDD min
__IO uint8_t MaxRdCurrentVDDMax; // Max. read current @ VDD max
__IO uint8_t MaxWrCurrentVDDMin; // Max. write current @ VDD min
__IO uint8_t MaxWrCurrentVDDMax; // Max. write current @ VDD max
__IO uint8_t DeviceSizeMul; // Device size multiplier
__IO uint8_t EraseGrSize; // Erase group size
__IO uint8_t EraseGrMul; // Erase group size multiplier
__IO uint8_t WrProtectGrSize; // Write protect group size
__IO uint8_t WrProtectGrEnable; // Write protect group enable
__IO uint8_t ManDeflECC; // Manufacturer default ECC
__IO uint8_t WrSpeedFact; // Write speed factor
__IO uint8_t MaxWrBlockLen; // Max. write data block length
__IO uint8_t WriteBlockPaPartial; // Partial blocks for write allowed
__IO uint8_t Reserved3; // Reserded
__IO uint8_t ContentProtectAppli; // Content protection application
__IO uint8_t FileFormatGrouop; // File format group
__IO uint8_t CopyFlag; // Copy flag (OTP)
__IO uint8_t PermWrProtect; // Permanent write protection
__IO uint8_t TempWrProtect; // Temporary write protection
__IO uint8_t FileFormat; // File Format
__IO uint8_t ECC; // ECC code
} SD_CSD;
typedef struct
{
__IO uint8_t ManufacturerID; // ManufacturerID
__IO uint16_t OEM_AppliID; // OEM/Application ID
__IO uint32_t ProdName1; // Product Name part1
__IO uint8_t ProdName2; // Product Name part2
__IO uint8_t ProdRev; // Product Revision
__IO uint32_t ProdSN; // Product Serial Number
__IO uint8_t Reserved1; // Reserved1
__IO uint16_t ManufactDate; // Manufacturing Date
} SD_CID;
#define SDIO_STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
#define SDIO_STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
#define SDIO_HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
#define SDIO_MULTIMEDIA_CARD ((uint32_t)0x00000003)
#define SDIO_SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
#define SDIO_HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
#define SDIO_SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
#define SDIO_HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
typedef struct
{
SD_CSD SD_csd;
SD_CID SD_cid;
uint64_t CardCapacity; // Card Capacity
uint32_t CardBlockSize; // Card Block Size
uint16_t RCA;
uint8_t CardType;
} SD_CardInfo;
extern SD_CardInfo SD_cardInfo;
uint32_t SDIO_Init(uint32_t freq);
uint32_t SDIO_BlockWrite(uint32_t block_addr, uint32_t buff[]);
uint32_t SDIO_BlockRead(uint32_t block_addr, uint32_t buff[]);
uint32_t SDIO_MultiBlockWrite(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]);
uint32_t SDIO_MultiBlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]);
uint32_t SDIO_DMABlockWrite(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]);
uint32_t SDIO_DMABlockRead(uint32_t block_addr, uint16_t block_cnt, uint32_t buff[]);
uint32_t _SDIO_SendCmd(uint32_t cmd, uint32_t arg, uint32_t resp_type, uint32_t *resp_data, uint32_t have_data, uint32_t data_read, uint16_t block_cnt, uint32_t use_dma);
#define SDIO_SendCmd(cmd, arg, resp_type, resp_data) _SDIO_SendCmd(cmd, arg, resp_type, resp_data, 0, 0, 0, 0)
#define SDIO_SendCmdWithData(cmd, arg, resp_type, resp_data, data_read, block_cnt) _SDIO_SendCmd(cmd, arg, resp_type, resp_data, 1, data_read, block_cnt, 0)
#define SDIO_SendCmdWithDataByDMA(cmd, arg, resp_type, resp_data, data_read, block_cnt) _SDIO_SendCmd(cmd, arg, resp_type, resp_data, 1, data_read, block_cnt, 1)
void parseCID(uint32_t CID_Tab[4]);
void parseCSD(uint32_t CID_Tab[4]);
uint32_t calcSDCLKDiv(uint32_t freq_sel);
#endif //__SWM320_SDIO_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sdram.h
-81
View File
@@ -1,81 +0,0 @@
#ifndef __SWM320_SDRAM_H__
#define __SWM320_SDRAM_H__
typedef struct
{
uint8_t CellSize; // SDRAM颗粒的容量，SDRAM_CELLSIZE_16Mb、SDRAM_CELLSIZE_64Mb、SDRAM_CELLSIZE_128Mb、SDRAM_CELLSIZE_256Mb
uint8_t CellBank; // SDRAM颗粒有几个bank，SDRAM_CELLBANK_2、SDRAM_CELLBANK_4
uint8_t CellWidth; // SDRAM颗粒的位宽，SDRAM_CELLWIDTH_16、SDRAM_CELLWIDTH_32
uint8_t CASLatency; // 列地址到有效数据输出间隔，SDRAM_CASLATENCY_2、SDRAM_CASLATENCY_3
uint8_t TimeTMRD; // MRS to New Command
uint8_t TimeTRRD; // Activate to activate on different banks
uint8_t TimeTRAS; // Self refresh time，最小Self-refresh周期
uint8_t TimeTRC; // Row cycle delay，Refresh命令到Activate命令间延时，也是两个连续Refresh命令间延时
uint8_t TimeTRCD; // Row to column delay，行地址到列地址间延时，也即Activate命令到读写命令间延时
uint8_t TimeTRP; // Row precharge delay，Precharge命令到另一个命令间延时
} SDRAM_InitStructure;
#define SDRAM_CELLSIZE_16Mb 3
#define SDRAM_CELLSIZE_64Mb 0
#define SDRAM_CELLSIZE_128Mb 1
#define SDRAM_CELLSIZE_256Mb 2
#define SDRAM_CELLBANK_2 0
#define SDRAM_CELLBANK_4 1
#define SDRAM_CELLWIDTH_16 0
#define SDRAM_CELLWIDTH_32 1
#define SDRAM_CASLATENCY_2 2
#define SDRAM_CASLATENCY_3 3
#define SDRAM_TMRD_3 3
#define SDRAM_TMRD_4 4
#define SDRAM_TMRD_5 5
#define SDRAM_TMRD_6 6
#define SDRAM_TMRD_7 7
#define SDRAM_TRRD_2 2
#define SDRAM_TRRD_3 3
#define SDRAM_TRAS_2 2
#define SDRAM_TRAS_3 3
#define SDRAM_TRAS_4 4
#define SDRAM_TRAS_5 5
#define SDRAM_TRAS_6 6
#define SDRAM_TRAS_7 7
#define SDRAM_TRC_2 2
#define SDRAM_TRC_3 3
#define SDRAM_TRC_4 4
#define SDRAM_TRC_5 5
#define SDRAM_TRC_6 6
#define SDRAM_TRC_7 7
#define SDRAM_TRC_8 8
#define SDRAM_TRC_9 9
#define SDRAM_TRC_10 10
#define SDRAM_TRC_11 11
#define SDRAM_TRC_12 12
#define SDRAM_TRC_13 13
#define SDRAM_TRC_14 14
#define SDRAM_TRC_15 15
#define SDRAM_TRCD_3 3
#define SDRAM_TRCD_4 4
#define SDRAM_TRCD_5 5
#define SDRAM_TRCD_6 6
#define SDRAM_TRCD_7 7
#define SDRAM_TRP_3 3
#define SDRAM_TRP_4 4
#define SDRAM_TRP_5 5
#define SDRAM_TRP_6 6
#define SDRAM_TRP_7 7
void SDRAM_Init(SDRAM_InitStructure *initStruct);
void SDRAM_Enable(void);
void SDRAM_Disable(void);
#endif //__SWM320_SDRAM_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_spi.h
-80
View File
@@ -1,80 +0,0 @@
#ifndef __SWM320_SPI_H__
#define __SWM320_SPI_H__
typedef struct
{
uint8_t FrameFormat; //帧格式：SPI_FORMAT_SPI、SPI_FORMAT_TI_SSI
uint8_t SampleEdge; //在SPI帧格式下，选择数据采样边沿：SPI_FIRST_EDGE、SPI_SECOND_EDGE
uint8_t IdleLevel; //在SPI帧格式下，选择空闲时（无数据传输时）时钟线的电平：SPI_LOW_LEVEL、SPI_HIGH_LEVEL
uint8_t WordSize; //字长度, 有效值4-16
uint8_t Master; //1 主机模式 0 从机模式
uint8_t clkDiv; //SPI_CLK = SYS_CLK / clkDiv，有效值：SPI_CLKDIV_4、SPI_CLKDIV_8、... ... 、SPI_CLKDIV_512
uint8_t RXHFullIEn; //接收FIFO半满中断使能
uint8_t TXEmptyIEn; //发送FIFO 空中断使能
uint8_t TXCompleteIEn; //发送FIFO 空且发送移位寄存器空中断使能
} SPI_InitStructure;
#define SPI_FORMAT_SPI 0 //Motorola SPI 格式
#define SPI_FORMAT_TI_SSI 1 //TI SSI 格式
#define SPI_FIRST_EDGE 0 //第一个时钟沿开始采样
#define SPI_SECOND_EDGE 1 //第二个时钟沿开始采样
#define SPI_LOW_LEVEL 0 //空闲时时钟线保持低电平
#define SPI_HIGH_LEVEL 1 //空闲时时钟线保持高电平
#define SPI_CLKDIV_4 0
#define SPI_CLKDIV_8 1
#define SPI_CLKDIV_16 2
#define SPI_CLKDIV_32 3
#define SPI_CLKDIV_64 4
#define SPI_CLKDIV_128 5
#define SPI_CLKDIV_256 6
#define SPI_CLKDIV_512 7
void SPI_Init(SPI_TypeDef *SPIx, SPI_InitStructure *initStruct); //SPI初始化
void SPI_Open(SPI_TypeDef *SPIx); //SPI打开，允许收发
void SPI_Close(SPI_TypeDef *SPIx); //SPI关闭，禁止收发
uint32_t SPI_Read(SPI_TypeDef *SPIx);
void SPI_Write(SPI_TypeDef *SPIx, uint32_t data);
void SPI_WriteWithWait(SPI_TypeDef *SPIx, uint32_t data);
uint32_t SPI_ReadWrite(SPI_TypeDef *SPIx, uint32_t data);
uint32_t SPI_IsRXEmpty(SPI_TypeDef *SPIx); //接收FIFO是否空，如果不空则可以继续SPI_Read()
uint32_t SPI_IsTXFull(SPI_TypeDef *SPIx); //发送FIFO是否满，如果不满则可以继续SPI_Write()
uint32_t SPI_IsTXEmpty(SPI_TypeDef *SPIx); //发送FIFO是否空
void SPI_INTRXHalfFullEn(SPI_TypeDef *SPIx);
void SPI_INTRXHalfFullDis(SPI_TypeDef *SPIx);
void SPI_INTRXHalfFullClr(SPI_TypeDef *SPIx);
uint32_t SPI_INTRXHalfFullStat(SPI_TypeDef *SPIx);
void SPI_INTRXFullEn(SPI_TypeDef *SPIx);
void SPI_INTRXFullDis(SPI_TypeDef *SPIx);
void SPI_INTRXFullClr(SPI_TypeDef *SPIx);
uint32_t SPI_INTRXFullStat(SPI_TypeDef *SPIx);
void SPI_INTRXOverflowEn(SPI_TypeDef *SPIx);
void SPI_INTRXOverflowDis(SPI_TypeDef *SPIx);
void SPI_INTRXOverflowClr(SPI_TypeDef *SPIx);
uint32_t SPI_INTRXOverflowStat(SPI_TypeDef *SPIx);
void SPI_INTTXHalfFullEn(SPI_TypeDef *SPIx);
void SPI_INTTXHalfFullDis(SPI_TypeDef *SPIx);
void SPI_INTTXHalfFullClr(SPI_TypeDef *SPIx);
uint32_t SPI_INTTXHalfFullStat(SPI_TypeDef *SPIx);
void SPI_INTTXEmptyEn(SPI_TypeDef *SPIx);
void SPI_INTTXEmptyDis(SPI_TypeDef *SPIx);
void SPI_INTTXEmptyClr(SPI_TypeDef *SPIx);
uint32_t SPI_INTTXEmptyStat(SPI_TypeDef *SPIx);
void SPI_INTTXCompleteEn(SPI_TypeDef *SPIx);
void SPI_INTTXCompleteDis(SPI_TypeDef *SPIx);
void SPI_INTTXCompleteClr(SPI_TypeDef *SPIx);
uint32_t SPI_INTTXCompleteStat(SPI_TypeDef *SPIx);
void SPI_INTTXWordCompleteEn(SPI_TypeDef *SPIx);
void SPI_INTTXWordCompleteDis(SPI_TypeDef *SPIx);
void SPI_INTTXWordCompleteClr(SPI_TypeDef *SPIx);
uint32_t SPI_INTTXWordCompleteStat(SPI_TypeDef *SPIx);
#endif //__SWM320_SPI_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_sram.h
-29
View File
@@ -1,29 +0,0 @@
#ifndef __SWM320_SRAM_H__
#define __SWM320_SRAM_H__
typedef struct
{
uint8_t ClkDiv; //SRAM_CLKDIV_5...SRAM_CLKDIV_16，根据SRAM芯片所能跑的最高频率选择合适分频
uint8_t DataWidth; //SRAM_DATAWIDTH_8、SRAM_DATAWIDTH_16
} SRAM_InitStructure;
#define SRAM_CLKDIV_4 3
#define SRAM_CLKDIV_5 4
#define SRAM_CLKDIV_6 5
#define SRAM_CLKDIV_7 6
#define SRAM_CLKDIV_8 7
#define SRAM_CLKDIV_9 8
#define SRAM_CLKDIV_10 9
#define SRAM_CLKDIV_11 10
#define SRAM_CLKDIV_12 11
#define SRAM_CLKDIV_13 12
#define SRAM_CLKDIV_14 13
#define SRAM_CLKDIV_15 14
#define SRAM_CLKDIV_16 15
#define SRAM_DATAWIDTH_8 1
#define SRAM_DATAWIDTH_16 0
void SRAM_Init(SRAM_InitStructure *initStruct);
#endif //__SWM320_SRAM_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_timr.h
-29
View File
@@ -1,29 +0,0 @@
#ifndef __SWM320_TIMR_H__
#define __SWM320_TIMR_H__
#define TIMR_MODE_TIMER 0
#define TIMR_MODE_COUNTER 1
void TIMR_Init(TIMR_TypeDef *TIMRx, uint32_t mode, uint32_t period, uint32_t int_en); //定时器/计数器初始化
void TIMR_Start(TIMR_TypeDef *TIMRx); //启动定时器，从初始值开始计时/计数
void TIMR_Stop(TIMR_TypeDef *TIMRx); //停止定时器
void TIMR_Halt(TIMR_TypeDef *TIMRx); //暂停定时器，计数值保持不变
void TIMR_Resume(TIMR_TypeDef *TIMRx); //恢复定时器，从暂停处继续计数
void TIMR_SetPeriod(TIMR_TypeDef *TIMRx, uint32_t period); //设置定时/计数周期
uint32_t TIMR_GetPeriod(TIMR_TypeDef *TIMRx); //获取定时/计数周期
uint32_t TIMR_GetCurValue(TIMR_TypeDef *TIMRx); //获取当前计数值
void TIMR_INTEn(TIMR_TypeDef *TIMRx); //使能中断
void TIMR_INTDis(TIMR_TypeDef *TIMRx); //禁能中断
void TIMR_INTClr(TIMR_TypeDef *TIMRx); //清除中断标志
uint32_t TIMR_INTStat(TIMR_TypeDef *TIMRx); //获取中断状态
#define PULSE_LOW 0
#define PULSE_HIGH 1
void Pulse_Init(uint32_t pulse, uint32_t int_en);
void Pulse_Start(void);
uint32_t Pulse_Done(void);
#endif //__SWM320_TIMR_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_uart.h
-90
View File
@@ -1,90 +0,0 @@
#ifndef __SWM320_UART_H__
#define __SWM320_UART_H__
typedef struct
{
uint32_t Baudrate;
uint8_t DataBits; //数据位位数，可取值UART_DATA_8BIT、UART_DATA_9BIT
uint8_t Parity; //奇偶校验位，可取值UART_PARITY_NONE、UART_PARITY_ODD、UART_PARITY_EVEN、UART_PARITY_ONE、UART_PARITY_ZERO
uint8_t StopBits; //停止位位数，可取值UART_STOP_1BIT、UART_STOP_2BIT
uint8_t RXThreshold; //取值0--7
uint8_t RXThresholdIEn; //当RX FIFO中数据个数 > RXThreshold时触发中断
uint8_t TXThreshold; //取值0--7
uint8_t TXThresholdIEn; //当TX FIFO中数据个数 <= TXThreshold时触发中断
uint8_t TimeoutTime; //超时时长 = TimeoutTime/(Baudrate/10) 秒
uint8_t TimeoutIEn; //超时中断，RX FIFO非空，且超过 TimeoutTime/(Baudrate/10) 秒没有在RX线上接收到数据时触发中断
} UART_InitStructure;
#define UART_DATA_8BIT 0
#define UART_DATA_9BIT 1
#define UART_PARITY_NONE 0
#define UART_PARITY_ODD 1
#define UART_PARITY_EVEN 3
#define UART_PARITY_ONE 5
#define UART_PARITY_ZERO 7
#define UART_STOP_1BIT 0
#define UART_STOP_2BIT 1
#define UART_RTS_1BYTE 0
#define UART_RTS_2BYTE 1
#define UART_RTS_4BYTE 2
#define UART_RTS_6BYTE 3
#define UART_ABR_RES_OK 1
#define UART_ABR_RES_ERR 2
#define UART_ERR_FRAME 1
#define UART_ERR_PARITY 2
#define UART_ERR_NOISE 3
void UART_Init(UART_TypeDef *UARTx, UART_InitStructure *initStruct); //UART串口初始化
void UART_Open(UART_TypeDef *UARTx);
void UART_Close(UART_TypeDef *UARTx);
void UART_WriteByte(UART_TypeDef *UARTx, uint32_t data); //发送一个字节数据
uint32_t UART_ReadByte(UART_TypeDef *UARTx, uint32_t *data); //读取一个字节数据，并指出数据是否Valid
uint32_t UART_IsTXBusy(UART_TypeDef *UARTx);
uint32_t UART_IsRXFIFOEmpty(UART_TypeDef *UARTx); //接收FIFO是否空，如果不空则可以继续UART_ReadByte()
uint32_t UART_IsTXFIFOFull(UART_TypeDef *UARTx); //发送FIFO是否满，如果不满则可以继续UART_WriteByte()
void UART_SetBaudrate(UART_TypeDef *UARTx, uint32_t baudrate); //设置波特率
uint32_t UART_GetBaudrate(UART_TypeDef *UARTx); //获取当前使用的波特率
void UART_CTSConfig(UART_TypeDef *UARTx, uint32_t enable, uint32_t polarity);
uint32_t UART_CTSLineState(UART_TypeDef *UARTx);
void UART_RTSConfig(UART_TypeDef *UARTx, uint32_t enable, uint32_t polarity, uint32_t threshold);
uint32_t UART_RTSLineState(UART_TypeDef *UARTx);
void UART_LINConfig(UART_TypeDef *UARTx, uint32_t detectedIEn, uint32_t generatedIEn);
void UART_LINGenerate(UART_TypeDef *UARTx);
uint32_t UART_LINIsDetected(UART_TypeDef *UARTx);
uint32_t UART_LINIsGenerated(UART_TypeDef *UARTx);
void UART_ABRStart(UART_TypeDef *UARTx, uint32_t detectChar);
uint32_t UART_ABRIsDone(UART_TypeDef *UARTx);
void UART_INTRXThresholdEn(UART_TypeDef *UARTx);
void UART_INTRXThresholdDis(UART_TypeDef *UARTx);
uint32_t UART_INTRXThresholdStat(UART_TypeDef *UARTx);
void UART_INTTXThresholdEn(UART_TypeDef *UARTx);
void UART_INTTXThresholdDis(UART_TypeDef *UARTx);
uint32_t UART_INTTXThresholdStat(UART_TypeDef *UARTx);
void UART_INTTimeoutEn(UART_TypeDef *UARTx);
void UART_INTTimeoutDis(UART_TypeDef *UARTx);
uint32_t UART_INTTimeoutStat(UART_TypeDef *UARTx);
void UART_INTTXDoneEn(UART_TypeDef *UARTx);
void UART_INTTXDoneDis(UART_TypeDef *UARTx);
uint32_t UART_INTTXDoneStat(UART_TypeDef *UARTx);
#endif //__SWM320_UART_H__
bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_wdt.h
-18
View File
@@ -1,18 +0,0 @@
#ifndef __SWM320_WDT_H__
#define __SWM320_WDT_H__
#define WDT_MODE_RESET 0
#define WDT_MODE_INTERRUPT 1
void WDT_Init(WDT_TypeDef *WDTx, uint32_t peroid, uint32_t mode); //WDT看门狗初始化
void WDT_Start(WDT_TypeDef *WDTx); //启动指定WDT，开始倒计时
void WDT_Stop(WDT_TypeDef *WDTx); //关闭指定WDT，停止倒计时
void WDT_Feed(WDT_TypeDef *WDTx); //喂狗，重新从装载值开始倒计时
int32_t WDT_GetValue(WDT_TypeDef *WDTx); //获取指定看门狗定时器的当前倒计时值
void WDT_INTClr(WDT_TypeDef *WDTx); //中断标志清除
uint32_t WDT_INTStat(WDT_TypeDef *WDTx); //中断状态查询
#endif //__SWM320_WDT_H__
bsp/swm320/project.uvoptx
-185
View File
@@ -1,185 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rtthread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>4</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0SWM320xE -FL080000 -FS00 -FP0($$Device:SWM320xE$Flash\SWM320xE.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN1 -FF0SWM320xE -FS00 -FL080000 -FP0($$Device:SWM320xE$Flash\SWM320xE.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
<Group>
<GroupName>Source Group 1</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
</Group>
</ProjectOpt>
bsp/swm341/drivers/.config
-42
View File
@@ -1,42 +0,0 @@
#
# Automatically generated file; DO NOT EDIT.
# RootMenu
#
#
# Hardware Drivers Config
#
CONFIG_SOC_SWM341=y
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_CAN is not set
# CONFIG_BSP_USING_TIM is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_RTC is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_CRC is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_GT9147 is not set
# CONFIG_BSP_USING_RGB_LCD is not set
#
# Onboard Peripheral Drivers
#
#
# Offboard Peripheral Drivers
#
bsp/swm320/.config → bsp/synwit/swm320/.config
-58
View File
@@ -661,64 +661,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MFBD is not set
# CONFIG_PKG_USING_SLCAN2RTT is not set
# CONFIG_PKG_USING_SOEM is not set
# CONFIG_PKG_USING_QPARAM is not set
#
# Privated Packages of RealThread
#
# CONFIG_PKG_USING_CODEC is not set
# CONFIG_PKG_USING_PLAYER is not set
# CONFIG_PKG_USING_MPLAYER is not set
# CONFIG_PKG_USING_PERSIMMON_SRC is not set
# CONFIG_PKG_USING_JS_PERSIMMON is not set
# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
#
# Network Utilities
#
# CONFIG_PKG_USING_WICED is not set
# CONFIG_PKG_USING_CLOUDSDK is not set
# CONFIG_PKG_USING_POWER_MANAGER is not set
# CONFIG_PKG_USING_RT_OTA is not set
# CONFIG_PKG_USING_RTINSIGHT is not set
# CONFIG_PKG_USING_SMARTCONFIG is not set
# CONFIG_PKG_USING_RTX is not set
# CONFIG_RT_USING_TESTCASE is not set
# CONFIG_PKG_USING_NGHTTP2 is not set
# CONFIG_PKG_USING_AVS is not set
# CONFIG_PKG_USING_ALI_LINKKIT is not set
# CONFIG_PKG_USING_STS is not set
# CONFIG_PKG_USING_DLMS is not set
# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
# CONFIG_PKG_USING_ZBAR is not set
# CONFIG_PKG_USING_MCF is not set
# CONFIG_PKG_USING_URPC is not set
# CONFIG_PKG_USING_DCM is not set
# CONFIG_PKG_USING_EMQ is not set
# CONFIG_PKG_USING_CFGM is not set
# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
# CONFIG_PKG_USING_SMODULE is not set
# CONFIG_PKG_USING_SNFD is not set
# CONFIG_PKG_USING_UDBD is not set
# CONFIG_PKG_USING_BENCHMARK is not set
# CONFIG_PKG_USING_UBJSON is not set
# CONFIG_PKG_USING_DATATYPE is not set
# CONFIG_PKG_USING_FASTFS is not set
# CONFIG_PKG_USING_RIL is not set
# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
# CONFIG_PKG_USING_WATCH_APP_FWK is not set
# CONFIG_PKG_USING_GUI_TEST is not set
# CONFIG_PKG_USING_PMEM is not set
# CONFIG_PKG_USING_LWRDP is not set
# CONFIG_PKG_USING_MASAN is not set
# CONFIG_PKG_USING_BSDIFF_LIB is not set
# CONFIG_PKG_USING_PRC_DIFF is not set
#
# RT-Thread Smart
#
# CONFIG_PKG_USING_UKERNEL is not set
# CONFIG_PKG_USING_TRACE_AGENT is not set
#
# Hardware Drivers Config
bsp/swm320/Kconfig → bsp/synwit/swm320/Kconfig
+1 -1
View File
@@ -8,7 +8,7 @@ config BSP_DIR
config RTT_DIR
string
option env="RTT_ROOT"
default "../.."
default "../../.."
config PKGS_DIR
string
bsp/swm320/README.md → bsp/synwit/swm320/README.md
+1 -1
View File
@@ -103,7 +103,7 @@
> 工程默认配置使用 Jlink 仿真器下载程序，在通过 Jlink 连接开发板到 PC 的基础上，点击下载按钮即可下载程序到开发板
推荐熟悉 RT_Thread 的用户使用[env工具](https://www.rt-thread.org/page/download.html)，可以在console下进入到 `bsp/swm320` 目录中，运行以下命令：
推荐熟悉 RT_Thread 的用户使用[env工具](https://www.rt-thread.org/page/download.html)，可以在console下进入到 `bsp/synwit/swm320` 目录中，运行以下命令：
`scons`
bsp/swm320/SConscript → bsp/synwit/swm320/SConscript
View File
bsp/swm341/SConstruct → bsp/synwit/swm320/SConstruct
+1 -1
View File
@@ -5,7 +5,7 @@ import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
bsp/swm320/applications/SConscript → bsp/synwit/swm320/applications/SConscript
View File
bsp/swm320/applications/main.c → bsp/synwit/swm320/applications/main.c
+85 -86
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/drivers/Kconfig → bsp/synwit/swm320/drivers/Kconfig
View File
bsp/swm320/drivers/SConscript → bsp/synwit/swm320/drivers/SConscript
View File
bsp/swm320/drivers/board.c → bsp/synwit/swm320/drivers/board.c
+15 -39
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -29,52 +29,28 @@ void SysTick_Handler(void)
rt_interrupt_leave();
}
/**
* This function will delay for some us.
*
* @param us the delay time of us
*/
void rt_hw_us_delay(rt_uint32_t us)
{
rt_uint32_t ticks;
rt_uint32_t told, tnow, tcnt = 0;
rt_uint32_t reload = SysTick->LOAD;
ticks = us * reload / (1000000 / RT_TICK_PER_SECOND);
told = SysTick->VAL;
while (1)
{
tnow = SysTick->VAL;
if (tnow != told)
{
if (tnow < told)
{
tcnt += told - tnow;
}
else
{
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks)
{
break;
}
}
}
}
void rt_hw_board_init()
{
bsp_clock_config();
/* Heap initialization */
#ifdef RT_USING_HEAP
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
/* Pin driver initialization is open by default */
#ifdef RT_USING_PIN
swm_pin_init();
#endif
/* USART driver initialization is open by default */
#ifdef RT_USING_SERIAL
swm_uart_init();
#endif
/* Set the shell console output device */
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
/* Board underlying hardware initialization */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}
bsp/swm320/drivers/board.h → bsp/synwit/swm320/drivers/board.h
+4 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -18,6 +18,9 @@
#include <string.h>
#include <SWM320.h>
#include "drv_gpio.h"
#include "drv_uart.h"
#ifdef __cplusplus
extern "C"
{
bsp/synwit/swm320/drivers/drv_adc.c
+289
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_adc.h
+18
View File
@@ -0,0 +1,18 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-5-26 lik first version
*/
#ifndef __DRV_ADC_H__
#define __DRV_ADC_H__
#include "board.h"
int swm_adc_init(void);
#endif /* __DRV_ADC_H__ */
bsp/synwit/swm320/drivers/drv_crypto.c
+250
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_crypto.h
+18
View File
@@ -0,0 +1,18 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-10 lik first version
*/
#ifndef __DRV_CRYPTO_H__
#define __DRV_CRYPTO_H__
#include "board.h"
int swm_crypto_init(void);
#endif /* __DRV_CRYPTO_H__ */
bsp/swm320/drivers/drv_gpio.c → bsp/synwit/swm320/drivers/drv_gpio.c
+158 -97
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_gpio.h
+28
View File
@@ -0,0 +1,28 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_GPIO_H__
#define __DRV_GPIO_H__
#include "board.h"
#define GET_PIN(GPIOx,PIN) (rt_uint8_t)__SWM_GET_PIN_##GPIOx(PIN)
#define __SWM_GET_PIN_A(PIN) (PIN)
#define __SWM_GET_PIN_B(PIN) (13 + PIN)
#define __SWM_GET_PIN_C(PIN) (26 + PIN)
#define __SWM_GET_PIN_M(PIN) (34 + PIN)
#define __SWM_GET_PIN_N(PIN) (56 + PIN)
#define __SWM_GET_PIN_P(PIN) (76 + PIN)
int swm_pin_init(void);
#endif /* __DRV_GPIO_H__ */
bsp/synwit/swm320/drivers/drv_hwtimer.c
+350
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_hwtimer.h
+19
View File
@@ -0,0 +1,19 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#include "board.h"
int swm_timer_init(void);
#endif /* __DRV_HWTIMER_H__ */
bsp/swm341/drivers/drv_log.h → bsp/synwit/swm320/drivers/drv_log.h
View File
bsp/swm320/drivers/drv_nor_flash.c → bsp/synwit/swm320/drivers/drv_nor_flash.c
+15 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -18,6 +18,10 @@
#define LOG_TAG "drv.norflash"
#include <drv_log.h>
#define BLOCK_SIZE (64 * 1024)
#define FLASH_SIZE (BSP_NOR_FLASH_SIZE)
#define BLOCK_COUNTER (FLASH_SIZE / BLOCK_SIZE)
static struct rt_mutex flash_lock;
/* RT-Thread MTD device interface */
@@ -64,15 +68,16 @@ static rt_err_t swm_norflash_erase_block(struct rt_mtd_nor_device *device,
return RT_EOK;
}
const static struct rt_mtd_nor_driver_ops mtd_ops =
const static struct rt_mtd_nor_driver_ops swm_mtd_ops =
{
swm_norflash_read_id,
swm_norflash_read,
swm_norflash_write,
swm_norflash_erase_block};
static struct rt_mtd_nor_device mtd;
int rt_hw_norflash_init(void)
static struct rt_mtd_nor_device mtd_device;
int swm_norflash_init(void)
{
NORFL_InitStructure NORFL_InitStruct;
@@ -92,8 +97,8 @@ int rt_hw_norflash_init(void)
NORFL_Init(&NORFL_InitStruct);
/* set page size and block size */
mtd.block_size = BLOCK_SIZE; /* 64kByte */
mtd.ops = &mtd_ops;
mtd_device.block_size = BLOCK_SIZE; /* 64kByte */
mtd_device.ops = &swm_mtd_ops;
/* initialize mutex */
if (rt_mutex_init(&flash_lock, "nor", RT_IPC_FLAG_PRIO) != RT_EOK)
@@ -101,13 +106,13 @@ int rt_hw_norflash_init(void)
rt_kprintf("init sd lock mutex failed\n");
return -RT_ERROR;
}
mtd.block_start = 0;
mtd.block_end = BLOCK_COUNTER;
mtd_device.block_start = 0;
mtd_device.block_end = BLOCK_COUNTER;
/* register MTD device */
rt_mtd_nor_register_device("nor", &mtd);
rt_mtd_nor_register_device("nor", &mtd_device);
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_norflash_init);
INIT_DEVICE_EXPORT(swm_norflash_init);
#endif /* BSP_USING_NOR_FLASH */
bsp/swm320/drivers/drv_nor_flash.h → bsp/synwit/swm320/drivers/drv_nor_flash.h
+2 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,10 +14,6 @@
#include "board.h"
#define BLOCK_SIZE (64 * 1024)
#define FLASH_SIZE (BSP_NOR_FLASH_SIZE)
#define BLOCK_COUNTER (FLASH_SIZE / BLOCK_SIZE)
int rt_hw_norflash_init(void);
int swm_norflash_init(void);
#endif
bsp/synwit/swm320/drivers/drv_pwm.c
+382
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_pwm.h
+19
View File
@@ -0,0 +1,19 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_PWM_H__
#define __DRV_PWM_H__
#include "board.h"
int swm_pwm_init(void);
#endif /* __DRV_PWM_H__ */
bsp/swm320/drivers/drv_rtc.c → bsp/synwit/swm320/drivers/drv_rtc.c
+32 -29
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -10,7 +10,6 @@
*/
#include "drv_rtc.h"
#include <sys/time.h>
#ifdef RT_USING_RTC
#ifdef BSP_USING_RTC
@@ -19,6 +18,8 @@
#define LOG_TAG "drv.rtc"
#include <drv_log.h>
static rt_rtc_dev_t swm_rtc_device;
static uint32_t calcWeekDay(uint32_t year, uint32_t month, uint32_t date)
{
uint32_t i, cnt = 0;
@@ -54,8 +55,8 @@ static time_t swm_get_rtc_time_stamp(void)
tm_new.tm_min = get_datetime.Minute;
tm_new.tm_hour = get_datetime.Hour;
tm_new.tm_mday = get_datetime.Date;
tm_new.tm_mon = get_datetime.Month;
tm_new.tm_year = get_datetime.Year;
tm_new.tm_mon = get_datetime.Month - 1;
tm_new.tm_year = get_datetime.Year - 1900;
LOG_D("get rtc time.");
return mktime(&tm_new);
@@ -70,8 +71,8 @@ static rt_err_t swm_set_rtc_time_stamp(time_t time_stamp)
set_datetime.Minute = now.tm_min;
set_datetime.Hour = now.tm_hour;
set_datetime.Date = now.tm_mday;
set_datetime.Month = now.tm_mon;
set_datetime.Year = now.tm_year;
set_datetime.Month = now.tm_mon + 1;
set_datetime.Year = now.tm_year + 1900;
// set_datetime.Day = now.tm_wday;
RTC_Stop(RTC);
@@ -92,73 +93,75 @@ static rt_err_t swm_set_rtc_time_stamp(time_t time_stamp)
return RT_EOK;
}
static rt_err_t swm_rtc_init(void)
static rt_err_t swm_rtc_configure(void)
{
RTC_InitStructure rtc_initstruct;
rtc_initstruct.Year = 2020;
rtc_initstruct.Month = 6;
rtc_initstruct.Date = 8;
rtc_initstruct.Hour = 12;
rtc_initstruct.Minute = 0;
rtc_initstruct.Second = 0;
rtc_initstruct.Month = 2;
rtc_initstruct.Date = 28;
rtc_initstruct.Hour = 23;
rtc_initstruct.Minute = 59;
rtc_initstruct.Second = 55;
rtc_initstruct.SecondIEn = 0;
rtc_initstruct.MinuteIEn = 0;
RTC_Init(RTC, &rtc_initstruct);
RTC_Start(RTC);
return RT_EOK;
}
static rt_err_t swm_rtc_get_secs(void *args)
static rt_err_t swm_rtc_get_secs(time_t *args)
{
*(rt_uint32_t *)args = swm_get_rtc_time_stamp();
LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
*args = swm_get_rtc_time_stamp();
LOG_D("RTC: get rtc_time %x\n", *args);
return RT_EOK;
}
static rt_err_t swm_rtc_set_secs(void *args)
static rt_err_t swm_rtc_set_secs(time_t *args)
{
rt_err_t result = RT_EOK;
if (swm_set_rtc_time_stamp(*(rt_uint32_t *)args))
if (swm_set_rtc_time_stamp(*args))
{
result = -RT_ERROR;
}
LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args);
LOG_D("RTC: set rtc_time %x\n", *args);
return result;
}
static const struct rt_rtc_ops swm_rtc_ops =
{
swm_rtc_init,
swm_rtc_get_secs,
swm_rtc_set_secs,
.init = swm_rtc_configure,
.get_secs = swm_rtc_get_secs,
.set_secs = swm_rtc_set_secs,
RT_NULL,
RT_NULL,
RT_NULL,
RT_NULL,
};
static rt_rtc_dev_t swm_rtc_device;
int rt_hw_rtc_init(void)
int swm_rtc_init(void)
{
rt_err_t result;
swm_rtc_configure();
swm_rtc_device.ops = &swm_rtc_ops;
result = rt_hw_rtc_register(&swm_rtc_device, "rtc", RT_DEVICE_FLAG_RDWR,RT_NULL);
if (result != RT_EOK)
{
LOG_E("rtc register err code: %d", result);
return result;
}
LOG_D("rtc init success");
return RT_EOK;
else
{
LOG_D("rtc register success.");
}
return result;
}
INIT_DEVICE_EXPORT(rt_hw_rtc_init);
INIT_DEVICE_EXPORT(swm_rtc_init);
#endif /* BSP_USING_RTC */
#endif /* RT_USING_RTC */
bsp/swm320/drivers/drv_rtc.h → bsp/synwit/swm320/drivers/drv_rtc.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,6 +14,6 @@
#include "board.h"
int rt_hw_rtc_init(void);
int swm_rtc_init(void);
#endif /* __DRV_RTC_H__ */
bsp/swm320/drivers/drv_sdio.c → bsp/synwit/swm320/drivers/drv_sdio.c
+131 -86
View File
File diff suppressed because it is too large Load Diff
bsp/swm341/drivers/drv_sdio.h → bsp/synwit/swm320/drivers/drv_sdio.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2021, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/synwit/swm320/drivers/drv_soft_i2c.c
+228
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_soft_i2c.h
+19
View File
@@ -0,0 +1,19 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_SOFT_I2C_H__
#define __DRV_SOFT_I2C_H__
#include "board.h"
int swm_i2c_init(void);
#endif /* __DRV_SOFT_I2C_H__ */
bsp/swm320/drivers/drv_spi.c → bsp/synwit/swm320/drivers/drv_spi.c
+119 -58
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_spi.h
+21
View File
@@ -0,0 +1,21 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_SPI_H__
#define __DRV_SPI_H__
#include "board.h"
//cannot be used before completion init
rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, GPIO_TypeDef *GPIOx, uint32_t n);
int swm_spi_init(void);
#endif /* __DRV_SPI_H__ */
bsp/swm320/drivers/drv_sram.c → bsp/synwit/swm320/drivers/drv_sram.c
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/swm320/drivers/drv_sram.h → bsp/synwit/swm320/drivers/drv_sram.h
+1 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
bsp/synwit/swm320/drivers/drv_uart.c
+376
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/drivers/drv_uart.h
+19
View File
@@ -0,0 +1,19 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#include "board.h"
int swm_uart_init(void);
#endif /* __DRV_UART_H__ */
bsp/synwit/swm320/drivers/drv_wdt.c
+105
View File
@@ -0,0 +1,105 @@
/*
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik format file
*/
#include "drv_wdt.h"
#ifdef RT_USING_WDT
#ifdef BSP_USING_WDT
//#define DRV_DEBUG
#define LOG_TAG "drv.wdt"
#include <drv_log.h>
struct swm_wdt_cfg
{
const char *name;
WDT_TypeDef *WDTx;
};
struct swm_wdt_device
{
struct swm_wdt_cfg *wdt_cfg;
struct rt_watchdog_device wdt_device;
};
static struct swm_wdt_cfg swm_wdt_cfg =
{
.name = "wdt",
.WDTx = WDT,
};
static struct swm_wdt_device wdt_obj;
static rt_err_t swm_wdt_configure(rt_watchdog_t *wdt_device)
{
return RT_EOK;
}
static rt_err_t swm_wdt_control(rt_watchdog_t *wdt_device, int cmd, void *arg)
{
struct swm_wdt_cfg *wdt_cfg;
RT_ASSERT(wdt_device != RT_NULL);
wdt_cfg = wdt_device->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
WDT_Feed(wdt_cfg->WDTx);
break;
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
WDT_Init(wdt_cfg->WDTx, (SystemCoreClock * (*(rt_uint32_t *)arg)), WDT_MODE_RESET);
break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
*(rt_uint32_t *)arg = (wdt_cfg->WDTx->LOAD) / SystemCoreClock;
break;
case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
*(rt_uint32_t *)arg = WDT_GetValue(wdt_cfg->WDTx) / SystemCoreClock;
break;
case RT_DEVICE_CTRL_WDT_START:
WDT_Start(wdt_cfg->WDTx);
break;
case RT_DEVICE_CTRL_WDT_STOP:
WDT_Stop(wdt_cfg->WDTx);
break;
default:
LOG_W("This command is not supported.");
return -RT_ERROR;
}
return RT_EOK;
}
static const struct rt_watchdog_ops swm_wdt_ops =
{
.init = swm_wdt_configure,
.control = swm_wdt_control};
int swm_wdt_init(void)
{
int result = RT_EOK;
wdt_obj.wdt_cfg = &swm_wdt_cfg;
wdt_obj.wdt_device.ops = &swm_wdt_ops;
result = rt_hw_watchdog_register(&wdt_obj.wdt_device, wdt_obj.wdt_cfg->name, RT_DEVICE_FLAG_RDWR, wdt_obj.wdt_cfg);
if(result != RT_EOK)
{
LOG_E("wdt device register fail.");
}
else
{
LOG_D("wdt device register success.");
}
return RT_EOK;
}
INIT_BOARD_EXPORT(swm_wdt_init);
#endif /* BSP_USING_WDT */
#endif /* RT_USING_WDT */
bsp/swm320/drivers/drv_wdt.h → bsp/synwit/swm320/drivers/drv_wdt.h
+2 -14
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,18 +14,6 @@
#include "board.h"
struct swm_wdt_cfg
{
const char *name;
WDT_TypeDef *WDTx;
};
struct swm_wdt
{
struct swm_wdt_cfg *cfg;
struct rt_watchdog_device wdt_device;
};
int rt_hw_wdt_init(void);
int swm_wdt_init(void);
#endif /* __DRV_WDT_H__ */
bsp/swm320/drivers/linker_scripts/link.icf → bsp/synwit/swm320/drivers/linker_scripts/link.icf
View File
bsp/swm320/drivers/linker_scripts/link.lds → bsp/synwit/swm320/drivers/linker_scripts/link.lds
View File
bsp/swm320/drivers/linker_scripts/link.sct → bsp/synwit/swm320/drivers/linker_scripts/link.sct
View File
bsp/swm320/keilkill.bat → bsp/synwit/swm320/keilkill.bat
View File
bsp/swm320/libraries/CMSIS/CoreSupport/arm_common_tables.h → bsp/synwit/swm320/libraries/CMSIS/CoreSupport/arm_common_tables.h
+14 -13
View File
@@ -85,13 +85,14 @@ extern const float32_t twiddleCoef_rfft_1024[1024];
extern const float32_t twiddleCoef_rfft_2048[2048];
extern const float32_t twiddleCoef_rfft_4096[4096];
/* floating-point bit reversal tables */
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20)
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48)
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
@@ -107,13 +108,13 @@ extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENG
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
/* fixed-point bit reversal tables */
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12)
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24)
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56)
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112)
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240)
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480)
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
bsp/swm320/libraries/CMSIS/CoreSupport/arm_const_structs.h → bsp/synwit/swm320/libraries/CMSIS/CoreSupport/arm_const_structs.h
+27 -27
View File
@@ -46,34 +46,34 @@
#include "arm_math.h"
#include "arm_common_tables.h"
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
#endif
bsp/swm320/libraries/CMSIS/CoreSupport/arm_math.h → bsp/synwit/swm320/libraries/CMSIS/CoreSupport/arm_math.h
+3754 -3553
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cm0.h
+711
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cm0plus.h
+822
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cm3.h
+1650
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cm4.h
+1802
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cm7.h
+2221
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/CoreSupport/core_cmFunc.h → bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cmFunc.h
+164 -162
View File
File diff suppressed because it is too large Load Diff
bsp/swm320/libraries/CMSIS/CoreSupport/core_cmInstr.h → bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cmInstr.h
+210 -200
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/libraries/CMSIS/CoreSupport/core_cmSimd.h
+697
View File
File diff suppressed because it is too large Load Diff
bsp/synwit/swm320/libraries/CMSIS/DeviceSupport/SWM320.h
+3181
View File
File diff suppressed because it is too large Load Diff

Some files were not shown because too many files have changed in this diff Show More