Merge branch 'RT-Thread:master' into patch-1

2026-09-25 06:13:56 +08:00 · 2021-05-09 15:32:09 +08:00
parent 14d64a1dff 060183184b
commit 7d0aa5bd34
76 changed files with 11064 additions and 5942 deletions
@@ -0,0 +1,16 @@
+mainmenu "RT-Thread Configuration"
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "../libraries/Kconfig"
+source "board/Kconfig"
@@ -0,0 +1,76 @@
+#  Seeed i.MX RT1052 Arch Mix 开发板 BSP 说明
+
+## 简介
+
+![Arch_Mix](figures/Arch_Mix.jpg)
+
+Arch Mix 是 [Seeed Studio](https://www.seeedstudio.com/) 推出的一款基于 i.MX RT 1050 系列芯片的开发板，板载一颗 RGB 灯和一个用户按键，外扩 32M SDRAM，板载资源丰富，运行速度快（主频可达 600MHZ），并且支持外接 LCD 屏幕。Seeed Studio 是一家致力于促进开源硬件发展的服务型企业。目前，已经与众多设计者建立了紧密的合作关系，并且合作推出了涉及新媒体艺术、嵌入式平台、物联网、智能家居、便携式仪器等领域的一系列明星产品和方案。
+
+### 板载资源：
+
+| 硬件 | 描述 |
+| ---- | ---- |
+| 芯片 | i.MX RT 1052 |
+| 架构 | ARM Cortex-M7 |
+| 最高频率 | 600MHz |
+| 内部存储器 | 512KB  SRAM |
+| 外部存储器 | 32M SDRAM、8M QSPI FLASH（存储代码） |
+
+## 编译说明
+
+Arch Mix 板级包支持MDK5﹑IAR开发环境和GCC编译器，以下是具体版本信息：
+
+| IDE/编译器 | 已测试版本 |
+| ---------- | --------- |
+| MDK5 | MDK525 |
+| IAR | IAR 8.11.3.13984 |
+| GCC | GCC 5.4.1 20160919 (release) |
+
+## BSP使用
+
+### 配置工程
+
+- 在 bsp 下打开 env 工具
+- 输入`menuconfig`命令配置工程，配置好之后保存退出。
+- 输入`scons --target=mdk5 -s`或`scons --target=iar`来生成需要的工程
+
+### 下载和仿真
+
+开发板支持 SWD 调试接口，连接外置仿真器后，就可以进行下载和仿真。
+
+> 注意：下载算法默认使用 board目录下的 MIMXRT105x_QuadSPI_4KB_SEC.FLM 文件，将此文件拷贝到 Keil5安装目录下 `ARM\Flash` 目录下即可。
+>
+> 下载失败时：先按下 `Reset 按键`，再按下 `Boot Mode 按键`，先松开 `Reset 按键`，再松开 `Boot Mode 按键`，即可进入`下载模式`。
+
+### 运行结果
+
+下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，绿色 DS1 会周期性闪烁。
+
+使用 TTL 转串口工具连接开发板上 RXD/TXD ，在终端工具里打开相应的串口(115200-N-8-1)。如果编译 & 烧写无误，当复位设备后，可以看到RT-Thread的输出信息:
+
+```
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.0.3 build May  7 2021
+ 2006 - 2021 Copyright by rt-thread team
+msh >
+```
+
+## 驱动支持情况及计划
+
+| 驱动 | 支持情况  | 备注 |
+| ------ | ----  | ------ |
+| UART | 支持 | UART 1 |
+| GPIO | 支持 | GPIO1~GPIO5 |
+| IIC | 暂不支持 |  |
+| SPI | 暂不支持 |                                        |
+| LCD | 暂不支持 |  |
+| RTC | 暂不支持 |  |
+| SDIO | 暂不支持 |  |
+| SDRAM | 支持 | 32M SDRAM，后面 2M 作为 Non Cache 区域 |
+
+## 联系人信息
+
+维护人：
+
+- [guozhanxin](https://github.com/Guozhanxin)
@@ -0,0 +1,14 @@
+# for module compiling
+import os
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
@@ -0,0 +1,71 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+DefaultEnvironment(tools=[])
+if rtconfig.PLATFORM == 'armcc':
+    env = Environment(tools = ['mingw'],
+        AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+        CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+        CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+        AR = rtconfig.AR, ARFLAGS = '-rc',
+        LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
+        # overwrite cflags, because cflags has '--C99'
+        CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES')
+else:
+    env = Environment(tools = ['mingw'],
+        AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+        CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+        CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+        AR = rtconfig.AR, ARFLAGS = '-rc',
+        LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
+        CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
+
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+    env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+SDK_LIB = libraries_path_prefix
+Export('SDK_LIB')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+imxrt_library = 'MIMXRT1050'
+rtconfig.BSP_LIBRARY_TYPE = imxrt_library
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, imxrt_library, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)
@@ -0,0 +1,16 @@
+import rtconfig
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+CPPPATH = [cwd]
+
+# add for startup script 
+if rtconfig.CROSS_TOOL == 'gcc':
+    CPPDEFINES = ['__START=entry']
+else:
+    CPPDEFINES = []
+    
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
+
+Return('group')
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-10-10     Tanek        first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "drv_gpio.h"
+
+/* USER_LED_G,GPIO_IO01,GPIO_AD_B0_10 */
+#define LED0_PIN               GET_PIN(1,10)
+
+int main(void)
+{
+    /* set LED0 pin mode to output */
+    rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
+
+    while (1)
+    {
+        rt_pin_write(LED0_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED0_PIN, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+}
+
@@ -0,0 +1,122 @@
+menu "Hardware Drivers Config"
+
+config SOC_IMXRT1052CVL5B
+    bool 
+    select SOC_MIMXRT1050_SERIES
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+menu "Onboard Peripheral Drivers"
+        
+    config BSP_USING_SDRAM
+        bool "Enable SDRAM"
+        default n
+
+endmenu
+
+menu "On-chip Peripheral Drivers"
+
+    config BSP_USING_DMA
+        bool "Enable DMA"
+        default n
+        
+    config BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
+    menuconfig BSP_USING_LPUART
+        bool "Enable UART"
+        select RT_USING_SERIAL
+        default y
+        
+        if BSP_USING_LPUART
+            config BSP_USING_LPUART1
+                bool "Enable LPUART1"
+                default y
+
+                config BSP_LPUART1_RX_USING_DMA
+                    bool "Enable LPUART1 RX DMA"
+                    depends on BSP_USING_LPUART1
+                    select BSP_USING_DMA
+                    select RT_SERIAL_USING_DMA
+                    default n
+
+                    config BSP_LPUART1_RX_DMA_CHANNEL
+                        depends on BSP_LPUART1_RX_USING_DMA
+                        int "Set LPUART1 RX DMA channel (0-32)"
+                        default 0
+
+                config BSP_LPUART1_TX_USING_DMA
+                    bool "Enable LPUART1 TX DMA"
+                    depends on BSP_USING_LPUART1
+                    select BSP_USING_DMA
+                    select RT_SERIAL_USING_DMA
+                    default n
+
+                    config BSP_LPUART1_TX_DMA_CHANNEL
+                        depends on BSP_LPUART1_TX_USING_DMA
+                        int "Set LPUART1 TX DMA channel (0-32)"
+                        default 1
+
+            config BSP_USING_LPUART4
+                bool "Enable LPUART4"
+                default n
+
+                config BSP_LPUART4_RX_USING_DMA
+                    bool "Enable LPUART4 RX DMA"
+                    depends on BSP_USING_LPUART4
+                    select BSP_USING_DMA
+                    select RT_SERIAL_USING_DMA
+                    default n
+
+                    config BSP_LPUART4_RX_DMA_CHANNEL
+                        depends on BSP_LPUART4_RX_USING_DMA
+                        int "Set LPUART4 RX DMA channel (0-32)"
+                        default 2
+
+                config BSP_LPUART4_TX_USING_DMA
+                    bool "Enable LPUART4 TX DMA"
+                    depends on BSP_USING_LPUART4
+                    select BSP_USING_DMA
+                    select RT_SERIAL_USING_DMA
+                    default n
+
+                    config BSP_LPUART4_TX_DMA_CHANNEL
+                        depends on BSP_LPUART4_TX_USING_DMA
+                        int "Set LPUART4 TX DMA channel (0-32)"
+                        default 3
+        endif
+
+    menuconfig BSP_USING_SPI
+        bool "Enable SPI"
+        select RT_USING_SPI
+        select RT_USING_PIN
+        default n
+
+        if BSP_USING_SPI
+            config BSP_USING_SPI3
+                bool "Enable SPI3"
+                default n
+
+            config BSP_SPI3_USING_DMA
+                bool "Enable SPI3 DMA xfer"
+                depends on BSP_USING_SPI3
+                select BSP_USING_DMA
+                default n
+
+            config BSP_SPI3_RX_DMA_CHANNEL
+                depends on BSP_SPI3_USING_DMA
+                int "Set SPI3 RX DMA channel (0-32)"
+                default 4
+
+            config BSP_SPI3_TX_DMA_CHANNEL
+                depends on BSP_SPI3_USING_DMA
+                int "Set SPI3 TX DMA channel (0-32)"
+                default 5
+        endif
+
+endmenu
+
+endmenu
@@ -0,0 +1,464 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v5.0
+processor: MIMXRT1052xxxxB
+package_id: MIMXRT1052DVL6B
+mcu_data: ksdk2_0
+processor_version: 5.0.2
+board: IMXRT1050-EVKB
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
+- {id: ENET1_TX_CLK.outFreq, value: 2.4 MHz}
+- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
+- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 2880/11 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
+- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5/7 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: PLL7_MAIN_CLK.outFreq, value: 24 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 352/3 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI_PODF.scale, value: '1', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.LCDIF_PODF.scale, value: '8', locked: true}
+- {id: CCM.LCDIF_PRED.scale, value: '7', locked: true}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_PODF.scale, value: '3', locked: true}
+- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
+- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL5.denom, value: '1'}
+- {id: CCM_ANALOG.PLL5.div, value: '40'}
+- {id: CCM_ANALOG.PLL5.num, value: '0'}
+- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+sources:
+- {id: XTALOSC24M.OSC.outFreq, value: 24 MHz, enabled: true}
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 100,                       /* PLL loop divider, Fout = Fin * 50 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    CLOCK_DisableClock(kCLOCK_Xbar3);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
+#endif
+    /* Disable CSI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Csi);
+    /* Set CSI_PODF. */
+    CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
+    /* Set Csi clock source. */
+    CLOCK_SetMux(kCLOCK_CsiMux, 0);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 2);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 2);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable LCDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_LcdPixel);
+    /* Set LCDIF_PRED. */
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 6);
+    /* Set LCDIF_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 7);
+    /* Set Lcdif pre clock source. */
+    CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Disable Flexio2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio2);
+    /* Set FLEXIO2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
+    /* Set FLEXIO2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
+    /* Set Flexio2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Init ARM PLL. */
+    CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
+    /* Disable pfd offset. */
+    CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK;
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
+    /* Disable Usb1 PLL output for USBPHY1. */
+    CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* DeInit Video PLL. */
+    CLOCK_DeinitVideoPll();
+    /* Bypass Video PLL. */
+    CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_BYPASS_MASK;
+    /* Set divider for Video PLL. */
+    CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(0);
+    /* Enable Video PLL output. */
+    CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
+    /* DeInit Enet PLL. */
+    CLOCK_DeinitEnetPll();
+    /* Bypass Enet PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
+    /* Set Enet output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
+    /* Enable Enet output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
+    /* Enable Enet25M output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
+    /* DeInit Usb2 PLL. */
+    CLOCK_DeinitUsb2Pll();
+    /* Bypass Usb2 PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1);
+    /* Enable Usb2 PLL output. */
+    CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK;
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set lvds1 clock source. */
+    CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Tx clock source. */
+    IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false);
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
+
@@ -0,0 +1,66 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
+
+/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
+
@@ -0,0 +1,81 @@
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v5.0
+processor: MIMXRT1052xxxxB
+package_id: MIMXRT1052DVL6B
+mcu_data: ksdk2_0
+processor_version: 5.0.2
+board: IMXRT1050-EVKB
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+
+#include "fsl_common.h"
+#include "fsl_iomuxc.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ * 
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ * 
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void) {
+}
+
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins:
+- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13}
+  - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12}
+  - {pin_num: M14, peripheral: LPSPI3, signal: SCK, pin_signal: GPIO_AD_B0_00}
+  - {pin_num: M11, peripheral: LPSPI3, signal: SDI, pin_signal: GPIO_AD_B0_02}
+  - {pin_num: H10, peripheral: LPSPI3, signal: SDO, pin_signal: GPIO_AD_B0_01}
+  - {pin_num: M5, peripheral: LPUART4, signal: RX, pin_signal: GPIO_SD_B1_01}
+  - {pin_num: L5, peripheral: LPUART4, signal: TX, pin_signal: GPIO_SD_B1_00}
+  - {pin_num: F11, peripheral: GPIO1, signal: 'gpio_io, 04', pin_signal: GPIO_AD_B0_04}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitPins(void) {
+  CLOCK_EnableClock(kCLOCK_Iomuxc);           /* iomuxc clock (iomuxc_clk_enable): 0x03U */
+
+  IOMUXC_SetPinMux(
+      IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK,        /* GPIO_AD_B0_00 is configured as LPSPI3_SCK */
+      0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+  IOMUXC_SetPinMux(
+      IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO,        /* GPIO_AD_B0_01 is configured as LPSPI3_SDO */
+      0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+  IOMUXC_SetPinMux(
+      IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI,        /* GPIO_AD_B0_02 is configured as LPSPI3_SDI */
+      0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+  IOMUXC_SetPinMux(
+      IOMUXC_GPIO_AD_B0_12_LPUART1_TX,        /* GPIO_AD_B0_12 is configured as LPUART1_TX */
+      0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+  IOMUXC_SetPinMux(
+      IOMUXC_GPIO_AD_B0_13_LPUART1_RX,        /* GPIO_AD_B0_13 is configured as LPUART1_RX */
+      0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+  IOMUXC_SetPinMux(
+      IOMUXC_GPIO_SD_B1_00_LPUART4_TX,        /* GPIO_SD_B1_00 is configured as LPUART4_TX */
+      0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+  IOMUXC_SetPinMux(
+      IOMUXC_GPIO_SD_B1_01_LPUART4_RX,        /* GPIO_SD_B1_01 is configured as LPUART4_RX */
+      0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+}
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
@@ -0,0 +1,182 @@
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+
+/*! @brief Direction type  */
+typedef enum _pin_mux_direction
+{
+  kPIN_MUX_DirectionInput = 0U,         /* Input direction */
+  kPIN_MUX_DirectionOutput = 1U,        /* Output direction */
+  kPIN_MUX_DirectionInputOrOutput = 2U  /* Input or output direction */
+} pin_mux_direction_t;
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+/* GPIO_AD_B0_13 (coord L14), UART1_RXD */
+#define BOARD_INITPINS_UART1_RXD_PERIPHERAL                              LPUART1   /*!< Device name: LPUART1 */
+#define BOARD_INITPINS_UART1_RXD_SIGNAL                                       RX   /*!< LPUART1 signal: RX */
+
+/* GPIO_AD_B0_12 (coord K14), UART1_TXD */
+#define BOARD_INITPINS_UART1_TXD_PERIPHERAL                              LPUART1   /*!< Device name: LPUART1 */
+#define BOARD_INITPINS_UART1_TXD_SIGNAL                                       TX   /*!< LPUART1 signal: TX */
+
+/* GPIO_SD_B1_03 (coord M4), FlexSPI_D0_B */
+#define BOARD_INITPINS_FlexSPI_D0_B_GPIO                                   GPIO3   /*!< GPIO device name: GPIO3 */
+#define BOARD_INITPINS_FlexSPI_D0_B_PORT                                   GPIO3   /*!< PORT device name: GPIO3 */
+#define BOARD_INITPINS_FlexSPI_D0_B_PIN                                       3U   /*!< GPIO3 pin index: 3 */
+
+/* PMIC_ON_REQ (coord K7), PMIC_ON_REQ */
+#define BOARD_INITPINS_PMIC_ON_REQ_GPIO                                    GPIO5   /*!< GPIO device name: GPIO5 */
+#define BOARD_INITPINS_PMIC_ON_REQ_PORT                                    GPIO5   /*!< PORT device name: GPIO5 */
+#define BOARD_INITPINS_PMIC_ON_REQ_PIN                                        1U   /*!< GPIO5 pin index: 1 */
+
+/* GPIO_AD_B0_05 (coord G14), CAN_STBY/BOOT_MODE[1]/Flash_RST/U12[8] */
+#define BOARD_INITPINS_CAN_STBY_GPIO                                       GPIO1   /*!< GPIO device name: GPIO1 */
+#define BOARD_INITPINS_CAN_STBY_PORT                                       GPIO1   /*!< PORT device name: GPIO1 */
+#define BOARD_INITPINS_CAN_STBY_PIN                                           5U   /*!< GPIO1 pin index: 5 */
+
+/* GPIO_EMC_40 (coord A7), ENET_MDC */
+#define BOARD_INITPINS_ENET_MDC_GPIO                                       GPIO3   /*!< GPIO device name: GPIO3 */
+#define BOARD_INITPINS_ENET_MDC_PORT                                       GPIO3   /*!< PORT device name: GPIO3 */
+#define BOARD_INITPINS_ENET_MDC_PIN                                          26U   /*!< GPIO3 pin index: 26 */
+
+/* GPIO_B0_00 (coord D7), LCDIF_CLK */
+#define BOARD_INITPINS_LCDIF_CLK_PERIPHERAL                                LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_CLK_SIGNAL                                lcdif_clk   /*!< LCDIF signal: lcdif_clk */
+
+/* GPIO_B0_04 (coord C8), LCDIF_D0/BT_CFG[0] */
+#define BOARD_INITPINS_LCDIF_D0_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D0_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D0_CHANNEL                                       0U   /*!< LCDIF lcdif_data channel: 00 */
+
+/* GPIO_B0_05 (coord B8), LCDIF_D1/BT_CFG[1] */
+#define BOARD_INITPINS_LCDIF_D1_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D1_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D1_CHANNEL                                       1U   /*!< LCDIF lcdif_data channel: 01 */
+
+/* GPIO_B0_06 (coord A8), LCDIF_D2/BT_CFG[2] */
+#define BOARD_INITPINS_LCDIF_D2_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D2_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D2_CHANNEL                                       2U   /*!< LCDIF lcdif_data channel: 02 */
+
+/* GPIO_B0_08 (coord B9), LCDIF_D4/BT_CFG[4] */
+#define BOARD_INITPINS_LCDIF_D4_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D4_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D4_CHANNEL                                       4U   /*!< LCDIF lcdif_data channel: 04 */
+
+/* GPIO_B0_07 (coord A9), LCDIF_D3/BT_CFG[3] */
+#define BOARD_INITPINS_LCDIF_D3_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D3_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D3_CHANNEL                                       3U   /*!< LCDIF lcdif_data channel: 03 */
+
+/* GPIO_B0_09 (coord C9), LCDIF_D5/BT_CFG[5] */
+#define BOARD_INITPINS_LCDIF_D5_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D5_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D5_CHANNEL                                       5U   /*!< LCDIF lcdif_data channel: 05 */
+
+/* GPIO_B0_10 (coord D9), LCDIF_D6/BT_CFG[6] */
+#define BOARD_INITPINS_LCDIF_D6_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D6_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D6_CHANNEL                                       6U   /*!< LCDIF lcdif_data channel: 06 */
+
+/* GPIO_B0_11 (coord A10), LCDIF_D7/BT_CFG[7] */
+#define BOARD_INITPINS_LCDIF_D7_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D7_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D7_CHANNEL                                       7U   /*!< LCDIF lcdif_data channel: 07 */
+
+/* GPIO_B0_12 (coord C10), LCDIF_D8/BT_CFG[8] */
+#define BOARD_INITPINS_LCDIF_D8_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D8_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D8_CHANNEL                                       8U   /*!< LCDIF lcdif_data channel: 08 */
+
+/* GPIO_B0_13 (coord D10), LCDIF_D9/BT_CFG[9] */
+#define BOARD_INITPINS_LCDIF_D9_PERIPHERAL                                 LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D9_SIGNAL                                lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D9_CHANNEL                                       9U   /*!< LCDIF lcdif_data channel: 09 */
+
+/* GPIO_B0_14 (coord E10), LCDIF_D10/BT_CFG[10] */
+#define BOARD_INITPINS_LCDIF_D10_PERIPHERAL                                LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D10_SIGNAL                               lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D10_CHANNEL                                     10U   /*!< LCDIF lcdif_data channel: 10 */
+
+/* GPIO_B0_15 (coord E11), LCDIF_D11/BT_CFG[11] */
+#define BOARD_INITPINS_LCDIF_D11_PERIPHERAL                                LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D11_SIGNAL                               lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D11_CHANNEL                                     11U   /*!< LCDIF lcdif_data channel: 11 */
+
+/* GPIO_B1_00 (coord A11), LCDIF_D12 */
+#define BOARD_INITPINS_LCDIF_D12_PERIPHERAL                                LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D12_SIGNAL                               lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D12_CHANNEL                                     12U   /*!< LCDIF lcdif_data channel: 12 */
+
+/* GPIO_B1_01 (coord B11), LCDIF_D13 */
+#define BOARD_INITPINS_LCDIF_D13_PERIPHERAL                                LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D13_SIGNAL                               lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D13_CHANNEL                                     13U   /*!< LCDIF lcdif_data channel: 13 */
+
+/* GPIO_B1_02 (coord C11), LCDIF_D14 */
+#define BOARD_INITPINS_LCDIF_D14_PERIPHERAL                                LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D14_SIGNAL                               lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D14_CHANNEL                                     14U   /*!< LCDIF lcdif_data channel: 14 */
+
+/* GPIO_B1_03 (coord D11), LCDIF_D15 */
+#define BOARD_INITPINS_LCDIF_D15_PERIPHERAL                                LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_D15_SIGNAL                               lcdif_data   /*!< LCDIF signal: lcdif_data */
+#define BOARD_INITPINS_LCDIF_D15_CHANNEL                                     15U   /*!< LCDIF lcdif_data channel: 15 */
+
+/* GPIO_B0_01 (coord E7), LCDIF_ENABLE */
+#define BOARD_INITPINS_LCDIF_ENABLE_PERIPHERAL                             LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_ENABLE_SIGNAL                          lcdif_enable   /*!< LCDIF signal: lcdif_enable */
+
+/* GPIO_B0_02 (coord E8), LCDIF_HSYNC */
+#define BOARD_INITPINS_LCDIF_HSYNC_PERIPHERAL                              LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_HSYNC_SIGNAL                            lcdif_hsync   /*!< LCDIF signal: lcdif_hsync */
+
+/* GPIO_B0_03 (coord D8), LCDIF_VSYNC */
+#define BOARD_INITPINS_LCDIF_VSYNC_PERIPHERAL                              LCDIF   /*!< Device name: LCDIF */
+#define BOARD_INITPINS_LCDIF_VSYNC_SIGNAL                            lcdif_vsync   /*!< LCDIF signal: lcdif_vsync */
+
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
@@ -0,0 +1,20 @@
+from building import *
+
+cwd = GetCurrentDir()
+
+# add the general drivers.
+src = Split("""
+board.c
+MCUX_Config/clock_config.c
+MCUX_Config/pin_mux.c
+""")
+
+CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']
+CPPDEFINES = ['CPU_MIMXRT1052CVL5B', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1','XIP_EXTERNAL_FLASH=1']
+
+if GetDepend(['BSP_USING_SPI_FLASH']):
+    src += Glob('ports/spi_flash_init.c')
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
+
+Return('group')
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      first implementation
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "board.h"
+#include "pin_mux.h"
+
+#ifdef BSP_USING_DMA
+#include "fsl_dmamux.h"
+#include "fsl_edma.h"
+#endif
+
+#define NVIC_PRIORITYGROUP_0         0x00000007U /*!< 0 bits for pre-emption priority
+                                                      4 bits for subpriority */
+#define NVIC_PRIORITYGROUP_1         0x00000006U /*!< 1 bits for pre-emption priority
+                                                      3 bits for subpriority */
+#define NVIC_PRIORITYGROUP_2         0x00000005U /*!< 2 bits for pre-emption priority
+                                                      2 bits for subpriority */
+#define NVIC_PRIORITYGROUP_3         0x00000004U /*!< 3 bits for pre-emption priority
+                                                      1 bits for subpriority */
+#define NVIC_PRIORITYGROUP_4         0x00000003U /*!< 4 bits for pre-emption priority
+                                                      0 bits for subpriority */
+
+/* MPU configuration. */
+static void BOARD_ConfigMPU(void)
+{
+    /* Disable I cache and D cache */
+    SCB_DisableICache();
+    SCB_DisableDCache();
+
+    /* Disable MPU */
+    ARM_MPU_Disable();
+
+    /* Region 0 setting */
+    MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
+
+    /* Region 1 setting */
+    MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
+
+    /* Region 2 setting */
+    // spi flash: normal type, cacheable, no bufferable, no shareable
+    MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 0, 0, ARM_MPU_REGION_SIZE_512MB);
+
+    /* Region 3 setting */
+    MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
+
+    /* Region 4 setting */
+    MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
+
+    /* Region 5 setting */
+    MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
+
+    /* Region 6 setting */
+    MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);
+
+#if defined(BSP_USING_SDRAM)
+    /* Region 7 setting */
+    MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
+
+    /* Region 8 setting */
+    MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U);
+    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 1, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);
+#endif
+
+    /* Enable MPU */
+    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
+
+    /* Enable I cache and D cache */
+    SCB_EnableDCache();
+    SCB_EnableICache();
+}
+
+
+/* This is the timer interrupt service routine. */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+#ifdef BSP_USING_DMA
+void imxrt_dma_init(void)
+{
+    edma_config_t config;
+
+    DMAMUX_Init(DMAMUX);
+    EDMA_GetDefaultConfig(&config);
+    EDMA_Init(DMA0, &config);
+}
+#endif
+
+void rt_hw_board_init()
+{
+    BOARD_ConfigMPU();
+    BOARD_InitPins();
+    BOARD_BootClockRUN();
+
+    NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+    SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
+
+#ifdef BSP_USING_DMA
+    imxrt_dma_init();
+#endif
+
+#ifdef RT_USING_HEAP
+    rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
+#endif
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+}
+
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-09-22     Bernard      add board.h to this bsp
+ */
+
+// <<< Use Configuration Wizard in Context Menu >>>
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include "fsl_common.h"
+#include "clock_config.h"
+
+#ifdef __CC_ARM
+extern int Image$$RTT_HEAP$$ZI$$Base;
+extern int Image$$RTT_HEAP$$ZI$$Limit;
+#define HEAP_BEGIN          (&Image$$RTT_HEAP$$ZI$$Base)
+#define HEAP_END            (&Image$$RTT_HEAP$$ZI$$Limit)
+
+#elif __ICCARM__
+#pragma section="HEAP"
+#define HEAP_BEGIN          (__segment_end("HEAP"))
+extern void __RTT_HEAP_END;
+#define HEAP_END            (&__RTT_HEAP_END)
+
+#else
+extern int heap_start;
+extern int heap_end;
+#define HEAP_BEGIN          (&heap_start)
+#define HEAP_END            (&heap_end)
+#endif
+
+#define HEAP_SIZE           ((uint32_t)HEAP_END - (uint32_t)HEAP_BEGIN)
+
+void rt_hw_board_init(void);
+
+#endif
+
@@ -0,0 +1,95 @@
+/*
+** ###################################################################
+**     Processors:          MIMXRT1052CVJ5B
+**                          MIMXRT1052CVL5B
+**                          MIMXRT1052DVJ6B
+**                          MIMXRT1052DVL6B
+**
+**     Compiler:            IAR ANSI C/C++ Compiler for ARM
+**     Reference manual:    IMXRT1050RM Rev.1, 03/2018
+**     Version:             rev. 1.0, 2018-09-21
+**     Build:               b180921
+**
+**     Abstract:
+**         Linker file for the IAR ANSI C/C++ Compiler for ARM
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2018 NXP
+**     All rights reserved.
+**
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+define symbol m_interrupts_start       = 0x60002000;
+define symbol m_interrupts_end         = 0x600023FF;
+
+define symbol m_text_start             = 0x60002400;
+define symbol m_text_end               = 0x607FFFFF;
+
+define symbol m_data_start             = 0x20000000;
+define symbol m_data_end               = 0x2001FFFF;
+
+define symbol m_data2_start            = 0x20200000;
+define symbol m_data2_end              = 0x2023FFFF;
+
+define exported symbol m_boot_hdr_conf_start = 0x60000000;
+define symbol m_boot_hdr_ivt_start           = 0x60001000;
+define symbol m_boot_hdr_boot_data_start     = 0x60001020;
+define symbol m_boot_hdr_dcd_data_start      = 0x60001030;
+
+/* Sizes */
+if (isdefinedsymbol(__stack_size__)) {
+  define symbol __size_cstack__        = __stack_size__;
+} else {
+  define symbol __size_cstack__        = 0x0400;
+}
+
+if (isdefinedsymbol(__heap_size__)) {
+  define symbol __size_heap__          = __heap_size__;
+} else {
+  define symbol __size_heap__          = 0x0400;
+}
+
+define exported symbol __VECTOR_TABLE  = m_interrupts_start;
+define exported symbol __VECTOR_RAM    = m_interrupts_start;
+define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;
+define exported symbol __RTT_HEAP_END = m_data_end;
+
+define memory mem with size = 4G;
+define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
+                          | mem:[from m_text_start to m_text_end];
+
+define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
+define region DATA2_region = mem:[from m_data2_start to m_data2_end];
+define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
+
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block RW        { readwrite };
+define block ZI        { zi };
+define block NCACHE_VAR    { section NonCacheable , section NonCacheable.init };
+
+initialize by copy { readwrite, section .textrw };
+do not initialize  { section .noinit };
+
+place at address mem: m_interrupts_start    { readonly section .intvec };
+
+place at address mem:m_boot_hdr_conf_start { section .boot_hdr.conf };
+place at address mem:m_boot_hdr_ivt_start { section .boot_hdr.ivt };
+place at address mem:m_boot_hdr_boot_data_start { readonly section .boot_hdr.boot_data };
+place at address mem:m_boot_hdr_dcd_data_start { readonly section .boot_hdr.dcd_data };
+
+keep{ section .boot_hdr.conf, section .boot_hdr.ivt, section .boot_hdr.boot_data, section .boot_hdr.dcd_data };
+
+place in TEXT_region                        { readonly };
+place in DATA_region                        { block RW };
+place in DATA_region                        { block ZI };
+place in DATA_region                        { last block HEAP };
+place in DATA_region                        { block NCACHE_VAR };
+place in CSTACK_region                      { block CSTACK };
+
@@ -0,0 +1,276 @@
+/*
+** ###################################################################
+**     Processors:          MIMXRT1052CVL5A
+**                          MIMXRT1052DVL6A
+**
+**     Compiler:            GNU C Compiler
+**     Reference manual:    IMXRT1050RM Rev.C, 08/2017
+**     Version:             rev. 0.1, 2017-01-10
+**     Build:               b170927
+**
+**     Abstract:
+**         Linker file for the GNU C Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2017 NXP
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     1. Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     2. Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     3. Neither the name of the copyright holder nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
+
+/* Specify the memory areas */
+MEMORY
+{
+  m_boot_data           (RX)  : ORIGIN = 0x60000000, LENGTH = 0x00001000
+  m_image_vertor_table  (RX)  : ORIGIN = 0x60001000, LENGTH = 0x00001000
+
+  m_interrupts          (RX)  : ORIGIN = 0x60002000, LENGTH = 0x00000400
+  m_text                (RX)  : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00
+
+  m_itcm                (RW)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
+  m_dtcm                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00020000
+  m_ocram               (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00040000
+
+  m_sdram               (RW)  : ORIGIN = 0x80000000, LENGTH = 0x01E00000
+  m_nocache             (RW)  : ORIGIN = 0x81E00000, LENGTH = 0x00200000
+}
+
+/* Define output sections */
+SECTIONS
+{
+  .boot_data :
+  {
+    KEEP(*(.boot_hdr.conf))
+  } > m_boot_data
+
+  .image_vertor_table :
+  {
+    KEEP(*(.boot_hdr.ivt))
+    KEEP(*(.boot_hdr.boot_data))
+    KEEP(*(.boot_hdr.dcd_data))
+  } > m_image_vertor_table
+
+  /* The startup code goes first into internal RAM */
+  .interrupts :
+  {
+    __VECTOR_TABLE = .;
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))     /* Startup code */
+    . = ALIGN(4);
+  } > m_interrupts
+
+  __VECTOR_RAM = __VECTOR_TABLE;
+  __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0;
+
+  /* The program code and other data goes into internal RAM */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)                 /* .text sections (code) */
+    *(.text*)                /* .text* sections (code) */
+    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)               /* glue arm to thumb code */
+    *(.glue_7t)              /* glue thumb to arm code */
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+
+    /* section information for finsh shell */
+    . = ALIGN(4);
+    __fsymtab_start = .;
+    KEEP(*(FSymTab))
+    __fsymtab_end = .;
+    . = ALIGN(4);
+    __vsymtab_start = .;
+    KEEP(*(VSymTab))
+    __vsymtab_end = .;
+    . = ALIGN(4);
+
+    /* section information for initial. */
+    . = ALIGN(4);
+    __rt_init_start = .;
+    KEEP(*(SORT(.rti_fn*)))
+    __rt_init_end = .;
+  } > m_text
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } > m_text
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } > m_text
+
+ .ctors :
+  {
+    PROVIDE(__ctors_start__ = .);
+    /* __CTOR_LIST__ = .; */
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    /* __CTOR_END__ = .; */
+    PROVIDE(__ctors_end__ = .);
+  } > m_text
+
+  .dtors :
+  {
+    PROVIDE(__dtors_start__ = .);
+    /* __DTOR_LIST__ = .; */
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /* __DTOR_END__ = .; */
+    PROVIDE(__dtors_end__ = .);
+  } > m_text
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } > m_text
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } > m_text
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } > m_text
+
+  __etext = .;    /* define a global symbol at end of code */
+  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
+
+  .data : AT(__DATA_ROM)
+  {
+    . = ALIGN(4);
+    __DATA_RAM = .;
+    __data_start__ = .;      /* create a global symbol at data start */
+    *(m_usb_dma_init_data)
+    *(.data)                 /* .data sections */
+    *(.data*)                /* .data* sections */
+    KEEP(*(.jcr*))
+    . = ALIGN(4);
+    __data_end__ = .;        /* define a global symbol at data end */
+  } > m_dtcm
+
+  __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
+  .ncache.init : AT(__NDATA_ROM)
+  {
+    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
+    *(NonCacheable.init)
+    . = ALIGN(4);
+    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
+  } > m_nocache
+  . = __noncachedata_init_end__;
+  .ncache :
+  {
+    *(NonCacheable)
+    . = ALIGN(4);
+    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
+  } > m_nocache
+
+  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
+  text_end = ORIGIN(m_text) + LENGTH(m_text);
+  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
+
+  /* Uninitialized data section */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    . = ALIGN(4);
+    __START_BSS = .;
+    __bss_start__ = .;
+    *(m_usb_dma_noninit_data)
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+    __END_BSS = .;
+  } > m_dtcm
+
+  .stack :
+  {
+    . = ALIGN(8);
+    stack_start = .;
+    . += STACK_SIZE;
+    stack_end = .;
+    __StackTop = .;
+  } > m_dtcm
+  
+  .RTT_HEAP :
+  {
+    heap_start = .;
+    . = ALIGN(8);
+  } > m_dtcm
+
+  PROVIDE(heap_end = ORIGIN(m_dtcm) + LENGTH(m_dtcm));
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+
+}
+
@@ -0,0 +1,112 @@
+#! armcc -E
+/*
+** ###################################################################
+**     Processors:          MIMXRT1052CVL5A
+**                          MIMXRT1052DVL6A
+**
+**     Compiler:            Keil ARM C/C++ Compiler
+**     Reference manual:    IMXRT1050RM Rev.C, 08/2017
+**     Version:             rev. 0.1, 2017-01-10
+**     Build:               b170927
+**
+**     Abstract:
+**         Linker file for the Keil ARM C/C++ Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2017 NXP
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     1. Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     2. Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     3. Neither the name of the copyright holder nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+#define m_flash_config_start           0x60000000
+#define m_flash_config_size            0x00001000
+
+#define m_ivt_start                    0x60001000
+#define m_ivt_size                     0x00001000
+
+#define m_text_start                   0x60002000
+#define m_text_size                    0x1F7FE000
+
+#define m_data_start                   0x20000000
+#define m_data_size                    0x00020000
+
+#define m_ncache_start                 0x81E00000
+#define m_ncache_size                  0x00200000
+
+/* Sizes */
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #define Stack_Size                   0x1000
+#endif
+
+#if (defined(__heap_size__))
+  #define Heap_Size                    __heap_size__
+#else
+  #define Heap_Size                    0x0400
+#endif
+
+#define RTT_HEAP_SIZE (m_data_size-ImageLength(RW_m_data)-ImageLength(ARM_LIB_HEAP)-ImageLength(ARM_LIB_STACK))
+
+; load region size_region
+LR_IROM1 m_text_start m_text_size 
+{   
+    ER_IROM1 m_text_start m_text_size ; load address = execution address
+    { 
+        * (RESET,+FIRST)
+        * (InRoot$$Sections)
+        .ANY (+RO)
+    }
+  
+    RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size ; RW data
+    { 
+        .ANY (+RW +ZI)
+    }
+    
+    ARM_LIB_HEAP +0 EMPTY Heap_Size{}   ; Heap region growing up
+    ARM_LIB_STACK +0 EMPTY Stack_Size{} ; Stack region growing down
+    RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
+
+    ; ncache RW data
+    RW_m_ncache m_ncache_start m_ncache_size 
+    { 
+        * (NonCacheable.init)
+        * (NonCacheable)
+    }
+    ITCM 0x400 0xFBFF {
+        ;drv_flexspi_hyper.o(+RO)
+        ;fsl_flexspi.o(+RO)
+        * (*CLOCK_DisableClock)
+        * (*CLOCK_ControlGate)
+        * (*CLOCK_EnableClock)
+        * (*CLOCK_SetDiv)
+        * (itcm)
+    }
+}
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-05     zylx         The first version for STM32F4xx
+ * 2019-4-25      misonyo      port to IMXRT
+ */
+
+#ifndef SDRAM_PORT_H__
+#define SDRAM_PORT_H__
+
+/* parameters for sdram peripheral */
+
+#define SDRAM_BANK_ADDR                 ((uint32_t)0x80000000U)
+/* region#0/1/2/3: kSEMC_SDRAM_CS0/1/2/3 */
+#define SDRAM_REGION                    kSEMC_SDRAM_CS0
+/* CS pin: kSEMC_MUXCSX0/1/2/3 */
+#define SDRAM_CS_PIN                    kSEMC_MUXCSX0
+/* size(kbyte):32MB = 32*1024*1KBytes */
+#define SDRAM_SIZE                      ((uint32_t)0x8000)
+/* data width: kSEMC_PortSize8Bit,kSEMC_PortSize16Bit */
+#define SDRAM_DATA_WIDTH                kSEMC_PortSize16Bit
+/* column bit numbers: kSEMC_SdramColunm_9/10/11/12bit */
+#define SDRAM_COLUMN_BITS               kSEMC_SdramColunm_9bit
+/* cas latency clock number: kSEMC_LatencyOne/Two/Three */
+#define SDRAM_CAS_LATENCY               kSEMC_LatencyThree
+
+/* Timing configuration for W9825G6KH */
+/* TRP:precharge to active command time (ns) */
+#define SDRAM_TRP                       18
+/* TRCD:active to read/write command delay time (ns) */
+#define SDRAM_TRCD                      18
+/* The time between two refresh commands,Use the maximum of the (Trfc , Txsr).(ns) */
+#define SDRAM_REFRESH_RECOVERY          67
+/* TWR:write recovery time (ns). */
+#define SDRAM_TWR                       12
+/* TRAS:active to precharge command time (ns). */
+#define SDRAM_TRAS       42
+/* TRC time (ns). */
+#define SDRAM_TRC                       60
+/* active to active time (ns). */
+#define SDRAM_ACT2ACT                   60
+/* refresh time (ns). 64ms */
+#define SDRAM_REFRESH_ROW               64 * 1000000 / 8192
+
+#endif /* SDRAM_PORT_H__ */
@@ -0,0 +1,189 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rtthread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\keil\List\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>8</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>3</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>.\flexspi_nor.ini</tIfile>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"Any" -UAny -O206 -S8 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC8000 -FN1 -FF0MIMXRT105x_QuadSPI_4KB_SEC.FLM -FS060000000 -FL0800000 -FP0($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_QuadSPI_4KB_SEC.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC8000 -FN1 -FF0MIMXRT105x_QuadSPI_4KB_SEC -FS060000000 -FL0800000 -FP0($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_QuadSPI_4KB_SEC.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN2 -FC8000 -FD20000000 -FF0MIMXRT105x_HYPER_256KB_SEC -FF1MIMXRT105x_QuadSPI_4KB_SEC -FL04000000 -FL1800000 -FS060000000 -FS160000000 -FP0($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_HYPER_256KB_SEC.FLM) -FP1($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_QuadSPI_4KB_SEC.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>1</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>
@@ -0,0 +1,177 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 1000
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+
+/* kservice optimization */
+
+#define RT_DEBUG
+#define RT_DEBUG_COLOR
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_MEMHEAP
+#define RT_USING_MEMHEAP_AS_HEAP
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart1"
+#define RT_VER_NUM 0x40003
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_USING_MSH_ONLY
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_LIBC_USING_TIME
+#define RT_LIBC_FIXED_TIMEZONE 8
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* Network interface device */
+
+
+/* light weight TCP/IP stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* Micrium: Micrium software products porting for RT-Thread */
+
+
+/* peripheral libraries and drivers */
+
+
+/* AI packages */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+
+/* entertainment: terminal games and other interesting software packages */
+
+
+/* Hardware Drivers Config */
+
+#define SOC_IMXRT1052CVL5B
+
+/* Onboard Peripheral Drivers */
+
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_DMA
+#define BSP_USING_GPIO
+#define BSP_USING_LPUART
+#define BSP_USING_LPUART1
+
+#endif
@@ -0,0 +1,162 @@
+import os
+import sys
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m7'
+CROSS_TOOL='gcc'
+
+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'C:\Users\XXYYZZ'
+elif CROSS_TOOL == 'keil':
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = r'C:/Keil_v5'
+elif CROSS_TOOL == 'iar':
+    PLATFORM    = 'iar'
+    EXEC_PATH   = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+#BUILD = 'release'
+
+if PLATFORM == 'gcc':
+    PREFIX = 'arm-none-eabi-'
+    CC = PREFIX + 'gcc'
+    CXX = PREFIX + 'g++'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+    STRIP = PREFIX + 'strip'
+
+    DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE + ' -Wall -D__FPU_PRESENT -eentry'
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
+    LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -gdwarf-2'
+        AFLAGS += ' -gdwarf-2'
+        CFLAGS += ' -O0'
+    else:
+        CFLAGS += ' -O2 -Os'
+
+    POST_ACTION = OBJCPY + ' -O binary --remove-section=.boot_data --remove-section=.image_vertor_table --remove-section=.ncache $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+    # module setting 
+    CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti '
+    M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
+    M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
+    M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
+                                    ' -shared -fPIC -nostartfiles -static-libgcc'
+    M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    CC = 'armcc'
+    CXX = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu ' + CPU + '.fp.sp'
+    CFLAGS = DEVICE + ' --apcs=interwork'
+    AFLAGS = DEVICE
+    LFLAGS = DEVICE + ' --libpath "' + EXEC_PATH + '\ARM\ARMCC\lib" --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter "board\linker_scripts\link.sct"'
+
+    CFLAGS += ' --diag_suppress=66,1296,186,6134'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
+    LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
+
+    EXEC_PATH += '/arm/bin40/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS
+    CFLAGS += ' --c99'
+
+    POST_ACTION = 'fromelf -z $TARGET'
+    # POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iar':
+    CC = 'iccarm'
+    CXX = 'iccarm'
+    AS = 'iasmarm'
+    AR = 'iarchive'
+    LINK = 'ilinkarm'
+    TARGET_EXT = 'out'
+
+    DEVICE = ' -D__FPU_PRESENT'
+
+    CFLAGS = DEVICE
+    CFLAGS += ' --diag_suppress Pa050'
+    CFLAGS += ' --no_cse'
+    CFLAGS += ' --no_unroll'
+    CFLAGS += ' --no_inline'
+    CFLAGS += ' --no_code_motion'
+    CFLAGS += ' --no_tbaa'
+    CFLAGS += ' --no_clustering'
+    CFLAGS += ' --no_scheduling'
+    CFLAGS += ' --debug'
+    CFLAGS += ' --endian=little'
+    CFLAGS += ' --cpu=' + CPU
+    CFLAGS += ' -e'
+    CFLAGS += ' --fpu=None'
+    CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+    CFLAGS += ' -Ol'
+    CFLAGS += ' --use_c++_inline'
+
+    AFLAGS = ''
+    AFLAGS += ' -s+'
+    AFLAGS += ' -w+'
+    AFLAGS += ' -r'
+    AFLAGS += ' --cpu ' + CPU
+    AFLAGS += ' --fpu None'
+
+    if BUILD == 'debug':
+        CFLAGS += ' --debug'
+        CFLAGS += ' -On'
+    else:
+        CFLAGS += ' -Oh'
+
+    LFLAGS = ' --config "board/linker_scripts/link.icf"'
+    LFLAGS += ' --redirect _Printf=_PrintfTiny'
+    LFLAGS += ' --redirect _Scanf=_ScanfSmall'
+    LFLAGS += ' --entry __iar_program_start'
+
+    CXXFLAGS = CFLAGS
+
+    EXEC_PATH = EXEC_PATH + '/arm/bin/'
+    POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
+
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
+    
@@ -0,0 +1,189 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rtthread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\keil\List\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>8</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>3</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>.\flexspi_nor.ini</tIfile>
+        <pMon>BIN\CMSIS_AGDI.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"Any" -UAny -O206 -S8 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC8000 -FN1 -FF0MIMXRT105x_QuadSPI_4KB_SEC.FLM -FS060000000 -FL0800000 -FP0($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_QuadSPI_4KB_SEC.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BD11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC8000 -FN1 -FF0MIMXRT105x_QuadSPI_4KB_SEC -FS060000000 -FL0800000 -FP0($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_QuadSPI_4KB_SEC.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN2 -FC8000 -FD20000000 -FF0MIMXRT105x_HYPER_256KB_SEC -FF1MIMXRT105x_QuadSPI_4KB_SEC -FL04000000 -FL1800000 -FS060000000 -FS160000000 -FP0($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_HYPER_256KB_SEC.FLM) -FP1($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_QuadSPI_4KB_SEC.FLM)</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>1</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>2</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>
@@ -0,0 +1,391 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>rtthread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>MIMXRT1052CVL5B</Device>
+          <Vendor>NXP</Vendor>
+          <PackID>NXP.MIMXRT1052_DFP.13.0.0</PackID>
+          <PackURL>https://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL>
+          <Cpu>IRAM(0x20000000,0x020000) IRAM2(0x00000000,0x020000) XRAM(0x20200000,0x040000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN2 -FF0MIMXRT105x_HYPER_256KB_SEC -FS060000000 -FL04000000 -FF1MIMXRT105x_QuadSPI_4KB_SEC -FS160000000 -FL1800000 -FP0($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_HYPER_256KB_SEC.FLM) -FP1($$Device:MIMXRT1052CVL5B$arm\MIMXRT105x_QuadSPI_4KB_SEC.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:MIMXRT1052CVL5B$fsl_device_registers.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:MIMXRT1052CVL5B$MIMXRT1052.xml</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\keil\Obj\</OutputDirectory>
+          <OutputName>rtthread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\build\keil\List\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM7</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments></TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M7"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>0</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>1</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <hadIRAM2>1</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>0</StupSel>
+            <useUlib>0</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>0</RoSelD>
+            <RwSelD>4</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>0</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>0</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x8000</Size>
+              </IROM>
+              <XRAM>
+                <Type>1</Type>
+                <StartAddress>0x20200000</StartAddress>
+                <Size>0x40000</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x20200000</StartAddress>
+                <Size>0x40000</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <ClangAsOpt>4</ClangAsOpt>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x10000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings>6314</DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>
@@ -73,8 +73,8 @@ if GetDepend(['BSP_USING_DMA']):
    src += ['MIMXRT1052/drivers/fsl_dmamux.c']
    src += ['MIMXRT1052/drivers/fsl_edma.c']
    src += ['MIMXRT1052/drivers/fsl_lpuart_edma.c']
-    src += ['MIMXRT1052/drivers/fsl_lpspi_edma.c']
-    
+    if GetDepend(['BSP_USING_SPI']):
+        src += ['MIMXRT1052/drivers/fsl_lpspi_edma.c']

 if rtconfig.CROSS_TOOL == 'gcc':
    group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, ASFLAGS = '$ASFLAGS -D __STARTUP_CLEAR_BSS')
@@ -1716,7 +1716,8 @@ typedef struct

    __IO uint32_t LINCR;

-    union {
+    union
+    {
        __IO uint32_t CTSCR;

        __IO uint32_t RTSCR;
@@ -2690,7 +2691,7 @@ typedef struct

    __I uint32_t SR; //Status Register

-    __I uint32_t IF; //Interrupt Flag
+    __I uint32_t IF; //Interrupt Flag，读取清零

    __IO uint32_t IE; //Interrupt Enable

@@ -2712,7 +2713,8 @@ typedef struct

    __IO uint32_t TXERR; //TX错误计数

-    union {
+    union
+    {
        struct
        {                         //在复位时可读写，正常工作模式下不可访问
            __IO uint32_t ACR[4]; //Acceptance Check Register, 验收寄存器
@@ -2722,7 +2724,8 @@ typedef struct
            uint32_t RESERVED[5];
        } FILTER;

-        union { //在正常工作模式下可读写，复位时不可访问
+        union
+        { //在正常工作模式下可读写，复位时不可访问
            struct
            {
                __O uint32_t INFO;
@@ -2869,8 +2872,6 @@ typedef struct
    __IO uint32_t PRECMDV; //在MPU接口中，发送数据前，RS拉低的那一拍，数据总线上的值
 } LCD_TypeDef;

-#define LCD_START_MPUEN_Pos 0 //0 RGB接口    1 MPU接口
-#define LCD_START_MPUEN_Msk (0x01 << LCD_START_MPUEN_Pos)
 #define LCD_START_GO_Pos 1 //写1开始传输数据，数据传输结束后自动清零
 #define LCD_START_GO_Msk (0x01 << LCD_START_GO_Pos)
 #define LCD_START_BURST_Pos 2
@@ -3120,7 +3121,7 @@ typedef struct
 {
    __IO uint32_t DATA;
    __IO uint32_t ADDR;
-    __IO uint32_t _ERASE; //和mmcsd_cmd.h(59)名字冲突，这里修改为_ERASE
+    __IO uint32_t ERASE;
    __IO uint32_t CACHE;
    __IO uint32_t CFG0;
    __IO uint32_t CFG1;
@@ -1,10 +1,10 @@
 ;******************************************************************************************************************************************
-; 文件名称:	startup_SWM320.s
-; 功能说明:	SWM2400单片机的启动文件
-; 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
-; 注意事项:
-; 版本日期: V1.1.0		2017年10月25日
-; 升级记录:
+; 文件名称:	startup_SWM320.s
+; 功能说明:	SWM2400单片机的启动文件
+; 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
+; 注意事项:
+; 版本日期: V1.1.0		2017年10月25日
+; 升级记录:
 ;
 ;
 ;******************************************************************************************************************************************
@@ -79,7 +79,7 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                DCD     GPIOA5_Handler
                DCD     GPIOA6_Handler
                DCD     GPIOA7_Handler
-				DCD     GPIOB0_Handler
+                DCD     GPIOB0_Handler
                DCD     GPIOB1_Handler
                DCD     GPIOB2_Handler
                DCD     GPIOB3_Handler
@@ -103,19 +103,19 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                DCD     GPIOM5_Handler
                DCD     GPIOM6_Handler
                DCD     GPIOM7_Handler
-				DCD     DMA_Handler
+                DCD     DMA_Handler
                DCD     LCD_Handler
                DCD     NORFLC_Handler
-				DCD		CAN_Handler
+                DCD     CAN_Handler
                DCD     PULSE_Handler
                DCD     WDT_Handler
                DCD     PWM_Handler
                DCD     UART0_Handler
-				DCD     UART1_Handler
-				DCD     UART2_Handler
-				DCD     UART3_Handler
-				DCD     0
-				DCD     I2C0_Handler
+                DCD     UART1_Handler
+                DCD     UART2_Handler
+                DCD     UART3_Handler
+                DCD     0
+                DCD     I2C0_Handler
                DCD     I2C1_Handler
                DCD     SPI0_Handler
                DCD     ADC0_Handler
@@ -130,13 +130,13 @@ __Vectors       DCD     __initial_sp               ; Top of Stack
                DCD     GPIOP_Handler
                DCD     ADC1_Handler
                DCD     FPU_Handler
-				DCD     SPI1_Handler
-				DCD     TIMR0_Handler
-				DCD     TIMR1_Handler
-				DCD     TIMR2_Handler
-				DCD     TIMR3_Handler
-				DCD     TIMR4_Handler
-				DCD     TIMR5_Handler
+                DCD     SPI1_Handler
+                DCD     TIMR0_Handler
+                DCD     TIMR1_Handler
+                DCD     TIMR2_Handler
+                DCD     TIMR3_Handler
+                DCD     TIMR4_Handler
+                DCD     TIMR5_Handler
                         
 __Vectors_End

@@ -113,7 +113,7 @@ __isr_vector:
    .long     TIMR4_Handler
    .long     TIMR5_Handler

-	.section .text.Reset_Handler
+    .section .text.Reset_Handler
    .align 2
    .globl    Reset_Handler
    .type     Reset_Handler, %function
@@ -84,7 +84,7 @@ __vector_table
        DCD     DMA_Handler
        DCD     LCD_Handler
        DCD     NORFLC_Handler
-        DCD	CAN_Handler
+        DCD     CAN_Handler
        DCD     PULSE_Handler
        DCD     WDT_Handler
        DCD     PWM_Handler
@@ -1,18 +1,18 @@
-/******************************************************************************************************************************************
+/****************************************************************************************************************************************** 
 * 文件名称:	system_SWM320.c
 * 功能说明:	SWM320单片机的时钟设置
 * 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
 * 注意事项:
 * 版本日期: V1.1.0		2017年10月25日
-* 升级记录:
+* 升级记录: 
 *
 *
 *******************************************************************************************************************************************
 * @attention
 *
-* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION
-* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE
-* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION 
+* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE 
+* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT 
 * OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN-
 * -ECTION WITH THEIR PRODUCTS.
 *
@@ -43,7 +43,7 @@

 /********************************** PLL 设定 **********************************************
 * VCO输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV
- * PLL输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV / OUTDIV = VCO输出频率 / OUTDIV
+ * PLL输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV / OUTDIV = VCO输出频率 / OUTDIV         
 *****************************************************************************************/
 #define SYS_PLL_SRC SYS_CLK_20MHz //可取值SYS_CLK_20MHz、SYS_CLK_XTAL

@@ -60,12 +60,12 @@
 uint32_t SystemCoreClock = __HSI;         //System Clock Frequency (Core Clock)
 uint32_t CyclesPerUs = (__HSI / 1000000); //Cycles per micro second

-/******************************************************************************************************************************************
-* 函数名称:
+/****************************************************************************************************************************************** 
+* 函数名称: 
 * 功能说明: This function is used to update the variable SystemCoreClock and must be called whenever the core clock is changed
-* 输    入:
-* 输    出:
-* 注意事项:
+* 输    入: 
+* 输    出: 
+* 注意事项: 
 ******************************************************************************************************************************************/
 void SystemCoreClockUpdate(void)
 {
@@ -114,17 +114,19 @@ void SystemCoreClockUpdate(void)
    CyclesPerUs = SystemCoreClock / 1000000;
 }

-/******************************************************************************************************************************************
-* 函数名称:
+/****************************************************************************************************************************************** 
+* 函数名称: 
 * 功能说明: The necessary initializaiton of systerm
-* 输    入:
-* 输    出:
-* 注意事项:
+* 输    入: 
+* 输    出: 
+* 注意事项: 
 ******************************************************************************************************************************************/
 void SystemInit(void)
 {
    SYS->CLKEN |= (1 << SYS_CLKEN_ANAC_Pos);

+    Flash_Param_at_xMHz(120);
+
    switch (SYS_CLK)
    {
    case SYS_CLK_20MHz: //0 内部高频20MHz RC振荡器
@@ -152,6 +154,23 @@ void SystemInit(void)
    SYS->CLKDIV |= (SYS_CLK_DIV << SYS_CLKDIV_SYS_Pos);

    SystemCoreClockUpdate();
+
+    if (SystemCoreClock > 80000000)
+    {
+        Flash_Param_at_xMHz(120);
+    }
+    else if (SystemCoreClock > 40000000)
+    {
+        Flash_Param_at_xMHz(80);
+    }
+    else if (SystemCoreClock > 30000000)
+    {
+        Flash_Param_at_xMHz(40);
+    }
+    else
+    {
+        Flash_Param_at_xMHz(30);
+    }
 }

 void switchCLK_20MHz(void)
@@ -1,79 +1,77 @@
 #ifndef __SWM320_ADC_H__
-#define	__SWM320_ADC_H__
+#define __SWM320_ADC_H__

-typedef struct {
-	uint8_t clk_src;		//ADC转换时钟源：ADC_CLKSRC_HRC、ADC_CLKSRC_VCO_DIV16、ADC_CLKSRC_VCO_DIV32、ADC_CLKSRC_VCO_DIV32
-	uint8_t clk_div;		//ADC转换时钟分频，取值1--31
-	uint8_t pga_ref;		//PGA基准：PGA_REF_INTERNAL、PGA_REF_EXTERNAL
-	uint8_t channels;		//ADC转换通道选中，ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
-	uint8_t samplAvg;		//采样取平均，触发启动ADC转换后，ADC在一个通道上连续采样、转换多次，并将它们的平均值作为该通道转换结果
-	uint8_t trig_src;		//ADC触发方式：ADC_TRIGSRC_SW、ADC_TRIGSRC_PWM、ADC_TRIGSRC_TIMR2、ADC_TRIGSRC_TIMR3
-	uint8_t Continue;		//在软件触发模式下：1 连续转换模式，启动后一直采样、转换，直到软件清除START位
-							//                  0 单次转换模式，转换完成后START位自动清除停止转换
-	uint8_t EOC_IEn;		//EOC中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
-	uint8_t OVF_IEn;		//OVF中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
-	uint8_t HFULL_IEn;		//FIFO半满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
-	uint8_t FULL_IEn;		//FIFO  满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
+typedef struct
+{
+    uint8_t clk_src;   //ADC转换时钟源：ADC_CLKSRC_HRC、ADC_CLKSRC_VCO_DIV16、ADC_CLKSRC_VCO_DIV32、ADC_CLKSRC_VCO_DIV32
+    uint8_t clk_div;   //ADC转换时钟分频，取值1--31
+    uint8_t pga_ref;   //PGA基准：PGA_REF_INTERNAL、PGA_REF_EXTERNAL
+    uint8_t channels;  //ADC转换通道选中，ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
+    uint8_t samplAvg;  //采样取平均，触发启动ADC转换后，ADC在一个通道上连续采样、转换多次，并将它们的平均值作为该通道转换结果
+    uint8_t trig_src;  //ADC触发方式：ADC_TRIGSRC_SW、ADC_TRIGSRC_PWM、ADC_TRIGSRC_TIMR2、ADC_TRIGSRC_TIMR3
+    uint8_t Continue;  //在软件触发模式下：1 连续转换模式，启动后一直采样、转换，直到软件清除START位
+                       //                  0 单次转换模式，转换完成后START位自动清除停止转换
+    uint8_t EOC_IEn;   //EOC中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
+    uint8_t OVF_IEn;   //OVF中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
+    uint8_t HFULL_IEn; //FIFO半满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
+    uint8_t FULL_IEn;  //FIFO  满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
 } ADC_InitStructure;

-#define ADC_CH0		0x01
-#define ADC_CH1		0x02
-#define ADC_CH2		0x04
-#define ADC_CH3		0x08
-#define ADC_CH4		0x10
-#define ADC_CH5		0x20
-#define ADC_CH6		0x40
-#define ADC_CH7		0x80
+#define ADC_CH0 0x01
+#define ADC_CH1 0x02
+#define ADC_CH2 0x04
+#define ADC_CH3 0x08
+#define ADC_CH4 0x10
+#define ADC_CH5 0x20
+#define ADC_CH6 0x40
+#define ADC_CH7 0x80

-#define ADC_CLKSRC_HRC			1
-#define ADC_CLKSRC_VCO_DIV16	2
-#define ADC_CLKSRC_VCO_DIV32	3
-#define ADC_CLKSRC_VCO_DIV64	4
+#define ADC_CLKSRC_HRC 1
+#define ADC_CLKSRC_VCO_DIV16 2
+#define ADC_CLKSRC_VCO_DIV32 3
+#define ADC_CLKSRC_VCO_DIV64 4

-#define ADC_AVG_SAMPLE1			0	
-#define ADC_AVG_SAMPLE2			1	//一次启动连续采样、转换2次，并计算两次结果的平均值作为转换结果
-#define ADC_AVG_SAMPLE4			3
-#define ADC_AVG_SAMPLE8			7
-#define ADC_AVG_SAMPLE16		15
+#define ADC_AVG_SAMPLE1 0
+#define ADC_AVG_SAMPLE2 1 //一次启动连续采样、转换2次，并计算两次结果的平均值作为转换结果
+#define ADC_AVG_SAMPLE4 3
+#define ADC_AVG_SAMPLE8 7
+#define ADC_AVG_SAMPLE16 15

-#define ADC_TRIGSRC_SW			0	//软件触发，即ADC->START.GO写1启动转换
-#define ADC_TRIGSRC_PWM			1
+#define ADC_TRIGSRC_SW 0 //软件触发，即ADC->START.GO写1启动转换
+#define ADC_TRIGSRC_PWM 1

-#define PGA_REF_INTERNAL		1	//PGA输入共模电平由内部电路产生，ADC_REFP和ADC_REFN可悬空
-#define PGA_REF_EXTERNAL		0	//PGA输入共模电平由外部引脚提供，(ADC_REFP + ADC_REFN) 电平值须与量程相同
+#define PGA_REF_INTERNAL 1 //PGA输入共模电平由内部电路产生，ADC_REFP和ADC_REFN可悬空
+#define PGA_REF_EXTERNAL 0 //PGA输入共模电平由外部引脚提供，(ADC_REFP + ADC_REFN) 电平值须与量程相同

+void ADC_Init(ADC_TypeDef *ADCx, ADC_InitStructure *initStruct); //ADC模数转换器初始化
+void ADC_Open(ADC_TypeDef *ADCx);                                //ADC开启，可以软件启动、或硬件触发ADC转换
+void ADC_Close(ADC_TypeDef *ADCx);                               //ADC关闭，无法软件启动、或硬件触发ADC转换
+void ADC_Start(ADC_TypeDef *ADCx);                               //启动指定ADC，开始模数转换
+void ADC_Stop(ADC_TypeDef *ADCx);                                //关闭指定ADC，停止模数转换

-void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct);		//ADC模数转换器初始化
-void ADC_Open(ADC_TypeDef * ADCx);							//ADC开启，可以软件启动、或硬件触发ADC转换
-void ADC_Close(ADC_TypeDef * ADCx);							//ADC关闭，无法软件启动、或硬件触发ADC转换
-void ADC_Start(ADC_TypeDef * ADCx);							//启动指定ADC，开始模数转换
-void ADC_Stop(ADC_TypeDef * ADCx);							//关闭指定ADC，停止模数转换
+uint32_t ADC_Read(ADC_TypeDef *ADCx, uint32_t chn);  //从指定通道读取转换结果
+uint32_t ADC_IsEOC(ADC_TypeDef *ADCx, uint32_t chn); //指定通道是否End Of Conversion

-uint32_t ADC_Read(ADC_TypeDef * ADCx, uint32_t chn);		//从指定通道读取转换结果
-uint32_t ADC_IsEOC(ADC_TypeDef * ADCx, uint32_t chn);		//指定通道是否End Of Conversion
+void ADC_ChnSelect(ADC_TypeDef *ADCx, uint32_t chns);

-void ADC_ChnSelect(ADC_TypeDef * ADCx, uint32_t chns);
+void ADC_IntEOCEn(ADC_TypeDef *ADCx, uint32_t chn);       //转换完成中断使能
+void ADC_IntEOCDis(ADC_TypeDef *ADCx, uint32_t chn);      //转换完成中断禁止
+void ADC_IntEOCClr(ADC_TypeDef *ADCx, uint32_t chn);      //转换完成中断标志清除
+uint32_t ADC_IntEOCStat(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断状态

+void ADC_IntOVFEn(ADC_TypeDef *ADCx, uint32_t chn);       //数据溢出中断使能
+void ADC_IntOVFDis(ADC_TypeDef *ADCx, uint32_t chn);      //数据溢出中断禁止
+void ADC_IntOVFClr(ADC_TypeDef *ADCx, uint32_t chn);      //数据溢出中断标志清除
+uint32_t ADC_IntOVFStat(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断状态

-void ADC_IntEOCEn(ADC_TypeDef * ADCx, uint32_t chn);		//转换完成中断使能
-void ADC_IntEOCDis(ADC_TypeDef * ADCx, uint32_t chn);		//转换完成中断禁止
-void ADC_IntEOCClr(ADC_TypeDef * ADCx, uint32_t chn);		//转换完成中断标志清除
-uint32_t ADC_IntEOCStat(ADC_TypeDef * ADCx, uint32_t chn);	//转换完成中断状态
-
-void ADC_IntOVFEn(ADC_TypeDef * ADCx, uint32_t chn);		//数据溢出中断使能
-void ADC_IntOVFDis(ADC_TypeDef * ADCx, uint32_t chn);		//数据溢出中断禁止
-void ADC_IntOVFClr(ADC_TypeDef * ADCx, uint32_t chn);		//数据溢出中断标志清除
-uint32_t ADC_IntOVFStat(ADC_TypeDef * ADCx, uint32_t chn);	//数据溢出中断状态
-
-void ADC_IntHFULLEn(ADC_TypeDef * ADCx, uint32_t chn);		//FIFO半满中断使能
-void ADC_IntHFULLDis(ADC_TypeDef * ADCx, uint32_t chn);		//FIFO半满中断禁止
-void ADC_IntHFULLClr(ADC_TypeDef * ADCx, uint32_t chn);		//FIFO半满中断标志清除
-uint32_t ADC_IntHFULLStat(ADC_TypeDef * ADCx, uint32_t chn);//FIFO半满中断状态
-
-void ADC_IntFULLEn(ADC_TypeDef * ADCx, uint32_t chn);		//FIFO满中断使能
-void ADC_IntFULLDis(ADC_TypeDef * ADCx, uint32_t chn);		//FIFO满中断禁止
-void ADC_IntFULLClr(ADC_TypeDef * ADCx, uint32_t chn);		//FIFO满中断标志清除
-uint32_t ADC_IntFULLStat(ADC_TypeDef * ADCx, uint32_t chn);	//FIFO满中断状态
+void ADC_IntHFULLEn(ADC_TypeDef *ADCx, uint32_t chn);       //FIFO半满中断使能
+void ADC_IntHFULLDis(ADC_TypeDef *ADCx, uint32_t chn);      //FIFO半满中断禁止
+void ADC_IntHFULLClr(ADC_TypeDef *ADCx, uint32_t chn);      //FIFO半满中断标志清除
+uint32_t ADC_IntHFULLStat(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断状态

+void ADC_IntFULLEn(ADC_TypeDef *ADCx, uint32_t chn);       //FIFO满中断使能
+void ADC_IntFULLDis(ADC_TypeDef *ADCx, uint32_t chn);      //FIFO满中断禁止
+void ADC_IntFULLClr(ADC_TypeDef *ADCx, uint32_t chn);      //FIFO满中断标志清除
+uint32_t ADC_IntFULLStat(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断状态

 #endif //__SWM320_ADC_H__
@@ -1,136 +1,134 @@
 #ifndef __SWM320_CAN_H__
 #define __SWM320_CAN_H__

-#define CAN_FRAME_STD	0
-#define CAN_FRAME_EXT	1
+#define CAN_FRAME_STD 0
+#define CAN_FRAME_EXT 1

-typedef struct {
-	uint8_t  Mode;			//CAN_MODE_NORMAL、CAN_MODE_LISTEN、CAN_MODE_SELFTEST
-	uint8_t  CAN_BS1;		//CAN_BS1_1tq、CAN_BS1_2tq、... ... 、CAN_BS1_16tq
-	uint8_t  CAN_BS2;		//CAN_BS2_1tq、CAN_BS2_2tq、... ... 、CAN_BS2_8tq
-	uint8_t  CAN_SJW;		//CAN_SJW_1tq、CAN_SJW_2tq、CAN_SJW_3tq、CAN_SJW_4tq
-	uint32_t Baudrate;		//波特率，即位传输速率，取值1--1000000
-	uint8_t  FilterMode;	//CAN_FILTER_16b、CAN_FILTER_32b
-	union {
-		uint32_t FilterMask32b;		//FilterCheck & (~FilterMask) == ID & (~FilterMask)的Message通过过滤
-		struct {					// 0 must match    1 don't care
-			uint16_t FilterMask16b1;
-			uint16_t FilterMask16b2;
-		};
-	};
-	union {
-		uint32_t FilterCheck32b;
-		struct {
-			uint16_t FilterCheck16b1;
-			uint16_t FilterCheck16b2;
-		};
-	};
-	uint8_t  RXNotEmptyIEn;		//接收FIFO非空，有数据可读
-	uint8_t  RXOverflowIEn;		//接收FIFO溢出，有数据丢失
-	uint8_t  ArbitrLostIEn;		//控制器丢失仲裁变成接收方
-	uint8_t  ErrPassiveIEn;		//接收/发送错误计数值达到127
+typedef struct
+{
+    uint8_t Mode;       //CAN_MODE_NORMAL、CAN_MODE_LISTEN、CAN_MODE_SELFTEST
+    uint8_t CAN_BS1;    //CAN_BS1_1tq、CAN_BS1_2tq、... ... 、CAN_BS1_16tq
+    uint8_t CAN_BS2;    //CAN_BS2_1tq、CAN_BS2_2tq、... ... 、CAN_BS2_8tq
+    uint8_t CAN_SJW;    //CAN_SJW_1tq、CAN_SJW_2tq、CAN_SJW_3tq、CAN_SJW_4tq
+    uint32_t Baudrate;  //波特率，即位传输速率，取值1--1000000
+    uint8_t FilterMode; //CAN_FILTER_16b、CAN_FILTER_32b
+    union
+    {
+        uint32_t FilterMask32b; //FilterCheck & (~FilterMask) == ID & (~FilterMask)的Message通过过滤
+        struct
+        { // 0 must match    1 don't care
+            uint16_t FilterMask16b1;
+            uint16_t FilterMask16b2;
+        };
+    };
+    union
+    {
+        uint32_t FilterCheck32b;
+        struct
+        {
+            uint16_t FilterCheck16b1;
+            uint16_t FilterCheck16b2;
+        };
+    };
+    uint8_t RXNotEmptyIEn; //接收FIFO非空，有数据可读
+    uint8_t RXOverflowIEn; //接收FIFO溢出，有数据丢失
+    uint8_t ArbitrLostIEn; //控制器丢失仲裁变成接收方
+    uint8_t ErrPassiveIEn; //接收/发送错误计数值达到127
 } CAN_InitStructure;

-#define CAN_MODE_NORMAL		0	//常规模式
-#define CAN_MODE_LISTEN		1	//监听模式
-#define CAN_MODE_SELFTEST	2	//自测模式
+#define CAN_MODE_NORMAL 0   //常规模式
+#define CAN_MODE_LISTEN 1   //监听模式
+#define CAN_MODE_SELFTEST 2 //自测模式

-#define CAN_BS1_1tq			0
-#define CAN_BS1_2tq			1
-#define CAN_BS1_3tq			2
-#define CAN_BS1_4tq			3
-#define CAN_BS1_5tq			4
-#define CAN_BS1_6tq			5
-#define CAN_BS1_7tq			6
-#define CAN_BS1_8tq			7
-#define CAN_BS1_9tq			8
-#define CAN_BS1_10tq		9
-#define CAN_BS1_11tq		10
-#define CAN_BS1_12tq		11
-#define CAN_BS1_13tq		12
-#define CAN_BS1_14tq		13
-#define CAN_BS1_15tq		14
-#define CAN_BS1_16tq		15
+#define CAN_BS1_1tq 0
+#define CAN_BS1_2tq 1
+#define CAN_BS1_3tq 2
+#define CAN_BS1_4tq 3
+#define CAN_BS1_5tq 4
+#define CAN_BS1_6tq 5
+#define CAN_BS1_7tq 6
+#define CAN_BS1_8tq 7
+#define CAN_BS1_9tq 8
+#define CAN_BS1_10tq 9
+#define CAN_BS1_11tq 10
+#define CAN_BS1_12tq 11
+#define CAN_BS1_13tq 12
+#define CAN_BS1_14tq 13
+#define CAN_BS1_15tq 14
+#define CAN_BS1_16tq 15

-#define CAN_BS2_1tq			0
-#define CAN_BS2_2tq			1
-#define CAN_BS2_3tq			2
-#define CAN_BS2_4tq			3
-#define CAN_BS2_5tq			4
-#define CAN_BS2_6tq			5
-#define CAN_BS2_7tq			6
-#define CAN_BS2_8tq			7
+#define CAN_BS2_1tq 0
+#define CAN_BS2_2tq 1
+#define CAN_BS2_3tq 2
+#define CAN_BS2_4tq 3
+#define CAN_BS2_5tq 4
+#define CAN_BS2_6tq 5
+#define CAN_BS2_7tq 6
+#define CAN_BS2_8tq 7

-#define CAN_SJW_1tq			0
-#define CAN_SJW_2tq			1
-#define CAN_SJW_3tq			2
-#define CAN_SJW_4tq			3
+#define CAN_SJW_1tq 0
+#define CAN_SJW_2tq 1
+#define CAN_SJW_3tq 2
+#define CAN_SJW_4tq 3

-#define CAN_FILTER_16b		0	//两个16位过滤器
-#define CAN_FILTER_32b		1	//一个32位过滤器
+#define CAN_FILTER_16b 0 //两个16位过滤器
+#define CAN_FILTER_32b 1 //一个32位过滤器

-typedef struct {
-	uint32_t id;		//消息ID
-	uint8_t  format;	//帧格式：CAN_FRAME_STD、CAN_FRAME_EXT
-	uint8_t  remote;	//消息是否为远程帧
-	uint8_t  size;		//接收到的数据个数
-	uint8_t  data[8];	//接收到的数据
+typedef struct
+{
+    uint32_t id;     //消息ID
+    uint8_t format;  //帧格式：CAN_FRAME_STD、CAN_FRAME_EXT
+    uint8_t remote;  //消息是否为远程帧
+    uint8_t size;    //接收到的数据个数
+    uint8_t data[8]; //接收到的数据
 } CAN_RXMessage;

+void CAN_Init(CAN_TypeDef *CANx, CAN_InitStructure *initStruct);
+void CAN_Open(CAN_TypeDef *CANx);
+void CAN_Close(CAN_TypeDef *CANx);

-void CAN_Init(CAN_TypeDef * CANx, CAN_InitStructure * initStruct);
-void CAN_Open(CAN_TypeDef * CANx);
-void CAN_Close(CAN_TypeDef * CANx);
+void CAN_Transmit(CAN_TypeDef *CANx, uint32_t format, uint32_t id, uint8_t data[], uint32_t size, uint32_t once);
+void CAN_TransmitRequest(CAN_TypeDef *CANx, uint32_t format, uint32_t id, uint32_t once);
+void CAN_Receive(CAN_TypeDef *CANx, CAN_RXMessage *msg);

-void CAN_Transmit(CAN_TypeDef * CANx, uint32_t format, uint32_t id, uint8_t data[], uint32_t size, uint32_t once);
-void CAN_TransmitRequest(CAN_TypeDef * CANx, uint32_t format, uint32_t id, uint32_t once);
-void CAN_Receive(CAN_TypeDef * CANx, CAN_RXMessage *msg);
+uint32_t CAN_TXComplete(CAN_TypeDef *CANx);
+uint32_t CAN_TXSuccess(CAN_TypeDef *CANx);

-uint32_t CAN_TXComplete(CAN_TypeDef * CANx);
-uint32_t CAN_TXSuccess(CAN_TypeDef * CANx);
+void CAN_AbortTransmit(CAN_TypeDef *CANx);

-void CAN_AbortTransmit(CAN_TypeDef * CANx);
+uint32_t CAN_TXBufferReady(CAN_TypeDef *CANx);
+uint32_t CAN_RXDataAvailable(CAN_TypeDef *CANx);

-uint32_t CAN_TXBufferReady(CAN_TypeDef * CANx);
-uint32_t CAN_RXDataAvailable(CAN_TypeDef * CANx);
+void CAN_SetBaudrate(CAN_TypeDef *CANx, uint32_t baudrate, uint32_t CAN_BS1, uint32_t CAN_BS2, uint32_t CAN_SJW);

-void CAN_SetBaudrate(CAN_TypeDef * CANx, uint32_t baudrate, uint32_t CAN_BS1, uint32_t CAN_BS2, uint32_t CAN_SJW);
+void CAN_SetFilter32b(CAN_TypeDef *CANx, uint32_t check, uint32_t mask);
+void CAN_SetFilter16b(CAN_TypeDef *CANx, uint16_t check1, uint16_t mask1, uint16_t check2, uint16_t mask2);

-void CAN_SetFilter32b(CAN_TypeDef * CANx, uint32_t check, uint32_t mask);
-void CAN_SetFilter16b(CAN_TypeDef * CANx, uint16_t check1, uint16_t mask1, uint16_t check2, uint16_t mask2);
+void CAN_INTRXNotEmptyEn(CAN_TypeDef *CANx);
+void CAN_INTRXNotEmptyDis(CAN_TypeDef *CANx);

+void CAN_INTTXBufEmptyEn(CAN_TypeDef *CANx);
+void CAN_INTTXBufEmptyDis(CAN_TypeDef *CANx);

-void CAN_INTRXNotEmptyEn(CAN_TypeDef * CANx);
-void CAN_INTRXNotEmptyDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTRXNotEmptyStat(CAN_TypeDef * CANx);
+void CAN_INTErrWarningEn(CAN_TypeDef *CANx);
+void CAN_INTErrWarningDis(CAN_TypeDef *CANx);

-void CAN_INTTXBufEmptyEn(CAN_TypeDef * CANx);
-void CAN_INTTXBufEmptyDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTTXBufEmptyStat(CAN_TypeDef * CANx);
+void CAN_INTRXOverflowEn(CAN_TypeDef *CANx);
+void CAN_INTRXOverflowDis(CAN_TypeDef *CANx);
+void CAN_INTRXOverflowClear(CAN_TypeDef *CANx);

-void CAN_INTErrWarningEn(CAN_TypeDef * CANx);
-void CAN_INTErrWarningDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTErrWarningStat(CAN_TypeDef * CANx);
+void CAN_INTWakeupEn(CAN_TypeDef *CANx);
+void CAN_INTWakeupDis(CAN_TypeDef *CANx);

-void CAN_INTRXOverflowEn(CAN_TypeDef * CANx);
-void CAN_INTRXOverflowDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTRXOverflowStat(CAN_TypeDef * CANx);
-void CAN_INTRXOverflowClear(CAN_TypeDef * CANx);
+void CAN_INTErrPassiveEn(CAN_TypeDef *CANx);
+void CAN_INTErrPassiveDis(CAN_TypeDef *CANx);

-void CAN_INTWakeupEn(CAN_TypeDef * CANx);
-void CAN_INTWakeupDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTWakeupStat(CAN_TypeDef * CANx);
+void CAN_INTArbitrLostEn(CAN_TypeDef *CANx);
+void CAN_INTArbitrLostDis(CAN_TypeDef *CANx);

-void CAN_INTErrPassiveEn(CAN_TypeDef * CANx);
-void CAN_INTErrPassiveDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTErrPassiveStat(CAN_TypeDef * CANx);
+void CAN_INTBusErrorEn(CAN_TypeDef *CANx);
+void CAN_INTBusErrorDis(CAN_TypeDef *CANx);

-void CAN_INTArbitrLostEn(CAN_TypeDef * CANx);
-void CAN_INTArbitrLostDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTArbitrLostStat(CAN_TypeDef * CANx);
-
-void CAN_INTBusErrorEn(CAN_TypeDef * CANx);
-void CAN_INTBusErrorDis(CAN_TypeDef * CANx);
-uint32_t CAN_INTBusErrorStat(CAN_TypeDef * CANx);
+uint32_t CAN_INTStat(CAN_TypeDef *CANx);

 #endif //__SWM320_CAN_H__
@@ -1,10 +1,10 @@
 /****************************************************************************************************************************************** 
-* 文件名称: SWM320_crc.c
-* 功能说明:	SWM320单片机的CRC模块驱动库
-* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
-* 注意事项: 
-* 版本日期:	V1.1.0		2017年10月25日
-* 升级记录: 
+* 文件名称: SWM320_crc.c
+* 功能说明:	SWM320单片机的CRC模块驱动库
+* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
+* 注意事项: 
+* 版本日期:	V1.1.0		2017年10月25日
+* 升级记录: 
 *
 *
 *******************************************************************************************************************************************
@@ -21,31 +21,30 @@
 #include "SWM320.h"
 #include "SWM320_crc.h"

-
 /****************************************************************************************************************************************** 
-* 函数名称:	CRC_Init()
-* 功能说明:	CRC 初始化
-* 输    入: CRC_TypeDef * CRCx	指定要被设置的CRC接口，有效值包括CRC
-*			uint32_t mode		工作模式，有效值有：CRC32_IN32、CRC32_IN16、CRC32_IN8、CRC16_IN16、CRC16_IN8
-*			uint32_t out_not	输出结果是否取反
-*			uint32_t out_rev	输出结果是否翻转
-*			uint32_t ini_val	CRC初始值
-* 输    出: 无
-* 注意事项: 无
+* 函数名称:	CRC_Init()
+* 功能说明:	CRC 初始化
+* 输    入: CRC_TypeDef * CRCx	指定要被设置的CRC接口，有效值包括CRC
+*			uint32_t mode		工作模式，有效值有：CRC32_IN32、CRC32_IN16、CRC32_IN8、CRC16_IN16、CRC16_IN8
+*			uint32_t out_not	输出结果是否取反
+*			uint32_t out_rev	输出结果是否翻转
+*			uint32_t ini_val	CRC初始值
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
-void CRC_Init(CRC_TypeDef * CRCx, uint32_t mode, uint32_t out_not, uint32_t out_rev, uint32_t ini_val)
+void CRC_Init(CRC_TypeDef *CRCx, uint32_t mode, uint32_t out_not, uint32_t out_rev, uint32_t ini_val)
 {
-	switch((uint32_t)CRCx)
-	{
-	case ((uint32_t)CRC):
-		SYS->CLKEN |= (0x01 << SYS_CLKEN_CRC_Pos);
-		break;
-	}
-	
-	CRCx->CR = (1 << CRC_CR_EN_Pos) |
-			   (mode << CRC_CR_CRC16_Pos) |
-			   (out_not << CRC_CR_ONOT_Pos) |
-			   (out_rev << CRC_CR_OREV_Pos);
-	
-	CRCx->INIVAL = ini_val;
+    switch ((uint32_t)CRCx)
+    {
+    case ((uint32_t)CRC):
+        SYS->CLKEN |= (0x01 << SYS_CLKEN_CRC_Pos);
+        break;
+    }
+
+    CRCx->CR = (1 << CRC_CR_EN_Pos) |
+               (mode << CRC_CR_CRC16_Pos) |
+               (out_not << CRC_CR_ONOT_Pos) |
+               (out_rev << CRC_CR_OREV_Pos);
+
+    CRCx->INIVAL = ini_val;
 }
@@ -1,39 +1,36 @@
 #ifndef __SWM320_CRC_H__
 #define __SWM320_CRC_H__

+#define CRC32_IN32 0 //CRC32算法，输入数据32位
+#define CRC32_IN16 2 //CRC32算法，输入数据16位
+#define CRC32_IN8 4  //CRC32算法，输入数据 8位
+#define CRC16_IN16 3 //CRC16算法，输入数据16位
+#define CRC16_IN8 5  //CRC16算法，输入数据 8位

-#define CRC32_IN32	0	//CRC32算法，输入数据32位
-#define CRC32_IN16	2	//CRC32算法，输入数据16位
-#define CRC32_IN8	4	//CRC32算法，输入数据 8位
-#define CRC16_IN16	3	//CRC16算法，输入数据16位
-#define CRC16_IN8	5	//CRC16算法，输入数据 8位
-
-
-void CRC_Init(CRC_TypeDef * CRCx, uint32_t mode, uint32_t out_not, uint32_t out_rev, uint32_t ini_val);
-
+void CRC_Init(CRC_TypeDef *CRCx, uint32_t mode, uint32_t out_not, uint32_t out_rev, uint32_t ini_val);

 /****************************************************************************************************************************************** 
-* 函数名称:	CRC_Write()
-* 功能说明:	CRC写入数据
-* 输    入: uint32_t data		要写入的数据
-* 输    出: 无
-* 注意事项: 无
+* 函数名称:	CRC_Write()
+* 功能说明:	CRC写入数据
+* 输    入: uint32_t data		要写入的数据
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
 static __INLINE void CRC_Write(uint32_t data)
 {
-	CRC->DATAIN = data;
+    CRC->DATAIN = data;
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	CRC_Result()
-* 功能说明:	获取CRC计算结果
-* 输    入: 无
-* 输    出: uint32_t			CRC 计算结果
-* 注意事项: 无
+* 函数名称:	CRC_Result()
+* 功能说明:	获取CRC计算结果
+* 输    入: 无
+* 输    出: uint32_t			CRC 计算结果
+* 注意事项: 无
 ******************************************************************************************************************************************/
 static __INLINE uint32_t CRC_Result(void)
 {
-	return CRC->RESULT;
+    return CRC->RESULT;
 }

 #endif //__SWM320_CRC_H__
@@ -1,10 +1,10 @@
 /****************************************************************************************************************************************** 
-* 文件名称: SWM320_dma.c
-* 功能说明:	SWM320单片机的DMA功能驱动库
-* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
-* 注意事项: 
-* 版本日期:	V1.1.0		2017年10月25日
-* 升级记录:  
+* 文件名称: SWM320_dma.c
+* 功能说明:	SWM320单片机的DMA功能驱动库
+* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
+* 注意事项: 
+* 版本日期:	V1.1.0		2017年10月25日
+* 升级记录:  
 *
 *
 *******************************************************************************************************************************************
@@ -22,117 +22,119 @@
 #include "SWM320_dma.h"

 /****************************************************************************************************************************************** 
-* 函数名称: DMA_CHM_Config()
-* 功能说明:	DMA通道配置，用于存储器间（如Flash和RAM间）搬运数据
-* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
-*			uint32_t src_addr		源地址，必须字对齐，即地址的最低2位必须是00
-*			uint32_t src_addr_incr	0 固定地址    1 地址递增
-*			uint32_t dst_addr		目的地址，必须字对齐，即地址的最低2位必须是00
-*			uint32_t dst_addr_incr	0 固定地址    1 地址递增
-*			uint32_t num_word		要搬运的数据字数，最大1024
-*			uint32_t int_en			中断使能，1 数据搬运完成后产生中断    0 数据搬运完成后不产生中断
-* 输    出: 无
-* 注意事项: 搬运数据量以字为单元，不是字节
+* 函数名称: DMA_CHM_Config()
+* 功能说明:	DMA通道配置，用于存储器间（如Flash和RAM间）搬运数据
+* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
+*			uint32_t src_addr		源地址，必须字对齐，即地址的最低2位必须是00
+*			uint32_t src_addr_incr	0 固定地址    1 地址递增
+*			uint32_t dst_addr		目的地址，必须字对齐，即地址的最低2位必须是00
+*			uint32_t dst_addr_incr	0 固定地址    1 地址递增
+*			uint32_t num_word		要搬运的数据字数，最大1024
+*			uint32_t int_en			中断使能，1 数据搬运完成后产生中断    0 数据搬运完成后不产生中断
+* 输    出: 无
+* 注意事项: 搬运数据量以字为单元，不是字节
 ******************************************************************************************************************************************/
 void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en)
 {
-	DMA->EN = 1;			//每个通道都有自己独立的开关控制，所以总开关可以是一直开启的
-	
-	DMA_CH_Close(chn);		//配置前先关闭该通道
-	
-	DMA->CH[chn].SRC = src_addr;
-	DMA->CH[chn].DST = dst_addr;
-	
-	DMA->CH[chn].CR = ((num_word*4-1) << DMA_CR_LEN_Pos) |
-					  (0 << DMA_CR_AUTORE_Pos);
-	
-	DMA->CH[chn].AM = (src_addr_incr << DMA_AM_SRCAM_Pos) |
-					  (dst_addr_incr << DMA_AM_DSTAM_Pos) |
-					  (0 << DMA_AM_BURST_Pos);
-	
-	DMA->IF  = (1 << chn);		//清除中断标志
-	DMA->IE |= (1 << chn);
-	if(int_en)	DMA->IM &= ~(1 << chn);
-	else		DMA->IM |=  (1 << chn);
-	
-	if(int_en)
-	{
-		NVIC_EnableIRQ(DMA_IRQn);
-	}
-	else
-	{
-		//不能调用NVIC_DisalbeIRQ(DMA_IRQn)，因为其他通道可能使用DMA中断
-	}
+    DMA->EN = 1; //每个通道都有自己独立的开关控制，所以总开关可以是一直开启的
+
+    DMA_CH_Close(chn); //配置前先关闭该通道
+
+    DMA->CH[chn].SRC = src_addr;
+    DMA->CH[chn].DST = dst_addr;
+
+    DMA->CH[chn].CR = ((num_word * 4 - 1) << DMA_CR_LEN_Pos) |
+                      (0 << DMA_CR_AUTORE_Pos);
+
+    DMA->CH[chn].AM = (src_addr_incr << DMA_AM_SRCAM_Pos) |
+                      (dst_addr_incr << DMA_AM_DSTAM_Pos) |
+                      (0 << DMA_AM_BURST_Pos);
+
+    DMA->IF = (1 << chn); //清除中断标志
+    DMA->IE |= (1 << chn);
+    if (int_en)
+        DMA->IM &= ~(1 << chn);
+    else
+        DMA->IM |= (1 << chn);
+
+    if (int_en)
+    {
+        NVIC_EnableIRQ(DMA_IRQn);
+    }
+    else
+    {
+        //不能调用NVIC_DisalbeIRQ(DMA_IRQn)，因为其他通道可能使用DMA中断
+    }
 }

 /****************************************************************************************************************************************** 
-* 函数名称: DMA_CH_Open()
-* 功能说明:	DMA通道打开
-* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
-* 输    出: 无
-* 注意事项: 无
+* 函数名称: DMA_CH_Open()
+* 功能说明:	DMA通道打开
+* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
 void DMA_CH_Open(uint32_t chn)
 {
-	DMA->CH[chn].CR |= (1 << DMA_CR_TXEN_Pos);
+    DMA->CH[chn].CR |= (1 << DMA_CR_TXEN_Pos);
 }

 /****************************************************************************************************************************************** 
-* 函数名称: DMA_CH_Close()
-* 功能说明:	DMA通道关闭
-* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
-* 输    出: 无
-* 注意事项: 无
+* 函数名称: DMA_CH_Close()
+* 功能说明:	DMA通道关闭
+* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
 void DMA_CH_Close(uint32_t chn)
 {
-	DMA->CH[chn].CR &= ~(1 << DMA_CR_TXEN_Pos);
+    DMA->CH[chn].CR &= ~(1 << DMA_CR_TXEN_Pos);
 }

 /****************************************************************************************************************************************** 
-* 函数名称: DMA_CH_INTEn()
-* 功能说明:	DMA中断使能，数据搬运完成后触发中断
-* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
-* 输    出: 无
-* 注意事项: 无
+* 函数名称: DMA_CH_INTEn()
+* 功能说明:	DMA中断使能，数据搬运完成后触发中断
+* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
 void DMA_CH_INTEn(uint32_t chn)
 {
-	DMA->IM &= ~(1 << chn);
+    DMA->IM &= ~(1 << chn);
 }

 /****************************************************************************************************************************************** 
-* 函数名称: DMA_CH_INTDis()
-* 功能说明:	DMA中断禁止，数据搬运完成后不触发中断
-* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
-* 输    出: 无
-* 注意事项: 无
+* 函数名称: DMA_CH_INTDis()
+* 功能说明:	DMA中断禁止，数据搬运完成后不触发中断
+* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
 void DMA_CH_INTDis(uint32_t chn)
 {
-	DMA->IM |= (1 << chn);
+    DMA->IM |= (1 << chn);
 }

 /****************************************************************************************************************************************** 
-* 函数名称: DMA_CH_INTClr()
-* 功能说明:	DMA中断标志清除
-* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
-* 输    出: 无
-* 注意事项: 无
+* 函数名称: DMA_CH_INTClr()
+* 功能说明:	DMA中断标志清除
+* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
 void DMA_CH_INTClr(uint32_t chn)
 {
-	DMA->IF = (1 << chn);
+    DMA->IF = (1 << chn);
 }

 /****************************************************************************************************************************************** 
-* 函数名称: DMA_CH_INTStat()
-* 功能说明:	DMA中断状态查询
-* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
-* 输    出: uint32_t				1 数据搬运完成    0 数据搬运未完成
-* 注意事项: 无
+* 函数名称: DMA_CH_INTStat()
+* 功能说明:	DMA中断状态查询
+* 输    入: uint32_t chn			指定要配置的通道，有效值有DMA_CH0、DMA_CH1、DMA_CH2
+* 输    出: uint32_t				1 数据搬运完成    0 数据搬运未完成
+* 注意事项: 无
 ******************************************************************************************************************************************/
 uint32_t DMA_CH_INTStat(uint32_t chn)
-{	
-	return (DMA->IF & (1 << chn)) ? 1 : 0;
+{
+    return (DMA->IF & (1 << chn)) ? 1 : 0;
 }
@@ -1,20 +1,17 @@
 #ifndef __SWM320_DMA_H__
 #define __SWM320_DMA_H__

+#define DMA_CH0 0
+#define DMA_CH1 1
+#define DMA_CH2 2

-#define DMA_CH0		0
-#define DMA_CH1		1
-#define DMA_CH2		2
-
-
-void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en);	//DMA通道配置，用于存储器间（如Flash和RAM间）搬运数据
-void DMA_CH_Open(uint32_t chn);					//DMA通道打开
-void DMA_CH_Close(uint32_t chn);				//DMA通道关闭
-
-void DMA_CH_INTEn(uint32_t chn);				//DMA中断使能，数据搬运完成后触发中断
-void DMA_CH_INTDis(uint32_t chn);				//DMA中断禁止，数据搬运完成后不触发中断
-void DMA_CH_INTClr(uint32_t chn);				//DMA中断标志清除
-uint32_t DMA_CH_INTStat(uint32_t chn);			//DMA中断状态查询，1 数据搬运完成    0 数据搬运未完成
+void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en); //DMA通道配置，用于存储器间（如Flash和RAM间）搬运数据
+void DMA_CH_Open(uint32_t chn);                                                                                                                              //DMA通道打开
+void DMA_CH_Close(uint32_t chn);                                                                                                                             //DMA通道关闭

+void DMA_CH_INTEn(uint32_t chn);       //DMA中断使能，数据搬运完成后触发中断
+void DMA_CH_INTDis(uint32_t chn);      //DMA中断禁止，数据搬运完成后不触发中断
+void DMA_CH_INTClr(uint32_t chn);      //DMA中断标志清除
+uint32_t DMA_CH_INTStat(uint32_t chn); //DMA中断状态查询，1 数据搬运完成    0 数据搬运未完成

 #endif //__SWM320_DMA_H__
@@ -1,10 +1,10 @@
 /****************************************************************************************************************************************** 
-* 文件名称:	SWM320_exti.c
-* 功能说明:	SWM320单片机的外部中断功能驱动库
-* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1
-* 注意事项:
-* 版本日期: V1.1.0		2017年10月25日
-* 升级记录:  
+* 文件名称:	SWM320_exti.c
+* 功能说明:	SWM320单片机的外部中断功能驱动库
+* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1
+* 注意事项:
+* 版本日期: V1.1.0		2017年10月25日
+* 升级记录:  
 *
 *******************************************************************************************************************************************
 * @attention
@@ -21,111 +21,111 @@
 #include "SWM320_exti.h"

 /****************************************************************************************************************************************** 
-* 函数名称: EXTI_Init()
-* 功能说明:	指定引脚外部中断初始化
-* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
-*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
-*			uint32_t mode	   有效值有EXTI_FALL_EDGE、EXTI_RISE_EDGE、EXTI_BOTH_EDGE、EXTI_LOW_LEVEL、EXTI_HIGH_LEVEL
-* 输    出: 无
-* 注意事项: 由于GPIOA、GPIOB、GPIOC、GPIOM的PIN0--7引脚即可以接入NVIC中的引脚中断（如GPIOA0_IRQn），也可以接入NVIC的组中断（GPIOA_IRQn），
-*			所以不在此函数中调用NVIC_EnableIRQ()使能NVIC中断，从而可以根据需要调用NVIC_EnableIRQ(GPIOA0_IRQn)和NVIC_EnableIRQ(GPIOA_IRQn)
+* 函数名称: EXTI_Init()
+* 功能说明:	指定引脚外部中断初始化
+* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
+*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
+*			uint32_t mode	   有效值有EXTI_FALL_EDGE、EXTI_RISE_EDGE、EXTI_BOTH_EDGE、EXTI_LOW_LEVEL、EXTI_HIGH_LEVEL
+* 输    出: 无
+* 注意事项: 由于GPIOA、GPIOB、GPIOC、GPIOM的PIN0--7引脚即可以接入NVIC中的引脚中断（如GPIOA0_IRQn），也可以接入NVIC的组中断（GPIOA_IRQn），
+*			所以不在此函数中调用NVIC_EnableIRQ()使能NVIC中断，从而可以根据需要调用NVIC_EnableIRQ(GPIOA0_IRQn)和NVIC_EnableIRQ(GPIOA_IRQn)
 ******************************************************************************************************************************************/
-void EXTI_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t mode)
+void EXTI_Init(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t mode)
 {
-	EXTI_Close(GPIOx, n);			//配置关键寄存器前先关闭
-	
-	if(mode & 0x10)
-	{
-		GPIOx->INTLVLTRG |= (0x01 << n);			//电平触发
-		
-		if(mode & 0x01)
-			GPIOx->INTRISEEN |= (0x01 << n);				//高电平触发
-		else
-			GPIOx->INTRISEEN &= ~(0x01 << n);				//低电平触发
-	}		
-	else
-	{
-		GPIOx->INTLVLTRG &= ~(0x01 << n);			//边沿触发
-		
-		if(mode & 0x02)
-		{
-			GPIOx->INTBE |= (0x01 << n);				//双边沿触发	
-		}
-		else
-		{
-			GPIOx->INTBE &= ~(0x01 << n);				//单边沿触发
-			
-			if(mode & 0x01)
-				GPIOx->INTRISEEN |= (0x01 << n);			//上升沿触发
-			else
-				GPIOx->INTRISEEN &= ~(0x01 << n);			//下降沿触发
-		}
-	}
-	
-	GPIOx->INTCLR = (1 << n);		//清除掉因为模式配置可能产生的中断
+    EXTI_Close(GPIOx, n); //配置关键寄存器前先关闭
+
+    if (mode & 0x10)
+    {
+        GPIOx->INTLVLTRG |= (0x01 << n); //电平触发
+
+        if (mode & 0x01)
+            GPIOx->INTRISEEN |= (0x01 << n); //高电平触发
+        else
+            GPIOx->INTRISEEN &= ~(0x01 << n); //低电平触发
+    }
+    else
+    {
+        GPIOx->INTLVLTRG &= ~(0x01 << n); //边沿触发
+
+        if (mode & 0x02)
+        {
+            GPIOx->INTBE |= (0x01 << n); //双边沿触发
+        }
+        else
+        {
+            GPIOx->INTBE &= ~(0x01 << n); //单边沿触发
+
+            if (mode & 0x01)
+                GPIOx->INTRISEEN |= (0x01 << n); //上升沿触发
+            else
+                GPIOx->INTRISEEN &= ~(0x01 << n); //下降沿触发
+        }
+    }
+
+    GPIOx->INTCLR = (1 << n); //清除掉因为模式配置可能产生的中断
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	EXTI_Open()
-* 功能说明:	指定引脚外部中断打开（即使能）
-* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
-*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
-* 输    出: 无
-* 注意事项: 无
+* 函数名称:	EXTI_Open()
+* 功能说明:	指定引脚外部中断打开（即使能）
+* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
+*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
-void EXTI_Open(GPIO_TypeDef * GPIOx, uint32_t n)
+void EXTI_Open(GPIO_TypeDef *GPIOx, uint32_t n)
 {
-	GPIOx->INTEN |= (0x01 << n);
+    GPIOx->INTEN |= (0x01 << n);
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	EXTI_Close()
-* 功能说明:	指定引脚外部中断关闭（即禁能）
-* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
-*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
-* 输    出: 无
-* 注意事项: 无
+* 函数名称:	EXTI_Close()
+* 功能说明:	指定引脚外部中断关闭（即禁能）
+* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
+*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
-void EXTI_Close(GPIO_TypeDef * GPIOx, uint32_t n)
+void EXTI_Close(GPIO_TypeDef *GPIOx, uint32_t n)
 {
-	GPIOx->INTEN &= ~(0x01 << n);
+    GPIOx->INTEN &= ~(0x01 << n);
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	EXTI_State()
-* 功能说明:	指定引脚是否触发了中断
-* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
-*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
-* 输    出: uint32_t	1 此引脚触发了中断    0 此引脚未触发中断
-* 注意事项: 无
+* 函数名称:	EXTI_State()
+* 功能说明:	指定引脚是否触发了中断
+* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
+*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
+* 输    出: uint32_t	1 此引脚触发了中断    0 此引脚未触发中断
+* 注意事项: 无
 ******************************************************************************************************************************************/
-uint32_t EXTI_State(GPIO_TypeDef * GPIOx, uint32_t n)
+uint32_t EXTI_State(GPIO_TypeDef *GPIOx, uint32_t n)
 {
-	return (GPIOx->INTSTAT >> n) & 0x01;
+    return (GPIOx->INTSTAT >> n) & 0x01;
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	EXTI_RawState()
-* 功能说明:	指定引脚是否满足过/了中断触发条件，当此中断关闭时可通过调用此函数以查询的方式检测引脚上是否满足过/了中断触发条件
-* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
-*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
-* 输    出: uint32_t	1 此引脚满足过/了中断触发条件    0 此引脚未满足过/了中断触发条件
-* 注意事项: 无
+* 函数名称:	EXTI_RawState()
+* 功能说明:	指定引脚是否满足过/了中断触发条件，当此中断关闭时可通过调用此函数以查询的方式检测引脚上是否满足过/了中断触发条件
+* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
+*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
+* 输    出: uint32_t	1 此引脚满足过/了中断触发条件    0 此引脚未满足过/了中断触发条件
+* 注意事项: 无
 ******************************************************************************************************************************************/
-uint32_t EXTI_RawState(GPIO_TypeDef * GPIOx, uint32_t n)
+uint32_t EXTI_RawState(GPIO_TypeDef *GPIOx, uint32_t n)
 {
-	return (GPIOx->INTRAWSTAT >> n) & 0x01;
+    return (GPIOx->INTRAWSTAT >> n) & 0x01;
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	EXTI_Clear()
-* 功能说明:	指定引脚外部中断清除（即清除中断标志，以免再次进入此中断）
-* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
-*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
-* 输    出: 无
-* 注意事项: 只能清除边沿触发中断的标志，电平触发中断的标志无法清除，只能在引脚电平不符合中断触发条件后硬件自动清除
+* 函数名称:	EXTI_Clear()
+* 功能说明:	指定引脚外部中断清除（即清除中断标志，以免再次进入此中断）
+* 输    入: GPIO_TypeDef * GPIOx	指定产生外部中断的GPIO端口，有效值包括GPIOA、GPIOB、GPIOC、GPIOM、GPION、GPIOP
+*			uint32_t n 		   指定产生外部中断的GPIO引脚，有效值包括PIN0、PIN1、PIN2、... ... PIN22、PIN23
+* 输    出: 无
+* 注意事项: 只能清除边沿触发中断的标志，电平触发中断的标志无法清除，只能在引脚电平不符合中断触发条件后硬件自动清除
 ******************************************************************************************************************************************/
-void EXTI_Clear(GPIO_TypeDef * GPIOx, uint32_t n)
+void EXTI_Clear(GPIO_TypeDef *GPIOx, uint32_t n)
 {
-	GPIOx->INTCLR = (0x01 << n);
+    GPIOx->INTCLR = (0x01 << n);
 }
@@ -1,20 +1,18 @@
 #ifndef __SWM320_EXTI_H__
-#define	__SWM320_EXTI_H__
+#define __SWM320_EXTI_H__

-void EXTI_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t mode);	//指定引脚外部中断初始化
-void EXTI_Open(GPIO_TypeDef * GPIOx, uint32_t n);					//指定引脚外部中断打开（即使能）
-void EXTI_Close(GPIO_TypeDef * GPIOx, uint32_t n);					//指定引脚外部中断关闭（即禁能）
+void EXTI_Init(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t mode); //指定引脚外部中断初始化
+void EXTI_Open(GPIO_TypeDef *GPIOx, uint32_t n);                //指定引脚外部中断打开（即使能）
+void EXTI_Close(GPIO_TypeDef *GPIOx, uint32_t n);               //指定引脚外部中断关闭（即禁能）

-uint32_t EXTI_State(GPIO_TypeDef * GPIOx, uint32_t n);				//指定引脚是否触发了中断
-uint32_t EXTI_RawState(GPIO_TypeDef * GPIOx, uint32_t n);			//指定引脚是否满足过/了中断触发条件，当此中断关闭时可通过调用此函数以查询的方式检测引脚上是否满足过/了中断触发条件
-void EXTI_Clear(GPIO_TypeDef * GPIOx, uint32_t n);					//指定引脚外部中断清除（即清除中断标志，以免再次进入此中断）
-
-
-#define EXTI_FALL_EDGE	0x00	//下降沿触发中断
-#define EXTI_RISE_EDGE	0x01	//上升沿触发中断
-#define EXTI_BOTH_EDGE	0x02	//双边沿触发中断
-#define EXTI_LOW_LEVEL	0x10	//低电平触发中断
-#define EXTI_HIGH_LEVEL	0x11	//高电平触发中断
+uint32_t EXTI_State(GPIO_TypeDef *GPIOx, uint32_t n);    //指定引脚是否触发了中断
+uint32_t EXTI_RawState(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚是否满足过/了中断触发条件，当此中断关闭时可通过调用此函数以查询的方式检测引脚上是否满足过/了中断触发条件
+void EXTI_Clear(GPIO_TypeDef *GPIOx, uint32_t n);        //指定引脚外部中断清除（即清除中断标志，以免再次进入此中断）

+#define EXTI_FALL_EDGE 0x00  //下降沿触发中断
+#define EXTI_RISE_EDGE 0x01  //上升沿触发中断
+#define EXTI_BOTH_EDGE 0x02  //双边沿触发中断
+#define EXTI_LOW_LEVEL 0x10  //低电平触发中断
+#define EXTI_HIGH_LEVEL 0x11 //高电平触发中断

 #endif //__SWM320_EXTI_H__
@@ -1,10 +1,10 @@
 /****************************************************************************************************************************************** 
-* 文件名称:	SWM320_flash.c
-* 功能说明:	使用芯片的IAP功能将片上Flash模拟成EEPROM来保存数据，掉电后不丢失
-* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
-* 注意事项:
-* 版本日期: V1.1.0		2017年10月25日
-* 升级记录: 
+* 文件名称:	SWM320_flash.c
+* 功能说明:	使用芯片的IAP功能将片上Flash模拟成EEPROM来保存数据，掉电后不丢失
+* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
+* 注意事项:
+* 版本日期: V1.1.0		2017年10月25日
+* 升级记录: 
 *******************************************************************************************************************************************
 * @attention
 *
@@ -19,63 +19,77 @@
 #include "SWM320.h"
 #include "SWM320_flash.h"

-
 IAP_Cache_Reset_t IAP_Cache_Reset = (IAP_Cache_Reset_t)0x11000601;
 IAP_Flash_Param_t IAP_Flash_Param = (IAP_Flash_Param_t)0x11000681;
 IAP_Flash_Erase_t IAP_Flash_Erase = (IAP_Flash_Erase_t)0x11000781;
 IAP_Flash_Write_t IAP_Flash_Write = (IAP_Flash_Write_t)0x11000801;

-
 /****************************************************************************************************************************************** 
-* 函数名称: FLASH_Erase()
-* 功能说明:	片内Flash擦除
-* 输    入: uint32_t addr			擦除地址，扇区大小为4K Byte
-* 输    出: 无
-* 注意事项: 无
+* 函数名称: FLASH_Erase()
+* 功能说明:	片内Flash擦除
+* 输    入: uint32_t addr			擦除地址，扇区大小为4K Byte
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
 void FLASH_Erase(uint32_t addr)
-{	
-	__disable_irq();
-	
-	IAP_Flash_Erase(addr / 0x1000);
-	
-	IAP_Cache_Reset();
-	
-	__enable_irq();
+{
+    __disable_irq();
+
+    IAP_Flash_Erase(addr / 0x1000);
+
+    IAP_Cache_Reset();
+
+    __enable_irq();
 }

 /****************************************************************************************************************************************** 
-* 函数名称: FLASH_Write()
-* 功能说明:	片内Flash写入
-* 输    入: uint32_t addr			写入地址
-*			uint32_t buff[]			要写入的数据
-*			uint32_t count			要写入数据的个数，以字为单位，且必须是4的整数倍，即最少写入4个字
-* 输    出: 无
-* 注意事项: 写入数据个数必须是4的整数倍，即最少写入4个字
+* 函数名称: FLASH_Write()
+* 功能说明:	片内Flash写入
+* 输    入: uint32_t addr			写入地址
+*			uint32_t buff[]			要写入的数据
+*			uint32_t count			要写入数据的个数，以字为单位，且必须是4的整数倍，即最少写入4个字
+* 输    出: 无
+* 注意事项: 写入数据个数必须是4的整数倍，即最少写入4个字
 ******************************************************************************************************************************************/
 void FLASH_Write(uint32_t addr, uint32_t buff[], uint32_t count)
 {
-	__disable_irq();
-	
-	IAP_Flash_Write(addr, (uint32_t)buff, count/4);
-	
-	IAP_Cache_Reset();
-	
-	__enable_irq();
+    __disable_irq();
+
+    IAP_Flash_Write(addr, (uint32_t)buff, count / 4);
+
+    IAP_Cache_Reset();
+
+    __enable_irq();
 }

 /****************************************************************************************************************************************** 
-* 函数名称: Flash_Param_at_120MHz()
-* 功能说明:	将Flash参数设置成120MHz主频下运行时所需的参数
-* 输    入: 无
-* 输    出: 无
-* 注意事项: 无
+* 函数名称: Flash_Param_at_xMHz()
+* 功能说明:	将Flash参数设置成xMHz主频下运行时所需的参数
+* 输    入: uint32_t x		可取值
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
-void Flash_Param_at_120MHz(void)
+void Flash_Param_at_xMHz(uint32_t x)
 {
-	__disable_irq();
-	
-	IAP_Flash_Param(0x48a, 0xabfc7a6e);
-	
-	__enable_irq();
+    __disable_irq();
+    switch (x)
+    {
+    case 30:
+        IAP_Flash_Param(0x489, 0xabf41f25);
+        break;
+
+    case 40:
+        IAP_Flash_Param(0x489, 0xabf42929);
+        break;
+
+    case 80:
+        IAP_Flash_Param(0x489, 0xabf8524d);
+        break;
+
+    case 120:
+    default:
+        IAP_Flash_Param(0x48a, 0xabfc7a6e);
+        break;
+    }
+    __enable_irq();
 }
@@ -1,13 +1,10 @@
 #ifndef __SWM320_FLASH_H__
 #define __SWM320_FLASH_H__

-
 void FLASH_Erase(uint32_t addr);
 void FLASH_Write(uint32_t addr, uint32_t buff[], uint32_t count);

-void Flash_Param_at_120MHz(void);
-
-
+void Flash_Param_at_xMHz(uint32_t x);

 typedef void (*IAP_Cache_Reset_t)(void);
 typedef void (*IAP_Flash_Param_t)(uint32_t cfg0, uint32_t cfg1);
@@ -19,5 +16,4 @@ extern IAP_Flash_Param_t IAP_Flash_Param;
 extern IAP_Flash_Erase_t IAP_Flash_Erase;
 extern IAP_Flash_Write_t IAP_Flash_Write;

-
 #endif //__SWM320_FLASH_H__
@@ -1,24 +1,22 @@
 #ifndef __SWM320_GPIO_H__
-#define	__SWM320_GPIO_H__
+#define __SWM320_GPIO_H__

+void GPIO_Init(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t dir, uint32_t pull_up, uint32_t pull_down); //引脚初始化，包含引脚方向、上拉电阻、下拉电阻

-void GPIO_Init(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t dir, uint32_t pull_up, uint32_t pull_down);	//引脚初始化，包含引脚方向、上拉电阻、下拉电阻
-
-void GPIO_SetBit(GPIO_TypeDef * GPIOx, uint32_t n);						//将参数指定的引脚电平置高
-void GPIO_ClrBit(GPIO_TypeDef * GPIOx, uint32_t n);						//将参数指定的引脚电平置低
-void GPIO_InvBit(GPIO_TypeDef * GPIOx, uint32_t n);						//将参数指定的引脚电平反转
-uint32_t GPIO_GetBit(GPIO_TypeDef * GPIOx, uint32_t n);					//读取参数指定的引脚的电平状态
-void GPIO_SetBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w);		//将参数指定的从n开始的w位连续引脚的电平置高
-void GPIO_ClrBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w);		//将参数指定的从n开始的w位连续引脚的电平置低
-void GPIO_InvBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w);		//将参数指定的从n开始的w位连续引脚的电平反转
-uint32_t GPIO_GetBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w);	//读取参数指定的从n开始的w位连续引脚的电平状态
-
-void GPIO_AtomicSetBit(GPIO_TypeDef * GPIOx, uint32_t n);
-void GPIO_AtomicClrBit(GPIO_TypeDef * GPIOx, uint32_t n);
-void GPIO_AtomicInvBit(GPIO_TypeDef * GPIOx, uint32_t n);
-void GPIO_AtomicSetBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w);
-void GPIO_AtomicClrBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w);
-void GPIO_AtomicInvBits(GPIO_TypeDef * GPIOx, uint32_t n, uint32_t w);
+void GPIO_SetBit(GPIO_TypeDef *GPIOx, uint32_t n);                  //将参数指定的引脚电平置高
+void GPIO_ClrBit(GPIO_TypeDef *GPIOx, uint32_t n);                  //将参数指定的引脚电平置低
+void GPIO_InvBit(GPIO_TypeDef *GPIOx, uint32_t n);                  //将参数指定的引脚电平反转
+uint32_t GPIO_GetBit(GPIO_TypeDef *GPIOx, uint32_t n);              //读取参数指定的引脚的电平状态
+void GPIO_SetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);     //将参数指定的从n开始的w位连续引脚的电平置高
+void GPIO_ClrBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);     //将参数指定的从n开始的w位连续引脚的电平置低
+void GPIO_InvBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);     //将参数指定的从n开始的w位连续引脚的电平反转
+uint32_t GPIO_GetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //读取参数指定的从n开始的w位连续引脚的电平状态

+void GPIO_AtomicSetBit(GPIO_TypeDef *GPIOx, uint32_t n);
+void GPIO_AtomicClrBit(GPIO_TypeDef *GPIOx, uint32_t n);
+void GPIO_AtomicInvBit(GPIO_TypeDef *GPIOx, uint32_t n);
+void GPIO_AtomicSetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
+void GPIO_AtomicClrBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
+void GPIO_AtomicInvBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);

 #endif //__SWM320_GPIO_H__
@@ -1,10 +1,10 @@
 /****************************************************************************************************************************************** 
-* 文件名称:	SWM320_i2c.c
-* 功能说明:	SWM320单片机的I2C串行接口功能驱动库
-* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
-* 注意事项:
-* 版本日期:	V1.1.0		2017年10月25日
-* 升级记录:  
+* 文件名称:	SWM320_i2c.c
+* 功能说明:	SWM320单片机的I2C串行接口功能驱动库
+* 技术支持:	http://www.synwit.com.cn/e/tool/gbook/?bid=1
+* 注意事项:
+* 版本日期:	V1.1.0		2017年10月25日
+* 升级记录:  
 *
 *
 *******************************************************************************************************************************************
@@ -22,194 +22,198 @@
 #include "SWM320_i2c.h"

 /****************************************************************************************************************************************** 
-* 函数名称:	I2C_Init()
-* 功能说明:	I2C初始化
-* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
-*			I2C_InitStructure * initStruct	包含I2C相关设定值的结构体
-* 输    出: 无
-* 注意事项: 模块只能工作于主机模式
+* 函数名称:	I2C_Init()
+* 功能说明:	I2C初始化
+* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
+*			I2C_InitStructure * initStruct	包含I2C相关设定值的结构体
+* 输    出: 无
+* 注意事项: 模块只能工作于主机模式
 ******************************************************************************************************************************************/
-void I2C_Init(I2C_TypeDef * I2Cx, I2C_InitStructure * initStruct)
+void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitStructure *initStruct)
 {
-	switch((uint32_t)I2Cx)
-	{
-	case ((uint32_t)I2C0):
-		SYS->CLKEN |= (0x01 << SYS_CLKEN_I2C0_Pos);
-		break;
-	
-	case ((uint32_t)I2C1):
-		SYS->CLKEN |= (0x01 << SYS_CLKEN_I2C1_Pos);
-		break;
-	}
-	
-	I2C_Close(I2Cx);	//一些关键寄存器只能在I2C关闭时设置
-	
-	if(initStruct->Master == 1)
-	{		
-		I2Cx->CLKDIV = SystemCoreClock/5/initStruct->MstClk;
-		
-		I2Cx->MSTCMD = (I2Cx->MSTCMD & (~I2C_MSTCMD_IF_Msk)) | (1 << I2C_MSTCMD_IF_Pos);	//使能中断之前先清除中断标志
-		I2Cx->CTRL &= ~I2C_CTRL_MSTIE_Msk;
-		I2Cx->CTRL |= (initStruct->MstIEn << I2C_CTRL_MSTIE_Pos);
-		
-		switch((uint32_t)I2Cx)
-		{
-		case ((uint32_t)I2C0):
-			if(initStruct->MstIEn)
-			{
-				NVIC_EnableIRQ(I2C0_IRQn);
-			}
-			else
-			{
-				NVIC_DisableIRQ(I2C0_IRQn);
-			}
-			break;
-		
-		case ((uint32_t)I2C1):
-			if(initStruct->MstIEn)
-			{
-				NVIC_EnableIRQ(I2C1_IRQn);
-			}
-			else
-			{
-				NVIC_DisableIRQ(I2C1_IRQn);
-			}
-			break;
-		}
-	}
-	else
-	{
-		I2Cx->SLVCR |=  (1 << I2C_SLVCR_SLAVE_Pos);
-		
-		I2Cx->SLVCR &= ~(I2C_SLVCR_ADDR7b_Msk | I2C_SLVCR_ADDR_Msk);
-		I2Cx->SLVCR |= (1 << I2C_SLVCR_ACK_Pos) |
-					   (initStruct->Addr7b << I2C_SLVCR_ADDR7b_Pos) |
-					   (initStruct->SlvAddr << I2C_SLVCR_ADDR_Pos);
-		
-		I2Cx->SLVIF = I2C_SLVIF_RXEND_Msk | I2C_SLVIF_TXEND_Msk | I2C_SLVIF_STADET_Msk | I2C_SLVIF_STODET_Msk;	//清中断标志
-		I2Cx->SLVCR &= ~(I2C_SLVCR_IM_RXEND_Msk | I2C_SLVCR_IM_TXEND_Msk | I2C_SLVCR_IM_STADET_Msk | I2C_SLVCR_IM_STODET_Msk |
-						 I2C_SLVCR_IM_RDREQ_Msk | I2C_SLVCR_IM_WRREQ_Msk);
-		I2Cx->SLVCR |= ((initStruct->SlvRxEndIEn  ? 0 : 1) << I2C_SLVCR_IM_RXEND_Pos)  |
-					   ((initStruct->SlvTxEndIEn  ? 0 : 1) << I2C_SLVCR_IM_TXEND_Pos)  |
-					   ((initStruct->SlvSTADetIEn ? 0 : 1) << I2C_SLVCR_IM_STADET_Pos) |
-					   ((initStruct->SlvSTODetIEn ? 0 : 1) << I2C_SLVCR_IM_STODET_Pos) |
-					   ((initStruct->SlvRdReqIEn  ? 0 : 1) << I2C_SLVCR_IM_RDREQ_Pos)  |
-					   ((initStruct->SlvWrReqIEn  ? 0 : 1) << I2C_SLVCR_IM_WRREQ_Pos);
-	
-		switch((uint32_t)I2Cx)
-		{
-		case ((uint32_t)I2C0):
-			if(initStruct->SlvRxEndIEn | initStruct->SlvTxEndIEn | initStruct->SlvSTADetIEn |
-			   initStruct->SlvSTODetIEn | initStruct->SlvRdReqIEn | initStruct->SlvWrReqIEn)
-			{
-				NVIC_EnableIRQ(I2C0_IRQn);
-			}
-			else
-			{
-				NVIC_DisableIRQ(I2C0_IRQn);
-			}
-			break;
-		
-		case ((uint32_t)I2C1):
-			if(initStruct->SlvRxEndIEn | initStruct->SlvTxEndIEn | initStruct->SlvSTADetIEn |
-			   initStruct->SlvSTODetIEn | initStruct->SlvRdReqIEn | initStruct->SlvWrReqIEn)
-			{
-				NVIC_EnableIRQ(I2C1_IRQn);
-			}
-			else
-			{
-				NVIC_DisableIRQ(I2C1_IRQn);
-			}
-			break;
-		}
-	}
+    switch ((uint32_t)I2Cx)
+    {
+    case ((uint32_t)I2C0):
+        SYS->CLKEN |= (0x01 << SYS_CLKEN_I2C0_Pos);
+        break;
+
+    case ((uint32_t)I2C1):
+        SYS->CLKEN |= (0x01 << SYS_CLKEN_I2C1_Pos);
+        break;
+    }
+
+    I2C_Close(I2Cx); //一些关键寄存器只能在I2C关闭时设置
+
+    if (initStruct->Master == 1)
+    {
+        I2Cx->CLKDIV = SystemCoreClock / 5 / initStruct->MstClk;
+
+        I2Cx->MSTCMD = (I2Cx->MSTCMD & (~I2C_MSTCMD_IF_Msk)) | (1 << I2C_MSTCMD_IF_Pos); //使能中断之前先清除中断标志
+        I2Cx->CTRL &= ~I2C_CTRL_MSTIE_Msk;
+        I2Cx->CTRL |= (initStruct->MstIEn << I2C_CTRL_MSTIE_Pos);
+
+        switch ((uint32_t)I2Cx)
+        {
+        case ((uint32_t)I2C0):
+            if (initStruct->MstIEn)
+            {
+                NVIC_EnableIRQ(I2C0_IRQn);
+            }
+            else
+            {
+                NVIC_DisableIRQ(I2C0_IRQn);
+            }
+            break;
+
+        case ((uint32_t)I2C1):
+            if (initStruct->MstIEn)
+            {
+                NVIC_EnableIRQ(I2C1_IRQn);
+            }
+            else
+            {
+                NVIC_DisableIRQ(I2C1_IRQn);
+            }
+            break;
+        }
+    }
+    else
+    {
+        I2Cx->SLVCR |= (1 << I2C_SLVCR_SLAVE_Pos);
+
+        I2Cx->SLVCR &= ~(I2C_SLVCR_ADDR7b_Msk | I2C_SLVCR_ADDR_Msk);
+        I2Cx->SLVCR |= (1 << I2C_SLVCR_ACK_Pos) |
+                       (initStruct->Addr7b << I2C_SLVCR_ADDR7b_Pos) |
+                       (initStruct->SlvAddr << I2C_SLVCR_ADDR_Pos);
+
+        I2Cx->SLVIF = I2C_SLVIF_RXEND_Msk | I2C_SLVIF_TXEND_Msk | I2C_SLVIF_STADET_Msk | I2C_SLVIF_STODET_Msk; //清中断标志
+        I2Cx->SLVCR &= ~(I2C_SLVCR_IM_RXEND_Msk | I2C_SLVCR_IM_TXEND_Msk | I2C_SLVCR_IM_STADET_Msk | I2C_SLVCR_IM_STODET_Msk |
+                         I2C_SLVCR_IM_RDREQ_Msk | I2C_SLVCR_IM_WRREQ_Msk);
+        I2Cx->SLVCR |= ((initStruct->SlvRxEndIEn ? 0 : 1) << I2C_SLVCR_IM_RXEND_Pos) |
+                       ((initStruct->SlvTxEndIEn ? 0 : 1) << I2C_SLVCR_IM_TXEND_Pos) |
+                       ((initStruct->SlvSTADetIEn ? 0 : 1) << I2C_SLVCR_IM_STADET_Pos) |
+                       ((initStruct->SlvSTODetIEn ? 0 : 1) << I2C_SLVCR_IM_STODET_Pos) |
+                       ((initStruct->SlvRdReqIEn ? 0 : 1) << I2C_SLVCR_IM_RDREQ_Pos) |
+                       ((initStruct->SlvWrReqIEn ? 0 : 1) << I2C_SLVCR_IM_WRREQ_Pos);
+
+        switch ((uint32_t)I2Cx)
+        {
+        case ((uint32_t)I2C0):
+            if (initStruct->SlvRxEndIEn | initStruct->SlvTxEndIEn | initStruct->SlvSTADetIEn |
+                initStruct->SlvSTODetIEn | initStruct->SlvRdReqIEn | initStruct->SlvWrReqIEn)
+            {
+                NVIC_EnableIRQ(I2C0_IRQn);
+            }
+            else
+            {
+                NVIC_DisableIRQ(I2C0_IRQn);
+            }
+            break;
+
+        case ((uint32_t)I2C1):
+            if (initStruct->SlvRxEndIEn | initStruct->SlvTxEndIEn | initStruct->SlvSTADetIEn |
+                initStruct->SlvSTODetIEn | initStruct->SlvRdReqIEn | initStruct->SlvWrReqIEn)
+            {
+                NVIC_EnableIRQ(I2C1_IRQn);
+            }
+            else
+            {
+                NVIC_DisableIRQ(I2C1_IRQn);
+            }
+            break;
+        }
+    }
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	I2C_Open()
-* 功能说明:	I2C打开，允许收发
-* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
-* 输    出: 无
-* 注意事项: 无
+* 函数名称:	I2C_Open()
+* 功能说明:	I2C打开，允许收发
+* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
-void I2C_Open(I2C_TypeDef * I2Cx)
+void I2C_Open(I2C_TypeDef *I2Cx)
 {
-	I2Cx->CTRL |= (0x01 << I2C_CTRL_EN_Pos);
+    I2Cx->CTRL |= (0x01 << I2C_CTRL_EN_Pos);
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	I2C_Close()
-* 功能说明:	I2C关闭，禁止收发
-* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
-* 输    出: 无
-* 注意事项: 无
+* 函数名称:	I2C_Close()
+* 功能说明:	I2C关闭，禁止收发
+* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
-void I2C_Close(I2C_TypeDef * I2Cx)
+void I2C_Close(I2C_TypeDef *I2Cx)
 {
-	I2Cx->CTRL &= ~I2C_CTRL_EN_Msk;
+    I2Cx->CTRL &= ~I2C_CTRL_EN_Msk;
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	I2C_Start()
-* 功能说明:	产生起始信号并发送设备地址
-* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
-*			uint8_t addr			设备地址
-* 输    出: uint8_t					1 接收到ACK   0 接收到NACK
-* 注意事项: 无
+* 函数名称:	I2C_Start()
+* 功能说明:	产生起始信号并发送设备地址
+* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
+*			uint8_t addr			设备地址
+* 输    出: uint8_t					1 接收到ACK   0 接收到NACK
+* 注意事项: 无
 ******************************************************************************************************************************************/
-uint8_t I2C_Start(I2C_TypeDef * I2Cx, uint8_t addr)
+uint8_t I2C_Start(I2C_TypeDef *I2Cx, uint8_t addr)
 {
-	I2Cx->MSTDAT = addr;
-	I2Cx->MSTCMD = (1 << I2C_MSTCMD_STA_Pos) |		
-				   (1 << I2C_MSTCMD_WR_Pos);				//发送起始位和从机地址
-	while(I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk) __NOP();		//等待发送完成
-	
-	return (I2Cx->MSTCMD & I2C_MSTCMD_RXACK_Msk) ? 0 : 1;
+    I2Cx->MSTDAT = addr;
+    I2Cx->MSTCMD = (1 << I2C_MSTCMD_STA_Pos) |
+                   (1 << I2C_MSTCMD_WR_Pos); //发送起始位和从机地址
+    while (I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk)
+        __NOP(); //等待发送完成
+
+    return (I2Cx->MSTCMD & I2C_MSTCMD_RXACK_Msk) ? 0 : 1;
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	I2C_Stop()
-* 功能说明:	产生停止信号
-* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
-* 输    出: 无
-* 注意事项: 无
+* 函数名称:	I2C_Stop()
+* 功能说明:	产生停止信号
+* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
+* 输    出: 无
+* 注意事项: 无
 ******************************************************************************************************************************************/
-void I2C_Stop(I2C_TypeDef * I2Cx)
+void I2C_Stop(I2C_TypeDef *I2Cx)
 {
-	I2Cx->MSTCMD = (1 << I2C_MSTCMD_STO_Pos);
-	while(I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk) __NOP();		//等待发送完成
+    I2Cx->MSTCMD = (1 << I2C_MSTCMD_STO_Pos);
+    while (I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk)
+        __NOP(); //等待发送完成
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	I2C_Write()
-* 功能说明:	写入一个数据
-* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
-*			uint8_t data			要写的数据
-* 输    出: uint8_t					1 接收到ACK   0 接收到NACK
-* 注意事项: 无
+* 函数名称:	I2C_Write()
+* 功能说明:	写入一个数据
+* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
+*			uint8_t data			要写的数据
+* 输    出: uint8_t					1 接收到ACK   0 接收到NACK
+* 注意事项: 无
 ******************************************************************************************************************************************/
-uint8_t I2C_Write(I2C_TypeDef * I2Cx, uint8_t data)
-{	
-	I2Cx->MSTDAT = data;
-	I2Cx->MSTCMD = (1 << I2C_MSTCMD_WR_Pos);
-	while(I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk) __NOP();		//等待发送完成
-	
-	return (I2Cx->MSTCMD & I2C_MSTCMD_RXACK_Msk) ? 0 : 1;
+uint8_t I2C_Write(I2C_TypeDef *I2Cx, uint8_t data)
+{
+    I2Cx->MSTDAT = data;
+    I2Cx->MSTCMD = (1 << I2C_MSTCMD_WR_Pos);
+    while (I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk)
+        __NOP(); //等待发送完成
+
+    return (I2Cx->MSTCMD & I2C_MSTCMD_RXACK_Msk) ? 0 : 1;
 }

 /****************************************************************************************************************************************** 
-* 函数名称:	I2C_Read()
-* 功能说明:	读取一个数据
-* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
-*			uint8_t ack				1 发送ACK   0 发送NACK
-* 输    出: uint8_t					读取到的数据
-* 注意事项: 无
+* 函数名称:	I2C_Read()
+* 功能说明:	读取一个数据
+* 输    入: I2C_TypeDef * I2Cx		指定要被设置的I2C，有效值包括I2C0、I2C1
+*			uint8_t ack				1 发送ACK   0 发送NACK
+* 输    出: uint8_t					读取到的数据
+* 注意事项: 无
 ******************************************************************************************************************************************/
-uint8_t I2C_Read(I2C_TypeDef * I2Cx, uint8_t ack)
+uint8_t I2C_Read(I2C_TypeDef *I2Cx, uint8_t ack)
 {
-	I2Cx->MSTCMD = (1 << I2C_MSTCMD_RD_Pos) |
-				   ((ack ? 0 : 1) << I2C_MSTCMD_ACK_Pos);
-	while(I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk) __NOP();		//等待接收完成
-    
+    I2Cx->MSTCMD = (1 << I2C_MSTCMD_RD_Pos) |
+                   ((ack ? 0 : 1) << I2C_MSTCMD_ACK_Pos);
+    while (I2Cx->MSTCMD & I2C_MSTCMD_TIP_Msk)
+        __NOP(); //等待接收完成
+
    return I2Cx->MSTDAT;
 }
@@ -1,31 +1,31 @@
 #ifndef __SWM320_I2C_H__
 #define __SWM320_I2C_H__

-typedef struct {
-	uint8_t  Master;		//1 主机模式
-	uint8_t  Addr7b;		//1 7位地址     0 10位地址
-	
-	uint32_t MstClk;		//主机传输时钟频率
-	uint8_t  MstIEn;		//主机模式中断使能
-	
-	uint16_t SlvAddr;		//从机地址
-	uint8_t  SlvRxEndIEn;	//从机接收完成中断使能
-	uint8_t  SlvTxEndIEn;	//从机发送完成中断使能
-	uint8_t  SlvSTADetIEn;	//从机检测到起始中断使能
-	uint8_t  SlvSTODetIEn;	//从机检测到终止中断使能
-	uint8_t  SlvRdReqIEn;	//从机接收到读请求中断使能
-	uint8_t  SlvWrReqIEn;	//从机接收到写请求中断使能
+typedef struct
+{
+    uint8_t Master; //1 主机模式
+    uint8_t Addr7b; //1 7位地址     0 10位地址
+
+    uint32_t MstClk; //主机传输时钟频率
+    uint8_t MstIEn;  //主机模式中断使能
+
+    uint16_t SlvAddr;     //从机地址
+    uint8_t SlvRxEndIEn;  //从机接收完成中断使能
+    uint8_t SlvTxEndIEn;  //从机发送完成中断使能
+    uint8_t SlvSTADetIEn; //从机检测到起始中断使能
+    uint8_t SlvSTODetIEn; //从机检测到终止中断使能
+    uint8_t SlvRdReqIEn;  //从机接收到读请求中断使能
+    uint8_t SlvWrReqIEn;  //从机接收到写请求中断使能
 } I2C_InitStructure;

+void I2C_Init(I2C_TypeDef *I2Cx, I2C_InitStructure *initStruct);

-void I2C_Init(I2C_TypeDef * I2Cx, I2C_InitStructure * initStruct);
+void I2C_Open(I2C_TypeDef *I2Cx);
+void I2C_Close(I2C_TypeDef *I2Cx);

-void I2C_Open(I2C_TypeDef * I2Cx);
-void I2C_Close(I2C_TypeDef * I2Cx);
-
-uint8_t I2C_Start(I2C_TypeDef * I2Cx, uint8_t addr);
-void I2C_Stop(I2C_TypeDef * I2Cx);
-uint8_t I2C_Write(I2C_TypeDef * I2Cx, uint8_t data);
-uint8_t I2C_Read(I2C_TypeDef * I2Cx, uint8_t ack);
+uint8_t I2C_Start(I2C_TypeDef *I2Cx, uint8_t addr);
+void I2C_Stop(I2C_TypeDef *I2Cx);
+uint8_t I2C_Write(I2C_TypeDef *I2Cx, uint8_t data);
+uint8_t I2C_Read(I2C_TypeDef *I2Cx, uint8_t ack);

 #endif //__SWM320_I2C_H__
--- a/Show More
+++ b/Show More