mirror of
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[libcpu][renesas]add cortex-m85 && ek-ra8m1 adapt
This commit is contained in:
Rbb666
guo
1
.github/workflows/action.yml
vendored
1
.github/workflows/action.yml
vendored
@@ -197,6 +197,7 @@ jobs:
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- "renesas/ra6m3-hmi-board"
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- "renesas/ra4m2-eco"
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- "renesas/ra2l1-cpk"
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- "renesas/ra8m1-ek"
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- RTT_BSP: "gd32_n32_apm32"
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RTT_TOOL_CHAIN: "sourcery-arm"
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SUB_RTT_BSP:
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@@ -15,6 +15,8 @@ RA 系列 BSP 目前支持情况如下表所示：
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| [ra4m2-eco](ra4m2-eco) | Renesas 官方 RA-Eco-RA4M2 开发板 |
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| **RA2 系列** | |
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| [ra2l1-cpk](ra2l1-cpk) | Renesas 官方 CPK-RA2L1 开发板 |
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| **RA8 系列** | |
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| [ra8m1-ek](ra8m1-ek) | Renesas 官方 EK-RA8M1 开发板 |
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可以通过阅读相应 BSP 下的 README 来快速上手，如果想要使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档，如下表所示：
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@@ -124,6 +124,11 @@ extern "C"
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#endif
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#endif /* SOC_SERIES_R7FA4M2 */
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#ifdef SOC_SERIES_R7FA8M85
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#include "ra8/uart_config.h"
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#endif /* SOC_SERIES_R7FA8M85 */
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#ifdef __cplusplus
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}
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#endif
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136
bsp/renesas/libraries/HAL_Drivers/config/ra8/uart_config.h
Normal file
136
bsp/renesas/libraries/HAL_Drivers/config/ra8/uart_config.h
Normal file
@@ -0,0 +1,136 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-07-29 KyleChan first version
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*/
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#ifndef __UART_CONFIG_H__
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#define __UART_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_UART0)
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#ifndef UART0_CONFIG
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#define UART0_CONFIG \
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{ \
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.name = "uart0", \
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.p_api_ctrl = &g_uart0_ctrl, \
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.p_cfg = &g_uart0_cfg, \
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}
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#endif /* UART0_CONFIG */
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#endif /* BSP_USING_UART0 */
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#if defined(BSP_USING_UART1)
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#ifndef UART1_CONFIG
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#define UART1_CONFIG \
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{ \
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.name = "uart1", \
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.p_api_ctrl = &g_uart1_ctrl, \
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.p_cfg = &g_uart1_cfg, \
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}
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#endif /* UART1_CONFIG */
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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#ifndef UART2_CONFIG
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#define UART2_CONFIG \
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{ \
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.name = "uart2", \
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.p_api_ctrl = &g_uart2_ctrl, \
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.p_cfg = &g_uart2_cfg, \
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}
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#endif /* UART2_CONFIG */
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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#ifndef UART3_CONFIG
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#define UART3_CONFIG \
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{ \
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.name = "uart3", \
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.p_api_ctrl = &g_uart3_ctrl, \
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.p_cfg = &g_uart3_cfg, \
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}
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#endif /* UART3_CONFIG */
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#endif /* BSP_USING_UART3 */
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#if defined(BSP_USING_UART4)
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#ifndef UART4_CONFIG
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#define UART4_CONFIG \
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{ \
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.name = "uart4", \
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.p_api_ctrl = &g_uart4_ctrl, \
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.p_cfg = &g_uart4_cfg, \
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}
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#endif /* UART4_CONFIG */
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#endif /* BSP_USING_UART4 */
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#if defined(BSP_USING_UART5)
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#ifndef UART5_CONFIG
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#define UART5_CONFIG \
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{ \
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.name = "uart5", \
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.p_api_ctrl = &g_uart5_ctrl, \
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.p_cfg = &g_uart5_cfg, \
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}
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#endif /* UART5_CONFIG */
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#endif /* BSP_USING_UART5 */
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#if defined(BSP_USING_UART6)
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#ifndef UART6_CONFIG
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#define UART6_CONFIG \
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{ \
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.name = "uart6", \
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.p_api_ctrl = &g_uart6_ctrl, \
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.p_cfg = &g_uart6_cfg, \
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}
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#endif /* UART6_CONFIG */
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#endif /* BSP_USING_UART6 */
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#if defined(BSP_USING_UART7)
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#ifndef UART7_CONFIG
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#define UART7_CONFIG \
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{ \
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.name = "uart7", \
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.p_api_ctrl = &g_uart7_ctrl, \
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.p_cfg = &g_uart7_cfg, \
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}
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#endif /* UART7_CONFIG */
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#endif /* BSP_USING_UART7 */
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#if defined(BSP_USING_UART8)
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#ifndef UART8_CONFIG
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#define UART8_CONFIG \
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{ \
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.name = "uart8", \
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.p_api_ctrl = &g_uart8_ctrl, \
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.p_cfg = &g_uart8_cfg, \
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}
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#endif /* UART8_CONFIG */
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#endif /* BSP_USING_UART8 */
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#if defined(BSP_USING_UART9)
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#ifndef UART9_CONFIG
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#define UART9_CONFIG \
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{ \
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.name = "uart9", \
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.p_api_ctrl = &g_uart9_ctrl, \
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.p_cfg = &g_uart9_cfg, \
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}
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#endif /* UART9_CONFIG */
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#endif /* BSP_USING_UART9 */
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -111,7 +111,6 @@ void rt_hw_us_delay(rt_uint32_t us)
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*/
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rt_weak void rt_hw_board_init()
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{
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rt_hw_systick_init();
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/* Heap initialization */
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@@ -65,39 +65,50 @@ struct ra_sci_param
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const void *ops;
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};
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rt_weak const struct rt_i2c_bus_device_ops sci_ops_i2c;
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rt_weak const struct rt_spi_ops sci_ops_spi;
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rt_weak const struct rt_uart_ops sci_ops_uart;
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#ifdef RT_USING_I2C
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rt_weak const struct rt_i2c_bus_device_ops sci_ops_i2c;
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#endif
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#ifdef RT_USING_SPI
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rt_weak const struct rt_spi_ops sci_ops_spi;
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#endif
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#ifdef RT_USING_UART
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rt_weak const struct rt_uart_ops sci_ops_uart;
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#endif
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struct ra_sci_object
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{
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union
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{
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#ifdef RT_USING_SPI
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struct
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{
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struct rt_spi_bus sbus;
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struct rt_spi_configuration *spi_cfg;
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};
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#endif
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#ifdef RT_USING_I2C
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struct
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{
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struct rt_i2c_bus_device ibus;
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};
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#endif
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#ifdef RT_USING_UART
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struct
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{
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struct rt_serial_device ubus;
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};
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#endif
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};
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const struct ra_sci_param *param;
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struct rt_event event;
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};
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#ifndef BIT
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#define BIT(idx) (1ul << (idx))
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#define BIT(idx) (1ul << (idx))
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#endif
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#ifndef BITS
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#define BITS(b,e) ((((uint32_t)-1)<<(b))&(((uint32_t)-1)>>(31-(e))))
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#define BITS(b,e) ((((uint32_t)-1)<<(b))&(((uint32_t)-1)>>(31-(e))))
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#endif
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#define _TO_STR(_a) #_a
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@@ -218,11 +229,11 @@ static struct ra_sci_object sci_obj[RA_SCI_INDEX_MAX] = {0};
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rt_used static rt_err_t ra_wait_complete(struct ra_sci_object *obj)
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{
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rt_uint32_t event = 0;
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if(RT_EOK != rt_event_recv(&obj->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR|RT_EVENT_FLAG_CLEAR, (rt_int32_t)rt_tick_from_millisecond(400), &event))
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if (RT_EOK != rt_event_recv(&obj->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, (rt_int32_t)rt_tick_from_millisecond(400), &event))
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{
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return -RT_ETIMEOUT;
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}
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if((event & (RA_SCI_EVENT_ABORTED|RA_SCI_EVENT_ERROR)) == 0)
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if ((event & (RA_SCI_EVENT_ABORTED | RA_SCI_EVENT_ERROR)) == 0)
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{
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return RT_EOK;
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}
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@@ -238,42 +249,42 @@ rt_used static rt_err_t ra_wait_complete(struct ra_sci_object *obj)
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const static int uart_buff_size[][2] =
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{
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#ifdef BSP_USING_SCI0_UART
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{BSP_SCI0_UART_RX_BUFSIZE,BSP_SCI0_UART_TX_BUFSIZE},
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{BSP_SCI0_UART_RX_BUFSIZE, BSP_SCI0_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI1_UART
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{BSP_SCI1_UART_RX_BUFSIZE,BSP_SCI1_UART_TX_BUFSIZE},
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{BSP_SCI1_UART_RX_BUFSIZE, BSP_SCI1_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI2_UART
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{BSP_SCI2_UART_RX_BUFSIZE,BSP_SCI2_UART_TX_BUFSIZE},
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{BSP_SCI2_UART_RX_BUFSIZE, BSP_SCI2_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI3_UART
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{BSP_SCI3_UART_RX_BUFSIZE,BSP_SCI3_UART_TX_BUFSIZE},
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{BSP_SCI3_UART_RX_BUFSIZE, BSP_SCI3_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI4_UART
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{BSP_SCI4_UART_RX_BUFSIZE,BSP_SCI4_UART_TX_BUFSIZE},
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{BSP_SCI4_UART_RX_BUFSIZE, BSP_SCI4_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI5_UART
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{BSP_SCI5_UART_RX_BUFSIZE,BSP_SCI5_UART_TX_BUFSIZE},
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{BSP_SCI5_UART_RX_BUFSIZE, BSP_SCI5_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI6_UART
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{BSP_SCI6_UART_RX_BUFSIZE,BSP_SCI6_UART_TX_BUFSIZE},
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{BSP_SCI6_UART_RX_BUFSIZE, BSP_SCI6_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI7_UART
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{BSP_SCI7_UART_RX_BUFSIZE,BSP_SCI7_UART_TX_BUFSIZE},
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{BSP_SCI7_UART_RX_BUFSIZE, BSP_SCI7_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI8_UART
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{BSP_SCI8_UART_RX_BUFSIZE,BSP_SCI8_UART_TX_BUFSIZE},
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{BSP_SCI8_UART_RX_BUFSIZE, BSP_SCI8_UART_TX_BUFSIZE},
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#endif
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#ifdef BSP_USING_SCI9_UART
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{BSP_SCI9_UART_RX_BUFSIZE,BSP_SCI9_UART_TX_BUFSIZE},
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{BSP_SCI9_UART_RX_BUFSIZE, BSP_SCI9_UART_TX_BUFSIZE},
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#endif
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{0,0},
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{0, 0},
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};
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void sci_uart_irq_callback(uart_callback_args_t *p_args)
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{
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rt_interrupt_enter();
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if(NULL != p_args)
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if (NULL != p_args)
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{
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struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
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RT_ASSERT(obj != RT_NULL);
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@@ -306,13 +317,13 @@ static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial
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param = obj->param;
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RT_ASSERT(param != RT_NULL);
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err = R_SCI_UART_Open((uart_ctrl_t * const)param->sci_ctrl, (uart_cfg_t * const)param->sci_cfg);
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err = R_SCI_UART_Open((uart_ctrl_t *const)param->sci_ctrl, (uart_cfg_t *const)param->sci_cfg);
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if (FSP_SUCCESS != err)
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{
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return -RT_ERROR;
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}
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err = R_SCI_UART_CallbackSet((uart_ctrl_t * const)param->sci_ctrl, sci_uart_irq_callback, obj, NULL);
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err = R_SCI_UART_CallbackSet((uart_ctrl_t *const)param->sci_ctrl, sci_uart_irq_callback, obj, NULL);
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if (FSP_SUCCESS != err)
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{
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//LOG_W("R_SCI_UART_CallbackSet API failed,%d", err);
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@@ -350,9 +361,9 @@ static int ra_uart_getc(struct rt_serial_device *serial)
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}
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static rt_ssize_t ra_uart_transmit(struct rt_serial_device *serial,
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rt_uint8_t *buf,
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rt_size_t size,
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rt_uint32_t tx_flag)
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rt_uint8_t *buf,
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rt_size_t size,
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rt_uint32_t tx_flag)
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{
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(buf != RT_NULL);
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@@ -392,15 +403,15 @@ void sci_i2c_irq_callback(i2c_master_callback_args_t *p_args)
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struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
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uint32_t event = 0;
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RT_ASSERT(obj != RT_NULL);
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switch(p_args->event)
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switch (p_args->event)
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{
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case I2C_MASTER_EVENT_ABORTED:
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case I2C_MASTER_EVENT_ABORTED:
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event |= RA_SCI_EVENT_ABORTED;
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break;
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case I2C_MASTER_EVENT_RX_COMPLETE:
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case I2C_MASTER_EVENT_RX_COMPLETE:
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event |= RA_SCI_EVENT_RX_COMPLETE;
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break;
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case I2C_MASTER_EVENT_TX_COMPLETE:
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case I2C_MASTER_EVENT_TX_COMPLETE:
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event |= RA_SCI_EVENT_TX_COMPLETE;
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break;
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}
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@@ -412,8 +423,8 @@ void sci_i2c_irq_callback(i2c_master_callback_args_t *p_args)
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}
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static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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rt_size_t i;
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RT_ASSERT(bus != RT_NULL);
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@@ -438,27 +449,43 @@ static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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{
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//LOG_E("10Bit not support");
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//break;
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#ifdef SOC_SERIES_R7FA8M85
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R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
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#else
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R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
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#endif
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}
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else
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{
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//master_ctrl->slave = msg->addr;
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#ifdef SOC_SERIES_R7FA8M85
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R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
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#else
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R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
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#endif
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}
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if (msg->flags & RT_I2C_RD)
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{
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#ifdef SOC_SERIES_R7FA8M85
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err = R_SCI_B_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
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#else
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err = R_SCI_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
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#endif
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}
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else
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{
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#ifdef SOC_SERIES_R7FA8M85
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err = R_SCI_B_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
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#else
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err = R_SCI_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
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#endif
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}
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if (FSP_SUCCESS == err)
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{
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/* handle error */
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err = ra_wait_complete(obj);
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if(RT_EOK != err)
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||||
if (RT_EOK != err)
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||||
{
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||||
//LOG_E("POWER_CTL reg I2C write failed,%d,%d", err, i);
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break;
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@@ -481,10 +508,6 @@ const struct rt_i2c_bus_device_ops sci_ops_i2c =
|
||||
.slave_xfer = RT_NULL,
|
||||
.i2c_bus_control = RT_NULL
|
||||
};
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#else
|
||||
void sci_i2c_irq_callback(i2c_master_callback_args_t *p_args)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
@@ -504,20 +527,20 @@ void sci_spi_irq_callback(spi_callback_args_t *p_args)
|
||||
/* capture callback event for validating the i2c transfer event*/
|
||||
struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
|
||||
uint32_t event = 0;
|
||||
switch(p_args->event)
|
||||
switch (p_args->event)
|
||||
{
|
||||
case SPI_EVENT_ERR_MODE_FAULT :
|
||||
case SPI_EVENT_ERR_READ_OVERFLOW:
|
||||
case SPI_EVENT_ERR_PARITY :
|
||||
case SPI_EVENT_ERR_OVERRUN :
|
||||
case SPI_EVENT_ERR_FRAMING :
|
||||
case SPI_EVENT_ERR_MODE_UNDERRUN:
|
||||
case SPI_EVENT_ERR_MODE_FAULT :
|
||||
case SPI_EVENT_ERR_READ_OVERFLOW:
|
||||
case SPI_EVENT_ERR_PARITY :
|
||||
case SPI_EVENT_ERR_OVERRUN :
|
||||
case SPI_EVENT_ERR_FRAMING :
|
||||
case SPI_EVENT_ERR_MODE_UNDERRUN:
|
||||
event |= RA_SCI_EVENT_ERROR;
|
||||
break;
|
||||
case SPI_EVENT_TRANSFER_ABORTED :
|
||||
case SPI_EVENT_TRANSFER_ABORTED :
|
||||
event |= RA_SCI_EVENT_ABORTED;
|
||||
break;
|
||||
case SPI_EVENT_TRANSFER_COMPLETE:
|
||||
case SPI_EVENT_TRANSFER_COMPLETE:
|
||||
event |= RA_SCI_EVENT_TX_COMPLETE;
|
||||
break;
|
||||
}
|
||||
@@ -531,11 +554,11 @@ void sci_spi_irq_callback(spi_callback_args_t *p_args)
|
||||
static spi_bit_width_t ra_width_shift(rt_uint8_t data_width)
|
||||
{
|
||||
spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS;
|
||||
if(data_width == 1)
|
||||
if (data_width == 1)
|
||||
bit_width = SPI_BIT_WIDTH_8_BITS;
|
||||
else if(data_width == 2)
|
||||
else if (data_width == 2)
|
||||
bit_width = SPI_BIT_WIDTH_16_BITS;
|
||||
else if(data_width == 4)
|
||||
else if (data_width == 4)
|
||||
bit_width = SPI_BIT_WIDTH_32_BITS;
|
||||
|
||||
return bit_width;
|
||||
@@ -636,7 +659,8 @@ static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
|
||||
/**< init */
|
||||
err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
|
||||
/* handle error */
|
||||
if(err == FSP_ERR_IN_USE) {
|
||||
if (err == FSP_ERR_IN_USE)
|
||||
{
|
||||
R_SCI_SPI_Close((spi_ctrl_t *)param->sci_ctrl);
|
||||
err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
|
||||
}
|
||||
@@ -703,10 +727,6 @@ const struct rt_spi_ops sci_ops_spi =
|
||||
.configure = ra_hw_spi_configure,
|
||||
.xfer = ra_spixfer,
|
||||
};
|
||||
#else
|
||||
void sci_spi_irq_callback(spi_callback_args_t *p_args)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
/**
|
||||
* @}
|
||||
@@ -714,15 +734,14 @@ void sci_spi_irq_callback(spi_callback_args_t *p_args)
|
||||
|
||||
static int ra_hw_sci_init(void)
|
||||
{
|
||||
int bufsz_idx = 0;
|
||||
for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
|
||||
{
|
||||
struct ra_sci_object *obj = &sci_obj[idx];
|
||||
const struct ra_sci_param *param = &sci_param[idx];
|
||||
obj->param = param;
|
||||
rt_err_t err;
|
||||
#ifdef BSP_USING_SCIn_SPI
|
||||
if((uint32_t)param->ops == (uint32_t)&sci_ops_spi)
|
||||
#ifdef BSP_USING_SCIn_SPI
|
||||
if ((uint32_t)param->ops == (uint32_t)&sci_ops_spi)
|
||||
{
|
||||
/**< register spi bus */
|
||||
err = rt_spi_bus_register(&obj->sbus, param->bus_name, param->ops);
|
||||
@@ -733,56 +752,64 @@ static int ra_hw_sci_init(void)
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifdef BSP_USING_SCIn_I2C
|
||||
if((uint32_t)param->ops == (uint32_t)&sci_ops_i2c)
|
||||
{
|
||||
obj->ibus.ops = param->ops;
|
||||
obj->ibus.priv = 0;
|
||||
/* opening IIC master module */
|
||||
err = R_SCI_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
|
||||
if(err != FSP_SUCCESS)
|
||||
#endif
|
||||
#ifdef BSP_USING_SCIn_I2C
|
||||
if ((uint32_t)param->ops == (uint32_t)&sci_ops_i2c)
|
||||
{
|
||||
LOG_E("R_IIC_MASTER_Open API failed,%d", err);
|
||||
continue;
|
||||
}
|
||||
err = R_SCI_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
|
||||
/* handle error */
|
||||
if (FSP_SUCCESS != err)
|
||||
{
|
||||
LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
|
||||
continue;
|
||||
}
|
||||
obj->ibus.ops = param->ops;
|
||||
obj->ibus.priv = 0;
|
||||
/* opening IIC master module */
|
||||
#ifdef SOC_SERIES_R7FA8M85
|
||||
err = R_SCI_B_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
|
||||
#else
|
||||
err = R_SCI_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
|
||||
#endif
|
||||
if (err != FSP_SUCCESS)
|
||||
{
|
||||
LOG_E("R_IIC_MASTER_Open API failed,%d", err);
|
||||
continue;
|
||||
}
|
||||
#ifdef SOC_SERIES_R7FA8M85
|
||||
err = R_SCI_B_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
|
||||
#else
|
||||
err = R_SCI_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
|
||||
#endif
|
||||
/* handle error */
|
||||
if (FSP_SUCCESS != err)
|
||||
{
|
||||
LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
|
||||
continue;
|
||||
}
|
||||
|
||||
err = rt_i2c_bus_device_register(&obj->ibus, param->bus_name);
|
||||
if (RT_EOK != err)
|
||||
{
|
||||
LOG_E("i2c bus %s register failed,%d", param->bus_name, err);
|
||||
continue;
|
||||
err = rt_i2c_bus_device_register(&obj->ibus, param->bus_name);
|
||||
if (RT_EOK != err)
|
||||
{
|
||||
LOG_E("i2c bus %s register failed,%d", param->bus_name, err);
|
||||
continue;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
#endif
|
||||
#ifdef BSP_USING_SCIn_UART
|
||||
if((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
|
||||
{
|
||||
if(rt_device_find(param->bus_name) != RT_NULL)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
struct rt_serial_device *serial = &obj->ubus;
|
||||
obj->ubus.ops = param->ops;
|
||||
serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
|
||||
serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
|
||||
bufsz_idx ++;
|
||||
err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
|
||||
if (RT_EOK != err)
|
||||
{
|
||||
LOG_E("uart %s register failed,%d", param->bus_name, err);
|
||||
continue;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
else
|
||||
#endif
|
||||
#ifdef BSP_USING_SCIn_UART
|
||||
if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
|
||||
{
|
||||
if (rt_device_find(param->bus_name) != RT_NULL)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
struct rt_serial_device *serial = &obj->ubus;
|
||||
obj->ubus.ops = param->ops;
|
||||
serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
|
||||
serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
|
||||
bufsz_idx ++;
|
||||
err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
|
||||
if (RT_EOK != err)
|
||||
{
|
||||
LOG_E("uart %s register failed,%d", param->bus_name, err);
|
||||
continue;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
{
|
||||
}
|
||||
if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
|
||||
@@ -806,9 +833,9 @@ rt_weak int rt_hw_usart_init(void)
|
||||
const struct ra_sci_param *param = &sci_param[idx];
|
||||
obj->param = param;
|
||||
rt_err_t err;
|
||||
if((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
|
||||
if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
|
||||
{
|
||||
if(rt_device_find(param->bus_name) != RT_NULL)
|
||||
if (rt_device_find(param->bus_name) != RT_NULL)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
@@ -1,11 +1,12 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-07-29 KyleChan first version
|
||||
* 2023-10-17 Rbb666 add ra8 adapt
|
||||
*/
|
||||
|
||||
#include <drv_usart_v2.h>
|
||||
@@ -209,7 +210,11 @@ static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial
|
||||
uart = rt_container_of(serial, struct ra_uart, serial);
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
#ifdef SOC_SERIES_R7FA8M85
|
||||
err = R_SCI_B_UART_Open(uart->config->p_api_ctrl, uart->config->p_cfg);
|
||||
#else
|
||||
err = R_SCI_UART_Open(uart->config->p_api_ctrl, uart->config->p_cfg);
|
||||
#endif
|
||||
if (FSP_SUCCESS != err)
|
||||
{
|
||||
return -RT_ERROR;
|
||||
@@ -231,10 +236,19 @@ static int ra_uart_putc(struct rt_serial_device *serial, char c)
|
||||
uart = rt_container_of(serial, struct ra_uart, serial);
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
#ifdef SOC_SERIES_R7FA8M85
|
||||
sci_b_uart_instance_ctrl_t *p_ctrl = (sci_b_uart_instance_ctrl_t *)uart->config->p_api_ctrl;
|
||||
#else
|
||||
sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)uart->config->p_api_ctrl;
|
||||
#endif
|
||||
|
||||
p_ctrl->p_reg->TDR = c;
|
||||
|
||||
#ifdef SOC_SERIES_R7FA8M85
|
||||
while ((p_ctrl->p_reg->CSR_b.TEND) == 0);
|
||||
#else
|
||||
while ((p_ctrl->p_reg->SSR_b.TEND) == 0);
|
||||
#endif
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
@@ -245,15 +259,16 @@ static int ra_uart_getc(struct rt_serial_device *serial)
|
||||
}
|
||||
|
||||
static rt_ssize_t ra_uart_transmit(struct rt_serial_device *serial,
|
||||
rt_uint8_t *buf,
|
||||
rt_size_t size,
|
||||
rt_uint32_t tx_flag)
|
||||
rt_uint8_t *buf,
|
||||
rt_size_t size,
|
||||
rt_uint32_t tx_flag)
|
||||
{
|
||||
struct ra_uart *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
RT_ASSERT(buf != RT_NULL);
|
||||
uart = rt_container_of(serial, struct ra_uart, serial);
|
||||
RT_ASSERT(uart != RT_NULL);
|
||||
|
||||
ra_uart_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)tx_flag);
|
||||
|
||||
|
||||
@@ -32,3 +32,9 @@ config SOC_SERIES_R7FA4M2
|
||||
select ARCH_ARM_CORTEX_M4
|
||||
select SOC_FAMILY_RENESAS
|
||||
default n
|
||||
|
||||
config SOC_SERIES_R7FA8M85
|
||||
bool
|
||||
select ARCH_ARM_CORTEX_M85
|
||||
select SOC_FAMILY_RENESAS
|
||||
default n
|
||||
|
||||
1051
bsp/renesas/ra8m1-ek/.config
Normal file
1051
bsp/renesas/ra8m1-ek/.config
Normal file
File diff suppressed because it is too large
Load Diff
222
bsp/renesas/ra8m1-ek/.cproject
Normal file
222
bsp/renesas/ra8m1-ek/.cproject
Normal file
File diff suppressed because one or more lines are too long
5
bsp/renesas/ra8m1-ek/.gitignore
vendored
Normal file
5
bsp/renesas/ra8m1-ek/.gitignore
vendored
Normal file
@@ -0,0 +1,5 @@
|
||||
/RTE
|
||||
/Listings
|
||||
/Objects
|
||||
ra_cfg.txt
|
||||
|
||||
9
bsp/renesas/ra8m1-ek/.ignore_format.yml
Normal file
9
bsp/renesas/ra8m1-ek/.ignore_format.yml
Normal file
@@ -0,0 +1,9 @@
|
||||
# files format check exclude path, please follow the instructions below to modify;
|
||||
# If you need to exclude an entire folder, add the folder path in dir_path;
|
||||
# If you need to exclude a file, add the path to the file in file_path.
|
||||
|
||||
dir_path:
|
||||
- ra
|
||||
- ra_gen
|
||||
- ra_cfg
|
||||
- RTE
|
||||
28
bsp/renesas/ra8m1-ek/.project
Normal file
28
bsp/renesas/ra8m1-ek/.project
Normal file
@@ -0,0 +1,28 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>ra6m3-temp</name>
|
||||
<comment />
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.rt-thread.studio.rttnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources />
|
||||
</projectDescription>
|
||||
86
bsp/renesas/ra8m1-ek/.secure_azone
Normal file
86
bsp/renesas/ra8m1-ek/.secure_azone
Normal file
@@ -0,0 +1,86 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
|
||||
<azone>
|
||||
<rzone name="R7FA8M1AHECBD.rzone"/>
|
||||
<partition>
|
||||
<peripheral name="PORT0" group="PORT">
|
||||
<slot name="P000" secure="true"/>
|
||||
<slot name="P002" secure="true"/>
|
||||
<slot name="P003" secure="true"/>
|
||||
<slot name="P004" secure="true"/>
|
||||
<slot name="P005" secure="true"/>
|
||||
<slot name="P007" secure="true"/>
|
||||
<slot name="P008" secure="true"/>
|
||||
<slot name="P009" secure="true"/>
|
||||
<slot name="P014" secure="true"/>
|
||||
<slot name="P015" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT1" group="PORT">
|
||||
<slot name="P100" secure="true"/>
|
||||
<slot name="P101" secure="true"/>
|
||||
<slot name="P102" secure="true"/>
|
||||
<slot name="P103" secure="true"/>
|
||||
<slot name="P104" secure="true"/>
|
||||
<slot name="P105" secure="true"/>
|
||||
<slot name="P106" secure="true"/>
|
||||
<slot name="P107" secure="true"/>
|
||||
<slot name="P112" secure="true"/>
|
||||
<slot name="P114" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT2" group="PORT">
|
||||
<slot name="P208" secure="true"/>
|
||||
<slot name="P209" secure="true"/>
|
||||
<slot name="P210" secure="true"/>
|
||||
<slot name="P211" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT3" group="PORT">
|
||||
<slot name="P300" secure="true"/>
|
||||
<slot name="P301" secure="true"/>
|
||||
<slot name="P302" secure="true"/>
|
||||
<slot name="P303" secure="true"/>
|
||||
<slot name="P304" secure="true"/>
|
||||
<slot name="P305" secure="true"/>
|
||||
<slot name="P306" secure="true"/>
|
||||
<slot name="P307" secure="true"/>
|
||||
<slot name="P308" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT4" group="PORT">
|
||||
<slot name="P407" secure="true"/>
|
||||
<slot name="P408" secure="true"/>
|
||||
<slot name="P409" secure="true"/>
|
||||
<slot name="P410" secure="true"/>
|
||||
<slot name="P411" secure="true"/>
|
||||
<slot name="P412" secure="true"/>
|
||||
<slot name="P413" secure="true"/>
|
||||
<slot name="P414" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT5" group="PORT">
|
||||
<slot name="P500" secure="true"/>
|
||||
<slot name="P501" secure="true"/>
|
||||
<slot name="P511" secure="true"/>
|
||||
<slot name="P512" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT6" group="PORT">
|
||||
<slot name="P600" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORT8" group="PORT">
|
||||
<slot name="P800" secure="true"/>
|
||||
<slot name="P801" secure="true"/>
|
||||
<slot name="P802" secure="true"/>
|
||||
<slot name="P803" secure="true"/>
|
||||
<slot name="P804" secure="true"/>
|
||||
<slot name="P808" secure="true"/>
|
||||
<slot name="P809" secure="true"/>
|
||||
<slot name="P814" secure="true"/>
|
||||
<slot name="P815" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="PORTB" group="PORT">
|
||||
<slot name="PB01" secure="true"/>
|
||||
</peripheral>
|
||||
<peripheral name="ICU">
|
||||
<slot name="IRQ0" secure="true"/>
|
||||
<slot name="IRQ1" secure="true"/>
|
||||
<slot name="IRQ2" secure="true"/>
|
||||
<slot name="IRQ3" secure="true"/>
|
||||
</peripheral>
|
||||
</partition>
|
||||
</azone>
|
||||
159
bsp/renesas/ra8m1-ek/.secure_xml
Normal file
159
bsp/renesas/ra8m1-ek/.secure_xml
Normal file
@@ -0,0 +1,159 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<raConfiguration version="8">
|
||||
<generalSettings>
|
||||
<option key="#Board#" value="board.ra8m1ek"/>
|
||||
<option key="CPU" value="RA8M1"/>
|
||||
<option key="Core" value="CM85"/>
|
||||
<option key="#TargetName#" value="R7FA8M1AHECBD"/>
|
||||
<option key="#TargetARCHITECTURE#" value="cortex-m85"/>
|
||||
<option key="#DeviceCommand#" value="R7FA8M1AH"/>
|
||||
<option key="#RTOS#" value="_none"/>
|
||||
<option key="#pinconfiguration#" value="R7FA8M1AHECBD.pincfg"/>
|
||||
<option key="#FSPVersion#" value="5.0.0"/>
|
||||
<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra8m1_ek##"/>
|
||||
<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
|
||||
</generalSettings>
|
||||
<raBspConfiguration/>
|
||||
<raClockConfiguration>
|
||||
<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
|
||||
<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
|
||||
<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
|
||||
<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
|
||||
<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
|
||||
<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
|
||||
<node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
|
||||
<node id="board.clock.pll.mul" option="board.clock.pll.mul.48_00"/>
|
||||
<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
|
||||
<node id="board.clock.pll1p.div" option="board.clock.pll1p.div.2"/>
|
||||
<node id="board.clock.pll1p.display" option="board.clock.pll1p.display.value"/>
|
||||
<node id="board.clock.pll1q.div" option="board.clock.pll1q.div.2"/>
|
||||
<node id="board.clock.pll1q.display" option="board.clock.pll1q.display.value"/>
|
||||
<node id="board.clock.pll1r.div" option="board.clock.pll1r.div.2"/>
|
||||
<node id="board.clock.pll1r.display" option="board.clock.pll1r.display.value"/>
|
||||
<node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
|
||||
<node id="board.clock.pll2.div" option="board.clock.pll2.div.1"/>
|
||||
<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.48_00"/>
|
||||
<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
|
||||
<node id="board.clock.pll2p.div" option="board.clock.pll2p.div.2"/>
|
||||
<node id="board.clock.pll2p.display" option="board.clock.pll2p.display.value"/>
|
||||
<node id="board.clock.pll2q.div" option="board.clock.pll2q.div.2"/>
|
||||
<node id="board.clock.pll2q.display" option="board.clock.pll2q.display.value"/>
|
||||
<node id="board.clock.pll2r.div" option="board.clock.pll2r.div.2"/>
|
||||
<node id="board.clock.pll2r.display" option="board.clock.pll2r.display.value"/>
|
||||
<node id="board.clock.clock.source" option="board.clock.clock.source.pll1p"/>
|
||||
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
|
||||
<node id="board.clock.sciclk.source" option="board.clock.sciclk.source.pll1p"/>
|
||||
<node id="board.clock.spiclk.source" option="board.clock.spiclk.source.disabled"/>
|
||||
<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
|
||||
<node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
|
||||
<node id="board.clock.uck.source" option="board.clock.uck.source.disabled"/>
|
||||
<node id="board.clock.u60ck.source" option="board.clock.u60ck.source.disabled"/>
|
||||
<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
|
||||
<node id="board.clock.cpuclk.div" option="board.clock.cpuclk.div.1"/>
|
||||
<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
|
||||
<node id="board.clock.pclka.div" option="board.clock.pclka.div.4"/>
|
||||
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.8"/>
|
||||
<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.8"/>
|
||||
<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.4"/>
|
||||
<node id="board.clock.pclke.div" option="board.clock.pclke.div.2"/>
|
||||
<node id="board.clock.sdclkout.enable" option="board.clock.sdclkout.enable.enabled"/>
|
||||
<node id="board.clock.bclk.div" option="board.clock.bclk.div.4"/>
|
||||
<node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
|
||||
<node id="board.clock.fclk.div" option="board.clock.fclk.div.8"/>
|
||||
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
|
||||
<node id="board.clock.sciclk.div" option="board.clock.sciclk.div.4"/>
|
||||
<node id="board.clock.spiclk.div" option="board.clock.spiclk.div.4"/>
|
||||
<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.8"/>
|
||||
<node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.3"/>
|
||||
<node id="board.clock.uck.div" option="board.clock.uck.div.5"/>
|
||||
<node id="board.clock.u60ck.div" option="board.clock.u60ck.div.5"/>
|
||||
<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.4"/>
|
||||
<node id="board.clock.cpuclk.display" option="board.clock.cpuclk.display.value"/>
|
||||
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
|
||||
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
|
||||
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
|
||||
<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
|
||||
<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
|
||||
<node id="board.clock.pclke.display" option="board.clock.pclke.display.value"/>
|
||||
<node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
|
||||
<node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
|
||||
<node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
|
||||
<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
|
||||
<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
|
||||
<node id="board.clock.sciclk.display" option="board.clock.sciclk.display.value"/>
|
||||
<node id="board.clock.spiclk.display" option="board.clock.spiclk.display.value"/>
|
||||
<node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
|
||||
<node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
|
||||
<node id="board.clock.uck.display" option="board.clock.uck.display.value"/>
|
||||
<node id="board.clock.u60ck.display" option="board.clock.u60ck.display.value"/>
|
||||
<node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
|
||||
</raClockConfiguration>
|
||||
<raPinConfiguration>
|
||||
<pincfg active="true" name="" symbol="">
|
||||
<configSetting altId="adc0.an000.p004" configurationId="adc0.an000"/>
|
||||
<configSetting altId="adc0.an001.p005" configurationId="adc0.an001"/>
|
||||
<configSetting altId="adc0.an004.p007" configurationId="adc0.an004"/>
|
||||
<configSetting altId="adc0.an007.p014" configurationId="adc0.an007"/>
|
||||
<configSetting altId="adc1.an102.p002" configurationId="adc1.an102"/>
|
||||
<configSetting altId="adc1.an104.p003" configurationId="adc1.an104"/>
|
||||
<configSetting altId="adc1.an105.p015" configurationId="adc1.an105"/>
|
||||
<configSetting altId="adc1.an106.p011" configurationId="adc1.an106"/>
|
||||
<configSetting altId="ether_rmii.et0_linksta.p114" configurationId="ether_rmii.et0_linksta"/>
|
||||
<configSetting altId="ether_rmii.et0_mdc.p308" configurationId="ether_rmii.et0_mdc"/>
|
||||
<configSetting altId="ether_rmii.et0_mdio.p307" configurationId="ether_rmii.et0_mdio"/>
|
||||
<configSetting altId="ether_rmii.ref50ck0.p303" configurationId="ether_rmii.ref50ck0"/>
|
||||
<configSetting altId="ether_rmii.rmii0_crs_dv.p112" configurationId="ether_rmii.rmii0_crs_dv"/>
|
||||
<configSetting altId="ether_rmii.rmii0_rx_er.p300" configurationId="ether_rmii.rmii0_rx_er"/>
|
||||
<configSetting altId="ether_rmii.rmii0_rxd0.p302" configurationId="ether_rmii.rmii0_rxd0"/>
|
||||
<configSetting altId="ether_rmii.rmii0_rxd1.p301" configurationId="ether_rmii.rmii0_rxd1"/>
|
||||
<configSetting altId="ether_rmii.rmii0_txd0.p304" configurationId="ether_rmii.rmii0_txd0"/>
|
||||
<configSetting altId="ether_rmii.rmii0_txd1.p305" configurationId="ether_rmii.rmii0_txd1"/>
|
||||
<configSetting altId="ether_rmii.rmii0_txd_en.p306" configurationId="ether_rmii.rmii0_txd_en"/>
|
||||
<configSetting altId="iic1.scl1.p512" configurationId="iic1.scl1"/>
|
||||
<configSetting altId="iic1.sda1.p511" configurationId="iic1.sda1"/>
|
||||
<configSetting altId="irq12.irq12_dash_ds.p008" configurationId="irq12.irq12_dash_ds"/>
|
||||
<configSetting altId="irq13.irq13_dash_ds.p009" configurationId="irq13.irq13_dash_ds"/>
|
||||
<configSetting altId="jtag_fslash_swd.tck.p211" configurationId="jtag_fslash_swd.tck"/>
|
||||
<configSetting altId="jtag_fslash_swd.tdi.p208" configurationId="jtag_fslash_swd.tdi"/>
|
||||
<configSetting altId="jtag_fslash_swd.tdo.p209" configurationId="jtag_fslash_swd.tdo"/>
|
||||
<configSetting altId="jtag_fslash_swd.tms.p210" configurationId="jtag_fslash_swd.tms"/>
|
||||
<configSetting altId="ospi.om_cs1.p104" configurationId="ospi.om_cs1"/>
|
||||
<configSetting altId="ospi.om_dqs.p801" configurationId="ospi.om_dqs"/>
|
||||
<configSetting altId="ospi.om_ecsint1.p105" configurationId="ospi.om_ecsint1"/>
|
||||
<configSetting altId="ospi.om_reset.p106" configurationId="ospi.om_reset"/>
|
||||
<configSetting altId="ospi.om_sclk.p808" configurationId="ospi.om_sclk"/>
|
||||
<configSetting altId="ospi.om_sio0.p100" configurationId="ospi.om_sio0"/>
|
||||
<configSetting altId="ospi.om_sio1.p803" configurationId="ospi.om_sio1"/>
|
||||
<configSetting altId="ospi.om_sio2.p103" configurationId="ospi.om_sio2"/>
|
||||
<configSetting altId="ospi.om_sio3.p101" configurationId="ospi.om_sio3"/>
|
||||
<configSetting altId="ospi.om_sio4.p102" configurationId="ospi.om_sio4"/>
|
||||
<configSetting altId="ospi.om_sio5.p800" configurationId="ospi.om_sio5"/>
|
||||
<configSetting altId="ospi.om_sio6.p802" configurationId="ospi.om_sio6"/>
|
||||
<configSetting altId="ospi.om_sio7.p804" configurationId="ospi.om_sio7"/>
|
||||
<configSetting altId="p000.input" configurationId="p000"/>
|
||||
<configSetting altId="p107.output.low" configurationId="p107"/>
|
||||
<configSetting altId="p414.output.low" configurationId="p414"/>
|
||||
<configSetting altId="p600.output.low" configurationId="p600"/>
|
||||
<configSetting altId="p809.output.low" configurationId="p809"/>
|
||||
<configSetting altId="pa06.input" configurationId="pa06"/>
|
||||
<configSetting altId="sci2.cts_rts2.pa05" configurationId="sci2.cts_rts2"/>
|
||||
<configSetting altId="sci2.rxd2.pa02" configurationId="sci2.rxd2"/>
|
||||
<configSetting altId="sci2.sck2.pa04" configurationId="sci2.sck2"/>
|
||||
<configSetting altId="sci2.txd2.pa03" configurationId="sci2.txd2"/>
|
||||
<configSetting altId="sci9.rxd9.pa15" configurationId="sci9.rxd9" isUsedByDriver="true"/>
|
||||
<configSetting altId="sci9.txd9.pa14" configurationId="sci9.txd9" isUsedByDriver="true"/>
|
||||
<configSetting altId="spi1.miso1.p410" configurationId="spi1.miso1"/>
|
||||
<configSetting altId="spi1.mosi1.p411" configurationId="spi1.mosi1"/>
|
||||
<configSetting altId="spi1.rspck1.p412" configurationId="spi1.rspck1"/>
|
||||
<configSetting altId="spi1.sslb0.p413" configurationId="spi1.sslb0"/>
|
||||
<configSetting altId="usbfs.usb_dm.p815" configurationId="usbfs.usb_dm"/>
|
||||
<configSetting altId="usbfs.usb_dp.p814" configurationId="usbfs.usb_dp"/>
|
||||
<configSetting altId="usbfs.usb_ovrcura.p501" configurationId="usbfs.usb_ovrcura"/>
|
||||
<configSetting altId="usbfs.usb_vbus.p407" configurationId="usbfs.usb_vbus"/>
|
||||
<configSetting altId="usbfs.usb_vbusen.p500" configurationId="usbfs.usb_vbusen"/>
|
||||
<configSetting altId="usbhs.usbhs_ovrcura.p409" configurationId="usbhs.usbhs_ovrcura"/>
|
||||
<configSetting altId="usbhs.usbhs_vbus.pb01" configurationId="usbhs.usbhs_vbus"/>
|
||||
<configSetting altId="usbhs.usbhs_vbusen.p408" configurationId="usbhs.usbhs_vbusen"/>
|
||||
</pincfg>
|
||||
</raPinConfiguration>
|
||||
</raConfiguration>
|
||||
BIN
bsp/renesas/ra8m1-ek/.settings/.rtmenus
Normal file
BIN
bsp/renesas/ra8m1-ek/.settings/.rtmenus
Normal file
Binary file not shown.
14
bsp/renesas/ra8m1-ek/.settings/language.settings.xml
Normal file
14
bsp/renesas/ra8m1-ek/.settings/language.settings.xml
Normal file
@@ -0,0 +1,14 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1208902908258079360" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
|
||||
@@ -0,0 +1,3 @@
|
||||
content-types/enabled=true
|
||||
content-types/org.eclipse.cdt.core.asmSource/file-extensions=s
|
||||
eclipse.preferences.version=1
|
||||
19
bsp/renesas/ra8m1-ek/.settings/projcfg.ini
Normal file
19
bsp/renesas/ra8m1-ek/.settings/projcfg.ini
Normal file
@@ -0,0 +1,19 @@
|
||||
#RT-Thread Studio Project Configuration
|
||||
#Tue Jan 10 14:37:39 CST 2023
|
||||
cfg_version=v3.0
|
||||
board_name=ra6m3-ek
|
||||
example_name=
|
||||
hardware_adapter=J-Link
|
||||
board_base_nano_proj=false
|
||||
project_type=rt-thread
|
||||
chip_name=R7FA6M3AH\n
|
||||
selected_rtt_version=latest
|
||||
bsp_version=
|
||||
os_branch=master
|
||||
project_base_rtt_bsp=true
|
||||
output_project_path=E\:softwareRT-ThreadStudioworkspace\ra6m3-temp
|
||||
is_base_example_project=false
|
||||
is_use_scons_build=true
|
||||
project_name=ra6m3-temp
|
||||
os_version=latest
|
||||
bsp_path=
|
||||
@@ -0,0 +1,90 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.adapterName" value="J-Link"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.binFileStartAddress" value=""/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="false"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.eraseEndAddress" value=""/>
|
||||
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.eraseMode" value="0"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.eraseStartAddress" value=""/>
|
||||
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.flashDeviceName" value="R7FA6M3AH "/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.flashDownloadHex" value="true"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.forceQuitGdbServer" value="false"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="R7FA6M3AH"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="100000"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${debugger_install_path}/${jlink_debugger_relative_path}\JLinkGDBServerCL.exe"/>
|
||||
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun"/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerRunAfterStopDebug" value="true"/>
|
||||
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
|
||||
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="auto"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.jlinkExecutable" value="${debugger_install_path}/${jlink_debugger_relative_path}\JLink.exe"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
|
||||
<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.runAfterDownload" value="true"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
|
||||
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
|
||||
<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
|
||||
<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${rtt_gnu_gcc}/arm-none-eabi-gdb.exe"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="0"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="ra6m3-temp"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/ra6m3-temp"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<stringAttribute key="org.eclipse.debug.core.source_locator_id" value="org.eclipse.cdt.debug.core.sourceLocator"/>
|
||||
<stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <sourceLookupDirector> <sourceContainers duplicates="false"> <container memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;default/&gt;&#13;&#10;" typeId="org.eclipse.debug.core.containerType.default"/> </sourceContainers> </sourceLookupDirector> "/>
|
||||
<stringAttribute key="org.eclipse.debug.ui.ATTR_CONSOLE_ENCODING" value="GBK"/>
|
||||
</launchConfiguration>
|
||||
21
bsp/renesas/ra8m1-ek/.settings/standalone.prefs
Normal file
21
bsp/renesas/ra8m1-ek/.settings/standalone.prefs
Normal file
@@ -0,0 +1,21 @@
|
||||
#Mon Oct 30 16:09:15 CST 2023
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_b_uart\#\#\#\#5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#5.0.0/all=1896254027,ra/fsp/inc/api/r_ioport_api.h|3058606325,ra/fsp/inc/instances/r_ioport.h|3002446768,ra/fsp/src/r_ioport/r_ioport.c
|
||||
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
|
||||
com.renesas.cdt.ddsc.contentgen.options/options/suppresswarningspaths=ra/arm
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra8m1\#\#device\#\#R7FA8M1AHECBD\#\#5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=ELCConfigurator
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra8m1\#\#device\#\#\#\#5.0.0/all=3557931260,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA8M1AH.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra8m1\#\#fsp\#\#\#\#5.0.0/all=4143092756,script/fsp.scat|346195372,script/ac6/fsp_keep.via|934437302,ra/fsp/inc/fsp_features.h|3058606325,ra/fsp/inc/instances/r_ioport.h|1171232788,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|543620856,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|1277668127,ra/fsp/src/bsp/mcu/ra8m1/bsp_mcu_info.h|3527988232,ra/fsp/src/bsp/mcu/ra8m1/bsp_override.h|1726006039,ra/fsp/src/bsp/mcu/ra8m1/bsp_elc.h|2183999466,ra/fsp/src/bsp/mcu/ra8m1/bsp_feature.h|1884526901,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1437525339,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|248082807,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|3324174567,ra/fsp/src/bsp/mcu/all/bsp_exceptions.h|2550773705,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|271204625,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|1668386995,ra/fsp/src/bsp/mcu/all/bsp_security.h|690210506,ra/fsp/src/bsp/mcu/all/bsp_irq.h|2942105346,ra/fsp/src/bsp/mcu/all/bsp_irq.c|296810838,ra/fsp/src/bsp/mcu/all/bsp_guard.c|1246740431,ra/fsp/src/bsp/mcu/all/bsp_delay.h|1331691689,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|3569788004,ra/fsp/src/bsp/mcu/all/bsp_io.h|3610800851,ra/fsp/src/bsp/mcu/all/bsp_guard.h|2964028862,ra/fsp/src/bsp/mcu/all/bsp_common.h|3881030941,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|3171976222,ra/fsp/src/bsp/mcu/all/bsp_security.c|429234293,ra/fsp/src/bsp/mcu/all/bsp_common.c|1872304413,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|4092753007,ra/fsp/src/bsp/mcu/all/bsp_delay.c|2702335218,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3085135894,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|2365965045,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|1835725510,ra/fsp/src/bsp/mcu/all/bsp_io.c|2551036977,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra8m1\#\#fsp\#\#\#\#5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.9.0+renesas.0.fsp.5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.9.0+renesas.0.fsp.5.0.0/all=1441545198,ra/arm/CMSIS_5/LICENSE.txt|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|1480183821,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|1608305587,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm85.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|3778515955,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|1438162915,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|4084823319,ra/arm/CMSIS_5/CMSIS/Core/Include/pac_armv81.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|4147548732,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|1290634672,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|1924015782,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|2675617387,ra/arm/CMSIS_5/CMSIS/Core/Include/core_starmc1.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_b_uart\#\#\#\#5.0.0/all=3115705082,ra/fsp/inc/api/r_transfer_api.h|1476071459,ra/fsp/inc/api/r_uart_api.h|419014891,ra/fsp/inc/instances/r_sci_b_uart.h|3063216256,ra/fsp/src/r_sci_b_uart/r_sci_b_uart.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra8m1\#\#device\#\#R7FA8M1AHECBD\#\#5.0.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#5.0.0/all=107063585,ra/fsp/inc/fsp_version.h|2560512765,ra/fsp/inc/api/bsp_api.h|1896254027,ra/fsp/inc/api/r_ioport_api.h|1037141086,ra/fsp/inc/api/fsp_common_api.h|4290340792,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|3566655744,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra8m1_ek\#\#\#\#5.0.0/all=2370294288,ra/board/ra8m1_ek/board_init.h|3816945414,ra/board/ra8m1_ek/board_init.c|3071464958,ra/board/ra8m1_ek/board_leds.h|3090459819,ra/board/ra8m1_ek/board_leds.c|106221315,ra/board/ra8m1_ek/board.h|1919213143,ra/board/ra8m1_ek/board_ethernet_phy.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra8m1_ek\#\#\#\#5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra8m1\#\#device\#\#\#\#5.0.0/libraries=
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_b_uart.1514241209=false
|
||||
29
bsp/renesas/ra8m1-ek/Kconfig
Normal file
29
bsp/renesas/ra8m1-ek/Kconfig
Normal file
@@ -0,0 +1,29 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
# you can change the RTT_ROOT default "../.." to your rtthread_root,
|
||||
# example : default "F:/git_repositories/rt-thread"
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
config ENV_DIR
|
||||
string
|
||||
option env="ENV_ROOT"
|
||||
default "/"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "$BSP_DIR/board/Kconfig"
|
||||
157
bsp/renesas/ra8m1-ek/README.md
Normal file
157
bsp/renesas/ra8m1-ek/README.md
Normal file
@@ -0,0 +1,157 @@
|
||||
# 瑞萨 EK-RA8M1 开发板 BSP 说明
|
||||
|
||||
中文|[English](README_EN.md)
|
||||
|
||||
## 简介
|
||||
|
||||
本文档为 EK-RA8M1 开发板提供的 BSP (板级支持包) 说明。通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
主要内容如下：
|
||||
|
||||
- 开发板介绍
|
||||
- BSP 快速上手指南
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
基于瑞萨 RA8M1 MCU 开发的 EK-RA8M1 评估板，通过灵活配置软件包和 IDE，可帮助用户对 RA8 MCU 群组的特性轻松进行评估，并对嵌入系统应用程序进行开发。
|
||||
|
||||
开发板正面外观如下图：
|
||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：R7FA8M1AH，480MHz，**Arm®Cortex®-M85** 内核，2MB 代码闪存, 1MB SRAM
|
||||
- Jlink OB
|
||||
- OSPI FLASH（64MX8）
|
||||
- USB-Host
|
||||
- USB-Device
|
||||
- CANFD
|
||||
- 以太网接口
|
||||
- 2个PMOD+Arduino+micro BUS接口
|
||||
- 3个用户LED
|
||||
- 3个按键：2个用户按键，1个复位按键
|
||||
|
||||
**更多详细资料及工具**
|
||||
|
||||
## 外设支持
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| :----------------: | :----------------: | :------------- |
|
||||
| UART | 支持 | UART9 为默认日志输出端口 |
|
||||
| GPIO | 支持 | |
|
||||
|
||||
* 注意：仓库刚拉下来是最小系统，若需添加/使能其他外设需参考：[外设驱动使用教程 (rt-thread.org)](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列BSP外设驱动使用教程)
|
||||
|
||||
## 使用说明
|
||||
|
||||
使用说明分为如下两个章节：
|
||||
|
||||
- 快速上手
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
|
||||
- 进阶使用
|
||||
|
||||
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
|
||||
|
||||
### 支持的编译平台
|
||||
|
||||
* armclang（AC6 V6.19）
|
||||
* LLVM（V16/17）[ARM-software/LLVM-embedded-toolchain-for-Arm (github.com)](https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/tag/release-17.0.1)
|
||||
|
||||
### 快速上手
|
||||
|
||||
#### 1、使用 MDK 编译：
|
||||
|
||||
本 BSP 目前提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
**编译下载**
|
||||
|
||||
- 编译：双击 project.uvprojx 文件，打开 MDK5 工程，编译程序。
|
||||
- 下载：点击 MDK 的 Debug 按钮进行下载调试
|
||||
|
||||
#### 2、使用 LLVM 编译
|
||||
|
||||
使用 env 工具打开当前 bsp，设定要使用的工具链和对应的路径。
|
||||
|
||||
```shell
|
||||
set RTT_CC=llvm-arm
|
||||
set RTT_EXEC_PATH=D:\Progrem\LLVMEmbeddedToolchainForArm-17.0.1-Windows-x86_64\bin
|
||||
```
|
||||
|
||||
然后运行 scons 命令，执行编译
|
||||
|
||||
```shell
|
||||
scons
|
||||
```
|
||||
|
||||
**查看运行结果**
|
||||
|
||||
下载程序成功之后，系统会自动运行并打印系统信息。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息。输入 help 命令可查看系统中支持的命令。
|
||||
|
||||
```bash
|
||||
initialize rti_board_start:0 done
|
||||
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 5.1.0 build Oct 30 2023 16:14:05
|
||||
2006 - 2022 Copyright by RT-Thread team
|
||||
do components initialization.
|
||||
initialize rti_board_end:0 done
|
||||
initialize finsh_system_init:0 done
|
||||
|
||||
Hello RT-Thread!
|
||||
msh >
|
||||
```
|
||||
|
||||
**应用入口函数**
|
||||
|
||||
应用层的入口函数在 **bsp\renesas\ra8m1-ek\src\hal_entry.c** 中 的 `void hal_entry(void)` 。用户编写的源文件可直接放在 src 目录下。
|
||||
|
||||
```c
|
||||
void hal_entry(void)
|
||||
{
|
||||
rt_kprintf("\nHello RT-Thread!\n");
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED3_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED3_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
### 进阶使用
|
||||
|
||||
**资料及文档**
|
||||
|
||||
- [开发板官网主页]([EK-RA8M1 - RA8M1 MCU 群组评估套件 | Renesas](https://www.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra8m1-evaluation-kit-ra8m1-mcu-group))
|
||||
- [开发板用户手册](https://www.renesas.cn/cn/zh/document/mat/ek-ra8m1-users-manual?r=25448206)
|
||||
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
|
||||
|
||||
**ENV 配置**
|
||||
|
||||
- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
|
||||
|
||||
此 BSP 默认只开启了 UART9 的功能，如果需使用更多高级功能例如组件、软件包等，需要利用 ENV 工具进行配置。
|
||||
|
||||
步骤如下：
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
## 联系人信息
|
||||
|
||||
在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
|
||||
|
||||
## 贡献代码
|
||||
|
||||
如果您对 EK-RA8M1 感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [如何向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github)。
|
||||
132
bsp/renesas/ra8m1-ek/README_EN.md
Normal file
132
bsp/renesas/ra8m1-ek/README_EN.md
Normal file
@@ -0,0 +1,132 @@
|
||||
# EK-RA8M1 BSP Instruction
|
||||
|
||||
中文|[English](README.md)
|
||||
|
||||
## Introduction
|
||||
|
||||
Prepare for an exhilarating journey into the realm of the EK-RA8M1 development board! This guide is your treasure map, leading you to a trove of knowledge about the Board Support Package (BSP). The Quick Start section is your launchpad, propelling developers into action with the BSP, and getting RT-Thread operational on the development board faster than a speeding bullet.
|
||||
|
||||
Here’s a sneak peek of the adventure that awaits:
|
||||
|
||||
• A captivating exploration of the development board
|
||||
|
||||
• A practical and user-friendly BSP Quick Start Guide
|
||||
|
||||
## Hardware
|
||||
|
||||
The EK-RA8M1 evaluation board, developed based on the Renesas RA8M1 MCU, is a handy tool that allows users to easily evaluate the features of the RA8 MCU group. With flexible software package and IDE configurations, it’s a breeze to develop embedded system applications.
|
||||
|
||||
Here’s a sneak peek of what the front of the development board looks like:
|
||||
|
||||
|
||||
|
||||
The board comes with some commonly used **on-board resources**. Let’s dive in and explore!
|
||||
|
||||
- MCU: R7FA8M1AH, 480MHz, **Arm®Cortex®-M85**, 2MB Flash, 1MB SRAM
|
||||
- Jlink OB
|
||||
- OSPI FLASH（64MX8）
|
||||
- USB-Host
|
||||
- USB-Device
|
||||
- CANFD
|
||||
- ethernet
|
||||
- 2个PMOD+Arduino+micro BUS interface
|
||||
- 3 user LED
|
||||
- 3 button: 2 user button, 1 reset button
|
||||
|
||||
**More Details**
|
||||
|
||||
### Peripheral Condition
|
||||
|
||||
Each peripheral supporting condition for this BSP is as follows:
|
||||
|
||||
| **On-chip Peripheral Drivers** | **Support** | **Remark** |
|
||||
| :----------------: | :----------------: | :------------- |
|
||||
| UART | Support | UART9 is the default log output port. |
|
||||
| GPIO | Support | |
|
||||
|
||||
## Instructions for Use
|
||||
|
||||
The instructions for use are divided into the following two sections:
|
||||
|
||||
• Quick Start
|
||||
|
||||
This section is a user guide for newcomers to RT-Thread. By following simple steps, you can run the RT-Thread operating system on this development board and see the experimental results.
|
||||
|
||||
• Advanced Use
|
||||
|
||||
This section is for developers who want to enable more development board resources on the RT-Thread operating system. By using the ENV tool to configure the BSP, you can enable more on-board resources and achieve more advanced functions.
|
||||
|
||||
### Quick Start
|
||||
|
||||
This BSP currently only provides an MDK5 project. The following tutorial takes the MDK5 development environment as an example to introduce how to run the system.
|
||||
|
||||
**Compile and Download**
|
||||
|
||||
• Compile: Double-click the **project.uvprojx** file to open the MDK5 project and compile the program.
|
||||
|
||||
• Download: Click the Debug button in MDK to download and debug
|
||||
|
||||
**Running results**
|
||||
|
||||
After the program is downloaded successfully, the system will automatically run and print system information.
|
||||
|
||||
Connect the corresponding serial port of the development board to the PC, open the corresponding serial port (115200-8-1-N) in the terminal tool, reset the device, and you can see RT-Thread’s output information. Enter the help command can view the commands supported by the system.
|
||||
|
||||
```bash
|
||||
initialize rti_board_start:0 done
|
||||
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 5.1.0 build Oct 30 2023 16:14:05
|
||||
2006 - 2022 Copyright by RT-Thread team
|
||||
do components initialization.
|
||||
initialize rti_board_end:0 done
|
||||
initialize finsh_system_init:0 done
|
||||
|
||||
Hello RT-Thread!
|
||||
msh >
|
||||
```
|
||||
|
||||
**Entry function**
|
||||
|
||||
The entry function of the application layer is in **bsp\renesas\ra8m1-ek\src\hal_entry.c** in `void hal_entry(void)`. Source files that you created can be placed directly in the src directory.
|
||||
|
||||
```c
|
||||
void hal_entry(void)
|
||||
{
|
||||
rt_kprintf("\nHello RT-Thread!\n");
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED3_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED3_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
### Advanced Features
|
||||
|
||||
**Resources & Documents**
|
||||
|
||||
- [Development Board Overview](https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ra8m1-480-mhz-arm-cortex-m85-based-microcontroller-helium-and-trustzone)
|
||||
- [User Guide](https://www.renesas.cn/cn/zh/document/mat/ek-ra8m1-users-manual1)
|
||||
- [RA MCU](https://www.renesas.com/us/en/document/gde/1520091)
|
||||
|
||||
**ENV Configuration**
|
||||
|
||||
• How to use the ENV tool: [RT-Thread env tool user manual](https://www.rt-thread.io/document/site/programming-manual/env/env/).
|
||||
|
||||
This BSP only enables the function of UART9 by default. If you're looking for more advanced functions such as components and software packages, ENV tool for configuration is available.
|
||||
|
||||
The steps are as follows:
|
||||
|
||||
1. Open the env tool under bsp.
|
||||
2. Enter the `menuconfig` command to configure the project, and save and exit after configuration.
|
||||
3. Enter the `pkgs --update` command to update the software package.
|
||||
4. Enter the `scons --target=mdk5` command to regenerate the project.
|
||||
|
||||
## Contribute the Code
|
||||
|
||||
If you’re interested in the EK-RA8M1 and have some cool projects you’d like to share with everyone, we’d love for you to contribute your code! You can check out [how to contribute to RT-Thread’s code](https://www.rt-thread.io/contribution.html). Let’s make something awesome together!
|
||||
28
bsp/renesas/ra8m1-ek/SConscript
Normal file
28
bsp/renesas/ra8m1-ek/SConscript
Normal file
@@ -0,0 +1,28 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
from gcc import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
CPPPATH = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
print("\nThe current project does not support IAR build\n")
|
||||
Return('group')
|
||||
elif rtconfig.PLATFORM in GetGCCLikePLATFORM():
|
||||
if GetOption('target') != 'mdk5':
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('./src/*.c')
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
55
bsp/renesas/ra8m1-ek/SConstruct
Normal file
55
bsp/renesas/ra8m1-ek/SConstruct
Normal file
@@ -0,0 +1,55 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
rtconfig.BSP_LIBRARY_TYPE = None
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
488
bsp/renesas/ra8m1-ek/board/Kconfig
Normal file
488
bsp/renesas/ra8m1-ek/board/Kconfig
Normal file
@@ -0,0 +1,488 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
config SOC_R7FA8M1AH
|
||||
bool
|
||||
select SOC_SERIES_R7FA8M85
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
source "../libraries/HAL_Drivers/Kconfig"
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
select RT_USING_SERIAL_V2
|
||||
if BSP_USING_UART
|
||||
menuconfig BSP_USING_UART3
|
||||
bool "Enable UART3"
|
||||
default n
|
||||
if BSP_USING_UART3
|
||||
config BSP_UART3_RX_USING_DMA
|
||||
bool "Enable UART3 RX DMA"
|
||||
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART3_TX_USING_DMA
|
||||
bool "Enable UART3 TX DMA"
|
||||
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART3_RX_BUFSIZE
|
||||
int "Set UART3 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART3_TX_BUFSIZE
|
||||
int "Set UART3 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
menuconfig BSP_USING_UART9
|
||||
bool "Enable UART9"
|
||||
default n
|
||||
if BSP_USING_UART9
|
||||
config BSP_UART9_RX_USING_DMA
|
||||
bool "Enable UART9 RX DMA"
|
||||
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART9_TX_USING_DMA
|
||||
bool "Enable UART9 TX DMA"
|
||||
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART9_RX_BUFSIZE
|
||||
int "Set UART9 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART9_TX_BUFSIZE
|
||||
int "Set UART9 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SCI_SPI
|
||||
bool "Enable SCI SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SCI_SPI
|
||||
config BSP_USING_SCI_SPI0
|
||||
bool "Enable SCI SPI0 BUS"
|
||||
default n
|
||||
config BSP_USING_SCI_SPI1
|
||||
bool "Enable SCI SPI1 BUS"
|
||||
default n
|
||||
config BSP_USING_SCI_SPI2
|
||||
bool "Enable SCI SPI2 BUS"
|
||||
default n
|
||||
config BSP_USING_SCI_SPI3
|
||||
bool "Enable SCI SPI3 BUS"
|
||||
default n
|
||||
config BSP_USING_SCI_SPI6
|
||||
bool "Enable SCI SPI6 BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SCI
|
||||
bool "Enable SCI Controller"
|
||||
default n
|
||||
config BSP_USING_SCIn_SPI
|
||||
bool
|
||||
default n
|
||||
depends on BSP_USING_SCI
|
||||
select RT_USING_SPI
|
||||
|
||||
config BSP_USING_SCIn_I2C
|
||||
bool
|
||||
default n
|
||||
depends on BSP_USING_SCI
|
||||
select RT_USING_I2C
|
||||
|
||||
config BSP_USING_SCIn_UART
|
||||
bool
|
||||
default n
|
||||
depends on BSP_USING_SCI
|
||||
select RT_USING_SERIAL
|
||||
select RT_USING_SERIAL_V2
|
||||
|
||||
if BSP_USING_SCI
|
||||
config BSP_USING_SCI0
|
||||
bool "Enable SCI0"
|
||||
default n
|
||||
if BSP_USING_SCI0
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI0_SPI
|
||||
config BSP_USING_SCI0_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI0_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI0_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI0_UART
|
||||
config BSP_SCI0_UART_RX_BUFSIZE
|
||||
int "Set UART0 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI0_UART_TX_BUFSIZE
|
||||
int "Set UART0 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI1
|
||||
bool "Enable SCI1"
|
||||
default n
|
||||
if BSP_USING_SCI1
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI1_SPI
|
||||
config BSP_USING_SCI1_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI1_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI1_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI1_UART
|
||||
config BSP_SCI1_UART_RX_BUFSIZE
|
||||
int "Set UART1 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI1_UART_TX_BUFSIZE
|
||||
int "Set UART1 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI2
|
||||
bool "Enable SCI2"
|
||||
default n
|
||||
if BSP_USING_SCI2
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI2_SPI
|
||||
config BSP_USING_SCI2_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI2_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI2_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI2_UART
|
||||
config BSP_SCI2_UART_RX_BUFSIZE
|
||||
int "Set UART2 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI2_UART_TX_BUFSIZE
|
||||
int "Set UART2 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI3
|
||||
bool "Enable SCI3"
|
||||
default n
|
||||
if BSP_USING_SCI3
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI3_SPI
|
||||
config BSP_USING_SCI3_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI3_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI3_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI3_UART
|
||||
config BSP_SCI3_UART_RX_BUFSIZE
|
||||
int "Set UART3 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI3_UART_TX_BUFSIZE
|
||||
int "Set UART3 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI4
|
||||
bool "Enable SCI4"
|
||||
default n
|
||||
if BSP_USING_SCI4
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI4_SPI
|
||||
config BSP_USING_SCI4_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI4_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI4_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI4_UART
|
||||
config BSP_SCI4_UART_RX_BUFSIZE
|
||||
int "Set UART4 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI4_UART_TX_BUFSIZE
|
||||
int "Set UART4 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI5
|
||||
bool "Enable SCI5"
|
||||
default n
|
||||
if BSP_USING_SCI5
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI5_SPI
|
||||
config BSP_USING_SCI5_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI5_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI5_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI5_UART
|
||||
config BSP_SCI5_UART_RX_BUFSIZE
|
||||
int "Set UART5 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI5_UART_TX_BUFSIZE
|
||||
int "Set UART5 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI6
|
||||
bool "Enable SCI6"
|
||||
default n
|
||||
if BSP_USING_SCI6
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI6_SPI
|
||||
config BSP_USING_SCI6_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI6_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI6_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI6_UART
|
||||
config BSP_SCI6_UART_RX_BUFSIZE
|
||||
int "Set UART6 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI6_UART_TX_BUFSIZE
|
||||
int "Set UART6 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI7
|
||||
bool "Enable SCI7"
|
||||
default n
|
||||
if BSP_USING_SCI7
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI7_SPI
|
||||
config BSP_USING_SCI7_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI7_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI7_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI7_UART
|
||||
config BSP_SCI7_UART_RX_BUFSIZE
|
||||
int "Set UART7 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI7_UART_TX_BUFSIZE
|
||||
int "Set UART7 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI8
|
||||
bool "Enable SCI8"
|
||||
default n
|
||||
if BSP_USING_SCI8
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI8_SPI
|
||||
config BSP_USING_SCI8_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI8_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI8_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI8_UART
|
||||
config BSP_SCI8_UART_RX_BUFSIZE
|
||||
int "Set UART8 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI8_UART_TX_BUFSIZE
|
||||
int "Set UART8 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
config BSP_USING_SCI9
|
||||
bool "Enable SCI9"
|
||||
default n
|
||||
if BSP_USING_SCI9
|
||||
choice
|
||||
prompt "choice sci mode"
|
||||
default BSP_USING_SCI9_SPI
|
||||
config BSP_USING_SCI9_SPI
|
||||
select BSP_USING_SCIn_SPI
|
||||
bool "SPI mode"
|
||||
config BSP_USING_SCI9_I2C
|
||||
select BSP_USING_SCIn_I2C
|
||||
bool "I2C mode"
|
||||
config BSP_USING_SCI9_UART
|
||||
select BSP_USING_SCIn_UART
|
||||
bool "UART mode"
|
||||
endchoice
|
||||
if BSP_USING_SCI9_UART
|
||||
config BSP_SCI9_UART_RX_BUFSIZE
|
||||
int "Set UART9 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_SCI9_UART_TX_BUFSIZE
|
||||
int "Set UART9 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_USING_SPI0
|
||||
bool "Enable SPI0 BUS"
|
||||
default n
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C BUS"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C
|
||||
config BSP_USING_HW_I2C
|
||||
bool "Enable Hardware I2C BUS"
|
||||
default n
|
||||
if BSP_USING_HW_I2C
|
||||
config BSP_USING_HW_I2C1
|
||||
bool "Enable Hardware I2C1 BUS"
|
||||
default n
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SCI_SPI6
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
config BSP_USING_PWM12
|
||||
bool "Enable GPT12 (16-Bits) output PWM"
|
||||
default n
|
||||
endif
|
||||
endmenu
|
||||
endmenu
|
||||
19
bsp/renesas/ra8m1-ek/board/SConscript
Normal file
19
bsp/renesas/ra8m1-ek/board/SConscript
Normal file
@@ -0,0 +1,19 @@
|
||||
import os
|
||||
from building import *
|
||||
|
||||
objs = []
|
||||
cwd = GetCurrentDir()
|
||||
list = os.listdir(cwd)
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('*.c')
|
||||
|
||||
if GetDepend(['BSP_USING_FS']):
|
||||
src += Glob('ports/mnt.c')
|
||||
|
||||
objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
38
bsp/renesas/ra8m1-ek/board/board.h
Normal file
38
bsp/renesas/ra8m1-ek/board/board.h
Normal file
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-10 Sherman first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define RA_SRAM_SIZE 896 /* The SRAM size of the chip needs to be modified */
|
||||
#define RA_SRAM_END (0x22000000 + RA_SRAM_SIZE * 1024)
|
||||
|
||||
#ifdef __ARMCC_VERSION
|
||||
extern int Image$$RAM_END$$ZI$$Base;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __RAM_segment_used_end__;
|
||||
#define HEAP_BEGIN (&__RAM_segment_used_end__)
|
||||
#endif
|
||||
|
||||
#define HEAP_END RA_SRAM_END
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
16
bsp/renesas/ra8m1-ek/board/lvgl/SConscript
Normal file
16
bsp/renesas/ra8m1-ek/board/lvgl/SConscript
Normal file
@@ -0,0 +1,16 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
group = []
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
group = group + DefineGroup('LVGL-port', src, depend = ['BSP_USING_LVGL'], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
17
bsp/renesas/ra8m1-ek/board/lvgl/demo/SConscript
Normal file
17
bsp/renesas/ra8m1-ek/board/lvgl/demo/SConscript
Normal file
@@ -0,0 +1,17 @@
|
||||
from building import *
|
||||
import os
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
group = []
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
group = group + DefineGroup('LVGL-demo', src, depend = ['BSP_USING_LVGL', 'BSP_USING_LVGL_DEMO'], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
18
bsp/renesas/ra8m1-ek/board/lvgl/demo/lv_demo.c
Normal file
18
bsp/renesas/ra8m1-ek/board/lvgl/demo/lv_demo.c
Normal file
@@ -0,0 +1,18 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-17 Meco Man First version
|
||||
* 2022-05-10 Meco Man improve rt-thread initialization process
|
||||
*/
|
||||
#include "rtconfig.h"
|
||||
|
||||
void lv_user_gui_init(void)
|
||||
{
|
||||
/* display demo; you may replace with your LVGL application at here */
|
||||
extern void lv_demo_music(void);
|
||||
lv_demo_music();
|
||||
}
|
||||
66
bsp/renesas/ra8m1-ek/board/lvgl/lv_conf.h
Normal file
66
bsp/renesas/ra8m1-ek/board/lvgl/lv_conf.h
Normal file
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-02-22 Rbb666 First version
|
||||
*/
|
||||
|
||||
#ifndef LV_CONF_H
|
||||
#define LV_CONF_H
|
||||
|
||||
#include <rtconfig.h>
|
||||
|
||||
/* Enable additional color format support */
|
||||
#define DLG_LVGL_CF 1
|
||||
|
||||
/* Enable sub byte color formats to be swapped. If disabled, which is recommended for
|
||||
* performance, bitmaps need to be in correct order */
|
||||
#define DLG_LVGL_CF_SUB_BYTE_SWAP 0
|
||||
|
||||
#define DLG_LVGL_USE_GPU_RA6M3 0
|
||||
|
||||
#define LV_USE_PERF_MONITOR 1
|
||||
#define LV_COLOR_DEPTH 16
|
||||
|
||||
#ifdef PKG_USING_ILI9341
|
||||
#define LV_HOR_RES_MAX 240
|
||||
#define LV_VER_RES_MAX 320
|
||||
#define LV_COLOR_16_SWAP 1
|
||||
#define LV_DPI_DEF 99
|
||||
#else
|
||||
#define LV_HOR_RES_MAX 480
|
||||
#define LV_VER_RES_MAX 272
|
||||
#define LV_DPI_DEF 89
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_LVGL_VIDEO_DEMO
|
||||
#define LV_USE_FILE_EXPLORER 1
|
||||
#if LV_USE_FILE_EXPLORER
|
||||
/*Maximum length of path*/
|
||||
#define LV_FILE_EXPLORER_PATH_MAX_LEN (128)
|
||||
/*Quick access bar, 1:use, 0:not use*/
|
||||
/*Requires: lv_list*/
|
||||
#define LV_FILE_EXPLORER_QUICK_ACCESS 0
|
||||
#endif
|
||||
|
||||
#define LV_USE_FS_STDIO 1
|
||||
#if LV_USE_FS_STDIO
|
||||
#define LV_FS_STDIO_LETTER '/' /*Set an upper cased letter on which the drive will accessible (e.g. 'A')*/
|
||||
#define LV_FS_STDIO_PATH "/" /*Set the working directory. File/directory paths will be appended to it.*/
|
||||
#define LV_FS_STDIO_CACHE_SIZE 0 /*>0 to cache this number of bytes in lv_fs_read()*/
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef PKG_USING_LV_MUSIC_DEMO
|
||||
/* music player demo */
|
||||
#define LV_USE_DEMO_RTT_MUSIC 1
|
||||
#define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1
|
||||
#define LV_FONT_MONTSERRAT_12 1
|
||||
#define LV_FONT_MONTSERRAT_16 1
|
||||
#define LV_COLOR_SCREEN_TRANSP 0
|
||||
#endif /* PKG_USING_LV_MUSIC_DEMO */
|
||||
|
||||
#endif
|
||||
146
bsp/renesas/ra8m1-ek/board/lvgl/lv_port_disp.c
Normal file
146
bsp/renesas/ra8m1-ek/board/lvgl/lv_port_disp.c
Normal file
@@ -0,0 +1,146 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-11-24 Rbb666 The first version
|
||||
*/
|
||||
#include <lvgl.h>
|
||||
#include "hal_data.h"
|
||||
|
||||
#if DLG_LVGL_USE_GPU_RA6M3
|
||||
#include "drv_g2d.h"
|
||||
#endif
|
||||
|
||||
#ifdef PKG_USING_ILI9341
|
||||
#include "lcd_ili9341.h"
|
||||
#else
|
||||
#include "lcd_port.h"
|
||||
#endif
|
||||
|
||||
#define COLOR_BUFFER (LV_HOR_RES_MAX * LV_VER_RES_MAX / 4)
|
||||
|
||||
/*A static or global variable to store the buffers*/
|
||||
static lv_disp_draw_buf_t disp_buf;
|
||||
|
||||
/*Descriptor of a display driver*/
|
||||
static lv_disp_drv_t disp_drv;
|
||||
static struct rt_device_graphic_info info;
|
||||
|
||||
/*Static or global buffer(s). The second buffer is optional*/
|
||||
// 0x1FFE0000 0x20040000
|
||||
lv_color_t buf_1[COLOR_BUFFER];
|
||||
|
||||
#if !DLG_LVGL_USE_GPU_RA6M3
|
||||
static void color_to16_maybe(lv_color16_t *dst, lv_color_t *src)
|
||||
{
|
||||
#if (LV_COLOR_DEPTH == 16)
|
||||
dst->full = src->full;
|
||||
#else
|
||||
dst->ch.blue = src->ch.blue;
|
||||
dst->ch.green = src->ch.green;
|
||||
dst->ch.red = src->ch.red;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
void _ra_port_display_callback(display_callback_args_t *p_args)
|
||||
{
|
||||
/* TFT-Callback */
|
||||
}
|
||||
|
||||
static void disp_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p)
|
||||
{
|
||||
#ifdef PKG_USING_ILI9341
|
||||
lcd_fill_array_spi(area->x1, area->y1, area->x2, area->y2, color_p);
|
||||
#elif DLG_LVGL_USE_GPU_RA6M3
|
||||
lv_port_gpu_blit(area->x1, area->y1, color_p, area);
|
||||
#else
|
||||
int x1, x2, y1, y2;
|
||||
|
||||
x1 = area->x1;
|
||||
x2 = area->x2;
|
||||
y1 = area->y1;
|
||||
y2 = area->y2;
|
||||
|
||||
/*Return if the area is out the screen*/
|
||||
if (x2 < 0)
|
||||
return;
|
||||
if (y2 < 0)
|
||||
return;
|
||||
if (x1 > info.width - 1)
|
||||
return;
|
||||
if (y1 > info.height - 1)
|
||||
return;
|
||||
|
||||
/*Truncate the area to the screen*/
|
||||
int32_t act_x1 = x1 < 0 ? 0 : x1;
|
||||
int32_t act_y1 = y1 < 0 ? 0 : y1;
|
||||
int32_t act_x2 = x2 > info.width - 1 ? info.width - 1 : x2;
|
||||
int32_t act_y2 = y2 > info.height - 1 ? info.height - 1 : y2;
|
||||
|
||||
uint32_t x;
|
||||
uint32_t y;
|
||||
long int location = 0;
|
||||
|
||||
/* color_p is a buffer pointer; the buffer is provided by LVGL */
|
||||
lv_color16_t *fbp16 = (lv_color16_t *)info.framebuffer;
|
||||
|
||||
for (y = act_y1; y <= act_y2; y++)
|
||||
{
|
||||
for (x = act_x1; x <= act_x2; x++)
|
||||
{
|
||||
location = (x) + (y) * info.width;
|
||||
color_to16_maybe(&fbp16[location], color_p);
|
||||
color_p++;
|
||||
}
|
||||
|
||||
color_p += x2 - act_x2;
|
||||
}
|
||||
#endif
|
||||
lv_disp_flush_ready(disp_drv);
|
||||
}
|
||||
|
||||
void lv_port_disp_init(void)
|
||||
{
|
||||
#ifdef PKG_USING_ILI9341
|
||||
spi_lcd_init(20);
|
||||
#else
|
||||
static rt_device_t device;
|
||||
/* LCD Device Init */
|
||||
device = rt_device_find("lcd");
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
if (rt_device_open(device, RT_DEVICE_OFLAG_RDWR) == RT_EOK)
|
||||
{
|
||||
rt_device_control(device, RTGRAPHIC_CTRL_GET_INFO, &info);
|
||||
}
|
||||
|
||||
RT_ASSERT(info.bits_per_pixel == 8 || info.bits_per_pixel == 16 ||
|
||||
info.bits_per_pixel == 24 || info.bits_per_pixel == 32);
|
||||
#endif
|
||||
/*Initialize `disp_buf` with the buffer(s). With only one buffer use NULL instead buf_2 */
|
||||
lv_disp_draw_buf_init(&disp_buf, buf_1, NULL, COLOR_BUFFER);
|
||||
|
||||
lv_disp_drv_init(&disp_drv); /*Basic initialization*/
|
||||
|
||||
/*Set the resolution of the display*/
|
||||
disp_drv.hor_res = LV_HOR_RES_MAX;
|
||||
disp_drv.ver_res = LV_VER_RES_MAX;
|
||||
|
||||
/*Set a display buffer*/
|
||||
disp_drv.draw_buf = &disp_buf;
|
||||
|
||||
/*Used to copy the buffer's content to the display*/
|
||||
disp_drv.flush_cb = disp_flush;
|
||||
|
||||
#if DLG_LVGL_USE_GPU_RA6M3
|
||||
/* Initialize GPU module */
|
||||
G2d_Drv_HWInit();
|
||||
#endif /* LV_PORT_DISP_GPU_EN */
|
||||
|
||||
/*Finally register the driver*/
|
||||
lv_disp_drv_register(&disp_drv);
|
||||
}
|
||||
136
bsp/renesas/ra8m1-ek/board/lvgl/lv_port_indev.c
Normal file
136
bsp/renesas/ra8m1-ek/board/lvgl/lv_port_indev.c
Normal file
@@ -0,0 +1,136 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023-03-09 Rbb666 The first version
|
||||
*/
|
||||
#include <lvgl.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#include "gt911.h"
|
||||
|
||||
#define DBG_TAG "lv_port_indev"
|
||||
#define DBG_LVL DBG_LOG
|
||||
#include <rtdbg.h>
|
||||
|
||||
#include "hal_data.h"
|
||||
|
||||
#define GT911_IRQ_PIN BSP_IO_PORT_00_PIN_04
|
||||
#define GT911_RST_PIN BSP_IO_PORT_08_PIN_01
|
||||
|
||||
static rt_device_t touch_dev;
|
||||
static lv_indev_t *touch_indev;
|
||||
struct rt_touch_data *read_data;
|
||||
|
||||
volatile static rt_uint8_t touch_detect_flag = 0;
|
||||
|
||||
static void touchpad_read(lv_indev_drv_t *indev, lv_indev_data_t *data)
|
||||
{
|
||||
if (touch_detect_flag != 1)
|
||||
return;
|
||||
|
||||
rt_device_read(touch_dev, 0, read_data, 1);
|
||||
|
||||
if (read_data->event == RT_TOUCH_EVENT_NONE)
|
||||
return;
|
||||
|
||||
data->point.x = read_data->x_coordinate;
|
||||
data->point.y = read_data->y_coordinate;
|
||||
|
||||
if (read_data->event == RT_TOUCH_EVENT_DOWN)
|
||||
data->state = LV_INDEV_STATE_PR;
|
||||
if (read_data->event == RT_TOUCH_EVENT_MOVE)
|
||||
data->state = LV_INDEV_STATE_PR;
|
||||
if (read_data->event == RT_TOUCH_EVENT_UP)
|
||||
data->state = LV_INDEV_STATE_REL;
|
||||
|
||||
touch_detect_flag = 0;
|
||||
rt_device_control(touch_dev, RT_TOUCH_CTRL_ENABLE_INT, RT_NULL);
|
||||
}
|
||||
|
||||
static rt_err_t rx_callback(rt_device_t dev, rt_size_t size)
|
||||
{
|
||||
touch_detect_flag = 1;
|
||||
rt_device_control(dev, RT_TOUCH_CTRL_DISABLE_INT, RT_NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
rt_err_t gt911_probe(rt_uint16_t x, rt_uint16_t y)
|
||||
{
|
||||
void *id;
|
||||
|
||||
touch_dev = rt_device_find("gt911");
|
||||
if (touch_dev == RT_NULL)
|
||||
{
|
||||
rt_kprintf("can't find device gt911\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (rt_device_open(touch_dev, RT_DEVICE_FLAG_INT_RX) != RT_EOK)
|
||||
{
|
||||
rt_kprintf("open device failed!");
|
||||
return -1;
|
||||
}
|
||||
|
||||
id = rt_malloc(sizeof(rt_uint8_t) * 8);
|
||||
rt_device_control(touch_dev, RT_TOUCH_CTRL_GET_ID, id);
|
||||
rt_uint8_t *read_id = (rt_uint8_t *)id;
|
||||
rt_kprintf("id = GT%d%d%d \n", read_id[0] - '0', read_id[1] - '0', read_id[2] - '0');
|
||||
|
||||
rt_device_control(touch_dev, RT_TOUCH_CTRL_SET_X_RANGE, &x); /* if possible you can set your x y coordinate*/
|
||||
rt_device_control(touch_dev, RT_TOUCH_CTRL_SET_Y_RANGE, &y);
|
||||
rt_device_control(touch_dev, RT_TOUCH_CTRL_GET_INFO, id);
|
||||
rt_kprintf("range_x = %d \n", (*(struct rt_touch_info *)id).range_x);
|
||||
rt_kprintf("range_y = %d \n", (*(struct rt_touch_info *)id).range_y);
|
||||
rt_kprintf("point_num = %d \n", (*(struct rt_touch_info *)id).point_num);
|
||||
rt_free(id);
|
||||
|
||||
rt_device_set_rx_indicate(touch_dev, rx_callback);
|
||||
|
||||
read_data = (struct rt_touch_data *)rt_calloc(1, sizeof(struct rt_touch_data));
|
||||
if (!read_data)
|
||||
{
|
||||
return -RT_ENOMEM;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
#define RST_PIN "p801"
|
||||
#define INT_PIN "p004"
|
||||
|
||||
rt_err_t rt_hw_gt911_register(void)
|
||||
{
|
||||
struct rt_touch_config cfg;
|
||||
rt_base_t int_pin = rt_pin_get(INT_PIN);
|
||||
rt_base_t rst_pin = rt_pin_get(RST_PIN);
|
||||
|
||||
cfg.dev_name = "i2c1";
|
||||
cfg.irq_pin.pin = int_pin;
|
||||
cfg.irq_pin.mode = PIN_MODE_INPUT_PULLDOWN;
|
||||
cfg.user_data = &rst_pin;
|
||||
|
||||
rt_hw_gt911_init("gt911", &cfg);
|
||||
|
||||
gt911_probe(480, 272);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
void lv_port_indev_init(void)
|
||||
{
|
||||
static lv_indev_drv_t indev_drv; /* Descriptor of a input device driver */
|
||||
lv_indev_drv_init(&indev_drv); /* Basic initialization */
|
||||
indev_drv.type = LV_INDEV_TYPE_POINTER; /* Touch pad is a pointer-like device */
|
||||
indev_drv.read_cb = touchpad_read; /* Set your driver function */
|
||||
|
||||
/* Register the driver in LVGL and save the created input device object */
|
||||
touch_indev = lv_indev_drv_register(&indev_drv);
|
||||
|
||||
/* Register touch device */
|
||||
rt_err_t res = rt_hw_gt911_register();
|
||||
RT_ASSERT(res == RT_EOK);
|
||||
}
|
||||
16
bsp/renesas/ra8m1-ek/board/ports/SConscript
Normal file
16
bsp/renesas/ra8m1-ek/board/ports/SConscript
Normal file
@@ -0,0 +1,16 @@
|
||||
import os
|
||||
from building import *
|
||||
|
||||
src = []
|
||||
objs = []
|
||||
cwd = GetCurrentDir()
|
||||
CPPPATH = [cwd]
|
||||
|
||||
objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
list = os.listdir(cwd)
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
82
bsp/renesas/ra8m1-ek/board/ports/gpio_cfg.h
Normal file
82
bsp/renesas/ra8m1-ek/board/ports/gpio_cfg.h
Normal file
@@ -0,0 +1,82 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-01-19 Sherman first version
|
||||
*/
|
||||
|
||||
/* Number of IRQ channels on the device */
|
||||
#define RA_IRQ_MAX 16
|
||||
|
||||
/* PIN to IRQx table */
|
||||
#define PIN2IRQX_TABLE(pin) \
|
||||
{ \
|
||||
switch (pin) \
|
||||
{ \
|
||||
case BSP_IO_PORT_04_PIN_00: \
|
||||
case BSP_IO_PORT_02_PIN_06: \
|
||||
case BSP_IO_PORT_01_PIN_05: \
|
||||
return 0; \
|
||||
case BSP_IO_PORT_02_PIN_05: \
|
||||
case BSP_IO_PORT_01_PIN_01: \
|
||||
case BSP_IO_PORT_01_PIN_04: \
|
||||
return 1; \
|
||||
case BSP_IO_PORT_02_PIN_03: \
|
||||
case BSP_IO_PORT_01_PIN_00: \
|
||||
case BSP_IO_PORT_02_PIN_13: \
|
||||
return 2; \
|
||||
case BSP_IO_PORT_02_PIN_02: \
|
||||
case BSP_IO_PORT_01_PIN_10: \
|
||||
case BSP_IO_PORT_02_PIN_12: \
|
||||
return 3; \
|
||||
case BSP_IO_PORT_04_PIN_02: \
|
||||
case BSP_IO_PORT_01_PIN_11: \
|
||||
case BSP_IO_PORT_04_PIN_11: \
|
||||
return 4; \
|
||||
case BSP_IO_PORT_04_PIN_01: \
|
||||
case BSP_IO_PORT_03_PIN_02: \
|
||||
case BSP_IO_PORT_04_PIN_10: \
|
||||
return 5; \
|
||||
case BSP_IO_PORT_03_PIN_01: \
|
||||
case BSP_IO_PORT_00_PIN_00: \
|
||||
case BSP_IO_PORT_04_PIN_09: \
|
||||
return 6; \
|
||||
case BSP_IO_PORT_00_PIN_01: \
|
||||
case BSP_IO_PORT_04_PIN_08: \
|
||||
return 7; \
|
||||
case BSP_IO_PORT_00_PIN_02: \
|
||||
case BSP_IO_PORT_03_PIN_05: \
|
||||
case BSP_IO_PORT_04_PIN_15: \
|
||||
return 8; \
|
||||
case BSP_IO_PORT_00_PIN_04: \
|
||||
case BSP_IO_PORT_03_PIN_04: \
|
||||
case BSP_IO_PORT_04_PIN_14: \
|
||||
return 9; \
|
||||
case BSP_IO_PORT_00_PIN_05: \
|
||||
case BSP_IO_PORT_07_PIN_09: \
|
||||
return 10; \
|
||||
case BSP_IO_PORT_05_PIN_01: \
|
||||
case BSP_IO_PORT_00_PIN_06: \
|
||||
case BSP_IO_PORT_07_PIN_08: \
|
||||
return 11; \
|
||||
case BSP_IO_PORT_05_PIN_02: \
|
||||
case BSP_IO_PORT_00_PIN_08: \
|
||||
return 12; \
|
||||
case BSP_IO_PORT_00_PIN_15: \
|
||||
case BSP_IO_PORT_00_PIN_09: \
|
||||
return 13; \
|
||||
case BSP_IO_PORT_04_PIN_03: \
|
||||
case BSP_IO_PORT_05_PIN_12: \
|
||||
case BSP_IO_PORT_05_PIN_05: \
|
||||
return 14; \
|
||||
case BSP_IO_PORT_04_PIN_04: \
|
||||
case BSP_IO_PORT_05_PIN_11: \
|
||||
case BSP_IO_PORT_05_PIN_06: \
|
||||
return 15; \
|
||||
default : \
|
||||
return -1; \
|
||||
} \
|
||||
}
|
||||
130
bsp/renesas/ra8m1-ek/board/ports/mnt.c
Normal file
130
bsp/renesas/ra8m1-ek/board/ports/mnt.c
Normal file
@@ -0,0 +1,130 @@
|
||||
#include <rtthread.h>
|
||||
#include "hal_data.h"
|
||||
|
||||
#ifdef BSP_USING_FS
|
||||
|
||||
#include <dfs_fs.h>
|
||||
|
||||
#define DBG_TAG "app.filesystem"
|
||||
#define DBG_LVL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
#ifdef BSP_USING_SDCARD_FS
|
||||
#include <drv_sdhi.h>
|
||||
|
||||
/* SD Card hot plug detection pin */
|
||||
#define SD_CHECK_PIN "p405"
|
||||
|
||||
static rt_base_t sd_check_pin = 0;
|
||||
|
||||
static void _sdcard_mount(void)
|
||||
{
|
||||
rt_device_t device;
|
||||
|
||||
device = rt_device_find("sd");
|
||||
rt_kprintf("rt_device_find %x \r\n", device);
|
||||
if (device == NULL)
|
||||
{
|
||||
mmcsd_wait_cd_changed(0);
|
||||
sdcard_change();
|
||||
mmcsd_wait_cd_changed(RT_WAITING_FOREVER);
|
||||
device = rt_device_find("sd");
|
||||
}
|
||||
|
||||
if (device != RT_NULL)
|
||||
{
|
||||
if (dfs_mount("sd", "/", "elm", 0, 0) == RT_EOK)
|
||||
{
|
||||
LOG_I("sd card mount to '/'");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_W("sd card mount to '/' failed!");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void _sdcard_unmount(void)
|
||||
{
|
||||
rt_thread_mdelay(200);
|
||||
dfs_unmount("/sdcard");
|
||||
LOG_I("Unmount \"/sdcard\"");
|
||||
|
||||
mmcsd_wait_cd_changed(0);
|
||||
sdcard_change();
|
||||
mmcsd_wait_cd_changed(RT_WAITING_FOREVER);
|
||||
}
|
||||
|
||||
static void sd_auto_mount(void *parameter)
|
||||
{
|
||||
rt_uint8_t re_sd_check_pin = 1;
|
||||
rt_thread_mdelay(20);
|
||||
|
||||
if (!rt_pin_read(sd_check_pin))
|
||||
{
|
||||
_sdcard_mount();
|
||||
}
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_thread_mdelay(200);
|
||||
|
||||
if (re_sd_check_pin && (re_sd_check_pin = rt_pin_read(sd_check_pin)) == 0)
|
||||
{
|
||||
_sdcard_mount();
|
||||
}
|
||||
|
||||
if (!re_sd_check_pin && (re_sd_check_pin = rt_pin_read(sd_check_pin)) != 0)
|
||||
{
|
||||
_sdcard_unmount();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void sd_mount(void)
|
||||
{
|
||||
rt_thread_t tid;
|
||||
|
||||
sd_check_pin = rt_pin_get(SD_CHECK_PIN);
|
||||
rt_pin_mode(sd_check_pin, PIN_MODE_INPUT_PULLUP);
|
||||
|
||||
tid = rt_thread_create("sd_mount", sd_auto_mount, RT_NULL,
|
||||
2048, RT_THREAD_PRIORITY_MAX - 2, 20);
|
||||
if (tid != RT_NULL)
|
||||
{
|
||||
rt_thread_startup(tid);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("create sd_mount thread err!");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
#include <spi_msd.h>
|
||||
#include "drv_sci_spi.h"
|
||||
int sd_mount(void)
|
||||
{
|
||||
uint32_t cs_pin = BSP_IO_PORT_06_PIN_11;
|
||||
rt_hw_sci_spi_device_attach("scpi7", "scpi70", cs_pin);
|
||||
msd_init("sd0", "scpi70");
|
||||
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
|
||||
{
|
||||
LOG_I("Mount \"/dev/sd0\" on \"/\"\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_W("sd card mount to '/' failed!");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif /* BSP_USING_SDCARD_FS */
|
||||
|
||||
int mount_init(void)
|
||||
{
|
||||
sd_mount();
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_ENV_EXPORT(mount_init);
|
||||
#endif
|
||||
20
bsp/renesas/ra8m1-ek/board/ra8_it.c
Normal file
20
bsp/renesas/ra8m1-ek/board/ra8_it.c
Normal file
@@ -0,0 +1,20 @@
|
||||
#include <rtthread.h>
|
||||
#include "hal_data.h"
|
||||
|
||||
#ifdef BSP_USING_SCI_SPI
|
||||
rt_weak void sci_spi3_callback(spi_callback_args_t *p_args)
|
||||
{
|
||||
}
|
||||
|
||||
rt_weak void sci_spi4_callback(spi_callback_args_t *p_args)
|
||||
{
|
||||
}
|
||||
|
||||
rt_weak void sci_spi6_callback(spi_callback_args_t *p_args)
|
||||
{
|
||||
}
|
||||
|
||||
rt_weak void sci_spi7_callback(spi_callback_args_t *p_args)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
161
bsp/renesas/ra8m1-ek/buildinfo.gpdsc
Normal file
161
bsp/renesas/ra8m1-ek/buildinfo.gpdsc
Normal file
@@ -0,0 +1,161 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<package xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<vendor>Renesas</vendor>
|
||||
<name>Project Content</name>
|
||||
<description>Project content managed by the Renesas Smart Configurator</description>
|
||||
<url/>
|
||||
<releases>
|
||||
<release version="1.0.0"/>
|
||||
</releases>
|
||||
<generators>
|
||||
<generator id="Renesas RA Smart Configurator">
|
||||
<project_files>
|
||||
<file category="include" name="src/"/>
|
||||
<file category="source" name="src/hal_entry.c"/>
|
||||
</project_files>
|
||||
</generator>
|
||||
</generators>
|
||||
<components generator="Renesas RA Smart Configurator">
|
||||
<component Cclass="Flex Software" Cgroup="Components" Csub="ra">
|
||||
<files>
|
||||
<file category="include" name="ra/arm/CMSIS_5/CMSIS/Core/Include/"/>
|
||||
<file category="include" name="ra/fsp/inc/"/>
|
||||
<file category="include" name="ra/fsp/inc/api/"/>
|
||||
<file category="include" name="ra/fsp/inc/instances/"/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm85.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_starmc1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/pac_armv81.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h" path=""/>
|
||||
<file category="other" name="ra/arm/CMSIS_5/LICENSE.txt"/>
|
||||
<file category="header" name="ra/board/ra8m1_ek/board.h" path=""/>
|
||||
<file category="header" name="ra/board/ra8m1_ek/board_ethernet_phy.h" path=""/>
|
||||
<file category="source" name="ra/board/ra8m1_ek/board_init.c"/>
|
||||
<file category="header" name="ra/board/ra8m1_ek/board_init.h" path=""/>
|
||||
<file category="source" name="ra/board/ra8m1_ek/board_leds.c"/>
|
||||
<file category="header" name="ra/board/ra8m1_ek/board_leds.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/fsp_common_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_sci_b_uart.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/R7FA8M1AH.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
|
||||
<file category="other" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_common.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_delay.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_exceptions.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_guard.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_io.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_irq.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c"/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_security.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_tfu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra8m1/bsp_elc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra8m1/bsp_feature.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra8m1/bsp_mcu_info.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra8m1/bsp_override.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
|
||||
<file category="other" name="ra/fsp/src/r_ioport/r_ioport.o"/>
|
||||
<file category="source" name="ra/fsp/src/r_sci_b_uart/r_sci_b_uart.c"/>
|
||||
<file category="other" name="ra/fsp/src/r_sci_b_uart/r_sci_b_uart.o"/>
|
||||
<file category="other" name="ra/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Build Configuration">
|
||||
<files>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/"/>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/bsp/"/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/board_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_sci_b_uart_cfg.h" path=""/>
|
||||
<file category="other" name="ra_cfg/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Generated Data">
|
||||
<files>
|
||||
<file category="include" name="ra_gen/"/>
|
||||
<file category="header" name="ra_gen/bsp_clock_cfg.h" path=""/>
|
||||
<file category="source" name="ra_gen/common_data.c"/>
|
||||
<file category="header" name="ra_gen/common_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/hal_data.c"/>
|
||||
<file category="header" name="ra_gen/hal_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/main.c"/>
|
||||
<file category="source" name="ra_gen/pin_data.c"/>
|
||||
<file category="other" name="ra_gen/SConscript"/>
|
||||
<file category="source" name="ra_gen/vector_data.c"/>
|
||||
<file category="header" name="ra_gen/vector_data.h" path=""/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Linker Script">
|
||||
<files>
|
||||
<file category="linkerScript" name="script/fsp.scat"/>
|
||||
<file category="other" name="script/ac6/fsp_keep.via"/>
|
||||
</files>
|
||||
</component>
|
||||
</components>
|
||||
</package>
|
||||
640
bsp/renesas/ra8m1-ek/configuration.xml
Normal file
640
bsp/renesas/ra8m1-ek/configuration.xml
Normal file
File diff suppressed because it is too large
Load Diff
BIN
bsp/renesas/ra8m1-ek/docs/picture/front.png
Normal file
BIN
bsp/renesas/ra8m1-ek/docs/picture/front.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 120 KiB |
752
bsp/renesas/ra8m1-ek/project.uvoptx
Normal file
752
bsp/renesas/ra8m1-ek/project.uvoptx
Normal file
File diff suppressed because it is too large
Load Diff
670
bsp/renesas/ra8m1-ek/project.uvprojx
Normal file
670
bsp/renesas/ra8m1-ek/project.uvprojx
Normal file
File diff suppressed because it is too large
Load Diff
26
bsp/renesas/ra8m1-ek/ra/SConscript
Normal file
26
bsp/renesas/ra8m1-ek/ra/SConscript
Normal file
@@ -0,0 +1,26 @@
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
from gcc import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
group = []
|
||||
CPPPATH = []
|
||||
|
||||
if rtconfig.PLATFORM in ['iccarm']:
|
||||
print("\nThe current project does not support IAR build\n")
|
||||
Return('group')
|
||||
elif rtconfig.PLATFORM in GetGCCLikePLATFORM():
|
||||
if GetOption('target') != 'mdk5':
|
||||
src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c')
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c']
|
||||
src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c']
|
||||
src += Glob(cwd + '/fsp/src/r_*/*.c')
|
||||
CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include',
|
||||
cwd + '/fsp/inc',
|
||||
cwd + '/fsp/inc/api',
|
||||
cwd + '/fsp/inc/instances',]
|
||||
|
||||
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
@@ -0,0 +1,411 @@
|
||||
/******************************************************************************
|
||||
* @file cachel1_armv7.h
|
||||
* @brief CMSIS Level 1 Cache API for Armv7-M and later
|
||||
* @version V1.0.1
|
||||
* @date 19. April 2021
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020-2021 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_CACHEL1_ARMV7_H
|
||||
#define ARM_CACHEL1_ARMV7_H
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_CacheFunctions Cache Functions
|
||||
\brief Functions that configure Instruction and Data cache.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Cache Size ID Register Macros */
|
||||
#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
|
||||
#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
|
||||
|
||||
#ifndef __SCB_DCACHE_LINE_SIZE
|
||||
#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
|
||||
#endif
|
||||
|
||||
#ifndef __SCB_ICACHE_LINE_SIZE
|
||||
#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
|
||||
#endif
|
||||
|
||||
/**
|
||||
\brief Enable I-Cache
|
||||
\details Turns on I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_EnableICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable I-Cache
|
||||
\details Turns off I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_DisableICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
|
||||
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Invalidate I-Cache
|
||||
\details Invalidates I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->ICIALLU = 0UL;
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief I-Cache Invalidate by address
|
||||
\details Invalidates I-Cache for the given address.
|
||||
I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
I-Cache memory blocks which are part of given address + given size are invalidated.
|
||||
\param[in] addr address
|
||||
\param[in] isize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
if ( isize > 0 ) {
|
||||
int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_ICACHE_LINE_SIZE;
|
||||
op_size -= __SCB_ICACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Enable D-Cache
|
||||
\details Turns on D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_EnableDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
|
||||
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
__DSB();
|
||||
|
||||
SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable D-Cache
|
||||
\details Turns off D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_DisableDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean & invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
|
||||
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Invalidate D-Cache
|
||||
\details Invalidates D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
|
||||
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clean D-Cache
|
||||
\details Cleans D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
|
||||
((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clean & Invalidate D-Cache
|
||||
\details Cleans and Invalidates D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean & invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
|
||||
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Invalidate by address
|
||||
\details Invalidates D-Cache for the given address.
|
||||
D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are invalidated.
|
||||
\param[in] addr address
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Clean by address
|
||||
\details Cleans D-Cache for the given address
|
||||
D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are cleaned.
|
||||
\param[in] addr address
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Clean and Invalidate by address
|
||||
\details Cleans and invalidates D_Cache for the given address
|
||||
D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
|
||||
\param[in] addr address (aligned to 32-byte boundary)
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@} end of CMSIS_Core_CacheFunctions */
|
||||
|
||||
#endif /* ARM_CACHEL1_ARMV7_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,283 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user