Merge pull request #44 from RT-Thread/master

update
This commit is contained in:
Meco Jianting Man
2021-04-22 12:27:28 +08:00
committed by GitHub
12 changed files with 1033 additions and 1221 deletions
+96 -96
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -46,12 +46,12 @@ int mdelay(int value)
#if defined (CONFIG_SMC911X_32_BIT)
rt_inline uint32_t smc911x_reg_read(struct eth_device_smc911x *dev, uint32_t offset)
{
return *(volatile uint32_t*)(dev->iobase + offset);
return *(volatile uint32_t *)(dev->iobase + offset);
}
rt_inline void smc911x_reg_write(struct eth_device_smc911x *dev, uint32_t offset, uint32_t val)
{
*(volatile uint32_t*)(dev->iobase + offset) = val;
*(volatile uint32_t *)(dev->iobase + offset) = val;
}
#elif defined (CONFIG_SMC911X_16_BIT)
@@ -78,47 +78,47 @@ struct chip_id
static const struct chip_id chip_ids[] =
{
{ CHIP_89218,"LAN89218" },
{ CHIP_9115, "LAN9115" },
{ CHIP_9116, "LAN9116" },
{ CHIP_9117, "LAN9117" },
{ CHIP_9118, "LAN9118" },
{ CHIP_9211, "LAN9211" },
{ CHIP_9215, "LAN9215" },
{ CHIP_9216, "LAN9216" },
{ CHIP_9217, "LAN9217" },
{ CHIP_9218, "LAN9218" },
{ CHIP_9220, "LAN9220" },
{ CHIP_9221, "LAN9221" },
{ LAN9118_ID_89218, "LAN89218" },
{ LAN9118_ID_9115, "LAN9115" },
{ LAN9118_ID_9116, "LAN9116" },
{ LAN9118_ID_9117, "LAN9117" },
{ LAN9118_ID_9118, "LAN9118" },
{ LAN9210_ID_9211, "LAN9211" },
{ LAN9218_ID_9215, "LAN9215" },
{ LAN9218_ID_9216, "LAN9216" },
{ LAN9218_ID_9217, "LAN9217" },
{ LAN9218_ID_9218, "LAN9218" },
{ LAN9220_ID_9220, "LAN9220" },
{ LAN9220_ID_9221, "LAN9221" },
{ 0, RT_NULL },
};
static uint32_t smc911x_get_mac_csr(struct eth_device_smc911x *dev, uint8_t reg)
{
while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY) ;
while (smc911x_reg_read(dev, LAN9118_MAC_CSR_CMD) & LAN9118_MAC_CSR_CMD_BUSY) ;
smc911x_reg_write(dev, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
smc911x_reg_write(dev, LAN9118_MAC_CSR_CMD, LAN9118_MAC_CSR_CMD_BUSY | LAN9118_MAC_CSR_CMD_R | reg);
while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY) ;
while (smc911x_reg_read(dev, LAN9118_MAC_CSR_CMD) & LAN9118_MAC_CSR_CMD_BUSY) ;
return smc911x_reg_read(dev, MAC_CSR_DATA);
return smc911x_reg_read(dev, LAN9118_MAC_CSR_DATA);
}
static void smc911x_set_mac_csr(struct eth_device_smc911x *dev, uint8_t reg, uint32_t data)
{
while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY) ;
while (smc911x_reg_read(dev, LAN9118_MAC_CSR_CMD) & LAN9118_MAC_CSR_CMD_BUSY) ;
smc911x_reg_write(dev, MAC_CSR_DATA, data);
smc911x_reg_write(dev, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
smc911x_reg_write(dev, LAN9118_MAC_CSR_DATA, data);
smc911x_reg_write(dev, LAN9118_MAC_CSR_CMD, LAN9118_MAC_CSR_CMD_BUSY | reg);
while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY) ;
while (smc911x_reg_read(dev, LAN9118_MAC_CSR_CMD) & LAN9118_MAC_CSR_CMD_BUSY) ;
}
static int smc911x_detect_chip(struct eth_device_smc911x *dev)
{
unsigned long val, i;
val = smc911x_reg_read(dev, BYTE_TEST);
val = smc911x_reg_read(dev, LAN9118_BYTE_TEST);
if (val == 0xffffffff)
{
/* Special case -- no chip present */
@@ -130,7 +130,7 @@ static int smc911x_detect_chip(struct eth_device_smc911x *dev)
return -1;
}
val = smc911x_reg_read(dev, ID_REV) >> 16;
val = smc911x_reg_read(dev, LAN9118_ID_REV) >> 16;
for (i = 0; chip_ids[i].id != 0; i++)
{
if (chip_ids[i].id == val) break;
@@ -151,16 +151,16 @@ static void smc911x_reset(struct eth_device_smc911x *dev)
/*
* Take out of PM setting first
* Device is already wake up if PMT_CTRL_READY bit is set
* Device is already wake up if LAN9118_PMT_CTRL_READY bit is set
*/
if ((smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) == 0)
if ((smc911x_reg_read(dev, LAN9118_PMT_CTRL) & LAN9118_PMT_CTRL_READY) == 0)
{
/* Write to the bytetest will take out of powerdown */
smc911x_reg_write(dev, BYTE_TEST, 0x0);
smc911x_reg_write(dev, LAN9118_BYTE_TEST, 0x0);
timeout = 10;
while (timeout-- && !(smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY))
while (timeout-- && !(smc911x_reg_read(dev, LAN9118_PMT_CTRL) & LAN9118_PMT_CTRL_READY))
udelay(10);
if (timeout < 0)
@@ -172,11 +172,11 @@ static void smc911x_reset(struct eth_device_smc911x *dev)
}
/* Disable interrupts */
smc911x_reg_write(dev, INT_EN, 0);
smc911x_reg_write(dev, HW_CFG, HW_CFG_SRST);
smc911x_reg_write(dev, LAN9118_INT_EN, 0);
smc911x_reg_write(dev, LAN9118_HW_CFG, LAN9118_HW_CFG_SRST);
timeout = 1000;
while (timeout-- && smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY)
while (timeout-- && smc911x_reg_read(dev, LAN9118_E2P_CMD) & LAN9118_E2P_CMD)
udelay(10);
if (timeout < 0)
@@ -186,11 +186,11 @@ static void smc911x_reset(struct eth_device_smc911x *dev)
}
/* Reset the FIFO level and flow control settings */
smc911x_set_mac_csr(dev, FLOW, FLOW_FCPT | FLOW_FCEN);
smc911x_reg_write(dev, AFC_CFG, 0x0050287F);
smc911x_set_mac_csr(dev, LAN9118_FLOW, LAN9118_FLOW_FCPT(0xffff) | LAN9118_FLOW_FCEN);
smc911x_reg_write(dev, LAN9118_AFC_CFG, 0x0050287F);
/* Set to LED outputs */
smc911x_reg_write(dev, GPIO_CFG, 0x70070000);
smc911x_reg_write(dev, LAN9118_GPIO_CFG, 0x70070000);
}
static void smc911x_handle_mac_address(struct eth_device_smc911x *dev)
@@ -201,20 +201,20 @@ static void smc911x_handle_mac_address(struct eth_device_smc911x *dev)
addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
addrh = m[4] | (m[5] << 8);
smc911x_set_mac_csr(dev, ADDRL, addrl);
smc911x_set_mac_csr(dev, ADDRH, addrh);
smc911x_set_mac_csr(dev, LAN9118_ADDRL, addrl);
smc911x_set_mac_csr(dev, LAN9118_ADDRH, addrh);
}
static int smc911x_eth_phy_read(struct eth_device_smc911x *dev,
uint8_t phy, uint8_t reg, uint16_t *val)
{
while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY) ;
while (smc911x_get_mac_csr(dev, LAN9118_MII_ACC) & LAN9118_MII_ACC_MIIBZY) ;
smc911x_set_mac_csr(dev, MII_ACC, phy << 11 | reg << 6 | MII_ACC_MII_BUSY);
smc911x_set_mac_csr(dev, LAN9118_MII_ACC, phy << 11 | reg << 6 | LAN9118_MII_ACC_MIIBZY);
while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY) ;
while (smc911x_get_mac_csr(dev, LAN9118_MII_ACC) & LAN9118_MII_ACC_MIIBZY) ;
*val = smc911x_get_mac_csr(dev, MII_DATA);
*val = smc911x_get_mac_csr(dev, LAN9118_MII_DATA);
return 0;
}
@@ -222,14 +222,14 @@ static int smc911x_eth_phy_read(struct eth_device_smc911x *dev,
static int smc911x_eth_phy_write(struct eth_device_smc911x *dev,
uint8_t phy, uint8_t reg, uint16_t val)
{
while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
while (smc911x_get_mac_csr(dev, LAN9118_MII_ACC) & LAN9118_MII_ACC_MIIBZY)
;
smc911x_set_mac_csr(dev, MII_DATA, val);
smc911x_set_mac_csr(dev, MII_ACC,
phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
smc911x_set_mac_csr(dev, LAN9118_MII_DATA, val);
smc911x_set_mac_csr(dev, LAN9118_MII_ACC,
phy << 11 | reg << 6 | LAN9118_MII_ACC_MIIBZY | LAN9118_MII_ACC_MIIWNR);
while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
while (smc911x_get_mac_csr(dev, LAN9118_MII_ACC) & LAN9118_MII_ACC_MIIBZY)
;
return 0;
}
@@ -238,10 +238,10 @@ static int smc911x_phy_reset(struct eth_device_smc911x *dev)
{
uint32_t reg;
reg = smc911x_reg_read(dev, PMT_CTRL);
reg = smc911x_reg_read(dev, LAN9118_PMT_CTRL);
reg &= ~0xfffff030;
reg |= PMT_CTRL_PHY_RST;
smc911x_reg_write(dev, PMT_CTRL, reg);
reg |= LAN9118_PMT_CTRL_PHY_RST;
smc911x_reg_write(dev, LAN9118_PMT_CTRL, reg);
mdelay(100);
@@ -255,10 +255,10 @@ static void smc911x_phy_configure(struct eth_device_smc911x *dev)
smc911x_phy_reset(dev);
smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET);
smc911x_eth_phy_write(dev, 1, LAN9118_MII_BMCR, LAN9118_BMCR_RESET);
mdelay(1);
smc911x_eth_phy_write(dev, 1, MII_ADVERTISE, 0x01e1);
smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
smc911x_eth_phy_write(dev, 1, LAN9118_MII_ADVERTISE, 0x01e1);
smc911x_eth_phy_write(dev, 1, LAN9118_MII_BMCR, LAN9118_BMCR_ANENABLE | LAN9118_BMCR_ANRESTART);
timeout = 5000;
do
@@ -267,10 +267,10 @@ static void smc911x_phy_configure(struct eth_device_smc911x *dev)
if ((timeout--) == 0)
goto err_out;
if (smc911x_eth_phy_read(dev, 1, MII_BMSR, &status) != 0)
if (smc911x_eth_phy_read(dev, 1, LAN9118_MII_BMSR, &status) != 0)
goto err_out;
}
while (!(status & BMSR_LSTATUS));
while (!(status & LAN9118_BMSR_LSTATUS));
return;
@@ -281,17 +281,17 @@ err_out:
static void smc911x_enable(struct eth_device_smc911x *dev)
{
/* Enable TX */
smc911x_reg_write(dev, HW_CFG, 8 << 16 | HW_CFG_SF);
smc911x_reg_write(dev, LAN9118_HW_CFG, 8 << 16 | LAN9118_HW_CFG_SF);
smc911x_reg_write(dev, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
smc911x_reg_write(dev, LAN9118_GPT_CFG, LAN9118_GPT_CFG_TIMER_EN | 10000);
smc911x_reg_write(dev, TX_CFG, TX_CFG_TX_ON);
smc911x_reg_write(dev, LAN9118_TX_CFG, LAN9118_TX_CFG_TX_ON);
/* no padding to start of packets */
smc911x_reg_write(dev, RX_CFG, 0);
smc911x_reg_write(dev, LAN9118_RX_CFG, 0);
smc911x_set_mac_csr(dev, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
MAC_CR_HBDIS);
smc911x_set_mac_csr(dev, LAN9118_MAC_CR, LAN9118_MAC_CR_TXEN | LAN9118_MAC_CR_RXEN |
LAN9118_MAC_CR_HBDIS);
}
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
@@ -329,13 +329,13 @@ static void smc911x_isr(int vector, void *param)
emac = SMC911X_EMAC_DEVICE(param);
status = smc911x_reg_read(emac, INT_STS);
if (status & INT_STS_RSFL)
status = smc911x_reg_read(emac, LAN9118_INT_STS);
if (status & LAN9118_INT_STS_RSFL)
{
eth_device_ready(&emac->parent);
}
smc911x_reg_write(emac, INT_STS, status);
smc911x_reg_write(emac, LAN9118_INT_STS, status);
return ;
}
@@ -359,18 +359,18 @@ static rt_err_t smc911x_emac_init(rt_device_t dev)
#if 1
/* Interrupt on every received packet */
smc911x_reg_write(emac, FIFO_INT, 0x01 << 8);
smc911x_reg_write(emac, INT_EN, INT_EN_RDFL_EN | INT_EN_RSFL_EN);
smc911x_reg_write(emac, LAN9118_FIFO_INT, 0x01 << 8);
smc911x_reg_write(emac, LAN9118_INT_EN, LAN9118_INT_EN_RDFL_EN | LAN9118_INT_RSFL);
/* enable interrupt */
smc911x_reg_write(emac, INT_CFG, INT_CFG_IRQ_EN | INT_CFG_IRQ_POL | INT_CFG_IRQ_TYPE);
smc911x_reg_write(emac, LAN9118_IRQ_CFG, LAN9118_IRQ_CFG_IRQ_EN | LAN9118_IRQ_CFG_IRQ_POL | LAN9118_IRQ_CFG_IRQ_TYPE);
#else
/* disable interrupt */
smc911x_reg_write(emac, INT_EN, 0);
value = smc911x_reg_read(emac, INT_CFG);
value &= ~INT_CFG_IRQ_EN;
smc911x_reg_write(emac, INT_CFG, value);
smc911x_reg_write(emac, LAN9118_INT_EN, 0);
value = smc911x_reg_read(emac, LAN9118_IRQ_CFG);
value &= ~LAN9118_IRQ_CFG_IRQ_EN;
smc911x_reg_write(emac, LAN9118_IRQ_CFG, value);
#endif
rt_hw_interrupt_install(emac->irqno, smc911x_isr, emac, "smc911x");
@@ -386,11 +386,11 @@ static rt_err_t smc911x_emac_control(rt_device_t dev, int cmd, void *args)
emac = SMC911X_EMAC_DEVICE(dev);
RT_ASSERT(emac != RT_NULL);
switch(cmd)
switch (cmd)
{
case NIOCTL_GADDR:
/* get MAC address */
if(args) rt_memcpy(args, emac->enetaddr, 6);
if (args) rt_memcpy(args, emac->enetaddr, 6);
else return -RT_ERROR;
break;
default :
@@ -402,7 +402,7 @@ static rt_err_t smc911x_emac_control(rt_device_t dev, int cmd, void *args)
/* Ethernet device interface */
/* transmit packet. */
static uint8_t tx_buf[2048];
rt_err_t smc911x_emac_tx(rt_device_t dev, struct pbuf* p)
rt_err_t smc911x_emac_tx(rt_device_t dev, struct pbuf *p)
{
struct eth_device_smc911x *emac;
@@ -418,36 +418,36 @@ rt_err_t smc911x_emac_tx(rt_device_t dev, struct pbuf* p)
pbuf_copy_partial(p, tx_buf, p->tot_len, 0);
/* send it out */
data = (uint32_t*)tx_buf;
data = (uint32_t *)tx_buf;
length = p->tot_len;
smc911x_reg_write(emac, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG | TX_CMD_A_INT_LAST_SEG | length);
smc911x_reg_write(emac, TX_DATA_FIFO, length);
smc911x_reg_write(emac, LAN9118_TXDFIFOP, LAN9118_TXC_A_FS | LAN9118_TXC_A_LS | length);
smc911x_reg_write(emac, LAN9118_TXDFIFOP, length);
tmplen = (length + 3) / 4;
while (tmplen--)
{
smc911x_reg_write(emac, TX_DATA_FIFO, *data++);
smc911x_reg_write(emac, LAN9118_TXDFIFOP, *data++);
}
/* wait for transmission */
while (!((smc911x_reg_read(emac, TX_FIFO_INF) & TX_FIFO_INF_TSUSED) >> 16));
while (!(LAN9118_TX_FIFO_INF_TXSUSED(smc911x_reg_read(emac, LAN9118_TX_FIFO_INF))));
/* get status. Ignore 'no carrier' error, it has no meaning for
* full duplex operation
*/
status = smc911x_reg_read(emac, TX_STATUS_FIFO) &
(TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
status = smc911x_reg_read(emac, LAN9118_TXSFIFOP) &
(LAN9118_TXS_LOC | LAN9118_TXS_LCOL | LAN9118_TXS_ECOL |
LAN9118_TXS_ED | LAN9118_TX_STS_UNDERRUN);
if (!status) return 0;
rt_kprintf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n",
status & TX_STS_LOC ? "TX_STS_LOC " : "",
status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "",
status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "",
status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "",
status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : "");
status & LAN9118_TXS_LOC ? "LAN9118_TXS_LOC " : "",
status & LAN9118_TXS_LCOL ? "LAN9118_TXS_LCOL " : "",
status & LAN9118_TXS_ECOL ? "LAN9118_TXS_ECOL " : "",
status & LAN9118_TXS_ED ? "LAN9118_TXS_ED " : "",
status & LAN9118_TX_STS_UNDERRUN ? "LAN9118_TX_STS_UNDERRUN" : "");
return -RT_EIO;
}
@@ -455,24 +455,24 @@ rt_err_t smc911x_emac_tx(rt_device_t dev, struct pbuf* p)
/* reception packet. */
struct pbuf *smc911x_emac_rx(rt_device_t dev)
{
struct pbuf* p = RT_NULL;
struct pbuf *p = RT_NULL;
struct eth_device_smc911x *emac;
emac = SMC911X_EMAC_DEVICE(dev);
RT_ASSERT(emac != RT_NULL);
/* take the emac buffer to the pbuf */
if ((smc911x_reg_read(emac, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED) >> 16)
if (LAN9118_RX_FIFO_INF_RXSUSED(smc911x_reg_read(emac, LAN9118_RX_FIFO_INF)))
{
uint32_t status;
uint32_t pktlen, tmplen;
status = smc911x_reg_read(emac, RX_STATUS_FIFO);
status = smc911x_reg_read(emac, LAN9118_RXSFIFOP);
/* get frame length */
pktlen = (status & RX_STS_PKT_LEN) >> 16;
pktlen = (status & LAN9118_RX_STS_PKT_LEN) >> 16;
smc911x_reg_write(emac, RX_CFG, 0);
smc911x_reg_write(emac, LAN9118_RX_CFG, 0);
tmplen = (pktlen + 3) / 4;
@@ -483,11 +483,11 @@ struct pbuf *smc911x_emac_rx(rt_device_t dev)
uint32_t *data = (uint32_t *)p->payload;
while (tmplen--)
{
*data++ = smc911x_reg_read(emac, RX_DATA_FIFO);
*data++ = smc911x_reg_read(emac, LAN9118_RXDFIFOP);
}
}
if (status & RX_STS_ES)
if (status & LAN9118_RXS_ES)
{
rt_kprintf(DRIVERNAME ": dropped bad packet. Status: 0x%08x\n", status);
}
@@ -497,7 +497,7 @@ struct pbuf *smc911x_emac_rx(rt_device_t dev)
}
#ifdef RT_USING_DEVICE_OPS
const static struct rt_device_ops smc911x_emac_ops =
const static struct rt_device_ops smc911x_emac_ops =
{
smc911x_emac_init,
RT_NULL,
@@ -520,7 +520,7 @@ int smc911x_emac_hw_init(void)
}
/* set INT CFG */
smc911x_reg_write(&_emac, INT_CFG, INT_CFG_IRQ_POL | INT_CFG_IRQ_TYPE);
smc911x_reg_write(&_emac, LAN9118_IRQ_CFG, LAN9118_IRQ_CFG_IRQ_POL | LAN9118_IRQ_CFG_IRQ_TYPE);
/* test MAC address */
_emac.enetaddr[0] = AUTOMAC0;
File diff suppressed because it is too large Load Diff
+1 -1
View File
@@ -109,7 +109,7 @@ int rt_wdt_init(void)
stm32_wdt.hiwdg.Init.Reload = 0x00000FFF;
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) \
|| defined(SOC_SERIES_STM32H7)
|| defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32L0)
stm32_wdt.hiwdg.Init.Window = 0x00000FFF;
#endif
stm32_wdt.is_start = 0;
@@ -15,6 +15,13 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_UART1
default y
config BSP_USING_KEY
bool "Enable onboard keys"
select RT_USING_PIN
select RT_USING_TIMER_SOFT
select PKG_USING_MULTIBUTTON
default n
config BSP_USING_QSPI_FLASH
bool "Enable QSPI FLASH (W25Q128 qspi1)"
select BSP_USING_QSPI
@@ -12,6 +12,9 @@ board.c
CubeMX_Config/Src/stm32l4xx_hal_msp.c
''')
if GetDepend('BSP_USING_KEY'):
src = src + ['ports/drv_key.c']
if GetDepend(['BSP_USING_QSPI_FLASH']):
src += Glob('ports/drv_qspi_flash.c')
@@ -19,7 +22,7 @@ if GetDepend('BSP_USING_SPI_LCD'):
src = src + ['ports/drv_lcd.c']
if GetDepend(['BSP_USING_SDCARD']):
src += Glob('ports/sdcard_port.c')
src += Glob('ports/drv_sdcard.c')
if GetDepend(['BSP_USING_ICM20608']) or GetDepend(['BSP_USING_AHT10']):
src += Glob('ports/sensor_port.c')
@@ -0,0 +1,122 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-04-17 Meco Man first version
*/
#include <rtthread.h>
#ifdef BSP_USING_KEY
#define DBG_TAG "KEY"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#include <rtdevice.h>
#include <drv_gpio.h>
#include <multi_button.h>
#define KEY0_PIN GET_PIN(D, 10)
#define KEY1_PIN GET_PIN(D, 9)
#define KEY2_PIN GET_PIN(D, 8)
#define KEY_WKUP_PIN GET_PIN(C, 13)
static struct rt_timer key_timer;
static struct button key0;
static struct button key1;
static struct button key2;
static struct button key_wkup;
/*---- user codes area begin ----*/
/*users can modify according to needs*/
static void key0_BtnCallback(void* state)
{
rt_kprintf("key0!\n");
}
static void key1_BtnCallback(void* state)
{
rt_kprintf("key1!\n");
}
static void key2_BtnCallback(void* state)
{
rt_kprintf("key2!\n");
}
static void key_wkup_BtnCallback(void* state)
{
rt_kprintf("key wkup!\n");
}
/*---- user codes area end ----*/
static void _cb_key_timer(void *parameter)
{
button_ticks();
}
static uint8_t _cb_key0_pin_level(void)
{
return rt_pin_read(KEY0_PIN);
}
static uint8_t _cb_key1_pin_level(void)
{
return rt_pin_read(KEY1_PIN);
}
static uint8_t _cb_key2_pin_level(void)
{
return rt_pin_read(KEY2_PIN);
}
static uint8_t _cb_key_wkup_pin_level(void)
{
return rt_pin_read(KEY_WKUP_PIN);
}
static int onboard_key_init(void)
{
rt_timer_init(&key_timer,
"key timer",
_cb_key_timer,
RT_NULL,
rt_tick_from_millisecond(TICKS_INTERVAL),
RT_TIMER_FLAG_PERIODIC | RT_TIMER_FLAG_SOFT_TIMER);
if(rt_timer_start(&key_timer) < 0)
{
LOG_E("drv_key timer initialization failed");
return -1;
}
rt_pin_mode(KEY0_PIN, PIN_MODE_INPUT);
rt_pin_mode(KEY1_PIN, PIN_MODE_INPUT);
rt_pin_mode(KEY2_PIN, PIN_MODE_INPUT);
rt_pin_mode(KEY_WKUP_PIN, PIN_MODE_INPUT);
button_init(&key0, _cb_key0_pin_level, PIN_LOW);
button_init(&key1, _cb_key1_pin_level, PIN_LOW);
button_init(&key2, _cb_key2_pin_level, PIN_LOW);
button_init(&key_wkup, _cb_key_wkup_pin_level, PIN_HIGH);
/*---- user codes area begin ----*/
/*users can modify according to needs*/
button_attach(&key0, PRESS_DOWN, key0_BtnCallback);
button_attach(&key1, PRESS_DOWN, key1_BtnCallback);
button_attach(&key2, PRESS_DOWN, key2_BtnCallback);
button_attach(&key_wkup, PRESS_UP, key_wkup_BtnCallback);
/*---- user codes area end ----*/
button_start(&key0);
button_start(&key1);
button_start(&key2);
button_start(&key_wkup);
return 0;
}
INIT_APP_EXPORT(onboard_key_init);
#endif
@@ -23,7 +23,7 @@
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
void sd_mount(void *parameter)
static void sd_mount(void *parameter)
{
while (1)
{
@@ -43,7 +43,7 @@ void sd_mount(void *parameter)
}
}
int stm32_sdcard_mount(void)
static int onboard_sdcard_mount(void)
{
rt_thread_t tid;
@@ -67,7 +67,7 @@ int stm32_sdcard_mount(void)
return RT_EOK;
}
INIT_APP_EXPORT(stm32_sdcard_mount);
INIT_APP_EXPORT(onboard_sdcard_mount);
static int rt_hw_spi1_tfcard(void)
{
+3 -3
View File
@@ -47,7 +47,7 @@ static rt_size_t _pin_write(rt_device_t dev, rt_off_t pos, const void *buffer, r
return size;
}
static rt_err_t _pin_control(rt_device_t dev, int cmd, void *args)
static rt_err_t _pin_control(rt_device_t dev, int cmd, void *args)
{
struct rt_device_pin_mode *mode;
struct rt_device_pin *pin = (struct rt_device_pin *)dev;
@@ -111,6 +111,7 @@ rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
}
return -RT_ENOSYS;
}
rt_err_t rt_pin_detach_irq(rt_int32_t pin)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
@@ -146,7 +147,7 @@ void rt_pin_write(rt_base_t pin, rt_base_t value)
}
FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_write, pinWrite, write value to hardware pin);
int rt_pin_read(rt_base_t pin)
int rt_pin_read(rt_base_t pin)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
return _hw_pin.ops->pin_read(&_hw_pin.parent, pin);
@@ -166,4 +167,3 @@ rt_base_t rt_pin_get(const char *name)
return _hw_pin.ops->pin_get(name);
}
FINSH_FUNCTION_EXPORT_ALIAS(rt_pin_get, pinGet, get pin number from hardware pin);
File diff suppressed because it is too large Load Diff
@@ -11,7 +11,8 @@
#include <rthw.h>
#include <rtdevice.h>
#include "drivers/usb_device.h"
#include "audio.h"
#include "uaudioreg.h"
#define DBG_TAG "usbd.audio.mic"
#define DBG_LVL DBG_INFO
@@ -46,9 +47,6 @@
#define UAC_MAX_PACKET_SIZE 64
#define UAC_EP_MAX_PACKET_SIZE 32
#define UAC_CHANNEL_NUM RECORD_CHANNEL
#define UAC_INTR_NUM 1
#define UAC_CH_NUM 1
#define UAC_FORMAT_NUM 1
struct uac_ac_descriptor
{
@@ -56,21 +54,21 @@ struct uac_ac_descriptor
struct uiad_descriptor iad_desc;
#endif
struct uinterface_descriptor intf_desc;
DECLARE_UAC_AC_HEADER_DESCRIPTOR(UAC_INTR_NUM) hdr_desc;
struct uac_input_terminal_descriptor it_desc;
struct uac1_output_terminal_descriptor ot_desc;
struct usb_audio_control_descriptor hdr_desc;
struct usb_audio_input_terminal it_desc;
struct usb_audio_output_terminal ot_desc;
#if UAC_USE_FEATURE_UNIT
DECLARE_UAC_FEATURE_UNIT_DESCRIPTOR(UAC_CH_NUM) feature_unit_desc;
struct usb_audio_feature_unit feature_unit_desc;
#endif
};
struct uac_as_descriptor
{
struct uinterface_descriptor intf_desc;
struct uac1_as_header_descriptor hdr_desc;
DECLARE_UAC_FORMAT_TYPE_I_DISCRETE_DESC(UAC_FORMAT_NUM) format_type_desc;
struct usb_audio_streaming_interface_descriptor hdr_desc;
struct usb_audio_streaming_type1_descriptor format_type_desc;
struct uendpoint_descriptor ep_desc;
struct uac_iso_endpoint_descriptor as_ep_desc;
struct usb_audio_streaming_endpoint_descriptor as_ep_desc;
};
/*
@@ -169,9 +167,9 @@ static struct uac_ac_descriptor ac_desc =
},
/* Header Descriptor */
{
UAC_DT_AC_HEADER_SIZE(UAC_INTR_NUM),
sizeof(struct usb_audio_control_descriptor),
UAC_CS_INTERFACE,
UAC_HEADER,
UDESCSUB_AC_HEADER,
0x0100, /* Version: 1.00 */
0x001E, /* Total length: 30 */
0x01, /* Total number of interfaces: 1 */
@@ -179,9 +177,9 @@ static struct uac_ac_descriptor ac_desc =
},
/* Input Terminal Descriptor */
{
UAC_DT_INPUT_TERMINAL_SIZE,
sizeof(struct usb_audio_input_terminal),
UAC_CS_INTERFACE,
UAC_INPUT_TERMINAL,
UDESCSUB_AC_INPUT,
0x01, /* Terminal ID: 1 */
0x0201, /* Terminal Type: Microphone (0x0201) */
0x00, /* Assoc Terminal: 0 */
@@ -192,9 +190,9 @@ static struct uac_ac_descriptor ac_desc =
},
/* Output Terminal Descriptor */
{
UAC_DT_OUTPUT_TERMINAL_SIZE,
sizeof(struct usb_audio_output_terminal),
UAC_CS_INTERFACE,
UAC_OUTPUT_TERMINAL,
UDESCSUB_AC_OUTPUT,
0x02, /* Terminal ID: 2 */
0x0101, /* Terminal Type: USB Streaming (0x0101) */
0x00, /* Assoc Terminal: 0 */
@@ -204,11 +202,12 @@ static struct uac_ac_descriptor ac_desc =
#if UAC_USE_FEATURE_UNIT
/* Feature unit Descriptor */
{
UAC_DT_FEATURE_UNIT_SIZE(UAC_CH_NUM),
sizeof(struct usb_audio_feature_unit),
UAC_CS_INTERFACE,
UAC_FEATURE_UNIT,
UDESCSUB_AC_FEATURE,
0x02,
0x0101,
0x01,
0x01,
0x00,
0x01,
},
@@ -246,19 +245,19 @@ static struct uac_as_descriptor as_desc =
},
/* General AS Descriptor */
{
UAC_DT_AS_HEADER_SIZE,
sizeof(struct usb_audio_streaming_interface_descriptor),
UAC_CS_INTERFACE,
UAC_AS_GENERAL,
AS_GENERAL,
0x02, /* Terminal ID: 2 */
0x01, /* Interface delay in frames: 1 */
UAC_FORMAT_TYPE_I_PCM,
UA_FMT_PCM,
},
/* Format type i Descriptor */
{
UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(UAC_FORMAT_NUM),
sizeof(struct usb_audio_streaming_type1_descriptor),
UAC_CS_INTERFACE,
UAC_FORMAT_TYPE,
UAC_FORMAT_TYPE_I,
FORMAT_TYPE,
FORMAT_TYPE_I,
UAC_CHANNEL_NUM,
2, /* Subframe Size: 2 */
RESOLUTION_BITS,
@@ -276,9 +275,9 @@ static struct uac_as_descriptor as_desc =
},
/* AS Endpoint Descriptor */
{
UAC_ISO_ENDPOINT_DESC_SIZE,
sizeof(struct usb_audio_streaming_endpoint_descriptor),
UAC_CS_ENDPOINT,
UAC_MS_GENERAL,
AS_GENERAL,
},
};
@@ -476,9 +475,9 @@ static rt_err_t _uac_descriptor_config(struct uac_ac_descriptor *ac,
static rt_err_t _uac_samplerate_config(struct uac_as_descriptor *as, rt_uint32_t samplerate)
{
as->format_type_desc.tSamFreq[0][2] = samplerate >> 16 & 0xff;
as->format_type_desc.tSamFreq[0][1] = samplerate >> 8 & 0xff;
as->format_type_desc.tSamFreq[0][0] = samplerate & 0xff;
as->format_type_desc.tSamFreq[0 * 3 + 2] = samplerate >> 16 & 0xff;
as->format_type_desc.tSamFreq[0 * 3 + 1] = samplerate >> 8 & 0xff;
as->format_type_desc.tSamFreq[0 * 3 + 0] = samplerate & 0xff;
return RT_EOK;
}
@@ -11,7 +11,9 @@
#include <rthw.h>
#include <rtdevice.h>
#include "drivers/usb_device.h"
#include "audio.h"
#define AUFMT_MAX_FREQUENCIES 1
#include "uaudioreg.h"
#define DBG_TAG "usbd.audio.speaker"
#define DBG_LVL DBG_INFO
@@ -46,9 +48,6 @@
#define UAC_MAX_PACKET_SIZE 64
#define UAC_EP_MAX_PACKET_SIZE 32
#define UAC_CHANNEL_NUM AUDIO_CHANNEL
#define UAC_INTR_NUM 1
#define UAC_CH_NUM 1
#define UAC_FORMAT_NUM 1
struct uac_ac_descriptor
{
@@ -56,21 +55,21 @@ struct uac_ac_descriptor
struct uiad_descriptor iad_desc;
#endif
struct uinterface_descriptor intf_desc;
DECLARE_UAC_AC_HEADER_DESCRIPTOR(UAC_INTR_NUM) hdr_desc;
struct uac_input_terminal_descriptor it_desc;
struct uac1_output_terminal_descriptor ot_desc;
struct usb_audio_control_descriptor hdr_desc;
struct usb_audio_input_terminal it_desc;
struct usb_audio_output_terminal ot_desc;
#if UAC_USE_FEATURE_UNIT
DECLARE_UAC_FEATURE_UNIT_DESCRIPTOR(UAC_CH_NUM) feature_unit_desc;
struct usb_audio_feature_unit feature_unit_desc;
#endif
};
struct uac_as_descriptor
{
struct uinterface_descriptor intf_desc;
struct uac1_as_header_descriptor hdr_desc;
DECLARE_UAC_FORMAT_TYPE_I_DISCRETE_DESC(UAC_FORMAT_NUM) format_type_desc;
struct usb_audio_streaming_interface_descriptor hdr_desc;
struct usb_audio_streaming_type1_descriptor format_type_desc;
struct uendpoint_descriptor ep_desc;
struct uac_iso_endpoint_descriptor as_ep_desc;
struct usb_audio_streaming_endpoint_descriptor as_ep_desc;
};
/*
@@ -169,9 +168,9 @@ static struct uac_ac_descriptor ac_desc =
},
/* Header Descriptor */
{
UAC_DT_AC_HEADER_SIZE(UAC_INTR_NUM),
sizeof(struct usb_audio_control_descriptor),
UAC_CS_INTERFACE,
UAC_HEADER,
UDESCSUB_AC_HEADER,
0x0100, /* Version: 1.00 */
0x0027, /* Total length: 39 */
0x01, /* Total number of interfaces: 1 */
@@ -179,9 +178,9 @@ static struct uac_ac_descriptor ac_desc =
},
/* Input Terminal Descriptor */
{
UAC_DT_INPUT_TERMINAL_SIZE,
sizeof(struct usb_audio_input_terminal),
UAC_CS_INTERFACE,
UAC_INPUT_TERMINAL,
UDESCSUB_AC_INPUT,
0x01, /* Terminal ID: 1 */
0x0101, /* Terminal Type: USB Streaming (0x0101) */
0x00, /* Assoc Terminal: 0 */
@@ -192,9 +191,9 @@ static struct uac_ac_descriptor ac_desc =
},
/* Output Terminal Descriptor */
{
UAC_DT_OUTPUT_TERMINAL_SIZE,
sizeof(struct usb_audio_output_terminal),
UAC_CS_INTERFACE,
UAC_OUTPUT_TERMINAL,
UDESCSUB_AC_OUTPUT,
0x02, /* Terminal ID: 2 */
0x0302, /* Terminal Type: Headphones (0x0302) */
0x00, /* Assoc Terminal: 0 */
@@ -246,19 +245,19 @@ static struct uac_as_descriptor as_desc =
},
/* General AS Descriptor */
{
UAC_DT_AS_HEADER_SIZE,
sizeof(struct usb_audio_streaming_interface_descriptor),
UAC_CS_INTERFACE,
UAC_AS_GENERAL,
AS_GENERAL,
0x01, /* Terminal ID: 1 */
0x01, /* Interface delay in frames: 1 */
UAC_FORMAT_TYPE_I_PCM,
UA_FMT_PCM,
},
/* Format type i Descriptor */
{
UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(UAC_FORMAT_NUM),
sizeof(struct usb_audio_streaming_type1_descriptor),
UAC_CS_INTERFACE,
UAC_FORMAT_TYPE,
UAC_FORMAT_TYPE_I,
FORMAT_TYPE,
FORMAT_TYPE_I,
UAC_CHANNEL_NUM,
2, /* Subframe Size: 2 */
RESOLUTION_BITS,
@@ -276,9 +275,9 @@ static struct uac_as_descriptor as_desc =
},
/* AS Endpoint Descriptor */
{
UAC_ISO_ENDPOINT_DESC_SIZE,
sizeof(struct usb_audio_streaming_endpoint_descriptor),
UAC_CS_ENDPOINT,
UAC_MS_GENERAL,
AS_GENERAL,
},
};
@@ -477,9 +476,9 @@ static rt_err_t _uac_descriptor_config(struct uac_ac_descriptor *ac,
static rt_err_t _uac_samplerate_config(struct uac_as_descriptor *as, rt_uint32_t samplerate)
{
as->format_type_desc.tSamFreq[0][2] = samplerate >> 16 & 0xff;
as->format_type_desc.tSamFreq[0][1] = samplerate >> 8 & 0xff;
as->format_type_desc.tSamFreq[0][0] = samplerate & 0xff;
as->format_type_desc.tSamFreq[0 * 3 + 2] = samplerate >> 16 & 0xff;
as->format_type_desc.tSamFreq[0 * 3 + 1] = samplerate >> 8 & 0xff;
as->format_type_desc.tSamFreq[0 * 3 + 0] = samplerate & 0xff;
return RT_EOK;
}
@@ -0,0 +1,418 @@
/* $NetBSD: uaudioreg.h,v 1.15.38.1 2012/06/02 11:09:29 mrg Exp $ */
/*
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Lennart Augustsson (lennart@augustsson.net) at
* Carlstedt Research & Technology.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtdef.h>
typedef uint8_t uByte;
typedef uint16_t uWord;
#define UPACKED __attribute__ ((packed))
#define UAUDIO_VERSION 0x100
#define USB_SUBCLASS_AUDIOCONTROL 1
#define USB_SUBCLASS_AUDIOSTREAMING 2
#define USB_SUBCLASS_AUDIOMIDISTREAM 3
#define UDESC_CS_CONFIG 0x22
#define UDESC_CS_STRING 0x23
#define UDESC_CS_INTERFACE 0x24
#define UDESC_CS_ENDPOINT 0x25
#define UDESCSUB_AC_HEADER 1
#define UDESCSUB_AC_INPUT 2
#define UDESCSUB_AC_OUTPUT 3
#define UDESCSUB_AC_MIXER 4
#define UDESCSUB_AC_SELECTOR 5
#define UDESCSUB_AC_FEATURE 6
#define UDESCSUB_AC_PROCESSING 7
#define UDESCSUB_AC_EXTENSION 8
#ifndef AUFMT_MAX_FREQUENCIES
#define AUFMT_MAX_FREQUENCIES 1
#endif
/* The first fields are identical to usb_endpoint_descriptor_t */
typedef struct {
uByte bLength;
uByte bDescriptorType;
uByte bEndpointAddress;
uByte bmAttributes;
uWord wMaxPacketSize;
uByte bInterval;
/*
* The following two entries are only used by the Audio Class.
* And according to the specs the Audio Class is the only one
* allowed to extend the endpoint descriptor.
* Who knows what goes on in the minds of the people in the USB
* standardization? :-(
*/
uByte bRefresh;
uByte bSynchAddress;
} UPACKED usb_endpoint_descriptor_audio_t;
/* generic, for iteration */
typedef struct {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
} UPACKED uaudio_cs_descriptor_t;
struct usb_audio_control_descriptor {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uWord bcdADC;
uWord wTotalLength;
uByte bInCollection;
uByte baInterfaceNr[1];
} UPACKED;
struct usb_audio_streaming_interface_descriptor {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bTerminalLink;
uByte bDelay;
uWord wFormatTag;
} UPACKED;
struct usb_audio_streaming_endpoint_descriptor {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bmAttributes;
#define UA_SED_FREQ_CONTROL 0x01
#define UA_SED_PITCH_CONTROL 0x02
#define UA_SED_MAXPACKETSONLY 0x80
uByte bLockDelayUnits;
uWord wLockDelay;
} UPACKED;
struct usb_audio_streaming_type1_descriptor {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bFormatType;
uByte bNrChannels;
uByte bSubFrameSize;
uByte bBitResolution;
uByte bSamFreqType;
#define UA_SAMP_CONTNUOUS 0
uByte tSamFreq[3*AUFMT_MAX_FREQUENCIES];
#define UA_GETSAMP(p, n) ((p)->tSamFreq[(n)*3+0] | ((p)->tSamFreq[(n)*3+1] << 8) | ((p)->tSamFreq[(n)*3+2] << 16))
#define UA_SAMP_LO(p) UA_GETSAMP(p, 0)
#define UA_SAMP_HI(p) UA_GETSAMP(p, 1)
} UPACKED;
struct usb_audio_cluster {
uByte bNrChannels;
uWord wChannelConfig;
#define UA_CHANNEL_LEFT 0x0001
#define UA_CHANNEL_RIGHT 0x0002
#define UA_CHANNEL_CENTER 0x0004
#define UA_CHANNEL_LFE 0x0008
#define UA_CHANNEL_L_SURROUND 0x0010
#define UA_CHANNEL_R_SURROUND 0x0020
#define UA_CHANNEL_L_CENTER 0x0040
#define UA_CHANNEL_R_CENTER 0x0080
#define UA_CHANNEL_SURROUND 0x0100
#define UA_CHANNEL_L_SIDE 0x0200
#define UA_CHANNEL_R_SIDE 0x0400
#define UA_CHANNEL_TOP 0x0800
uByte iChannelNames;
} UPACKED;
/* Shared by all units and terminals */
struct usb_audio_unit {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bUnitId;
};
/* UDESCSUB_AC_INPUT */
struct usb_audio_input_terminal {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bTerminalId;
uWord wTerminalType;
uByte bAssocTerminal;
uByte bNrChannels;
uWord wChannelConfig;
uByte iChannelNames;
uByte iTerminal;
} UPACKED;
/* UDESCSUB_AC_OUTPUT */
struct usb_audio_output_terminal {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bTerminalId;
uWord wTerminalType;
uByte bAssocTerminal;
uByte bSourceId;
uByte iTerminal;
} UPACKED;
/* UDESCSUB_AC_MIXER */
struct usb_audio_mixer_unit {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bUnitId;
uByte bNrInPins;
uByte baSourceId[255]; /* [bNrInPins] */
/* struct usb_audio_mixer_unit_1 */
} UPACKED;
struct usb_audio_mixer_unit_1 {
uByte bNrChannels;
uWord wChannelConfig;
uByte iChannelNames;
uByte bmControls[255]; /* [bNrChannels] */
/*uByte iMixer;*/
} UPACKED;
/* UDESCSUB_AC_SELECTOR */
struct usb_audio_selector_unit {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bUnitId;
uByte bNrInPins;
uByte baSourceId[255]; /* [bNrInPins] */
/* uByte iSelector; */
} UPACKED;
/* UDESCSUB_AC_FEATURE */
struct usb_audio_feature_unit {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bUnitId;
uByte bSourceId;
uByte bControlSize;
uByte bmaControls[2]; /* size for more than enough */
/* uByte iFeature; */
} UPACKED;
/* UDESCSUB_AC_PROCESSING */
struct usb_audio_processing_unit {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bUnitId;
uWord wProcessType;
uByte bNrInPins;
uByte baSourceId[255]; /* [bNrInPins] */
/* struct usb_audio_processing_unit_1 */
} UPACKED;
struct usb_audio_processing_unit_1{
uByte bNrChannels;
uWord wChannelConfig;
uByte iChannelNames;
uByte bControlSize;
uByte bmControls[255]; /* [bControlSize] */
#define UA_PROC_ENABLE_MASK 1
} UPACKED;
struct usb_audio_processing_unit_updown {
uByte iProcessing;
uByte bNrModes;
uWord waModes[255]; /* [bNrModes] */
} UPACKED;
/* UDESCSUB_AC_EXTENSION */
struct usb_audio_extension_unit {
uByte bLength;
uByte bDescriptorType;
uByte bDescriptorSubtype;
uByte bUnitId;
uWord wExtensionCode;
uByte bNrInPins;
uByte baSourceId[255]; /* [bNrInPins] */
/* struct usb_audio_extension_unit_1 */
} UPACKED;
struct usb_audio_extension_unit_1 {
uByte bNrChannels;
uWord wChannelConfig;
uByte iChannelNames;
uByte bControlSize;
uByte bmControls[255]; /* [bControlSize] */
#define UA_EXT_ENABLE_MASK 1
#define UA_EXT_ENABLE 1
/*uByte iExtension;*/
} UPACKED;
/* USB terminal types */
#define UAT_UNDEFINED 0x0100
#define UAT_STREAM 0x0101
#define UAT_VENDOR 0x01ff
/* input terminal types */
#define UATI_UNDEFINED 0x0200
#define UATI_MICROPHONE 0x0201
#define UATI_DESKMICROPHONE 0x0202
#define UATI_PERSONALMICROPHONE 0x0203
#define UATI_OMNIMICROPHONE 0x0204
#define UATI_MICROPHONEARRAY 0x0205
#define UATI_PROCMICROPHONEARR 0x0206
/* output terminal types */
#define UATO_UNDEFINED 0x0300
#define UATO_SPEAKER 0x0301
#define UATO_HEADPHONES 0x0302
#define UATO_DISPLAYAUDIO 0x0303
#define UATO_DESKTOPSPEAKER 0x0304
#define UATO_ROOMSPEAKER 0x0305
#define UATO_COMMSPEAKER 0x0306
#define UATO_SUBWOOFER 0x0307
/* bidir terminal types */
#define UATB_UNDEFINED 0x0400
#define UATB_HANDSET 0x0401
#define UATB_HEADSET 0x0402
#define UATB_SPEAKERPHONE 0x0403
#define UATB_SPEAKERPHONEESUP 0x0404
#define UATB_SPEAKERPHONEECANC 0x0405
/* telephony terminal types */
#define UATT_UNDEFINED 0x0500
#define UATT_PHONELINE 0x0501
#define UATT_TELEPHONE 0x0502
#define UATT_DOWNLINEPHONE 0x0503
/* external terminal types */
#define UATE_UNDEFINED 0x0600
#define UATE_ANALOGCONN 0x0601
#define UATE_DIGITALAUIFC 0x0602
#define UATE_LINECONN 0x0603
#define UATE_LEGACYCONN 0x0604
#define UATE_SPDIF 0x0605
#define UATE_1394DA 0x0606
#define UATE_1394DV 0x0607
/* embedded function terminal types */
#define UATF_UNDEFINED 0x0700
#define UATF_CALIBNOISE 0x0701
#define UATF_EQUNOISE 0x0702
#define UATF_CDPLAYER 0x0703
#define UATF_DAT 0x0704
#define UATF_DCC 0x0705
#define UATF_MINIDISK 0x0706
#define UATF_ANALOGTAPE 0x0707
#define UATF_PHONOGRAPH 0x0708
#define UATF_VCRAUDIO 0x0709
#define UATF_VIDEODISCAUDIO 0x070a
#define UATF_DVDAUDIO 0x070b
#define UATF_TVTUNERAUDIO 0x070c
#define UATF_SATELLITE 0x070d
#define UATF_CABLETUNER 0x070e
#define UATF_DSS 0x070f
#define UATF_RADIORECV 0x0710
#define UATF_RADIOXMIT 0x0711
#define UATF_MULTITRACK 0x0712
#define UATF_SYNTHESIZER 0x0713
#define SET_CUR 0x01
#define GET_CUR 0x81
#define SET_MIN 0x02
#define GET_MIN 0x82
#define SET_MAX 0x03
#define GET_MAX 0x83
#define SET_RES 0x04
#define GET_RES 0x84
#define SET_MEM 0x05
#define GET_MEM 0x85
#define GET_STAT 0xff
#define MUTE_CONTROL 0x01
#define VOLUME_CONTROL 0x02
#define BASS_CONTROL 0x03
#define MID_CONTROL 0x04
#define TREBLE_CONTROL 0x05
#define GRAPHIC_EQUALIZER_CONTROL 0x06
#define AGC_CONTROL 0x07
#define DELAY_CONTROL 0x08
#define BASS_BOOST_CONTROL 0x09
#define LOUDNESS_CONTROL 0x0a
#define FU_MASK(u) (1 << ((u)-1))
#define MASTER_CHAN 0
#define AS_GENERAL 1
#define FORMAT_TYPE 2
#define FORMAT_SPECIFIC 3
#define UA_FMT_PCM 1
#define UA_FMT_PCM8 2
#define UA_FMT_IEEE_FLOAT 3
#define UA_FMT_ALAW 4
#define UA_FMT_MULAW 5
#define UA_FMT_MPEG 0x1001
#define UA_FMT_AC3 0x1002
#define SAMPLING_FREQ_CONTROL 0x01
#define PITCH_CONTROL 0x02
#define FORMAT_TYPE_UNDEFINED 0
#define FORMAT_TYPE_I 1
#define FORMAT_TYPE_II 2
#define FORMAT_TYPE_III 3
#define UA_PROC_MASK(n) (1<< ((n)-1))
#define PROCESS_UNDEFINED 0
#define XX_ENABLE_CONTROL 1
#define UPDOWNMIX_PROCESS 1
#define UD_ENABLE_CONTROL 1
#define UD_MODE_SELECT_CONTROL 2
#define DOLBY_PROLOGIC_PROCESS 2
#define DP_ENABLE_CONTROL 1
#define DP_MODE_SELECT_CONTROL 2
#define P3D_STEREO_EXTENDER_PROCESS 3
#define P3D_ENABLE_CONTROL 1
#define P3D_SPACIOUSNESS_CONTROL 2
#define REVERBATION_PROCESS 4
#define RV_ENABLE_CONTROL 1
#define RV_LEVEL_CONTROL 2
#define RV_TIME_CONTROL 3
#define RV_FEEDBACK_CONTROL 4
#define CHORUS_PROCESS 5
#define CH_ENABLE_CONTROL 1
#define CH_LEVEL_CONTROL 2
#define CH_RATE_CONTROL 3
#define CH_DEPTH_CONTROL 4
#define DYN_RANGE_COMP_PROCESS 6
#define DR_ENABLE_CONTROL 1
#define DR_COMPRESSION_RATE_CONTROL 2
#define DR_MAXAMPL_CONTROL 3
#define DR_THRESHOLD_CONTROL 4
#define DR_ATTACK_TIME_CONTROL 5
#define DR_RELEASE_TIME_CONTROL 6