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https://github.com/RT-Thread/rt-thread.git
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[BSP][airm2m] 同步lib修改,包括sram加锁、修复获取rtc频率错误等 (#7718)
This commit is contained in:
@@ -14,7 +14,7 @@
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## 开发板介绍
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Air32F103为系列芯片,首发型号为Air32F103CBT6,其外设和硬件设计兼容市场上一些主流F103型号,主频最高可达216M,32K RAM+128K Flash,每个IO都可设置独立的内部上下拉电阻。
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Air32F103为系列芯片,首发型号为Air32F103CBT6,其外设和硬件设计兼容市场上一些主流F103型号,主频最高可达216M,96K RAM+128K Flash,每个IO都可设置独立的内部上下拉电阻。
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开发板外观如下图所示:
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@@ -296,7 +296,7 @@ void FLASH_Unlock(void)
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FLASH->KEYR = FLASH_KEY1;
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FLASH->KEYR = FLASH_KEY2;
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/* Authorize the FPEC of Bank2 Access */
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FLASH->KEYR2 = FLASH_KEY1;
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FLASH->KEYR2 = FLASH_KEY2;
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@@ -318,7 +318,7 @@ void FLASH_UnlockBank1(void)
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FLASH->KEYR = FLASH_KEY2;
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}
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/**
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* @brief Unlocks the FLASH Bank2 Program Erase Controller.
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* @note This function can be used only for AIR32F10X_XL density devices.
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@@ -348,7 +348,7 @@ void FLASH_Lock(void)
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/* Set the Lock Bit to lock the FPEC and the CR of Bank1 */
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FLASH->CR |= CR_LOCK_Set;
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/* Set the Lock Bit to lock the FPEC and the CR of Bank2 */
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FLASH->CR2 |= CR_LOCK_Set;
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#endif /* AIR32F10X_XL */
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@@ -369,7 +369,7 @@ void FLASH_LockBank1(void)
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FLASH->CR |= CR_LOCK_Set;
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}
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/**
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* @brief Locks the FLASH Bank2 Program Erase Controller.
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* @note This function can be used only for AIR32F10X_XL density devices.
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@@ -396,7 +396,7 @@ FLASH_Status FLASH_ErasePage(uint32_t Page_Address)
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/* Check the parameters */
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assert_param(IS_FLASH_ADDRESS(Page_Address));
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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if(Page_Address < FLASH_BANK1_END_ADDRESS)
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{
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/* Wait for last operation to be completed */
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@@ -467,7 +467,7 @@ FLASH_Status FLASH_EraseAllPages(void)
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{
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FLASH_Status status = FLASH_COMPLETE;
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/* Wait for last operation to be completed */
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status = FLASH_WaitForLastBank1Operation(EraseTimeout);
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@@ -548,7 +548,7 @@ FLASH_Status FLASH_EraseAllBank1Pages(void)
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return status;
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}
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/**
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* @brief Erases all Bank2 FLASH pages.
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* @note This function can be used only for AIR32F103_XL density devices.
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@@ -754,7 +754,7 @@ FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
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/* Check the parameters */
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assert_param(IS_FLASH_ADDRESS(Address));
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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if(Address < FLASH_BANK1_END_ADDRESS - 2)
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{
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/* Wait for last operation to be completed */
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@@ -929,7 +929,7 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
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/* Check the parameters */
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assert_param(IS_FLASH_ADDRESS(Address));
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/* Wait for last operation to be completed */
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status = FLASH_WaitForLastOperation(ProgramTimeout);
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@@ -1222,7 +1222,7 @@ FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint
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return status;
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}
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/**
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* @brief Configures to boot from Bank1 or Bank2.
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* @note This function can be used only for AIR32F103_XL density devices.
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@@ -1361,7 +1361,7 @@ FlagStatus FLASH_GetPrefetchBufferStatus(void)
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*/
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void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
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{
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/* Check the parameters */
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assert_param(IS_FLASH_IT(FLASH_IT));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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@@ -1430,7 +1430,7 @@ FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
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{
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FlagStatus bitstatus = RESET;
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/* Check the parameters */
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assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ;
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if(FLASH_FLAG == FLASH_FLAG_OPTERR)
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@@ -1514,7 +1514,7 @@ FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
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*/
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void FLASH_ClearFlag(uint32_t FLASH_FLAG)
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{
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/* Check the parameters */
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assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ;
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@@ -1614,7 +1614,7 @@ FLASH_Status FLASH_GetBank1Status(void)
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return flashstatus;
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}
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/**
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* @brief Returns the FLASH Bank2 Status.
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* @note This function can be used for AIR32F103_XL density devices.
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@@ -1712,7 +1712,7 @@ FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout)
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return status;
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}
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#ifdef AIR32F10X_XL
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#if defined(AIR32F10X_XL) || defined(AIR32F10X_MD_1024K)
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/**
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* @brief Waits for a Flash operation on Bank2 to complete or a TIMEOUT to occur.
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* @note This function can be used only for AIR32F103_XL density devices.
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@@ -89,7 +89,7 @@
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#define CFGR_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF)
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#define CFGR_PPRE2_Set_Mask ((uint32_t)0x00003800)
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#define CFGR_ADCPRE_Reset_Mask ((uint32_t)0x9FFF3FFF)
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#define CFGR_ADCPRE_Set_Mask ((uint32_t)0x0000C000)
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#define CFGR_ADCPRE_Set_Mask ((uint32_t)0x6000C000)
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/* CSR register bit mask */
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#define CSR_RMVF_Set ((uint32_t)0x01000000)
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@@ -126,7 +126,7 @@
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*/
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static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
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static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8};
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static __I uint8_t ADCPrescTable[16] = {2, 4, 6, 8, 16, 32, 36, 48, 64, 72, 96, 120, 144, 168, 192 ,216};
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/**
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* @}
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@@ -682,7 +682,7 @@ void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks)
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RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc;
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/* Get ADCCLK prescaler */
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tmp = RCC->CFGR & CFGR_ADCPRE_Set_Mask;
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tmp = tmp >> 14;
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tmp = ((tmp >> 27) | (tmp >> 14)) & 0x0F;
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presc = ADCPrescTable[tmp];
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/* ADCCLK clock frequency */
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RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc;
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File diff suppressed because it is too large
Load Diff
@@ -118,70 +118,70 @@ __Vectors DCD __initial_sp ; Top of Stack
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DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
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DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
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DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SYMC_IRQHandler
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DCD RNG_IRQHandler
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DCD SENSOR_IRQHandler
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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;DCD 0X20005000
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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DCD 0
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;DCD 0X20005000
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;DCD BOOT_RAM
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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@@ -189,7 +189,7 @@ __Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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;
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BOOT_RAM PROC
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BOOT_RAM PROC
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EXPORT BOOT_RAM [WEAK]
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IMPORT __main
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IMPORT SystemInit
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@@ -198,14 +198,14 @@ BOOT_RAM PROC
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LDR R0, =__main
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BX R0
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ENDP
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; Reset handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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LDR R0,=0x400210F0
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LDR R0,=0x400210F0
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MOV R1,#0x00000001
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STR R1,[R0]
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LDR R2,=0x40016C00
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LDR R2,=0x40016C00
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LDR R3,=0xa7d93a86
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STR R3,[R2]
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LDR R3,=0xab12dfcd
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@@ -217,6 +217,20 @@ Reset_Handler PROC
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LDR R4,=0x4002228c
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LDR R5,=0xa5a5a5a5
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STR R5,[R4]
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;lock
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LDR R2,=0x400210F0
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LDR R3,=0x00000000
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STR R3,[R2]
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LDR R2,=0x40016C00
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LDR R3,=0x5826c579
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STR R3,[R2]
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LDR R3,=0x54ed2032
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STR R3,[R2]
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LDR R3,=0x3212cad9
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STR R3,[R2]
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LDR R2,=0x4002228c
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LDR R3,=0x5a5a5a5a
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STR R3,[R2]
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MOV R1,#0x00000000
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IMPORT __main
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IMPORT SystemInit
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@@ -65,7 +65,7 @@ FillZerobss:
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LoopFillZerobss:
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cmp r2, r4
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bcc FillZerobss
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/*unlock*/
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ldr r0,=0x400210F0
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mov r1,#0x00000001
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str r1,[r0]
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@@ -81,6 +81,21 @@ LoopFillZerobss:
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ldr r4,=0x4002228c
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ldr r5,=0xa5a5a5a5
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str r5,[r4]
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/*lock*/
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ldr r2,=0x400210f0
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ldr r3,=0x00000000
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str r3,[r2]
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ldr r2,=0x40016c00
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ldr r3,=0x5826c579
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str r3,[r2]
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ldr r3,=0x54ed2032
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str r3,[r2]
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ldr r3,=0x3212cad9
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str r3,[r2]
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ldr r2,=0x4002228c
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ldr r3,=0x5a5a5a5a
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str r3,[r2]
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mov r1,#0x00000000
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/* Call the clock system intitialization function.*/
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