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Optimize STM32 Ethernet Drvier

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1. Add phy_linkchange function to simplify eth_phy_isr and phy_monitor_thread_entry
2. phy_speed is uint8_t may case some problems, use enumeration instead of hardware-dependent values
3. Fix eth_phy_isr can not detect link up
4. Use macro to check phy status for flexibility

Signed-off-by: xiaofan <xfan1024@live.com>
This commit is contained in:
xiaofan committed 2019-09-03 18:51:09 +08:00
1 parent 37fe581be4
commit 7676b5e69b
2 files changed
+93 -112
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bsp/stm32/libraries/HAL_Drivers/drv_eth.c
+87 -112
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bsp/stm32/libraries/HAL_Drivers/drv_eth.h
+6
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@@ -48,6 +48,9 @@
#define PHY_10M_MASK (1<<2)
#define PHY_100M_MASK (1<<3)
#define PHY_FULL_DUPLEX_MASK (1<<4)
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
#endif /* PHY_USING_LAN8720A */
#ifdef PHY_USING_DM9161CEP
@@ -55,6 +58,9 @@
#define PHY_10M_MASK ((1<<12) || (1<<13))
#define PHY_100M_MASK ((1<<14) || (1<<15))
#define PHY_FULL_DUPLEX_MASK ((1<<15) || (1<<13))
#define PHY_Status_SPEED_10M(sr) ((sr) & PHY_10M_MASK)
#define PHY_Status_SPEED_100M(sr) ((sr) & PHY_100M_MASK)
#define PHY_Status_FULL_DUPLEX(sr) ((sr) & PHY_FULL_DUPLEX_MASK)
/* The PHY interrupt source flag register. */
#define PHY_INTERRUPT_FLAG_REG 0x15U
/* The PHY interrupt mask register. */