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[components][clock_time] Refactor time subsystem around clock_time (#11111)
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Browse Source 
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue
This commit is contained in:
Bernard Xiong
2026-01-31 17:44:27 +08:00
committed by GitHub
parent f2a646cff4
commit 743b614875
671 changed files with 10120 additions and 8372 deletions
Download Patch File Download Diff File Expand all files Collapse all files
bsp/synwit/libraries/SWM341_drivers/SConscript
+2 -2
View File
@@ -18,8 +18,8 @@ if GetDepend(['RT_USING_DAC']):
if GetDepend(['RT_USING_CAN']):
src += ['drv_can.c']
if GetDepend(['RT_USING_HWTIMER']):
src += ['drv_hwtimer.c']
if GetDepend(['RT_USING_CLOCK_TIME']):
src += ['drv_timer.c']
if GetDepend(['RT_USING_I2C']):
src += ['drv_soft_i2c.c']
bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.c → bsp/synwit/libraries/SWM341_drivers/drv_timer.c
+68 -68
View File
@@ -8,13 +8,13 @@
* 2021-07-01 lik first version
*/
#include "drv_hwtimer.h"
#include "drv_timer.h"
#ifdef RT_USING_HWTIMER
#ifdef RT_USING_CLOCK_TIME
#ifdef BSP_USING_TIM
//#define DRV_DEBUG
#define LOG_TAG "drv.hwtimer"
#define LOG_TAG "drv.clock_timer"
#include <drv_log.h>
#if !defined(BSP_USING_TIM0) && !defined(BSP_USING_TIM1) && !defined(BSP_USING_TIM2) && !defined(BSP_USING_TIM3) \
@@ -32,7 +32,7 @@
.maxfreq = 1000000, \
.minfreq = 1000000, \
.maxcnt = 0xFFFFFFFF, \
.cntmode = HWTIMER_CNTMODE_DW, \
.cntmode = CLOCK_TIMER_CNTMODE_DW, \
}
#endif /* TIM_DEV_INFO_CONFIG */
@@ -206,16 +206,16 @@
#endif /* BTIM11_CFG */
#endif /* BSP_USING_BTIM11 */
struct swm_hwtimer_cfg
struct swm_clock_timer_cfg
{
char *name;
TIMR_TypeDef *TIMRx;
};
struct swm_hwtimer_device
struct swm_clock_timer_device
{
struct swm_hwtimer_cfg *hwtimer_cfg;
rt_hwtimer_t time_device;
struct swm_clock_timer_cfg *clock_timer_cfg;
rt_clock_timer_t time_device;
};
enum
@@ -273,7 +273,7 @@ enum
#endif
};
static struct swm_hwtimer_cfg swm_hwtimer_cfg[] =
static struct swm_clock_timer_cfg swm_clock_timer_cfg[] =
{
#ifdef BSP_USING_TIM0
TIM0_CFG,
@@ -328,79 +328,79 @@ static struct swm_hwtimer_cfg swm_hwtimer_cfg[] =
#endif
};
static struct swm_hwtimer_device hwtimer_obj[sizeof(swm_hwtimer_cfg) / sizeof(swm_hwtimer_cfg[0])] = {0};
static struct swm_clock_timer_device clock_timer_obj[sizeof(swm_clock_timer_cfg) / sizeof(swm_clock_timer_cfg[0])] = {0};
static void swm_timer_configure(struct rt_hwtimer_device *timer_device, rt_uint32_t state)
static void swm_timer_configure(struct rt_clock_timer_device *timer_device, rt_uint32_t state)
{
struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL;
struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL;
RT_ASSERT(timer_device != RT_NULL);
if (state)
{
hwtimer_cfg = timer_device->parent.user_data;
TIMR_Init(hwtimer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, 1000000, 1);
clock_timer_cfg = timer_device->parent.user_data;
TIMR_Init(clock_timer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, 1000000, 1);
timer_device->freq = 1000000;
}
}
static rt_err_t swm_timer_start(rt_hwtimer_t *timer_device, rt_uint32_t cnt, rt_hwtimer_mode_t opmode)
static rt_err_t swm_timer_start(rt_clock_timer_t *timer_device, rt_uint32_t cnt, rt_clock_timer_mode_t opmode)
{
rt_err_t result = RT_EOK;
struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL;
struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL;
RT_ASSERT(timer_device != RT_NULL);
hwtimer_cfg = timer_device->parent.user_data;
clock_timer_cfg = timer_device->parent.user_data;
if (opmode == HWTIMER_MODE_ONESHOT)
if (opmode == CLOCK_TIMER_MODE_ONESHOT)
{
/* set timer to single mode */
timer_device->mode = HWTIMER_MODE_ONESHOT;
timer_device->mode = CLOCK_TIMER_MODE_ONESHOT;
}
else
{
timer_device->mode = HWTIMER_MODE_PERIOD;
timer_device->mode = CLOCK_TIMER_MODE_PERIOD;
}
hwtimer_cfg->TIMRx->LOAD = cnt - 1;
TIMR_Stop(hwtimer_cfg->TIMRx);
TIMR_Start(hwtimer_cfg->TIMRx);
clock_timer_cfg->TIMRx->LOAD = cnt - 1;
TIMR_Stop(clock_timer_cfg->TIMRx);
TIMR_Start(clock_timer_cfg->TIMRx);
return result;
}
static void swm_timer_stop(rt_hwtimer_t *timer_device)
static void swm_timer_stop(rt_clock_timer_t *timer_device)
{
struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL;
struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL;
RT_ASSERT(timer_device != RT_NULL);
hwtimer_cfg = timer_device->parent.user_data;
clock_timer_cfg = timer_device->parent.user_data;
/* stop timer */
TIMR_Stop(hwtimer_cfg->TIMRx);
TIMR_Stop(clock_timer_cfg->TIMRx);
}
static rt_uint32_t swm_timer_count_get(rt_hwtimer_t *timer_device)
static rt_uint32_t swm_timer_count_get(rt_clock_timer_t *timer_device)
{
struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL;
struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL;
RT_ASSERT(timer_device != RT_NULL);
hwtimer_cfg = timer_device->parent.user_data;
clock_timer_cfg = timer_device->parent.user_data;
return TIMR_GetCurValue(hwtimer_cfg->TIMRx);
return TIMR_GetCurValue(clock_timer_cfg->TIMRx);
}
static rt_err_t swm_timer_control(rt_hwtimer_t *timer_device, rt_uint32_t cmd, void *args)
static rt_err_t swm_timer_control(rt_clock_timer_t *timer_device, rt_uint32_t cmd, void *args)
{
struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL;
struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL;
rt_err_t result = RT_EOK;
RT_ASSERT(timer_device != RT_NULL);
RT_ASSERT(args != RT_NULL);
hwtimer_cfg = timer_device->parent.user_data;
clock_timer_cfg = timer_device->parent.user_data;
switch (cmd)
{
case HWTIMER_CTRL_FREQ_SET:
case CLOCK_TIMER_CTRL_FREQ_SET:
{
rt_uint32_t freq;
freq = *(rt_uint32_t *)args;
TIMR_Init(hwtimer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, freq, 1);
TIMR_Init(clock_timer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, freq, 1);
}
break;
default:
@@ -413,9 +413,9 @@ static rt_err_t swm_timer_control(rt_hwtimer_t *timer_device, rt_uint32_t cmd, v
return result;
}
static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG;
static const struct rt_hwtimer_ops swm_timer_ops =
static const struct rt_clock_timer_ops swm_timer_ops =
{
.init = swm_timer_configure,
.start = swm_timer_start,
@@ -423,21 +423,21 @@ static const struct rt_hwtimer_ops swm_timer_ops =
.count_get = swm_timer_count_get,
.control = swm_timer_control};
void swm_timer_isr(rt_hwtimer_t *timer_device)
void swm_timer_isr(rt_clock_timer_t *timer_device)
{
struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL;
struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL;
RT_ASSERT(timer_device != RT_NULL);
hwtimer_cfg = timer_device->parent.user_data;
clock_timer_cfg = timer_device->parent.user_data;
TIMR_INTClr(hwtimer_cfg->TIMRx);
rt_device_hwtimer_isr(timer_device);
TIMR_INTClr(clock_timer_cfg->TIMRx);
rt_clock_timer_isr(timer_device);
}
#ifdef BSP_USING_TIM0
void TIMR0_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[TIM0_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[TIM0_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_TIM0
@@ -446,7 +446,7 @@ void TIMR0_Handler(void)
void TIMR1_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[TIM1_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[TIM1_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_TIM1
@@ -455,7 +455,7 @@ void TIMR1_Handler(void)
void TIMR2_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[TIM2_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[TIM2_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_TIM2
@@ -464,7 +464,7 @@ void TIMR2_Handler(void)
void TIMR3_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[TIM3_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[TIM3_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_TIM3
@@ -473,7 +473,7 @@ void TIMR3_Handler(void)
void TIMR4_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[TIM4_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[TIM4_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_TIM4
@@ -482,7 +482,7 @@ void TIMR4_Handler(void)
void BTIMR0_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM0_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM0_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM0
@@ -491,7 +491,7 @@ void BTIMR0_Handler(void)
void BTIMR1_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM1_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM1_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM1
@@ -500,7 +500,7 @@ void BTIMR1_Handler(void)
void BTIMR2_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM2_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM2_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM2
@@ -509,7 +509,7 @@ void BTIMR2_Handler(void)
void BTIMR3_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM3_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM3_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM3
@@ -518,7 +518,7 @@ void BTIMR3_Handler(void)
void BTIMR4_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM4_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM4_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM4
@@ -527,7 +527,7 @@ void BTIMR4_Handler(void)
void BTIMR5_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM5_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM5_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM5
@@ -536,7 +536,7 @@ void BTIMR5_Handler(void)
void BTIMR6_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM6_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM6_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM6
@@ -545,7 +545,7 @@ void BTIMR6_Handler(void)
void BTIMR7_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM7_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM7_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM7
@@ -554,7 +554,7 @@ void BTIMR7_Handler(void)
void BTIMR8_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM8_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM8_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM8
@@ -563,7 +563,7 @@ void BTIMR8_Handler(void)
void BTIMR9_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM9_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM9_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM9
@@ -572,7 +572,7 @@ void BTIMR9_Handler(void)
void BTIMR10_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM10_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM10_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM10
@@ -581,7 +581,7 @@ void BTIMR10_Handler(void)
void BTIMR11_Handler(void)
{
rt_interrupt_enter();
swm_timer_isr(&(hwtimer_obj[BTIM11_INDEX].time_device));
swm_timer_isr(&(clock_timer_obj[BTIM11_INDEX].time_device));
rt_interrupt_leave();
}
#endif // BSP_USING_BTIM11
@@ -591,19 +591,19 @@ int swm_timer_init(void)
int i = 0;
int result = RT_EOK;
for (i = 0; i < sizeof(swm_hwtimer_cfg) / sizeof(swm_hwtimer_cfg[0]); i++)
for (i = 0; i < sizeof(swm_clock_timer_cfg) / sizeof(swm_clock_timer_cfg[0]); i++)
{
hwtimer_obj[i].hwtimer_cfg = &swm_hwtimer_cfg[i];
hwtimer_obj[i].time_device.info = &_info;
hwtimer_obj[i].time_device.ops = &swm_timer_ops;
result = rt_device_hwtimer_register(&hwtimer_obj[i].time_device, hwtimer_obj[i].hwtimer_cfg->name, hwtimer_obj[i].hwtimer_cfg);
clock_timer_obj[i].clock_timer_cfg = &swm_clock_timer_cfg[i];
clock_timer_obj[i].time_device.info = &_info;
clock_timer_obj[i].time_device.ops = &swm_timer_ops;
result = rt_clock_timer_register(&clock_timer_obj[i].time_device, clock_timer_obj[i].clock_timer_cfg->name, clock_timer_obj[i].clock_timer_cfg);
if (result != RT_EOK)
{
LOG_E("%s register fail.", hwtimer_obj[i].hwtimer_cfg->name);
LOG_E("%s register fail.", clock_timer_obj[i].clock_timer_cfg->name);
}
else
{
LOG_D("%s register success.", hwtimer_obj[i].hwtimer_cfg->name);
LOG_D("%s register success.", clock_timer_obj[i].clock_timer_cfg->name);
}
}
@@ -612,4 +612,4 @@ int swm_timer_init(void)
INIT_BOARD_EXPORT(swm_timer_init);
#endif /* BSP_USING_TIM */
#endif /* RT_USING_HWTIMER */
#endif /* RT_USING_CLOCK_TIME */
bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.h → bsp/synwit/libraries/SWM341_drivers/drv_timer.h
+3 -3
View File
@@ -8,11 +8,11 @@
* 2021-07-01 lik first version
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#ifndef __DRV_CLOCK_TIMER_H__
#define __DRV_CLOCK_TIMER_H__
#include "board.h"
int swm_timer_init(void);
#endif /* __DRV_HWTIMER_H__ */
#endif /* __DRV_CLOCK_TIMER_H__ */