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remove libcpu/arm/lm3s libcpu/arm/lpc176x , update bsp lm3s lpc176x.

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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1865 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong committed 2011-12-23 01:36:10 +00:00
1 parent a97a690e18
commit 701df33436
52 files changed
+1322 -1887
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bsp/lm3s8962/Libraries/SConscript
+12 -27
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@@ -3,34 +3,19 @@ Import('rtconfig')
from building import *
# The set of source files associated with this SConscript file.
src = Split("""
driverlib/adc.c
driverlib/can.c
driverlib/comp.c
driverlib/cpu.c
driverlib/epi.c
driverlib/ethernet.c
driverlib/flash.c
driverlib/gpio.c
driverlib/hibernate.c
driverlib/i2c.c
driverlib/i2s.c
driverlib/interrupt.c
driverlib/mpu.c
driverlib/pwm.c
driverlib/qei.c
driverlib/ssi.c
driverlib/sysctl.c
driverlib/systick.c
driverlib/timer.c
driverlib/uart.c
driverlib/udma.c
driverlib/usb.c
driverlib/watchdog.c
""")
cwd = GetCurrentDir()
src = Glob('driverlib/*.c')
CPPPATH = [RTT_ROOT + '/bsp/lm3s8962/Libraries/inc', RTT_ROOT + '/bsp/lm3s8962/Libraries', RTT_ROOT + '/bsp/lm3s8962/Libraries/driverlib']
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src += ['startup/gcc/startup_LPC17xx.s']
elif rtconfig.CROSS_TOOL == 'keil':
src += ['startup/arm/start_rvds.S']
elif rtconfig.CROSS_TOOL == 'iar':
src += ['startup/iar/start_iar.S']
group = DefineGroup('library', src, depend = [''], CPPPATH = CPPPATH)
CPPPATH = [cwd]
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
libcpu/arm/lm3s/start_rvds.S → bsp/lm3s8962/Libraries/startup/arm/start_rvds.S
+4 -4
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@@ -62,11 +62,11 @@ HeapMem
SPACE Heap
__heap_limit
IMPORT rt_hw_pend_sv
IMPORT PendSV_Handler
IMPORT rt_hw_timer_handler
IMPORT rt_hw_uart_isr_1
IMPORT rt_hw_eth_handler
IMPORT rt_hw_hard_fault
IMPORT HardFault_Handler
;******************************************************************************
;
@@ -93,7 +93,7 @@ __Vectors
DCD StackMem + Stack ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NmiSR ; NMI Handler
DCD rt_hw_hard_fault ; Hard Fault Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD IntDefaultHandler ; MPU Fault Handler
DCD IntDefaultHandler ; Bus Fault Handler
DCD IntDefaultHandler ; Usage Fault Handler
@@ -104,7 +104,7 @@ __Vectors
DCD IntDefaultHandler ; SVCall Handler
DCD IntDefaultHandler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD rt_hw_pend_sv ; PendSV Handler
DCD PendSV_Handler ; PendSV Handler
DCD rt_hw_timer_handler ; SysTick Handler
DCD IntDefaultHandler ; GPIO Port A
DCD IntDefaultHandler ; GPIO Port B
libcpu/arm/lm3s/start_gcc.S → bsp/lm3s8962/Libraries/startup/gcc/start_gcc.S
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File renamed without changes.
bsp/lm3s8962/SConscript
+10 -15
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@@ -1,19 +1,14 @@
import rtconfig
# for module compiling
import os
Import('RTT_ROOT')
from building import *
src_bsp = ['application.c', 'startup.c', 'board.c']
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
src_drv = []
if GetDepend('RT_USING_DFS'):
src_drv += ['sdcard.c']
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
if GetDepend('RT_USING_LWIP'):
src_drv += ['luminaryif.c']
src = File(src_bsp + src_drv)
CPPPATH = [GetCurrentDir()]
group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
Return('objs')
bsp/lm3s8962/SConstruct
+1 -3
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@@ -19,9 +19,7 @@ Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
objs = objs + SConscript(('bsp/lm3s8962/Libraries/SConscript'), variant_dir='build/bsp/Libraries', duplicate=0)
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
env.Program(TARGET, objs)
bsp/lm3s8962/applications/SConscript
+11
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@@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lm3s8962/application.c → bsp/lm3s8962/applications/application.c
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File renamed without changes.
bsp/lm3s8962/startup.c → bsp/lm3s8962/applications/startup.c
+7 -7
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@@ -15,12 +15,12 @@
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "board.h"
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <netif/ethernetif.h>
#endif
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <netif/ethernetif.h>
#endif
/**
* @addtogroup LM3S
@@ -36,7 +36,7 @@ extern void finsh_set_device(char* device);
extern int rt_application_init(void);
extern void rt_hw_sdcard_init(void);
extern int rt_hw_luminaryif_init(void);
extern int rt_hw_luminaryif_init(void);
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
@@ -100,10 +100,10 @@ void rtthread_startup(void)
#ifdef RT_USING_MODULE
/* init module system */
rt_system_module_init();
#endif
/* init scheduler system */
rt_system_scheduler_init();
#endif
#ifdef RT_USING_LWIP
eth_system_device_init();
bsp/lm3s8962/drivers/SConscript
+21
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@@ -0,0 +1,21 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
import copy
cwd = os.path.join(str(Dir('#')), 'drivers')
src = Glob('*.c')
CPPPATH = [cwd]
# remove no need file.
if GetDepend('RT_USING_LWIP') == False:
src_need_remove = ['luminaryif.c'] # need remove file list.
SrcRemove(src, src_need_remove)
if GetDepend('RT_USING_DFS') == False:
src_need_remove = ['sdcard.c'] # need remove file list.
SrcRemove(src, src_need_remove)
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lm3s8962/board.c → bsp/lm3s8962/drivers/board.c
+11 -4
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@@ -58,10 +58,17 @@ void rt_hw_timer_handler(void)
void rt_hw_eth_handler(void)
{
#ifdef RT_USING_LWIP
/* luminary ethernet interface */
extern void luminaryif_isr(void);
luminaryif_isr();
#endif
extern void luminaryif_isr(void);
/* enter interrupt */
rt_interrupt_enter();
/* luminary ethernet interface */
luminaryif_isr();
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/**
bsp/lm3s8962/board.h → bsp/lm3s8962/drivers/board.h
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File renamed without changes.
bsp/lm3s8962/luminaryif.c → bsp/lm3s8962/drivers/luminaryif.c
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File renamed without changes.
bsp/lm3s8962/luminaryif.h → bsp/lm3s8962/drivers/luminaryif.h
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File renamed without changes.
bsp/lm3s8962/sdcard.c → bsp/lm3s8962/drivers/sdcard.c
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File renamed without changes.
libcpu/arm/lm3s/serial.c → bsp/lm3s8962/drivers/serial.c
+1 -1
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@@ -23,7 +23,7 @@
#include <driverlib/sysctl.h>
#include <driverlib/interrupt.h>
#include <uart.h>
#include <driverlib/uart.h>
#include "board.h"
extern void rt_hw_interrupt_thread_switch(void);
bsp/lm3s8962/project.Uv2
+114 -122
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File diff suppressed because it is too large. Load diff
bsp/lm3s8962/rtconfig.py
+1 -1
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@@ -1,6 +1,6 @@
# toolchains options
ARCH='arm'
CPU='lm3s'
CPU='cortex-m3'
CROSS_TOOL = 'keil'
if CROSS_TOOL == 'gcc':
bsp/lm3s8962/template.Uv2
+2 -2
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@@ -31,14 +31,14 @@ Options 1,0,0 // Target 'RT-Thread-lm3s'
EnvReg (Luminary\)
OrgReg (Luminary\)
TgStat=16
OutDir (.\objs\)
OutDir (.\build\)
OutName (rtthread-lm3s)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
LstDir (.\objs\)
LstDir (.\build\)
HexSel=1
MG32K=0
TGMORE=0
bsp/lm3s9b9x/Libraries/SConscript
+12 -27
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@@ -3,34 +3,19 @@ Import('rtconfig')
from building import *
# The set of source files associated with this SConscript file.
src = Split("""
driverlib/adc.c
driverlib/can.c
driverlib/comp.c
driverlib/cpu.c
driverlib/epi.c
driverlib/ethernet.c
driverlib/flash.c
driverlib/gpio.c
driverlib/hibernate.c
driverlib/i2c.c
driverlib/i2s.c
driverlib/interrupt.c
driverlib/mpu.c
driverlib/pwm.c
driverlib/qei.c
driverlib/ssi.c
driverlib/sysctl.c
driverlib/systick.c
driverlib/timer.c
driverlib/uart.c
driverlib/udma.c
driverlib/usb.c
driverlib/watchdog.c
""")
cwd = GetCurrentDir()
src = Glob('driverlib/*.c')
CPPPATH = [RTT_ROOT + '/bsp/lm3s9b9x/Libraries/inc', RTT_ROOT + '/bsp/lm3s9b9x/Libraries', RTT_ROOT + '/bsp/lm3s9b9x/Libraries/driverlib']
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src += ['startup/gcc/start_gcc.s']
elif rtconfig.CROSS_TOOL == 'keil':
src += ['startup/arm/start_rvds.S']
elif rtconfig.CROSS_TOOL == 'iar':
src += ['startup/iar/start_iar.S']
group = DefineGroup('library', src, depend = [''], CPPPATH = CPPPATH)
CPPPATH = [cwd]
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lm3s9b9x/Libraries/startup/arm/start_rvds.S
+253
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File diff suppressed because it is too large. Load diff
bsp/lm3s9b9x/Libraries/startup/gcc/start_gcc.S
+164
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@@ -0,0 +1,164 @@
.section .bss.init
.equ Stack_Size, 0x00000200
.space Stack_Size
Initial_spTop:
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* restore original stack pointer */
LDR r0, =Initial_spTop
MSR msp, r0
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word Initial_spTop
.word Reset_Handler
.word Default_Handler //NMI_Handler
.word rt_hw_hard_fault
.word Default_Handler //MemManage_Handler
.word Default_Handler //BusFault_Handler
.word Default_Handler //UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word Default_Handler //SVC_Handler
.word Default_Handler //DebugMon_Handler
.word 0
.word rt_hw_pend_sv
.word rt_hw_timer_handler
.word Default_Handler // GPIO Port A
.word Default_Handler // GPIO Port B
.word Default_Handler // GPIO Port C
.word Default_Handler // GPIO Port D
.word Default_Handler // GPIO Port E
.word rt_hw_uart_isr_1 // UART0 Rx and Tx
.word Default_Handler // UART1 Rx and Tx
.word Default_Handler // SSI Rx and Tx
.word Default_Handler // I2C Master and Slave
.word Default_Handler // PWM Fault
.word Default_Handler // PWM Generator 0
.word Default_Handler // PWM Generator 1
.word Default_Handler // PWM Generator 2
.word Default_Handler // Quadrature Encoder
.word Default_Handler // ADC Sequence 0
.word Default_Handler // ADC Sequence 1
.word Default_Handler // ADC Sequence 2
.word Default_Handler // ADC Sequence 3
.word Default_Handler // Watchdog timer
.word Default_Handler // Timer 0 subtimer A
.word Default_Handler // Timer 0 subtimer B
.word Default_Handler // Timer 1 subtimer A
.word Default_Handler // Timer 1 subtimer B
.word Default_Handler // Timer 2 subtimer A
.word Default_Handler // Timer 2 subtimer B
.word Default_Handler // Analog Comparator 0
.word Default_Handler // Analog Comparator 1
.word Default_Handler // Analog Comparator 2
.word Default_Handler // System Control (PLL, OSC,
.word Default_Handler // FLASH Control
.word Default_Handler // GPIO Port F
.word Default_Handler // GPIO Port G
.word Default_Handler // GPIO Port H
.word Default_Handler // UART2 Rx and Tx
.word Default_Handler // SSI1 Rx and Tx
.word Default_Handler // Timer 3 subtimer A
.word Default_Handler // Timer 3 subtimer B
.word Default_Handler // I2C1 Master and Slave
.word Default_Handler // Quadrature Encoder 1
.word Default_Handler // CAN0
.word Default_Handler // CAN1
.word Default_Handler // CAN2
.word luminaryif_isr // Ethernet
.word Default_Handler // Hibernate
.word Default_Handler // USB0
.word Default_Handler // PWM Generator 3
.word Default_Handler // uDMA Software Transfer
.word Default_Handler // uDMA Error
bsp/lm3s9b9x/SConscript
+10 -15
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@@ -1,19 +1,14 @@
import rtconfig
# for module compiling
import os
Import('RTT_ROOT')
from building import *
src_bsp = ['application.c', 'startup.c', 'sdram.c', 'board.c']
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
src_drv = []
if GetDepend('RT_USING_DFS'):
src_drv += ['sdcard.c']
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
if GetDepend('RT_USING_LWIP'):
src_drv += ['luminaryif.c']
src = File(src_bsp + src_drv)
CPPPATH = [GetCurrentDir()]
group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
Return('objs')
bsp/lm3s9b9x/SConstruct
+2 -3
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@@ -19,10 +19,9 @@ Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
objs = objs + SConscript(('bsp/lm3s9b9x/Libraries/SConscript'), variant_dir='build/bsp/Libraries', duplicate=0)
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# build program
env.Program(TARGET, objs)
# end building
bsp/lm3s9b9x/applications/SConscript
+11
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@@ -0,0 +1,11 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lm3s9b9x/application.c → bsp/lm3s9b9x/applications/application.c
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File renamed without changes.
bsp/lm3s9b9x/startup.c → bsp/lm3s9b9x/applications/startup.c
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File renamed without changes.
bsp/lm3s9b9x/drivers/SConscript
+21
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@@ -0,0 +1,21 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
import copy
cwd = os.path.join(str(Dir('#')), 'drivers')
src = Glob('*.c')
CPPPATH = [cwd]
# remove no need file.
if GetDepend('RT_USING_LWIP') == False:
src_need_remove = ['luminaryif.c'] # need remove file list.
SrcRemove(src, src_need_remove)
if GetDepend('RT_USING_DFS') == False:
src_need_remove = ['sdcard.c'] # need remove file list.
SrcRemove(src, src_need_remove)
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/lm3s9b9x/board.c → bsp/lm3s9b9x/drivers/board.c
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File renamed without changes.
bsp/lm3s9b9x/board.h → bsp/lm3s9b9x/drivers/board.h
+3 -3
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@@ -20,7 +20,7 @@
/* whether use board external SRAM memory */
// <e>Use external SRAM memory on the board
// <i>Enable External SRAM memory
#define LM3S_EXT_SRAM 0
#define LM3S_EXT_SRAM 1
// <o>Begin Address of External SRAM
// <i>Default: 0x60000000
#define LM3S_EXT_SRAM_BEGIN 0x60000000 /* the begining address of external SRAM */
@@ -34,8 +34,8 @@
#define LM3S_SRAM_SIZE 96
#define LM3S_SRAM_END (0x20000000 + LM3S_SRAM_SIZE * 1024)
// For lm3s8962, it should be SYSCTL_XTAL_8MHZ
#define LM3S_XTAL_TYPE SYSCTL_XTAL_8MHZ
// For lm3s9b9x, it should be SYSCTL_XTAL_16MHZ
#define LM3S_XTAL_TYPE SYSCTL_XTAL_168MHZ
void rt_hw_board_led_on(int n);
void rt_hw_board_led_off(int n);
bsp/lm3s9b9x/luminaryif.c → bsp/lm3s9b9x/drivers/luminaryif.c
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bsp/lm3s9b9x/luminaryif.h → bsp/lm3s9b9x/drivers/luminaryif.h
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File renamed without changes.
bsp/lm3s9b9x/sdcard.c → bsp/lm3s9b9x/drivers/sdcard.c
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File renamed without changes.
bsp/lm3s9b9x/sdram.c → bsp/lm3s9b9x/drivers/sdram.c
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File renamed without changes.
bsp/lm3s9b9x/drivers/serial.c
+362
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File diff suppressed because it is too large. Load diff
bsp/lm3s9b9x/project.Uv2
+108 -131
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File diff suppressed because it is too large. Load diff
bsp/lm3s9b9x/rtconfig.py
+1 -1
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@@ -1,6 +1,6 @@
# toolchains options
ARCH='arm'
CPU='lm3s'
CPU='cortex-m3'
CROSS_TOOL = 'keil'
if CROSS_TOOL == 'gcc':
bsp/lm3s9b9x/template.Uv2
+2 -2
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@@ -31,14 +31,14 @@ Options 1,0,0 // Target 'RT-Thread-lm3s'
EnvReg (Luminary\)
OrgReg (Luminary\)
TgStat=16
OutDir (.\objs\)
OutDir (.\build\)
OutName (rtthread-lm3s)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
LstDir (.\objs\)
LstDir (.\build\)
HexSel=1
MG32K=0
TGMORE=0
bsp/lpc176x/project.Uv2
+12 -12
View File
@@ -5,7 +5,7 @@ Target (RT-Thread LPC17xx), 0x0004 // Tools: 'ARM-ADS'
Group (Startup)
Group (Kernel)
Group (LPC17XX)
Group (CORTEX-M3)
Group (finsh)
Group (LwIP)
Group (CMSIS)
@@ -16,20 +16,20 @@ File 1,1,<.\board.c><board.c>
File 1,1,<.\uart.c><uart.c>
File 1,1,<.\led.c><led.c>
File 1,1,<.\emac.c><emac.c>
File 2,1,<..\..\src\clock.c><clock.c>
File 2,1,<..\..\src\device.c><device.c>
File 2,1,<..\..\src\thread.c><thread.c>
File 2,1,<..\..\src\scheduler.c><scheduler.c>
File 2,1,<..\..\src\timer.c><timer.c>
File 2,1,<..\..\src\idle.c><idle.c>
File 2,1,<..\..\src\ipc.c><ipc.c>
File 2,1,<..\..\src\irq.c><irq.c>
File 2,1,<..\..\src\kservice.c><kservice.c>
File 2,1,<..\..\src\clock.c><clock.c>
File 2,1,<..\..\src\object.c><object.c>
File 2,1,<..\..\src\mempool.c><mempool.c>
File 2,1,<..\..\src\ipc.c><ipc.c>
File 2,1,<..\..\src\idle.c><idle.c>
File 2,1,<..\..\src\mem.c><mem.c>
File 3,1,<..\..\libcpu\arm\lpc17xx\cpuport.c><cpuport.c>
File 3,2,<..\..\libcpu\arm\lpc17xx\context_rvds.S><context_rvds.S>
File 2,1,<..\..\src\mempool.c><mempool.c>
File 2,1,<..\..\src\object.c><object.c>
File 2,1,<..\..\src\scheduler.c><scheduler.c>
File 2,1,<..\..\src\thread.c><thread.c>
File 2,1,<..\..\src\timer.c><timer.c>
File 3,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
File 3,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
File 3,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
File 3,1,<..\..\libcpu\arm\common\div0.c><div0.c>
File 3,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
@@ -144,7 +144,7 @@ Options 1,0,0 // Target 'RT-Thread LPC17xx'
ADSCMISC ()
ADSCDEFN ()
ADSCUDEF ()
ADSCINCD (..\..\components\net\lwip\src\include\ipv4;..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\libcpu\arm\lpc17xx;..\..\include;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif)
ADSCINCD (..\..\components\net\lwip\src\arch\include;CMSIS\CM3\DeviceSupport\NXP\LPC17xx;..\..\components\net\lwip\src\include;.;..\..\components\net\lwip\src\include\ipv4;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\components\net\lwip\src;..\..\libcpu\arm\common;CMSIS\CM3\CoreSupport;..\..\components\finsh;..\..\components\net\lwip\src\include\netif)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
bsp/lpc176x/project.ewp
+93 -278
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bsp/lpc176x/rtconfig.py
+1 -1
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@@ -1,6 +1,6 @@
# toolchains options
ARCH='arm'
CPU='lpc17xx'
CPU='cortex-m3'
CROSS_TOOL='keil'
if CROSS_TOOL == 'gcc':
bsp/lpc176x/template.ewp
+72 -208
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libcpu/arm/lm3s/context_gcc.S
-166
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@@ -1,166 +0,0 @@
/*
* File : context_gcc.S
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-10-11 Bernard first version
*/
/**
* @addtogroup STM32
*/
/*@{*/
.cpu cortex-m3
.fpu softvfp
.syntax unified
.thumb
.text
.equ NVIC_INT_CTRL, 0xE000ED04 /* interrupt control state register */
.equ NVIC_SYSPRI2, 0xE000ED20 /* system priority register (2) */
.equ NVIC_PENDSV_PRI, 0x00FF0000 /* PendSV priority value (lowest) */
.equ NVIC_PENDSVSET, 0x10000000 /* value to trigger PendSV exception */
/*
* rt_base_t rt_hw_interrupt_disable();
*/
.global rt_hw_interrupt_disable
.type rt_hw_interrupt_disable, %function
rt_hw_interrupt_disable:
MRS r0, PRIMASK
CPSID I
BX LR
/*
* void rt_hw_interrupt_enable(rt_base_t level);
*/
.global rt_hw_interrupt_enable
.type rt_hw_interrupt_enable, %function
rt_hw_interrupt_enable:
MSR PRIMASK, r0
BX LR
/*
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
* r0 --> from
* r1 --> to
*/
.global rt_hw_context_switch_interrupt
.type rt_hw_context_switch_interrupt, %function
.global rt_hw_context_switch
.type rt_hw_context_switch, %function
rt_hw_context_switch_interrupt:
rt_hw_context_switch:
/* set rt_thread_switch_interrupt_flag to 1 */
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread */
STR r0, [r2]
_reswitch:
LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread */
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
/* r0 --> swith from thread stack
* r1 --> swith to thread stack
* psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
*/
.global rt_hw_pend_sv
.type rt_hw_pend_sv, %function
rt_hw_pend_sv:
/* disable interrupt to protect context switch */
MRS r2, PRIMASK
CPSID I
/* get rt_thread_switch_interrupt_flag */
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit /* pendsv already handled */
/* clear rt_thread_switch_interrupt_flag to 0 */
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread /* skip register save at the first time */
MRS r1, psp /* get from thread stack pointer */
STMFD r1!, {r4 - r11} /* push r4 - r11 register */
LDR r0, [r0]
STR r1, [r0] /* update from thread stack pointer */
swtich_to_thread:
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] /* load thread stack pointer */
LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
MSR psp, r1 /* update stack pointer */
pendsv_exit:
/* restore interrupt */
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
/*
* void rt_hw_context_switch_to(rt_uint32 to);
* r0 --> to
*/
.global rt_hw_context_switch_to
.type rt_hw_context_switch_to, %function
rt_hw_context_switch_to:
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
/* set from thread to 0 */
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
/* set interrupt flag to 1 */
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
/* set the PendSV exception priority */
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W R2, [r0,#0x00] /* read */
ORR r1,r1,r2 /* modify */
STR r1, [r0] /* write-back */
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
CPSIE I /* enable interrupts at processor level */
/* never reach here! */
/* compatible with old version */
.global rt_hw_interrupt_thread_switch
.type rt_hw_interrupt_thread_switch, %function
rt_hw_interrupt_thread_switch:
BX lr
NOP
libcpu/arm/lm3s/context_rvds.S
-175
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@@ -1,175 +0,0 @@
;/*
; * File : context.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2006, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; */
;/**
; * @addtogroup STM32
; */
;/*@{*/
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
rt_hw_interrupt_disable PROC
EXPORT rt_hw_interrupt_disable
MRS r0, PRIMASK
CPSID I
BX LR
ENDP
;/*
; * void rt_hw_interrupt_enable(rt_base_t level);
; */
rt_hw_interrupt_enable PROC
EXPORT rt_hw_interrupt_enable
MSR PRIMASK, r0
BX LR
ENDP
;/*
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; * r0 --> from
; * r1 --> to
; */
rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch_interrupt
rt_hw_context_switch PROC
EXPORT rt_hw_context_switch
; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
ENDP
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
rt_hw_pend_sv PROC
EXPORT rt_hw_pend_sv
; disable interrupt to protect context switch
MRS r2, PRIMASK
CPSID I
; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread ; skip register save at the first time
MRS r1, psp ; get from thread stack pointer
STMFD r1!, {r4 - r11} ; push r4 - r11 register
LDR r0, [r0]
STR r1, [r0] ; update from thread stack pointer
swtich_to_thread
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] ; load thread stack pointer
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
ENDP
;/*
; * void rt_hw_context_switch_to(rt_uint32 to);
; * r0 --> to
; * this fucntion is used to perform the first thread switch
; */
rt_hw_context_switch_to PROC
EXPORT rt_hw_context_switch_to
; set to thread
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
; set from thread to 0
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
STR r1, [r0]
; trigger the PendSV exception (causes context switch)
LDR r0, =NVIC_INT_CTRL
LDR r1, =NVIC_PENDSVSET
LDR.W R2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-bak
; enable interrupts at processor level
CPSIE I
; never reach here!
ENDP
; compatible with old version
rt_hw_interrupt_thread_switch PROC
EXPORT rt_hw_interrupt_thread_switch
BX lr
NOP
ENDP
END
libcpu/arm/lm3s/cpu.c
-42
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@@ -1,42 +0,0 @@
/*
* File : cpu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
*/
#include <rtthread.h>
/**
* @addtogroup S3C2410
*/
/*@{*/
/**
* reset cpu by dog's time-out
*
*/
void rt_hw_cpu_reset()
{
/*NOTREACHED*/
}
/**
* shutdown CPU
*
*/
void rt_hw_cpu_shutdown()
{
rt_kprintf("shutdown...\n");
RT_ASSERT(0);
}
/*@}*/
libcpu/arm/lm3s/fault.c
-34
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@@ -1,34 +0,0 @@
#include <rtthread.h>
struct stack_contex
{
rt_uint32_t r0;
rt_uint32_t r1;
rt_uint32_t r2;
rt_uint32_t r3;
rt_uint32_t r12;
rt_uint32_t lr;
rt_uint32_t pc;
rt_uint32_t psr;
};
extern void rt_hw_interrupt_thread_switch(void);
extern void list_thread(void);
extern rt_thread_t rt_current_thread;
void rt_hw_hard_fault_exception(struct stack_contex* contex)
{
rt_kprintf("psr: 0x%08x\n", contex->psr);
rt_kprintf(" pc: 0x%08x\n", contex->pc);
rt_kprintf(" lr: 0x%08x\n", contex->lr);
rt_kprintf("r12: 0x%08x\n", contex->r12);
rt_kprintf("r03: 0x%08x\n", contex->r3);
rt_kprintf("r02: 0x%08x\n", contex->r2);
rt_kprintf("r01: 0x%08x\n", contex->r1);
rt_kprintf("r00: 0x%08x\n", contex->r0);
rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
#endif
while (1);
}
libcpu/arm/lm3s/fault_gcc.S
-31
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@@ -1,31 +0,0 @@
/*
* File : fault_gcc.S
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-10-11 Bernard first version
*/
.cpu cortex-m3
.fpu softvfp
.syntax unified
.thumb
.text
.global rt_hw_hard_fault
.type rt_hw_hard_fault, %function
rt_hw_hard_fault:
/* get current context */
MRS r0, psp /* get fault thread stack pointer */
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
libcpu/arm/lm3s/fault_rvds.S
-35
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@@ -1,35 +0,0 @@
;/*
; * File : context.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2006, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; */
AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_hw_hard_fault_exception
rt_hw_hard_fault PROC
EXPORT rt_hw_hard_fault
; get current context
MRS r0, psp ; get fault thread stack pointer
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
ENDP
END
libcpu/arm/lm3s/interrupt.c
-21
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@@ -1,21 +0,0 @@
/*
* File : trap.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
*/
#include <rtthread.h>
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;
/*@}*/
libcpu/arm/lm3s/stack.c
-59
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@@ -1,59 +0,0 @@
/*
* File : stack.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-23 Bernard the first version
*/
#include <rtthread.h>
/**
* @addtogroup STM32
*/
/*@{*/
/**
* This function will initialize thread stack
*
* @param tentry the entry of thread
* @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
* @return stack address
*/
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{
unsigned long *stk;
stk = (unsigned long *)stack_addr;
*(stk) = 0x01000000L; /* PSR */
*(--stk) = (unsigned long)tentry; /* entry point, pc */
*(--stk) = (unsigned long)texit; /* lr */
*(--stk) = 0; /* r12 */
*(--stk) = 0; /* r3 */
*(--stk) = 0; /* r2 */
*(--stk) = 0; /* r1 */
*(--stk) = (unsigned long)parameter; /* r0 : argument */
*(--stk) = 0; /* r11 */
*(--stk) = 0; /* r10 */
*(--stk) = 0; /* r9 */
*(--stk) = 0; /* r8 */
*(--stk) = 0; /* r7 */
*(--stk) = 0; /* r6 */
*(--stk) = 0; /* r5 */
*(--stk) = 0; /* r4 */
/* return task's current stack address */
return (rt_uint8_t *)stk;
}
/*@}*/
libcpu/arm/lpc17xx/context_iar.S
-170
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@@ -1,170 +0,0 @@
;/*
; * File : context_iar.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; * 2010-02-04 Magicoe Edit for LPC17xx Series
; * 2010-12-20 aozima edit for IAR
; */
;/**
; * @addtogroup LPC17
; */
;/*@{*/
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
SECTION .text:CODE(2)
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
EXPORT rt_hw_interrupt_disable
rt_hw_interrupt_disable:
MRS r0, PRIMASK
CPSID I
BX LR
;/*
; * void rt_hw_interrupt_enable(rt_base_t level);
; */
EXPORT rt_hw_interrupt_enable
rt_hw_interrupt_enable:
MSR PRIMASK, r0
BX LR
;/*
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; * r0 --> from
; * r1 --> to
; */
EXPORT rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch
rt_hw_context_switch_interrupt:
rt_hw_context_switch:
; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
EXPORT rt_hw_pend_sv
rt_hw_pend_sv:
; disable interrupt to protect context switch
MRS r2, PRIMASK
CPSID I
; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread ; skip register save at the first time
MRS r1, psp ; get from thread stack pointer
STMFD r1!, {r4 - r11} ; push r4 - r11 register
LDR r0, [r0]
STR r1, [r0] ; update from thread stack pointer
swtich_to_thread
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] ; load thread stack pointer
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
;/*
; * void rt_hw_context_switch_to(rt_uint32 to);
; * r0 --> to
; * this fucntion is used to perform the first thread switch
; */
EXPORT rt_hw_context_switch_to
rt_hw_context_switch_to:
; set to thread
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
; set from thread to 0
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W R2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-bak
; trigger the PendSV exception (causes context switch)
LDR r0, =NVIC_INT_CTRL
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
; enable interrupts at processor level
CPSIE I
; never reach here!
; compatible with old version
EXPORT rt_hw_interrupt_thread_switch
rt_hw_interrupt_thread_switch:
BX lr
END
libcpu/arm/lpc17xx/context_rvds.S
-189
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@@ -1,189 +0,0 @@
;/*
; * File : context_rvds.S
; * This file is part of RT-Thread RTOS
; * COPYRIGHT (C) 2009, RT-Thread Development Team
; *
; * The license and distribution terms for this file may be
; * found in the file LICENSE in this distribution or at
; * http://www.rt-thread.org/license/LICENSE
; *
; * Change Logs:
; * Date Author Notes
; * 2009-01-17 Bernard first version
; * 2010-02-04 Magicoe Edit for LPC17xx Series
; */
;/**
; * @addtogroup LPC17
; */
;/*@{*/
NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread
IMPORT rt_hw_hard_fault_exception
;/*
; * rt_base_t rt_hw_interrupt_disable();
; */
rt_hw_interrupt_disable PROC
EXPORT rt_hw_interrupt_disable
MRS r0, PRIMASK
CPSID I
BX LR
ENDP
;/*
; * void rt_hw_interrupt_enable(rt_base_t level);
; */
rt_hw_interrupt_enable PROC
EXPORT rt_hw_interrupt_enable
MSR PRIMASK, r0
BX LR
ENDP
;/*
; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
; * r0 --> from
; * r1 --> to
; */
rt_hw_context_switch_interrupt
EXPORT rt_hw_context_switch_interrupt
rt_hw_context_switch PROC
EXPORT rt_hw_context_switch
; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2]
CMP r3, #1
BEQ _reswitch
MOV r3, #1
STR r3, [r2]
LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
STR r0, [r2]
_reswitch
LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
STR r1, [r2]
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
BX LR
ENDP
; r0 --> swith from thread stack
; r1 --> swith to thread stack
; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
PendSV_Handler PROC
EXPORT PendSV_Handler
; disable interrupt to protect context switch
MRS r2, PRIMASK
CPSID I
; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00
STR r1, [r0]
LDR r0, =rt_interrupt_from_thread
LDR r1, [r0]
CBZ r1, swtich_to_thread ; skip register save at the first time
MRS r1, psp ; get from thread stack pointer
STMFD r1!, {r4 - r11} ; push r4 - r11 register
LDR r0, [r0]
STR r1, [r0] ; update from thread stack pointer
swtich_to_thread
LDR r1, =rt_interrupt_to_thread
LDR r1, [r1]
LDR r1, [r1] ; load thread stack pointer
LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
MSR psp, r1 ; update stack pointer
pendsv_exit
; restore interrupt
MSR PRIMASK, r2
ORR lr, lr, #0x04
BX lr
ENDP
;/*
; * void rt_hw_context_switch_to(rt_uint32 to);
; * r0 --> to
; * this fucntion is used to perform the first thread switch
; */
rt_hw_context_switch_to PROC
EXPORT rt_hw_context_switch_to
; set to thread
LDR r1, =rt_interrupt_to_thread
STR r0, [r1]
; set from thread to 0
LDR r1, =rt_interrupt_from_thread
MOV r0, #0x0
STR r0, [r1]
; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1
STR r0, [r1]
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
LDR.W R2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-bak
; trigger the PendSV exception (causes context switch)
LDR r0, =NVIC_INT_CTRL
LDR r1, =NVIC_PENDSVSET
STR r1, [r0]
; enable interrupts at processor level
CPSIE I
; never reach here!
ENDP
; compatible with old version
rt_hw_interrupt_thread_switch PROC
EXPORT rt_hw_interrupt_thread_switch
BX lr
NOP
ENDP
HardFault_Handler PROC
EXPORT HardFault_Handler
; get current context
MRS r0, psp ; get fault thread stack pointer
PUSH {lr}
BL rt_hw_hard_fault_exception
POP {lr}
ORR lr, lr, #0x04
BX lr
ENDP
END
libcpu/arm/lpc17xx/cpuport.c
-98
View File
@@ -1,98 +0,0 @@
/*
* File : cpu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first version
* 2010-02-04 Magicoe Edit for LPC17xx Series
* 2011-10-14 aozima merge all of C source code into cpuport.c
*/
#include <rtthread.h>
/**
* @addtogroup LPC17xx
*/
/*@{*/
struct stack_contex
{
rt_uint32_t r0;
rt_uint32_t r1;
rt_uint32_t r2;
rt_uint32_t r3;
rt_uint32_t r12;
rt_uint32_t lr;
rt_uint32_t pc;
rt_uint32_t psr;
};
/* exception and interrupt handler table */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrupt_flag;
/**
* This function will initialize thread stack
*
* @param tentry the entry of thread
* @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
* @return stack address
*/
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{
unsigned long *stk;
stk = (unsigned long *)stack_addr;
*(stk) = 0x01000000L; /* PSR */
*(--stk) = (unsigned long)tentry; /* entry point, pc */
*(--stk) = (unsigned long)texit; /* lr */
*(--stk) = 0; /* r12 */
*(--stk) = 0; /* r3 */
*(--stk) = 0; /* r2 */
*(--stk) = 0; /* r1 */
*(--stk) = (unsigned long)parameter; /* r0 : argument */
*(--stk) = 0; /* r11 */
*(--stk) = 0; /* r10 */
*(--stk) = 0; /* r9 */
*(--stk) = 0; /* r8 */
*(--stk) = 0; /* r7 */
*(--stk) = 0; /* r6 */
*(--stk) = 0; /* r5 */
*(--stk) = 0; /* r4 */
/* return task's current stack address */
return (rt_uint8_t *)stk;
}
extern void list_thread(void);
extern rt_thread_t rt_current_thread;
void rt_hw_hard_fault_exception(struct stack_contex* contex)
{
rt_kprintf("psr: 0x%08x\n", contex->psr);
rt_kprintf(" pc: 0x%08x\n", contex->pc);
rt_kprintf(" lr: 0x%08x\n", contex->lr);
rt_kprintf("r12: 0x%08x\n", contex->r12);
rt_kprintf("r03: 0x%08x\n", contex->r3);
rt_kprintf("r02: 0x%08x\n", contex->r2);
rt_kprintf("r01: 0x%08x\n", contex->r1);
rt_kprintf("r00: 0x%08x\n", contex->r0);
rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
#ifdef RT_USING_FINSH
list_thread();
#endif
while (1);
}
/*@}*/