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[bsp][phytium] support Phytium PI

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This commit is contained in:
zhugengyu
2023-08-28 22:27:54 -04:00
committed by GitHub
parent 810da67b6f
commit 6db430bde6
33 changed files with 8190 additions and 159 deletions
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bsp/phytium/README.md
+16 -7
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@@ -19,9 +19,7 @@
- 飞腾芯片产品具有谱系全、性能高、生态完善、自主化程度高等特点，目前主要包括高性能服务器CPU（飞腾腾云S系列）、高效能桌面CPU（飞腾腾锐D系列）、高端嵌入式CPU（飞腾腾珑E系列）和飞腾套片四大系列，为从端到云的各型设备提供核心算力支撑。
- 本BSP目前支持飞腾腾锐D系列、飞腾腾珑E系列 相关CPU,基于 Phytium-Standalone-SDK 进行开发。开发者能够使用
- 本BSP目前支持飞腾派、飞腾腾锐D系列、飞腾腾珑E系列 相关CPU, 基于 Phytium-Standalone-SDK 进行开发。开发者能够使用
- 本BSP 支持Phytium系列CPU 工作在 aarch32/aarch64 两种执行状态 ，开发者能够根据自己的应用场景灵活选择CPU 工作状态。
@@ -31,10 +29,14 @@
| **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| UART | 支持 | uart1 打印输出|
| UART | 支持 | UART1 打印输出 |
| GPIO | 支持 | GPIO 引脚电平输入输出，中断 |
| XMAC | 支持 | XMAC 网卡初始化和运行 |
| SDMMC | 支持 | SD0/SD1 读写 SD 卡或 eMMC 颗粒 |
| **芯片** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| Phytium PI | 支持 | 支持SMP |
| E2000D | 支持 | 支持SMP |
| E2000Q | 支持 | 支持SMP |
| E2000S | 支持 | |
@@ -144,7 +146,14 @@ tftp> q
![输入图片说明](./figures/config_tftp32.png)
#### 利用uboot 上tftp 服务加载镜像
#### 格式化 SD 卡
- RT-Smart 依赖 SD 卡挂载为 / 目录，要保证插入的卡格式为 FAT32，否则会提示初始化失败的信息
- Phytium PI 固件可能在 SD 卡中，这种情况下需要将 SD 卡分成两个区，第一个分区格式为 RAW 放置固件，第二个分区格式为 FAT32 作为 RT-Thread/RT-Smart 的根目录使用，在编译镜像时，需要调整 CONFIG_SDCARD_OFFSET 配置，避免读写操作影响固件
#### 利用 uboot 上tftp 服务加载镜像
- 进入`u-boot`界面，输入如下指令，配置开发板ip，`host`侧ip和网关地址
```
@@ -156,8 +165,8 @@ tftp> q
- 随后烧录的文件到开发板，输入以下指令
```
tftpboot 0x90100000 rtthread.elf
bootelf -p 0x90100000
tftpboot 0x80080000 rtthread.bin
go 0x80080000
```
### 运行结果
bsp/phytium/aarch32/.config
+41 -55
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bsp/phytium/aarch32/applications/mnt.c
+1 -9
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@@ -36,16 +36,8 @@ static int filesystem_mount(void)
}
else
{
LOG_W("[sd] File System on SD initialization failed!");
LOG_W("[sd] Try to format and re-mount...");
if (dfs_mkfs("elm", SD_DEIVCE_NAME) == 0)
{
if (dfs_mount(SD_DEIVCE_NAME, "/", "elm", 0, 0) == 0)
{
LOG_I("[sd] File System on SD initialized!");
}
}
LOG_E("[sd] File System on SD initialization failed!");
LOG_E("[sd] Please format SD Card as FAT32!!!...");
return -1;
}
bsp/phytium/aarch32/configs/phytium_pi_rtsmart
+1251
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bsp/phytium/aarch32/configs/phytium_pi_rtsmart.h
+428
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bsp/phytium/aarch32/configs/phytium_pi_rtthread
+1237
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bsp/phytium/aarch32/configs/phytium_pi_rtthread.h
+417
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bsp/phytium/aarch32/makefile
+17 -1
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@@ -21,6 +21,10 @@ ifdef CONFIG_TARGET_E2000D
RTCONFIG := e2000d
endif
ifdef CONFIG_TARGET_PHYTIUMPI
RTCONFIG := phytium_pi
endif
ifdef CONFIG_RT_USING_SMART
RTCONFIG := $(RTCONFIG)_rtsmart
else
@@ -103,4 +107,16 @@ load_e2000d_rtthread_test:
@echo "Load configs from ./configs/e2000d_rtthread_test"
@cp ./configs/e2000d_rtthread_test ./.config -f
@cp ./configs/e2000d_rtthread_test.h ./rtconfig.h -f
scons -c
scons -c
load_phytium_pi_rtthread:
@echo "Load configs from ./configs/phytium_pi_rtthread"
@cp ./configs/phytium_pi_rtthread ./.config -f
@cp ./configs/phytium_pi_rtthread.h ./rtconfig.h -f
scons -c
load_phytium_pi_rtsmart:
@echo "Load configs from ./configs/phytium_pi_rtsmart"
@cp ./configs/phytium_pi_rtsmart ./.config -f
@cp ./configs/phytium_pi_rtsmart.h ./rtconfig.h -f
@scons -c
bsp/phytium/aarch32/rtconfig.h
+20 -22
View File
@@ -8,6 +8,8 @@
#define RT_NAME_MAX 16
#define RT_USING_SMART
#define RT_USING_SMP
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
@@ -18,6 +20,7 @@
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 4096
#define SYSTEM_THREAD_STACK_SIZE 4096
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 4096
@@ -135,19 +138,16 @@
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 1024
#define RT_USING_TTY
#define RT_USING_PIN
#define RT_USING_NULL
#define RT_USING_ZERO
#define RT_USING_RANDOM
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 4096
#define RT_SDIO_STACK_SIZE 512
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 4096
#define RT_MMCSD_STACK_SIZE 1024
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_DEV_BUS
/* Using USB */
@@ -155,7 +155,14 @@
/* C/C++ and POSIX layer */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
@@ -336,7 +343,7 @@
/* Arduino libraries */
/* Projects and Demos */
/* Projects */
/* Sensors */
@@ -373,11 +380,11 @@
#define BSP_USING_UART
#define RT_USING_UART1
#define BSP_USING_SPI
#define RT_USING_SPIM2
#define BSP_USING_GPIO
#define BSP_USING_QSPI
#define USING_QSPI_CHANNEL0
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_SDIO
#define BSP_USING_SDCARD_FATFS
#define USING_SDIO0
/* Board extended module Drivers */
@@ -390,19 +397,12 @@
/* Board Configuration */
#define TARGET_E2000D
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
/* Components Configuration */
#define USE_SPI
#define USE_FSPIM
#define USE_QSPI
/* Qspi Configuration */
#define USE_FQSPI
#define USE_GIC
#define ENABLE_GICV3
#define USE_IOPAD
@@ -412,8 +412,6 @@
/* Usart Configuration */
#define ENABLE_Pl011_UART
#define USE_GPIO
#define ENABLE_FGPIO
#define USE_ETH
/* Eth Configuration */
bsp/phytium/aarch64/.config
+22 -13
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@@ -11,7 +11,7 @@ CONFIG_RT_NAME_MAX=16
# CONFIG_RT_USING_SMART is not set
# CONFIG_RT_USING_AMP is not set
CONFIG_RT_USING_SMP=y
CONFIG_RT_CPUS_NR=2
CONFIG_RT_CPUS_NR=4
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
@@ -85,10 +85,6 @@ CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
#
# RT-Thread Architecture
#
CONFIG_ARCH_CPU_64BIT=y
CONFIG_RT_USING_CACHE=y
# CONFIG_RT_USING_HW_ATOMIC is not set
@@ -99,6 +95,10 @@ CONFIG_ARCH_MM_MMU=y
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM_MMU=y
CONFIG_ARCH_ARMV8=y
#
# AArch64 Architecture Configuration
#
CONFIG_ARCH_TEXT_OFFSET=0x80000
CONFIG_ARCH_RAM_OFFSET=0x80000000
CONFIG_ARCH_SECONDARY_CPU_STACK_SIZE=4096
@@ -234,7 +234,19 @@ CONFIG_RT_MMCSD_MAX_PARTITION=16
#
# C/C++ and POSIX layer
#
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# ISO-ANSI C layer
#
#
# Timezone and Daylight Saving Time
#
# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set
CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# POSIX (Portable Operating System Interface) layer
@@ -244,6 +256,7 @@ CONFIG_RT_USING_POSIX_DEVIO=y
CONFIG_RT_USING_POSIX_STDIO=y
# CONFIG_RT_USING_POSIX_POLL is not set
# CONFIG_RT_USING_POSIX_SELECT is not set
# CONFIG_RT_USING_POSIX_EVENTFD is not set
# CONFIG_RT_USING_POSIX_SOCKET is not set
CONFIG_RT_USING_POSIX_TERMIOS=y
# CONFIG_RT_USING_POSIX_AIO is not set
@@ -1185,11 +1198,7 @@ CONFIG_RT_USING_UART1=y
# CONFIG_BSP_USING_QSPI is not set
CONFIG_BSP_USING_ETH=y
CONFIG_RT_LWIP_PBUF_POOL_BUFSIZE=1700
CONFIG_BSP_USING_SDIO=y
CONFIG_BSP_USING_SDCARD_FATFS=y
# CONFIG_USING_SDIO0 is not set
CONFIG_USING_SDIO1=y
# CONFIG_USING_EMMC is not set
# CONFIG_BSP_USING_SDIO is not set
#
# Board extended module Drivers
@@ -1197,7 +1206,6 @@ CONFIG_USING_SDIO1=y
CONFIG_BSP_USING_GIC=y
CONFIG_BSP_USING_GICV3=y
CONFIG_PHYTIUM_ARCH_AARCH64=y
CONFIG_ARM_SPI_BIND_CPU_ID=0
#
# Standalone Setting
@@ -1210,8 +1218,9 @@ CONFIG_TARGET_ARMV8_AARCH64=y
# CONFIG_TARGET_F2000_4 is not set
# CONFIG_TARGET_D2000 is not set
# CONFIG_TARGET_E2000Q is not set
CONFIG_TARGET_E2000D=y
# CONFIG_TARGET_E2000D is not set
# CONFIG_TARGET_E2000S is not set
CONFIG_TARGET_PHYTIUMPI=y
CONFIG_TARGET_E2000=y
CONFIG_DEFAULT_DEBUG_PRINT_UART1=y
# CONFIG_DEFAULT_DEBUG_PRINT_UART0 is not set
bsp/phytium/aarch64/Kconfig
+6
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@@ -54,6 +54,12 @@ if TARGET_E2000D
default 0
endif
if TARGET_PHYTIUMPI
config ARM_SPI_BIND_CPU_ID
int
default 2
endif
menu "Standalone Setting"
config TARGET_ARMV8_AARCH64
bool "Armv8 Aarch64"
bsp/phytium/aarch64/applications/mnt.c
+1 -9
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@@ -36,16 +36,8 @@ static int filesystem_mount(void)
}
else
{
LOG_W("[sd] File System on SD initialization failed!");
LOG_W("[sd] Try to format and re-mount...");
if (dfs_mkfs("elm", SD_DEIVCE_NAME) == 0)
{
if (dfs_mount(SD_DEIVCE_NAME, "/", "elm", 0, 0) == 0)
{
LOG_I("[sd] File System on SD initialized!");
}
}
LOG_E("[sd] File System on SD initialization failed!");
LOG_E("[sd] Please format SD Card as FAT32!!!...");
return -1;
}
bsp/phytium/aarch64/configs/phytium_pi_rtsmart
+1306
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File diff suppressed because it is too large Load Diff
bsp/phytium/aarch64/configs/phytium_pi_rtsmart.h
+430
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File diff suppressed because it is too large Load Diff
bsp/phytium/aarch64/configs/phytium_pi_rtthread
+1289
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File diff suppressed because it is too large Load Diff
bsp/phytium/aarch64/configs/phytium_pi_rtthread.h
+416
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File diff suppressed because it is too large Load Diff
bsp/phytium/aarch64/makefile
+16
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@@ -22,6 +22,10 @@ ifdef CONFIG_TARGET_E2000D
RTCONFIG := e2000d
endif
ifdef CONFIG_TARGET_PHYTIUMPI
RTCONFIG := phytium_pi
endif
ifdef CONFIG_RT_USING_SMART
RTCONFIG := $(RTCONFIG)_rtsmart
else
@@ -104,4 +108,16 @@ load_e2000d_rtthread_test:
@echo "Load configs from ./configs/e2000d_rtthread"
@cp ./configs/e2000d_rtthread_test ./.config -f
@cp ./configs/e2000d_rtthread_test.h ./rtconfig.h -f
@scons -c
load_phytium_pi_rtthread:
@echo "Load configs from ./configs/phytium_pi_rtthread"
@cp ./configs/phytium_pi_rtthread ./.config -f
@cp ./configs/phytium_pi_rtthread.h ./rtconfig.h -f
scons -c
load_phytium_pi_rtsmart:
@echo "Load configs from ./configs/phytium_pi_rtsmart"
@cp ./configs/phytium_pi_rtsmart ./.config -f
@cp ./configs/phytium_pi_rtsmart.h ./rtconfig.h -f
@scons -c
bsp/phytium/aarch64/rtconfig.h
+13 -10
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@@ -8,7 +8,7 @@
#define RT_NAME_MAX 16
#define RT_USING_SMP
#define RT_CPUS_NR 2
#define RT_CPUS_NR 4
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
@@ -58,9 +58,6 @@
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50001
/* RT-Thread Architecture */
#define ARCH_CPU_64BIT
#define RT_USING_CACHE
#define ARCH_ARM_BOOTWITH_FLUSH_CACHE
@@ -68,6 +65,9 @@
#define ARCH_ARM
#define ARCH_ARM_MMU
#define ARCH_ARMV8
/* AArch64 Architecture Configuration */
#define ARCH_TEXT_OFFSET 0x80000
#define ARCH_RAM_OFFSET 0x80000000
#define ARCH_SECONDARY_CPU_STACK_SIZE 4096
@@ -147,7 +147,14 @@
/* C/C++ and POSIX layer */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* ISO-ANSI C layer */
/* Timezone and Daylight Saving Time */
#define RT_LIBC_USING_LIGHT_TZ_DST
#define RT_LIBC_TZ_DEFAULT_HOUR 8
#define RT_LIBC_TZ_DEFAULT_MIN 0
#define RT_LIBC_TZ_DEFAULT_SEC 0
/* POSIX (Portable Operating System Interface) layer */
@@ -362,16 +369,12 @@
#define RT_USING_UART1
#define BSP_USING_ETH
#define RT_LWIP_PBUF_POOL_BUFSIZE 1700
#define BSP_USING_SDIO
#define BSP_USING_SDCARD_FATFS
#define USING_SDIO1
/* Board extended module Drivers */
#define BSP_USING_GIC
#define BSP_USING_GICV3
#define PHYTIUM_ARCH_AARCH64
#define ARM_SPI_BIND_CPU_ID 0
/* Standalone Setting */
@@ -379,7 +382,7 @@
/* Board Configuration */
#define TARGET_E2000D
#define TARGET_PHYTIUMPI
#define TARGET_E2000
#define DEFAULT_DEBUG_PRINT_UART1
bsp/phytium/board/SConscript
+15 -10
View File
@@ -3,23 +3,28 @@ from building import *
cwd = GetCurrentDir()
src = Glob('*.S')
src += Glob('*.c')
if GetDepend(['TARGET_E2000']):
if GetDepend(['TARGET_E2000Q']):
src += Glob(cwd + '/e2000/memory_map.c')
if GetDepend(['TARGET_E2000Q']):
src += Glob(cwd + '/e2000/q/parameters.c')
elif GetDepend(['TARGET_E2000D']):
src += Glob(cwd + '/e2000/d/parameters.c')
elif GetDepend(['TARGET_E2000S']):
src += Glob(cwd + '/e2000/s/parameters.c')
src += Glob(cwd + '/e2000/q/parameters.c')
elif GetDepend(['TARGET_E2000D']):
src += Glob(cwd + '/e2000/memory_map.c')
src += Glob(cwd + '/e2000/d/parameters.c')
elif GetDepend(['TARGET_E2000S']):
src += Glob(cwd + '/e2000/memory_map.c')
src += Glob(cwd + '/e2000/s/parameters.c')
if GetDepend(['TARGET_F2000_4']):
src += Glob(cwd + '/ft2004/memory_map.c')
src += Glob(cwd + '/d2000/parameters.c')
src += Glob(cwd + '/ft2004/parameters.c')
if GetDepend(['TARGET_D2000']):
src += Glob(cwd + '/d2000/memory_map.c')
src += Glob(cwd + '/ft2004/parameters.c')
src += Glob(cwd + '/d2000/parameters.c')
if GetDepend(['TARGET_PHYTIUMPI']):
src += Glob(cwd + '/phytium-pi/memory_map.c')
src += Glob(cwd + '/phytium-pi/parameters.c')
CPPPATH = [cwd]
bsp/phytium/board/board.c
+1 -1
View File
@@ -219,7 +219,7 @@ void rt_hw_board_aarch32_init(void)
arm_gic_redist_address_set(0, redist_addr + (cpu_id + cpu_offset) * GICV3_RD_OFFSET, rt_hw_cpu_id());
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
#if RT_CPUS_NR == 2
arm_gic_redist_address_set(0, redist_addr + 3 * GICV3_RD_OFFSET, 1);
bsp/phytium/board/phytium-pi/memory_map.c
+106
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@@ -0,0 +1,106 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2023-04-27 huanghe first version
* 2023-07-27 zhangyan add qspi io space
*
*/
#include "rtconfig.h"
#include <board.h>
#include <mmu.h>
/* mmu config */
#ifdef RT_USING_SMART
#if defined(TARGET_ARMV8_AARCH64)
struct mem_desc platform_mem_desc[] =
{
{ KERNEL_VADDR_START,
KERNEL_VADDR_START + 0x0fffffff,
(rt_size_t)ARCH_MAP_FAILED,
NORMAL_MEM
}
};
#else
struct mem_desc platform_mem_desc[] =
{
{ KERNEL_VADDR_START,
KERNEL_VADDR_START + 0x10000000,
(rt_size_t)ARCH_MAP_FAILED,
NORMAL_MEM
}
};
#endif
#else
#if defined(TARGET_ARMV8_AARCH64)
struct mem_desc platform_mem_desc[] = {
{KERNEL_VADDR_START, DDR_END_ADDRESS , KERNEL_VADDR_START, NORMAL_MEM},
{
0x28000000U,
0x32B36FFFU,
0x28000000U,
DEVICE_MEM
},
{
0x00001000U,
0x0FFFFFFFU,
0x00001000U,
DEVICE_MEM
},
};
#else
struct mem_desc platform_mem_desc[] =
{
{
0x00U,
0x00U + 0x40000000U,
0x00U,
DEVICE_MEM
},
{
0x40000000U,
0x40000000U + 0x10000000U,
0x40000000U,
DEVICE_MEM
},
{
0x50000000U,
0x50000000U + 0x30000000U,
0x50000000U,
DEVICE_MEM
},
{
0x80000000U,
0xffffffffU,
0x80000000U,
NORMAL_MEM
},
#if defined(TARGET_ARMV8_AARCH64)
{
0x1000000000,
0x1000000000 + 0x1000000000,
0x1000000000,
DEVICE_MEM
},
{
0x2000000000,
0x2000000000 + 0x2000000000,
0x2000000000,
NORMAL_MEM
},
#endif
};
#endif
#endif
const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
bsp/phytium/board/phytium-pi/parameters.c
+75
View File
@@ -0,0 +1,75 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Email: opensource_embedded@phytium.com.cn
*
* Change Logs:
* Date Author Notes
* 2022-10-26 huanghe first commit
*
*/
#include "rtconfig.h"
#include <rtthread.h>
#include "fcpu_info.h"
#include "fparameters.h"
/**
* @name: GetCpuMaskToAffval
* @msg: 参考 GetCpuMaskToAffval 进行参数的重新定义 ，两个小核心定义的id 为0，1 ，两个大核的id 为 2，3
* @return {*}
* @note:
* @param {u32} *cpu_mask
* @param {u32} *cluster_id
* @param {u32} *target_list
*/
u32 GetCpuMaskToAffval(u32 *cpu_mask, u32 *cluster_id, u32 *target_list)
{
if (*cpu_mask == 0)
{
return 0;
}
*target_list = 0;
*cluster_id = 0;
if (*cpu_mask & 0x4)
{
*target_list = 1;
*cpu_mask &= ~0x4;
}
else if (*cpu_mask & 0x8)
{
*cluster_id = 0x100;
*target_list = 1;
*cpu_mask &= ~0x8;
}
else if (*cpu_mask & 0x3)
{
*cluster_id = 0x200;
if ((*cpu_mask & 0x3) == 0x3)
{
*target_list = 3;
}
else if ((*cpu_mask & 0x4))
{
*target_list = 1;
}
else
{
*target_list = 2;
}
*cpu_mask &= ~0x3;
}
else
{
*cpu_mask = 0;
return 0;
}
return 1;
}
bsp/phytium/board/phytium_cpu.c
+3 -3
View File
@@ -32,7 +32,7 @@
*/
int phytium_cpu_id_mapping(int cpu_id)
{
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
#if RT_CPUS_NR <= 2
switch (cpu_id)
{
@@ -88,7 +88,7 @@ int rt_hw_cpu_id(void)
int phytium_cpu_id_mapping(int cpu_id)
{
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
switch (cpu_id)
{
case 0:
@@ -127,7 +127,7 @@ int rt_hw_cpu_id(void)
rt_uint64_t get_main_cpu_affval(void)
{
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
return CORE2_AFF;
#else
return CORE0_AFF;
bsp/phytium/board/phytium_cpu.h
+1 -1
View File
@@ -53,7 +53,7 @@ rt_inline rt_uint32_t platform_get_gic_redist_base(void)
cpu_offset = FT_GIC_REDISTRUBUTIOR_OFFSET ;
#endif
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
u32 cpu_id = 0;
cpu_id = phytium_cpu_id();
bsp/phytium/board/secondary_cpu.c
+1 -1
View File
@@ -43,7 +43,7 @@ rt_uint64_t rt_cpu_mpidr_early[] =
#if defined(TARGET_E2000D)
[0] = 0x80000200,
[1] = 0x80000201,
#elif defined(TARGET_E2000Q)
#elif defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
[0] = 0x80000000,
[1] = 0x80000100,
[2] = 0x80000200,
bsp/phytium/libraries/SConscript
+17 -11
View File
@@ -32,22 +32,28 @@ if GetDepend(['TARGET_F2000_4']):
src += Glob(STANDALONE_DIR+'/board/ft2004/*.c')
path += [STANDALONE_DIR + '/board/ft2004']
if GetDepend(['TARGET_E2000']):
if GetDepend(['TARGET_E2000Q']):
src += Glob(STANDALONE_DIR+'/board/e2000/*.c')
path += [STANDALONE_DIR + '/board/e2000']
src += Glob(STANDALONE_DIR+'/board/e2000/q/*.c')
path += [STANDALONE_DIR + '/board/e2000/q']
if GetDepend(['TARGET_E2000Q']):
src += Glob(STANDALONE_DIR+'/board/e2000/q/*.c')
path += [STANDALONE_DIR + '/board/e2000/q']
if GetDepend(['TARGET_E2000D']):
src += Glob(STANDALONE_DIR+'/board/e2000/*.c')
path += [STANDALONE_DIR + '/board/e2000']
src += Glob(STANDALONE_DIR+'/board/e2000/d/*.c')
path += [STANDALONE_DIR + '/board/e2000/d']
if GetDepend(['TARGET_E2000D']):
src += Glob(STANDALONE_DIR+'/board/e2000/d/*.c')
path += [STANDALONE_DIR + '/board/e2000/d']
if GetDepend(['ARGET_E2000S']):
src += Glob(STANDALONE_DIR+'/board/e2000/s/*.c')
path += [STANDALONE_DIR + '/board/e2000/s']
if GetDepend(['ARGET_E2000S']):
src += Glob(STANDALONE_DIR+'/board/e2000/*.c')
path += [STANDALONE_DIR + '/board/e2000']
src += Glob(STANDALONE_DIR+'/board/e2000/s/*.c')
path += [STANDALONE_DIR + '/board/e2000/s']
if GetDepend(['TARGET_PHYTIUMPI']):
src += Glob(STANDALONE_DIR+'/board/phytium-pi/*.c')
path += [STANDALONE_DIR + '/board/phytium-pi']
if GetDepend(['TARGET_D2000']):
path += [STANDALONE_DIR + '/board/d2000']
bsp/phytium/libraries/drivers/Kconfig
+7 -1
View File
@@ -105,7 +105,13 @@ menu "On-chip Peripheral Drivers"
config USING_EMMC
bool "Use EMMC"
endchoice
endchoice
config SDCARD_OFFSET
hex "Block Offset"
default 0x0
help
Skip access start paration of SD Card to protect BIOS
endif
endmenu
bsp/phytium/libraries/drivers/drv_gpio.c
+1 -1
View File
@@ -115,7 +115,7 @@ void FIOPadSetGpioMux(u32 ctrl_id_p, u32 pin_id_p)
}
#endif
#if defined(TARGET_E2000Q)
#if defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI)
if (ctrl_id_p == FGPIO4_ID)
{
switch (pin_id_p)
bsp/phytium/libraries/drivers/drv_sdio.c
+5 -4
View File
@@ -28,7 +28,6 @@
#if defined(TARGET_E2000)
#include "fparameters.h"
#endif
#include "fparameters_comm.h"
#include "fsdio.h"
#include "fsdio_hw.h"
@@ -39,8 +38,6 @@
#define SDIO_CONTROLLER_ID FSDIO0_ID
#elif defined (USING_SDIO1)
#define SDIO_CONTROLLER_ID FSDIO1_ID
#elif defined (USING_EMMC)
#define SDIO_CONTROLLER_ID FSDIO0_ID
#endif
#define SDIO_TF_CARD_HOST_ID 0x1
#define SDIO_MALLOC_CAP_DESC 256U
@@ -48,6 +45,10 @@
#define SDIO_DMA_BLK_SZ 512U
#define SDIO_VALID_OCR 0x00FFFF80 /* supported voltage range is 1.65v-3.6v (VDD_165_195-VDD_35_36) */
#define SDIO_MAX_BLK_TRANS 20U
#ifndef CONFIG_SDCARD_OFFSET
#define CONFIG_SDCARD_OFFSET 0x0U
#endif
/**************************** Type Definitions *******************************/
typedef struct
{
@@ -223,7 +224,7 @@ static void mmc_request_send(struct rt_mmcsd_host *host, struct rt_mmcsd_req *re
req_cmd.flag |= FSDIO_CMD_FLAG_EXP_DATA;
req_data.blksz = req->data->blksize;
req_data.blkcnt = req->data->blks;
req_data.blkcnt = req->data->blks + CONFIG_SDCARD_OFFSET;
req_data.datalen = req->data->blksize * req->data->blks;
if ((uintptr)req->data->buf % SDIO_DMA_ALIGN) /* data buffer should be 512-aligned */
{
bsp/phytium/libraries/standalone/board/Kconfig
+6
View File
@@ -34,6 +34,12 @@ menu "Board Configuration"
select USE_SERIAL
select ENABLE_Pl011_UART
config TARGET_PHYTIUMPI
bool "Phytium Pi"
select TARGET_E2000
select USE_SERIAL
select ENABLE_Pl011_UART
# config TARGET_TARDIGRADE
# bool "TARDIGRADE"
bsp/phytium/libraries/standalone/board/phytium-pi/fparameters.h
+297
View File
File diff suppressed because it is too large Load Diff
bsp/phytium/libraries/standalone/board/phytium-pi/fparameters_comm.h
+725
View File
File diff suppressed because it is too large Load Diff
bsp/phytium/libraries/standalone/port/sdkconfig.h
+3
View File
@@ -50,6 +50,9 @@ extern "C" {
#define CONFIG_TARGET_D2000
#elif defined(TARGET_F2000_4)
#define CONFIG_TARGET_F2000_4
#elif defined(TARGET_PHYTIUMPI)
#define CONFIG_TARGET_E2000
#define CONFIG_TARGET_PHYTIUMPI
#endif
#if defined(LOG_VERBOS)