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[ht32][drv]新增adc、wdt、soft_i2c驱动

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This commit is contained in:
QTbin
2024-06-19 23:00:12 +08:00
committed by GitHub
parent 3b1ce1e4b6
commit 6bd6317f77
30 changed files with 3818 additions and 480 deletions
Download Patch File Download Diff File Expand all files Collapse all files
bsp/ht32/ht32f12366/.config
+38 -4
View File
@@ -76,7 +76,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="usart0"
CONFIG_RT_VER_NUM=0x50100
CONFIG_RT_VER_NUM=0x50200
# CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# CONFIG_RT_USING_CACHE is not set
@@ -139,7 +139,7 @@ CONFIG_RT_USING_I2C_BITOPS=y
# CONFIG_RT_I2C_BITOPS_DEBUG is not set
# CONFIG_RT_USING_SOFT_I2C is not set
# CONFIG_RT_USING_PHY is not set
# CONFIG_RT_USING_ADC is not set
CONFIG_RT_USING_ADC=y
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_NULL is not set
# CONFIG_RT_USING_ZERO is not set
@@ -157,7 +157,7 @@ CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
CONFIG_RT_USING_WDT=y
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
@@ -269,6 +269,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
#
# Wi-Fi
@@ -363,6 +364,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
# CONFIG_PKG_USING_LHC_MODBUS is not set
# CONFIG_PKG_USING_QMODBUS is not set
#
# security packages
@@ -496,6 +498,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# CONFIG_PKG_USING_AUNITY is not set
#
# acceleration: Assembly language or algorithmic acceleration packages
@@ -582,9 +585,24 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# STM32 HAL & SDK Drivers
#
# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
#
# Infineon HAL Packages
#
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@@ -771,6 +789,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_APID is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
@@ -1072,11 +1091,23 @@ CONFIG_SOC_SERIES_HT32F1=y
#
# Hardware Drivers Config
#
#
# Chip Configuration
#
CONFIG_SOC_KERNEL=y
# CONFIG_CORTEX_M0 is not set
CONFIG_CORTEX_M3=y
# CONFIG_SOC_HT32F1654 is not set
# CONFIG_SOC_HT32F1656 is not set
# CONFIG_SOC_HT32F12345 is not set
# CONFIG_SOC_HT32F12364 is not set
CONFIG_SOC_HT32F12366=y
#
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_TEST is not set
#
# On-chip Peripheral Drivers
@@ -1084,11 +1115,14 @@ CONFIG_SOC_HT32F12366=y
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_USART0=y
CONFIG_BSP_USING_USART0_NAME="usart0"
# CONFIG_BSP_USING_USART1 is not set
# CONFIG_BSP_USING_UART0 is not set
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_WDT is not set
#
# Board extended module Drivers
bsp/ht32/ht32f12366/applications/SConscript
+6 -1
View File
@@ -9,7 +9,12 @@ from building import *
cwd = GetCurrentDir()
#创建一个列表，用于保存需要使用到的C文件路径
src = Glob('*c')
#src = Glob('*.c')
src = Split("""
main.c
""")
if GetDepend(['BSP_USING_TEST']):
src += ['test.c']
#创建一个列表，用于保存需要包含的H文件路径
path = [cwd]
bsp/ht32/ht32f12366/applications/test.c
+716
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/ht32f12366/board/Kconfig
+284 -46
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/ht32f12366/board/inc/board.h
-8
View File
@@ -19,18 +19,10 @@
#include "drv_gpio.h"
#endif
#ifdef BSP_USING_UART
#include "drv_usart.h"
#endif
#ifdef BSP_USING_SPI
#include "drv_spi.h"
#endif
#ifdef BSP_USING_I2C
#include "drv_i2c.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
bsp/ht32/ht32f12366/board/inc/ht32_msp.h
+148 -10
View File
@@ -108,14 +108,14 @@ extern "C" {
#define HTCFG_SPI0_IPN SPI0
#define _HTCFG_SPI0_SCK_GPIOX B
#define _HTCFG_SPI0_SCK_GPION 3
#define _HTCFG_SPI0_SCK_GPIOX D
#define _HTCFG_SPI0_SCK_GPION 10
#define _HTCFG_SPI0_MISO_GPIOX B
#define _HTCFG_SPI0_MISO_GPION 5
#define _HTCFG_SPI0_MISO_GPIOX D
#define _HTCFG_SPI0_MISO_GPION 12
#define _HTCFG_SPI0_MOSI_GPIOX B
#define _HTCFG_SPI0_MOSI_GPION 4
#define _HTCFG_SPI0_MOSI_GPIOX D
#define _HTCFG_SPI0_MOSI_GPION 11
#define HTCFG_SPI0_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI0_SCK_GPIOX)
#define HTCFG_SPI0_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI0_SCK_GPIOX)
@@ -159,8 +159,8 @@ extern "C" {
#endif
/* I2C gpio */
#ifdef BSP_USING_I2C
#ifdef BSP_USING_I2C0
#ifdef BSP_USING_I2C_HW
#ifdef BSP_USING_I2C0_HW
#define HTCFG_I2C0_IPN I2C0
@@ -179,7 +179,7 @@ extern "C" {
#define HTCFG_I2C0_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SDA_GPION)
#endif
#ifdef BSP_USING_I2C1
#ifdef BSP_USING_I2C1_HW
#define HTCFG_I2C1_IPN I2C1
@@ -197,12 +197,150 @@ extern "C" {
#define HTCFG_I2C1_SDA_GPIO_ID STRCAT2(GPIO_P, _HTCFG_I2C1_SDA_GPIOX)
#define HTCFG_I2C1_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C1_SDA_GPION)
#endif
#endif
/* ADC gpio */
#ifdef BSP_USING_ADC
#ifdef BSP_USING_ADC0
#define HTCFG_ADC0_IPN ADC0
#define _HTCFG_ADC0CH0_GPIOX A
#define _HTCFG_ADC0CH0_AFION 0
#define _HTCFG_ADC0CH1_GPIOX A
#define _HTCFG_ADC0CH1_AFION 1
#define _HTCFG_ADC0CH2_GPIOX A
#define _HTCFG_ADC0CH2_AFION 2
#define _HTCFG_ADC0CH3_GPIOX A
#define _HTCFG_ADC0CH3_AFION 3
#define _HTCFG_ADC0CH4_GPIOX A
#define _HTCFG_ADC0CH4_AFION 4
#define _HTCFG_ADC0CH5_GPIOX A
#define _HTCFG_ADC0CH5_AFION 5
#define _HTCFG_ADC0CH6_GPIOX A
#define _HTCFG_ADC0CH6_AFION 6
#define _HTCFG_ADC0CH7_GPIOX A
#define _HTCFG_ADC0CH7_AFION 7
#define _HTCFG_ADC0CH8_GPIOX E
#define _HTCFG_ADC0CH8_AFION 8
#define _HTCFG_ADC0CH9_GPIOX E
#define _HTCFG_ADC0CH9_AFION 9
#define _HTCFG_ADC0CH10_GPIOX E
#define _HTCFG_ADC0CH10_AFION 10
#define _HTCFG_ADC0CH11_GPIOX E
#define _HTCFG_ADC0CH11_AFION 11
#define _HTCFG_ADC0CH12_GPIOX E
#define _HTCFG_ADC0CH12_AFION 12
#define _HTCFG_ADC0CH13_GPIOX C
#define _HTCFG_ADC0CH13_AFION 9
#define _HTCFG_ADC0CH14_GPIOX C
#define _HTCFG_ADC0CH14_AFION 10
#define _HTCFG_ADC0CH15_GPIOX C
#define _HTCFG_ADC0CH15_AFION 11
#define HTCFG_ADC0CH0_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH0_GPIOX)
#define HTCFG_ADC0CH1_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH1_GPIOX)
#define HTCFG_ADC0CH2_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH2_GPIOX)
#define HTCFG_ADC0CH3_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH3_GPIOX)
#define HTCFG_ADC0CH4_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH4_GPIOX)
#define HTCFG_ADC0CH5_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH5_GPIOX)
#define HTCFG_ADC0CH6_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH6_GPIOX)
#define HTCFG_ADC0CH7_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH7_GPIOX)
#define HTCFG_ADC0CH8_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH8_GPIOX)
#define HTCFG_ADC0CH9_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH9_GPIOX)
#define HTCFG_ADC0CH10_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH10_GPIOX)
#define HTCFG_ADC0CH11_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH11_GPIOX)
#define HTCFG_ADC0CH12_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH12_GPIOX)
#define HTCFG_ADC0CH13_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH13_GPIOX)
#define HTCFG_ADC0CH14_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH14_GPIOX)
#define HTCFG_ADC0CH15_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH15_GPIOX)
#define HTCFG_ADC0CH0_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH0_AFION)
#define HTCFG_ADC0CH1_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH1_AFION)
#define HTCFG_ADC0CH2_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH2_AFION)
#define HTCFG_ADC0CH3_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH3_AFION)
#define HTCFG_ADC0CH4_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH4_AFION)
#define HTCFG_ADC0CH5_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH5_AFION)
#define HTCFG_ADC0CH6_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH6_AFION)
#define HTCFG_ADC0CH7_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH7_AFION)
#define HTCFG_ADC0CH8_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH8_AFION)
#define HTCFG_ADC0CH9_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH9_AFION)
#define HTCFG_ADC0CH10_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH10_AFION)
#define HTCFG_ADC0CH11_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH11_AFION)
#define HTCFG_ADC0CH12_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH12_AFION)
#define HTCFG_ADC0CH13_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH13_AFION)
#define HTCFG_ADC0CH14_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH14_AFION)
#define HTCFG_ADC0CH15_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH15_AFION)
#endif
#ifdef BSP_USING_ADC1
#define HTCFG_ADC1_IPN ADC1
#define _HTCFG_ADC1CH0_GPIOX B
#define _HTCFG_ADC1CH0_AFION 8
#define _HTCFG_ADC1CH1_GPIOX A
#define _HTCFG_ADC1CH1_AFION 0
#define _HTCFG_ADC1CH2_GPIOX A
#define _HTCFG_ADC1CH2_AFION 1
#define _HTCFG_ADC1CH3_GPIOX A
#define _HTCFG_ADC1CH3_AFION 2
#define _HTCFG_ADC1CH4_GPIOX A
#define _HTCFG_ADC1CH4_AFION 3
#define _HTCFG_ADC1CH5_GPIOX A
#define _HTCFG_ADC1CH5_AFION 4
#define _HTCFG_ADC1CH6_GPIOX A
#define _HTCFG_ADC1CH6_AFION 5
#define _HTCFG_ADC1CH7_GPIOX A
#define _HTCFG_ADC1CH7_AFION 6
#define HTCFG_ADC1CH0_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH0_GPIOX)
#define HTCFG_ADC1CH1_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH1_GPIOX)
#define HTCFG_ADC1CH2_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH2_GPIOX)
#define HTCFG_ADC1CH3_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH3_GPIOX)
#define HTCFG_ADC1CH4_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH4_GPIOX)
#define HTCFG_ADC1CH5_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH5_GPIOX)
#define HTCFG_ADC1CH6_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH6_GPIOX)
#define HTCFG_ADC1CH7_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH7_GPIOX)
#define HTCFG_ADC1CH0_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH0_AFION)
#define HTCFG_ADC1CH1_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH1_AFION)
#define HTCFG_ADC1CH2_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH2_AFION)
#define HTCFG_ADC1CH3_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH3_AFION)
#define HTCFG_ADC1CH4_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH4_AFION)
#define HTCFG_ADC1CH5_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH5_AFION)
#define HTCFG_ADC1CH6_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH6_AFION)
#define HTCFG_ADC1CH7_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH7_AFION)
#endif
#endif
void ht32_usart_gpio_init(void *instance);
void ht32_spi_gpio_init(void *instance);
void ht32_i2c_gpio_init(void *instance);
void ht32_hardware_i2c_gpio_init(void *instance);
void ht32_adc_gpio_init(void *instance,int8_t channel);
#ifdef __cplusplus
}
bsp/ht32/ht32f12366/board/src/ht32_msp.c
+116 -4
View File
@@ -107,12 +107,12 @@ void ht32_spi_gpio_init(void *instance)
#endif
/* GPIO configuration for I2C */
#ifdef BSP_USING_I2C
void ht32_i2c_gpio_init(void *instance)
#ifdef BSP_USING_I2C_HW
void ht32_hardware_i2c_gpio_init(void *instance)
{
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
HT_I2C_TypeDef *i2c_x = (HT_I2C_TypeDef *)instance;
#ifdef BSP_USING_I2C0
#ifdef BSP_USING_I2C0_HW
if(HT_I2C0 == i2c_x)
{
CKCUClock.Bit.HTCFG_I2C0_SCL_GPIO_CLK = 1;
@@ -123,7 +123,7 @@ void ht32_i2c_gpio_init(void *instance)
AFIO_GPxConfig(HTCFG_I2C0_SDA_GPIO_ID,HTCFG_I2C0_SDA_GPIO_PIN,AFIO_FUN_I2C);
}
#endif
#ifdef BSP_USING_I2C1
#ifdef BSP_USING_I2C1_HW
if(HT_I2C1 == i2c_x)
{
CKCUClock.Bit.HTCFG_I2C1_SCL_GPIO_CLK = 1;
@@ -136,3 +136,115 @@ void ht32_i2c_gpio_init(void *instance)
#endif
}
#endif
/* GPIO configuration for ADC */
#ifdef BSP_USING_ADC
void ht32_adc_gpio_init(void *instance,int8_t channel)
{
CKCU_PeripClockConfig_TypeDef CKCUClock = {{ 0 }};
HT_ADC_TypeDef *adc_x = (HT_ADC_TypeDef *)instance;
#ifdef BSP_USING_ADC0
if (HT_ADC0 == adc_x)
{
/* Enable peripheral clock */
CKCUClock.Bit.AFIO = 1;
CKCUClock.Bit.ADC0 = 1;
CKCU_PeripClockConfig(CKCUClock, ENABLE);
/* Configure AFIO mode as ADC function */
switch(channel)
{
case 0:
AFIO_GPxConfig(HTCFG_ADC0CH0_GPIO_ID, HTCFG_ADC0CH0_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 1:
AFIO_GPxConfig(HTCFG_ADC0CH1_GPIO_ID, HTCFG_ADC0CH1_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 2:
AFIO_GPxConfig(HTCFG_ADC0CH2_GPIO_ID, HTCFG_ADC0CH2_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 3:
AFIO_GPxConfig(HTCFG_ADC0CH3_GPIO_ID, HTCFG_ADC0CH3_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 4:
AFIO_GPxConfig(HTCFG_ADC0CH4_GPIO_ID, HTCFG_ADC0CH4_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 5:
AFIO_GPxConfig(HTCFG_ADC0CH5_GPIO_ID, HTCFG_ADC0CH5_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 6:
AFIO_GPxConfig(HTCFG_ADC0CH6_GPIO_ID, HTCFG_ADC0CH6_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 7:
AFIO_GPxConfig(HTCFG_ADC0CH7_GPIO_ID, HTCFG_ADC0CH7_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 8:
AFIO_GPxConfig(HTCFG_ADC0CH8_GPIO_ID, HTCFG_ADC0CH8_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 9:
AFIO_GPxConfig(HTCFG_ADC0CH9_GPIO_ID, HTCFG_ADC0CH9_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 10:
AFIO_GPxConfig(HTCFG_ADC0CH10_GPIO_ID, HTCFG_ADC0CH10_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 11:
AFIO_GPxConfig(HTCFG_ADC0CH11_GPIO_ID, HTCFG_ADC0CH11_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 12:
AFIO_GPxConfig(HTCFG_ADC0CH12_GPIO_ID, HTCFG_ADC0CH12_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 13:
AFIO_GPxConfig(HTCFG_ADC0CH13_GPIO_ID, HTCFG_ADC0CH13_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 14:
AFIO_GPxConfig(HTCFG_ADC0CH14_GPIO_ID, HTCFG_ADC0CH14_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 15:
AFIO_GPxConfig(HTCFG_ADC0CH15_GPIO_ID, HTCFG_ADC0CH15_AFIO_PIN, AFIO_FUN_ADC0);
break;
default:
break;
}
}
#endif
#ifdef BSP_USING_ADC1
if (HT_ADC1 == adc_x)
{
/* Enable peripheral clock */
CKCUClock.Bit.AFIO = 1;
CKCUClock.Bit.ADC1 = 1;
CKCU_PeripClockConfig(CKCUClock, ENABLE);
/* Configure AFIO mode as ADC function */
switch(channel)
{
case 0:
AFIO_GPxConfig(HTCFG_ADC1CH0_GPIO_ID, HTCFG_ADC1CH0_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 1:
AFIO_GPxConfig(HTCFG_ADC1CH1_GPIO_ID, HTCFG_ADC1CH1_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 2:
AFIO_GPxConfig(HTCFG_ADC1CH2_GPIO_ID, HTCFG_ADC1CH2_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 3:
AFIO_GPxConfig(HTCFG_ADC1CH3_GPIO_ID, HTCFG_ADC1CH3_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 4:
AFIO_GPxConfig(HTCFG_ADC1CH4_GPIO_ID, HTCFG_ADC1CH4_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 5:
AFIO_GPxConfig(HTCFG_ADC1CH5_GPIO_ID, HTCFG_ADC1CH5_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 6:
AFIO_GPxConfig(HTCFG_ADC1CH6_GPIO_ID, HTCFG_ADC1CH6_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 7:
AFIO_GPxConfig(HTCFG_ADC1CH7_GPIO_ID, HTCFG_ADC1CH7_AFIO_PIN, AFIO_FUN_ADC0);
break;
default:
break;
}
}
#endif
}
#endif
bsp/ht32/ht32f12366/project.uvoptx
+118 -94
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/ht32f12366/project.uvprojx
+116 -56
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/ht32f12366/rtconfig.h
+12 -1
View File
@@ -45,7 +45,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "usart0"
#define RT_VER_NUM 0x50100
#define RT_VER_NUM 0x50200
#define RT_BACKTRACE_LEVEL_MAX_NR 32
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
@@ -87,7 +87,9 @@
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_ADC
#define RT_USING_SPI
#define RT_USING_WDT
#define RT_USING_PIN
/* Using USB */
@@ -193,6 +195,9 @@
/* STM32 HAL & SDK Drivers */
/* Infineon HAL Packages */
/* Kendryte SDK */
@@ -257,15 +262,21 @@
/* Hardware Drivers Config */
/* Chip Configuration */
#define SOC_KERNEL
#define CORTEX_M3
#define SOC_HT32F12366
/* Onboard Peripheral Drivers */
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_USART0
#define BSP_USING_USART0_NAME "usart0"
/* Board extended module Drivers */
bsp/ht32/ht32f52352/.config
+68 -11
View File
@@ -35,10 +35,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_USING_DEBUG=y
CONFIG_RT_DEBUGING_COLOR=y
CONFIG_RT_DEBUGING_CONTEXT=y
# CONFIG_RT_DEBUGING_AUTO_INIT is not set
# CONFIG_RT_USING_DEBUG is not set
#
# Inter-Thread communication
@@ -76,7 +73,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="usart1"
CONFIG_RT_VER_NUM=0x50100
CONFIG_RT_VER_NUM=0x50200
# CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
# CONFIG_RT_USING_CACHE is not set
@@ -101,11 +98,11 @@ CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_THREAD_STACK_SIZE=1024
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_FINSH_CMD_SIZE=32
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
@@ -129,7 +126,7 @@ CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_CPUTIME is not set
@@ -139,7 +136,7 @@ CONFIG_RT_USING_I2C_BITOPS=y
# CONFIG_RT_I2C_BITOPS_DEBUG is not set
# CONFIG_RT_USING_SOFT_I2C is not set
# CONFIG_RT_USING_PHY is not set
# CONFIG_RT_USING_ADC is not set
CONFIG_RT_USING_ADC=y
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_NULL is not set
# CONFIG_RT_USING_ZERO is not set
@@ -157,7 +154,7 @@ CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
CONFIG_RT_USING_WDT=y
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
@@ -269,6 +266,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
#
# Wi-Fi
@@ -363,6 +361,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
# CONFIG_PKG_USING_LHC_MODBUS is not set
# CONFIG_PKG_USING_QMODBUS is not set
#
# security packages
@@ -496,6 +495,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# CONFIG_PKG_USING_AUNITY is not set
#
# acceleration: Assembly language or algorithmic acceleration packages
@@ -582,9 +582,24 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# STM32 HAL & SDK Drivers
#
# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
#
# Infineon HAL Packages
#
# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
# CONFIG_PKG_USING_INFINEON_CMSIS is not set
# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
# CONFIG_PKG_USING_INFINEON_USBDEV is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@@ -770,6 +785,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_APID is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
@@ -1071,11 +1087,49 @@ CONFIG_SOC_SERIES_HT32F5=y
#
# Hardware Drivers Config
#
#
# Chip Configuration
#
CONFIG_SOC_KERNEL=y
CONFIG_CORTEX_M0=y
# CONFIG_CORTEX_M3 is not set
# CONFIG_SOC_HT32F0006 is not set
# CONFIG_SOC_HT32F0008 is not set
# CONFIG_SOC_HT32F50241 is not set
# CONFIG_SOC_HT32F50343 is not set
# CONFIG_SOC_HT32F50441 is not set
# CONFIG_SOC_HT32F50452 is not set
# CONFIG_SOC_HT32F52241 is not set
# CONFIG_SOC_HT32F52244 is not set
# CONFIG_SOC_HT32F52253 is not set
# CONFIG_SOC_HT32F52341 is not set
CONFIG_SOC_HT32F52352=y
# CONFIG_SOC_HT32F52354 is not set
# CONFIG_SOC_HT32F52367 is not set
# CONFIG_SOC_HT32F53241 is not set
# CONFIG_SOC_HT32F53252 is not set
# CONFIG_SOC_HT32F54241 is not set
# CONFIG_SOC_HT32F54253 is not set
# CONFIG_SOC_HT32F57341 is not set
# CONFIG_SOC_HT32F57352 is not set
# CONFIG_SOC_HT32F5828 is not set
# CONFIG_SOC_HT32F59041 is not set
# CONFIG_SOC_HT32F59741 is not set
# CONFIG_SOC_HT32F61141 is not set
# CONFIG_SOC_HT32F61245 is not set
# CONFIG_SOC_HT32F61355 is not set
# CONFIG_SOC_HT32F61356 is not set
# CONFIG_SOC_HT32F61357 is not set
# CONFIG_SOC_HT32F61641 is not set
# CONFIG_SOC_HT32F65240 is not set
# CONFIG_SOC_HT32F67051 is not set
# CONFIG_SOC_HT32F67741 is not set
#
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_TEST is not set
#
# On-chip Peripheral Drivers
@@ -1084,10 +1138,13 @@ CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
# CONFIG_BSP_USING_USART0 is not set
CONFIG_BSP_USING_USART1=y
CONFIG_BSP_USING_USART1_NAME="usart1"
# CONFIG_BSP_USING_UART0 is not set
# CONFIG_BSP_USING_UART1 is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_WDT is not set
#
# Board extended module Drivers
bsp/ht32/ht32f52352/applications/SConscript
+6 -1
View File
@@ -9,7 +9,12 @@ from building import *
cwd = GetCurrentDir()
#创建一个列表，用于保存需要使用到的C文件路径
src = Glob('*c')
#src = Glob('*.c')
src = Split("""
main.c
""")
if GetDepend(['BSP_USING_TEST']):
src += ['test.c']
#创建一个列表，用于保存需要包含的H文件路径
path = [cwd]
bsp/ht32/ht32f52352/applications/test.c
+716
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/ht32f52352/board/Kconfig
+284 -46
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/ht32f52352/board/inc/board.h
-8
View File
@@ -19,18 +19,10 @@
#include "drv_gpio.h"
#endif
#ifdef BSP_USING_UART
#include "drv_usart.h"
#endif
#ifdef BSP_USING_SPI
#include "drv_spi.h"
#endif
#ifdef BSP_USING_I2C
#include "drv_i2c.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
bsp/ht32/ht32f52352/board/inc/ht32_msp.h
+150 -10
View File
@@ -133,14 +133,14 @@ extern "C" {
#define HTCFG_SPI1_IPN SPI1
#define _HTCFG_SPI1_SCK_GPIOX A
#define _HTCFG_SPI1_SCK_GPION 15
#define _HTCFG_SPI1_SCK_GPIOX C
#define _HTCFG_SPI1_SCK_GPION 5
#define _HTCFG_SPI1_MISO_GPIOX B
#define _HTCFG_SPI1_MISO_GPION 1
#define _HTCFG_SPI1_MISO_GPIOX C
#define _HTCFG_SPI1_MISO_GPION 9
#define _HTCFG_SPI1_MOSI_GPIOX B
#define _HTCFG_SPI1_MOSI_GPION 0
#define _HTCFG_SPI1_MOSI_GPIOX C
#define _HTCFG_SPI1_MOSI_GPION 8
#define HTCFG_SPI1_SCK_GPIO_CLK STRCAT2(P, _HTCFG_SPI1_SCK_GPIOX)
#define HTCFG_SPI1_SCK_GPIO_ID STRCAT2(GPIO_P, _HTCFG_SPI1_SCK_GPIOX)
@@ -158,8 +158,8 @@ extern "C" {
#endif
/* I2C gpio */
#ifdef BSP_USING_I2C
#ifdef BSP_USING_I2C0
#ifdef BSP_USING_I2C_HW
#ifdef BSP_USING_I2C0_HW
#define HTCFG_I2C0_IPN I2C0
@@ -178,7 +178,7 @@ extern "C" {
#define HTCFG_I2C0_SDA_GPIO_PIN STRCAT2(GPIO_PIN_, _HTCFG_I2C0_SDA_GPION)
#endif
#ifdef BSP_USING_I2C1
#ifdef BSP_USING_I2C1_HW
#define HTCFG_I2C1_IPN I2C1
@@ -199,9 +199,149 @@ extern "C" {
#endif
#endif
/* ADC gpio */
#ifdef BSP_USING_ADC
#ifdef BSP_USING_ADC0
#define HTCFG_ADC0_IPN ADC0
#define _HTCFG_ADC0CH0_GPIOX A
#define _HTCFG_ADC0CH0_AFION 0
#define _HTCFG_ADC0CH1_GPIOX A
#define _HTCFG_ADC0CH1_AFION 1
#define _HTCFG_ADC0CH2_GPIOX A
#define _HTCFG_ADC0CH2_AFION 2
#define _HTCFG_ADC0CH3_GPIOX A
#define _HTCFG_ADC0CH3_AFION 3
#define _HTCFG_ADC0CH4_GPIOX A
#define _HTCFG_ADC0CH4_AFION 4
#define _HTCFG_ADC0CH5_GPIOX A
#define _HTCFG_ADC0CH5_AFION 5
#define _HTCFG_ADC0CH6_GPIOX A
#define _HTCFG_ADC0CH6_AFION 6
#define _HTCFG_ADC0CH7_GPIOX A
#define _HTCFG_ADC0CH7_AFION 7
#define _HTCFG_ADC0CH8_GPIOX C
#define _HTCFG_ADC0CH8_AFION 4
#define _HTCFG_ADC0CH9_GPIOX C
#define _HTCFG_ADC0CH9_AFION 5
#define _HTCFG_ADC0CH10_GPIOX C
#define _HTCFG_ADC0CH10_AFION 8
#define _HTCFG_ADC0CH11_GPIOX C
#define _HTCFG_ADC0CH11_AFION 9
#define _HTCFG_ADC0CH12_GPIOX C
#define _HTCFG_ADC0CH12_AFION 1
#define _HTCFG_ADC0CH13_GPIOX C
#define _HTCFG_ADC0CH13_AFION 1
#define _HTCFG_ADC0CH14_GPIOX C
#define _HTCFG_ADC0CH14_AFION 1
#define _HTCFG_ADC0CH15_GPIOX C
#define _HTCFG_ADC0CH15_AFION 1
#define HTCFG_ADC0CH0_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH0_GPIOX)
#define HTCFG_ADC0CH1_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH1_GPIOX)
#define HTCFG_ADC0CH2_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH2_GPIOX)
#define HTCFG_ADC0CH3_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH3_GPIOX)
#define HTCFG_ADC0CH4_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH4_GPIOX)
#define HTCFG_ADC0CH5_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH5_GPIOX)
#define HTCFG_ADC0CH6_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH6_GPIOX)
#define HTCFG_ADC0CH7_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH7_GPIOX)
#define HTCFG_ADC0CH8_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH8_GPIOX)
#define HTCFG_ADC0CH9_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH9_GPIOX)
#define HTCFG_ADC0CH10_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH10_GPIOX)
#define HTCFG_ADC0CH11_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH11_GPIOX)
#define HTCFG_ADC0CH12_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH12_GPIOX)
#define HTCFG_ADC0CH13_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH13_GPIOX)
#define HTCFG_ADC0CH14_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH14_GPIOX)
#define HTCFG_ADC0CH15_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC0CH15_GPIOX)
#define HTCFG_ADC0CH0_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH0_AFION)
#define HTCFG_ADC0CH1_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH1_AFION)
#define HTCFG_ADC0CH2_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH2_AFION)
#define HTCFG_ADC0CH3_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH3_AFION)
#define HTCFG_ADC0CH4_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH4_AFION)
#define HTCFG_ADC0CH5_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH5_AFION)
#define HTCFG_ADC0CH6_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH6_AFION)
#define HTCFG_ADC0CH7_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH7_AFION)
#define HTCFG_ADC0CH8_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH8_AFION)
#define HTCFG_ADC0CH9_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH9_AFION)
#define HTCFG_ADC0CH10_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH10_AFION)
#define HTCFG_ADC0CH11_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH11_AFION)
#define HTCFG_ADC0CH12_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH12_AFION)
#define HTCFG_ADC0CH13_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH13_AFION)
#define HTCFG_ADC0CH14_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH14_AFION)
#define HTCFG_ADC0CH15_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC0CH15_AFION)
#endif
#ifdef BSP_USING_ADC1
#define HTCFG_ADC1_IPN ADC1
#define _HTCFG_ADC1CH0_GPIOX B
#define _HTCFG_ADC1CH0_AFION 8
#define _HTCFG_ADC1CH1_GPIOX A
#define _HTCFG_ADC1CH1_AFION 0
#define _HTCFG_ADC1CH2_GPIOX A
#define _HTCFG_ADC1CH2_AFION 1
#define _HTCFG_ADC1CH3_GPIOX A
#define _HTCFG_ADC1CH3_AFION 2
#define _HTCFG_ADC1CH4_GPIOX A
#define _HTCFG_ADC1CH4_AFION 3
#define _HTCFG_ADC1CH5_GPIOX A
#define _HTCFG_ADC1CH5_AFION 4
#define _HTCFG_ADC1CH6_GPIOX A
#define _HTCFG_ADC1CH6_AFION 5
#define _HTCFG_ADC1CH7_GPIOX A
#define _HTCFG_ADC1CH7_AFION 6
#define HTCFG_ADC1CH0_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH0_GPIOX)
#define HTCFG_ADC1CH1_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH1_GPIOX)
#define HTCFG_ADC1CH2_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH2_GPIOX)
#define HTCFG_ADC1CH3_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH3_GPIOX)
#define HTCFG_ADC1CH4_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH4_GPIOX)
#define HTCFG_ADC1CH5_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH5_GPIOX)
#define HTCFG_ADC1CH6_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH6_GPIOX)
#define HTCFG_ADC1CH7_GPIO_ID STRCAT2(GPIO_P, _HTCFG_ADC1CH7_GPIOX)
#define HTCFG_ADC1CH0_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH0_AFION)
#define HTCFG_ADC1CH1_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH1_AFION)
#define HTCFG_ADC1CH2_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH2_AFION)
#define HTCFG_ADC1CH3_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH3_AFION)
#define HTCFG_ADC1CH4_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH4_AFION)
#define HTCFG_ADC1CH5_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH5_AFION)
#define HTCFG_ADC1CH6_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH6_AFION)
#define HTCFG_ADC1CH7_AFIO_PIN STRCAT2(AFIO_PIN_, _HTCFG_ADC1CH7_AFION)
#endif
#endif
void ht32_usart_gpio_init(void *instance);
void ht32_spi_gpio_init(void *instance);
void ht32_i2c_gpio_init(void *instance);
void ht32_hardware_i2c_gpio_init(void *instance);
void ht32_adc_gpio_init(void *instance,int8_t channel);
#ifdef __cplusplus
}
bsp/ht32/ht32f52352/board/src/ht32_msp.c
+117 -4
View File
@@ -107,12 +107,12 @@ void ht32_spi_gpio_init(void *instance)
#endif
/* GPIO configuration for I2C */
#ifdef BSP_USING_I2C
void ht32_i2c_gpio_init(void *instance)
#ifdef BSP_USING_I2C_HW
void ht32_hardware_i2c_gpio_init(void *instance)
{
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
HT_I2C_TypeDef *i2c_x = (HT_I2C_TypeDef *)instance;
#ifdef BSP_USING_I2C0
#ifdef BSP_USING_I2C0_HW
if (HT_I2C0 == i2c_x)
{
CKCUClock.Bit.HTCFG_I2C0_SCL_GPIO_CLK = 1;
@@ -123,7 +123,7 @@ void ht32_i2c_gpio_init(void *instance)
AFIO_GPxConfig(HTCFG_I2C0_SDA_GPIO_ID, HTCFG_I2C0_SDA_GPIO_PIN, AFIO_FUN_I2C);
}
#endif
#ifdef BSP_USING_I2C1
#ifdef BSP_USING_I2C1_HW
if (HT_I2C1 == i2c_x)
{
CKCUClock.Bit.HTCFG_I2C1_SCL_GPIO_CLK = 1;
@@ -136,3 +136,116 @@ void ht32_i2c_gpio_init(void *instance)
#endif
}
#endif
/* GPIO configuration for ADC */
#ifdef BSP_USING_ADC
void ht32_adc_gpio_init(void *instance,int8_t channel)
{
CKCU_PeripClockConfig_TypeDef CKCUClock = {{ 0 }};
HT_ADC_TypeDef *adc_x = (HT_ADC_TypeDef *)instance;
#ifdef BSP_USING_ADC0
if (HT_ADC0 == adc_x)
{
/* Enable peripheral clock */
CKCUClock.Bit.AFIO = 1;
CKCUClock.Bit.ADC0 = 1;
CKCU_PeripClockConfig(CKCUClock, ENABLE);
/* Configure AFIO mode as ADC function */
switch(channel)
{
case 0:
AFIO_GPxConfig(HTCFG_ADC0CH0_GPIO_ID, HTCFG_ADC0CH0_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 1:
AFIO_GPxConfig(HTCFG_ADC0CH1_GPIO_ID, HTCFG_ADC0CH1_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 2:
AFIO_GPxConfig(HTCFG_ADC0CH2_GPIO_ID, HTCFG_ADC0CH2_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 3:
AFIO_GPxConfig(HTCFG_ADC0CH3_GPIO_ID, HTCFG_ADC0CH3_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 4:
AFIO_GPxConfig(HTCFG_ADC0CH4_GPIO_ID, HTCFG_ADC0CH4_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 5:
AFIO_GPxConfig(HTCFG_ADC0CH5_GPIO_ID, HTCFG_ADC0CH5_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 6:
AFIO_GPxConfig(HTCFG_ADC0CH6_GPIO_ID, HTCFG_ADC0CH6_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 7:
AFIO_GPxConfig(HTCFG_ADC0CH7_GPIO_ID, HTCFG_ADC0CH7_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 8:
AFIO_GPxConfig(HTCFG_ADC0CH8_GPIO_ID, HTCFG_ADC0CH8_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 9:
AFIO_GPxConfig(HTCFG_ADC0CH9_GPIO_ID, HTCFG_ADC0CH9_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 10:
AFIO_GPxConfig(HTCFG_ADC0CH10_GPIO_ID, HTCFG_ADC0CH10_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 11:
AFIO_GPxConfig(HTCFG_ADC0CH11_GPIO_ID, HTCFG_ADC0CH11_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 12:
AFIO_GPxConfig(HTCFG_ADC0CH12_GPIO_ID, HTCFG_ADC0CH12_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 13:
AFIO_GPxConfig(HTCFG_ADC0CH13_GPIO_ID, HTCFG_ADC0CH13_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 14:
AFIO_GPxConfig(HTCFG_ADC0CH14_GPIO_ID, HTCFG_ADC0CH14_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 15:
AFIO_GPxConfig(HTCFG_ADC0CH15_GPIO_ID, HTCFG_ADC0CH15_AFIO_PIN, AFIO_FUN_ADC0);
break;
default:
break;
}
}
#endif
#ifdef BSP_USING_ADC1
if (HT_ADC1 == adc_x)
{
/* Enable peripheral clock */
CKCUClock.Bit.AFIO = 1;
CKCUClock.Bit.ADC1 = 1;
CKCU_PeripClockConfig(CKCUClock, ENABLE);
/* Configure AFIO mode as ADC function */
switch(channel)
{
case 0:
AFIO_GPxConfig(HTCFG_ADC1CH0_GPIO_ID, HTCFG_ADC1CH0_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 1:
AFIO_GPxConfig(HTCFG_ADC1CH1_GPIO_ID, HTCFG_ADC1CH1_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 2:
AFIO_GPxConfig(HTCFG_ADC1CH2_GPIO_ID, HTCFG_ADC1CH2_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 3:
AFIO_GPxConfig(HTCFG_ADC1CH3_GPIO_ID, HTCFG_ADC1CH3_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 4:
AFIO_GPxConfig(HTCFG_ADC1CH4_GPIO_ID, HTCFG_ADC1CH4_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 5:
AFIO_GPxConfig(HTCFG_ADC1CH5_GPIO_ID, HTCFG_ADC1CH5_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 6:
AFIO_GPxConfig(HTCFG_ADC1CH6_GPIO_ID, HTCFG_ADC1CH6_AFIO_PIN, AFIO_FUN_ADC0);
break;
case 7:
AFIO_GPxConfig(HTCFG_ADC1CH7_GPIO_ID, HTCFG_ADC1CH7_AFIO_PIN, AFIO_FUN_ADC0);
break;
default:
break;
}
}
#endif
}
#endif
bsp/ht32/ht32f52352/project.uvoptx
+83 -71
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/ht32f52352/project.uvprojx
+111 -56
View File
@@ -335,7 +335,7 @@
<MiscControls></MiscControls>
<Define>__STDC_LIMIT_MACROS, RT_USING_ARMLIBC, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, USE_HT32_DRIVER, __RTTHREAD__, USE_HT32F52352_SK, USE_HT32F52342_52, USE_MEM_HT32F52352</Define>
<Undefine></Undefine>
<IncludePath>..\..\..\include;..\..\..\components\drivers\include;.;..\..\..\components\drivers\include;..\libraries\HT32_STD_5xxxx_FWLib\library\HT32F5xxxx_Driver\inc;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\libraries\HT32_STD_5xxxx_FWLib\library\CMSIS\Include;..\..\..\components\drivers\spi;..\..\..\libcpu\arm\cortex-m0;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\eventfd;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\finsh;..\..\..\components\libc\posix\io\epoll;applications;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\libraries\HT32_STD_5xxxx_FWLib\library\Device\Holtek\HT32F5xxxx\Include;..\libraries\ht32_drivers;..\..\..\libcpu\arm\common;..\..\..\components\libc\posix\io\poll;board\inc;..\..\..\components\libc\compilers\common\include</IncludePath>
<IncludePath>..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension;..\..\..\include;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\libraries\ht32_drivers;..\libraries\HT32_STD_5xxxx_FWLib\library\Device\Holtek\HT32F5xxxx\Include;..\libraries\HT32_STD_5xxxx_FWLib\library\HT32F5xxxx_Driver\inc;..\..\..\libcpu\arm\common;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\libraries\HT32_STD_5xxxx_FWLib\library\CMSIS\Include;..\..\..\components\libc\posix\io\epoll;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\eventfd;board\inc;..\..\..\components\drivers\include;..\..\..\components\drivers\include;.;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\compilers\common\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;applications;..\..\..\components\drivers\spi;..\..\..\libcpu\arm\cortex-m0</IncludePath>
</VariousControls>
</Cads>
<Aads>
@@ -1094,6 +1094,61 @@
</FileArmAds>
</FileOption>
</File>
<File>
<FileName>adc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\misc\adc.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> </MiscControls>
<Define>__RT_IPC_SOURCE__</Define>
<Undefine> </Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
<File>
<FileName>pin.c</FileName>
<FileType>1</FileType>
@@ -1314,6 +1369,61 @@
</FileArmAds>
</FileOption>
</File>
<File>
<FileName>watchdog.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\drivers\watchdog\watchdog.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> </MiscControls>
<Define>__RT_IPC_SOURCE__</Define>
<Undefine> </Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
</Files>
</Group>
<Group>
@@ -1489,61 +1599,6 @@
</FileArmAds>
</FileOption>
</File>
<File>
<FileName>cpu_up.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\cpu_up.c</FilePath>
<FileOption>
<CommonProperty>
<UseCPPCompiler>2</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<FileArmAds>
<Cads>
<interw>2</interw>
<Optim>0</Optim>
<oTime>2</oTime>
<SplitLS>2</SplitLS>
<OneElfS>2</OneElfS>
<Strict>2</Strict>
<EnumInt>2</EnumInt>
<PlainCh>2</PlainCh>
<Ropi>2</Ropi>
<Rwpi>2</Rwpi>
<wLevel>0</wLevel>
<uThumb>2</uThumb>
<uSurpInc>2</uSurpInc>
<uC99>2</uC99>
<useXO>2</useXO>
<v6Lang>0</v6Lang>
<v6LangP>0</v6LangP>
<vShortEn>2</vShortEn>
<vShortWch>2</vShortWch>
<v6Lto>2</v6Lto>
<v6WtE>2</v6WtE>
<v6Rtti>2</v6Rtti>
<VariousControls>
<MiscControls> </MiscControls>
<Define>__RT_KERNEL_SOURCE__</Define>
<Undefine> </Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
bsp/ht32/ht32f52352/rtconfig.h
+14 -7
View File
@@ -21,9 +21,6 @@
/* kservice optimization */
#define RT_USING_DEBUG
#define RT_DEBUGING_COLOR
#define RT_DEBUGING_CONTEXT
/* Inter-Thread communication */
@@ -45,7 +42,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "usart1"
#define RT_VER_NUM 0x50100
#define RT_VER_NUM 0x50200
#define RT_BACKTRACE_LEVEL_MAX_NR 32
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
@@ -62,11 +59,11 @@
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_THREAD_STACK_SIZE 1024
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define FINSH_CMD_SIZE 32
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
@@ -81,11 +78,12 @@
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_ADC
#define RT_USING_SPI
#define RT_USING_WDT
#define RT_USING_PIN
/* Using USB */
@@ -191,6 +189,9 @@
/* STM32 HAL & SDK Drivers */
/* Infineon HAL Packages */
/* Kendryte SDK */
@@ -255,15 +256,21 @@
/* Hardware Drivers Config */
/* Chip Configuration */
#define SOC_KERNEL
#define CORTEX_M0
#define SOC_HT32F52352
/* Onboard Peripheral Drivers */
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_USART1
#define BSP_USING_USART1_NAME "usart1"
/* Board extended module Drivers */
bsp/ht32/libraries/ht32_drivers/SConscript
+10 -1
View File
@@ -23,8 +23,17 @@ if GetDepend(['BSP_USING_UART']):
if GetDepend(['BSP_USING_SPI']):
src += ['drv_spi.c']
if GetDepend(['BSP_USING_I2C']):
if GetDepend(['BSP_USING_I2C_HW']):
src += ['drv_i2c.c']
if GetDepend(['BSP_USING_I2C_SW']):
src += ['drv_soft_i2c.c']
if GetDepend(['BSP_USING_ADC']):
src += ['drv_adc.c']
if GetDepend(['BSP_USING_WDT']):
src += ['drv_wdt.c']
#创建一个列表，用于保存需要包含的H文件路径
path = [cwd]
bsp/ht32/libraries/ht32_drivers/drv_adc.c
+174
View File
@@ -0,0 +1,174 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-05-17 QT-one first version
*/
#include <rtdbg.h>
#include "drv_adc.h"
#ifdef RT_USING_ADC
#if !defined(BSP_USING_ADC0) && !defined(BSP_USING_ADC1)
#error "Please define at least one BSP_USING_ADCx"
/* this driver can be disabled at menuconfig RT-Thread Components Device Drivers */
#endif
struct ht32_adc
{
struct rt_adc_device ht32_adc_device;
HT_ADC_TypeDef *adc_x;
char *name;
};
/* ADC Peripheral List */
static struct ht32_adc ht32_adc_obj[] =
{
#ifdef BSP_USING_ADC0
{
.adc_x = HT_ADC0,
.name = BSP_USING_ADC0_NAME,
},
#endif
#ifdef BSP_USING_ADC1
{
.adc_x = HT_ADC1,
.name = BSP_USING_ADC1_NAME,
},
#endif
};
static rt_err_t ht32_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
{
HT_ADC_TypeDef *adc_x;
RT_ASSERT(device != RT_NULL);
adc_x = (HT_ADC_TypeDef*)device->parent.user_data;
if(enabled)
{
ht32_adc_gpio_init(adc_x,channel);
/* Configure the CK_ADCn prescaler */
#ifdef BSP_USING_ADC0
if(HT_ADC0 == adc_x)
{
CKCU_SetADCnPrescaler(CKCU_ADCPRE_ADC0,CKCU_ADCPRE_DIV64);
}
#endif
#ifdef BSP_USING_ADC1
if(HT_ADC1 == adc_x)
{
CKCU_SetADCnPrescaler(CKCU_ADCPRE_ADC1,CKCU_ADCPRE_DIV64);
}
#endif
/* Configure conversion mode and sequence length (number of conversion channels) */
ADC_RegularGroupConfig(adc_x,ONE_SHOT_MODE,1,0);
#ifdef SOC_SERIES_HT32F5
/* Configuring the Sampling Time */
ADC_SamplingTimeConfig(adc_x,0);
/* Configuring Channel Priority */
ADC_RegularChannelConfig(adc_x,channel,0);
#endif
#ifdef SOC_SERIES_HT32F1
/* Configuring Channel Priority */
ADC_RegularChannelConfig(adc_x,channel,0,0);
#endif
/* Configuring the Trigger Source */
ADC_RegularTrigConfig(adc_x,ADC_TRIG_SOFTWARE);
/* Enable ADC */
ADC_Cmd(adc_x,ENABLE);
}
else
{
/* Disable ADC */
ADC_Cmd(adc_x,DISABLE);
}
return RT_EOK;
}
static rt_err_t ht32_adc_convert(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
{
HT_ADC_TypeDef *adc_x;
rt_uint32_t timeout = 0;
FlagStatus adc_writ_flag = RESET;
RT_ASSERT(device != RT_NULL);
adc_x = (HT_ADC_TypeDef*)device->parent.user_data;
/* Toggle the acquisition channel */
#ifdef SOC_SERIES_HT32F5
ADC_RegularChannelConfig(adc_x,channel,0);
#endif
#ifdef SOC_SERIES_HT32F1
ADC_RegularChannelConfig(adc_x,channel,0,0);
#endif
/* enable Software triggered */
ADC_SoftwareStartConvCmd(adc_x,ENABLE);
while((!adc_writ_flag) && (timeout < 0xFFFF))
{
/* Wait for the conversion to complete */
adc_writ_flag = ADC_GetFlagStatus(adc_x,ADC_FLAG_SINGLE_EOC);
timeout++;
}
if(timeout >= 0xFFFF)
{
LOG_D("channel%d converts timeout, please confirm adc_x enabled or not", channel);
/* disable Software triggered */
ADC_SoftwareStartConvCmd(adc_x,DISABLE);
return -RT_ERROR;
}
/* clear ADC_FLAG_SINGLE_EOC flag */
ADC_ClearIntPendingBit(adc_x,ADC_FLAG_SINGLE_EOC);
/* get adc value */
*value = ADC_GetConversionData(adc_x,ADC_REGULAR_DATA0);
/* disable Software triggered */
ADC_SoftwareStartConvCmd(adc_x,DISABLE);
return RT_EOK;
}
static rt_uint8_t ht32_adc_get_resolution(struct rt_adc_device *device)
{
return 0;
}
static rt_int16_t ht32_adc_get_vref(struct rt_adc_device *device)
{
return 0;
}
/* ADC Device Operation Function Interface */
static const struct rt_adc_ops ht32_adc_ops =
{
.enabled = ht32_adc_enabled,
.convert = ht32_adc_convert,
.get_resolution = ht32_adc_get_resolution,
.get_vref = ht32_adc_get_vref,
};
static int rt_hw_adc_init(void)
{
int result = RT_EOK;
int i = 0;
for (i = 0; i < sizeof(ht32_adc_obj) / sizeof(ht32_adc_obj[0]); i++)
{
/* register ADC device */
if (rt_hw_adc_register(&ht32_adc_obj[i].ht32_adc_device, ht32_adc_obj[i].name, &ht32_adc_ops, ht32_adc_obj[i].adc_x) == RT_EOK)
{
LOG_D("%s register success", ht32_adc_obj[i].name);
}
else
{
LOG_E("%s register failed", ht32_adc_obj[i].name);
result = -RT_ERROR;
}
}
return result;
}
INIT_BOARD_EXPORT(rt_hw_adc_init);
#endif /* RT_USING_ADC */
bsp/ht32/libraries/ht32_drivers/drv_adc.h
+30
View File
@@ -0,0 +1,30 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-05-17 QT-one first version
*/
#ifndef __DRV_ADC_H__
#define __DRV_ADC_H__
#include <rtthread.h>
#include <rthw.h>
#ifdef RT_USING_DEVICE
#include <rtdevice.h>
#endif
#include "drv_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* __DRV_ADC_H__ */
bsp/ht32/libraries/ht32_drivers/drv_i2c.c
+28 -12
View File
@@ -11,8 +11,8 @@
#include "drv_i2c.h"
#ifdef RT_USING_I2C
#if !defined(BSP_USING_I2C0) && !defined(BSP_USING_I2C1)
#error "Please define at least one BSP_USING_I2Cx"
#if !defined(BSP_USING_I2C0_HW) && !defined(BSP_USING_I2C1_HW)
#error "Please define at least one BSP_USING_I2Cx_HW"
/* this driver can be disabled at menuconfig RT-Thread Components Device Drivers */
#endif
@@ -31,21 +31,29 @@ struct ht32_i2c
enum
{
#ifdef BSP_USING_I2C0
#ifdef BSP_USING_I2C0_HW
I2C0_INDEX,
#endif
#ifdef BSP_USING_I2C1
#ifdef BSP_USING_I2C1_HW
I2C1_INDEX,
#endif
};
static struct ht32_i2c_config i2c_config[] =
{
#ifdef BSP_USING_I2C0
{HT_I2C0, "i2c0", I2C0_IRQn},
#ifdef BSP_USING_I2C0_HW
{
.i2c_x = HT_I2C0,
.i2c_name = BSP_USING_I2C0_HW_NAME,
.irq = I2C0_IRQn
},
#endif
#ifdef BSP_USING_I2C1
{HT_I2C1, "i2c1", I2C1_IRQn},
#ifdef BSP_USING_I2C1_HW
{
.i2c_x = HT_I2C1,
.i2c_name = BSP_USING_I2C1_HW_NAME,
.irq = I2C1_IRQn
},
#endif
};
@@ -56,13 +64,13 @@ static rt_size_t ht32_i2c_init(struct ht32_i2c *i2c_drv)
struct ht32_i2c_config *i2c_config = i2c_drv->config;
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
#ifdef BSP_USING_I2C0
#ifdef BSP_USING_I2C0_HW
if (HT_I2C0 == i2c_config->i2c_x)
{
CKCUClock.Bit.I2C0 = 1;
}
#endif
#ifdef BSP_USING_I2C1
#ifdef BSP_USING_I2C1_HW
if (HT_I2C1 == i2c_config->i2c_x)
{
CKCUClock.Bit.I2C1 = 1;
@@ -71,7 +79,7 @@ static rt_size_t ht32_i2c_init(struct ht32_i2c *i2c_drv)
CKCUClock.Bit.AFIO = 1;
CKCU_PeripClockConfig(CKCUClock, ENABLE);
ht32_i2c_gpio_init(i2c_config->i2c_x);
ht32_hardware_i2c_gpio_init(i2c_config->i2c_x);
I2C_InitTypeDef I2C_InitStructure;
I2C_InitStructure.I2C_GeneralCall = DISABLE;
@@ -95,7 +103,11 @@ static int ht32_i2c_read(struct ht32_i2c_config *hi2c,
uint16_t date_num = 0;
uint8_t data = 0xFF;
/* Determine if the bus is idle */
while (I2C_GetFlagStatus(hi2c->i2c_x, I2C_FLAG_BUSBUSY));
/* Send start bit, slave address and read/write bit */
I2C_TargetAddressConfig(hi2c->i2c_x, slave_address, I2C_MASTER_READ);
while (!I2C_CheckStatus(hi2c->i2c_x, I2C_MASTER_SEND_START));
while (!I2C_CheckStatus(hi2c->i2c_x, I2C_MASTER_RECEIVER_MODE));
I2C_AckCmd(hi2c->i2c_x, ENABLE);
@@ -128,6 +140,9 @@ static int ht32_i2c_write(struct ht32_i2c_config *hi2c,
{
uint16_t date_num = data_byte;
/* Determine if the bus is idle */
while (I2C_GetFlagStatus(hi2c->i2c_x, I2C_FLAG_BUSBUSY));
/* Send start bit, slave address and read/write bit */
I2C_TargetAddressConfig(hi2c->i2c_x, slave_address, I2C_MASTER_WRITE);
while (!I2C_CheckStatus(hi2c->i2c_x, I2C_MASTER_SEND_START));
@@ -136,7 +151,8 @@ static int ht32_i2c_write(struct ht32_i2c_config *hi2c,
while (date_num--)
{
while (!I2C_CheckStatus(hi2c->i2c_x, I2C_MASTER_TX_EMPTY));
I2C_SendData(hi2c->i2c_x, *p_buffer++);
I2C_SendData(hi2c->i2c_x, *p_buffer);
p_buffer++;
}
while (!I2C_CheckStatus(hi2c->i2c_x, I2C_MASTER_TX_EMPTY));
bsp/ht32/libraries/ht32_drivers/drv_soft_i2c.c
+228
View File
File diff suppressed because it is too large Load Diff
bsp/ht32/libraries/ht32_drivers/drv_soft_i2c.h
+30
View File
@@ -0,0 +1,30 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-05-29 QT-one first version
*/
#ifndef __DRV_I2C_H__
#define __DRV_I2C_H__
#include <rtthread.h>
#include <rthw.h>
#ifdef RT_USING_DEVICE
#include <rtdevice.h>
#endif
#include "drv_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* __DRV_I2C_H__ */
bsp/ht32/libraries/ht32_drivers/drv_spi.c
+12 -4
View File
@@ -48,10 +48,18 @@ enum
static struct ht32_spi_config spi_config[] =
{
#ifdef BSP_USING_SPI0
{HT_SPI0, "spi0", SPI0_IRQn},
{
.spi_x = HT_SPI0,
.spi_name = BSP_USING_SPI0_NAME,
.irq = SPI0_IRQn
},
#endif
#ifdef BSP_USING_SPI1
{HT_SPI1, "spi1", SPI1_IRQn},
{
.spi_x = HT_SPI1,
.spi_name = BSP_USING_SPI1_NAME,
.irq = SPI1_IRQn
},
#endif
};
@@ -176,7 +184,7 @@ static rt_err_t ht32_configure(struct rt_spi_device *device, struct rt_spi_confi
}
else
{
return RT_ERROR;
return -RT_ERROR;
}
/* Set the polarity and phase of the SPI */
@@ -219,7 +227,7 @@ static rt_err_t ht32_configure(struct rt_spi_device *device, struct rt_spi_confi
}
else
{
return RT_ERROR;
return -RT_ERROR;
}
SPI_InitStructure.SPI_FIFO = SPI_FIFO_DISABLE;
bsp/ht32/libraries/ht32_drivers/drv_usart.c
+25 -25
View File
@@ -52,50 +52,50 @@ static struct ht32_usart usart_config[] =
{
#ifdef BSP_USING_USART0
{
"usart0",
HT_USART0,
USART0_IRQn,
RT_NULL
.name = BSP_USING_USART0_NAME,
.usart_x = HT_USART0,
.irq = USART0_IRQn,
.serial = RT_NULL
},
#endif
#ifdef BSP_USING_USART1
{
"usart1",
HT_USART1,
USART1_IRQn,
RT_NULL
.name = BSP_USING_USART1_NAME,
.usart_x = HT_USART1,
.irq = USART1_IRQn,
.serial = RT_NULL
},
#endif
#ifdef BSP_USING_UART0
{
"uart0",
HT_UART0,
UART0_IRQn,
RT_NULL
.name = BSP_USING_UART0_NAME,
.usart_x = HT_UART0,
.irq = UART0_IRQn,
.serial = RT_NULL
},
#endif
#ifdef BSP_USING_UART1
{
"uart1",
HT_UART1,
UART1_IRQn,
RT_NULL
.name = BSP_USING_UART1_NAME,
.usart_x = HT_UART1,
.irq = UART1_IRQn,
.serial = RT_NULL
},
#endif
#ifdef BSP_USING_UART2
{
"uart2",
HT_UART2,
UART0_UART2_IRQn,
RT_NULL
.name = BSP_USING_UART2_NAME,
.usart_x = HT_UART2,
.irq = UART0_UART2_IRQn,
.serial = RT_NULL
},
#endif
#ifdef BSP_USING_UART3
{
"uart3",
HT_UART3,
UART1_UART3_IRQn,
RT_NULL
.name = BSP_USING_UART3_NAME,
.usart_x = HT_UART3,
.irq = UART1_UART3_IRQn,
.serial = RT_NULL
},
#endif
};
@@ -256,7 +256,7 @@ static int ht32_getc(struct rt_serial_device *serial)
static rt_ssize_t ht32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
{
return RT_ERROR;
return -RT_ERROR;
}
static const struct rt_uart_ops ht32_usart_ops =
bsp/ht32/libraries/ht32_drivers/drv_wdt.c
+149
View File
@@ -0,0 +1,149 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-05-24 QT-one first version
*/
#include <rtdbg.h>
#include "drv_wdt.h"
#ifdef BSP_USING_WDT
struct ht32_wdt
{
struct rt_watchdog_device ht32_wdt_device;
rt_uint8_t ht32_wdt_start_flag;
};
static struct ht32_wdt ht32_wdt_obj;
/* Initialization functions for wdt */
static rt_err_t ht32_wdt_init(rt_watchdog_t *wdt)
{
return -RT_ERROR;
}
/* Control function for wdt */
static rt_err_t ht32_wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
{
rt_uint16_t wdt_time_val = (*((rt_uint16_t*)arg));
switch(cmd)
{
/* get timeout(in seconds) */
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
(*((rt_uint16_t*)arg)) = (WDT_GetReloadValue())/250;
break;
/* set timeout(in seconds) */
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
if(ht32_wdt_obj.ht32_wdt_start_flag)
{
LOG_W("Please stop the WDT device first.");
}
else
{
if(wdt_time_val > 16)
{
LOG_W("Parameter out of settable range.");
}
else
{
/* Disable WDT Protection */
WDT_ProtectCmd(DISABLE);
/* Reset WDT */
WDT_DeInit();
/* Set Prescaler Value, 32K/128 = 250Hz 4ms */
WDT_SetPrescaler(WDT_PRESCALER_128);
/* Set Prescaler Value, 250Hz*wdt_time_val*250 = nms */
WDT_SetReloadValue((wdt_time_val*250));
/* Set Delta Value, 250Hz*wdt_time_val*250 = nms */
WDT_SetDeltaValue((wdt_time_val*250));
/* Enable the WDT Reset when WDT meets underflow or error */
WDT_ResetCmd(ENABLE);
/* Reload Counter as WDTV Value */
WDT_Restart();
}
}
break;
/* get the left time before reboot(in seconds) */
case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
return -RT_ERROR;
/* refresh watchdog */
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
if(ht32_wdt_obj.ht32_wdt_start_flag)
{
/* Enable WDT Restart (Reload WDT Counter) */
WDT_Restart();
}
else
{
LOG_W("WDT device not activated.");
}
break;
/* start watchdog */
case RT_DEVICE_CTRL_WDT_START:
if(ht32_wdt_obj.ht32_wdt_start_flag)
{
LOG_W("The WDT device has been activated.");
}
else
{
/* Enable WDT */
WDT_Cmd(ENABLE);
/* Enable WDT Protection */
WDT_ProtectCmd(ENABLE);
ht32_wdt_obj.ht32_wdt_start_flag = 1;
}
break;
/* stop watchdog */
case RT_DEVICE_CTRL_WDT_STOP:
if(ht32_wdt_obj.ht32_wdt_start_flag)
{
/* Disable WDT Protection */
WDT_ProtectCmd(DISABLE);
/* Disable WDT */
WDT_Cmd(DISABLE);
ht32_wdt_obj.ht32_wdt_start_flag = 0;
}
else
{
LOG_W("WDT is not activated and does not need to be shut down.");
}
break;
default:
LOG_W("This command is not supported.");
return -RT_ERROR;
}
return RT_EOK;
}
static struct rt_watchdog_ops ht32_wdt_ops =
{
.init = ht32_wdt_init,
.control = ht32_wdt_control,
};
static int rt_hw_wdt_init(void)
{
CKCU_PeripClockConfig_TypeDef CKCUClock = {{0}};
CKCUClock.Bit.WDT = 1;
CKCU_PeripClockConfig(CKCUClock, ENABLE);
/* wdt operator function */
ht32_wdt_obj.ht32_wdt_device.ops = &ht32_wdt_ops;
/* wdt activation flag bit */
ht32_wdt_obj.ht32_wdt_start_flag = 0;
/* register watchdog device */
if (rt_hw_watchdog_register(&ht32_wdt_obj.ht32_wdt_device, BSP_USING_WDT_NAME, RT_DEVICE_FLAG_DEACTIVATE, &ht32_wdt_obj) != RT_EOK)
{
LOG_E("wdt device register failed.");
return -RT_ERROR;
}
LOG_D("wdt device register success.");
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_hw_wdt_init);
#endif
bsp/ht32/libraries/ht32_drivers/drv_wdt.h
+29
View File
@@ -0,0 +1,29 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-05-24 QT-one first version
*/
#ifndef __DRV_WDT_H__
#define __DRV_WDT_H__
#include <rtthread.h>
#include <rthw.h>
#ifdef RT_USING_DEVICE
#include <rtdevice.h>
#endif
#include "drv_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* __DRV_WDT_H__ */