mirror of
https://github.com/RT-Thread/rt-thread.git
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添加LM3S_9B9x分支
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1527 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong
@@ -0,0 +1,36 @@
|
||||
Import('RTT_ROOT')
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||||
Import('rtconfig')
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||||
from building import *
|
||||
|
||||
# The set of source files associated with this SConscript file.
|
||||
src = Split("""
|
||||
driverlib/adc.c
|
||||
driverlib/can.c
|
||||
driverlib/comp.c
|
||||
driverlib/cpu.c
|
||||
driverlib/epi.c
|
||||
driverlib/ethernet.c
|
||||
driverlib/flash.c
|
||||
driverlib/gpio.c
|
||||
driverlib/hibernate.c
|
||||
driverlib/i2c.c
|
||||
driverlib/i2s.c
|
||||
driverlib/interrupt.c
|
||||
driverlib/mpu.c
|
||||
driverlib/pwm.c
|
||||
driverlib/qei.c
|
||||
driverlib/ssi.c
|
||||
driverlib/sysctl.c
|
||||
driverlib/systick.c
|
||||
driverlib/timer.c
|
||||
driverlib/uart.c
|
||||
driverlib/udma.c
|
||||
driverlib/usb.c
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||||
driverlib/watchdog.c
|
||||
""")
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||||
|
||||
CPPPATH = [RTT_ROOT + '/bsp/lm3s/Libraries/inc', RTT_ROOT + '/bsp/lm3s/Libraries', RTT_ROOT + '/bsp/lm3s/Libraries/driverlib']
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||||
|
||||
group = DefineGroup('library', src, depend = [''], CPPPATH = CPPPATH)
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||||
|
||||
Return('group')
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,258 @@
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||||
//*****************************************************************************
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||||
//
|
||||
// adc.h - ADC headers for using the ADC driver functions.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __ADC_H__
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||||
#define __ADC_H__
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||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
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||||
extern "C"
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||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCSequenceConfigure as the ulTrigger
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||||
// parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_TRIGGER_PROCESSOR 0x00000000 // Processor event
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||||
#define ADC_TRIGGER_COMP0 0x00000001 // Analog comparator 0 event
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#define ADC_TRIGGER_COMP1 0x00000002 // Analog comparator 1 event
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||||
#define ADC_TRIGGER_COMP2 0x00000003 // Analog comparator 2 event
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||||
#define ADC_TRIGGER_EXTERNAL 0x00000004 // External event
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||||
#define ADC_TRIGGER_TIMER 0x00000005 // Timer event
|
||||
#define ADC_TRIGGER_PWM0 0x00000006 // PWM0 event
|
||||
#define ADC_TRIGGER_PWM1 0x00000007 // PWM1 event
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||||
#define ADC_TRIGGER_PWM2 0x00000008 // PWM2 event
|
||||
#define ADC_TRIGGER_PWM3 0x00000009 // PWM3 event
|
||||
#define ADC_TRIGGER_ALWAYS 0x0000000F // Always event
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCSequenceStepConfigure as the ulConfig
|
||||
// parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_CTL_TS 0x00000080 // Temperature sensor select
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||||
#define ADC_CTL_IE 0x00000040 // Interrupt enable
|
||||
#define ADC_CTL_END 0x00000020 // Sequence end select
|
||||
#define ADC_CTL_D 0x00000010 // Differential select
|
||||
#define ADC_CTL_CH0 0x00000000 // Input channel 0
|
||||
#define ADC_CTL_CH1 0x00000001 // Input channel 1
|
||||
#define ADC_CTL_CH2 0x00000002 // Input channel 2
|
||||
#define ADC_CTL_CH3 0x00000003 // Input channel 3
|
||||
#define ADC_CTL_CH4 0x00000004 // Input channel 4
|
||||
#define ADC_CTL_CH5 0x00000005 // Input channel 5
|
||||
#define ADC_CTL_CH6 0x00000006 // Input channel 6
|
||||
#define ADC_CTL_CH7 0x00000007 // Input channel 7
|
||||
#define ADC_CTL_CH8 0x00000008 // Input channel 8
|
||||
#define ADC_CTL_CH9 0x00000009 // Input channel 9
|
||||
#define ADC_CTL_CH10 0x0000000A // Input channel 10
|
||||
#define ADC_CTL_CH11 0x0000000B // Input channel 11
|
||||
#define ADC_CTL_CH12 0x0000000C // Input channel 12
|
||||
#define ADC_CTL_CH13 0x0000000D // Input channel 13
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||||
#define ADC_CTL_CH14 0x0000000E // Input channel 14
|
||||
#define ADC_CTL_CH15 0x0000000F // Input channel 15
|
||||
#define ADC_CTL_CMP0 0x00080000 // Select Comparator 0
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||||
#define ADC_CTL_CMP1 0x00090000 // Select Comparator 1
|
||||
#define ADC_CTL_CMP2 0x000A0000 // Select Comparator 2
|
||||
#define ADC_CTL_CMP3 0x000B0000 // Select Comparator 3
|
||||
#define ADC_CTL_CMP4 0x000C0000 // Select Comparator 4
|
||||
#define ADC_CTL_CMP5 0x000D0000 // Select Comparator 5
|
||||
#define ADC_CTL_CMP6 0x000E0000 // Select Comparator 6
|
||||
#define ADC_CTL_CMP7 0x000F0000 // Select Comparator 7
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCComparatorConfigure as part of the
|
||||
// ulConfig parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_COMP_TRIG_NONE 0x00000000 // Trigger Disabled
|
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#define ADC_COMP_TRIG_LOW_ALWAYS \
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0x00001000 // Trigger Low Always
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#define ADC_COMP_TRIG_LOW_ONCE 0x00001100 // Trigger Low Once
|
||||
#define ADC_COMP_TRIG_LOW_HALWAYS \
|
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0x00001200 // Trigger Low Always (Hysteresis)
|
||||
#define ADC_COMP_TRIG_LOW_HONCE 0x00001300 // Trigger Low Once (Hysteresis)
|
||||
#define ADC_COMP_TRIG_MID_ALWAYS \
|
||||
0x00001400 // Trigger Mid Always
|
||||
#define ADC_COMP_TRIG_MID_ONCE 0x00001500 // Trigger Mid Once
|
||||
#define ADC_COMP_TRIG_HIGH_ALWAYS \
|
||||
0x00001C00 // Trigger High Always
|
||||
#define ADC_COMP_TRIG_HIGH_ONCE 0x00001D00 // Trigger High Once
|
||||
#define ADC_COMP_TRIG_HIGH_HALWAYS \
|
||||
0x00001E00 // Trigger High Always (Hysteresis)
|
||||
#define ADC_COMP_TRIG_HIGH_HONCE \
|
||||
0x00001F00 // Trigger High Once (Hysteresis)
|
||||
|
||||
#define ADC_COMP_INT_NONE 0x00000000 // Interrupt Disabled
|
||||
#define ADC_COMP_INT_LOW_ALWAYS \
|
||||
0x00000010 // Interrupt Low Always
|
||||
#define ADC_COMP_INT_LOW_ONCE 0x00000011 // Interrupt Low Once
|
||||
#define ADC_COMP_INT_LOW_HALWAYS \
|
||||
0x00000012 // Interrupt Low Always
|
||||
// (Hysteresis)
|
||||
#define ADC_COMP_INT_LOW_HONCE 0x00000013 // Interrupt Low Once (Hysteresis)
|
||||
#define ADC_COMP_INT_MID_ALWAYS \
|
||||
0x00000014 // Interrupt Mid Always
|
||||
#define ADC_COMP_INT_MID_ONCE 0x00000015 // Interrupt Mid Once
|
||||
#define ADC_COMP_INT_HIGH_ALWAYS \
|
||||
0x0000001C // Interrupt High Always
|
||||
#define ADC_COMP_INT_HIGH_ONCE 0x0000001D // Interrupt High Once
|
||||
#define ADC_COMP_INT_HIGH_HALWAYS \
|
||||
0x0000001E // Interrupt High Always
|
||||
// (Hysteresis)
|
||||
#define ADC_COMP_INT_HIGH_HONCE \
|
||||
0x0000001F // Interrupt High Once (Hysteresis)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be used to modify the sequence number passed to
|
||||
// ADCProcessorTrigger in order to get cross-module synchronous processor
|
||||
// triggers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_TRIGGER_WAIT 0x08000000 // Wait for the synchronous trigger
|
||||
#define ADC_TRIGGER_SIGNAL 0x80000000 // Signal the synchronous trigger
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCPhaseDelaySet as the ulPhase parameter and
|
||||
// returned from ADCPhaseDelayGet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_PHASE_0 0x00000000 // 0 degrees
|
||||
#define ADC_PHASE_22_5 0x00000001 // 22.5 degrees
|
||||
#define ADC_PHASE_45 0x00000002 // 45 degrees
|
||||
#define ADC_PHASE_67_5 0x00000003 // 67.5 degrees
|
||||
#define ADC_PHASE_90 0x00000004 // 90 degrees
|
||||
#define ADC_PHASE_112_5 0x00000005 // 112.5 degrees
|
||||
#define ADC_PHASE_135 0x00000006 // 135 degrees
|
||||
#define ADC_PHASE_157_5 0x00000007 // 157.5 degrees
|
||||
#define ADC_PHASE_180 0x00000008 // 180 degrees
|
||||
#define ADC_PHASE_202_5 0x00000009 // 202.5 degrees
|
||||
#define ADC_PHASE_225 0x0000000A // 225 degrees
|
||||
#define ADC_PHASE_247_5 0x0000000B // 247.5 degrees
|
||||
#define ADC_PHASE_270 0x0000000C // 270 degrees
|
||||
#define ADC_PHASE_292_5 0x0000000D // 292.5 degrees
|
||||
#define ADC_PHASE_315 0x0000000E // 315 degrees
|
||||
#define ADC_PHASE_337_5 0x0000000F // 337.5 degrees
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ADCReferenceSet as the ulRef parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ADC_REF_INT 0x00000000 // Internal reference
|
||||
#define ADC_REF_EXT_3V 0x00000001 // External 3V reference
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void ADCIntRegister(unsigned long ulBase, unsigned long ulSequenceNum,
|
||||
void (*pfnHandler)(void));
|
||||
extern void ADCIntUnregister(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern void ADCIntDisable(unsigned long ulBase, unsigned long ulSequenceNum);
|
||||
extern void ADCIntEnable(unsigned long ulBase, unsigned long ulSequenceNum);
|
||||
extern unsigned long ADCIntStatus(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum,
|
||||
tBoolean bMasked);
|
||||
extern void ADCIntClear(unsigned long ulBase, unsigned long ulSequenceNum);
|
||||
extern void ADCSequenceEnable(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern void ADCSequenceDisable(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern void ADCSequenceConfigure(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum,
|
||||
unsigned long ulTrigger,
|
||||
unsigned long ulPriority);
|
||||
extern void ADCSequenceStepConfigure(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum,
|
||||
unsigned long ulStep,
|
||||
unsigned long ulConfig);
|
||||
extern long ADCSequenceOverflow(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern void ADCSequenceOverflowClear(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern long ADCSequenceUnderflow(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern void ADCSequenceUnderflowClear(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern long ADCSequenceDataGet(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum,
|
||||
unsigned long *pulBuffer);
|
||||
extern void ADCProcessorTrigger(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern void ADCSoftwareOversampleConfigure(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum,
|
||||
unsigned long ulFactor);
|
||||
extern void ADCSoftwareOversampleStepConfigure(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum,
|
||||
unsigned long ulStep,
|
||||
unsigned long ulConfig);
|
||||
extern void ADCSoftwareOversampleDataGet(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum,
|
||||
unsigned long *pulBuffer,
|
||||
unsigned long ulCount);
|
||||
extern void ADCHardwareOversampleConfigure(unsigned long ulBase,
|
||||
unsigned long ulFactor);
|
||||
extern void ADCComparatorConfigure(unsigned long ulBase, unsigned long ulComp,
|
||||
unsigned long ulConfig);
|
||||
extern void ADCComparatorRegionSet(unsigned long ulBase, unsigned long ulComp,
|
||||
unsigned long ulLowRef,
|
||||
unsigned long ulHighRef);
|
||||
extern void ADCComparatorReset(unsigned long ulBase, unsigned long ulComp,
|
||||
tBoolean bTrigger, tBoolean bInterrupt);
|
||||
extern void ADCComparatorIntDisable(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern void ADCComparatorIntEnable(unsigned long ulBase,
|
||||
unsigned long ulSequenceNum);
|
||||
extern unsigned long ADCComparatorIntStatus(unsigned long ulBase);
|
||||
extern void ADCComparatorIntClear(unsigned long ulBase,
|
||||
unsigned long ulStatus);
|
||||
extern void ADCReferenceSet(unsigned long ulBase, unsigned long ulRef);
|
||||
extern unsigned long ADCReferenceGet(unsigned long ulBase);
|
||||
extern void ADCPhaseDelaySet(unsigned long ulBase, unsigned long ulPhase);
|
||||
extern unsigned long ADCPhaseDelayGet(unsigned long ulBase);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __ADC_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,450 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// can.h - Defines and Macros for the CAN controller.
|
||||
//
|
||||
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __CAN_H__
|
||||
#define __CAN_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup can_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Miscellaneous defines for Message ID Types
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// These are the flags used by the tCANMsgObject.ulFlags value when calling the
|
||||
// CANMessageSet() and CANMessageGet() functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//
|
||||
//! This definition is used with the tCANMsgObject ulFlags value and indicates
|
||||
//! that transmit interrupts should be enabled, or are enabled.
|
||||
//
|
||||
#define MSG_OBJ_TX_INT_ENABLE 0x00000001
|
||||
|
||||
//
|
||||
//! This indicates that receive interrupts should be enabled, or are
|
||||
//! enabled.
|
||||
//
|
||||
#define MSG_OBJ_RX_INT_ENABLE 0x00000002
|
||||
|
||||
//
|
||||
//! This indicates that a message object will use or is using an extended
|
||||
//! identifier.
|
||||
//
|
||||
#define MSG_OBJ_EXTENDED_ID 0x00000004
|
||||
|
||||
//
|
||||
//! This indicates that a message object will use or is using filtering
|
||||
//! based on the object's message identifier.
|
||||
//
|
||||
#define MSG_OBJ_USE_ID_FILTER 0x00000008
|
||||
|
||||
//
|
||||
//! This indicates that new data was available in the message object.
|
||||
//
|
||||
#define MSG_OBJ_NEW_DATA 0x00000080
|
||||
|
||||
//
|
||||
//! This indicates that data was lost since this message object was last
|
||||
//! read.
|
||||
//
|
||||
#define MSG_OBJ_DATA_LOST 0x00000100
|
||||
|
||||
//
|
||||
//! This indicates that a message object will use or is using filtering
|
||||
//! based on the direction of the transfer. If the direction filtering is
|
||||
//! used, then ID filtering must also be enabled.
|
||||
//
|
||||
#define MSG_OBJ_USE_DIR_FILTER (0x00000010 | MSG_OBJ_USE_ID_FILTER)
|
||||
|
||||
//
|
||||
//! This indicates that a message object will use or is using message
|
||||
//! identifier filtering based on the extended identifier. If the extended
|
||||
//! identifier filtering is used, then ID filtering must also be enabled.
|
||||
//
|
||||
#define MSG_OBJ_USE_EXT_FILTER (0x00000020 | MSG_OBJ_USE_ID_FILTER)
|
||||
|
||||
//
|
||||
//! This indicates that a message object is a remote frame.
|
||||
//
|
||||
#define MSG_OBJ_REMOTE_FRAME 0x00000040
|
||||
|
||||
//
|
||||
//! This indicates that this message object is part of a FIFO structure and
|
||||
//! not the final message object in a FIFO.
|
||||
//
|
||||
#define MSG_OBJ_FIFO 0x00000200
|
||||
|
||||
//
|
||||
//! This indicates that a message object has no flags set.
|
||||
//
|
||||
#define MSG_OBJ_NO_FLAGS 0x00000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This define is used with the flag values to allow checking only status
|
||||
//! flags and not configuration flags.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MSG_OBJ_STATUS_MASK (MSG_OBJ_NEW_DATA | MSG_OBJ_DATA_LOST)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! The structure used for encapsulating all the items associated with a CAN
|
||||
//! message object in the CAN controller.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! The CAN message identifier used for 11 or 29 bit identifiers.
|
||||
//
|
||||
unsigned long ulMsgID;
|
||||
|
||||
//
|
||||
//! The message identifier mask used when identifier filtering is enabled.
|
||||
//
|
||||
unsigned long ulMsgIDMask;
|
||||
|
||||
//
|
||||
//! This value holds various status flags and settings specified by
|
||||
//! tCANObjFlags.
|
||||
//
|
||||
unsigned long ulFlags;
|
||||
|
||||
//
|
||||
//! This value is the number of bytes of data in the message object.
|
||||
//
|
||||
unsigned long ulMsgLen;
|
||||
|
||||
//
|
||||
//! This is a pointer to the message object's data.
|
||||
//
|
||||
unsigned char *pucMsgData;
|
||||
}
|
||||
tCANMsgObject;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This structure is used for encapsulating the values associated with setting
|
||||
//! up the bit timing for a CAN controller. The structure is used when calling
|
||||
//! the CANGetBitTiming and CANSetBitTiming functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef struct
|
||||
{
|
||||
//
|
||||
//! This value holds the sum of the Synchronization, Propagation, and Phase
|
||||
//! Buffer 1 segments, measured in time quanta. The valid values for this
|
||||
//! setting range from 2 to 16.
|
||||
//
|
||||
unsigned int uSyncPropPhase1Seg;
|
||||
|
||||
//
|
||||
//! This value holds the Phase Buffer 2 segment in time quanta. The valid
|
||||
//! values for this setting range from 1 to 8.
|
||||
//
|
||||
unsigned int uPhase2Seg;
|
||||
|
||||
//
|
||||
//! This value holds the Resynchronization Jump Width in time quanta. The
|
||||
//! valid values for this setting range from 1 to 4.
|
||||
//
|
||||
unsigned int uSJW;
|
||||
|
||||
//
|
||||
//! This value holds the CAN_CLK divider used to determine time quanta.
|
||||
//! The valid values for this setting range from 1 to 1023.
|
||||
//
|
||||
unsigned int uQuantumPrescaler;
|
||||
}
|
||||
tCANBitClkParms;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This data type is used to identify the interrupt status register. This is
|
||||
//! used when calling the CANIntStatus() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
//
|
||||
//! Read the CAN interrupt status information.
|
||||
//
|
||||
CAN_INT_STS_CAUSE,
|
||||
|
||||
//
|
||||
//! Read a message object's interrupt status.
|
||||
//
|
||||
CAN_INT_STS_OBJECT
|
||||
}
|
||||
tCANIntStsReg;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This data type is used to identify which of several status registers to
|
||||
//! read when calling the CANStatusGet() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
//
|
||||
//! Read the full CAN controller status.
|
||||
//
|
||||
CAN_STS_CONTROL,
|
||||
|
||||
//
|
||||
//! Read the full 32-bit mask of message objects with a transmit request
|
||||
//! set.
|
||||
//
|
||||
CAN_STS_TXREQUEST,
|
||||
|
||||
//
|
||||
//! Read the full 32-bit mask of message objects with new data available.
|
||||
//
|
||||
CAN_STS_NEWDAT,
|
||||
|
||||
//
|
||||
//! Read the full 32-bit mask of message objects that are enabled.
|
||||
//
|
||||
CAN_STS_MSGVAL
|
||||
}
|
||||
tCANStsReg;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// These definitions are used to specify interrupt sources to CANIntEnable()
|
||||
// and CANIntDisable().
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This flag is used to allow a CAN controller to generate error
|
||||
//! interrupts.
|
||||
//
|
||||
#define CAN_INT_ERROR 0x00000008
|
||||
|
||||
//
|
||||
//! This flag is used to allow a CAN controller to generate status
|
||||
//! interrupts.
|
||||
//
|
||||
#define CAN_INT_STATUS 0x00000004
|
||||
|
||||
//
|
||||
//! This flag is used to allow a CAN controller to generate any CAN
|
||||
//! interrupts. If this is not set, then no interrupts will be generated
|
||||
//! by the CAN controller.
|
||||
//
|
||||
#define CAN_INT_MASTER 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! This definition is used to determine the type of message object that will
|
||||
//! be set up via a call to the CANMessageSet() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
//
|
||||
//! Transmit message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_TX,
|
||||
|
||||
//
|
||||
//! Transmit remote request message object
|
||||
//
|
||||
MSG_OBJ_TYPE_TX_REMOTE,
|
||||
|
||||
//
|
||||
//! Receive message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_RX,
|
||||
|
||||
//
|
||||
//! Receive remote request message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_RX_REMOTE,
|
||||
|
||||
//
|
||||
//! Remote frame receive remote, with auto-transmit message object.
|
||||
//
|
||||
MSG_OBJ_TYPE_RXTX_REMOTE
|
||||
}
|
||||
tMsgObjType;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following enumeration contains all error or status indicators that can
|
||||
// be returned when calling the CANStatusGet() function.
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! CAN controller has entered a Bus Off state.
|
||||
//
|
||||
#define CAN_STATUS_BUS_OFF 0x00000080
|
||||
|
||||
//
|
||||
//! CAN controller error level has reached warning level.
|
||||
//
|
||||
#define CAN_STATUS_EWARN 0x00000040
|
||||
|
||||
//
|
||||
//! CAN controller error level has reached error passive level.
|
||||
//
|
||||
#define CAN_STATUS_EPASS 0x00000020
|
||||
|
||||
//
|
||||
//! A message was received successfully since the last read of this status.
|
||||
//
|
||||
#define CAN_STATUS_RXOK 0x00000010
|
||||
|
||||
//
|
||||
//! A message was transmitted successfully since the last read of this
|
||||
//! status.
|
||||
//
|
||||
#define CAN_STATUS_TXOK 0x00000008
|
||||
|
||||
//
|
||||
//! This is the mask for the last error code field.
|
||||
//
|
||||
#define CAN_STATUS_LEC_MSK 0x00000007
|
||||
|
||||
//
|
||||
//! There was no error.
|
||||
//
|
||||
#define CAN_STATUS_LEC_NONE 0x00000000
|
||||
|
||||
//
|
||||
//! A bit stuffing error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_STUFF 0x00000001
|
||||
|
||||
//
|
||||
//! A formatting error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_FORM 0x00000002
|
||||
|
||||
//
|
||||
//! An acknowledge error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_ACK 0x00000003
|
||||
|
||||
//
|
||||
//! The bus remained a bit level of 1 for longer than is allowed.
|
||||
//
|
||||
#define CAN_STATUS_LEC_BIT1 0x00000004
|
||||
|
||||
//
|
||||
//! The bus remained a bit level of 0 for longer than is allowed.
|
||||
//
|
||||
#define CAN_STATUS_LEC_BIT0 0x00000005
|
||||
|
||||
//
|
||||
//! A CRC error has occurred.
|
||||
//
|
||||
#define CAN_STATUS_LEC_CRC 0x00000006
|
||||
|
||||
//
|
||||
//! This is the mask for the CAN Last Error Code (LEC).
|
||||
//
|
||||
#define CAN_STATUS_LEC_MASK 0x00000007
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void CANBitTimingGet(unsigned long ulBase, tCANBitClkParms *pClkParms);
|
||||
extern void CANBitTimingSet(unsigned long ulBase, tCANBitClkParms *pClkParms);
|
||||
extern unsigned long CANBitRateSet(unsigned long ulBase,
|
||||
unsigned long ulSourceClock,
|
||||
unsigned long ulBitRate);
|
||||
extern void CANDisable(unsigned long ulBase);
|
||||
extern void CANEnable(unsigned long ulBase);
|
||||
extern tBoolean CANErrCntrGet(unsigned long ulBase, unsigned long *pulRxCount,
|
||||
unsigned long *pulTxCount);
|
||||
extern void CANInit(unsigned long ulBase);
|
||||
extern void CANIntClear(unsigned long ulBase, unsigned long ulIntClr);
|
||||
extern void CANIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void CANIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void CANIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
|
||||
extern unsigned long CANIntStatus(unsigned long ulBase,
|
||||
tCANIntStsReg eIntStsReg);
|
||||
extern void CANIntUnregister(unsigned long ulBase);
|
||||
extern void CANMessageClear(unsigned long ulBase, unsigned long ulObjID);
|
||||
extern void CANMessageGet(unsigned long ulBase, unsigned long ulObjID,
|
||||
tCANMsgObject *pMsgObject, tBoolean bClrPendingInt);
|
||||
extern void CANMessageSet(unsigned long ulBase, unsigned long ulObjID,
|
||||
tCANMsgObject *pMsgObject, tMsgObjType eMsgType);
|
||||
extern tBoolean CANRetryGet(unsigned long ulBase);
|
||||
extern void CANRetrySet(unsigned long ulBase, tBoolean bAutoRetry);
|
||||
extern unsigned long CANStatusGet(unsigned long ulBase, tCANStsReg eStatusReg);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Several CAN APIs have been renamed, with the original function name being
|
||||
// deprecated. These defines provide backward compatibility.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#define CANSetBitTiming(a, b) CANBitTimingSet(a, b)
|
||||
#define CANGetBitTiming(a, b) CANBitTimingGet(a, b)
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#endif // __CAN_H__
|
||||
@@ -0,0 +1,436 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// comp.c - Driver for the analog comparator.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup comp_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_comp.h"
|
||||
#include "inc/hw_ints.h"
|
||||
#include "inc/hw_memmap.h"
|
||||
#include "inc/hw_types.h"
|
||||
#include "driverlib/comp.h"
|
||||
#include "driverlib/debug.h"
|
||||
#include "driverlib/interrupt.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Configures a comparator.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator to configure.
|
||||
//! \param ulConfig is the configuration of the comparator.
|
||||
//!
|
||||
//! This function will configure a comparator. The \e ulConfig parameter is
|
||||
//! the result of a logical OR operation between the \b COMP_TRIG_xxx,
|
||||
//! \b COMP_INT_xxx, \b COMP_ASRCP_xxx, and \b COMP_OUTPUT_xxx values.
|
||||
//!
|
||||
//! The \b COMP_TRIG_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_TRIG_NONE to have no trigger to the ADC.
|
||||
//! - \b COMP_TRIG_HIGH to trigger the ADC when the comparator output is high.
|
||||
//! - \b COMP_TRIG_LOW to trigger the ADC when the comparator output is low.
|
||||
//! - \b COMP_TRIG_FALL to trigger the ADC when the comparator output goes low.
|
||||
//! - \b COMP_TRIG_RISE to trigger the ADC when the comparator output goes
|
||||
//! high.
|
||||
//! - \b COMP_TRIG_BOTH to trigger the ADC when the comparator output goes low
|
||||
//! or high.
|
||||
//!
|
||||
//! The \b COMP_INT_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_INT_HIGH to generate an interrupt when the comparator output is
|
||||
//! high.
|
||||
//! - \b COMP_INT_LOW to generate an interrupt when the comparator output is
|
||||
//! low.
|
||||
//! - \b COMP_INT_FALL to generate an interrupt when the comparator output goes
|
||||
//! low.
|
||||
//! - \b COMP_INT_RISE to generate an interrupt when the comparator output goes
|
||||
//! high.
|
||||
//! - \b COMP_INT_BOTH to generate an interrupt when the comparator output goes
|
||||
//! low or high.
|
||||
//!
|
||||
//! The \b COMP_ASRCP_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_ASRCP_PIN to use the dedicated Comp+ pin as the reference
|
||||
//! voltage.
|
||||
//! - \b COMP_ASRCP_PIN0 to use the Comp0+ pin as the reference voltage (this
|
||||
//! the same as \b COMP_ASRCP_PIN for the comparator 0).
|
||||
//! - \b COMP_ASRCP_REF to use the internally generated voltage as the
|
||||
//! reference voltage.
|
||||
//!
|
||||
//! The \b COMP_OUTPUT_xxx term can take on the following values:
|
||||
//!
|
||||
//! - \b COMP_OUTPUT_NORMAL to enable a non-inverted output from the comparator
|
||||
//! to a device pin.
|
||||
//! - \b COMP_OUTPUT_INVERT to enable an inverted output from the comparator to
|
||||
//! a device pin.
|
||||
//! - \b COMP_OUTPUT_NONE is deprecated and behaves the same as
|
||||
//! \b COMP_OUTPUT_NORMAL.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorConfigure(unsigned long ulBase, unsigned long ulComp,
|
||||
unsigned long ulConfig)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Configure this comparator.
|
||||
//
|
||||
HWREG(ulBase + (ulComp * 0x20) + COMP_O_ACCTL0) = ulConfig;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the internal reference voltage.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulRef is the desired reference voltage.
|
||||
//!
|
||||
//! This function will set the internal reference voltage value. The voltage
|
||||
//! is specified as one of the following values:
|
||||
//!
|
||||
//! - \b COMP_REF_OFF to turn off the reference voltage
|
||||
//! - \b COMP_REF_0V to set the reference voltage to 0 V
|
||||
//! - \b COMP_REF_0_1375V to set the reference voltage to 0.1375 V
|
||||
//! - \b COMP_REF_0_275V to set the reference voltage to 0.275 V
|
||||
//! - \b COMP_REF_0_4125V to set the reference voltage to 0.4125 V
|
||||
//! - \b COMP_REF_0_55V to set the reference voltage to 0.55 V
|
||||
//! - \b COMP_REF_0_6875V to set the reference voltage to 0.6875 V
|
||||
//! - \b COMP_REF_0_825V to set the reference voltage to 0.825 V
|
||||
//! - \b COMP_REF_0_928125V to set the reference voltage to 0.928125 V
|
||||
//! - \b COMP_REF_0_9625V to set the reference voltage to 0.9625 V
|
||||
//! - \b COMP_REF_1_03125V to set the reference voltage to 1.03125 V
|
||||
//! - \b COMP_REF_1_134375V to set the reference voltage to 1.134375 V
|
||||
//! - \b COMP_REF_1_1V to set the reference voltage to 1.1 V
|
||||
//! - \b COMP_REF_1_2375V to set the reference voltage to 1.2375 V
|
||||
//! - \b COMP_REF_1_340625V to set the reference voltage to 1.340625 V
|
||||
//! - \b COMP_REF_1_375V to set the reference voltage to 1.375 V
|
||||
//! - \b COMP_REF_1_44375V to set the reference voltage to 1.44375 V
|
||||
//! - \b COMP_REF_1_5125V to set the reference voltage to 1.5125 V
|
||||
//! - \b COMP_REF_1_546875V to set the reference voltage to 1.546875 V
|
||||
//! - \b COMP_REF_1_65V to set the reference voltage to 1.65 V
|
||||
//! - \b COMP_REF_1_753125V to set the reference voltage to 1.753125 V
|
||||
//! - \b COMP_REF_1_7875V to set the reference voltage to 1.7875 V
|
||||
//! - \b COMP_REF_1_85625V to set the reference voltage to 1.85625 V
|
||||
//! - \b COMP_REF_1_925V to set the reference voltage to 1.925 V
|
||||
//! - \b COMP_REF_1_959375V to set the reference voltage to 1.959375 V
|
||||
//! - \b COMP_REF_2_0625V to set the reference voltage to 2.0625 V
|
||||
//! - \b COMP_REF_2_165625V to set the reference voltage to 2.165625 V
|
||||
//! - \b COMP_REF_2_26875V to set the reference voltage to 2.26875 V
|
||||
//! - \b COMP_REF_2_371875V to set the reference voltage to 2.371875 V
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorRefSet(unsigned long ulBase, unsigned long ulRef)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
|
||||
//
|
||||
// Set the voltage reference voltage as requested.
|
||||
//
|
||||
HWREG(ulBase + COMP_O_ACREFCTL) = ulRef;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the current comparator output value.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator.
|
||||
//!
|
||||
//! This function retrieves the current value of the comparator output.
|
||||
//!
|
||||
//! \return Returns \b true if the comparator output is high and \b false if
|
||||
//! the comparator output is low.
|
||||
//
|
||||
//*****************************************************************************
|
||||
tBoolean
|
||||
ComparatorValueGet(unsigned long ulBase, unsigned long ulComp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Return the appropriate value based on the comparator's present output
|
||||
// value.
|
||||
//
|
||||
if(HWREG(ulBase + (ulComp * 0x20) + COMP_O_ACSTAT0) & COMP_ACSTAT0_OVAL)
|
||||
{
|
||||
return(true);
|
||||
}
|
||||
else
|
||||
{
|
||||
return(false);
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Registers an interrupt handler for the comparator interrupt.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator.
|
||||
//! \param pfnHandler is a pointer to the function to be called when the
|
||||
//! comparator interrupt occurs.
|
||||
//!
|
||||
//! This sets the handler to be called when the comparator interrupt occurs.
|
||||
//! This will enable the interrupt in the interrupt controller; it is the
|
||||
//! interrupt-handler's responsibility to clear the interrupt source via
|
||||
//! ComparatorIntClear().
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntRegister(unsigned long ulBase, unsigned long ulComp,
|
||||
void (*pfnHandler)(void))
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Register the interrupt handler, returning an error if an error occurs.
|
||||
//
|
||||
IntRegister(INT_COMP0 + ulComp, pfnHandler);
|
||||
|
||||
//
|
||||
// Enable the interrupt in the interrupt controller.
|
||||
//
|
||||
IntEnable(INT_COMP0 + ulComp);
|
||||
|
||||
//
|
||||
// Enable the comparator interrupt.
|
||||
//
|
||||
HWREG(ulBase + COMP_O_ACINTEN) |= 1 << ulComp;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Unregisters an interrupt handler for a comparator interrupt.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator.
|
||||
//!
|
||||
//! This function will clear the handler to be called when a comparator
|
||||
//! interrupt occurs. This will also mask off the interrupt in the interrupt
|
||||
//! controller so that the interrupt handler no longer is called.
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntUnregister(unsigned long ulBase, unsigned long ulComp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Disable the comparator interrupt.
|
||||
//
|
||||
HWREG(ulBase + COMP_O_ACINTEN) &= ~(1 << ulComp);
|
||||
|
||||
//
|
||||
// Disable the interrupt in the interrupt controller.
|
||||
//
|
||||
IntDisable(INT_COMP0 + ulComp);
|
||||
|
||||
//
|
||||
// Unregister the interrupt handler.
|
||||
//
|
||||
IntUnregister(INT_COMP0 + ulComp);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the comparator interrupt.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator.
|
||||
//!
|
||||
//! This function enables generation of an interrupt from the specified
|
||||
//! comparator. Only comparators whose interrupts are enabled can be reflected
|
||||
//! to the processor.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntEnable(unsigned long ulBase, unsigned long ulComp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Enable the comparator interrupt.
|
||||
//
|
||||
HWREG(ulBase + COMP_O_ACINTEN) |= 1 << ulComp;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the comparator interrupt.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator.
|
||||
//!
|
||||
//! This function disables generation of an interrupt from the specified
|
||||
//! comparator. Only comparators whose interrupts are enabled can be reflected
|
||||
//! to the processor.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntDisable(unsigned long ulBase, unsigned long ulComp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Disable the comparator interrupt.
|
||||
//
|
||||
HWREG(ulBase + COMP_O_ACINTEN) &= ~(1 << ulComp);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the current interrupt status.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator.
|
||||
//! \param bMasked is \b false if the raw interrupt status is required and
|
||||
//! \b true if the masked interrupt status is required.
|
||||
//!
|
||||
//! This returns the interrupt status for the comparator. Either the raw or
|
||||
//! the masked interrupt status can be returned.
|
||||
//!
|
||||
//! \return \b true if the interrupt is asserted and \b false if it is not
|
||||
//! asserted.
|
||||
//
|
||||
//*****************************************************************************
|
||||
tBoolean
|
||||
ComparatorIntStatus(unsigned long ulBase, unsigned long ulComp,
|
||||
tBoolean bMasked)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Return either the interrupt status or the raw interrupt status as
|
||||
// requested.
|
||||
//
|
||||
if(bMasked)
|
||||
{
|
||||
return(((HWREG(ulBase + COMP_O_ACMIS) >> ulComp) & 1) ? true : false);
|
||||
}
|
||||
else
|
||||
{
|
||||
return(((HWREG(ulBase + COMP_O_ACRIS) >> ulComp) & 1) ? true : false);
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Clears a comparator interrupt.
|
||||
//!
|
||||
//! \param ulBase is the base address of the comparator module.
|
||||
//! \param ulComp is the index of the comparator.
|
||||
//!
|
||||
//! The comparator interrupt is cleared, so that it no longer asserts. This
|
||||
//! must be done in the interrupt handler to keep it from being called again
|
||||
//! immediately upon exit. Note that for a level triggered interrupt, the
|
||||
//! interrupt cannot be cleared until it stops asserting.
|
||||
//!
|
||||
//! \note Since there is a write buffer in the Cortex-M3 processor, it may take
|
||||
//! several clock cycles before the interrupt source is actually cleared.
|
||||
//! Therefore, it is recommended that the interrupt source be cleared early in
|
||||
//! the interrupt handler (as opposed to the very last action) to avoid
|
||||
//! returning from the interrupt handler before the interrupt source is
|
||||
//! actually cleared. Failure to do so may result in the interrupt handler
|
||||
//! being immediately reentered (since NVIC still sees the interrupt source
|
||||
//! asserted).
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
ComparatorIntClear(unsigned long ulBase, unsigned long ulComp)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulBase == COMP_BASE);
|
||||
ASSERT(ulComp < 3);
|
||||
|
||||
//
|
||||
// Clear the interrupt.
|
||||
//
|
||||
HWREG(ulBase + COMP_O_ACMIS) = 1 << ulComp;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,130 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// comp.h - Prototypes for the analog comparator driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __COMP_H__
|
||||
#define __COMP_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ComparatorConfigure() as the ulConfig
|
||||
// parameter. For each group (i.e. COMP_TRIG_xxx, COMP_INT_xxx, etc.), one of
|
||||
// the values may be selected and combined together with values from the other
|
||||
// groups via a logical OR.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define COMP_TRIG_NONE 0x00000000 // No ADC trigger
|
||||
#define COMP_TRIG_HIGH 0x00000880 // Trigger when high
|
||||
#define COMP_TRIG_LOW 0x00000800 // Trigger when low
|
||||
#define COMP_TRIG_FALL 0x00000820 // Trigger on falling edge
|
||||
#define COMP_TRIG_RISE 0x00000840 // Trigger on rising edge
|
||||
#define COMP_TRIG_BOTH 0x00000860 // Trigger on both edges
|
||||
#define COMP_INT_HIGH 0x00000010 // Interrupt when high
|
||||
#define COMP_INT_LOW 0x00000000 // Interrupt when low
|
||||
#define COMP_INT_FALL 0x00000004 // Interrupt on falling edge
|
||||
#define COMP_INT_RISE 0x00000008 // Interrupt on rising edge
|
||||
#define COMP_INT_BOTH 0x0000000C // Interrupt on both edges
|
||||
#define COMP_ASRCP_PIN 0x00000000 // Dedicated Comp+ pin
|
||||
#define COMP_ASRCP_PIN0 0x00000200 // Comp0+ pin
|
||||
#define COMP_ASRCP_REF 0x00000400 // Internal voltage reference
|
||||
#ifndef DEPRECATED
|
||||
#define COMP_OUTPUT_NONE 0x00000000 // No comparator output
|
||||
#endif
|
||||
#define COMP_OUTPUT_NORMAL 0x00000000 // Comparator output normal
|
||||
#define COMP_OUTPUT_INVERT 0x00000002 // Comparator output inverted
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to ComparatorSetRef() as the ulRef parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define COMP_REF_OFF 0x00000000 // Turn off the internal reference
|
||||
#define COMP_REF_0V 0x00000300 // Internal reference of 0V
|
||||
#define COMP_REF_0_1375V 0x00000301 // Internal reference of 0.1375V
|
||||
#define COMP_REF_0_275V 0x00000302 // Internal reference of 0.275V
|
||||
#define COMP_REF_0_4125V 0x00000303 // Internal reference of 0.4125V
|
||||
#define COMP_REF_0_55V 0x00000304 // Internal reference of 0.55V
|
||||
#define COMP_REF_0_6875V 0x00000305 // Internal reference of 0.6875V
|
||||
#define COMP_REF_0_825V 0x00000306 // Internal reference of 0.825V
|
||||
#define COMP_REF_0_928125V 0x00000201 // Internal reference of 0.928125V
|
||||
#define COMP_REF_0_9625V 0x00000307 // Internal reference of 0.9625V
|
||||
#define COMP_REF_1_03125V 0x00000202 // Internal reference of 1.03125V
|
||||
#define COMP_REF_1_134375V 0x00000203 // Internal reference of 1.134375V
|
||||
#define COMP_REF_1_1V 0x00000308 // Internal reference of 1.1V
|
||||
#define COMP_REF_1_2375V 0x00000309 // Internal reference of 1.2375V
|
||||
#define COMP_REF_1_340625V 0x00000205 // Internal reference of 1.340625V
|
||||
#define COMP_REF_1_375V 0x0000030A // Internal reference of 1.375V
|
||||
#define COMP_REF_1_44375V 0x00000206 // Internal reference of 1.44375V
|
||||
#define COMP_REF_1_5125V 0x0000030B // Internal reference of 1.5125V
|
||||
#define COMP_REF_1_546875V 0x00000207 // Internal reference of 1.546875V
|
||||
#define COMP_REF_1_65V 0x0000030C // Internal reference of 1.65V
|
||||
#define COMP_REF_1_753125V 0x00000209 // Internal reference of 1.753125V
|
||||
#define COMP_REF_1_7875V 0x0000030D // Internal reference of 1.7875V
|
||||
#define COMP_REF_1_85625V 0x0000020A // Internal reference of 1.85625V
|
||||
#define COMP_REF_1_925V 0x0000030E // Internal reference of 1.925V
|
||||
#define COMP_REF_1_959375V 0x0000020B // Internal reference of 1.959375V
|
||||
#define COMP_REF_2_0625V 0x0000030F // Internal reference of 2.0625V
|
||||
#define COMP_REF_2_165625V 0x0000020D // Internal reference of 2.165625V
|
||||
#define COMP_REF_2_26875V 0x0000020E // Internal reference of 2.26875V
|
||||
#define COMP_REF_2_371875V 0x0000020F // Internal reference of 2.371875V
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void ComparatorConfigure(unsigned long ulBase, unsigned long ulComp,
|
||||
unsigned long ulConfig);
|
||||
extern void ComparatorRefSet(unsigned long ulBase, unsigned long ulRef);
|
||||
extern tBoolean ComparatorValueGet(unsigned long ulBase, unsigned long ulComp);
|
||||
extern void ComparatorIntRegister(unsigned long ulBase, unsigned long ulComp,
|
||||
void (*pfnHandler)(void));
|
||||
extern void ComparatorIntUnregister(unsigned long ulBase,
|
||||
unsigned long ulComp);
|
||||
extern void ComparatorIntEnable(unsigned long ulBase, unsigned long ulComp);
|
||||
extern void ComparatorIntDisable(unsigned long ulBase, unsigned long ulComp);
|
||||
extern tBoolean ComparatorIntStatus(unsigned long ulBase, unsigned long ulComp,
|
||||
tBoolean bMasked);
|
||||
extern void ComparatorIntClear(unsigned long ulBase, unsigned long ulComp);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __COMP_H__
|
||||
@@ -0,0 +1,443 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// cpu.c - Instruction wrappers for special CPU instructions needed by the
|
||||
// drivers.
|
||||
//
|
||||
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "driverlib/cpu.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the CPSID instruction. Returns the state of PRIMASK
|
||||
// on entry.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
unsigned long __attribute__((naked))
|
||||
CPUcpsid(void)
|
||||
{
|
||||
unsigned long ulRet;
|
||||
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ulRet));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ulRet);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
unsigned long
|
||||
CPUcpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm unsigned long
|
||||
CPUcpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
cpsid i;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
unsigned long
|
||||
CPUcpsid(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsid i\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function returning the state of PRIMASK (indicating whether
|
||||
// interrupts are enabled or disabled).
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
unsigned long __attribute__((naked))
|
||||
CPUprimask(void)
|
||||
{
|
||||
unsigned long ulRet;
|
||||
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ulRet));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ulRet);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
unsigned long
|
||||
CPUprimask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm unsigned long
|
||||
CPUprimask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
unsigned long
|
||||
CPUprimask(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and disable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the CPSIE instruction. Returns the state of PRIMASK
|
||||
// on entry.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
unsigned long __attribute__((naked))
|
||||
CPUcpsie(void)
|
||||
{
|
||||
unsigned long ulRet;
|
||||
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ulRet));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ulRet);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
unsigned long
|
||||
CPUcpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm unsigned long
|
||||
CPUcpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
mrs r0, PRIMASK;
|
||||
cpsie i;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
unsigned long
|
||||
CPUcpsie(void)
|
||||
{
|
||||
//
|
||||
// Read PRIMASK and enable interrupts.
|
||||
//
|
||||
__asm(" mrs r0, PRIMASK\n"
|
||||
" cpsie i\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for the WFI instruction.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
void __attribute__((naked))
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n"
|
||||
" bx lr\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
void
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm void
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
wfi;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
void
|
||||
CPUwfi(void)
|
||||
{
|
||||
//
|
||||
// Wait for the next interrupt.
|
||||
//
|
||||
__asm(" wfi\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for writing the BASEPRI register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
void __attribute__((naked))
|
||||
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||
{
|
||||
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n"
|
||||
" bx lr\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
void
|
||||
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n");
|
||||
}
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm void
|
||||
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
msr BASEPRI, r0;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
void
|
||||
CPUbasepriSet(unsigned long ulNewBasepri)
|
||||
{
|
||||
//
|
||||
// Set the BASEPRI register
|
||||
//
|
||||
__asm(" msr BASEPRI, r0\n"
|
||||
" bx lr\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Wrapper function for reading the BASEPRI register.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined(codered) || defined(gcc) || defined(sourcerygxx)
|
||||
unsigned long __attribute__((naked))
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
unsigned long ulRet;
|
||||
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n"
|
||||
" bx lr\n"
|
||||
: "=r" (ulRet));
|
||||
|
||||
//
|
||||
// The return is handled in the inline assembly, but the compiler will
|
||||
// still complain if there is not an explicit return here (despite the fact
|
||||
// that this does not result in any code being produced because of the
|
||||
// naked attribute).
|
||||
//
|
||||
return(ulRet);
|
||||
}
|
||||
#endif
|
||||
#if defined(ewarm)
|
||||
unsigned long
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n");
|
||||
|
||||
//
|
||||
// "Warning[Pe940]: missing return statement at end of non-void function"
|
||||
// is suppressed here to avoid putting a "bx lr" in the inline assembly
|
||||
// above and a superfluous return statement here.
|
||||
//
|
||||
#pragma diag_suppress=Pe940
|
||||
}
|
||||
#pragma diag_default=Pe940
|
||||
#endif
|
||||
#if defined(rvmdk) || defined(__ARMCC_VERSION)
|
||||
__asm unsigned long
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
mrs r0, BASEPRI;
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
#if defined(ccs)
|
||||
unsigned long
|
||||
CPUbasepriGet(void)
|
||||
{
|
||||
//
|
||||
// Read BASEPRI
|
||||
//
|
||||
__asm(" mrs r0, BASEPRI\n"
|
||||
" bx lr\n");
|
||||
|
||||
//
|
||||
// The following keeps the compiler happy, because it wants to see a
|
||||
// return value from this function. It will generate code to return
|
||||
// a zero. However, the real return is the "bx lr" above, so the
|
||||
// return(0) is never executed and the function returns with the value
|
||||
// you expect in R0.
|
||||
//
|
||||
return(0);
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,60 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// cpu.h - Prototypes for the CPU instruction wrapper functions.
|
||||
//
|
||||
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __CPU_H__
|
||||
#define __CPU_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern unsigned long CPUcpsid(void);
|
||||
extern unsigned long CPUcpsie(void);
|
||||
extern unsigned long CPUprimask(void);
|
||||
extern void CPUwfi(void);
|
||||
extern unsigned long CPUbasepriGet(void);
|
||||
extern void CPUbasepriSet(unsigned long ulNewBasepri);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __CPU_H__
|
||||
@@ -0,0 +1,71 @@
|
||||
<!--
|
||||
Configuration file for Code Red project libdriver
|
||||
|
||||
Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
Software License Agreement
|
||||
|
||||
Texas Instruments (TI) is supplying this software for use solely and
|
||||
exclusively on TI's microcontroller products. The software is owned by
|
||||
TI and/or its suppliers, and is protected under applicable copyright
|
||||
laws. You may not combine this software with "viral" open-source
|
||||
software in order to form a larger program.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
|
||||
This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
-->
|
||||
|
||||
<project chip="LM3S101"
|
||||
target="driver"
|
||||
type="Static library"
|
||||
vendor="LMI">
|
||||
<import src=".">
|
||||
<exclude>{(Makefile|ccs|codered|ewarm|gcc|rvmdk|sourcerygxx)}</exclude>
|
||||
<exclude>{.*\.(ewd|ewp|eww|icf|Opt|sct|sgxx|Uv2|uvopt|uvproj|xml|ld|cmd)}</exclude>
|
||||
</import>
|
||||
<requires>
|
||||
<value>inc</value>
|
||||
</requires>
|
||||
<setting id="assembler.def">
|
||||
<value>codered</value>
|
||||
</setting>
|
||||
<setting id="compiler.def"
|
||||
buildType="Debug"
|
||||
mode="replace">
|
||||
<value>DEBUG</value>
|
||||
</setting>
|
||||
<setting id="compiler.def"
|
||||
buildType="Release"
|
||||
mode="replace">
|
||||
<value>NDEBUG</value>
|
||||
</setting>
|
||||
<setting id="compiler.def">
|
||||
<value>__CODE_RED</value>
|
||||
<value>codered</value>
|
||||
<value>PART_LM3S101</value>
|
||||
</setting>
|
||||
<setting id="compiler.opt"
|
||||
buildType="Debug">
|
||||
<value>-Os</value>
|
||||
</setting>
|
||||
<setting id="compiler.opt"
|
||||
buildType="Release">
|
||||
<value>-Os</value>
|
||||
</setting>
|
||||
<setting id="compiler.flags"
|
||||
buildType="Debug">
|
||||
<value>-Os</value>
|
||||
</setting>
|
||||
<setting id="compiler.flags"
|
||||
buildType="Release">
|
||||
<value>-Os</value>
|
||||
</setting>
|
||||
<setting id="compiler.inc">
|
||||
<value>${workspace_loc:/}</value>
|
||||
</setting>
|
||||
</project>
|
||||
@@ -0,0 +1,53 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// debug.h - Macros for assisting debug of the driver library.
|
||||
//
|
||||
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __DEBUG_H__
|
||||
#define __DEBUG_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototype for the function that is called when an invalid argument is passed
|
||||
// to an API. This is only used when doing a DEBUG build.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void __error__(char *pcFilename, unsigned long ulLine);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The ASSERT macro, which does the actual assertion checking. Typically, this
|
||||
// will be for procedure arguments.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef DEBUG
|
||||
#define ASSERT(expr) { \
|
||||
if(!(expr)) \
|
||||
{ \
|
||||
__error__(__FILE__, __LINE__); \
|
||||
} \
|
||||
}
|
||||
#else
|
||||
#define ASSERT(expr)
|
||||
#endif
|
||||
|
||||
#endif // __DEBUG_H__
|
||||
@@ -0,0 +1,59 @@
|
||||
### uVision2 Project, (C) Keil Software
|
||||
### Do not modify !
|
||||
|
||||
cExt (*.c)
|
||||
aExt (*.s*; *.src; *.a*)
|
||||
oExt (*.obj)
|
||||
lExt (*.lib)
|
||||
tExt (*.txt; *.h; *.inc)
|
||||
pExt (*.plm)
|
||||
CppX (*.cpp)
|
||||
DaveTm { 0,0,0,0,0,0,0,0 }
|
||||
|
||||
Target (driverlib), 0x0004 // Tools: 'ARM-ADS'
|
||||
GRPOPT 1,(Source),1,0,0
|
||||
GRPOPT 2,(Documentation),1,0,0
|
||||
|
||||
OPTFFF 1,1,1,0,0,0,0,0,<.\adc.c><adc.c>
|
||||
OPTFFF 1,2,1,0,0,0,0,0,<.\can.c><can.c>
|
||||
OPTFFF 1,3,1,0,0,0,0,0,<.\comp.c><comp.c>
|
||||
OPTFFF 1,4,1,0,0,0,0,0,<.\cpu.c><cpu.c>
|
||||
OPTFFF 1,5,1,0,0,0,0,0,<.\epi.c><epi.c>
|
||||
OPTFFF 1,6,1,0,0,0,0,0,<.\ethernet.c><ethernet.c>
|
||||
OPTFFF 1,7,1,0,0,0,0,0,<.\flash.c><flash.c>
|
||||
OPTFFF 1,8,1,0,0,0,0,0,<.\gpio.c><gpio.c>
|
||||
OPTFFF 1,9,1,0,0,0,0,0,<.\hibernate.c><hibernate.c>
|
||||
OPTFFF 1,10,1,0,0,0,0,0,<.\i2c.c><i2c.c>
|
||||
OPTFFF 1,11,1,0,0,0,0,0,<.\i2s.c><i2s.c>
|
||||
OPTFFF 1,12,1,0,0,0,0,0,<.\interrupt.c><interrupt.c>
|
||||
OPTFFF 1,13,1,0,0,0,0,0,<.\mpu.c><mpu.c>
|
||||
OPTFFF 1,14,1,0,0,0,0,0,<.\pwm.c><pwm.c>
|
||||
OPTFFF 1,15,1,0,0,0,0,0,<.\qei.c><qei.c>
|
||||
OPTFFF 1,16,1,0,0,0,0,0,<.\ssi.c><ssi.c>
|
||||
OPTFFF 1,17,1,0,0,0,0,0,<.\sysctl.c><sysctl.c>
|
||||
OPTFFF 1,18,1,0,0,0,0,0,<.\systick.c><systick.c>
|
||||
OPTFFF 1,19,1,0,0,0,0,0,<.\timer.c><timer.c>
|
||||
OPTFFF 1,20,1,0,0,0,0,0,<.\uart.c><uart.c>
|
||||
OPTFFF 1,21,1,0,0,0,0,0,<.\udma.c><udma.c>
|
||||
OPTFFF 1,22,1,0,0,0,0,0,<.\usb.c><usb.c>
|
||||
OPTFFF 1,23,1,0,0,0,0,0,<.\watchdog.c><watchdog.c>
|
||||
OPTFFF 2,24,5,2,0,1,1,0,<.\readme.txt><readme.txt> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0,217,2,0,0,44,1,0,0 }
|
||||
|
||||
ExtF <.\readme.txt> 1,1,0,{ 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,0,0,0,0,0,0,0,217,2,0,0,44,1,0,0 }
|
||||
|
||||
TARGOPT 1, (driverlib)
|
||||
ADSCLK=20000000
|
||||
OPTTT 1,1,1,0
|
||||
OPTHX 1,65535,0,0,0
|
||||
OPTLX 79,66,8,<.\rvmdk\>
|
||||
OPTOX 16
|
||||
OPTLT 1,1,1,0,1,1,0,1,0,0,0,0
|
||||
OPTXL 1,1,1,1,1,1,1,0,0
|
||||
OPTFL 1,0,1
|
||||
OPTBL 0,(Data Sheet)<DATASHTS\Luminary\LM3S101.PDF>
|
||||
OPTDL (SARMCM3.DLL)()(DLM.DLL)(-pLM3S101)(SARMCM3.DLL)()(TLM.DLL)(-pLM3S101)
|
||||
OPTDBG 48125,1,()()()()()()()()()() (BIN\UL2CM3.DLL)()()()
|
||||
OPTDF 0x40000002
|
||||
OPTLE <>
|
||||
OPTLC <>
|
||||
EndOpt
|
||||
@@ -0,0 +1,122 @@
|
||||
### uVision2 Project, (C) Keil Software
|
||||
### Do not modify !
|
||||
|
||||
Target (driverlib), 0x0004 // Tools: 'ARM-ADS'
|
||||
|
||||
Group (Source)
|
||||
Group (Documentation)
|
||||
|
||||
File 1,1,<.\adc.c><adc.c> 0x0
|
||||
File 1,1,<.\can.c><can.c> 0x0
|
||||
File 1,1,<.\comp.c><comp.c> 0x0
|
||||
File 1,1,<.\cpu.c><cpu.c> 0x0
|
||||
File 1,1,<.\epi.c><epi.c> 0x0
|
||||
File 1,1,<.\ethernet.c><ethernet.c> 0x0
|
||||
File 1,1,<.\flash.c><flash.c> 0x0
|
||||
File 1,1,<.\gpio.c><gpio.c> 0x0
|
||||
File 1,1,<.\hibernate.c><hibernate.c> 0x0
|
||||
File 1,1,<.\i2c.c><i2c.c> 0x0
|
||||
File 1,1,<.\i2s.c><i2s.c> 0x0
|
||||
File 1,1,<.\interrupt.c><interrupt.c> 0x0
|
||||
File 1,1,<.\mpu.c><mpu.c> 0x0
|
||||
File 1,1,<.\pwm.c><pwm.c> 0x0
|
||||
File 1,1,<.\qei.c><qei.c> 0x0
|
||||
File 1,1,<.\ssi.c><ssi.c> 0x0
|
||||
File 1,1,<.\sysctl.c><sysctl.c> 0x0
|
||||
File 1,1,<.\systick.c><systick.c> 0x0
|
||||
File 1,1,<.\timer.c><timer.c> 0x0
|
||||
File 1,1,<.\uart.c><uart.c> 0x0
|
||||
File 1,1,<.\udma.c><udma.c> 0x0
|
||||
File 1,1,<.\usb.c><usb.c> 0x0
|
||||
File 1,1,<.\watchdog.c><watchdog.c> 0x0
|
||||
File 2,5,<.\readme.txt><readme.txt> 0x0
|
||||
|
||||
|
||||
Options 1,0,0 // Target 'driverlib'
|
||||
Device (LM3S101)
|
||||
Vendor (Luminary Micro)
|
||||
Cpu (IRAM(0x20000000-0x200007FF) IROM(0-0x1FFF) CLOCK(20000000) CPUTYPE("Cortex-M3"))
|
||||
FlashUt ()
|
||||
StupF ("STARTUP\Luminary\Startup.s" ("Luminary Startup Code"))
|
||||
FlashDR (UL2CM3(-UU0101L5E -O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0LM3S_8 -FS00 -FL02000))
|
||||
DevID (4079)
|
||||
Rgf (LM3Sxxx.H)
|
||||
Mem ()
|
||||
C ()
|
||||
A ()
|
||||
RL ()
|
||||
OH ()
|
||||
DBC_IFX ()
|
||||
DBC_CMS ()
|
||||
DBC_AMS ()
|
||||
DBC_LMS ()
|
||||
UseEnv=0
|
||||
EnvBin ()
|
||||
EnvInc ()
|
||||
EnvLib ()
|
||||
EnvReg (ÿLuminary\)
|
||||
OrgReg (ÿLuminary\)
|
||||
TgStat=0
|
||||
OutDir (.\rvmdk\)
|
||||
OutName (driverlib)
|
||||
GenApp=0
|
||||
GenLib=1
|
||||
GenHex=0
|
||||
Debug=1
|
||||
Browse=1
|
||||
LstDir (.\rvmdk\)
|
||||
HexSel=1
|
||||
MG32K=0
|
||||
TGMORE=0
|
||||
RunUsr 0 0 <>
|
||||
RunUsr 1 0 <>
|
||||
BrunUsr 0 0 <>
|
||||
BrunUsr 1 0 <>
|
||||
CrunUsr 0 0 <>
|
||||
CrunUsr 1 0 <>
|
||||
SVCSID <>
|
||||
GLFLAGS=1790
|
||||
ADSFLGA { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ACPUTYP (Cortex-M3)
|
||||
ADSTFLGA { 0,12,0,18,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
OCMADSIRAM { 0,0,0,0,32,0,128,0,0 }
|
||||
OCMADSIROM { 1,0,0,0,0,0,120,1,0 }
|
||||
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
|
||||
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,8,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
RV_STAVEC ()
|
||||
ADSCCFLG { 12,34,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ADSCMISC ()
|
||||
ADSCDEFN (rvmdk)
|
||||
ADSCUDEF ()
|
||||
ADSCINCD (..;)
|
||||
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ADSAMISC ()
|
||||
ADSADEFN ()
|
||||
ADSAUDEF ()
|
||||
ADSAINCD ()
|
||||
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
IncBld=1
|
||||
AlwaysBuild=0
|
||||
GenAsm=0
|
||||
AsmAsm=0
|
||||
PublicsOnly=0
|
||||
StopCode=3
|
||||
CustArgs ()
|
||||
LibMods ()
|
||||
ADSLDFG { 16,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ADSLDTA (0x00000000)
|
||||
ADSLDDA (0x20000000)
|
||||
ADSLDSC ()
|
||||
ADSLDIB ()
|
||||
ADSLDIC ()
|
||||
ADSLDMC ()
|
||||
ADSLDIF ()
|
||||
ADSLDDW ()
|
||||
OPTDL (SARMCM3.DLL)()(DLM.DLL)(-pLM3S101)(SARMCM3.DLL)()(TLM.DLL)(-pLM3S101)
|
||||
OPTDBG 48125,1,()()()()()()()()()() (BIN\UL2CM3.DLL)()()()
|
||||
FLASH1 { 1,0,0,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
FLASH2 (BIN\UL2CM3.DLL)
|
||||
FLASH3 ("" ())
|
||||
FLASH4 ()
|
||||
EndOpt
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,270 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// epi.h - Prototypes and macros for the EPI module.
|
||||
//
|
||||
// Copyright (c) 2008-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __EPI_H__
|
||||
#define __EPI_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIModeSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_MODE_GENERAL 0x00000010
|
||||
#define EPI_MODE_SDRAM 0x00000011
|
||||
#define EPI_MODE_HB8 0x00000012
|
||||
#define EPI_MODE_DISABLE 0x00000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIConfigSDRAMSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_SDRAM_CORE_FREQ_0_15 0x00000000
|
||||
#define EPI_SDRAM_CORE_FREQ_15_30 0x40000000
|
||||
#define EPI_SDRAM_CORE_FREQ_30_50 0x80000000
|
||||
#define EPI_SDRAM_CORE_FREQ_50_100 0xC0000000
|
||||
#define EPI_SDRAM_LOW_POWER 0x00000200
|
||||
#define EPI_SDRAM_FULL_POWER 0x00000000
|
||||
#define EPI_SDRAM_SIZE_64MBIT 0x00000000
|
||||
#define EPI_SDRAM_SIZE_128MBIT 0x00000001
|
||||
#define EPI_SDRAM_SIZE_256MBIT 0x00000002
|
||||
#define EPI_SDRAM_SIZE_512MBIT 0x00000003
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIConfigGPModeSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_GPMODE_CLKPIN 0x80000000
|
||||
#define EPI_GPMODE_CLKGATE 0x40000000
|
||||
#define EPI_GPMODE_RDYEN 0x10000000
|
||||
#define EPI_GPMODE_FRAMEPIN 0x08000000
|
||||
#define EPI_GPMODE_FRAME50 0x04000000
|
||||
#define EPI_GPMODE_READWRITE 0x00200000
|
||||
#define EPI_GPMODE_WRITE2CYCLE 0x00080000
|
||||
#define EPI_GPMODE_READ2CYCLE 0x00040000
|
||||
#define EPI_GPMODE_ASIZE_NONE 0x00000000
|
||||
#define EPI_GPMODE_ASIZE_4 0x00000010
|
||||
#define EPI_GPMODE_ASIZE_12 0x00000020
|
||||
#define EPI_GPMODE_ASIZE_20 0x00000030
|
||||
#define EPI_GPMODE_DSIZE_8 0x00000000
|
||||
#define EPI_GPMODE_DSIZE_16 0x00000001
|
||||
#define EPI_GPMODE_DSIZE_24 0x00000002
|
||||
#define EPI_GPMODE_DSIZE_32 0x00000003
|
||||
#define EPI_GPMODE_WORD_ACCESS 0x00000100
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIConfigHB8ModeSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_HB8_USE_TXEMPTY 0x00800000
|
||||
#define EPI_HB8_USE_RXFULL 0x00400000
|
||||
#define EPI_HB8_WRHIGH 0x00200000
|
||||
#define EPI_HB8_RDHIGH 0x00100000
|
||||
#define EPI_HB8_WRWAIT_0 0x00000000
|
||||
#define EPI_HB8_WRWAIT_1 0x00000040
|
||||
#define EPI_HB8_WRWAIT_2 0x00000080
|
||||
#define EPI_HB8_WRWAIT_3 0x000000C0
|
||||
#define EPI_HB8_RDWAIT_0 0x00000000
|
||||
#define EPI_HB8_RDWAIT_1 0x00000010
|
||||
#define EPI_HB8_RDWAIT_2 0x00000020
|
||||
#define EPI_HB8_RDWAIT_3 0x00000030
|
||||
#define EPI_HB8_MODE_ADMUX 0x00000000
|
||||
#define EPI_HB8_MODE_ADDEMUX 0x00000001
|
||||
#define EPI_HB8_MODE_SRAM 0x00000002
|
||||
#define EPI_HB8_MODE_FIFO 0x00000003
|
||||
#define EPI_HB8_WORD_ACCESS 0x00000100
|
||||
#define EPI_HB8_CSCFG_ALE 0x00000000
|
||||
#define EPI_HB8_CSCFG_CS 0x00000200
|
||||
#define EPI_HB8_CSCFG_DUAL_CS 0x00000400
|
||||
#define EPI_HB8_CSCFG_ALE_DUAL_CS 0x00000600
|
||||
#define EPI_HB8_CSBAUD_DUAL 0x00000800
|
||||
|
||||
#define EPI_HB8_CSCFG_MASK 0x00000600
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIConfigSDRAMSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_ADDR_PER_SIZE_256B 0x00000000
|
||||
#define EPI_ADDR_PER_SIZE_64KB 0x00000040
|
||||
#define EPI_ADDR_PER_SIZE_16MB 0x00000080
|
||||
#define EPI_ADDR_PER_SIZE_256MB 0x000000C0
|
||||
#define EPI_ADDR_PER_BASE_NONE 0x00000000
|
||||
#define EPI_ADDR_PER_BASE_A 0x00000010
|
||||
#define EPI_ADDR_PER_BASE_C 0x00000020
|
||||
#define EPI_ADDR_RAM_SIZE_256B 0x00000000
|
||||
#define EPI_ADDR_RAM_SIZE_64KB 0x00000004
|
||||
#define EPI_ADDR_RAM_SIZE_16MB 0x00000008
|
||||
#define EPI_ADDR_RAM_SIZE_256MB 0x0000000C
|
||||
#define EPI_ADDR_RAM_BASE_NONE 0x00000000
|
||||
#define EPI_ADDR_RAM_BASE_6 0x00000001
|
||||
#define EPI_ADDR_RAM_BASE_8 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPINonBlockingReadConfigure()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_NBCONFIG_SIZE_8 1
|
||||
#define EPI_NBCONFIG_SIZE_16 2
|
||||
#define EPI_NBCONFIG_SIZE_32 3
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIFIFOConfig()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_FIFO_CONFIG_WTFULLERR 0x00020000
|
||||
#define EPI_FIFO_CONFIG_RSTALLERR 0x00010000
|
||||
#define EPI_FIFO_CONFIG_TX_EMPTY 0x00000000
|
||||
#define EPI_FIFO_CONFIG_TX_1_4 0x00000020
|
||||
#define EPI_FIFO_CONFIG_TX_1_2 0x00000030
|
||||
#define EPI_FIFO_CONFIG_TX_3_4 0x00000040
|
||||
#define EPI_FIFO_CONFIG_RX_1_8 0x00000001
|
||||
#define EPI_FIFO_CONFIG_RX_1_4 0x00000002
|
||||
#define EPI_FIFO_CONFIG_RX_1_2 0x00000003
|
||||
#define EPI_FIFO_CONFIG_RX_3_4 0x00000004
|
||||
#define EPI_FIFO_CONFIG_RX_7_8 0x00000005
|
||||
#define EPI_FIFO_CONFIG_RX_FULL 0x00000006
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIIntEnable(), EPIIntDisable(), or returned
|
||||
// as flags from EPIIntStatus()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_INT_TXREQ 0x00000004
|
||||
#define EPI_INT_RXREQ 0x00000002
|
||||
#define EPI_INT_ERR 0x00000001
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EPIIntErrorClear(), or returned as flags from
|
||||
// EPIIntErrorStatus()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define EPI_INT_ERR_WTFULL 0x00000004
|
||||
#define EPI_INT_ERR_RSTALL 0x00000002
|
||||
#define EPI_INT_ERR_TIMEOUT 0x00000001
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void EPIModeSet(unsigned long ulBase, unsigned long ulMode);
|
||||
extern void EPIDividerSet(unsigned long ulBase, unsigned long ulDivider);
|
||||
extern void EPIConfigSDRAMSet(unsigned long ulBase, unsigned long ulConfig,
|
||||
unsigned long ulRefresh);
|
||||
extern void EPIConfigGPModeSet(unsigned long ulBase, unsigned long ulConfig,
|
||||
unsigned long ulFrameCount,
|
||||
unsigned long ulMaxWait);
|
||||
extern void EPIConfigHB8Set(unsigned long ulBase, unsigned long ulConfig,
|
||||
unsigned long ulMaxWait);
|
||||
extern void EPIAddressMapSet(unsigned long ulBase, unsigned long ulMap);
|
||||
extern void EPINonBlockingReadConfigure(unsigned long ulBase,
|
||||
unsigned long ulChannel,
|
||||
unsigned long ulDataSize,
|
||||
unsigned long ulAddress);
|
||||
extern void EPINonBlockingReadStart(unsigned long ulBase,
|
||||
unsigned long ulChannel,
|
||||
unsigned long ulCount);
|
||||
extern void EPINonBlockingReadStop(unsigned long ulBase,
|
||||
unsigned long ulChannel);
|
||||
extern unsigned long EPINonBlockingReadCount(unsigned long ulBase,
|
||||
unsigned long ulChannel);
|
||||
extern unsigned long EPINonBlockingReadAvail(unsigned long ulBase);
|
||||
extern unsigned long EPINonBlockingReadGet32(unsigned long ulBase,
|
||||
unsigned long ulCount,
|
||||
unsigned long *pulBuf);
|
||||
extern unsigned long EPINonBlockingReadGet16(unsigned long ulBase,
|
||||
unsigned long ulCount,
|
||||
unsigned short *pusBuf);
|
||||
extern unsigned long EPINonBlockingReadGet8(unsigned long ulBase,
|
||||
unsigned long ulCount,
|
||||
unsigned char *pucBuf);
|
||||
extern void EPIFIFOConfig(unsigned long ulBase, unsigned long ulConfig);
|
||||
extern unsigned long EPIWriteFIFOCountGet(unsigned long ulBase);
|
||||
extern void EPIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void EPIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern unsigned long EPIIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern unsigned long EPIIntErrorStatus(unsigned long ulBase);
|
||||
extern void EPIIntErrorClear(unsigned long ulBase, unsigned long ulErrFlags);
|
||||
extern void EPIIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
|
||||
extern void EPIIntUnregister(unsigned long ulBase);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Several EPI APIs and labels have been renamed, with the original definition
|
||||
// name being deprecated. These defines provide backward compatibility.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#define EPI_MODE_NONE EPI_MODE_GENERAL
|
||||
#define EPI_NONMODE_CLKPIN EPI_GPMODE_CLKPIN
|
||||
#define EPI_NONMODE_CLKSTOP EPI_GPMODE_CLKGATE
|
||||
#define EPI_NONMODE_CLKENA EPI_GPMODE_RDYEN
|
||||
#define EPI_NONMODE_FRAMEPIN EPI_GPMODE_FRAMEPIN
|
||||
#define EPI_NONMODE_FRAME50 EPI_GPMODE_FRAME50
|
||||
#define EPI_NONMODE_READWRITE EPI_GPMODE_READWRITE
|
||||
#define EPI_NONMODE_WRITE2CYCLE EPI_GPMODE_WRITE2CYCLE
|
||||
#define EPI_NONMODE_READ2CYCLE EPI_GPMODE_READ2CYCLE
|
||||
#define EPI_NONMODE_ASIZE_NONE EPI_GPMODE_ASIZE_NONE
|
||||
#define EPI_NONMODE_ASIZE_4 EPI_GPMODE_ASIZE_4
|
||||
#define EPI_NONMODE_ASIZE_12 EPI_GPMODE_ASIZE_12
|
||||
#define EPI_NONMODE_ASIZE_20 EPI_GPMODE_ASIZE_20
|
||||
#define EPI_NONMODE_DSIZE_8 EPI_GPMODE_DSIZE_8
|
||||
#define EPI_NONMODE_DSIZE_16 EPI_GPMODE_DSIZE_16
|
||||
#define EPI_NONMODE_DSIZE_24 EPI_GPMODE_DSIZE_24
|
||||
#define EPI_NONMODE_DSIZE_32 EPI_GPMODE_DSIZE_32
|
||||
#define EPI_NONMODE_WORD_ACCESS EPI_GPMODE_WORD_ACCESS
|
||||
|
||||
#define EPINonBlockingWriteCount(a) EPIWriteFIFOCountGet(a)
|
||||
#define EPIConfigNoModeSet(a, b, c, d) EPIConfigGPModeSet((a), (b), (c), (d))
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __EPI_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,169 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// ethernet.h - Defines and Macros for the ethernet module.
|
||||
//
|
||||
// Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __ETHERNET_H__
|
||||
#define __ETHERNET_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EthernetConfigSet as the ulConfig value, and
|
||||
// returned from EthernetConfigGet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ETH_CFG_TS_TSEN 0x010000 // Enable Timestamp (CCP)
|
||||
#define ETH_CFG_RX_BADCRCDIS 0x000800 // Disable RX BAD CRC Packets
|
||||
#define ETH_CFG_RX_PRMSEN 0x000400 // Enable RX Promiscuous
|
||||
#define ETH_CFG_RX_AMULEN 0x000200 // Enable RX Multicast
|
||||
#define ETH_CFG_TX_DPLXEN 0x000010 // Enable TX Duplex Mode
|
||||
#define ETH_CFG_TX_CRCEN 0x000004 // Enable TX CRC Generation
|
||||
#define ETH_CFG_TX_PADEN 0x000002 // Enable TX Padding
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to EthernetIntEnable, EthernetIntDisable, and
|
||||
// EthernetIntClear as the ulIntFlags parameter, and returned from
|
||||
// EthernetIntStatus.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define ETH_INT_PHY 0x040 // PHY Event/Interrupt
|
||||
#define ETH_INT_MDIO 0x020 // Management Transaction
|
||||
#define ETH_INT_RXER 0x010 // RX Error
|
||||
#define ETH_INT_RXOF 0x008 // RX FIFO Overrun
|
||||
#define ETH_INT_TX 0x004 // TX Complete
|
||||
#define ETH_INT_TXER 0x002 // TX Error
|
||||
#define ETH_INT_RX 0x001 // RX Complete
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Helper Macros for Ethernet Processing
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// htonl/ntohl - big endian/little endian byte swapping macros for
|
||||
// 32-bit (long) values
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef htonl
|
||||
#define htonl(a) \
|
||||
((((a) >> 24) & 0x000000ff) | \
|
||||
(((a) >> 8) & 0x0000ff00) | \
|
||||
(((a) << 8) & 0x00ff0000) | \
|
||||
(((a) << 24) & 0xff000000))
|
||||
#endif
|
||||
|
||||
#ifndef ntohl
|
||||
#define ntohl(a) htonl((a))
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// htons/ntohs - big endian/little endian byte swapping macros for
|
||||
// 16-bit (short) values
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef htons
|
||||
#define htons(a) \
|
||||
((((a) >> 8) & 0x00ff) | \
|
||||
(((a) << 8) & 0xff00))
|
||||
#endif
|
||||
|
||||
#ifndef ntohs
|
||||
#define ntohs(a) htons((a))
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void EthernetInitExpClk(unsigned long ulBase, unsigned long ulEthClk);
|
||||
extern void EthernetConfigSet(unsigned long ulBase, unsigned long ulConfig);
|
||||
extern unsigned long EthernetConfigGet(unsigned long ulBase);
|
||||
extern void EthernetMACAddrSet(unsigned long ulBase,
|
||||
unsigned char *pucMACAddr);
|
||||
extern void EthernetMACAddrGet(unsigned long ulBase,
|
||||
unsigned char *pucMACAddr);
|
||||
extern void EthernetEnable(unsigned long ulBase);
|
||||
extern void EthernetDisable(unsigned long ulBase);
|
||||
extern tBoolean EthernetPacketAvail(unsigned long ulBase);
|
||||
extern tBoolean EthernetSpaceAvail(unsigned long ulBase);
|
||||
extern long EthernetPacketGetNonBlocking(unsigned long ulBase,
|
||||
unsigned char *pucBuf,
|
||||
long lBufLen);
|
||||
extern long EthernetPacketGet(unsigned long ulBase, unsigned char *pucBuf,
|
||||
long lBufLen);
|
||||
extern long EthernetPacketPutNonBlocking(unsigned long ulBase,
|
||||
unsigned char *pucBuf,
|
||||
long lBufLen);
|
||||
extern long EthernetPacketPut(unsigned long ulBase, unsigned char *pucBuf,
|
||||
long lBufLen);
|
||||
extern void EthernetIntRegister(unsigned long ulBase,
|
||||
void (*pfnHandler)(void));
|
||||
extern void EthernetIntUnregister(unsigned long ulBase);
|
||||
extern void EthernetIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void EthernetIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern unsigned long EthernetIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void EthernetIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void EthernetPHYWrite(unsigned long ulBase, unsigned char ucRegAddr,
|
||||
unsigned long ulData);
|
||||
extern unsigned long EthernetPHYRead(unsigned long ulBase,
|
||||
unsigned char ucRegAddr);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Several Ethernet APIs have been renamed, with the original function name
|
||||
// being deprecated. These defines provide backward compatibility.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#include "driverlib/sysctl.h"
|
||||
#define EthernetInit(a) \
|
||||
EthernetInitExpClk(a, SysCtlClockGet())
|
||||
#define EthernetPacketNonBlockingGet(a, b, c) \
|
||||
EthernetPacketGetNonBlocking(a, b, c)
|
||||
#define EthernetPacketNonBlockingPut(a, b, c) \
|
||||
EthernetPacketPutNonBlocking(a, b, c)
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __ETHERNET_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,106 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// flash.h - Prototypes for the flash driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __FLASH_H__
|
||||
#define __FLASH_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to FlashProtectSet(), and returned by
|
||||
// FlashProtectGet().
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef enum
|
||||
{
|
||||
FlashReadWrite, // Flash can be read and written
|
||||
FlashReadOnly, // Flash can only be read
|
||||
FlashExecuteOnly // Flash can only be executed
|
||||
}
|
||||
tFlashProtection;
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values passed to FlashIntEnable(), FlashIntDisable() and FlashIntClear() and
|
||||
// returned from FlashIntStatus().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define FLASH_INT_PROGRAM 0x00000002 // Programming Interrupt Mask
|
||||
#define FLASH_INT_ACCESS 0x00000001 // Access Interrupt Mask
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern unsigned long FlashUsecGet(void);
|
||||
extern void FlashUsecSet(unsigned long ulClocks);
|
||||
extern long FlashErase(unsigned long ulAddress);
|
||||
extern long FlashProgram(unsigned long *pulData, unsigned long ulAddress,
|
||||
unsigned long ulCount);
|
||||
extern tFlashProtection FlashProtectGet(unsigned long ulAddress);
|
||||
extern long FlashProtectSet(unsigned long ulAddress,
|
||||
tFlashProtection eProtect);
|
||||
extern long FlashProtectSave(void);
|
||||
extern long FlashUserGet(unsigned long *pulUser0, unsigned long *pulUser1);
|
||||
extern long FlashUserSet(unsigned long ulUser0, unsigned long ulUser1);
|
||||
extern long FlashUserSave(void);
|
||||
extern void FlashIntRegister(void (*pfnHandler)(void));
|
||||
extern void FlashIntUnregister(void);
|
||||
extern void FlashIntEnable(unsigned long ulIntFlags);
|
||||
extern void FlashIntDisable(unsigned long ulIntFlags);
|
||||
extern unsigned long FlashIntStatus(tBoolean bMasked);
|
||||
extern void FlashIntClear(unsigned long ulIntFlags);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Deprecated function names. These definitions ensure backwards compatibility
|
||||
// but new code should avoid using deprecated function names since these will
|
||||
// be removed at some point in the future.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#define FlashIntGetStatus FlashIntStatus
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __FLASH_H__
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,127 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// hibernate.h - API definition for the Hibernation module.
|
||||
//
|
||||
// Copyright (c) 2007-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __HIBERNATE_H__
|
||||
#define __HIBERNATE_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros needed for selecting the clock source for HibernateClockSelect()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_CLOCK_SEL_RAW 0x04
|
||||
#define HIBERNATE_CLOCK_SEL_DIV128 0x00
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros need to configure wake events for HibernateWakeSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_WAKE_PIN 0x10
|
||||
#define HIBERNATE_WAKE_RTC 0x08
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros needed to configure low battery detect for HibernateLowBatSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_LOW_BAT_DETECT 0x20
|
||||
#define HIBERNATE_LOW_BAT_ABORT 0xA0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros defining interrupt source bits for the interrupt functions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HIBERNATE_INT_PIN_WAKE 0x08
|
||||
#define HIBERNATE_INT_LOW_BAT 0x04
|
||||
#define HIBERNATE_INT_RTC_MATCH_0 0x01
|
||||
#define HIBERNATE_INT_RTC_MATCH_1 0x02
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void HibernateEnableExpClk(unsigned long ulHibClk);
|
||||
extern void HibernateDisable(void);
|
||||
extern void HibernateClockSelect(unsigned long ulClockInput);
|
||||
extern void HibernateRTCEnable(void);
|
||||
extern void HibernateRTCDisable(void);
|
||||
extern void HibernateWakeSet(unsigned long ulWakeFlags);
|
||||
extern unsigned long HibernateWakeGet(void);
|
||||
extern void HibernateLowBatSet(unsigned long ulLowBatFlags);
|
||||
extern unsigned long HibernateLowBatGet(void);
|
||||
extern void HibernateRTCSet(unsigned long ulRTCValue);
|
||||
extern unsigned long HibernateRTCGet(void);
|
||||
extern void HibernateRTCMatch0Set(unsigned long ulMatch);
|
||||
extern unsigned long HibernateRTCMatch0Get(void);
|
||||
extern void HibernateRTCMatch1Set(unsigned long ulMatch);
|
||||
extern unsigned long HibernateRTCMatch1Get(void);
|
||||
extern void HibernateRTCTrimSet(unsigned long ulTrim);
|
||||
extern unsigned long HibernateRTCTrimGet(void);
|
||||
extern void HibernateDataSet(unsigned long *pulData, unsigned long ulCount);
|
||||
extern void HibernateDataGet(unsigned long *pulData, unsigned long ulCount);
|
||||
extern void HibernateRequest(void);
|
||||
extern void HibernateIntEnable(unsigned long ulIntFlags);
|
||||
extern void HibernateIntDisable(unsigned long ulIntFlags);
|
||||
extern void HibernateIntRegister(void (*pfnHandler)(void));
|
||||
extern void HibernateIntUnregister(void);
|
||||
extern unsigned long HibernateIntStatus(tBoolean bMasked);
|
||||
extern void HibernateIntClear(unsigned long ulIntFlags);
|
||||
extern unsigned int HibernateIsActive(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Several Hibernate module APIs have been renamed, with the original function
|
||||
// name being deprecated. These defines provide backward compatibility.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#include "driverlib/sysctl.h"
|
||||
#define HibernateEnable(a) \
|
||||
HibernateEnableExpClk(a, SysCtlClockGet())
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __HIBERNATE_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,177 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// i2c.h - Prototypes for the I2C Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __I2C_H__
|
||||
#define __I2C_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines for the API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Interrupt defines.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_INT_MASTER 0x00000001
|
||||
#define I2C_INT_SLAVE 0x00000002
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Master commands.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_CMD_SINGLE_SEND \
|
||||
0x00000007
|
||||
#define I2C_MASTER_CMD_SINGLE_RECEIVE \
|
||||
0x00000007
|
||||
#define I2C_MASTER_CMD_BURST_SEND_START \
|
||||
0x00000003
|
||||
#define I2C_MASTER_CMD_BURST_SEND_CONT \
|
||||
0x00000001
|
||||
#define I2C_MASTER_CMD_BURST_SEND_FINISH \
|
||||
0x00000005
|
||||
#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP \
|
||||
0x00000004
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_START \
|
||||
0x0000000b
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_CONT \
|
||||
0x00000009
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH \
|
||||
0x00000005
|
||||
#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP \
|
||||
0x00000004
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Master error status.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_ERR_NONE 0
|
||||
#define I2C_MASTER_ERR_ADDR_ACK 0x00000004
|
||||
#define I2C_MASTER_ERR_DATA_ACK 0x00000008
|
||||
#define I2C_MASTER_ERR_ARB_LOST 0x00000010
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Slave action requests
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_SLAVE_ACT_NONE 0
|
||||
#define I2C_SLAVE_ACT_RREQ 0x00000001 // Master has sent data
|
||||
#define I2C_SLAVE_ACT_TREQ 0x00000002 // Master has requested data
|
||||
#define I2C_SLAVE_ACT_RREQ_FBR 0x00000005 // Master has sent first byte
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Miscellaneous I2C driver definitions.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_MASTER_MAX_RETRIES 1000 // Number of retries
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// I2C Slave interrupts.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2C_SLAVE_INT_STOP 0x00000004 // Stop Condition Interrupt.
|
||||
#define I2C_SLAVE_INT_START 0x00000002 // Start Condition Interrupt.
|
||||
#define I2C_SLAVE_INT_DATA 0x00000001 // Data Interrupt.
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void I2CIntRegister(unsigned long ulBase, void(fnHandler)(void));
|
||||
extern void I2CIntUnregister(unsigned long ulBase);
|
||||
extern tBoolean I2CMasterBusBusy(unsigned long ulBase);
|
||||
extern tBoolean I2CMasterBusy(unsigned long ulBase);
|
||||
extern void I2CMasterControl(unsigned long ulBase, unsigned long ulCmd);
|
||||
extern unsigned long I2CMasterDataGet(unsigned long ulBase);
|
||||
extern void I2CMasterDataPut(unsigned long ulBase, unsigned char ucData);
|
||||
extern void I2CMasterDisable(unsigned long ulBase);
|
||||
extern void I2CMasterEnable(unsigned long ulBase);
|
||||
extern unsigned long I2CMasterErr(unsigned long ulBase);
|
||||
extern void I2CMasterInitExpClk(unsigned long ulBase, unsigned long ulI2CClk,
|
||||
tBoolean bFast);
|
||||
extern void I2CMasterIntClear(unsigned long ulBase);
|
||||
extern void I2CMasterIntDisable(unsigned long ulBase);
|
||||
extern void I2CMasterIntEnable(unsigned long ulBase);
|
||||
extern tBoolean I2CMasterIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void I2CMasterSlaveAddrSet(unsigned long ulBase,
|
||||
unsigned char ucSlaveAddr,
|
||||
tBoolean bReceive);
|
||||
extern unsigned long I2CSlaveDataGet(unsigned long ulBase);
|
||||
extern void I2CSlaveDataPut(unsigned long ulBase, unsigned char ucData);
|
||||
extern void I2CSlaveDisable(unsigned long ulBase);
|
||||
extern void I2CSlaveEnable(unsigned long ulBase);
|
||||
extern void I2CSlaveInit(unsigned long ulBase, unsigned char ucSlaveAddr);
|
||||
extern void I2CSlaveIntClear(unsigned long ulBase);
|
||||
extern void I2CSlaveIntDisable(unsigned long ulBase);
|
||||
extern void I2CSlaveIntEnable(unsigned long ulBase);
|
||||
extern void I2CSlaveIntClearEx(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void I2CSlaveIntDisableEx(unsigned long ulBase,
|
||||
unsigned long ulIntFlags);
|
||||
extern void I2CSlaveIntEnableEx(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern tBoolean I2CSlaveIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern unsigned long I2CSlaveIntStatusEx(unsigned long ulBase,
|
||||
tBoolean bMasked);
|
||||
extern unsigned long I2CSlaveStatus(unsigned long ulBase);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Several I2C APIs have been renamed, with the original function name being
|
||||
// deprecated. These defines provide backward compatibility.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#include "driverlib/sysctl.h"
|
||||
#define I2CMasterInit(a, b) \
|
||||
I2CMasterInitExpClk(a, SysCtlClockGet(), b)
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __I2C_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,154 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// i2s.h - Prototypes and macros for the I2S controller.
|
||||
//
|
||||
// Copyright (c) 2008-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __I2S_H__
|
||||
#define __I2S_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to I2STxConfigSet() and I2SRxConfigSet()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2S_CONFIG_FORMAT_MASK 0x3C000000 // JST, DLY, SCP, LRP
|
||||
#define I2S_CONFIG_FORMAT_I2S 0x14000000 // !JST, DLY, !SCP, LRP
|
||||
#define I2S_CONFIG_FORMAT_LEFT_JUST \
|
||||
0x00000000 // !JST, !DLY, !SCP, !LRP
|
||||
#define I2S_CONFIG_FORMAT_RIGHT_JUST \
|
||||
0x20000000 // JST, !DLY, !SCP, !LRP
|
||||
|
||||
#define I2S_CONFIG_SCLK_INVERT 0x08000000
|
||||
|
||||
#define I2S_CONFIG_MODE_MASK 0x03000000
|
||||
#define I2S_CONFIG_MODE_DUAL 0x00000000
|
||||
#define I2S_CONFIG_MODE_COMPACT_16 \
|
||||
0x01000000
|
||||
#define I2S_CONFIG_MODE_COMPACT_8 \
|
||||
0x03000000
|
||||
#define I2S_CONFIG_MODE_MONO 0x02000000
|
||||
|
||||
#define I2S_CONFIG_EMPTY_MASK 0x00800000
|
||||
#define I2S_CONFIG_EMPTY_ZERO 0x00000000
|
||||
#define I2S_CONFIG_EMPTY_REPEAT 0x00800000
|
||||
|
||||
#define I2S_CONFIG_CLK_MASK 0x00400000
|
||||
#define I2S_CONFIG_CLK_MASTER 0x00400000
|
||||
#define I2S_CONFIG_CLK_SLAVE 0x00000000
|
||||
|
||||
#define I2S_CONFIG_SAMPLE_SIZE_MASK \
|
||||
0x0000FC00
|
||||
#define I2S_CONFIG_SAMPLE_SIZE_32 \
|
||||
0x00007C00
|
||||
#define I2S_CONFIG_SAMPLE_SIZE_24 \
|
||||
0x00005C00
|
||||
#define I2S_CONFIG_SAMPLE_SIZE_20 \
|
||||
0x00004C00
|
||||
#define I2S_CONFIG_SAMPLE_SIZE_16 \
|
||||
0x00003C00
|
||||
#define I2S_CONFIG_SAMPLE_SIZE_8 \
|
||||
0x00001C00
|
||||
|
||||
#define I2S_CONFIG_WIRE_SIZE_MASK \
|
||||
0x000003F0
|
||||
#define I2S_CONFIG_WIRE_SIZE_32 0x000001F0
|
||||
#define I2S_CONFIG_WIRE_SIZE_24 0x00000170
|
||||
#define I2S_CONFIG_WIRE_SIZE_20 0x00000130
|
||||
#define I2S_CONFIG_WIRE_SIZE_16 0x000000F0
|
||||
#define I2S_CONFIG_WIRE_SIZE_8 0x00000070
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to I2SMasterClockSelect()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2S_TX_MCLK_EXT 0x00000010
|
||||
#define I2S_TX_MCLK_INT 0x00000000
|
||||
#define I2S_RX_MCLK_EXT 0x00000020
|
||||
#define I2S_RX_MCLK_INT 0x00000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to I2SIntEnable(), I2SIntDisable(), and
|
||||
// I2SIntClear()
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define I2S_INT_RXERR 0x00000020
|
||||
#define I2S_INT_RXREQ 0x00000010
|
||||
#define I2S_INT_TXERR 0x00000002
|
||||
#define I2S_INT_TXREQ 0x00000001
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void I2STxEnable(unsigned long ulBase);
|
||||
extern void I2STxDisable(unsigned long ulBase);
|
||||
extern void I2STxDataPut(unsigned long ulBase, unsigned long ulData);
|
||||
extern long I2STxDataPutNonBlocking(unsigned long ulBase,
|
||||
unsigned long ulData);
|
||||
extern void I2STxConfigSet(unsigned long ulBase, unsigned long ulConfig);
|
||||
extern void I2STxFIFOLimitSet(unsigned long ulBase, unsigned long ulLevel);
|
||||
extern unsigned long I2STxFIFOLimitGet(unsigned long ulBase);
|
||||
extern unsigned long I2STxFIFOLevelGet(unsigned long ulBase);
|
||||
extern void I2SRxEnable(unsigned long ulBase);
|
||||
extern void I2SRxDisable(unsigned long ulBase);
|
||||
extern void I2SRxDataGet(unsigned long ulBase, unsigned long *pulData);
|
||||
extern long I2SRxDataGetNonBlocking(unsigned long ulBase,
|
||||
unsigned long *pulData);
|
||||
extern void I2SRxConfigSet(unsigned long ulBase, unsigned long ulConfig);
|
||||
extern void I2SRxFIFOLimitSet(unsigned long ulBase, unsigned long ulLevel);
|
||||
extern unsigned long I2SRxFIFOLimitGet(unsigned long ulBase);
|
||||
extern unsigned long I2SRxFIFOLevelGet(unsigned long ulBase);
|
||||
extern void I2STxRxEnable(unsigned long ulBase);
|
||||
extern void I2STxRxDisable(unsigned long ulBase);
|
||||
extern void I2STxRxConfigSet(unsigned long ulBase, unsigned long ulConfig);
|
||||
extern void I2SMasterClockSelect(unsigned long ulBase, unsigned long ulMClock);
|
||||
extern void I2SIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void I2SIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern unsigned long I2SIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void I2SIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void I2SIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
|
||||
extern void I2SIntUnregister(unsigned long ulBase);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __I2S_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,77 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// interrupt.h - Prototypes for the NVIC Interrupt Controller Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __INTERRUPT_H__
|
||||
#define __INTERRUPT_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macro to generate an interrupt priority mask based on the number of bits
|
||||
// of priority supported by the hardware.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define INT_PRIORITY_MASK ((0xFF << (8 - NUM_PRIORITY_BITS)) & 0xFF)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern tBoolean IntMasterEnable(void);
|
||||
extern tBoolean IntMasterDisable(void);
|
||||
extern void IntRegister(unsigned long ulInterrupt, void (*pfnHandler)(void));
|
||||
extern void IntUnregister(unsigned long ulInterrupt);
|
||||
extern void IntPriorityGroupingSet(unsigned long ulBits);
|
||||
extern unsigned long IntPriorityGroupingGet(void);
|
||||
extern void IntPrioritySet(unsigned long ulInterrupt,
|
||||
unsigned char ucPriority);
|
||||
extern long IntPriorityGet(unsigned long ulInterrupt);
|
||||
extern void IntEnable(unsigned long ulInterrupt);
|
||||
extern void IntDisable(unsigned long ulInterrupt);
|
||||
extern void IntPendSet(unsigned long ulInterrupt);
|
||||
extern void IntPendClear(unsigned long ulInterrupt);
|
||||
extern void IntPriorityMaskSet(unsigned long ulPriorityMask);
|
||||
extern unsigned long IntPriorityMaskGet(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __INTERRUPT_H__
|
||||
@@ -0,0 +1,446 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// mpu.c - Driver for the Cortex-M3 memory protection unit (MPU).
|
||||
//
|
||||
// Copyright (c) 2007-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup mpu_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_ints.h"
|
||||
#include "inc/hw_nvic.h"
|
||||
#include "inc/hw_types.h"
|
||||
#include "driverlib/debug.h"
|
||||
#include "driverlib/interrupt.h"
|
||||
#include "driverlib/mpu.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables and configures the MPU for use.
|
||||
//!
|
||||
//! \param ulMPUConfig is the logical OR of the possible configurations.
|
||||
//!
|
||||
//! This function enables the Cortex-M3 memory protection unit. It also
|
||||
//! configures the default behavior when in privileged mode and while
|
||||
//! handling a hard fault or NMI. Prior to enabling the MPU, at least one
|
||||
//! region must be set by calling MPURegionSet() or else by enabling the
|
||||
//! default region for privileged mode by passing the
|
||||
//! \b MPU_CONFIG_PRIV_DEFAULT flag to MPUEnable().
|
||||
//! Once the MPU is enabled, a memory management fault will be generated
|
||||
//! for any memory access violations.
|
||||
//!
|
||||
//! The \e ulMPUConfig parameter should be the logical OR of any of the
|
||||
//! following:
|
||||
//!
|
||||
//! - \b MPU_CONFIG_PRIV_DEFAULT enables the default memory map when in
|
||||
//! privileged mode and when no other regions are defined. If this option
|
||||
//! is not enabled, then there must be at least one valid region already
|
||||
//! defined when the MPU is enabled.
|
||||
//! - \b MPU_CONFIG_HARDFLT_NMI enables the MPU while in a hard fault or NMI
|
||||
//! exception handler. If this option is not enabled, then the MPU is
|
||||
//! disabled while in one of these exception handlers and the default
|
||||
//! memory map is applied.
|
||||
//! - \b MPU_CONFIG_NONE chooses none of the above options. In this case,
|
||||
//! no default memory map is provided in privileged mode, and the MPU will
|
||||
//! not be enabled in the fault handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPUEnable(unsigned long ulMPUConfig)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(!(ulMPUConfig & ~(MPU_CONFIG_PRIV_DEFAULT |
|
||||
MPU_CONFIG_HARDFLT_NMI)));
|
||||
|
||||
//
|
||||
// Set the MPU control bits according to the flags passed by the user,
|
||||
// and also set the enable bit.
|
||||
//
|
||||
HWREG(NVIC_MPU_CTRL) = ulMPUConfig | NVIC_MPU_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the MPU for use.
|
||||
//!
|
||||
//! This function disables the Cortex-M3 memory protection unit. When the
|
||||
//! MPU is disabled, the default memory map is used and memory management
|
||||
//! faults are not generated.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPUDisable(void)
|
||||
{
|
||||
//
|
||||
// Turn off the MPU enable bit.
|
||||
//
|
||||
HWREG(NVIC_MPU_CTRL) &= ~NVIC_MPU_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the count of regions supported by the MPU.
|
||||
//!
|
||||
//! This function is used to get the number of regions that are supported by
|
||||
//! the MPU. This is the total number that are supported, including regions
|
||||
//! that are already programmed.
|
||||
//!
|
||||
//! \return The number of memory protection regions that are available
|
||||
//! for programming using MPURegionSet().
|
||||
//
|
||||
//*****************************************************************************
|
||||
unsigned long
|
||||
MPURegionCountGet(void)
|
||||
{
|
||||
//
|
||||
// Read the DREGION field of the MPU type register, and mask off
|
||||
// the bits of interest to get the count of regions.
|
||||
//
|
||||
return((HWREG(NVIC_MPU_TYPE) & NVIC_MPU_TYPE_DREGION_M)
|
||||
>> NVIC_MPU_TYPE_DREGION_S);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables a specific region.
|
||||
//!
|
||||
//! \param ulRegion is the region number to enable.
|
||||
//!
|
||||
//! This function is used to enable a memory protection region. The region
|
||||
//! should already be set up with the MPURegionSet() function. Once enabled,
|
||||
//! the memory protection rules of the region will be applied and access
|
||||
//! violations will cause a memory management fault.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPURegionEnable(unsigned long ulRegion)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulRegion < 8);
|
||||
|
||||
//
|
||||
// Select the region to modify.
|
||||
//
|
||||
HWREG(NVIC_MPU_NUMBER) = ulRegion;
|
||||
|
||||
//
|
||||
// Modify the enable bit in the region attributes.
|
||||
//
|
||||
HWREG(NVIC_MPU_ATTR) |= NVIC_MPU_ATTR_ENABLE;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables a specific region.
|
||||
//!
|
||||
//! \param ulRegion is the region number to disable.
|
||||
//!
|
||||
//! This function is used to disable a previously enabled memory protection
|
||||
//! region. The region will remain configured if it is not overwritten with
|
||||
//! another call to MPURegionSet(), and can be enabled again by calling
|
||||
//! MPURegionEnable().
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPURegionDisable(unsigned long ulRegion)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulRegion < 8);
|
||||
|
||||
//
|
||||
// Select the region to modify.
|
||||
//
|
||||
HWREG(NVIC_MPU_NUMBER) = ulRegion;
|
||||
|
||||
//
|
||||
// Modify the enable bit in the region attributes.
|
||||
//
|
||||
HWREG(NVIC_MPU_ATTR) &= ~NVIC_MPU_ATTR_ENABLE;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets up the access rules for a specific region.
|
||||
//!
|
||||
//! \param ulRegion is the region number to set up.
|
||||
//! \param ulAddr is the base address of the region. It must be aligned
|
||||
//! according to the size of the region specified in ulFlags.
|
||||
//! \param ulFlags is a set of flags to define the attributes of the region.
|
||||
//!
|
||||
//! This function sets up the protection rules for a region. The region has
|
||||
//! a base address and a set of attributes including the size, which must
|
||||
//! be a power of 2. The base address parameter, \e ulAddr, must be aligned
|
||||
//! according to the size.
|
||||
//!
|
||||
//! The \e ulFlags parameter is the logical OR of all of the attributes
|
||||
//! of the region. It is a combination of choices for region size,
|
||||
//! execute permission, read/write permissions, disabled sub-regions,
|
||||
//! and a flag to determine if the region is enabled.
|
||||
//!
|
||||
//! The size flag determines the size of a region, and must be one of the
|
||||
//! following:
|
||||
//!
|
||||
//! - \b MPU_RGN_SIZE_32B
|
||||
//! - \b MPU_RGN_SIZE_64B
|
||||
//! - \b MPU_RGN_SIZE_128B
|
||||
//! - \b MPU_RGN_SIZE_256B
|
||||
//! - \b MPU_RGN_SIZE_512B
|
||||
//! - \b MPU_RGN_SIZE_1K
|
||||
//! - \b MPU_RGN_SIZE_2K
|
||||
//! - \b MPU_RGN_SIZE_4K
|
||||
//! - \b MPU_RGN_SIZE_8K
|
||||
//! - \b MPU_RGN_SIZE_16K
|
||||
//! - \b MPU_RGN_SIZE_32K
|
||||
//! - \b MPU_RGN_SIZE_64K
|
||||
//! - \b MPU_RGN_SIZE_128K
|
||||
//! - \b MPU_RGN_SIZE_256K
|
||||
//! - \b MPU_RGN_SIZE_512K
|
||||
//! - \b MPU_RGN_SIZE_1M
|
||||
//! - \b MPU_RGN_SIZE_2M
|
||||
//! - \b MPU_RGN_SIZE_4M
|
||||
//! - \b MPU_RGN_SIZE_8M
|
||||
//! - \b MPU_RGN_SIZE_16M
|
||||
//! - \b MPU_RGN_SIZE_32M
|
||||
//! - \b MPU_RGN_SIZE_64M
|
||||
//! - \b MPU_RGN_SIZE_128M
|
||||
//! - \b MPU_RGN_SIZE_256M
|
||||
//! - \b MPU_RGN_SIZE_512M
|
||||
//! - \b MPU_RGN_SIZE_1G
|
||||
//! - \b MPU_RGN_SIZE_2G
|
||||
//! - \b MPU_RGN_SIZE_4G
|
||||
//!
|
||||
//! The execute permission flag must be one of the following:
|
||||
//!
|
||||
//! - \b MPU_RGN_PERM_EXEC enables the region for execution of code
|
||||
//! - \b MPU_RGN_PERM_NOEXEC disables the region for execution of code
|
||||
//!
|
||||
//! The read/write access permissions are applied separately for the
|
||||
//! privileged and user modes. The read/write access flags must be one
|
||||
//! of the following:
|
||||
//!
|
||||
//! - \b MPU_RGN_PERM_PRV_NO_USR_NO - no access in privileged or user mode
|
||||
//! - \b MPU_RGN_PERM_PRV_RW_USR_NO - privileged read/write, user no access
|
||||
//! - \b MPU_RGN_PERM_PRV_RW_USR_RO - privileged read/write, user read-only
|
||||
//! - \b MPU_RGN_PERM_PRV_RW_USR_RW - privileged read/write, user read/write
|
||||
//! - \b MPU_RGN_PERM_PRV_RO_USR_NO - privileged read-only, user no access
|
||||
//! - \b MPU_RGN_PERM_PRV_RO_USR_RO - privileged read-only, user read-only
|
||||
//!
|
||||
//! The region is automatically divided into 8 equally-sized sub-regions by
|
||||
//! the MPU. Sub-regions can only be used in regions of size 256 bytes
|
||||
//! or larger. Any of these 8 sub-regions can be disabled. This allows
|
||||
//! for creation of ``holes'' in a region which can be left open, or overlaid
|
||||
//! by another region with different attributes. Any of the 8 sub-regions
|
||||
//! can be disabled with a logical OR of any of the following flags:
|
||||
//!
|
||||
//! - \b MPU_SUB_RGN_DISABLE_0
|
||||
//! - \b MPU_SUB_RGN_DISABLE_1
|
||||
//! - \b MPU_SUB_RGN_DISABLE_2
|
||||
//! - \b MPU_SUB_RGN_DISABLE_3
|
||||
//! - \b MPU_SUB_RGN_DISABLE_4
|
||||
//! - \b MPU_SUB_RGN_DISABLE_5
|
||||
//! - \b MPU_SUB_RGN_DISABLE_6
|
||||
//! - \b MPU_SUB_RGN_DISABLE_7
|
||||
//!
|
||||
//! Finally, the region can be initially enabled or disabled with one of
|
||||
//! the following flags:
|
||||
//!
|
||||
//! - \b MPU_RGN_ENABLE
|
||||
//! - \b MPU_RGN_DISABLE
|
||||
//!
|
||||
//! As an example, to set a region with the following attributes: size of
|
||||
//! 32 KB, execution enabled, read-only for both privileged and user, one
|
||||
//! sub-region disabled, and initially enabled; the \e ulFlags parameter would
|
||||
//! have the following value:
|
||||
//!
|
||||
//! <code>
|
||||
//! (MPU_RG_SIZE_32K | MPU_RGN_PERM_EXEC | MPU_RGN_PERM_PRV_RO_USR_RO |
|
||||
//! MPU_SUB_RGN_DISABLE_2 | MPU_RGN_ENABLE)
|
||||
//! </code>
|
||||
//!
|
||||
//! \note This function will write to multiple registers and is not protected
|
||||
//! from interrupts. It is possible that an interrupt which accesses a
|
||||
//! region may occur while that region is in the process of being changed.
|
||||
//! The safest way to handle this is to disable a region before changing it.
|
||||
//! Refer to the discussion of this in the API Detailed Description section.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPURegionSet(unsigned long ulRegion, unsigned long ulAddr,
|
||||
unsigned long ulFlags)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulRegion < 8);
|
||||
ASSERT((ulAddr & ~0 << (((ulFlags & NVIC_MPU_ATTR_SIZE_M) >> 1) + 1))
|
||||
== ulAddr);
|
||||
|
||||
//
|
||||
// Program the base address, use the region field to select the
|
||||
// region at the same time.
|
||||
//
|
||||
HWREG(NVIC_MPU_BASE) = ulAddr | ulRegion | NVIC_MPU_BASE_VALID;
|
||||
|
||||
//
|
||||
// Program the region attributes. Set the TEX field and the S, C,
|
||||
// and B bits to fixed values that are suitable for all Stellaris
|
||||
// memory.
|
||||
//
|
||||
HWREG(NVIC_MPU_ATTR) = (ulFlags & ~(NVIC_MPU_ATTR_TEX_M |
|
||||
NVIC_MPU_ATTR_CACHEABLE)) |
|
||||
NVIC_MPU_ATTR_SHAREABLE |
|
||||
NVIC_MPU_ATTR_BUFFRABLE;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the current settings for a specific region.
|
||||
//!
|
||||
//! \param ulRegion is the region number to get.
|
||||
//! \param pulAddr points to storage for the base address of the region.
|
||||
//! \param pulFlags points to the attribute flags for the region.
|
||||
//!
|
||||
//! This function retrieves the configuration of a specific region. The
|
||||
//! meanings and format of the parameters is the same as that of the
|
||||
//! MPURegionSet() function.
|
||||
//!
|
||||
//! This function can be used to save the configuration of a region for
|
||||
//! later use with the MPURegionSet() function. The region's enable state
|
||||
//! will be preserved in the attributes that are saved.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPURegionGet(unsigned long ulRegion, unsigned long *pulAddr,
|
||||
unsigned long *pulFlags)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(ulRegion < 8);
|
||||
ASSERT(pulAddr);
|
||||
ASSERT(pulFlags);
|
||||
|
||||
//
|
||||
// Select the region to get.
|
||||
//
|
||||
HWREG(NVIC_MPU_NUMBER) = ulRegion;
|
||||
|
||||
//
|
||||
// Read and store the base address for the region.
|
||||
//
|
||||
*pulAddr = HWREG(NVIC_MPU_BASE);
|
||||
|
||||
//
|
||||
// Read and store the region attributes.
|
||||
//
|
||||
*pulFlags = HWREG(NVIC_MPU_ATTR);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Registers an interrupt handler for the memory management fault.
|
||||
//!
|
||||
//! \param pfnHandler is a pointer to the function to be called when the
|
||||
//! memory management fault occurs.
|
||||
//!
|
||||
//! This sets and enables the handler to be called when the MPU generates
|
||||
//! a memory management fault due to a protection region access violation.
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPUIntRegister(void (*pfnHandler)(void))
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT(pfnHandler);
|
||||
|
||||
//
|
||||
// Register the interrupt handler.
|
||||
//
|
||||
IntRegister(FAULT_MPU, pfnHandler);
|
||||
|
||||
//
|
||||
// Enable the memory management fault.
|
||||
//
|
||||
IntEnable(FAULT_MPU);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Unregisters an interrupt handler for the memory management fault.
|
||||
//!
|
||||
//! This function will disable and clear the handler to be called when a
|
||||
//! memory management fault occurs.
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
MPUIntUnregister(void)
|
||||
{
|
||||
//
|
||||
// Disable the interrupt.
|
||||
//
|
||||
IntDisable(FAULT_MPU);
|
||||
|
||||
//
|
||||
// Unregister the interrupt handler.
|
||||
//
|
||||
IntUnregister(FAULT_MPU);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,147 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// mpu.h - Defines and Macros for the memory protection unit.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __MPU_H__
|
||||
#define __MPU_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Flags that can be passed to MPUEnable.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_CONFIG_PRIV_DEFAULT 4
|
||||
#define MPU_CONFIG_HARDFLT_NMI 2
|
||||
#define MPU_CONFIG_NONE 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Flags for the region size to be passed to MPURegionSet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_RGN_SIZE_32B (4 << 1)
|
||||
#define MPU_RGN_SIZE_64B (5 << 1)
|
||||
#define MPU_RGN_SIZE_128B (6 << 1)
|
||||
#define MPU_RGN_SIZE_256B (7 << 1)
|
||||
#define MPU_RGN_SIZE_512B (8 << 1)
|
||||
|
||||
#define MPU_RGN_SIZE_1K (9 << 1)
|
||||
#define MPU_RGN_SIZE_2K (10 << 1)
|
||||
#define MPU_RGN_SIZE_4K (11 << 1)
|
||||
#define MPU_RGN_SIZE_8K (12 << 1)
|
||||
#define MPU_RGN_SIZE_16K (13 << 1)
|
||||
#define MPU_RGN_SIZE_32K (14 << 1)
|
||||
#define MPU_RGN_SIZE_64K (15 << 1)
|
||||
#define MPU_RGN_SIZE_128K (16 << 1)
|
||||
#define MPU_RGN_SIZE_256K (17 << 1)
|
||||
#define MPU_RGN_SIZE_512K (18 << 1)
|
||||
|
||||
#define MPU_RGN_SIZE_1M (19 << 1)
|
||||
#define MPU_RGN_SIZE_2M (20 << 1)
|
||||
#define MPU_RGN_SIZE_4M (21 << 1)
|
||||
#define MPU_RGN_SIZE_8M (22 << 1)
|
||||
#define MPU_RGN_SIZE_16M (23 << 1)
|
||||
#define MPU_RGN_SIZE_32M (24 << 1)
|
||||
#define MPU_RGN_SIZE_64M (25 << 1)
|
||||
#define MPU_RGN_SIZE_128M (26 << 1)
|
||||
#define MPU_RGN_SIZE_256M (27 << 1)
|
||||
#define MPU_RGN_SIZE_512M (28 << 1)
|
||||
|
||||
#define MPU_RGN_SIZE_1G (29 << 1)
|
||||
#define MPU_RGN_SIZE_2G (30 << 1)
|
||||
#define MPU_RGN_SIZE_4G (31 << 1)
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Flags for the permissions to be passed to MPURegionSet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_RGN_PERM_EXEC 0x00000000
|
||||
#define MPU_RGN_PERM_NOEXEC 0x10000000
|
||||
#define MPU_RGN_PERM_PRV_NO_USR_NO 0x00000000
|
||||
#define MPU_RGN_PERM_PRV_RW_USR_NO 0x01000000
|
||||
#define MPU_RGN_PERM_PRV_RW_USR_RO 0x02000000
|
||||
#define MPU_RGN_PERM_PRV_RW_USR_RW 0x03000000
|
||||
#define MPU_RGN_PERM_PRV_RO_USR_NO 0x05000000
|
||||
#define MPU_RGN_PERM_PRV_RO_USR_RO 0x06000000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Flags for the sub-region to be passed to MPURegionSet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_SUB_RGN_DISABLE_0 0x00000100
|
||||
#define MPU_SUB_RGN_DISABLE_1 0x00000200
|
||||
#define MPU_SUB_RGN_DISABLE_2 0x00000400
|
||||
#define MPU_SUB_RGN_DISABLE_3 0x00000800
|
||||
#define MPU_SUB_RGN_DISABLE_4 0x00001000
|
||||
#define MPU_SUB_RGN_DISABLE_5 0x00002000
|
||||
#define MPU_SUB_RGN_DISABLE_6 0x00004000
|
||||
#define MPU_SUB_RGN_DISABLE_7 0x00008000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Flags to enable or disable a region, to be passed to MPURegionSet.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define MPU_RGN_ENABLE 1
|
||||
#define MPU_RGN_DISABLE 0
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void MPUEnable(unsigned long ulMPUConfig);
|
||||
extern void MPUDisable(void);
|
||||
extern unsigned long MPURegionCountGet(void);
|
||||
extern void MPURegionEnable(unsigned long ulRegion);
|
||||
extern void MPURegionDisable(unsigned long ulRegion);
|
||||
extern void MPURegionSet(unsigned long ulRegion, unsigned long ulAddr,
|
||||
unsigned long ulFlags);
|
||||
extern void MPURegionGet(unsigned long ulRegion, unsigned long *pulAddr,
|
||||
unsigned long *pulFlags);
|
||||
extern void MPUIntRegister(void (*pfnHandler)(void));
|
||||
extern void MPUIntUnregister(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __MPU_H__
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,283 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// pwm.h - API function protoypes for Pulse Width Modulation (PWM) ports
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __PWM_H__
|
||||
#define __PWM_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following defines are passed to PWMGenConfigure() as the ulConfig
|
||||
// parameter and specify the configuration of the PWM generator.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_GEN_MODE_DOWN 0x00000000 // Down count mode
|
||||
#define PWM_GEN_MODE_UP_DOWN 0x00000002 // Up/Down count mode
|
||||
#define PWM_GEN_MODE_SYNC 0x00000038 // Synchronous updates
|
||||
#define PWM_GEN_MODE_NO_SYNC 0x00000000 // Immediate updates
|
||||
#define PWM_GEN_MODE_DBG_RUN 0x00000004 // Continue running in debug mode
|
||||
#define PWM_GEN_MODE_DBG_STOP 0x00000000 // Stop running in debug mode
|
||||
#define PWM_GEN_MODE_FAULT_LATCHED \
|
||||
0x00040000 // Fault is latched
|
||||
#define PWM_GEN_MODE_FAULT_UNLATCHED \
|
||||
0x00000000 // Fault is not latched
|
||||
#define PWM_GEN_MODE_FAULT_MINPER \
|
||||
0x00020000 // Enable min fault period
|
||||
#define PWM_GEN_MODE_FAULT_NO_MINPER \
|
||||
0x00000000 // Disable min fault period
|
||||
#define PWM_GEN_MODE_FAULT_EXT 0x00010000 // Enable extended fault support
|
||||
#define PWM_GEN_MODE_FAULT_LEGACY \
|
||||
0x00000000 // Disable extended fault support
|
||||
#define PWM_GEN_MODE_DB_NO_SYNC 0x00000000 // Deadband updates occur
|
||||
// immediately
|
||||
#define PWM_GEN_MODE_DB_SYNC_LOCAL \
|
||||
0x0000A800 // Deadband updates locally
|
||||
// synchronized
|
||||
#define PWM_GEN_MODE_DB_SYNC_GLOBAL \
|
||||
0x0000FC00 // Deadband updates globally
|
||||
// synchronized
|
||||
#define PWM_GEN_MODE_GEN_NO_SYNC \
|
||||
0x00000000 // Generator mode updates occur
|
||||
// immediately
|
||||
#define PWM_GEN_MODE_GEN_SYNC_LOCAL \
|
||||
0x00000280 // Generator mode updates locally
|
||||
// synchronized
|
||||
#define PWM_GEN_MODE_GEN_SYNC_GLOBAL \
|
||||
0x000003C0 // Generator mode updates globally
|
||||
// synchronized
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines for enabling, disabling, and clearing PWM generator interrupts and
|
||||
// triggers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_INT_CNT_ZERO 0x00000001 // Int if COUNT = 0
|
||||
#define PWM_INT_CNT_LOAD 0x00000002 // Int if COUNT = LOAD
|
||||
#define PWM_INT_CNT_AU 0x00000004 // Int if COUNT = CMPA U
|
||||
#define PWM_INT_CNT_AD 0x00000008 // Int if COUNT = CMPA D
|
||||
#define PWM_INT_CNT_BU 0x00000010 // Int if COUNT = CMPA U
|
||||
#define PWM_INT_CNT_BD 0x00000020 // Int if COUNT = CMPA D
|
||||
#define PWM_TR_CNT_ZERO 0x00000100 // Trig if COUNT = 0
|
||||
#define PWM_TR_CNT_LOAD 0x00000200 // Trig if COUNT = LOAD
|
||||
#define PWM_TR_CNT_AU 0x00000400 // Trig if COUNT = CMPA U
|
||||
#define PWM_TR_CNT_AD 0x00000800 // Trig if COUNT = CMPA D
|
||||
#define PWM_TR_CNT_BU 0x00001000 // Trig if COUNT = CMPA U
|
||||
#define PWM_TR_CNT_BD 0x00002000 // Trig if COUNT = CMPA D
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines for enabling, disabling, and clearing PWM interrupts.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_INT_GEN_0 0x00000001 // Generator 0 interrupt
|
||||
#define PWM_INT_GEN_1 0x00000002 // Generator 1 interrupt
|
||||
#define PWM_INT_GEN_2 0x00000004 // Generator 2 interrupt
|
||||
#define PWM_INT_GEN_3 0x00000008 // Generator 3 interrupt
|
||||
#ifndef DEPRECATED
|
||||
#define PWM_INT_FAULT 0x00010000 // Fault interrupt
|
||||
#endif
|
||||
#define PWM_INT_FAULT0 0x00010000 // Fault0 interrupt
|
||||
#define PWM_INT_FAULT1 0x00020000 // Fault1 interrupt
|
||||
#define PWM_INT_FAULT2 0x00040000 // Fault2 interrupt
|
||||
#define PWM_INT_FAULT3 0x00080000 // Fault3 interrupt
|
||||
#define PWM_INT_FAULT_M 0x000F0000 // Fault interrupt source mask
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines to identify the generators within a module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_GEN_0 0x00000040 // Offset address of Gen0
|
||||
#define PWM_GEN_1 0x00000080 // Offset address of Gen1
|
||||
#define PWM_GEN_2 0x000000C0 // Offset address of Gen2
|
||||
#define PWM_GEN_3 0x00000100 // Offset address of Gen3
|
||||
|
||||
#define PWM_GEN_0_BIT 0x00000001 // Bit-wise ID for Gen0
|
||||
#define PWM_GEN_1_BIT 0x00000002 // Bit-wise ID for Gen1
|
||||
#define PWM_GEN_2_BIT 0x00000004 // Bit-wise ID for Gen2
|
||||
#define PWM_GEN_3_BIT 0x00000008 // Bit-wise ID for Gen3
|
||||
|
||||
#define PWM_GEN_EXT_0 0x00000800 // Offset of Gen0 ext address range
|
||||
#define PWM_GEN_EXT_1 0x00000880 // Offset of Gen1 ext address range
|
||||
#define PWM_GEN_EXT_2 0x00000900 // Offset of Gen2 ext address range
|
||||
#define PWM_GEN_EXT_3 0x00000980 // Offset of Gen3 ext address range
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines to identify the outputs within a module.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_OUT_0 0x00000040 // Encoded offset address of PWM0
|
||||
#define PWM_OUT_1 0x00000041 // Encoded offset address of PWM1
|
||||
#define PWM_OUT_2 0x00000082 // Encoded offset address of PWM2
|
||||
#define PWM_OUT_3 0x00000083 // Encoded offset address of PWM3
|
||||
#define PWM_OUT_4 0x000000C4 // Encoded offset address of PWM4
|
||||
#define PWM_OUT_5 0x000000C5 // Encoded offset address of PWM5
|
||||
#define PWM_OUT_6 0x00000106 // Encoded offset address of PWM6
|
||||
#define PWM_OUT_7 0x00000107 // Encoded offset address of PWM7
|
||||
|
||||
#define PWM_OUT_0_BIT 0x00000001 // Bit-wise ID for PWM0
|
||||
#define PWM_OUT_1_BIT 0x00000002 // Bit-wise ID for PWM1
|
||||
#define PWM_OUT_2_BIT 0x00000004 // Bit-wise ID for PWM2
|
||||
#define PWM_OUT_3_BIT 0x00000008 // Bit-wise ID for PWM3
|
||||
#define PWM_OUT_4_BIT 0x00000010 // Bit-wise ID for PWM4
|
||||
#define PWM_OUT_5_BIT 0x00000020 // Bit-wise ID for PWM5
|
||||
#define PWM_OUT_6_BIT 0x00000040 // Bit-wise ID for PWM6
|
||||
#define PWM_OUT_7_BIT 0x00000080 // Bit-wise ID for PWM7
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines to identify each of the possible fault trigger conditions in
|
||||
// PWM_FAULT_GROUP_0.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_FAULT_GROUP_0 0
|
||||
|
||||
#define PWM_FAULT_FAULT0 0x00000001
|
||||
#define PWM_FAULT_FAULT1 0x00000002
|
||||
#define PWM_FAULT_FAULT2 0x00000004
|
||||
#define PWM_FAULT_FAULT3 0x00000008
|
||||
#define PWM_FAULT_ACMP0 0x00010000
|
||||
#define PWM_FAULT_ACMP1 0x00020000
|
||||
#define PWM_FAULT_ACMP2 0x00040000
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines to identify each of the possible fault trigger conditions in
|
||||
// PWM_FAULT_GROUP_1.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_FAULT_GROUP_1 1
|
||||
|
||||
#define PWM_FAULT_DCMP0 0x00000001
|
||||
#define PWM_FAULT_DCMP1 0x00000002
|
||||
#define PWM_FAULT_DCMP2 0x00000004
|
||||
#define PWM_FAULT_DCMP3 0x00000008
|
||||
#define PWM_FAULT_DCMP4 0x00000010
|
||||
#define PWM_FAULT_DCMP5 0x00000020
|
||||
#define PWM_FAULT_DCMP6 0x00000040
|
||||
#define PWM_FAULT_DCMP7 0x00000080
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Defines to identify the sense of each of the external FAULTn signals
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define PWM_FAULT0_SENSE_HIGH 0x00000000
|
||||
#define PWM_FAULT0_SENSE_LOW 0x00000001
|
||||
#define PWM_FAULT1_SENSE_HIGH 0x00000000
|
||||
#define PWM_FAULT1_SENSE_LOW 0x00000002
|
||||
#define PWM_FAULT2_SENSE_HIGH 0x00000000
|
||||
#define PWM_FAULT2_SENSE_LOW 0x00000004
|
||||
#define PWM_FAULT3_SENSE_HIGH 0x00000000
|
||||
#define PWM_FAULT3_SENSE_LOW 0x00000008
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// API Function prototypes
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void PWMGenConfigure(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulConfig);
|
||||
extern void PWMGenPeriodSet(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulPeriod);
|
||||
extern unsigned long PWMGenPeriodGet(unsigned long ulBase,
|
||||
unsigned long ulGen);
|
||||
extern void PWMGenEnable(unsigned long ulBase, unsigned long ulGen);
|
||||
extern void PWMGenDisable(unsigned long ulBase, unsigned long ulGen);
|
||||
extern void PWMPulseWidthSet(unsigned long ulBase, unsigned long ulPWMOut,
|
||||
unsigned long ulWidth);
|
||||
extern unsigned long PWMPulseWidthGet(unsigned long ulBase,
|
||||
unsigned long ulPWMOut);
|
||||
extern void PWMDeadBandEnable(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned short usRise, unsigned short usFall);
|
||||
extern void PWMDeadBandDisable(unsigned long ulBase, unsigned long ulGen);
|
||||
extern void PWMSyncUpdate(unsigned long ulBase, unsigned long ulGenBits);
|
||||
extern void PWMSyncTimeBase(unsigned long ulBase, unsigned long ulGenBits);
|
||||
extern void PWMOutputState(unsigned long ulBase, unsigned long ulPWMOutBits,
|
||||
tBoolean bEnable);
|
||||
extern void PWMOutputInvert(unsigned long ulBase, unsigned long ulPWMOutBits,
|
||||
tBoolean bInvert);
|
||||
extern void PWMOutputFaultLevel(unsigned long ulBase,
|
||||
unsigned long ulPWMOutBits,
|
||||
tBoolean bDriveHigh);
|
||||
extern void PWMOutputFault(unsigned long ulBase, unsigned long ulPWMOutBits,
|
||||
tBoolean bFaultSuppress);
|
||||
extern void PWMGenIntRegister(unsigned long ulBase, unsigned long ulGen,
|
||||
void (*pfnIntHandler)(void));
|
||||
extern void PWMGenIntUnregister(unsigned long ulBase, unsigned long ulGen);
|
||||
extern void PWMFaultIntRegister(unsigned long ulBase,
|
||||
void (*pfnIntHandler)(void));
|
||||
extern void PWMFaultIntUnregister(unsigned long ulBase);
|
||||
extern void PWMGenIntTrigEnable(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulIntTrig);
|
||||
extern void PWMGenIntTrigDisable(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulIntTrig);
|
||||
extern unsigned long PWMGenIntStatus(unsigned long ulBase, unsigned long ulGen,
|
||||
tBoolean bMasked);
|
||||
extern void PWMGenIntClear(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulInts);
|
||||
extern void PWMIntEnable(unsigned long ulBase, unsigned long ulGenFault);
|
||||
extern void PWMIntDisable(unsigned long ulBase, unsigned long ulGenFault);
|
||||
extern void PWMFaultIntClear(unsigned long ulBase);
|
||||
extern unsigned long PWMIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void PWMFaultIntClearExt(unsigned long ulBase,
|
||||
unsigned long ulFaultInts);
|
||||
extern void PWMGenFaultConfigure(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulMinFaultPeriod,
|
||||
unsigned long ulFaultSenses);
|
||||
extern void PWMGenFaultTriggerSet(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulGroup,
|
||||
unsigned long ulFaultTriggers);
|
||||
extern unsigned long PWMGenFaultTriggerGet(unsigned long ulBase,
|
||||
unsigned long ulGen,
|
||||
unsigned long ulGroup);
|
||||
extern unsigned long PWMGenFaultStatus(unsigned long ulBase,
|
||||
unsigned long ulGen,
|
||||
unsigned long ulGroup);
|
||||
extern void PWMGenFaultClear(unsigned long ulBase, unsigned long ulGen,
|
||||
unsigned long ulGroup,
|
||||
unsigned long ulFaultTriggers);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __PWM_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,112 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// qei.h - Prototypes for the Quadrature Encoder Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __QEI_H__
|
||||
#define __QEI_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to QEIConfigure as the ulConfig paramater.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define QEI_CONFIG_CAPTURE_A 0x00000000 // Count on ChA edges only
|
||||
#define QEI_CONFIG_CAPTURE_A_B 0x00000008 // Count on ChA and ChB edges
|
||||
#define QEI_CONFIG_NO_RESET 0x00000000 // Do not reset on index pulse
|
||||
#define QEI_CONFIG_RESET_IDX 0x00000010 // Reset position on index pulse
|
||||
#define QEI_CONFIG_QUADRATURE 0x00000000 // ChA and ChB are quadrature
|
||||
#define QEI_CONFIG_CLOCK_DIR 0x00000004 // ChA and ChB are clock and dir
|
||||
#define QEI_CONFIG_NO_SWAP 0x00000000 // Do not swap ChA and ChB
|
||||
#define QEI_CONFIG_SWAP 0x00000002 // Swap ChA and ChB
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to QEIVelocityConfigure as the ulPreDiv parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define QEI_VELDIV_1 0x00000000 // Predivide by 1
|
||||
#define QEI_VELDIV_2 0x00000040 // Predivide by 2
|
||||
#define QEI_VELDIV_4 0x00000080 // Predivide by 4
|
||||
#define QEI_VELDIV_8 0x000000C0 // Predivide by 8
|
||||
#define QEI_VELDIV_16 0x00000100 // Predivide by 16
|
||||
#define QEI_VELDIV_32 0x00000140 // Predivide by 32
|
||||
#define QEI_VELDIV_64 0x00000180 // Predivide by 64
|
||||
#define QEI_VELDIV_128 0x000001C0 // Predivide by 128
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to QEIEnableInts, QEIDisableInts, and QEIClearInts
|
||||
// as the ulIntFlags parameter, and returned by QEIGetIntStatus.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define QEI_INTERROR 0x00000008 // Phase error detected
|
||||
#define QEI_INTDIR 0x00000004 // Direction change
|
||||
#define QEI_INTTIMER 0x00000002 // Velocity timer expired
|
||||
#define QEI_INTINDEX 0x00000001 // Index pulse detected
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void QEIEnable(unsigned long ulBase);
|
||||
extern void QEIDisable(unsigned long ulBase);
|
||||
extern void QEIConfigure(unsigned long ulBase, unsigned long ulConfig,
|
||||
unsigned long ulMaxPosition);
|
||||
extern unsigned long QEIPositionGet(unsigned long ulBase);
|
||||
extern void QEIPositionSet(unsigned long ulBase, unsigned long ulPosition);
|
||||
extern long QEIDirectionGet(unsigned long ulBase);
|
||||
extern tBoolean QEIErrorGet(unsigned long ulBase);
|
||||
extern void QEIVelocityEnable(unsigned long ulBase);
|
||||
extern void QEIVelocityDisable(unsigned long ulBase);
|
||||
extern void QEIVelocityConfigure(unsigned long ulBase, unsigned long ulPreDiv,
|
||||
unsigned long ulPeriod);
|
||||
extern unsigned long QEIVelocityGet(unsigned long ulBase);
|
||||
extern void QEIIntRegister(unsigned long ulBase, void (*pfnHandler)(void));
|
||||
extern void QEIIntUnregister(unsigned long ulBase);
|
||||
extern void QEIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void QEIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern unsigned long QEIIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void QEIIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __QEI_H__
|
||||
@@ -0,0 +1,21 @@
|
||||
This project will build the Stellaris Peripheral Driver Library.
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
|
||||
Copyright (c) 2006-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
Software License Agreement
|
||||
|
||||
Texas Instruments (TI) is supplying this software for use solely and
|
||||
exclusively on TI's microcontroller products. The software is owned by
|
||||
TI and/or its suppliers, and is protected under applicable copyright
|
||||
laws. You may not combine this software with "viral" open-source
|
||||
software in order to form a larger program.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
|
||||
This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Binary file not shown.
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,125 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// ssi.h - Prototypes for the Synchronous Serial Interface Driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __SSI_H__
|
||||
#define __SSI_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to SSIIntEnable, SSIIntDisable, and SSIIntClear
|
||||
// as the ulIntFlags parameter, and returned by SSIIntStatus.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SSI_TXFF 0x00000008 // TX FIFO half full or less
|
||||
#define SSI_RXFF 0x00000004 // RX FIFO half full or more
|
||||
#define SSI_RXTO 0x00000002 // RX timeout
|
||||
#define SSI_RXOR 0x00000001 // RX overrun
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to SSIConfigSetExpClk.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SSI_FRF_MOTO_MODE_0 0x00000000 // Moto fmt, polarity 0, phase 0
|
||||
#define SSI_FRF_MOTO_MODE_1 0x00000002 // Moto fmt, polarity 0, phase 1
|
||||
#define SSI_FRF_MOTO_MODE_2 0x00000001 // Moto fmt, polarity 1, phase 0
|
||||
#define SSI_FRF_MOTO_MODE_3 0x00000003 // Moto fmt, polarity 1, phase 1
|
||||
#define SSI_FRF_TI 0x00000010 // TI frame format
|
||||
#define SSI_FRF_NMW 0x00000020 // National MicroWire frame format
|
||||
|
||||
#define SSI_MODE_MASTER 0x00000000 // SSI master
|
||||
#define SSI_MODE_SLAVE 0x00000001 // SSI slave
|
||||
#define SSI_MODE_SLAVE_OD 0x00000002 // SSI slave with output disabled
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to SSIDMAEnable() and SSIDMADisable().
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SSI_DMA_TX 0x00000002 // Enable DMA for transmit
|
||||
#define SSI_DMA_RX 0x00000001 // Enable DMA for receive
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void SSIConfigSetExpClk(unsigned long ulBase, unsigned long ulSSIClk,
|
||||
unsigned long ulProtocol, unsigned long ulMode,
|
||||
unsigned long ulBitRate,
|
||||
unsigned long ulDataWidth);
|
||||
extern void SSIDataGet(unsigned long ulBase, unsigned long *pulData);
|
||||
extern long SSIDataGetNonBlocking(unsigned long ulBase,
|
||||
unsigned long *pulData);
|
||||
extern void SSIDataPut(unsigned long ulBase, unsigned long ulData);
|
||||
extern long SSIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData);
|
||||
extern void SSIDisable(unsigned long ulBase);
|
||||
extern void SSIEnable(unsigned long ulBase);
|
||||
extern void SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void SSIIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
|
||||
extern unsigned long SSIIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void SSIIntUnregister(unsigned long ulBase);
|
||||
extern void SSIDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags);
|
||||
extern void SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags);
|
||||
extern tBoolean SSIBusy(unsigned long ulBase);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Several SSI APIs have been renamed, with the original function name being
|
||||
// deprecated. These defines provide backward compatibility.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#include "driverlib/sysctl.h"
|
||||
#define SSIConfig(a, b, c, d, e) \
|
||||
SSIConfigSetExpClk(a, SysCtlClockGet(), b, c, d, e)
|
||||
#define SSIDataNonBlockingGet(a, b) \
|
||||
SSIDataGetNonBlocking(a, b)
|
||||
#define SSIDataNonBlockingPut(a, b) \
|
||||
SSIDataPutNonBlocking(a, b)
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __SSI_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,466 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// sysctl.h - Prototypes for the system control driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __SYSCTL_H__
|
||||
#define __SYSCTL_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the
|
||||
// SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),
|
||||
// SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the
|
||||
// ulPeripheral parameter. The peripherals in the fourth group (upper nibble
|
||||
// is 3) can only be used with the SysCtlPeripheralPresent() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#define SYSCTL_PERIPH_WDOG 0x00000008 // Watchdog
|
||||
#endif
|
||||
#define SYSCTL_PERIPH_WDOG0 0x00000008 // Watchdog 0
|
||||
#define SYSCTL_PERIPH_HIBERNATE 0x00000040 // Hibernation module
|
||||
#ifndef DEPRECATED
|
||||
#define SYSCTL_PERIPH_ADC 0x00100001 // ADC
|
||||
#endif
|
||||
#define SYSCTL_PERIPH_ADC0 0x00100001 // ADC0
|
||||
#define SYSCTL_PERIPH_ADC1 0x00100002 // ADC1
|
||||
#define SYSCTL_PERIPH_PWM 0x00100010 // PWM
|
||||
#define SYSCTL_PERIPH_CAN0 0x00100100 // CAN 0
|
||||
#define SYSCTL_PERIPH_CAN1 0x00100200 // CAN 1
|
||||
#define SYSCTL_PERIPH_CAN2 0x00100400 // CAN 2
|
||||
#define SYSCTL_PERIPH_WDOG1 0x00101000 // Watchdog 1
|
||||
#define SYSCTL_PERIPH_UART0 0x10000001 // UART 0
|
||||
#define SYSCTL_PERIPH_UART1 0x10000002 // UART 1
|
||||
#define SYSCTL_PERIPH_UART2 0x10000004 // UART 2
|
||||
#ifndef DEPRECATED
|
||||
#define SYSCTL_PERIPH_SSI 0x10000010 // SSI
|
||||
#endif
|
||||
#define SYSCTL_PERIPH_SSI0 0x10000010 // SSI 0
|
||||
#define SYSCTL_PERIPH_SSI1 0x10000020 // SSI 1
|
||||
#ifndef DEPRECATED
|
||||
#define SYSCTL_PERIPH_QEI 0x10000100 // QEI
|
||||
#endif
|
||||
#define SYSCTL_PERIPH_QEI0 0x10000100 // QEI 0
|
||||
#define SYSCTL_PERIPH_QEI1 0x10000200 // QEI 1
|
||||
#ifndef DEPRECATED
|
||||
#define SYSCTL_PERIPH_I2C 0x10001000 // I2C
|
||||
#endif
|
||||
#define SYSCTL_PERIPH_I2C0 0x10001000 // I2C 0
|
||||
#define SYSCTL_PERIPH_I2C1 0x10004000 // I2C 1
|
||||
#define SYSCTL_PERIPH_TIMER0 0x10100001 // Timer 0
|
||||
#define SYSCTL_PERIPH_TIMER1 0x10100002 // Timer 1
|
||||
#define SYSCTL_PERIPH_TIMER2 0x10100004 // Timer 2
|
||||
#define SYSCTL_PERIPH_TIMER3 0x10100008 // Timer 3
|
||||
#define SYSCTL_PERIPH_COMP0 0x10100100 // Analog comparator 0
|
||||
#define SYSCTL_PERIPH_COMP1 0x10100200 // Analog comparator 1
|
||||
#define SYSCTL_PERIPH_COMP2 0x10100400 // Analog comparator 2
|
||||
#define SYSCTL_PERIPH_I2S0 0x10101000 // I2S0
|
||||
#define SYSCTL_PERIPH_EPI0 0x10104000 // EPI0
|
||||
#define SYSCTL_PERIPH_GPIOA 0x20000001 // GPIO A
|
||||
#define SYSCTL_PERIPH_GPIOB 0x20000002 // GPIO B
|
||||
#define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
|
||||
#define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
|
||||
#define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
|
||||
#define SYSCTL_PERIPH_GPIOF 0x20000020 // GPIO F
|
||||
#define SYSCTL_PERIPH_GPIOG 0x20000040 // GPIO G
|
||||
#define SYSCTL_PERIPH_GPIOH 0x20000080 // GPIO H
|
||||
#define SYSCTL_PERIPH_GPIOJ 0x20000100 // GPIO J
|
||||
#define SYSCTL_PERIPH_UDMA 0x20002000 // uDMA
|
||||
#define SYSCTL_PERIPH_USB0 0x20100001 // USB0
|
||||
#define SYSCTL_PERIPH_ETH 0x20105000 // ETH
|
||||
#define SYSCTL_PERIPH_IEEE1588 0x20100100 // IEEE1588
|
||||
#define SYSCTL_PERIPH_PLL 0x30000010 // PLL
|
||||
#define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
|
||||
#define SYSCTL_PERIPH_MPU 0x30000080 // Cortex M3 MPU
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlPinPresent() API
|
||||
// as the ulPin parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_PIN_PWM0 0x00000001 // PWM0 pin
|
||||
#define SYSCTL_PIN_PWM1 0x00000002 // PWM1 pin
|
||||
#define SYSCTL_PIN_PWM2 0x00000004 // PWM2 pin
|
||||
#define SYSCTL_PIN_PWM3 0x00000008 // PWM3 pin
|
||||
#define SYSCTL_PIN_PWM4 0x00000010 // PWM4 pin
|
||||
#define SYSCTL_PIN_PWM5 0x00000020 // PWM5 pin
|
||||
#define SYSCTL_PIN_PWM6 0x00000040 // PWM6 pin
|
||||
#define SYSCTL_PIN_PWM7 0x00000080 // PWM7 pin
|
||||
#define SYSCTL_PIN_C0MINUS 0x00000040 // C0- pin
|
||||
#define SYSCTL_PIN_C0PLUS 0x00000080 // C0+ pin
|
||||
#define SYSCTL_PIN_C0O 0x00000100 // C0o pin
|
||||
#define SYSCTL_PIN_C1MINUS 0x00000200 // C1- pin
|
||||
#define SYSCTL_PIN_C1PLUS 0x00000400 // C1+ pin
|
||||
#define SYSCTL_PIN_C1O 0x00000800 // C1o pin
|
||||
#define SYSCTL_PIN_C2MINUS 0x00001000 // C2- pin
|
||||
#define SYSCTL_PIN_C2PLUS 0x00002000 // C2+ pin
|
||||
#define SYSCTL_PIN_C2O 0x00004000 // C2o pin
|
||||
#define SYSCTL_PIN_MC_FAULT0 0x00008000 // MC0 Fault pin
|
||||
#define SYSCTL_PIN_ADC0 0x00010000 // ADC0 pin
|
||||
#define SYSCTL_PIN_ADC1 0x00020000 // ADC1 pin
|
||||
#define SYSCTL_PIN_ADC2 0x00040000 // ADC2 pin
|
||||
#define SYSCTL_PIN_ADC3 0x00080000 // ADC3 pin
|
||||
#define SYSCTL_PIN_ADC4 0x00100000 // ADC4 pin
|
||||
#define SYSCTL_PIN_ADC5 0x00200000 // ADC5 pin
|
||||
#define SYSCTL_PIN_ADC6 0x00400000 // ADC6 pin
|
||||
#define SYSCTL_PIN_ADC7 0x00800000 // ADC7 pin
|
||||
#define SYSCTL_PIN_CCP0 0x01000000 // CCP0 pin
|
||||
#define SYSCTL_PIN_CCP1 0x02000000 // CCP1 pin
|
||||
#define SYSCTL_PIN_CCP2 0x04000000 // CCP2 pin
|
||||
#define SYSCTL_PIN_CCP3 0x08000000 // CCP3 pin
|
||||
#define SYSCTL_PIN_CCP4 0x10000000 // CCP4 pin
|
||||
#define SYSCTL_PIN_CCP5 0x20000000 // CCP5 pin
|
||||
#define SYSCTL_PIN_32KHZ 0x80000000 // 32kHz pin
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlLDOSet() API as
|
||||
// the ulVoltage value, or returned by the SysCtlLDOGet() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_LDO_2_25V 0x00000005 // LDO output of 2.25V
|
||||
#define SYSCTL_LDO_2_30V 0x00000004 // LDO output of 2.30V
|
||||
#define SYSCTL_LDO_2_35V 0x00000003 // LDO output of 2.35V
|
||||
#define SYSCTL_LDO_2_40V 0x00000002 // LDO output of 2.40V
|
||||
#define SYSCTL_LDO_2_45V 0x00000001 // LDO output of 2.45V
|
||||
#define SYSCTL_LDO_2_50V 0x00000000 // LDO output of 2.50V
|
||||
#define SYSCTL_LDO_2_55V 0x0000001f // LDO output of 2.55V
|
||||
#define SYSCTL_LDO_2_60V 0x0000001e // LDO output of 2.60V
|
||||
#define SYSCTL_LDO_2_65V 0x0000001d // LDO output of 2.65V
|
||||
#define SYSCTL_LDO_2_70V 0x0000001c // LDO output of 2.70V
|
||||
#define SYSCTL_LDO_2_75V 0x0000001b // LDO output of 2.75V
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlLDOConfigSet() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_LDOCFG_ARST 0x00000001 // Allow LDO failure to reset
|
||||
#define SYSCTL_LDOCFG_NORST 0x00000000 // Do not reset on LDO failure
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlIntEnable(),
|
||||
// SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask
|
||||
// by the SysCtlIntStatus() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_INT_MOSC_PUP 0x00000100 // MOSC power-up interrupt
|
||||
#define SYSCTL_INT_USBPLL_LOCK 0x00000080 // USB PLL lock interrupt
|
||||
#define SYSCTL_INT_PLL_LOCK 0x00000040 // PLL lock interrupt
|
||||
#define SYSCTL_INT_CUR_LIMIT 0x00000020 // Current limit interrupt
|
||||
#define SYSCTL_INT_IOSC_FAIL 0x00000010 // Internal oscillator failure int
|
||||
#define SYSCTL_INT_MOSC_FAIL 0x00000008 // Main oscillator failure int
|
||||
#define SYSCTL_INT_POR 0x00000004 // Power on reset interrupt
|
||||
#define SYSCTL_INT_BOR 0x00000002 // Brown out interrupt
|
||||
#define SYSCTL_INT_PLL_FAIL 0x00000001 // PLL failure interrupt
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlResetCauseClear()
|
||||
// API or returned by the SysCtlResetCauseGet() API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_CAUSE_LDO 0x00000020 // LDO power not OK reset
|
||||
#define SYSCTL_CAUSE_SW 0x00000010 // Software reset
|
||||
#define SYSCTL_CAUSE_WDOG 0x00000008 // Watchdog reset
|
||||
#define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset
|
||||
#define SYSCTL_CAUSE_POR 0x00000002 // Power on reset
|
||||
#define SYSCTL_CAUSE_EXT 0x00000001 // External reset
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlBrownOutConfigSet()
|
||||
// API as the ulConfig parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_BOR_RESET 0x00000002 // Reset instead of interrupting
|
||||
#define SYSCTL_BOR_RESAMPLE 0x00000001 // Resample BOR before asserting
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlPWMClockSet() API
|
||||
// as the ulConfig parameter, and can be returned by the SysCtlPWMClockGet()
|
||||
// API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_PWMDIV_1 0x00000000 // PWM clock is processor clock /1
|
||||
#define SYSCTL_PWMDIV_2 0x00100000 // PWM clock is processor clock /2
|
||||
#define SYSCTL_PWMDIV_4 0x00120000 // PWM clock is processor clock /4
|
||||
#define SYSCTL_PWMDIV_8 0x00140000 // PWM clock is processor clock /8
|
||||
#define SYSCTL_PWMDIV_16 0x00160000 // PWM clock is processor clock /16
|
||||
#define SYSCTL_PWMDIV_32 0x00180000 // PWM clock is processor clock /32
|
||||
#define SYSCTL_PWMDIV_64 0x001A0000 // PWM clock is processor clock /64
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlADCSpeedSet() API
|
||||
// as the ulSpeed parameter, and can be returned by the SyCtlADCSpeedGet()
|
||||
// API.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_ADCSPEED_1MSPS 0x00000F00 // 1,000,000 samples per second
|
||||
#define SYSCTL_ADCSPEED_500KSPS 0x00000A00 // 500,000 samples per second
|
||||
#define SYSCTL_ADCSPEED_250KSPS 0x00000500 // 250,000 samples per second
|
||||
#define SYSCTL_ADCSPEED_125KSPS 0x00000000 // 125,000 samples per second
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The following are values that can be passed to the SysCtlClockSet() API as
|
||||
// the ulConfig parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define SYSCTL_SYSDIV_1 0x07800000 // Processor clock is osc/pll /1
|
||||
#define SYSCTL_SYSDIV_2 0x00C00000 // Processor clock is osc/pll /2
|
||||
#define SYSCTL_SYSDIV_3 0x01400000 // Processor clock is osc/pll /3
|
||||
#define SYSCTL_SYSDIV_4 0x01C00000 // Processor clock is osc/pll /4
|
||||
#define SYSCTL_SYSDIV_5 0x02400000 // Processor clock is osc/pll /5
|
||||
#define SYSCTL_SYSDIV_6 0x02C00000 // Processor clock is osc/pll /6
|
||||
#define SYSCTL_SYSDIV_7 0x03400000 // Processor clock is osc/pll /7
|
||||
#define SYSCTL_SYSDIV_8 0x03C00000 // Processor clock is osc/pll /8
|
||||
#define SYSCTL_SYSDIV_9 0x04400000 // Processor clock is osc/pll /9
|
||||
#define SYSCTL_SYSDIV_10 0x04C00000 // Processor clock is osc/pll /10
|
||||
#define SYSCTL_SYSDIV_11 0x05400000 // Processor clock is osc/pll /11
|
||||
#define SYSCTL_SYSDIV_12 0x05C00000 // Processor clock is osc/pll /12
|
||||
#define SYSCTL_SYSDIV_13 0x06400000 // Processor clock is osc/pll /13
|
||||
#define SYSCTL_SYSDIV_14 0x06C00000 // Processor clock is osc/pll /14
|
||||
#define SYSCTL_SYSDIV_15 0x07400000 // Processor clock is osc/pll /15
|
||||
#define SYSCTL_SYSDIV_16 0x07C00000 // Processor clock is osc/pll /16
|
||||
#define SYSCTL_SYSDIV_17 0x88400000 // Processor clock is osc/pll /17
|
||||
#define SYSCTL_SYSDIV_18 0x88C00000 // Processor clock is osc/pll /18
|
||||
#define SYSCTL_SYSDIV_19 0x89400000 // Processor clock is osc/pll /19
|
||||
#define SYSCTL_SYSDIV_20 0x89C00000 // Processor clock is osc/pll /20
|
||||
#define SYSCTL_SYSDIV_21 0x8A400000 // Processor clock is osc/pll /21
|
||||
#define SYSCTL_SYSDIV_22 0x8AC00000 // Processor clock is osc/pll /22
|
||||
#define SYSCTL_SYSDIV_23 0x8B400000 // Processor clock is osc/pll /23
|
||||
#define SYSCTL_SYSDIV_24 0x8BC00000 // Processor clock is osc/pll /24
|
||||
#define SYSCTL_SYSDIV_25 0x8C400000 // Processor clock is osc/pll /25
|
||||
#define SYSCTL_SYSDIV_26 0x8CC00000 // Processor clock is osc/pll /26
|
||||
#define SYSCTL_SYSDIV_27 0x8D400000 // Processor clock is osc/pll /27
|
||||
#define SYSCTL_SYSDIV_28 0x8DC00000 // Processor clock is osc/pll /28
|
||||
#define SYSCTL_SYSDIV_29 0x8E400000 // Processor clock is osc/pll /29
|
||||
#define SYSCTL_SYSDIV_30 0x8EC00000 // Processor clock is osc/pll /30
|
||||
#define SYSCTL_SYSDIV_31 0x8F400000 // Processor clock is osc/pll /31
|
||||
#define SYSCTL_SYSDIV_32 0x8FC00000 // Processor clock is osc/pll /32
|
||||
#define SYSCTL_SYSDIV_33 0x90400000 // Processor clock is osc/pll /33
|
||||
#define SYSCTL_SYSDIV_34 0x90C00000 // Processor clock is osc/pll /34
|
||||
#define SYSCTL_SYSDIV_35 0x91400000 // Processor clock is osc/pll /35
|
||||
#define SYSCTL_SYSDIV_36 0x91C00000 // Processor clock is osc/pll /36
|
||||
#define SYSCTL_SYSDIV_37 0x92400000 // Processor clock is osc/pll /37
|
||||
#define SYSCTL_SYSDIV_38 0x92C00000 // Processor clock is osc/pll /38
|
||||
#define SYSCTL_SYSDIV_39 0x93400000 // Processor clock is osc/pll /39
|
||||
#define SYSCTL_SYSDIV_40 0x93C00000 // Processor clock is osc/pll /40
|
||||
#define SYSCTL_SYSDIV_41 0x94400000 // Processor clock is osc/pll /41
|
||||
#define SYSCTL_SYSDIV_42 0x94C00000 // Processor clock is osc/pll /42
|
||||
#define SYSCTL_SYSDIV_43 0x95400000 // Processor clock is osc/pll /43
|
||||
#define SYSCTL_SYSDIV_44 0x95C00000 // Processor clock is osc/pll /44
|
||||
#define SYSCTL_SYSDIV_45 0x96400000 // Processor clock is osc/pll /45
|
||||
#define SYSCTL_SYSDIV_46 0x96C00000 // Processor clock is osc/pll /46
|
||||
#define SYSCTL_SYSDIV_47 0x97400000 // Processor clock is osc/pll /47
|
||||
#define SYSCTL_SYSDIV_48 0x97C00000 // Processor clock is osc/pll /48
|
||||
#define SYSCTL_SYSDIV_49 0x98400000 // Processor clock is osc/pll /49
|
||||
#define SYSCTL_SYSDIV_50 0x98C00000 // Processor clock is osc/pll /50
|
||||
#define SYSCTL_SYSDIV_51 0x99400000 // Processor clock is osc/pll /51
|
||||
#define SYSCTL_SYSDIV_52 0x99C00000 // Processor clock is osc/pll /52
|
||||
#define SYSCTL_SYSDIV_53 0x9A400000 // Processor clock is osc/pll /53
|
||||
#define SYSCTL_SYSDIV_54 0x9AC00000 // Processor clock is osc/pll /54
|
||||
#define SYSCTL_SYSDIV_55 0x9B400000 // Processor clock is osc/pll /55
|
||||
#define SYSCTL_SYSDIV_56 0x9BC00000 // Processor clock is osc/pll /56
|
||||
#define SYSCTL_SYSDIV_57 0x9C400000 // Processor clock is osc/pll /57
|
||||
#define SYSCTL_SYSDIV_58 0x9CC00000 // Processor clock is osc/pll /58
|
||||
#define SYSCTL_SYSDIV_59 0x9D400000 // Processor clock is osc/pll /59
|
||||
#define SYSCTL_SYSDIV_60 0x9DC00000 // Processor clock is osc/pll /60
|
||||
#define SYSCTL_SYSDIV_61 0x9E400000 // Processor clock is osc/pll /61
|
||||
#define SYSCTL_SYSDIV_62 0x9EC00000 // Processor clock is osc/pll /62
|
||||
#define SYSCTL_SYSDIV_63 0x9F400000 // Processor clock is osc/pll /63
|
||||
#define SYSCTL_SYSDIV_64 0x9FC00000 // Processor clock is osc/pll /64
|
||||
#define SYSCTL_SYSDIV_2_5 0xC1000000 // Processor clock is pll / 2.5
|
||||
#define SYSCTL_SYSDIV_3_5 0xC1800000 // Processor clock is pll / 3.5
|
||||
#define SYSCTL_SYSDIV_4_5 0xC2000000 // Processor clock is pll / 4.5
|
||||
#define SYSCTL_SYSDIV_5_5 0xC2800000 // Processor clock is pll / 5.5
|
||||
#define SYSCTL_SYSDIV_6_5 0xC3000000 // Processor clock is pll / 6.5
|
||||
#define SYSCTL_SYSDIV_7_5 0xC3800000 // Processor clock is pll / 7.5
|
||||
#define SYSCTL_SYSDIV_8_5 0xC4000000 // Processor clock is pll / 8.5
|
||||
#define SYSCTL_SYSDIV_9_5 0xC4800000 // Processor clock is pll / 9.5
|
||||
#define SYSCTL_SYSDIV_10_5 0xC5000000 // Processor clock is pll / 10.5
|
||||
#define SYSCTL_SYSDIV_11_5 0xC5800000 // Processor clock is pll / 11.5
|
||||
#define SYSCTL_SYSDIV_12_5 0xC6000000 // Processor clock is pll / 12.5
|
||||
#define SYSCTL_SYSDIV_13_5 0xC6800000 // Processor clock is pll / 13.5
|
||||
#define SYSCTL_SYSDIV_14_5 0xC7000000 // Processor clock is pll / 14.5
|
||||
#define SYSCTL_SYSDIV_15_5 0xC7800000 // Processor clock is pll / 15.5
|
||||
#define SYSCTL_SYSDIV_16_5 0xC8000000 // Processor clock is pll / 16.5
|
||||
#define SYSCTL_SYSDIV_17_5 0xC8800000 // Processor clock is pll / 17.5
|
||||
#define SYSCTL_SYSDIV_18_5 0xC9000000 // Processor clock is pll / 18.5
|
||||
#define SYSCTL_SYSDIV_19_5 0xC9800000 // Processor clock is pll / 19.5
|
||||
#define SYSCTL_SYSDIV_20_5 0xCA000000 // Processor clock is pll / 20.5
|
||||
#define SYSCTL_SYSDIV_21_5 0xCA800000 // Processor clock is pll / 21.5
|
||||
#define SYSCTL_SYSDIV_22_5 0xCB000000 // Processor clock is pll / 22.5
|
||||
#define SYSCTL_SYSDIV_23_5 0xCB800000 // Processor clock is pll / 23.5
|
||||
#define SYSCTL_SYSDIV_24_5 0xCC000000 // Processor clock is pll / 24.5
|
||||
#define SYSCTL_SYSDIV_25_5 0xCC800000 // Processor clock is pll / 25.5
|
||||
#define SYSCTL_SYSDIV_26_5 0xCD000000 // Processor clock is pll / 26.5
|
||||
#define SYSCTL_SYSDIV_27_5 0xCD800000 // Processor clock is pll / 27.5
|
||||
#define SYSCTL_SYSDIV_28_5 0xCE000000 // Processor clock is pll / 28.5
|
||||
#define SYSCTL_SYSDIV_29_5 0xCE800000 // Processor clock is pll / 29.5
|
||||
#define SYSCTL_SYSDIV_30_5 0xCF000000 // Processor clock is pll / 30.5
|
||||
#define SYSCTL_SYSDIV_31_5 0xCF800000 // Processor clock is pll / 31.5
|
||||
#define SYSCTL_SYSDIV_32_5 0xD0000000 // Processor clock is pll / 32.5
|
||||
#define SYSCTL_SYSDIV_33_5 0xD0800000 // Processor clock is pll / 33.5
|
||||
#define SYSCTL_SYSDIV_34_5 0xD1000000 // Processor clock is pll / 34.5
|
||||
#define SYSCTL_SYSDIV_35_5 0xD1800000 // Processor clock is pll / 35.5
|
||||
#define SYSCTL_SYSDIV_36_5 0xD2000000 // Processor clock is pll / 36.5
|
||||
#define SYSCTL_SYSDIV_37_5 0xD2800000 // Processor clock is pll / 37.5
|
||||
#define SYSCTL_SYSDIV_38_5 0xD3000000 // Processor clock is pll / 38.5
|
||||
#define SYSCTL_SYSDIV_39_5 0xD3800000 // Processor clock is pll / 39.5
|
||||
#define SYSCTL_SYSDIV_40_5 0xD4000000 // Processor clock is pll / 40.5
|
||||
#define SYSCTL_SYSDIV_41_5 0xD4800000 // Processor clock is pll / 41.5
|
||||
#define SYSCTL_SYSDIV_42_5 0xD5000000 // Processor clock is pll / 42.5
|
||||
#define SYSCTL_SYSDIV_43_5 0xD5800000 // Processor clock is pll / 43.5
|
||||
#define SYSCTL_SYSDIV_44_5 0xD6000000 // Processor clock is pll / 44.5
|
||||
#define SYSCTL_SYSDIV_45_5 0xD6800000 // Processor clock is pll / 45.5
|
||||
#define SYSCTL_SYSDIV_46_5 0xD7000000 // Processor clock is pll / 46.5
|
||||
#define SYSCTL_SYSDIV_47_5 0xD7800000 // Processor clock is pll / 47.5
|
||||
#define SYSCTL_SYSDIV_48_5 0xD8000000 // Processor clock is pll / 48.5
|
||||
#define SYSCTL_SYSDIV_49_5 0xD8800000 // Processor clock is pll / 49.5
|
||||
#define SYSCTL_SYSDIV_50_5 0xD9000000 // Processor clock is pll / 50.5
|
||||
#define SYSCTL_SYSDIV_51_5 0xD9800000 // Processor clock is pll / 51.5
|
||||
#define SYSCTL_SYSDIV_52_5 0xDA000000 // Processor clock is pll / 52.5
|
||||
#define SYSCTL_SYSDIV_53_5 0xDA800000 // Processor clock is pll / 53.5
|
||||
#define SYSCTL_SYSDIV_54_5 0xDB000000 // Processor clock is pll / 54.5
|
||||
#define SYSCTL_SYSDIV_55_5 0xDB800000 // Processor clock is pll / 55.5
|
||||
#define SYSCTL_SYSDIV_56_5 0xDC000000 // Processor clock is pll / 56.5
|
||||
#define SYSCTL_SYSDIV_57_5 0xDC800000 // Processor clock is pll / 57.5
|
||||
#define SYSCTL_SYSDIV_58_5 0xDD000000 // Processor clock is pll / 58.5
|
||||
#define SYSCTL_SYSDIV_59_5 0xDD800000 // Processor clock is pll / 59.5
|
||||
#define SYSCTL_SYSDIV_60_5 0xDE000000 // Processor clock is pll / 60.5
|
||||
#define SYSCTL_SYSDIV_61_5 0xDE800000 // Processor clock is pll / 61.5
|
||||
#define SYSCTL_SYSDIV_62_5 0xDF000000 // Processor clock is pll / 62.5
|
||||
#define SYSCTL_SYSDIV_63_5 0xDF800000 // Processor clock is pll / 63.5
|
||||
#define SYSCTL_USE_PLL 0x00000000 // System clock is the PLL clock
|
||||
#define SYSCTL_USE_OSC 0x00003800 // System clock is the osc clock
|
||||
#define SYSCTL_XTAL_1MHZ 0x00000000 // External crystal is 1MHz
|
||||
#define SYSCTL_XTAL_1_84MHZ 0x00000040 // External crystal is 1.8432MHz
|
||||
#define SYSCTL_XTAL_2MHZ 0x00000080 // External crystal is 2MHz
|
||||
#define SYSCTL_XTAL_2_45MHZ 0x000000C0 // External crystal is 2.4576MHz
|
||||
#define SYSCTL_XTAL_3_57MHZ 0x00000100 // External crystal is 3.579545MHz
|
||||
#define SYSCTL_XTAL_3_68MHZ 0x00000140 // External crystal is 3.6864MHz
|
||||
#define SYSCTL_XTAL_4MHZ 0x00000180 // External crystal is 4MHz
|
||||
#define SYSCTL_XTAL_4_09MHZ 0x000001C0 // External crystal is 4.096MHz
|
||||
#define SYSCTL_XTAL_4_91MHZ 0x00000200 // External crystal is 4.9152MHz
|
||||
#define SYSCTL_XTAL_5MHZ 0x00000240 // External crystal is 5MHz
|
||||
#define SYSCTL_XTAL_5_12MHZ 0x00000280 // External crystal is 5.12MHz
|
||||
#define SYSCTL_XTAL_6MHZ 0x000002C0 // External crystal is 6MHz
|
||||
#define SYSCTL_XTAL_6_14MHZ 0x00000300 // External crystal is 6.144MHz
|
||||
#define SYSCTL_XTAL_7_37MHZ 0x00000340 // External crystal is 7.3728MHz
|
||||
#define SYSCTL_XTAL_8MHZ 0x00000380 // External crystal is 8MHz
|
||||
#define SYSCTL_XTAL_8_19MHZ 0x000003C0 // External crystal is 8.192MHz
|
||||
#define SYSCTL_XTAL_10MHZ 0x00000400 // External crystal is 10 MHz
|
||||
#define SYSCTL_XTAL_12MHZ 0x00000440 // External crystal is 12 MHz
|
||||
#define SYSCTL_XTAL_12_2MHZ 0x00000480 // External crystal is 12.288 MHz
|
||||
#define SYSCTL_XTAL_13_5MHZ 0x000004C0 // External crystal is 13.56 MHz
|
||||
#define SYSCTL_XTAL_14_3MHZ 0x00000500 // External crystal is 14.31818 MHz
|
||||
#define SYSCTL_XTAL_16MHZ 0x00000540 // External crystal is 16 MHz
|
||||
#define SYSCTL_XTAL_16_3MHZ 0x00000580 // External crystal is 16.384 MHz
|
||||
#define SYSCTL_OSC_MAIN 0x00000000 // Osc source is main osc
|
||||
#define SYSCTL_OSC_INT 0x00000010 // Osc source is int. osc
|
||||
#define SYSCTL_OSC_INT4 0x00000020 // Osc source is int. osc /4
|
||||
#define SYSCTL_OSC_INT30 0x00000030 // Osc source is int. 30 KHz
|
||||
#define SYSCTL_OSC_EXT4_19 0x80000028 // Osc source is ext. 4.19 MHz
|
||||
#define SYSCTL_OSC_EXT32 0x80000038 // Osc source is ext. 32 KHz
|
||||
#define SYSCTL_INT_PIOSC_DIS 0x00000004 // Disable interal precision osc.
|
||||
#define SYSCTL_INT_OSC_DIS 0x00000002 // Disable internal oscillator
|
||||
#define SYSCTL_MAIN_OSC_DIS 0x00000001 // Disable main oscillator
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern unsigned long SysCtlSRAMSizeGet(void);
|
||||
extern unsigned long SysCtlFlashSizeGet(void);
|
||||
extern tBoolean SysCtlPinPresent(unsigned long ulPin);
|
||||
extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);
|
||||
extern void SysCtlPeripheralClockGating(tBoolean bEnable);
|
||||
extern void SysCtlIntRegister(void (*pfnHandler)(void));
|
||||
extern void SysCtlIntUnregister(void);
|
||||
extern void SysCtlIntEnable(unsigned long ulInts);
|
||||
extern void SysCtlIntDisable(unsigned long ulInts);
|
||||
extern void SysCtlIntClear(unsigned long ulInts);
|
||||
extern unsigned long SysCtlIntStatus(tBoolean bMasked);
|
||||
extern void SysCtlLDOSet(unsigned long ulVoltage);
|
||||
extern unsigned long SysCtlLDOGet(void);
|
||||
extern void SysCtlLDOConfigSet(unsigned long ulConfig);
|
||||
extern void SysCtlReset(void);
|
||||
extern void SysCtlSleep(void);
|
||||
extern void SysCtlDeepSleep(void);
|
||||
extern unsigned long SysCtlResetCauseGet(void);
|
||||
extern void SysCtlResetCauseClear(unsigned long ulCauses);
|
||||
extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
|
||||
unsigned long ulDelay);
|
||||
extern void SysCtlDelay(unsigned long ulCount);
|
||||
extern void SysCtlClockSet(unsigned long ulConfig);
|
||||
extern unsigned long SysCtlClockGet(void);
|
||||
extern void SysCtlPWMClockSet(unsigned long ulConfig);
|
||||
extern unsigned long SysCtlPWMClockGet(void);
|
||||
extern void SysCtlADCSpeedSet(unsigned long ulSpeed);
|
||||
extern unsigned long SysCtlADCSpeedGet(void);
|
||||
extern void SysCtlIOSCVerificationSet(tBoolean bEnable);
|
||||
extern void SysCtlMOSCVerificationSet(tBoolean bEnable);
|
||||
extern void SysCtlPLLVerificationSet(tBoolean bEnable);
|
||||
extern void SysCtlClkVerificationClear(void);
|
||||
extern void SysCtlGPIOAHBEnable(unsigned long ulGPIOPeripheral);
|
||||
extern void SysCtlGPIOAHBDisable(unsigned long ulGPIOPeripheral);
|
||||
extern void SysCtlUSBPLLEnable(void);
|
||||
extern void SysCtlUSBPLLDisable(void);
|
||||
extern unsigned long SysCtlI2SMClkSet(unsigned long ulInputClock,
|
||||
unsigned long ulMClk);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __SYSCTL_H__
|
||||
@@ -0,0 +1,259 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// systick.c - Driver for the SysTick timer in NVIC.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup systick_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#include "inc/hw_ints.h"
|
||||
#include "inc/hw_nvic.h"
|
||||
#include "inc/hw_types.h"
|
||||
#include "driverlib/debug.h"
|
||||
#include "driverlib/interrupt.h"
|
||||
#include "driverlib/systick.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the SysTick counter.
|
||||
//!
|
||||
//! This will start the SysTick counter. If an interrupt handler has been
|
||||
//! registered, it will be called when the SysTick counter rolls over.
|
||||
//!
|
||||
//! \note Calling this function will cause the SysTick counter to (re)commence
|
||||
//! counting from its current value. The counter is not automatically reloaded
|
||||
//! with the period as specified in a previous call to SysTickPeriodSet(). If
|
||||
//! an immediate reload is required, the \b NVIC_ST_CURRENT register must be
|
||||
//! written to force this. Any write to this register clears the SysTick
|
||||
//! counter to 0 and will cause a reload with the supplied period on the next
|
||||
//! clock.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
SysTickEnable(void)
|
||||
{
|
||||
//
|
||||
// Enable SysTick.
|
||||
//
|
||||
HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the SysTick counter.
|
||||
//!
|
||||
//! This will stop the SysTick counter. If an interrupt handler has been
|
||||
//! registered, it will no longer be called until SysTick is restarted.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
SysTickDisable(void)
|
||||
{
|
||||
//
|
||||
// Disable SysTick.
|
||||
//
|
||||
HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_ENABLE);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Registers an interrupt handler for the SysTick interrupt.
|
||||
//!
|
||||
//! \param pfnHandler is a pointer to the function to be called when the
|
||||
//! SysTick interrupt occurs.
|
||||
//!
|
||||
//! This sets the handler to be called when a SysTick interrupt occurs.
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
SysTickIntRegister(void (*pfnHandler)(void))
|
||||
{
|
||||
//
|
||||
// Register the interrupt handler, returning an error if an error occurs.
|
||||
//
|
||||
IntRegister(FAULT_SYSTICK, pfnHandler);
|
||||
|
||||
//
|
||||
// Enable the SysTick interrupt.
|
||||
//
|
||||
HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Unregisters the interrupt handler for the SysTick interrupt.
|
||||
//!
|
||||
//! This function will clear the handler to be called when a SysTick interrupt
|
||||
//! occurs.
|
||||
//!
|
||||
//! \sa IntRegister() for important information about registering interrupt
|
||||
//! handlers.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
SysTickIntUnregister(void)
|
||||
{
|
||||
//
|
||||
// Disable the SysTick interrupt.
|
||||
//
|
||||
HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
|
||||
|
||||
//
|
||||
// Unregister the interrupt handler.
|
||||
//
|
||||
IntUnregister(FAULT_SYSTICK);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Enables the SysTick interrupt.
|
||||
//!
|
||||
//! This function will enable the SysTick interrupt, allowing it to be
|
||||
//! reflected to the processor.
|
||||
//!
|
||||
//! \note The SysTick interrupt handler does not need to clear the SysTick
|
||||
//! interrupt source as this is done automatically by NVIC when the interrupt
|
||||
//! handler is called.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
SysTickIntEnable(void)
|
||||
{
|
||||
//
|
||||
// Enable the SysTick interrupt.
|
||||
//
|
||||
HWREG(NVIC_ST_CTRL) |= NVIC_ST_CTRL_INTEN;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Disables the SysTick interrupt.
|
||||
//!
|
||||
//! This function will disable the SysTick interrupt, preventing it from being
|
||||
//! reflected to the processor.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
SysTickIntDisable(void)
|
||||
{
|
||||
//
|
||||
// Disable the SysTick interrupt.
|
||||
//
|
||||
HWREG(NVIC_ST_CTRL) &= ~(NVIC_ST_CTRL_INTEN);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Sets the period of the SysTick counter.
|
||||
//!
|
||||
//! \param ulPeriod is the number of clock ticks in each period of the SysTick
|
||||
//! counter; must be between 1 and 16,777,216, inclusive.
|
||||
//!
|
||||
//! This function sets the rate at which the SysTick counter wraps; this
|
||||
//! equates to the number of processor clocks between interrupts.
|
||||
//!
|
||||
//! \note Calling this function does not cause the SysTick counter to reload
|
||||
//! immediately. If an immediate reload is required, the \b NVIC_ST_CURRENT
|
||||
//! register must be written. Any write to this register clears the SysTick
|
||||
//! counter to 0 and will cause a reload with the \e ulPeriod supplied here on
|
||||
//! the next clock after the SysTick is enabled.
|
||||
//!
|
||||
//! \return None.
|
||||
//
|
||||
//*****************************************************************************
|
||||
void
|
||||
SysTickPeriodSet(unsigned long ulPeriod)
|
||||
{
|
||||
//
|
||||
// Check the arguments.
|
||||
//
|
||||
ASSERT((ulPeriod > 0) && (ulPeriod <= 16777216));
|
||||
|
||||
//
|
||||
// Set the period of the SysTick counter.
|
||||
//
|
||||
HWREG(NVIC_ST_RELOAD) = ulPeriod - 1;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the period of the SysTick counter.
|
||||
//!
|
||||
//! This function returns the rate at which the SysTick counter wraps; this
|
||||
//! equates to the number of processor clocks between interrupts.
|
||||
//!
|
||||
//! \return Returns the period of the SysTick counter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
unsigned long
|
||||
SysTickPeriodGet(void)
|
||||
{
|
||||
//
|
||||
// Return the period of the SysTick counter.
|
||||
//
|
||||
return(HWREG(NVIC_ST_RELOAD) + 1);
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! Gets the current value of the SysTick counter.
|
||||
//!
|
||||
//! This function returns the current value of the SysTick counter; this will
|
||||
//! be a value between the period - 1 and zero, inclusive.
|
||||
//!
|
||||
//! \return Returns the current value of the SysTick counter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
unsigned long
|
||||
SysTickValueGet(void)
|
||||
{
|
||||
//
|
||||
// Return the current value of the SysTick counter.
|
||||
//
|
||||
return(HWREG(NVIC_ST_CURRENT));
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Close the Doxygen group.
|
||||
//! @}
|
||||
//
|
||||
//*****************************************************************************
|
||||
@@ -0,0 +1,63 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// systick.h - Prototypes for the SysTick driver.
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __SYSTICK_H__
|
||||
#define __SYSTICK_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void SysTickEnable(void);
|
||||
extern void SysTickDisable(void);
|
||||
extern void SysTickIntRegister(void (*pfnHandler)(void));
|
||||
extern void SysTickIntUnregister(void);
|
||||
extern void SysTickIntEnable(void);
|
||||
extern void SysTickIntDisable(void);
|
||||
extern void SysTickPeriodSet(unsigned long ulPeriod);
|
||||
extern unsigned long SysTickPeriodGet(void);
|
||||
extern unsigned long SysTickValueGet(void);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __SYSTICK_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,165 @@
|
||||
//*****************************************************************************
|
||||
//
|
||||
// timer.h - Prototypes for the timer module
|
||||
//
|
||||
// Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Texas Instruments (TI) is supplying this software for use solely and
|
||||
// exclusively on TI's microcontroller products. The software is owned by
|
||||
// TI and/or its suppliers, and is protected under applicable copyright
|
||||
// laws. You may not combine this software with "viral" open-source
|
||||
// software in order to form a larger program.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
|
||||
// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
|
||||
// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
|
||||
// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
|
||||
// DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
//
|
||||
// This is part of revision 6459 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __TIMER_H__
|
||||
#define __TIMER_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// If building with a C++ compiler, make all of the definitions in this header
|
||||
// have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to TimerConfigure as the ulConfig parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define TIMER_CFG_32_BIT_OS 0x00000001 // 32-bit one-shot timer
|
||||
#define TIMER_CFG_32_BIT_OS_UP 0x00000011 // 32-bit one-shot up-count timer
|
||||
#define TIMER_CFG_32_BIT_PER 0x00000002 // 32-bit periodic timer
|
||||
#define TIMER_CFG_32_BIT_PER_UP 0x00000012 // 32-bit periodic up-count timer
|
||||
#define TIMER_CFG_32_RTC 0x01000000 // 32-bit RTC timer
|
||||
#define TIMER_CFG_16_BIT_PAIR 0x04000000 // Two 16-bit timers
|
||||
#define TIMER_CFG_A_ONE_SHOT 0x00000001 // Timer A one-shot timer
|
||||
#define TIMER_CFG_A_ONE_SHOT_UP 0x00000011 // Timer A one-shot up-count timer
|
||||
#define TIMER_CFG_A_PERIODIC 0x00000002 // Timer A periodic timer
|
||||
#define TIMER_CFG_A_PERIODIC_UP 0x00000012 // Timer A periodic up-count timer
|
||||
#define TIMER_CFG_A_CAP_COUNT 0x00000003 // Timer A event counter
|
||||
#define TIMER_CFG_A_CAP_TIME 0x00000007 // Timer A event timer
|
||||
#define TIMER_CFG_A_PWM 0x0000000A // Timer A PWM output
|
||||
#define TIMER_CFG_B_ONE_SHOT 0x00000100 // Timer B one-shot timer
|
||||
#define TIMER_CFG_B_ONE_SHOT_UP 0x00001100 // Timer B one-shot up-count timer
|
||||
#define TIMER_CFG_B_PERIODIC 0x00000200 // Timer B periodic timer
|
||||
#define TIMER_CFG_B_PERIODIC_UP 0x00001200 // Timer B periodic up-count timer
|
||||
#define TIMER_CFG_B_CAP_COUNT 0x00000300 // Timer B event counter
|
||||
#define TIMER_CFG_B_CAP_TIME 0x00000700 // Timer B event timer
|
||||
#define TIMER_CFG_B_PWM 0x00000A00 // Timer B PWM output
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to TimerIntEnable, TimerIntDisable, and
|
||||
// TimerIntClear as the ulIntFlags parameter, and returned from TimerIntStatus.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define TIMER_TIMB_MATCH 0x00000800 // TimerB match interrupt
|
||||
#define TIMER_CAPB_EVENT 0x00000400 // CaptureB event interrupt
|
||||
#define TIMER_CAPB_MATCH 0x00000200 // CaptureB match interrupt
|
||||
#define TIMER_TIMB_TIMEOUT 0x00000100 // TimerB time out interrupt
|
||||
#define TIMER_TIMA_MATCH 0x00000010 // TimerA match interrupt
|
||||
#define TIMER_RTC_MATCH 0x00000008 // RTC interrupt mask
|
||||
#define TIMER_CAPA_EVENT 0x00000004 // CaptureA event interrupt
|
||||
#define TIMER_CAPA_MATCH 0x00000002 // CaptureA match interrupt
|
||||
#define TIMER_TIMA_TIMEOUT 0x00000001 // TimerA time out interrupt
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to TimerControlEvent as the ulEvent parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define TIMER_EVENT_POS_EDGE 0x00000000 // Count positive edges
|
||||
#define TIMER_EVENT_NEG_EDGE 0x00000404 // Count negative edges
|
||||
#define TIMER_EVENT_BOTH_EDGES 0x00000C0C // Count both edges
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Values that can be passed to most of the timer APIs as the ulTimer
|
||||
// parameter.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define TIMER_A 0x000000ff // Timer A
|
||||
#define TIMER_B 0x0000ff00 // Timer B
|
||||
#define TIMER_BOTH 0x0000ffff // Timer Both
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Prototypes for the APIs.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void TimerEnable(unsigned long ulBase, unsigned long ulTimer);
|
||||
extern void TimerDisable(unsigned long ulBase, unsigned long ulTimer);
|
||||
extern void TimerConfigure(unsigned long ulBase, unsigned long ulConfig);
|
||||
extern void TimerControlLevel(unsigned long ulBase, unsigned long ulTimer,
|
||||
tBoolean bInvert);
|
||||
extern void TimerControlTrigger(unsigned long ulBase, unsigned long ulTimer,
|
||||
tBoolean bEnable);
|
||||
extern void TimerControlEvent(unsigned long ulBase, unsigned long ulTimer,
|
||||
unsigned long ulEvent);
|
||||
extern void TimerControlStall(unsigned long ulBase, unsigned long ulTimer,
|
||||
tBoolean bStall);
|
||||
extern void TimerControlWaitOnTrigger(unsigned long ulBase,
|
||||
unsigned long ulTimer,
|
||||
tBoolean bWait);
|
||||
extern void TimerRTCEnable(unsigned long ulBase);
|
||||
extern void TimerRTCDisable(unsigned long ulBase);
|
||||
extern void TimerPrescaleSet(unsigned long ulBase, unsigned long ulTimer,
|
||||
unsigned long ulValue);
|
||||
extern unsigned long TimerPrescaleGet(unsigned long ulBase,
|
||||
unsigned long ulTimer);
|
||||
extern void TimerPrescaleMatchSet(unsigned long ulBase, unsigned long ulTimer,
|
||||
unsigned long ulValue);
|
||||
extern unsigned long TimerPrescaleMatchGet(unsigned long ulBase,
|
||||
unsigned long ulTimer);
|
||||
extern void TimerLoadSet(unsigned long ulBase, unsigned long ulTimer,
|
||||
unsigned long ulValue);
|
||||
extern unsigned long TimerLoadGet(unsigned long ulBase, unsigned long ulTimer);
|
||||
extern unsigned long TimerValueGet(unsigned long ulBase,
|
||||
unsigned long ulTimer);
|
||||
extern void TimerMatchSet(unsigned long ulBase, unsigned long ulTimer,
|
||||
unsigned long ulValue);
|
||||
extern unsigned long TimerMatchGet(unsigned long ulBase,
|
||||
unsigned long ulTimer);
|
||||
extern void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer,
|
||||
void (*pfnHandler)(void));
|
||||
extern void TimerIntUnregister(unsigned long ulBase, unsigned long ulTimer);
|
||||
extern void TimerIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void TimerIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern unsigned long TimerIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void TimerIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// TimerQuiesce() has been deprecated. SysCtlPeripheralReset() should be used
|
||||
// instead to return the timer to its reset state.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
extern void TimerQuiesce(unsigned long ulBase);
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __TIMER_H__
|
||||
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Reference in New Issue
Block a user