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https://github.com/RT-Thread/rt-thread.git
synced 2026-11-08 14:43:04 +08:00
update(cherryusb): update to v1.5.1
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Signed-off-by: sakumisu <1203593632@qq.com>
This commit is contained in:
1 parent
53fcd9d085
commit
5e03e07c43
34 files changed
+2196
-701
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@@ -52,6 +52,8 @@ if CHERRYUSB
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bool "musb_sunxi"
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config CHERRYUSB_DEVICE_MUSB_BK
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bool "musb_bk"
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config CHERRYUSB_DEVICE_MUSB_SIFLI
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bool "musb_sifli"
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config CHERRYUSB_DEVICE_MUSB_CUSTOM
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bool "musb_custom"
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config CHERRYUSB_DEVICE_CHIPIDEA_MCX
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@@ -123,7 +125,6 @@ if CHERRYUSB
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prompt "Enable usb mtp device, it is commercial charge"
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default n
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config CHERRYUSB_DEVICE_ADB
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bool
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prompt "Enable usb adb device"
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@@ -134,45 +135,99 @@ if CHERRYUSB
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prompt "Enable usb dfu device"
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default n
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config USBDEV_REQUEST_BUFFER_LEN
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int
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prompt "Set device control transfer max buffer size"
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default 512
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config USBDEV_MSC_MAX_BUFSIZE
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int
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prompt "Set usb msc device max buffer size"
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default 512
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help
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Set the maximum buffer size for usb msc device, it is used to transfer data.
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you can change it to a larger value if you need larger speed but must be a power of blocksize.
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config USBDEV_RNDIS_USING_LWIP
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bool
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prompt "Enable usb rndis device with lwip for lan"
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default n
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config USBDEV_CDC_ECM_USING_LWIP
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bool
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prompt "Enable usb cdc ecm device with lwip for lan"
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default n
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choice
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prompt "Select usb device template"
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prompt "Select usb device template, please select class driver first"
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default CHERRYUSB_DEVICE_TEMPLATE_NONE
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config CHERRYUSB_DEVICE_TEMPLATE_NONE
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bool "none (Implement it yourself)"
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bool
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prompt "none (Implement it yourself)"
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config CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM
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bool "cdc_acm"
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bool
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prompt "cdc_acm"
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depends on CHERRYUSB_DEVICE_CDC_ACM
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config CHERRYUSB_DEVICE_TEMPLATE_MSC
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bool "msc"
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bool
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prompt "msc_ram"
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depends on CHERRYUSB_DEVICE_MSC
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config CHERRYUSB_DEVICE_TEMPLATE_HID_KEYBOARD
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bool "hid_keyboard"
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bool
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prompt "hid_keyboard"
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depends on CHERRYUSB_DEVICE_HID
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config CHERRYUSB_DEVICE_TEMPLATE_HID_MOUSE
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bool "hid_mouse"
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bool
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prompt "hid_mouse"
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depends on CHERRYUSB_DEVICE_HID
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config CHERRYUSB_DEVICE_TEMPLATE_HID_CUSTOM
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bool "hid_custom"
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bool
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prompt "hid_custom"
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depends on CHERRYUSB_DEVICE_HID
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config CHERRYUSB_DEVICE_TEMPLATE_VIDEO
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bool "video"
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bool
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prompt "video"
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depends on CHERRYUSB_DEVICE_VIDEO
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config CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V1_MIC_SPEAKER
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bool "audio_v1_mic_speaker_multichan"
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bool
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prompt "audio_v1_mic_speaker_multichan"
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depends on CHERRYUSB_DEVICE_AUDIO
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config CHERRYUSB_DEVICE_TEMPLATE_AUDIO_V2_MIC_SPEAKER
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bool "audio_v2_mic_speaker_multichan"
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bool
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prompt "audio_v2_mic_speaker_multichan"
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depends on CHERRYUSB_DEVICE_AUDIO
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config CHERRYUSB_DEVICE_TEMPLATE_CDC_RNDIS
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bool "cdc_rndis"
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bool
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prompt "cdc_rndis"
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depends on CHERRYUSB_DEVICE_CDC_RNDIS
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config CHERRYUSB_DEVICE_TEMPLATE_CDC_ECM
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bool "cdc_ecm"
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bool
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prompt "cdc_ecm"
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depends on CHERRYUSB_DEVICE_CDC_ECM
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config CHERRYUSB_DEVICE_TEMPLATE_CDC_NCM
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bool "cdc_ncm"
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bool
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prompt "cdc_ncm"
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depends on CHERRYUSB_DEVICE_CDC_NCM
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config CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC
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bool "cdc_acm_msc"
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bool
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prompt "cdc_acm_msc"
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depends on CHERRYUSB_DEVICE_CDC_ACM && CHERRYUSB_DEVICE_MSC
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config CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM_MSC_HID
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bool "cdc_acm_msc_hid"
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bool
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prompt "cdc_acm_msc_hid"
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depends on CHERRYUSB_DEVICE_CDC_ACM && CHERRYUSB_DEVICE_MSC && CHERRYUSB_DEVICE_HID
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config CHERRYUSB_DEVICE_TEMPLATE_WINUSBV1
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bool "winusbv1"
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bool
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prompt "winusbv1"
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config CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_CDC
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bool "winusbv2_cdc"
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bool
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prompt "winusbv2_cdc"
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depends on CHERRYUSB_DEVICE_CDC_ACM
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config CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2_HID
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bool "winusbv2_hid"
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bool
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prompt "winusbv2_hid"
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depends on CHERRYUSB_DEVICE_HID
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endchoice
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endif
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menuconfig CHERRYUSB_HOST
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@@ -217,6 +272,8 @@ if CHERRYUSB
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bool "musb_sunxi"
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config CHERRYUSB_HOST_MUSB_BK
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bool "musb_bk"
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config CHERRYUSB_HOST_MUSB_SIFLI
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bool "musb_sifli"
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config CHERRYUSB_HOST_MUSB_CUSTOM
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bool "musb_custom"
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config CHERRYUSB_HOST_PUSB2
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@@ -335,12 +392,27 @@ if CHERRYUSB
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config USBHOST_PLATFORM_RTL8152
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bool
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config CHERRYUSB_HOST_TEMPLATE
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bool
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prompt "Use usb host template"
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default n
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config USBHOST_PSC_PRIO
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int
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prompt "Set hubport change thread priority, 0 is the max priority"
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default 0
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if CHERRYUSB_HOST_TEMPLATE
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config USBHOST_PSC_STACKSIZE
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int
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prompt "Set hubport change thread stacksize"
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default 4096
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config USBHOST_REQUEST_BUFFER_LEN
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int
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prompt "Set host control transfer max buffer size"
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default 512
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config USBHOST_CONTROL_TRANSFER_TIMEOUT
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int
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prompt "Set host control transfer timeout, unit is ms"
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default 500
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menu "Select USB host template, please select class driver first"
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config TEST_USBH_CDC_ACM
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int
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prompt "demo for test cdc acm"
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@@ -356,7 +428,6 @@ if CHERRYUSB
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prompt "demo for test msc"
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default 0
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depends on CHERRYUSB_HOST_MSC
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endif
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endmenu
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endif
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endif
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File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -70,6 +70,9 @@ if GetDepend(['RT_CHERRYUSB_DEVICE']):
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if GetDepend(['RT_CHERRYUSB_DEVICE_MUSB_BK']):
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src += Glob('port/musb/usb_dc_musb.c')
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src += Glob('port/musb/usb_glue_bk.c')
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if GetDepend(['RT_CHERRYUSB_DEVICE_MUSB_SIFLI']):
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src += Glob('port/musb/usb_dc_musb.c')
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src += Glob('port/musb/usb_glue_sifli.c')
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if GetDepend(['RT_CHERRYUSB_DEVICE_MUSB_CUSTOM']):
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src += Glob('port/musb/usb_dc_musb.c')
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if GetDepend(['RT_CHERRYUSB_DEVICE_CHIPIDEA_MCX']):
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@@ -230,6 +233,9 @@ if GetDepend(['RT_CHERRYUSB_HOST']):
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if GetDepend(['RT_CHERRYUSB_HOST_MUSB_BK']):
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src += Glob('port/musb/usb_hc_musb.c')
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src += Glob('port/musb/usb_glue_bk.c')
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if GetDepend(['RT_CHERRYUSB_HOST_MUSB_SIFLI']):
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src += Glob('port/musb/usb_hc_musb.c')
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src += Glob('port/musb/usb_glue_sifli.c')
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if GetDepend(['RT_CHERRYUSB_HOST_MUSB_CUSTOM']):
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src += Glob('port/musb/usb_hc_musb.c')
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if GetDepend(['RT_CHERRYUSB_HOST_KINETIS_MCX']):
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@@ -289,8 +295,7 @@ if GetDepend(['RT_CHERRYUSB_HOST']):
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if GetDepend(['RT_CHERRYUSB_HOST_PL2303']):
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src += Glob('class/vendor/serial/usbh_pl2303.c')
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if GetDepend(['RT_CHERRYUSB_HOST_TEMPLATE']):
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CPPDEFINES+=['TEST_USBH_MSC=0']
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if GetDepend(['CONFIG_TEST_USBH_HID']):
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src += Glob('demo/usb_host.c')
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if GetDepend(['RT_CHERRYUSB_HOST_CDC_ACM']) \
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@@ -1,5 +1,5 @@
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VERSION_MAJOR = 1
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VERSION_MINOR = 5
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PATCHLEVEL = 0
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PATCHLEVEL = 1
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VERSION_TWEAK = 0
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EXTRAVERSION = 0
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@@ -120,6 +120,9 @@ if(CONFIG_CHERRYUSB_DEVICE)
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elseif(CONFIG_CHERRYUSB_DEVICE_MUSB_BK)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_dc_musb.c)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_bk.c)
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elseif(CONFIG_CHERRYUSB_DEVICE_MUSB_SIFLI)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_dc_musb.c)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_sifli.c)
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elseif(CONFIG_CHERRYUSB_DEVICE_MUSB_CUSTOM)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_dc_musb.c)
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elseif(CONFIG_CHERRYUSB_DEVICE_CHIPIDEA_MCX)
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@@ -316,6 +319,9 @@ if(CONFIG_CHERRYUSB_HOST)
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elseif(CONFIG_CHERRYUSB_HOST_MUSB_BK)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_hc_musb.c)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_bk.c)
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elseif(CONFIG_CHERRYUSB_HOST_MUSB_SIFLI)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_hc_musb.c)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_sifli.c)
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elseif(CONFIG_CHERRYUSB_HOST_MUSB_CUSTOM)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_hc_musb.c)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/musb/usb_glue_bk.c)
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@@ -329,7 +335,7 @@ if(CONFIG_CHERRYUSB_HOST)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/port/rp2040/usb_hc_rp2040.c)
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endif()
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if(CHERRYUSB_HOST_TEMPLATE)
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if(CONFIG_TEST_USBH_CDC_ACM OR CONFIG_TEST_USBH_HID OR CONFIG_TEST_USBH_MSC)
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list(APPEND cherryusb_srcs ${CMAKE_CURRENT_LIST_DIR}/demo/usb_host.c)
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endif()
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endif()
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@@ -47,9 +47,6 @@
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#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
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#endif
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/* Setup packet log for debug */
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// #define CONFIG_USBDEV_SETUP_LOG_PRINT
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/* Send ep0 in data from user buffer instead of copying into ep0 reqdata
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* Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE
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*/
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@@ -262,28 +259,20 @@
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// #define CONFIG_USBDEV_SOF_ENABLE
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/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */
|
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/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode,
|
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* the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS.
|
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*
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* in xxx32 chips, only pb14/pb15 can support hs mode, pa11/pa12 is not supported(only a few supports, but we ignore them).
|
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*/
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// #define CONFIG_USB_HS
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/* ---------------- FSDEV Configuration ---------------- */
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//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference
|
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|
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/* ---------------- DWC2 Configuration ---------------- */
|
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/* (5 * number of control endpoints + 8) + ((largest USB packet used / 4) + 1 for
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* status information) + (2 * number of OUT endpoints) + 1 for Global NAK
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*/
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// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
|
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/* IN Endpoints Max packet Size / 4 */
|
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// #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
|
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// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (1024 / 4)
|
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// #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
|
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// #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
|
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// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4)
|
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// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
|
||||
// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
|
||||
// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
|
||||
// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
|
||||
|
||||
/* enable dwc2 buffer dma mode for device
|
||||
* in xxx32 chips, only pb14/pb15 can support dma mode, pa11/pa12 is not supported(only a few supports, but we ignore them)
|
||||
*/
|
||||
// #define CONFIG_USB_DWC2_DMA_ENABLE
|
||||
|
||||
/* ---------------- MUSB Configuration ---------------- */
|
||||
@@ -320,17 +309,6 @@
|
||||
/* ---------------- XHCI Configuration ---------------- */
|
||||
#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)
|
||||
|
||||
/* ---------------- DWC2 Configuration ---------------- */
|
||||
/* largest non-periodic USB packet used / 4 */
|
||||
// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4)
|
||||
/* largest periodic USB packet used / 4 */
|
||||
// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4)
|
||||
/*
|
||||
* (largest USB packet used / 4) + 1 for status information + 1 transfer complete +
|
||||
* 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario
|
||||
*/
|
||||
// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE))
|
||||
|
||||
/* ---------------- MUSB Configuration ---------------- */
|
||||
// #define CONFIG_USB_MUSB_SUNXI
|
||||
|
||||
|
||||
@@ -416,7 +416,7 @@ static int usbh_hub_connect(struct usbh_hubport *hport, uint8_t intf)
|
||||
|
||||
hub->int_buffer = g_hub_intbuf[hub->bus->busid][hub->index - 1];
|
||||
|
||||
hub->int_timer = usb_osal_timer_create("hubint_tim", USBH_GET_URB_INTERVAL(hub->intin->bInterval, hport->speed), hub_int_timeout, hub, 0);
|
||||
hub->int_timer = usb_osal_timer_create("hubint_tim", USBH_GET_URB_INTERVAL(hub->intin->bInterval, hport->speed) / 1000, hub_int_timeout, hub, 0);
|
||||
if (hub->int_timer == NULL) {
|
||||
USB_LOG_ERR("No memory to alloc int_timer\r\n");
|
||||
return -USB_ERR_NOMEM;
|
||||
|
||||
@@ -675,9 +675,8 @@ struct mtp_object {
|
||||
USB_DESCRIPTOR_TYPE_ENDPOINT, /* bDescriptorType */ \
|
||||
int_ep, /* bEndpointAddress */ \
|
||||
0x03, /* bmAttributes */ \
|
||||
0x1c, /* wMaxPacketSize */ \
|
||||
0x00, /* bInterval */ \
|
||||
0x06 /* bLength */
|
||||
WBVAL(0x1c), /* wMaxPacketSize */ \
|
||||
0x06 /* bInterval */
|
||||
// clang-format on
|
||||
|
||||
#endif
|
||||
@@ -36,6 +36,9 @@ struct usbd_interface *usbd_mtp_init_intf(struct usbd_interface *intf,
|
||||
const uint8_t in_ep,
|
||||
const uint8_t int_ep);
|
||||
|
||||
int usbd_mtp_notify_object_add(const char *path);
|
||||
int usbd_mtp_notify_object_remove(const char *path);
|
||||
|
||||
const char *usbd_mtp_fs_root_path(void);
|
||||
const char *usbd_mtp_fs_description(void);
|
||||
|
||||
|
||||
@@ -15,7 +15,7 @@
|
||||
#undef CHERRYUSB_VERSION_STR
|
||||
#endif
|
||||
|
||||
#define CHERRYUSB_VERSION 0x010500
|
||||
#define CHERRYUSB_VERSION_STR "v1.5.0"
|
||||
#define CHERRYUSB_VERSION 0x010501
|
||||
#define CHERRYUSB_VERSION_STR "v1.5.1"
|
||||
|
||||
#endif
|
||||
@@ -83,8 +83,8 @@ USB_NOCACHE_RAM_SECTION struct usbd_core_priv {
|
||||
uint8_t intf_altsetting[16];
|
||||
uint8_t intf_offset;
|
||||
|
||||
struct usbd_tx_rx_msg tx_msg[CONFIG_USBDEV_EP_NUM];
|
||||
struct usbd_tx_rx_msg rx_msg[CONFIG_USBDEV_EP_NUM];
|
||||
struct usbd_tx_rx_msg tx_msg[16];
|
||||
struct usbd_tx_rx_msg rx_msg[16];
|
||||
|
||||
void (*event_handler)(uint8_t busid, uint8_t event);
|
||||
} g_usbd_core[CONFIG_USBDEV_MAX_BUS];
|
||||
@@ -95,15 +95,25 @@ static void usbd_class_event_notify_handler(uint8_t busid, uint8_t event, void *
|
||||
|
||||
static void usbd_print_setup(struct usb_setup_packet *setup)
|
||||
{
|
||||
USB_LOG_INFO("Setup: "
|
||||
"bmRequestType 0x%02x, bRequest 0x%02x, wValue 0x%04x, wIndex 0x%04x, wLength 0x%04x\r\n",
|
||||
setup->bmRequestType,
|
||||
setup->bRequest,
|
||||
setup->wValue,
|
||||
setup->wIndex,
|
||||
setup->wLength);
|
||||
USB_LOG_ERR("Setup: "
|
||||
"bmRequestType 0x%02x, bRequest 0x%02x, wValue 0x%04x, wIndex 0x%04x, wLength 0x%04x\r\n",
|
||||
setup->bmRequestType,
|
||||
setup->bRequest,
|
||||
setup->wValue,
|
||||
setup->wIndex,
|
||||
setup->wLength);
|
||||
}
|
||||
|
||||
#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_LOG)
|
||||
static const char *usb_ep0_state_string[] = {
|
||||
"setup",
|
||||
"indata",
|
||||
"outdata",
|
||||
"instatus",
|
||||
"outstatus"
|
||||
};
|
||||
#endif
|
||||
|
||||
static bool is_device_configured(uint8_t busid)
|
||||
{
|
||||
return (g_usbd_core[busid].configuration != 0);
|
||||
@@ -524,8 +534,6 @@ static bool usbd_set_interface(uint8_t busid, uint8_t iface, uint8_t alt_setting
|
||||
if_desc = (void *)p;
|
||||
}
|
||||
|
||||
USB_LOG_DBG("Current iface %u alt setting %u",
|
||||
cur_iface, cur_alt_setting);
|
||||
break;
|
||||
|
||||
case USB_DESCRIPTOR_TYPE_ENDPOINT:
|
||||
@@ -1171,9 +1179,14 @@ static void __usbd_event_ep0_setup_complete_handler(uint8_t busid, struct usb_se
|
||||
{
|
||||
uint8_t *buf;
|
||||
|
||||
#ifdef CONFIG_USBDEV_SETUP_LOG_PRINT
|
||||
usbd_print_setup(setup);
|
||||
#endif
|
||||
USB_LOG_DBG("[%s] 0x%02x 0x%02x 0x%04x 0x%04x 0x%04x\r\n",
|
||||
usb_ep0_state_string[usbd_get_ep0_next_state(busid)],
|
||||
setup->bmRequestType,
|
||||
setup->bRequest,
|
||||
setup->wValue,
|
||||
setup->wIndex,
|
||||
setup->wLength);
|
||||
|
||||
if (setup->wLength > CONFIG_USBDEV_REQUEST_BUFFER_LEN) {
|
||||
if ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT) {
|
||||
USB_LOG_ERR("Request buffer too small\r\n");
|
||||
@@ -1240,7 +1253,6 @@ static void __usbd_event_ep0_setup_complete_handler(uint8_t busid, struct usb_se
|
||||
*/
|
||||
if ((setup->wLength > g_usbd_core[busid].ep0_data_buf_len) && (!(g_usbd_core[busid].ep0_data_buf_len % USB_CTRL_EP_MPS))) {
|
||||
g_usbd_core[busid].zlp_flag = true;
|
||||
USB_LOG_DBG("EP0 Set zlp\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1266,7 +1278,10 @@ static void usbd_event_ep0_in_complete_handler(uint8_t busid, uint8_t ep, uint32
|
||||
g_usbd_core[busid].ep0_data_buf += nbytes;
|
||||
g_usbd_core[busid].ep0_data_buf_residue -= nbytes;
|
||||
|
||||
USB_LOG_DBG("EP0 send %d bytes, %d remained\r\n", (unsigned int)nbytes, (unsigned int)g_usbd_core[busid].ep0_data_buf_residue);
|
||||
USB_LOG_DBG("[%s] in %d bytes, %d remained\r\n",
|
||||
usb_ep0_state_string[usbd_get_ep0_next_state(busid)],
|
||||
(unsigned int)nbytes,
|
||||
(unsigned int)g_usbd_core[busid].ep0_data_buf_residue);
|
||||
|
||||
if (g_usbd_core[busid].ep0_data_buf_residue != 0) {
|
||||
/* Start sending the remain data */
|
||||
@@ -1311,12 +1326,15 @@ static void usbd_event_ep0_out_complete_handler(uint8_t busid, uint8_t ep, uint3
|
||||
(void)ep;
|
||||
(void)setup;
|
||||
|
||||
USB_LOG_DBG("[%s] out %d bytes, %d remained\r\n",
|
||||
usb_ep0_state_string[usbd_get_ep0_next_state(busid)],
|
||||
(unsigned int)nbytes,
|
||||
(unsigned int)g_usbd_core[busid].ep0_data_buf_residue);
|
||||
|
||||
if (nbytes > 0) {
|
||||
g_usbd_core[busid].ep0_data_buf += nbytes;
|
||||
g_usbd_core[busid].ep0_data_buf_residue -= nbytes;
|
||||
|
||||
USB_LOG_DBG("EP0 recv %d bytes, %d remained\r\n", (unsigned int)nbytes, (unsigned int)g_usbd_core[busid].ep0_data_buf_residue);
|
||||
|
||||
if (g_usbd_core[busid].ep0_data_buf_residue == 0) {
|
||||
#ifdef CONFIG_USBDEV_EP0_THREAD
|
||||
usb_osal_mq_send(g_usbd_core[busid].usbd_ep0_mq, USB_EP0_STATE_OUT);
|
||||
@@ -1338,9 +1356,8 @@ static void usbd_event_ep0_out_complete_handler(uint8_t busid, uint8_t ep, uint3
|
||||
usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue);
|
||||
}
|
||||
} else {
|
||||
g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP;
|
||||
/* Read out status completely, do nothing */
|
||||
USB_LOG_DBG("EP0 recv out status\r\n");
|
||||
g_usbd_core[busid].ep0_next_state = USBD_EP0_STATE_SETUP;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -47,7 +47,7 @@ extern "C" {
|
||||
#define CLASS_INFO_DEFINE __attribute__((section(".usbh_class_info"))) __USED __ALIGNED(1)
|
||||
#endif
|
||||
|
||||
#define USBH_GET_URB_INTERVAL(interval, speed) (speed < USB_SPEED_HIGH ? interval : (1 << (interval - 1)))
|
||||
#define USBH_GET_URB_INTERVAL(interval, speed) (speed < USB_SPEED_HIGH ? (interval * 1000) : ((1 << (interval - 1)) * 125))
|
||||
|
||||
#define USBH_EP_INIT(ep, ep_desc) \
|
||||
do { \
|
||||
|
||||
@@ -8,10 +8,6 @@
|
||||
#include "usbd_cdc_acm.h"
|
||||
#include "usbd_hid.h"
|
||||
|
||||
#if CONFIG_USBDEV_EP_NUM < 7
|
||||
#error endpoint number is too small for this demo, please try other chips
|
||||
#endif
|
||||
|
||||
/*!< endpoint address */
|
||||
#define CDC_IN_EP 0x81
|
||||
#define CDC_OUT_EP 0x02
|
||||
|
||||
@@ -7,10 +7,6 @@
|
||||
#include "usbd_cdc_acm.h"
|
||||
#include "usbd_msc.h"
|
||||
|
||||
#if CONFIG_USBDEV_EP_NUM < 6
|
||||
#error endpoint number is too small for this demo, please try other chips
|
||||
#endif
|
||||
|
||||
/*!< endpoint address */
|
||||
#define CDC_IN_EP 0x81
|
||||
#define CDC_OUT_EP 0x02
|
||||
|
||||
@@ -6,10 +6,6 @@
|
||||
#include "usbd_core.h"
|
||||
#include "usbd_cdc_acm.h"
|
||||
|
||||
#if CONFIG_USBDEV_EP_NUM < 8
|
||||
#error endpoint number is too small for this demo, please try other chips
|
||||
#endif
|
||||
|
||||
/*!< endpoint address */
|
||||
#define CDC_IN_EP 0x81
|
||||
#define CDC_OUT_EP 0x01
|
||||
|
||||
@@ -10,17 +10,17 @@
|
||||
#include "usbh_video.h"
|
||||
#include "usbh_audio.h"
|
||||
|
||||
#ifndef TEST_USBH_CDC_ACM
|
||||
#define TEST_USBH_CDC_ACM 1
|
||||
#ifndef CONFIG_TEST_USBH_CDC_ACM
|
||||
#define CONFIG_TEST_USBH_CDC_ACM 1
|
||||
#endif
|
||||
#ifndef TEST_USBH_CDC_SPEED
|
||||
#define TEST_USBH_CDC_SPEED 0
|
||||
#endif
|
||||
#ifndef TEST_USBH_HID
|
||||
#define TEST_USBH_HID 1
|
||||
#ifndef CONFIG_TEST_USBH_HID
|
||||
#define CONFIG_TEST_USBH_HID 1
|
||||
#endif
|
||||
#ifndef TEST_USBH_MSC
|
||||
#define TEST_USBH_MSC 1
|
||||
#ifndef CONFIG_TEST_USBH_MSC
|
||||
#define CONFIG_TEST_USBH_MSC 1
|
||||
#endif
|
||||
#ifndef TEST_USBH_MSC_FATFS
|
||||
#define TEST_USBH_MSC_FATFS 0
|
||||
@@ -28,18 +28,18 @@
|
||||
#ifndef TEST_USBH_MSC_FATFS_SPEED
|
||||
#define TEST_USBH_MSC_FATFS_SPEED 0
|
||||
#endif
|
||||
#ifndef TEST_USBH_AUDIO
|
||||
#define TEST_USBH_AUDIO 0
|
||||
#ifndef CONFIG_TEST_USBH_AUDIO
|
||||
#define CONFIG_TEST_USBH_AUDIO 0
|
||||
#endif
|
||||
#ifndef TEST_USBH_VIDEO
|
||||
#define TEST_USBH_VIDEO 0
|
||||
#ifndef CONFIG_TEST_USBH_VIDEO
|
||||
#define CONFIG_TEST_USBH_VIDEO 0
|
||||
#endif
|
||||
|
||||
#if defined(TEST_USBH_CDC_ECM) || defined(TEST_USBH_CDC_RNDIS) || defined(TEST_USBH_ASIX) || defined(TEST_USBH_RTL8152)
|
||||
#error we have move those class implements into platform/none/usbh_lwip.c, and you should call tcpip_init(NULL, NULL) in your app
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_CDC_ACM
|
||||
#if CONFIG_TEST_USBH_CDC_ACM
|
||||
USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t cdc_buffer[4096];
|
||||
|
||||
#if TEST_USBH_CDC_SPEED
|
||||
@@ -115,7 +115,7 @@ delete:
|
||||
}
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_HID
|
||||
#if CONFIG_TEST_USBH_HID
|
||||
USB_NOCACHE_RAM_SECTION USB_MEM_ALIGNX uint8_t hid_buffer[128];
|
||||
|
||||
void usbh_hid_callback(void *arg, int nbytes)
|
||||
@@ -157,7 +157,7 @@ delete:
|
||||
}
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_MSC
|
||||
#if CONFIG_TEST_USBH_MSC
|
||||
|
||||
#if TEST_USBH_MSC_FATFS
|
||||
#include "ff.h"
|
||||
@@ -326,7 +326,7 @@ delete:
|
||||
}
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_CDC_ACM
|
||||
#if CONFIG_TEST_USBH_CDC_ACM
|
||||
void usbh_cdc_acm_run(struct usbh_cdc_acm *cdc_acm_class)
|
||||
{
|
||||
usb_osal_thread_create("usbh_cdc", 2048, CONFIG_USBHOST_PSC_PRIO + 1, usbh_cdc_acm_thread, cdc_acm_class);
|
||||
@@ -337,7 +337,7 @@ void usbh_cdc_acm_stop(struct usbh_cdc_acm *cdc_acm_class)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_HID
|
||||
#if CONFIG_TEST_USBH_HID
|
||||
void usbh_hid_run(struct usbh_hid *hid_class)
|
||||
{
|
||||
usb_osal_thread_create("usbh_hid", 2048, CONFIG_USBHOST_PSC_PRIO + 1, usbh_hid_thread, hid_class);
|
||||
@@ -348,7 +348,7 @@ void usbh_hid_stop(struct usbh_hid *hid_class)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_MSC
|
||||
#if CONFIG_TEST_USBH_MSC
|
||||
void usbh_msc_run(struct usbh_msc *msc_class)
|
||||
{
|
||||
usb_osal_thread_create("usbh_msc", 2048, CONFIG_USBHOST_PSC_PRIO + 1, usbh_msc_thread, msc_class);
|
||||
@@ -359,11 +359,11 @@ void usbh_msc_stop(struct usbh_msc *msc_class)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_AUDIO
|
||||
#if CONFIG_TEST_USBH_AUDIO
|
||||
#error "commercial charge"
|
||||
#endif
|
||||
|
||||
#if TEST_USBH_VIDEO
|
||||
#if CONFIG_TEST_USBH_VIDEO
|
||||
#error "commercial charge"
|
||||
#endif
|
||||
|
||||
|
||||
@@ -6,10 +6,6 @@
|
||||
#include "usbd_core.h"
|
||||
#include "usbd_cdc_acm.h"
|
||||
|
||||
#if CONFIG_USBDEV_EP_NUM < 6
|
||||
#error endpoint number is too small for this demo, please try other chips
|
||||
#endif
|
||||
|
||||
#define WINUSB_IN_EP 0x81
|
||||
#define WINUSB_OUT_EP 0x02
|
||||
|
||||
|
||||
@@ -6,10 +6,6 @@
|
||||
#include "usbd_core.h"
|
||||
#include "usbd_hid.h"
|
||||
|
||||
#if CONFIG_USBDEV_EP_NUM < 4
|
||||
#error endpoint number is too small for this demo, please try other chips
|
||||
#endif
|
||||
|
||||
#define WINUSB_IN_EP 0x81
|
||||
#define WINUSB_OUT_EP 0x02
|
||||
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
version: "1.5.0"
|
||||
version: "1.5.1"
|
||||
description: CherryUSB is a tiny and portable USB Stack (device & host) for embedded system with USB IP
|
||||
tags:
|
||||
- usb
|
||||
@@ -18,7 +18,7 @@ repository: https://github.com/cherry-embedded/CherryUSB.git
|
||||
documentation: https://cherryusb.readthedocs.io/
|
||||
issues: https://github.com/cherry-embedded/CherryUSB/issues
|
||||
dependencies:
|
||||
idf: ">=5.0"
|
||||
idf: ">=4.4.1"
|
||||
targets:
|
||||
- esp32s2
|
||||
- esp32s3
|
||||
|
||||
@@ -6,24 +6,25 @@ If you are using more than one port, all ip parameters must be the same(like fif
|
||||
|
||||
## STM32
|
||||
|
||||
**有且仅有 PB14/PB15 引脚支持 host 模式, 部分 F7/H7 可能 PA11/PA12 也支持**。
|
||||
|
||||
- STM32F105xc、STM32F107xc
|
||||
- STM32F205xx、STM32F207xx、STM32F215xx、STM32F217xx
|
||||
- STM32F401xc、STM32F401xe、STM32F405xx、STM32F407xx、STM32F411xe、STM32F412cx、STM32F412rx、STM32F412vx、STM32F412zx、STM32F413xx、STM32F415xx、STM32F417xx、STM32F423xx、STM32F423xx、STM32F429xx、STM32F437xx、STM32F439xx、STM32F446xx、STM32F469xx、STM32F479xx
|
||||
- STM32F7xx
|
||||
- STM32H7xx
|
||||
- STM32L4xx
|
||||
- STM32MPxx
|
||||
- STM32U5xx
|
||||
|
||||
## AT32
|
||||
|
||||
**有且仅有 AT32F405xx PB14/PB15引脚支持 host 模式**。
|
||||
|
||||
- AT32F402xx、AT32F405xx、AT32F415xx、AT32F423xx、AT32F425xx、AT32F435xx、AT32F437xx
|
||||
|
||||
## GD32
|
||||
|
||||
CONFIG_USBDEV_EP_NUM 必须为4 或者 6,并删除 usb_dc_dwc2.c 中 while(1){}
|
||||
|
||||
当 CONFIG_USBDEV_EP_NUM 为4 时,fifo_num 不得大于 320 字
|
||||
当 CONFIG_USBDEV_EP_NUM 为6 时,fifo_num 不得大于 1280 字
|
||||
**由于无法读取 DWC2 配置信息,并且有部分寄存器是非标准的,因此暂时无法支持 GD 系列**。
|
||||
|
||||
- GD32F30X_CL
|
||||
- GD32F405、GD32F407
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -209,12 +209,15 @@ typedef struct
|
||||
#define USB_OTG_HCFG_FSLSPCS_Pos (0U)
|
||||
#define USB_OTG_HCFG_FSLSPCS_Msk (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */
|
||||
#define USB_OTG_HCFG_FSLSPCS USB_OTG_HCFG_FSLSPCS_Msk /*!< FS/LS PHY clock select */
|
||||
#define USB_OTG_HCFG_FSLSPCS_0 (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */
|
||||
#define USB_OTG_HCFG_FSLSPCS_1 (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */
|
||||
#define USB_OTG_HCFG_FSLSPCLKSEL_30_60_MHZ (0x0UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000000 */
|
||||
#define USB_OTG_HCFG_FSLSPCLKSEL_48_MHZ (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */
|
||||
#define USB_OTG_HCFG_FSLSPCLKSEL_6_MHZ (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */
|
||||
#define USB_OTG_HCFG_FSLSS_Pos (2U)
|
||||
#define USB_OTG_HCFG_FSLSS_Msk (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */
|
||||
#define USB_OTG_HCFG_FSLSS USB_OTG_HCFG_FSLSS_Msk /*!< FS- and LS-only support */
|
||||
|
||||
#define USB_OTG_HFIR_RELOAD_CTRL_Pos (16U)
|
||||
#define USB_OTG_HFIR_RELOAD_CTRL_Msk (0x1UL << USB_OTG_HFIR_RELOAD_CTRL_Pos)
|
||||
#define USB_OTG_HFIR_RELOAD_CTRL USB_OTG_HFIR_RELOAD_CTRL_Msk
|
||||
/******************** Bit definition for USB_OTG_DCFG register ********************/
|
||||
|
||||
#define USB_OTG_DCFG_DSPD_Pos (0U)
|
||||
@@ -385,12 +388,20 @@ typedef struct
|
||||
#define USB_OTG_GUSBCFG_TOCAL_Pos (0U)
|
||||
#define USB_OTG_GUSBCFG_TOCAL_Msk (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */
|
||||
#define USB_OTG_GUSBCFG_TOCAL USB_OTG_GUSBCFG_TOCAL_Msk /*!< FS timeout calibration */
|
||||
#define USB_OTG_GUSBCFG_TOCAL_0 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */
|
||||
#define USB_OTG_GUSBCFG_TOCAL_1 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */
|
||||
#define USB_OTG_GUSBCFG_TOCAL_2 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */
|
||||
#define USB_OTG_GUSBCFG_PHYIF_Pos (3U)
|
||||
#define USB_OTG_GUSBCFG_PHYIF_Msk (0x1UL << USB_OTG_GUSBCFG_PHYIF_Pos)
|
||||
#define USB_OTG_GUSBCFG_PHYIF USB_OTG_GUSBCFG_PHYIF_Msk
|
||||
#define USB_OTG_GUSBCFG_PHYIF8 (0x0UL << USB_OTG_GUSBCFG_PHYIF_Pos)
|
||||
#define USB_OTG_GUSBCFG_PHYIF16 (0x1UL << USB_OTG_GUSBCFG_PHYIF_Pos)
|
||||
#define USB_OTG_GUSBCFG_ULPI_UTMI_SEL_Pos (4U)
|
||||
#define USB_OTG_GUSBCFG_ULPI_UTMI_SEL_Msk (0x1UL << USB_OTG_GUSBCFG_ULPI_UTMI_SEL_Pos)
|
||||
#define USB_OTG_GUSBCFG_ULPI_UTMI_SEL USB_OTG_GUSBCFG_ULPI_UTMI_SEL_Msk
|
||||
#define USB_OTG_GUSBCFG_PHYSEL_Pos (6U)
|
||||
#define USB_OTG_GUSBCFG_PHYSEL_Msk (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */
|
||||
#define USB_OTG_GUSBCFG_PHYSEL USB_OTG_GUSBCFG_PHYSEL_Msk /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */
|
||||
#define USB_OTG_GUSBCFG_DDR_SEL_Pos (7U)
|
||||
#define USB_OTG_GUSBCFG_DDR_SEL_Msk (0x1UL << USB_OTG_GUSBCFG_DDR_SEL_Pos)
|
||||
#define USB_OTG_GUSBCFG_DDR_SEL USB_OTG_GUSBCFG_DDR_SEL_Msk
|
||||
#define USB_OTG_GUSBCFG_SRPCAP_Pos (8U)
|
||||
#define USB_OTG_GUSBCFG_SRPCAP_Msk (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */
|
||||
#define USB_OTG_GUSBCFG_SRPCAP USB_OTG_GUSBCFG_SRPCAP_Msk /*!< SRP-capable */
|
||||
@@ -1720,7 +1731,5 @@ typedef struct
|
||||
|
||||
void usb_dc_low_level_init(uint8_t busid);
|
||||
void usb_dc_low_level_deinit(uint8_t busid);
|
||||
uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base);
|
||||
uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base);
|
||||
void usbd_dwc2_delay_ms(uint8_t ms);
|
||||
#endif
|
||||
@@ -3,60 +3,106 @@
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#include "usb_config.h"
|
||||
#include "stdint.h"
|
||||
#include "usb_dwc2_reg.h"
|
||||
#include "usbd_core.h"
|
||||
#include "usbh_core.h"
|
||||
#include "usb_dwc2_param.h"
|
||||
|
||||
extern unsigned int system_core_clock;
|
||||
|
||||
uint32_t SystemCoreClock;
|
||||
/* you can find this config in function: usb_global_init, file:at32fxxx_usb.c, for example:
|
||||
*
|
||||
* usbx->gccfg_bit.pwrdown = TRUE;
|
||||
* usbx->gccfg_bit.avalidsesen = TRUE;
|
||||
* usbx->gccfg_bit.bvalidsesen = TRUE;
|
||||
*
|
||||
*/
|
||||
|
||||
uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base)
|
||||
const struct dwc2_user_params param_pa11_pa12 = {
|
||||
.phy_type = DWC2_PHY_TYPE_PARAM_FS,
|
||||
.device_dma_enable = false,
|
||||
.device_dma_desc_enable = false,
|
||||
.device_rx_fifo_size = (320 - 16 - 16 - 16 - 16),
|
||||
.device_tx_fifo_size = {
|
||||
[0] = 16, // 64 byte
|
||||
[1] = 16, // 64 byte
|
||||
[2] = 16, // 64 byte
|
||||
[3] = 16, // 64 byte
|
||||
[4] = 0,
|
||||
[5] = 0,
|
||||
[6] = 0,
|
||||
[7] = 0,
|
||||
[8] = 0,
|
||||
[9] = 0,
|
||||
[10] = 0,
|
||||
[11] = 0,
|
||||
[12] = 0,
|
||||
[13] = 0,
|
||||
[14] = 0,
|
||||
[15] = 0 },
|
||||
#ifdef AT32F415xx
|
||||
.device_gccfg = ((1 << 16) | (1 << 18) | (1 << 19) | (1 << 21)),
|
||||
#else
|
||||
.device_gccfg = ((1 << 16) | (1 << 21)),
|
||||
#endif
|
||||
.total_fifo_size = 320 // 1280 byte
|
||||
};
|
||||
|
||||
#if __has_include("at32f402_405.h")
|
||||
#include "at32f402_405.h"
|
||||
|
||||
const struct dwc2_user_params param_pb14_pb15 = {
|
||||
.phy_type = DWC2_PHY_TYPE_PARAM_UTMI,
|
||||
.device_dma_enable = true,
|
||||
.device_dma_desc_enable = false,
|
||||
.device_rx_fifo_size = (1008 - 16 - 256 - 128 - 128 - 128 - 128),
|
||||
.device_tx_fifo_size = {
|
||||
[0] = 16, // 64 byte
|
||||
[1] = 256, // 1024 byte
|
||||
[2] = 128, // 512 byte
|
||||
[3] = 128, // 512 byte
|
||||
[4] = 128, // 512 byte
|
||||
[5] = 128, // 512 byte
|
||||
[6] = 0,
|
||||
[7] = 0,
|
||||
[8] = 0,
|
||||
[9] = 0,
|
||||
[10] = 0,
|
||||
[11] = 0,
|
||||
[12] = 0,
|
||||
[13] = 0,
|
||||
[14] = 0,
|
||||
[15] = 0 },
|
||||
|
||||
.host_dma_desc_enable = false,
|
||||
.host_rx_fifo_size = 628,
|
||||
.host_nperio_tx_fifo_size = 128, // 512 byte
|
||||
.host_perio_tx_fifo_size = 256, // 1024 byte
|
||||
|
||||
.device_gccfg = ((1 << 16) | (1 << 21)),
|
||||
.host_gccfg = ((1 << 16) | (1 << 21))
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_USB_DWC2_CUSTOM_PARAM
|
||||
void dwc2_get_user_params(uint32_t reg_base, struct dwc2_user_params *params)
|
||||
{
|
||||
SystemCoreClock = system_core_clock;
|
||||
#ifdef CONFIG_USB_HS
|
||||
return ((1 << 16) | (1 << 21));
|
||||
|
||||
#if __has_include("at32f402_405.h")
|
||||
if (reg_base == OTGHS_BASE) {
|
||||
memcpy(params, ¶m_pb14_pb15, sizeof(struct dwc2_user_params));
|
||||
} else {
|
||||
memcpy(params, ¶m_pa11_pa12, sizeof(struct dwc2_user_params));
|
||||
}
|
||||
#else
|
||||
// AT32F415
|
||||
#if defined(AT32F415RCT7) || defined(AT32F415RCT7_7) || defined(AT32F415CCT7) || \
|
||||
defined(AT32F415CCU7) || defined(AT32F415KCU7_4) || defined(AT32F415RBT7) || \
|
||||
defined(AT32F415RBT7_7) || defined(AT32F415CBT7) || defined(AT32F415CBU7) || \
|
||||
defined(AT32F415KBU7_4) || defined(AT32F415R8T7) || defined(AT32F415R8T7_7) || \
|
||||
defined(AT32F415C8T7) || defined(AT32F415K8U7_4)
|
||||
return ((1 << 16) | (1 << 18) | (1 << 19) | (1 << 21));
|
||||
#else
|
||||
return ((1 << 16) | (1 << 21));
|
||||
memcpy(params, ¶m_pa11_pa12, sizeof(struct dwc2_user_params));
|
||||
#endif
|
||||
#ifdef CONFIG_USB_DWC2_CUSTOM_FIFO
|
||||
struct usb_dwc2_user_fifo_config s_dwc2_fifo_config;
|
||||
|
||||
dwc2_get_user_fifo_config(reg_base, &s_dwc2_fifo_config);
|
||||
|
||||
params->device_rx_fifo_size = s_dwc2_fifo_config.device_rx_fifo_size;
|
||||
for (uint8_t i = 0; i < MAX_EPS_CHANNELS; i++) {
|
||||
params->device_tx_fifo_size[i] = s_dwc2_fifo_config.device_tx_fifo_size[i];
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base)
|
||||
{
|
||||
SystemCoreClock = system_core_clock;
|
||||
#ifdef CONFIG_USB_HS
|
||||
return ((1 << 16) | (1 << 21));
|
||||
#else
|
||||
// AT32F415
|
||||
#if defined(AT32F415RCT7) || defined(AT32F415RCT7_7) || defined(AT32F415CCT7) || \
|
||||
defined(AT32F415CCU7) || defined(AT32F415KCU7_4) || defined(AT32F415RBT7) || \
|
||||
defined(AT32F415RBT7_7) || defined(AT32F415CBT7) || defined(AT32F415CBU7) || \
|
||||
defined(AT32F415KBU7_4) || defined(AT32F415R8T7) || defined(AT32F415R8T7_7) || \
|
||||
defined(AT32F415C8T7) || defined(AT32F415K8U7_4)
|
||||
return ((1 << 16) | (1 << 18) | (1 << 19) | (1 << 21));
|
||||
#else
|
||||
return ((1 << 16) | (1 << 21));
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
void usbd_dwc2_delay_ms(uint8_t ms)
|
||||
{
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -7,6 +7,10 @@
|
||||
#include "stdint.h"
|
||||
#include "usb_dwc2_reg.h"
|
||||
|
||||
#if 1
|
||||
#error you need to modify some usb register values then use this chip
|
||||
#endif
|
||||
|
||||
#if CONFIG_USBDEV_EP_NUM != 4 && CONFIG_USBDEV_EP_NUM != 6
|
||||
#error "gd32 only has 4 endpoints for pa11/pa12 and 6 endpoints for pb14/pb15"
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -336,10 +336,8 @@ static struct ehci_qh_hw *ehci_control_urb_init(struct usbh_bus *bus, struct usb
|
||||
}
|
||||
|
||||
qtd_setup = ehci_qtd_alloc(bus);
|
||||
qtd_data = ehci_qtd_alloc(bus);
|
||||
qtd_status = ehci_qtd_alloc(bus);
|
||||
|
||||
USB_ASSERT_MSG(qtd_setup && qtd_data && qtd_status, "ctrl qtd alloc failed");
|
||||
USB_ASSERT_MSG(qtd_setup && qtd_status, "ctrl qtd alloc failed");
|
||||
|
||||
ehci_qh_fill(qh,
|
||||
urb->hport->dev_addr,
|
||||
@@ -363,6 +361,9 @@ static struct ehci_qh_hw *ehci_control_urb_init(struct usbh_bus *bus, struct usb
|
||||
|
||||
/* fill data qtd */
|
||||
if (setup->wLength > 0) {
|
||||
qtd_data = ehci_qtd_alloc(bus);
|
||||
USB_ASSERT_MSG(qtd_data, "ctrl qtd alloc failed");
|
||||
|
||||
if ((setup->bmRequestType & 0x80) == 0x80) {
|
||||
token = QTD_TOKEN_PID_IN;
|
||||
} else {
|
||||
|
||||
@@ -5,6 +5,10 @@
|
||||
*/
|
||||
#include "usbd_core.h"
|
||||
|
||||
#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_LOG)
|
||||
#error "fsdev cannot enable USB_DBG_LOG"
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_USBDEV_FSDEV_PMA_ACCESS
|
||||
#error "please define CONFIG_USBDEV_FSDEV_PMA_ACCESS in usb_config.h"
|
||||
#endif
|
||||
|
||||
@@ -283,6 +283,13 @@ int usb_dc_init(uint8_t busid)
|
||||
|
||||
int usb_dc_deinit(uint8_t busid)
|
||||
{
|
||||
HWREGB(USB_BASE + MUSB_IE_OFFSET) = 0;
|
||||
HWREGH(USB_BASE + MUSB_TXIE_OFFSET) = 0;
|
||||
HWREGH(USB_BASE + MUSB_RXIE_OFFSET) = 0;
|
||||
|
||||
HWREGB(USB_BASE + MUSB_POWER_OFFSET) &= ~USB_POWER_SOFTCONN;
|
||||
|
||||
usb_dc_low_level_deinit();
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -345,8 +352,10 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep)
|
||||
g_musb_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
|
||||
g_musb_udc.out_ep[ep_idx].ep_enable = true;
|
||||
|
||||
#ifndef CONFIG_USB_MUSB_SIFLI
|
||||
USB_ASSERT_MSG((8 << HWREGB(USB_BASE + MUSB_RXFIFOSZ_OFFSET)) >= g_musb_udc.out_ep[ep_idx].ep_mps,
|
||||
"Ep %02x fifo is overflow", ep->bEndpointAddress);
|
||||
#endif
|
||||
|
||||
HWREGH(USB_BASE + MUSB_IND_RXMAP_OFFSET) = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
|
||||
|
||||
@@ -394,8 +403,10 @@ int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep)
|
||||
g_musb_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
|
||||
g_musb_udc.in_ep[ep_idx].ep_enable = true;
|
||||
|
||||
#ifndef CONFIG_USB_MUSB_SIFLI
|
||||
USB_ASSERT_MSG((8 << HWREGB(USB_BASE + MUSB_TXFIFOSZ_OFFSET)) >= g_musb_udc.in_ep[ep_idx].ep_mps,
|
||||
"Ep %02x fifo is overflow", ep->bEndpointAddress);
|
||||
#endif
|
||||
|
||||
HWREGH(USB_BASE + MUSB_IND_TXMAP_OFFSET) = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
|
||||
|
||||
|
||||
@@ -0,0 +1,162 @@
|
||||
/*
|
||||
* Copyright (c) 2025, sakumisu
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
#include "usbd_core.h"
|
||||
#include "usbh_core.h"
|
||||
#include "usb_musb_reg.h"
|
||||
|
||||
#undef USB_POWER_SOFTCONN
|
||||
#undef USB_DEVCTL_FSDEV
|
||||
#undef USB_DEVCTL_LSDEV
|
||||
#undef USB_DEVCTL_SESSION
|
||||
#undef USB_POWER_HSENAB
|
||||
#undef USB_POWER_HSMODE
|
||||
#undef USB_POWER_RESET
|
||||
#undef USB_POWER_RESUME
|
||||
|
||||
#ifndef CONFIG_USB_MUSB_SIFLI
|
||||
#error must define CONFIG_USB_MUSB_SIFLI when use sunxi chips
|
||||
#endif
|
||||
|
||||
#include "bf0_hal.h"
|
||||
|
||||
uint8_t usbd_get_musb_fifo_cfg(struct musb_fifo_cfg **cfg)
|
||||
{
|
||||
*cfg = NULL; // No FIFO configuration for this implementation, readonly
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8_t usbh_get_musb_fifo_cfg(struct musb_fifo_cfg **cfg)
|
||||
{
|
||||
*cfg = NULL; // No FIFO configuration for this implementation, readonly
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint32_t usb_get_musb_ram_size(void)
|
||||
{
|
||||
return 0xFFFF; // No specific RAM size for this implementation
|
||||
}
|
||||
|
||||
void usbd_musb_delay_ms(uint8_t ms)
|
||||
{
|
||||
/* implement later */
|
||||
}
|
||||
|
||||
#ifdef PKG_CHERRYUSB_DEVICE
|
||||
void usb_dc_low_level_init(uint8_t busid)
|
||||
{
|
||||
HAL_RCC_EnableModule(RCC_MOD_USBC);
|
||||
|
||||
#ifdef SOC_SF32LB58X
|
||||
//hwp_usbc->utmicfg12 = hwp_usbc->utmicfg12 | 0x3; //set xo_clk_sel
|
||||
hwp_usbc->ldo25 = hwp_usbc->ldo25 | 0xa; //set psw_en and ldo25_en
|
||||
HAL_Delay(1);
|
||||
hwp_usbc->swcntl3 = 0x1; //set utmi_en for USB2.0
|
||||
hwp_usbc->usbcfg = hwp_usbc->usbcfg | 0x40; //enable usb PLL.
|
||||
#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
|
||||
hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN;
|
||||
#elif defined(SOC_SF32LB55X)
|
||||
hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN;
|
||||
#endif
|
||||
#ifndef SOC_SF32LB55X
|
||||
hwp_usbc->usbcfg |= (USB_USBCFG_AVALID | USB_USBCFG_AVALID_DR);
|
||||
hwp_usbc->dpbrxdisl = 0xFE;
|
||||
hwp_usbc->dpbtxdisl = 0xFE;
|
||||
#endif
|
||||
NVIC_EnableIRQ(USBC_IRQn);
|
||||
__HAL_SYSCFG_Enable_USB();
|
||||
}
|
||||
|
||||
void usb_dc_low_level_deinit(uint8_t busid)
|
||||
{
|
||||
NVIC_DisableIRQ(USBC_IRQn);
|
||||
#ifdef SOC_SF32LB58X
|
||||
hwp_usbc->usbcfg &= ~0x40; // Disable usb PLL.
|
||||
hwp_usbc->swcntl3 = 0x0;
|
||||
hwp_usbc->ldo25 &= ~0xa; // Disable psw_en and ldo25_en
|
||||
#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
|
||||
hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN);
|
||||
#elif defined(SOC_SF32LB55X)
|
||||
hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN);
|
||||
#endif
|
||||
/* reset USB to make DP change to PULLDOWN state */
|
||||
hwp_hpsys_rcc->RSTR2 |= HPSYS_RCC_RSTR2_USBC;
|
||||
HAL_Delay_us(100);
|
||||
hwp_hpsys_rcc->RSTR2 &= ~HPSYS_RCC_RSTR2_USBC;
|
||||
HAL_RCC_DisableModule(RCC_MOD_USBC);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PKG_CHERRYUSB_HOST
|
||||
void usb_hc_low_level_init(struct usbh_bus *bus)
|
||||
{
|
||||
HAL_RCC_EnableModule(RCC_MOD_USBC);
|
||||
|
||||
#ifdef SOC_SF32LB58X
|
||||
//hwp_usbc->utmicfg12 = hwp_usbc->utmicfg12 | 0x3; //set xo_clk_sel
|
||||
hwp_usbc->ldo25 = hwp_usbc->ldo25 | 0xa; //set psw_en and ldo25_en
|
||||
HAL_Delay(1);
|
||||
hwp_usbc->swcntl3 = 0x1; //set utmi_en for USB2.0
|
||||
hwp_usbc->usbcfg = hwp_usbc->usbcfg | 0x40; //enable usb PLL.
|
||||
#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
|
||||
hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN;
|
||||
#elif defined(SOC_SF32LB55X)
|
||||
hwp_hpsys_cfg->USBCR |= HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN;
|
||||
#endif
|
||||
#ifndef SOC_SF32LB55X
|
||||
hwp_usbc->usbcfg |= (USB_USBCFG_AVALID | USB_USBCFG_AVALID_DR);
|
||||
hwp_usbc->dpbrxdisl = 0xFE;
|
||||
hwp_usbc->dpbtxdisl = 0xFE;
|
||||
#endif
|
||||
__HAL_SYSCFG_Enable_USB();
|
||||
hwp_usbc->usbcfg &= 0xEF;
|
||||
hwp_usbc->dbgl = 0x80;
|
||||
|
||||
NVIC_EnableIRQ(USBC_IRQn);
|
||||
}
|
||||
|
||||
void usb_hc_low_level_deinit(struct usbh_bus *bus)
|
||||
{
|
||||
NVIC_DisableIRQ(USBC_IRQn);
|
||||
#ifdef SOC_SF32LB58X
|
||||
hwp_usbc->usbcfg &= ~0x40; // Disable usb PLL.
|
||||
hwp_usbc->swcntl3 = 0x0;
|
||||
hwp_usbc->ldo25 &= ~0xa; // Disable psw_en and ldo25_en
|
||||
#elif defined(SOC_SF32LB56X) || defined(SOC_SF32LB52X)
|
||||
hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_DP_EN | HPSYS_CFG_USBCR_USB_EN);
|
||||
#elif defined(SOC_SF32LB55X)
|
||||
hwp_hpsys_cfg->USBCR &= ~(HPSYS_CFG_USBCR_DM_PD | HPSYS_CFG_USBCR_USB_EN);
|
||||
#endif
|
||||
/* reset USB to make DP change to PULLDOWN state */
|
||||
hwp_hpsys_rcc->RSTR2 |= HPSYS_RCC_RSTR2_USBC;
|
||||
HAL_Delay_us(100);
|
||||
hwp_hpsys_rcc->RSTR2 &= ~HPSYS_RCC_RSTR2_USBC;
|
||||
HAL_RCC_DisableModule(RCC_MOD_USBC);
|
||||
}
|
||||
|
||||
void musb_reset_prev(void)
|
||||
{
|
||||
#if defined(SF32LB58X)
|
||||
hwp_usbc->rsvd0 = 0xc; //58
|
||||
#endif
|
||||
}
|
||||
|
||||
void musb_reset_post(void)
|
||||
{
|
||||
#if defined(SF32LB58X)
|
||||
hwp_usbc->rsvd0 = 0x0; //58
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
void USBC_IRQHandler(void)
|
||||
{
|
||||
#ifdef PKG_CHERRYUSB_DEVICE
|
||||
USBD_IRQHandler(0);
|
||||
#endif
|
||||
#ifdef PKG_CHERRYUSB_HOST
|
||||
USBH_IRQHandler(0);
|
||||
#endif
|
||||
}
|
||||
@@ -429,9 +429,18 @@ static int usbh_reset_port(struct usbh_bus *bus, const uint8_t port)
|
||||
{
|
||||
g_musb_hcd[bus->hcd.hcd_id].port_pe = 0;
|
||||
HWREGB(USB_BASE + MUSB_POWER_OFFSET) |= USB_POWER_RESET;
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_SIFLI
|
||||
extern void musb_reset_prev(void);
|
||||
musb_reset_prev();
|
||||
#endif
|
||||
usb_osal_msleep(20);
|
||||
HWREGB(USB_BASE + MUSB_POWER_OFFSET) &= ~(USB_POWER_RESET);
|
||||
usb_osal_msleep(20);
|
||||
#ifdef CONFIG_USB_MUSB_SIFLI
|
||||
extern void musb_reset_post(void);
|
||||
musb_reset_post();
|
||||
#endif
|
||||
g_musb_hcd[bus->hcd.hcd_id].port_pe = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
Reference in new issue
Block a user