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[update] stm32mp1-ev1 bsp drivers

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thread-liu committed 2020-09-04 10:52:23 +08:00
1 parent cf622e5177
commit 5dea3cdc27
13 files changed
+1996 -1771
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bsp/stm32/stm32mp157a-st-ev1/board/CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
+1 -10
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@@ -22,8 +22,6 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
#include "stpmic.h"
#include "rtconfig.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@@ -75,14 +73,7 @@ void HAL_MspInit(void)
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
if(IS_ENGINEERING_BOOT_MODE())
{
#if defined(BSP_USING_ADC) || defined(BSP_USING_DAC)
/* Configure PMIC */
BSP_PMIC_Init();
BSP_PMIC_InitRegulators();
#endif
}
/* USER CODE END MspInit 1 */
}
bsp/stm32/stm32mp157a-st-ev1/board/Kconfig
+66 -36
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@@ -15,6 +15,19 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_UART4
default y
config BSP_USING_PMIC
bool "Enable PMIC"
select BSP_USING_I2C
select BSP_USING_I2C3
default y
config BSP_USING_NAND
bool "Enable FMC (MT29F8G08ABACAH4)"
select RT_USING_FMC
select RT_USING_MTD_NAND
select RT_MTD_NAND_DEBUG
default n
endmenu
menu "On-chip Peripheral Drivers"
@@ -22,11 +35,6 @@ menu "On-chip Peripheral Drivers"
bool "Enable GPIO"
select RT_USING_PIN
default y
config BSP_USING_WWDG
bool "Enable WWDG"
select RT_USING_WWDG
default n
menuconfig BSP_USING_UART
bool "Enable UART"
@@ -46,7 +54,7 @@ menu "On-chip Peripheral Drivers"
bool "Enable UART3 TX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART4
bool "Enable UART4"
default y
@@ -79,16 +87,6 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_TIM17
bool "Enable TIM17"
default n
endif
menuconfig BSP_USING_LPTIM
bool "Enable lptimer"
default n
select RT_USING_LPTIMER
if BSP_USING_LPTIM
config BSP_USING_LPTIM1
bool "Enable LPTIM1"
default n
endif
menuconfig BSP_USING_PWM
@@ -126,52 +124,84 @@ menu "On-chip Peripheral Drivers"
default n
endif
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
menuconfig BSP_USING_I2C
bool "Enable I2C BUS (software simulation)"
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
default n
if BSP_USING_I2C1
comment "Notice: PD7 --> 55; PG15 --> 111"
config BSP_I2C1_SCL_PIN
int "I2C1 scl pin number"
range 1 176
default 55
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 176
default 111
if BSP_USING_I2C
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
default n
if BSP_USING_I2C1
comment "Notice: PD7 --> 55; PG15 --> 111"
config BSP_I2C1_SCL_PIN
int "I2C1 scl pin number"
range 1 176
default 55
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 176
default 111
endif
menuconfig BSP_USING_I2C2
bool "Enable I2C2 BUS (software simulation)"
default n
if BSP_USING_I2C2
comment "Notice: PH4 --> 116; PH5 --> 117"
config BSP_I2C2_SCL_PIN
int "i2c2 scl pin number"
range 1 176
default 116
config BSP_I2C2_SDA_PIN
int "I2C2 sda pin number"
range 1 176
default 117
endif
menuconfig BSP_USING_I2C3
bool "Enable I2C3 BUS (software simulation)"
default n
if BSP_USING_I2C3
comment "Notice: PZ4 --> 180; PZ5 --> 181"
config BSP_I2C3_SCL_PIN
int "i2c3 scl pin number"
range 1 191
default 180
config BSP_I2C3_SDA_PIN
int "I2C3 sda pin number"
range 1 191
default 181
endif
endif
menuconfig BSP_USING_SPI
bool "Enable SPI BUS"
select RT_USING_SPI
default n
if BSP_USING_SPI
if BSP_USING_SPI
config BSP_USING_SPI5
bool "Enable SPI5 BUS"
default n
default n
config BSP_SPI5_TX_USING_DMA
bool "Enable SPI5 TX DMA"
depends on BSP_USING_SPI5
default n
config BSP_SPI5_RX_USING_DMA
bool "Enable SPI5 RX DMA"
depends on BSP_USING_SPI5
select BSP_SPI5_TX_USING_DMA
default n
default n
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
menu "Board extended module Drivers"
endmenu
endmenu
bsp/stm32/stm32mp157a-st-ev1/board/SConscript
+4 -12
View File
@@ -13,19 +13,11 @@ CubeMX_Config/Common/System/system_stm32mp1xx.c
CubeMX_Config/CM4/Src/stm32mp1xx_hal_msp.c
''')
if GetDepend(['BSP_USING_ADC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_PMIC']):
src += Glob('ports/drv_pmic.c')
if GetDepend(['BSP_USING_DAC']):
src += Glob('ports/drv_hard_i2c.c')
src += Glob('ports/stpmic.c')
if GetDepend(['BSP_USING_WWDG']):
src += Glob('ports/drv_wwdg.c')
if GetDepend(['BSP_USING_LPTIM']):
src += Glob('ports/drv_lptim.c')
if GetDepend(['BSP_USING_NAND']):
src += Glob('ports/drv_nand.c')
path = [cwd]
path += [cwd + '/CubeMX_Config/CM4/Inc']
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.c
-124
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@@ -1,124 +0,0 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#include "drv_hard_i2c.h"
//#define DRV_DEBUG
#define LOG_TAG "drv.hardi2c"
#include <drv_log.h>
I2C_HandleTypeDef hI2c4;
int32_t BSP_I2C4_Init(void)
{
int32_t status = RT_EOK;
if (HAL_I2C_GetState(&hI2c4) == HAL_I2C_STATE_RESET)
{
if (MX_I2C4_Init(&hI2c4) != HAL_OK)
{
status = -RT_EBUSY;
}
/* Init the I2C Msp */
if (HAL_I2C_Init(&hI2c4) != HAL_OK)
{
LOG_D("I2C4 Init Error!\n");
status = -RT_EBUSY;
}
}
return status;
}
int32_t BSP_I2C4_DeInit(void)
{
int32_t status = RT_EOK;
HAL_I2C_MspDeInit(&hI2c4);
/* Init the I2C */
if (HAL_I2C_DeInit(&hI2c4) != HAL_OK)
{
status = -RT_EEMPTY;
}
return status;
}
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c)
{
hI2c4.Instance = I2C4;
hI2c->Init.Timing = I2C4_TIMING;
hI2c->Init.OwnAddress1 = STPMU1_I2C_ADDRESS;
hI2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hI2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hI2c->Init.OwnAddress2 = 0;
hI2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hI2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hI2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
return HAL_I2C_Init(hI2c);
}
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length);
}
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
return I2C4_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length);
}
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials)
{
int32_t status = RT_EOK;
if(HAL_I2C_IsDeviceReady(&hI2c4, DevAddr, Trials, 1000) != HAL_OK)
{
status = -RT_EBUSY;
}
return status;
}
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if(HAL_I2C_Mem_Write(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
int32_t status = -RT_EIO;
if (HAL_I2C_Mem_Read(&hI2c4, DevAddr, Reg, MemAddSize, pData, Length, 10000) == HAL_OK)
{
status = RT_EOK;
}
return status;
}
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_hard_i2c.h
-48
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@@ -1,48 +0,0 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#ifndef __DRV_HARD_I2C_H__
#define __DRV_HARD_I2C_H__
/* Includes ------------------------------------------------------------------*/
#include "stm32mp1xx_hal.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STPMU1_I2C_ADDRESS ((0x33 & 0x7F) << 1)
#ifndef I2C_SPEED
#define I2C_SPEED ((uint32_t)100000)
#endif /* I2C_SPEED */
#ifndef I2C4_TIMING
#define I2C4_TIMING ((uint32_t)0x10805E89)
#endif
static int32_t I2C4_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C4_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_Init(void);
int32_t BSP_I2C4_DeInit(void);
int32_t BSP_I2C4_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C4_IsReady(uint16_t DevAddr, uint32_t Trials);
HAL_StatusTypeDef MX_I2C4_Init(I2C_HandleTypeDef *hI2c);
#ifdef __cplusplus
}
#endif
#endif
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_lptim.c
-128
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@@ -1,128 +0,0 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-19 thread-liu first version
*/
#include <board.h>
#ifdef BSP_USING_LPTIM
#include "drv_config.h"
#include <string.h>
#include <stdlib.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.lptimer"
#include <drv_log.h>
LPTIM_HandleTypeDef hlptim1;
void LPTIM1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_LPTIM_IRQHandler(&hlptim1);
/* leave interrupt */
rt_interrupt_leave();
}
void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
{
if(hlptim->Instance == LPTIM1)
{
rt_kprintf("hello rt-thread!\n");
}
}
static int lptim_control(uint8_t pre_value)
{
if(pre_value > 7)
{
pre_value = 7;
}
hlptim1.Instance->CFGR &= ~(7 << 9); /* clear PRESC[2:0] */
hlptim1.Instance->CFGR |= pre_value << 9; /* set PRESC[2:0] */
return RT_EOK;
}
/**
* This function initialize the lptim
*/
static int lptim_init(void)
{
hlptim1.Instance = LPTIM1;
hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV1;
hlptim1.Init.UltraLowPowerClock.Polarity = LPTIM_CLOCKPOLARITY_RISING;
hlptim1.Init.UltraLowPowerClock.SampleTime = LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION;
hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
hlptim1.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
{
LOG_D("LPTIM Init Error!\n");
return -RT_ERROR;
}
/* ### Start counting in interrupt mode ############################# */
if (HAL_LPTIM_Counter_Start_IT(&hlptim1, 5000) != HAL_OK)
{
LOG_D("LPTIM Start Counting Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_deinit()
{
if (HAL_LPTIM_DeInit(&hlptim1) != HAL_OK)
{
LOG_D("LPTIM Deinit Error!\n");
return -RT_ERROR;
}
return RT_EOK;
}
static int lptim_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "run"))
{
lptim_init();
}
else if (!strcmp(argv[1], "stop"))
{
lptim_deinit();
}
else if (!strcmp(argv[1], "set"))
{
if (argc > 2)
{
lptim_control(atoi(argv[2]));
}
}
}
else
{
rt_kprintf("Usage:\n");
rt_kprintf("lptim_sample run - open lptim, shell will printf 'hello rt-thread'\n");
rt_kprintf("lptim_sample set - set the lptim prescaler, lptim_sample set [0 - 7]\n");
}
return RT_EOK;
}
MSH_CMD_EXPORT(lptim_sample, low power timer sample);
#endif
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_nand.c
+670
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bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_nand.h
+59
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@@ -0,0 +1,59 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-00-30 thread-liu first version
*/
#ifndef __DRV_NAND_H__
#define __DRV_NAND_H__
#include "board.h"
#ifdef __cplusplus
extern "C"
{
#endif
#define NAND_MAX_PAGE_SIZE 4096
#define NAND_ECC_SECTOR_SIZE 512
#define NAND_TWHR_DELAY 25
#define NAND_TBERS_DELAY 4
#define MT29F8G08ABACAH4 0x64A690D3 /* id */
#define NAND_ADDR ((rt_uint32_t)0x80000000) /* nand base address */
#define NAND_ADDR_AREA (*(__IO rt_uint8_t *)NAND_ADDR)
#define NAND_CMD_AREA (*(__IO rt_uint8_t *)(NAND_ADDR | 1 << 16)) /* command */
#define NAND_DATA_AREA (*(__IO rt_uint8_t *)(NAND_ADDR | 1 << 17)) /* data */
/* nand flash command */
#define NAND_READID 0x90
#define NAND_FEATURE 0xEF
#define NAND_RESET 0xFF
#define NAND_READSTA 0x70
#define NAND_AREA_A 0x00
#define NAND_AREA_TRUE1 0x30
#define NAND_WRITE0 0x80
#define NAND_WRITE_TURE1 0x10
#define NAND_ERASE0 0x60
#define NAND_ERASE1 0xD0
#define NAND_MOVEDATA_CMD0 0x00
#define NAND_MOVEDATA_CMD1 0x35
#define NAND_MOVEDATA_CMD2 0x85
#define NAND_MOVEDATA_CMD3 0x10
/* nand flash status */
#define NAND_READY 0x40 /* read */
#define NAND_ECC1BITERR 0x03 /* ECC 1bit err */
#define NAND_ECC2BITERR 0x04 /* ECC 2bit or more err */
#ifdef __cplusplus
}
#endif
#endif
bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_pmic.c
+905
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bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.h → bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_pmic.h
+285 -85
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bsp/stm32/stm32mp157a-st-ev1/board/ports/drv_wwdg.c
-103
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@@ -1,103 +0,0 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-18 thread-liu the first version
*/
#include <board.h>
#if defined(BSP_USING_WWDG)
#include "drv_config.h"
#include <string.h>
#include <stdlib.h>
//#define DRV_DEBUG
#define LOG_TAG "drv.wwg"
#include <drv_log.h>
#define LED5_PIN GET_PIN(A, 14)
WWDG_HandleTypeDef hwwdg1;
void WWDG1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_WWDG_IRQHandler(&hwwdg1);
/* leave interrupt */
rt_interrupt_leave();
}
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg)
{
static unsigned char led_value = 0x00;
led_value = !led_value;
if(hwwdg->Instance==WWDG1)
{
HAL_WWDG_Refresh(&hwwdg1);
rt_pin_write(LED5_PIN, led_value);
}
}
static void wwdg_init()
{
rt_pin_mode(LED5_PIN, PIN_MODE_OUTPUT);
hwwdg1.Instance = WWDG1;
hwwdg1.Init.Prescaler = WWDG_PRESCALER_8;
hwwdg1.Init.Window = 0X5F;
hwwdg1.Init.Counter = 0x7F;
hwwdg1.Init.EWIMode = WWDG_EWI_ENABLE;
if (HAL_WWDG_Init(&hwwdg1) != HAL_OK)
{
Error_Handler();
}
}
static void wwdg_control(uint8_t pre_value)
{
if(pre_value > 7)
{
pre_value = 7;
}
hwwdg1.Instance->CFR &= ~(7 << 11); /* clear WDGTB[2:0] */
hwwdg1.Instance->CFR |= pre_value << 11; /* set WDGTB[2:0] */
}
static int wwdg_sample(int argc, char *argv[])
{
if (argc > 1)
{
if (!strcmp(argv[1], "run"))
{
wwdg_init();
}
else if (!strcmp(argv[1], "set"))
{
if (argc > 2)
{
wwdg_control(atoi(argv[2]));
}
}
}
else
{
rt_kprintf("Usage:\n");
rt_kprintf("wwdg_sample run - open wwdg, when feed wwdg in wwdg irq, the LD5 will blink\n");
rt_kprintf("wwdg_sample set - set the wwdg prescaler, wwdg_sample set [0 - 7]\n");
}
return RT_EOK;
}
MSH_CMD_EXPORT(wwdg_sample, window watch dog sample);
#endif
bsp/stm32/stm32mp157a-st-ev1/board/ports/stpmic.c
-1225
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bsp/stm32/stm32mp157a-st-ev1/rtconfig.h
+6
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@@ -152,6 +152,12 @@
/* samples: kernel and components samples */
/* Privated Packages of RealThread */
/* Network Utilities */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32MP1