Merge pull request #130 from aozima/pulls

update stm32f10x.
2026-09-19 16:26:55 +08:00 · 2013-07-12 13:13:47 -07:00
parent 9b45002f27 13c30f9269
commit 5ce81679ed
49 changed files with 5378 additions and 8766 deletions
@@ -1,33 +1,14 @@
-import rtconfig
+# for module compiling
+import os
 Import('RTT_ROOT')
-from building import *

-src_bsp = ['application.c', 'startup.c', 'board.c', 'stm32f10x_it.c']
-src_drv = ['rtc.c', 'usart.c', 'serial.c', 'led.c']
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)

-if GetDepend('RT_USING_DFS'):
-	if rtconfig.STM32_TYPE == 'STM32F10X_HD':
-		src_drv += ['sdcard.c']
-	else:
-		src_drv += ['msd.c']
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))

-if GetDepend('RT_USING_LWIP'):
-	src_drv += ['enc28j60.c'] + ['dm9000a.c']
-
-if GetDepend('RT_USING_RTGUI'):
-    src_drv += ['touch.c']
-
-if GetDepend('RT_USING_RTGUI'):
-	if rtconfig.RT_USING_LCD_TYPE == 'FMT0371':
-		src_drv += ['lcd_a70.c']
-	elif rtconfig.RT_USING_LCD_TYPE == 'ILI932X':
-		src_drv += ['ili_lcd_general.c']
-	elif rtconfig.RT_USING_LCD_TYPE == 'SSD1289':
-		src_drv += ['ssd1289.c']
-
-src = src_bsp + src_drv
-CPPPATH = [ GetCurrentDir() ]
-CPPDEFINES = []
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
-
-Return('group')
+Return('objs')
@@ -28,10 +28,8 @@ Export('RTT_ROOT')
 Export('rtconfig')

 # prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)

-# STM32 firemare library building script
-objs = objs + SConscript( GetCurrentDir() + '/Libraries/SConscript', variant_dir='build/bsp/Libraries', duplicate=0)

 # make a building
 DoBuilding(TARGET, objs)
@@ -1,210 +0,0 @@
-
-/*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-01-05     Bernard      the first version
- */
-
-/**
- * @addtogroup STM32
- */
-/*@{*/
-
-#include <board.h>
-#include <rtthread.h>
-
-#ifdef RT_USING_DFS
-/* dfs init */
-#include <dfs_init.h>
-/* dfs filesystem:ELM filesystem init */
-#include <dfs_elm.h>
-/* dfs Filesystem APIs */
-#include <dfs_fs.h>
-#endif
-
-#ifdef RT_USING_LWIP
-#include <lwip/sys.h>
-#include <lwip/api.h>
-#include <netif/ethernetif.h>
-#endif
-
-#ifdef RT_USING_RTGUI
-#include <rtgui/rtgui.h>
-#include <rtgui/rtgui_server.h>
-#include <rtgui/rtgui_system.h>
-#include <rtgui/driver.h>
-#include <rtgui/calibration.h>
-#endif
-
-#include "led.h"
-
-ALIGN(RT_ALIGN_SIZE)
-static rt_uint8_t led_stack[ 512 ];
-static struct rt_thread led_thread;
-static void led_thread_entry(void* parameter)
-{
-    unsigned int count=0;
-
-    rt_hw_led_init();
-
-    while (1)
-    {
-        /* led1 on */
-#ifndef RT_USING_FINSH
-        rt_kprintf("led on, count : %d\r\n",count);
-#endif
-        count++;
-        rt_hw_led_on(0);
-        rt_thread_delay( RT_TICK_PER_SECOND/2 ); /* sleep 0.5 second and switch to other thread */
-
-        /* led1 off */
-#ifndef RT_USING_FINSH
-        rt_kprintf("led off\r\n");
-#endif
-        rt_hw_led_off(0);
-        rt_thread_delay( RT_TICK_PER_SECOND/2 );
-    }
-}
-
-#ifdef RT_USING_RTGUI
-rt_bool_t cali_setup(void)
-{
-    rt_kprintf("cali setup entered\n");
-    return RT_FALSE;
-}
-
-void cali_store(struct calibration_data *data)
-{
-    rt_kprintf("cali finished (%d, %d), (%d, %d)\n",
-            data->min_x,
-            data->max_x,
-            data->min_y,
-            data->max_y);
-}
-#endif
-
-void rt_init_thread_entry(void* parameter)
-{
-/* Filesystem Initialization */
-#ifdef RT_USING_DFS
-	{
-		/* init the device filesystem */
-		dfs_init();
-
-#ifdef RT_USING_DFS_ELMFAT
-		/* init the elm chan FatFs filesystam*/
-		elm_init();
-
-		/* mount sd card fat partition 1 as root directory */
-		if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
-		{
-			rt_kprintf("File System initialized!\n");
-		}
-		else
-			rt_kprintf("File System initialzation failed!\n");
-#endif
-	}
-#endif
-
-/* LwIP Initialization */
-#ifdef RT_USING_LWIP
-	{
-		extern void lwip_sys_init(void);
-
-		/* register ethernetif device */
-		eth_system_device_init();
-
-#ifdef STM32F10X_CL
-		rt_hw_stm32_eth_init();
-#else
-	/* STM32F103 */
-	#if STM32_ETH_IF == 0
-			rt_hw_enc28j60_init();
-	#elif STM32_ETH_IF == 1
-			rt_hw_dm9000_init();
-	#endif
-#endif
-
-		/* re-init device driver */
-		rt_device_init_all();
-
-		/* init lwip system */
-		lwip_sys_init();
-		rt_kprintf("TCP/IP initialized!\n");
-	}
-#endif
-
-#ifdef RT_USING_RTGUI
-	{
-	    extern void rtgui_system_server_init(void);
-	    extern void rt_hw_lcd_init();
-	    extern void rtgui_touch_hw_init(void);
-
-		rt_device_t lcd;
-
-		/* init lcd */
-		rt_hw_lcd_init();
-
-		/* init touch panel */
-		rtgui_touch_hw_init();
-
-		/* re-init device driver */
-		rt_device_init_all();
-
-		/* find lcd device */
-		lcd = rt_device_find("lcd");
-
-		/* set lcd device as rtgui graphic driver */
-		rtgui_graphic_set_device(lcd);
-
-		/* init rtgui system server */
-		rtgui_system_server_init();
-
-        calibration_set_restore(cali_setup);
-        calibration_set_after(cali_store);
-        calibration_init();
-	}
-#endif /* #ifdef RT_USING_RTGUI */
-}
-
-int rt_application_init()
-{
-	rt_thread_t init_thread;
-
-	rt_err_t result;
-
-    /* init led thread */
-	result = rt_thread_init(&led_thread,
-		"led",
-		led_thread_entry, RT_NULL,
-		(rt_uint8_t*)&led_stack[0], sizeof(led_stack), 20, 5);
-	if (result == RT_EOK)
-	{
-        rt_thread_startup(&led_thread);
-	}
-
-#if (RT_THREAD_PRIORITY_MAX == 32)
-	init_thread = rt_thread_create("init",
-								rt_init_thread_entry, RT_NULL,
-								2048, 8, 20);
-#else
-	init_thread = rt_thread_create("init",
-								rt_init_thread_entry, RT_NULL,
-								2048, 80, 20);
-#endif
-
-	if (init_thread != RT_NULL)
-		rt_thread_startup(init_thread);
-
-	return 0;
-}
-
-/*@}*/
@@ -0,0 +1,11 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'applications')
+src	= Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
@@ -0,0 +1,181 @@
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      the first version
+ * 2013-07-12     aozima       update for auto initial.
+ */
+
+/**
+ * @addtogroup STM32
+ */
+/*@{*/
+
+#include <board.h>
+#include <rtthread.h>
+
+#ifdef  RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif  /* RT_USING_COMPONENTS_INIT */
+
+#ifdef RT_USING_DFS
+/* dfs filesystem:ELM filesystem init */
+#include <dfs_elm.h>
+/* dfs Filesystem APIs */
+#include <dfs_fs.h>
+#endif
+
+#ifdef RT_USING_RTGUI
+#include <rtgui/rtgui.h>
+#include <rtgui/rtgui_server.h>
+#include <rtgui/rtgui_system.h>
+#include <rtgui/driver.h>
+#include <rtgui/calibration.h>
+#endif
+
+#include "led.h"
+
+ALIGN(RT_ALIGN_SIZE)
+static rt_uint8_t led_stack[ 512 ];
+static struct rt_thread led_thread;
+static void led_thread_entry(void* parameter)
+{
+    unsigned int count=0;
+
+    rt_hw_led_init();
+
+    while (1)
+    {
+        /* led1 on */
+#ifndef RT_USING_FINSH
+        rt_kprintf("led on, count : %d\r\n",count);
+#endif
+        count++;
+        rt_hw_led_on(0);
+        rt_thread_delay( RT_TICK_PER_SECOND/2 ); /* sleep 0.5 second and switch to other thread */
+
+        /* led1 off */
+#ifndef RT_USING_FINSH
+        rt_kprintf("led off\r\n");
+#endif
+        rt_hw_led_off(0);
+        rt_thread_delay( RT_TICK_PER_SECOND/2 );
+    }
+}
+
+#ifdef RT_USING_RTGUI
+rt_bool_t cali_setup(void)
+{
+    rt_kprintf("cali setup entered\n");
+    return RT_FALSE;
+}
+
+void cali_store(struct calibration_data *data)
+{
+    rt_kprintf("cali finished (%d, %d), (%d, %d)\n",
+               data->min_x,
+               data->max_x,
+               data->min_y,
+               data->max_y);
+}
+#endif /* RT_USING_RTGUI */
+
+void rt_init_thread_entry(void* parameter)
+{
+#ifdef RT_USING_COMPONENTS_INIT
+    /* initialization RT-Thread Components */
+    rt_components_init();
+#endif
+
+#ifdef  RT_USING_FINSH
+    finsh_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif  /* RT_USING_FINSH */
+
+    /* Filesystem Initialization */
+#if defined(RT_USING_DFS) && defined(RT_USING_DFS_ELMFAT)
+    /* mount sd card fat partition 1 as root directory */
+    if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
+    {
+        rt_kprintf("File System initialized!\n");
+    }
+    else
+        rt_kprintf("File System initialzation failed!\n");
+#endif  /* RT_USING_DFS */
+
+#ifdef RT_USING_RTGUI
+    {
+        extern void rtgui_system_server_init(void);
+        extern void rt_hw_lcd_init();
+        extern void rtgui_touch_hw_init(void);
+
+        rt_device_t lcd;
+
+        /* init lcd */
+        rt_hw_lcd_init();
+
+        /* init touch panel */
+        rtgui_touch_hw_init();
+
+        /* re-init device driver */
+        rt_device_init_all();
+
+        /* find lcd device */
+        lcd = rt_device_find("lcd");
+
+        /* set lcd device as rtgui graphic driver */
+        rtgui_graphic_set_device(lcd);
+
+        /* init rtgui system server */
+        rtgui_system_server_init();
+
+        calibration_set_restore(cali_setup);
+        calibration_set_after(cali_store);
+        calibration_init();
+    }
+#endif /* #ifdef RT_USING_RTGUI */
+}
+
+int rt_application_init(void)
+{
+    rt_thread_t init_thread;
+
+    rt_err_t result;
+
+    /* init led thread */
+    result = rt_thread_init(&led_thread,
+                            "led",
+                            led_thread_entry,
+                            RT_NULL,
+                            (rt_uint8_t*)&led_stack[0],
+                            sizeof(led_stack),
+                            20,
+                            5);
+    if (result == RT_EOK)
+    {
+        rt_thread_startup(&led_thread);
+    }
+
+#if (RT_THREAD_PRIORITY_MAX == 32)
+    init_thread = rt_thread_create("init",
+                                   rt_init_thread_entry, RT_NULL,
+                                   2048, 8, 20);
+#else
+    init_thread = rt_thread_create("init",
+                                   rt_init_thread_entry, RT_NULL,
+                                   2048, 80, 20);
+#endif
+
+    if (init_thread != RT_NULL)
+        rt_thread_startup(init_thread);
+
+    return 0;
+}
+
+/*@}*/
@@ -0,0 +1,110 @@
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-31     Bernard      first implementation
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+
+/**
+ * @addtogroup STM32
+ */
+
+/*@{*/
+
+extern int  rt_application_init(void);
+
+#ifdef __CC_ARM
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#elif __ICCARM__
+#pragma section="HEAP"
+#else
+extern int __bss_end;
+#endif
+
+/*******************************************************************************
+* Function Name  : assert_failed
+* Description    : Reports the name of the source file and the source line number
+*                  where the assert error has occurred.
+* Input          : - file: pointer to the source file name
+*                  - line: assert error line source number
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void assert_failed(u8* file, u32 line)
+{
+    rt_kprintf("\n\r Wrong parameter value detected on\r\n");
+    rt_kprintf("       file  %s\r\n", file);
+    rt_kprintf("       line  %d\r\n", line);
+
+    while (1) ;
+}
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+    /* init board */
+    rt_hw_board_init();
+
+    /* show version */
+    rt_show_version();
+
+#ifdef RT_USING_HEAP
+#if STM32_EXT_SRAM
+    rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
+#else
+#ifdef __CC_ARM
+    rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
+#elif __ICCARM__
+    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
+#else
+    /* init memory system */
+    rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
+#endif
+#endif  /* STM32_EXT_SRAM */
+#endif /* RT_USING_HEAP */
+
+    /* init scheduler system */
+    rt_system_scheduler_init();
+
+    /* init timer thread */
+    rt_system_timer_thread_init();
+
+    /* init application */
+    rt_application_init();
+
+    /* init idle thread */
+    rt_thread_idle_init();
+
+    /* start scheduler */
+    rt_system_scheduler_start();
+
+    /* never reach here */
+    return ;
+}
+
+int main(void)
+{
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
+
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
+
+    return 0;
+}
+
+/*@}*/
@@ -0,0 +1,40 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'drivers')
+
+# add the general drvers.
+src = Split("""
+board.c
+stm32f10x_it.c
+led.c
+usart.c
+""")
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_LWIP'):
+    src += ['dm9000a.c']
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_DFS'):
+    src += ['sdcard.c']
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_RTC'):
+    src += ['rtc.c']
+
+# add Ethernet drvers.
+if GetDepend('RT_USING_RTGUI'):
+    src += ['touch.c']
+    if rtconfig.RT_USING_LCD_TYPE == 'ILI932X':
+        src += ['ili_lcd_general.c']
+    elif rtconfig.RT_USING_LCD_TYPE == 'SSD1289':
+        src += ['ssd1289.c']
+
+    
+CPPPATH = [cwd]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
@@ -10,6 +10,7 @@
 * Change Logs:
 * Date           Author       Notes
 * 2009-01-05     Bernard      first implementation
+ * 2013-07-12     aozima       update for auto initial.
 */

 #include <rthw.h>
@@ -19,6 +20,10 @@
 #include "stm32f10x_fsmc.h"
 #include "board.h"

+#ifdef  RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif  /* RT_USING_COMPONENTS_INIT */
+
 /**
 * @addtogroup STM32
 */
@@ -35,19 +40,19 @@
 void NVIC_Configuration(void)
 {
 #ifdef  VECT_TAB_RAM
-	/* Set the Vector Table base location at 0x20000000 */
-	NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
+    /* Set the Vector Table base location at 0x20000000 */
+    NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
 #else  /* VECT_TAB_FLASH  */
-	/* Set the Vector Table base location at 0x08000000 */
-	NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
+    /* Set the Vector Table base location at 0x08000000 */
+    NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
 #endif
 }

 #if STM32_EXT_SRAM
 void EXT_SRAM_Configuration(void)
 {
-	FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
-	FSMC_NORSRAMTimingInitTypeDef  p;
+    FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
+    FSMC_NORSRAMTimingInitTypeDef  p;

    /* FSMC GPIO configure */
    {
@@ -117,35 +122,35 @@ void EXT_SRAM_Configuration(void)
    }
    /* FSMC GPIO configure */

-	/*-- FSMC Configuration ------------------------------------------------------*/
-	p.FSMC_AddressSetupTime = 0;
-	p.FSMC_AddressHoldTime = 0;
-	p.FSMC_DataSetupTime = 2;
-	p.FSMC_BusTurnAroundDuration = 0;
-	p.FSMC_CLKDivision = 0;
-	p.FSMC_DataLatency = 0;
-	p.FSMC_AccessMode = FSMC_AccessMode_A;
+    /*-- FSMC Configuration ------------------------------------------------------*/
+    p.FSMC_AddressSetupTime = 0;
+    p.FSMC_AddressHoldTime = 0;
+    p.FSMC_DataSetupTime = 2;
+    p.FSMC_BusTurnAroundDuration = 0;
+    p.FSMC_CLKDivision = 0;
+    p.FSMC_DataLatency = 0;
+    p.FSMC_AccessMode = FSMC_AccessMode_A;

-	FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
-	FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
-	FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
-	FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
-	FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
-	FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
-	FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
-	FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
-	FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
-	FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
-	FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
-	FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
-	FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
-	FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
-	FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
+    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
+    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+    FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
+    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

-	FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
+    FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

-	/* Enable FSMC Bank1_SRAM Bank */
-	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
+    /* Enable FSMC Bank1_SRAM Bank */
+    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
 }
 #endif

@@ -153,34 +158,38 @@ void EXT_SRAM_Configuration(void)
 * This is the timer interrupt service routine.
 *
 */
-void rt_hw_timer_handler(void)
+void SysTick_Handler(void)
 {
-	/* enter interrupt */
-	rt_interrupt_enter();
+    /* enter interrupt */
+    rt_interrupt_enter();

-	rt_tick_increase();
+    rt_tick_increase();

-	/* leave interrupt */
-	rt_interrupt_leave();
+    /* leave interrupt */
+    rt_interrupt_leave();
 }

 /**
 * This function will initial STM32 board.
 */
-void rt_hw_board_init()
+void rt_hw_board_init(void)
 {
-	/* NVIC Configuration */
-	NVIC_Configuration();
+    /* NVIC Configuration */
+    NVIC_Configuration();

    /* Configure the SysTick */
    SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );

 #if STM32_EXT_SRAM
-	EXT_SRAM_Configuration();
+    EXT_SRAM_Configuration();
 #endif

-	rt_hw_usart_init();
-	rt_console_set_device(CONSOLE_DEVICE);
+    rt_hw_usart_init();
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
 }

 /*@}*/
@@ -16,10 +16,9 @@
 #ifndef __BOARD_H__
 #define __BOARD_H__

+#include "stm32f10x.h"
+
 /* board configuration */
-// <o> SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
-// 	<i>Default: 1
-#define STM32_USE_SDIO			1

 /* whether use board external SRAM memory */
 // <e>Use external SRAM memory on the board
@@ -38,38 +37,11 @@
 #define STM32_SRAM_SIZE         64
 #define STM32_SRAM_END          (0x20000000 + STM32_SRAM_SIZE * 1024)

-// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
-// 	<i>Default: 1
-#define STM32_CONSOLE_USART		1
+/* USART driver select. */
+#define RT_USING_UART1
+#define RT_USING_UART2
+#define RT_USING_UART3

-// <o> Ethernet Interface: <0=> Microchip ENC28J60 <1=> Davicom DM9000A
-// 	<i>Default: 0
-#define STM32_ETH_IF			1
-
-void rt_hw_board_led_on(int n);
-void rt_hw_board_led_off(int n);
-void rt_hw_board_init(void);
-
-#if STM32_CONSOLE_USART == 0
-#define CONSOLE_DEVICE "no"
-#elif STM32_CONSOLE_USART == 1
-#define CONSOLE_DEVICE "uart1"
-#elif STM32_CONSOLE_USART == 2
-#define CONSOLE_DEVICE "uart2"
-#elif STM32_CONSOLE_USART == 3
-#define CONSOLE_DEVICE "uart3"
-#endif
-
-void rt_hw_usart_init(void);
-
-/* SD Card init function */
-void rt_hw_sdcard_init(void);
-void rt_hw_msd_init(void);
-
-/* ETH interface init function */
-void rt_hw_enc28j60_init(void);
-void rt_hw_dm9000_init(void);
-
-#endif
+#endif /* __BOARD_H__ */

 // <<< Use Configuration Wizard in Context Menu >>>
@@ -731,7 +731,7 @@ static void FSMC_Configuration()
 	FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);
 }

-void rt_hw_dm9000_init()
+int rt_hw_dm9000_init(void)
 {
    RCC_Configuration();
    NVIC_Configuration();
@@ -771,7 +771,10 @@ void rt_hw_dm9000_init()
    dm9000_device.parent.eth_tx     = rt_dm9000_tx;

    eth_device_init(&(dm9000_device.parent), "e0");
+
+    return 0;
 }
+INIT_DEVICE_EXPORT(rt_hw_dm9000_init);

 void dm9000(void)
 {
@@ -160,6 +160,4 @@

 #define GPCR_GEP_CNTL       (1<<0)

-void rt_hw_dm9000_init(void);
-
 #endif
@@ -0,0 +1,152 @@
+/**
+  ******************************************************************************
+  * @file    Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c
+  * @author  MCD Application Team
+  * @version V3.5.0
+  * @date    08-April-2011
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f10x_it.h"
+#include <board.h>
+#include <rtthread.h>
+
+/** @addtogroup Template_Project
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/******************************************************************************/
+/*            Cortex-M3 Processor Exceptions Handlers                         */
+/******************************************************************************/
+
+/**
+  * @brief   This function handles NMI exception.
+  * @param  None
+  * @retval None
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Memory Manage exception.
+  * @param  None
+  * @retval None
+  */
+void MemManage_Handler(void)
+{
+    /* Go to infinite loop when Memory Manage exception occurs */
+    while (1)
+    {
+    }
+}
+
+/**
+  * @brief  This function handles Bus Fault exception.
+  * @param  None
+  * @retval None
+  */
+void BusFault_Handler(void)
+{
+    /* Go to infinite loop when Bus Fault exception occurs */
+    while (1)
+    {
+    }
+}
+
+/**
+  * @brief  This function handles Usage Fault exception.
+  * @param  None
+  * @retval None
+  */
+void UsageFault_Handler(void)
+{
+    /* Go to infinite loop when Usage Fault exception occurs */
+    while (1)
+    {
+    }
+}
+
+/**
+  * @brief  This function handles SVCall exception.
+  * @param  None
+  * @retval None
+  */
+void SVC_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Debug Monitor exception.
+  * @param  None
+  * @retval None
+  */
+void DebugMon_Handler(void)
+{
+}
+
+//void SysTick_Handler(void)
+//{
+//    // definition in boarc.c
+//}
+
+/******************************************************************************/
+/*                 STM32F10x Peripherals Interrupt Handlers                   */
+/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
+/*  available peripheral interrupt handler's name please refer to the startup */
+/*  file (startup_stm32f10x_xx.s).                                            */
+/******************************************************************************/
+
+#ifdef  RT_USING_LWIP
+/*******************************************************************************
+* Function Name  : EXTI4_IRQHandler
+* Description    : This function handles External lines 9 to 5 interrupt request.
+* Input          : None
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void EXTI4_IRQHandler(void)
+{
+    extern void rt_dm9000_isr(void);
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    /* Clear the DM9000A EXTI line pending bit */
+    EXTI_ClearITPendingBit(EXTI_Line4);
+
+    rt_dm9000_isr();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* RT_USING_LWIP */
+
+/**
+  * @}
+  */
+
+
+/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
@@ -0,0 +1,375 @@
+/*
+ * File      : usart.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      the first version
+ * 2010-03-29     Bernard      remove interrupt Tx and DMA Rx mode
+ * 2013-05-13     aozima       update for kehong-lingtai.
+ */
+
+#include "stm32f10x.h"
+#include "usart.h"
+#include "board.h"
+
+#include <rtdevice.h>
+
+/* USART1 */
+#define UART1_GPIO_TX		GPIO_Pin_9
+#define UART1_GPIO_RX		GPIO_Pin_10
+#define UART1_GPIO			GPIOA
+
+/* USART2 */
+#define UART2_GPIO_TX	    GPIO_Pin_2
+#define UART2_GPIO_RX	    GPIO_Pin_3
+#define UART2_GPIO	    	GPIOA
+
+/* USART3_REMAP[1:0] = 00 */
+#define UART3_GPIO_TX		GPIO_Pin_10
+#define UART3_GPIO_RX		GPIO_Pin_11
+#define UART3_GPIO			GPIOB
+
+/* STM32 uart driver */
+struct stm32_uart
+{
+    USART_TypeDef* uart_device;
+    IRQn_Type irq;
+};
+
+static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct stm32_uart* uart;
+    USART_InitTypeDef USART_InitStructure;
+
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    USART_InitStructure.USART_BaudRate = cfg->baud_rate;
+
+    if (cfg->data_bits == DATA_BITS_8)
+        USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+
+    if (cfg->stop_bits == STOP_BITS_1)
+        USART_InitStructure.USART_StopBits = USART_StopBits_1;
+    else if (cfg->stop_bits == STOP_BITS_2)
+        USART_InitStructure.USART_StopBits = USART_StopBits_2;
+
+    USART_InitStructure.USART_Parity = USART_Parity_No;
+    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+    USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+    USART_Init(uart->uart_device, &USART_InitStructure);
+
+    /* Enable USART */
+    USART_Cmd(uart->uart_device, ENABLE);
+    /* enable interrupt */
+    USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
+
+    return RT_EOK;
+}
+
+static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct stm32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+        UART_DISABLE_IRQ(uart->irq);
+        break;
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+        UART_ENABLE_IRQ(uart->irq);
+        break;
+    }
+
+    return RT_EOK;
+}
+
+static int stm32_putc(struct rt_serial_device *serial, char c)
+{
+    struct stm32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    while (!(uart->uart_device->SR & USART_FLAG_TXE));
+    uart->uart_device->DR = c;
+
+    return 1;
+}
+
+static int stm32_getc(struct rt_serial_device *serial)
+{
+    int ch;
+    struct stm32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct stm32_uart *)serial->parent.user_data;
+
+    ch = -1;
+    if (uart->uart_device->SR & USART_FLAG_RXNE)
+    {
+        ch = uart->uart_device->DR & 0xff;
+    }
+
+    return ch;
+}
+
+static const struct rt_uart_ops stm32_uart_ops =
+{
+    stm32_configure,
+    stm32_control,
+    stm32_putc,
+    stm32_getc,
+};
+
+#if defined(RT_USING_UART1)
+/* UART1 device driver structure */
+struct serial_ringbuffer uart1_int_rx;
+struct stm32_uart uart1 =
+{
+    USART1,
+    USART1_IRQn,
+};
+struct rt_serial_device serial1;
+
+void USART1_IRQHandler(void)
+{
+    struct stm32_uart* uart;
+
+    uart = &uart1;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+    if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
+    {
+        rt_hw_serial_isr(&serial1);
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
+    }
+    if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
+    {
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* RT_USING_UART1 */
+
+#if defined(RT_USING_UART2)
+/* UART1 device driver structure */
+struct serial_ringbuffer uart2_int_rx;
+struct stm32_uart uart2 =
+{
+    USART2,
+    USART2_IRQn,
+};
+struct rt_serial_device serial2;
+
+void USART2_IRQHandler(void)
+{
+    struct stm32_uart* uart;
+
+    uart = &uart2;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+    if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
+    {
+        rt_hw_serial_isr(&serial2);
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
+    }
+    if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
+    {
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* RT_USING_UART2 */
+
+#if defined(RT_USING_UART3)
+/* UART1 device driver structure */
+struct serial_ringbuffer uart3_int_rx;
+struct stm32_uart uart3 =
+{
+    USART3,
+    USART3_IRQn,
+};
+struct rt_serial_device serial3;
+
+void USART3_IRQHandler(void)
+{
+    struct stm32_uart* uart;
+
+    uart = &uart3;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+    if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
+    {
+        rt_hw_serial_isr(&serial3);
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
+    }
+    if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
+    {
+        /* clear interrupt */
+        USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* RT_USING_UART3 */
+
+static void RCC_Configuration(void)
+{
+#ifdef RT_USING_UART1
+    /* Enable UART GPIO clocks */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+    /* Enable UART clock */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
+#endif /* RT_USING_UART1 */
+
+#ifdef RT_USING_UART2
+    /* Enable UART GPIO clocks */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+    /* Enable UART clock */
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
+#endif /* RT_USING_UART2 */
+
+#ifdef RT_USING_UART3
+    /* Enable UART GPIO clocks */
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+    /* Enable UART clock */
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
+#endif /* RT_USING_UART3 */
+}
+
+static void GPIO_Configuration(void)
+{
+    GPIO_InitTypeDef GPIO_InitStructure;
+
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
+
+#ifdef RT_USING_UART1
+    /* Configure USART Rx/tx PIN */
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+    GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
+    GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
+
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
+    GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
+#endif /* RT_USING_UART1 */
+
+#ifdef RT_USING_UART2
+    /* Configure USART Rx/tx PIN */
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+    GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
+    GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
+
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
+    GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
+#endif /* RT_USING_UART2 */
+
+#ifdef RT_USING_UART3
+    /* Configure USART Rx/tx PIN */
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+    GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
+    GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
+
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
+    GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
+#endif /* RT_USING_UART3 */
+}
+
+static void NVIC_Configuration(struct stm32_uart* uart)
+{
+    NVIC_InitTypeDef NVIC_InitStructure;
+
+    /* Enable the USART1 Interrupt */
+    NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
+    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
+}
+
+void rt_hw_usart_init(void)
+{
+    struct stm32_uart* uart;
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+    RCC_Configuration();
+    GPIO_Configuration();
+
+#ifdef RT_USING_UART1
+    uart = &uart1;
+    config.baud_rate = BAUD_RATE_115200;
+
+    serial1.ops    = &stm32_uart_ops;
+    serial1.int_rx = &uart1_int_rx;
+    serial1.config = config;
+
+    NVIC_Configuration(&uart1);
+
+    /* register UART1 device */
+    rt_hw_serial_register(&serial1, "uart1",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                          uart);
+#endif /* RT_USING_UART1 */
+
+#ifdef RT_USING_UART2
+    uart = &uart2;
+
+    config.baud_rate = BAUD_RATE_115200;
+    serial2.ops    = &stm32_uart_ops;
+    serial2.int_rx = &uart2_int_rx;
+    serial2.config = config;
+
+    NVIC_Configuration(&uart2);
+
+    /* register UART1 device */
+    rt_hw_serial_register(&serial2, "uart2",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          uart);
+#endif /* RT_USING_UART2 */
+
+#ifdef RT_USING_UART3
+    uart = &uart3;
+
+    config.baud_rate = BAUD_RATE_115200;
+
+    serial3.ops    = &stm32_uart_ops;
+    serial3.int_rx = &uart3_int_rx;
+    serial3.config = config;
+
+    NVIC_Configuration(&uart3);
+
+    /* register UART1 device */
+    rt_hw_serial_register(&serial3, "uart3",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
+                          uart);
+#endif /* RT_USING_UART3 */
+}
@@ -18,6 +18,9 @@
 #include <rthw.h>
 #include <rtthread.h>

+#define UART_ENABLE_IRQ(n)            NVIC_EnableIRQ((n))
+#define UART_DISABLE_IRQ(n)           NVIC_DisableIRQ((n))
+
 void rt_hw_usart_init(void);

 #endif
@@ -1,315 +0,0 @@
-/*
- * File      : enc28j60.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-01-05     Bernard      the first version
- */
-
-#ifndef __ENC28J60_H__
-#define __ENC28J60_H__
-
-#include <rtthread.h>
-
-// ENC28J60 Control Registers
-// Control register definitions are a combination of address,
-// bank number, and Ethernet/MAC/PHY indicator bits.
-// - Register address        (bits 0-4)
-// - Bank number        (bits 5-6)
-// - MAC/PHY indicator        (bit 7)
-#define ADDR_MASK        0x1F
-#define BANK_MASK        0x60
-#define SPRD_MASK        0x80
-// All-bank registers
-#define EIE              0x1B
-#define EIR              0x1C
-#define ESTAT            0x1D
-#define ECON2            0x1E
-#define ECON1            0x1F
-// Bank 0 registers
-#define ERDPTL           (0x00|0x00)
-#define ERDPTH           (0x01|0x00)
-#define EWRPTL           (0x02|0x00)
-#define EWRPTH           (0x03|0x00)
-#define ETXSTL           (0x04|0x00)
-#define ETXSTH           (0x05|0x00)
-#define ETXNDL           (0x06|0x00)
-#define ETXNDH           (0x07|0x00)
-#define ERXSTL           (0x08|0x00)
-#define ERXSTH           (0x09|0x00)
-#define ERXNDL           (0x0A|0x00)
-#define ERXNDH           (0x0B|0x00)
-#define ERXRDPTL         (0x0C|0x00)
-#define ERXRDPTH         (0x0D|0x00)
-#define ERXWRPTL         (0x0E|0x00)
-#define ERXWRPTH         (0x0F|0x00)
-#define EDMASTL          (0x10|0x00)
-#define EDMASTH          (0x11|0x00)
-#define EDMANDL          (0x12|0x00)
-#define EDMANDH          (0x13|0x00)
-#define EDMADSTL         (0x14|0x00)
-#define EDMADSTH         (0x15|0x00)
-#define EDMACSL          (0x16|0x00)
-#define EDMACSH          (0x17|0x00)
-// Bank 1 registers
-#define EHT0             (0x00|0x20)
-#define EHT1             (0x01|0x20)
-#define EHT2             (0x02|0x20)
-#define EHT3             (0x03|0x20)
-#define EHT4             (0x04|0x20)
-#define EHT5             (0x05|0x20)
-#define EHT6             (0x06|0x20)
-#define EHT7             (0x07|0x20)
-#define EPMM0            (0x08|0x20)
-#define EPMM1            (0x09|0x20)
-#define EPMM2            (0x0A|0x20)
-#define EPMM3            (0x0B|0x20)
-#define EPMM4            (0x0C|0x20)
-#define EPMM5            (0x0D|0x20)
-#define EPMM6            (0x0E|0x20)
-#define EPMM7            (0x0F|0x20)
-#define EPMCSL           (0x10|0x20)
-#define EPMCSH           (0x11|0x20)
-#define EPMOL            (0x14|0x20)
-#define EPMOH            (0x15|0x20)
-#define EWOLIE           (0x16|0x20)
-#define EWOLIR           (0x17|0x20)
-#define ERXFCON          (0x18|0x20)
-#define EPKTCNT          (0x19|0x20)
-// Bank 2 registers
-#define MACON1           (0x00|0x40|0x80)
-#define MACON2           (0x01|0x40|0x80)
-#define MACON3           (0x02|0x40|0x80)
-#define MACON4           (0x03|0x40|0x80)
-#define MABBIPG          (0x04|0x40|0x80)
-#define MAIPGL           (0x06|0x40|0x80)
-#define MAIPGH           (0x07|0x40|0x80)
-#define MACLCON1         (0x08|0x40|0x80)
-#define MACLCON2         (0x09|0x40|0x80)
-#define MAMXFLL          (0x0A|0x40|0x80)
-#define MAMXFLH          (0x0B|0x40|0x80)
-#define MAPHSUP          (0x0D|0x40|0x80)
-#define MICON            (0x11|0x40|0x80)
-#define MICMD            (0x12|0x40|0x80)
-#define MIREGADR         (0x14|0x40|0x80)
-#define MIWRL            (0x16|0x40|0x80)
-#define MIWRH            (0x17|0x40|0x80)
-#define MIRDL            (0x18|0x40|0x80)
-#define MIRDH            (0x19|0x40|0x80)
-// Bank 3 registers
-#define MAADR1           (0x00|0x60|0x80)
-#define MAADR0           (0x01|0x60|0x80)
-#define MAADR3           (0x02|0x60|0x80)
-#define MAADR2           (0x03|0x60|0x80)
-#define MAADR5           (0x04|0x60|0x80)
-#define MAADR4           (0x05|0x60|0x80)
-#define EBSTSD           (0x06|0x60)
-#define EBSTCON          (0x07|0x60)
-#define EBSTCSL          (0x08|0x60)
-#define EBSTCSH          (0x09|0x60)
-#define MISTAT           (0x0A|0x60|0x80)
-#define EREVID           (0x12|0x60)
-#define ECOCON           (0x15|0x60)
-#define EFLOCON          (0x17|0x60)
-#define EPAUSL           (0x18|0x60)
-#define EPAUSH           (0x19|0x60)
-// PHY registers
-#define PHCON1           0x00
-#define PHSTAT1          0x01
-#define PHHID1           0x02
-#define PHHID2           0x03
-#define PHCON2           0x10
-#define PHSTAT2          0x11
-#define PHIE             0x12
-#define PHIR             0x13
-#define PHLCON           0x14
-
-// ENC28J60 ERXFCON Register Bit Definitions
-#define ERXFCON_UCEN     0x80
-#define ERXFCON_ANDOR    0x40
-#define ERXFCON_CRCEN    0x20
-#define ERXFCON_PMEN     0x10
-#define ERXFCON_MPEN     0x08
-#define ERXFCON_HTEN     0x04
-#define ERXFCON_MCEN     0x02
-#define ERXFCON_BCEN     0x01
-// ENC28J60 EIE Register Bit Definitions
-#define EIE_INTIE        0x80
-#define EIE_PKTIE        0x40
-#define EIE_DMAIE        0x20
-#define EIE_LINKIE       0x10
-#define EIE_TXIE         0x08
-#define EIE_WOLIE        0x04
-#define EIE_TXERIE       0x02
-#define EIE_RXERIE       0x01
-// ENC28J60 EIR Register Bit Definitions
-#define EIR_PKTIF        0x40
-#define EIR_DMAIF        0x20
-#define EIR_LINKIF       0x10
-#define EIR_TXIF         0x08
-#define EIR_WOLIF        0x04
-#define EIR_TXERIF       0x02
-#define EIR_RXERIF       0x01
-// ENC28J60 ESTAT Register Bit Definitions
-#define ESTAT_INT        0x80
-#define ESTAT_LATECOL    0x10
-#define ESTAT_RXBUSY     0x04
-#define ESTAT_TXABRT     0x02
-#define ESTAT_CLKRDY     0x01
-// ENC28J60 ECON2 Register Bit Definitions
-#define ECON2_AUTOINC    0x80
-#define ECON2_PKTDEC     0x40
-#define ECON2_PWRSV      0x20
-#define ECON2_VRPS       0x08
-// ENC28J60 ECON1 Register Bit Definitions
-#define ECON1_TXRST      0x80
-#define ECON1_RXRST      0x40
-#define ECON1_DMAST      0x20
-#define ECON1_CSUMEN     0x10
-#define ECON1_TXRTS      0x08
-#define ECON1_RXEN       0x04
-#define ECON1_BSEL1      0x02
-#define ECON1_BSEL0      0x01
-// ENC28J60 MACON1 Register Bit Definitions
-#define MACON1_LOOPBK    0x10
-#define MACON1_TXPAUS    0x08
-#define MACON1_RXPAUS    0x04
-#define MACON1_PASSALL   0x02
-#define MACON1_MARXEN    0x01
-// ENC28J60 MACON2 Register Bit Definitions
-#define MACON2_MARST     0x80
-#define MACON2_RNDRST    0x40
-#define MACON2_MARXRST   0x08
-#define MACON2_RFUNRST   0x04
-#define MACON2_MATXRST   0x02
-#define MACON2_TFUNRST   0x01
-// ENC28J60 MACON3 Register Bit Definitions
-#define MACON3_PADCFG2   0x80
-#define MACON3_PADCFG1   0x40
-#define MACON3_PADCFG0   0x20
-#define MACON3_TXCRCEN   0x10
-#define MACON3_PHDRLEN   0x08
-#define MACON3_HFRMLEN   0x04
-#define MACON3_FRMLNEN   0x02
-#define MACON3_FULDPX    0x01
-// ENC28J60 MACON4 Register Bit Definitions
-#define	MACON4_DEFER	(1<<6)
-#define	MACON4_BPEN		(1<<5)
-#define	MACON4_NOBKOFF	(1<<4)
-// ENC28J60 MICMD Register Bit Definitions
-#define MICMD_MIISCAN    0x02
-#define MICMD_MIIRD      0x01
-// ENC28J60 MISTAT Register Bit Definitions
-#define MISTAT_NVALID    0x04
-#define MISTAT_SCAN      0x02
-#define MISTAT_BUSY      0x01
-// ENC28J60 PHY PHCON1 Register Bit Definitions
-#define PHCON1_PRST      0x8000
-#define PHCON1_PLOOPBK   0x4000
-#define PHCON1_PPWRSV    0x0800
-#define PHCON1_PDPXMD    0x0100
-// ENC28J60 PHY PHSTAT1 Register Bit Definitions
-#define PHSTAT1_PFDPX    0x1000
-#define PHSTAT1_PHDPX    0x0800
-#define PHSTAT1_LLSTAT   0x0004
-#define PHSTAT1_JBSTAT   0x0002
-/* ENC28J60 PHY PHSTAT2 Register Bit Definitions */
-#define PHSTAT2_TXSTAT	(1 << 13)
-#define PHSTAT2_RXSTAT	(1 << 12)
-#define PHSTAT2_COLSTAT	(1 << 11)
-#define PHSTAT2_LSTAT	(1 << 10)
-#define PHSTAT2_DPXSTAT	(1 << 9)
-#define PHSTAT2_PLRITY	(1 << 5)
-// ENC28J60 PHY PHCON2 Register Bit Definitions
-#define PHCON2_FRCLINK   0x4000
-#define PHCON2_TXDIS     0x2000
-#define PHCON2_JABBER    0x0400
-#define PHCON2_HDLDIS    0x0100
-
-// ENC28J60 Packet Control Byte Bit Definitions
-#define PKTCTRL_PHUGEEN  0x08
-#define PKTCTRL_PPADEN   0x04
-#define PKTCTRL_PCRCEN   0x02
-#define PKTCTRL_POVERRIDE 0x01
-
-/* ENC28J60 Transmit Status Vector */
-#define TSV_TXBYTECNT           0
-#define TSV_TXCOLLISIONCNT      16
-#define TSV_TXCRCERROR          20
-#define TSV_TXLENCHKERROR       21
-#define TSV_TXLENOUTOFRANGE     22
-#define TSV_TXDONE              23
-#define TSV_TXMULTICAST         24
-#define TSV_TXBROADCAST         25
-#define TSV_TXPACKETDEFER       26
-#define TSV_TXEXDEFER           27
-#define TSV_TXEXCOLLISION       28
-#define TSV_TXLATECOLLISION     29
-#define TSV_TXGIANT             30
-#define TSV_TXUNDERRUN          31
-#define TSV_TOTBYTETXONWIRE     32
-#define TSV_TXCONTROLFRAME      48
-#define TSV_TXPAUSEFRAME        49
-#define TSV_BACKPRESSUREAPP     50
-#define TSV_TXVLANTAGFRAME      51
-
-#define TSV_SIZE                7
-#define TSV_BYTEOF(x)           ((x) / 8)
-#define TSV_BITMASK(x)          (1 << ((x) % 8))
-#define TSV_GETBIT(x, y)        (((x)[TSV_BYTEOF(y)] & TSV_BITMASK(y)) ? 1 : 0)
-
-/* ENC28J60 Receive Status Vector */
-#define RSV_RXLONGEVDROPEV      16
-#define RSV_CARRIEREV           18
-#define RSV_CRCERROR            20
-#define RSV_LENCHECKERR         21
-#define RSV_LENOUTOFRANGE       22
-#define RSV_RXOK                23
-#define RSV_RXMULTICAST         24
-#define RSV_RXBROADCAST         25
-#define RSV_DRIBBLENIBBLE       26
-#define RSV_RXCONTROLFRAME      27
-#define RSV_RXPAUSEFRAME        28
-#define RSV_RXUNKNOWNOPCODE     29
-#define RSV_RXTYPEVLAN          30
-
-#define RSV_SIZE                6
-#define RSV_BITMASK(x)          (1 << ((x) - 16))
-#define RSV_GETBIT(x, y)        (((x) & RSV_BITMASK(y)) ? 1 : 0)
-
-// SPI operation codes
-#define ENC28J60_READ_CTRL_REG       0x00
-#define ENC28J60_READ_BUF_MEM        0x3A
-#define ENC28J60_WRITE_CTRL_REG      0x40
-#define ENC28J60_WRITE_BUF_MEM       0x7A
-#define ENC28J60_BIT_FIELD_SET       0x80
-#define ENC28J60_BIT_FIELD_CLR       0xA0
-#define ENC28J60_SOFT_RESET          0xFF
-
-// The RXSTART_INIT should be zero. See Rev. B4 Silicon Errata
-// buffer boundaries applied to internal 8K ram
-// the entire available packet buffer space is allocated
-//
-
-// start with recbuf at 0/
-#define RXSTART_INIT	0x0
-// receive buffer end
-#define RXSTOP_INIT		(0x1FFF-0x0600) - 1
-// start TX buffer at 0x1FFF-0x0600, pace for one full ethernet frame (~1500 bytes)
-
-#define TXSTART_INIT	(0x1FFF-0x0600)
-// stp TX buffer at end of mem
-#define TXSTOP_INIT		0x1FFF
-
-// max frame length which the conroller will accept:
-#define MAX_FRAMELEN	1518
-
-void rt_hw_enc28j60_init(void);
-
-#endif
@@ -1,173 +0,0 @@
-/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
-* File Name          : msd.h
-* Author             : MCD Application Team
-* Version            : V2.1
-* Date               : 05/30/2008
-* Description        : Header for msd.c file.
-********************************************************************************
-* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
-* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
-* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
-* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
-* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED 
-* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
-*******************************************************************************/
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __MSD_H
-#define __MSD_H
-
-/* Includes ------------------------------------------------------------------*/
-#include <stm32f10x.h>
-
-/* Private define ------------------------------------------------------------*/
-/* Block Size */
-#define BLOCK_SIZE    512
-
-/* Dummy byte */
-#define DUMMY   0xFF
-
-/* Start Data tokens  */
-/* Tokens (necessary because at nop/idle (and CS active) only 0xff is on the data/command line) */
-#define MSD_START_DATA_SINGLE_BLOCK_READ 0xFE  /* Data token start byte, Start Single Block Read */
-#define MSD_START_DATA_MULTIPLE_BLOCK_READ  0xFE  /* Data token start byte, Start Multiple Block Read */
-#define MSD_START_DATA_SINGLE_BLOCK_WRITE 0xFE  /* Data token start byte, Start Single Block Write */
-#define MSD_START_DATA_MULTIPLE_BLOCK_WRITE 0xFD  /* Data token start byte, Start Multiple Block Write */
-#define MSD_STOP_DATA_MULTIPLE_BLOCK_WRITE 0xFD  /* Data toke stop byte, Stop Multiple Block Write */
-
-/* MSD functions return */
-#define MSD_SUCCESS       0x00
-#define MSD_FAIL          0xFF
-
-/* MSD reponses and error flags */
-#define MSD_RESPONSE_NO_ERROR      0x00
-#define MSD_IN_IDLE_STATE          0x01
-#define MSD_ERASE_RESET            0x02
-#define MSD_ILLEGAL_COMMAND        0x04
-#define MSD_COM_CRC_ERROR          0x08
-#define MSD_ERASE_SEQUENCE_ERROR   0x10
-#define MSD_ADDRESS_ERROR          0x20
-#define MSD_PARAMETER_ERROR        0x40
-#define MSD_RESPONSE_FAILURE       0xFF
-
-/* Data response error */
-#define MSD_DATA_OK                0x05
-#define MSD_DATA_CRC_ERROR         0x0B
-#define MSD_DATA_WRITE_ERROR       0x0D
-#define MSD_DATA_OTHER_ERROR       0xFF
-
-/* Commands: CMDxx = CMD-number | 0x40 */
-#define MSD_GO_IDLE_STATE          0   /* CMD0=0x40 */
-#define MSD_SEND_OP_COND           1   /* CMD1=0x41 */
-#define MSD_SEND_CSD               9   /* CMD9=0x49 */
-#define MSD_SEND_CID               10  /* CMD10=0x4A */
-#define MSD_STOP_TRANSMISSION      12  /* CMD12=0x4C */
-#define MSD_SEND_STATUS            13  /* CMD13=0x4D */
-#define MSD_SET_BLOCKLEN           16  /* CMD16=0x50 */
-#define MSD_READ_SINGLE_BLOCK      17  /* CMD17=0x51 */
-#define MSD_READ_MULTIPLE_BLOCK    18  /* CMD18=0x52 */
-#define MSD_SET_BLOCK_COUNT        23  /* CMD23=0x57 */
-#define MSD_WRITE_BLOCK            24  /* CMD24=0x58 */
-#define MSD_WRITE_MULTIPLE_BLOCK   25  /* CMD25=0x59 */
-#define MSD_PROGRAM_CSD            27  /* CMD27=0x5B */
-#define MSD_SET_WRITE_PROT         28  /* CMD28=0x5C */
-#define MSD_CLR_WRITE_PROT         29  /* CMD29=0x5D */
-#define MSD_SEND_WRITE_PROT        30  /* CMD30=0x5E */
-#define MSD_TAG_SECTOR_START       32  /* CMD32=0x60 */
-#define MSD_TAG_SECTOR_END         33  /* CMD33=0x61 */
-#define MSD_UNTAG_SECTOR           34  /* CMD34=0x62 */
-#define MSD_TAG_ERASE_GROUP_START  35  /* CMD35=0x63 */
-#define MSD_TAG_ERASE_GROUP_END    36  /* CMD36=0x64 */
-#define MSD_UNTAG_ERASE_GROUP      37  /* CMD37=0x65 */
-#define MSD_ERASE                  38  /* CMD38=0x66 */
-#define MSD_READ_OCR               39  /* CMD39=0x67 */
-#define MSD_CRC_ON_OFF             40  /* CMD40=0x68 */
-
-/* Exported types ------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-typedef struct _MSD_CSD      /*Card Specific Data*/
-{
-  vu8  CSDStruct;            /* CSD structure */
-  vu8  SysSpecVersion;       /* System specification version */
-  vu8  Reserved1;            /* Reserved */
-  vu8  TAAC;                 /* Data read access-time 1 */
-  vu8  NSAC;                 /* Data read access-time 2 in CLK cycles */
-  vu8  MaxBusClkFrec;        /* Max. bus clock frequency */
-  vu16 CardComdClasses;      /* Card command classes */
-  vu8  RdBlockLen;           /* Max. read data block length */
-  vu8  PartBlockRead;        /* Partial blocks for read allowed */
-  vu8  WrBlockMisalign;      /* Write block misalignment */
-  vu8  RdBlockMisalign;      /* Read block misalignment */
-  vu8  DSRImpl;              /* DSR implemented */
-  vu8  Reserved2;            /* Reserved */
-  vu16 DeviceSize;           /* Device Size */
-  vu8  MaxRdCurrentVDDMin;   /* Max. read current @ VDD min */
-  vu8  MaxRdCurrentVDDMax;   /* Max. read current @ VDD max */
-  vu8  MaxWrCurrentVDDMin;   /* Max. write current @ VDD min */
-  vu8  MaxWrCurrentVDDMax;   /* Max. write current @ VDD max */
-  vu8  DeviceSizeMul;        /* Device size multiplier */
-  vu8  EraseGrSize;          /* Erase group size */
-  vu8  EraseGrMul;           /* Erase group size multiplier */
-  vu8  WrProtectGrSize;      /* Write protect group size */
-  vu8  WrProtectGrEnable;    /* Write protect group enable */
-  vu8  ManDeflECC;           /* Manufacturer default ECC */
-  vu8  WrSpeedFact;          /* Write speed factor */
-  vu8  MaxWrBlockLen;        /* Max. write data block length */
-  vu8  WriteBlockPaPartial;  /* Partial blocks for write allowed */
-  vu8  Reserved3;            /* Reserded */
-  vu8  ContentProtectAppli;  /* Content protection application */
-  vu8  FileFormatGrouop;     /* File format group */
-  vu8  CopyFlag;             /* Copy flag (OTP) */
-  vu8  PermWrProtect;        /* Permanent write protection */
-  vu8  TempWrProtect;        /* Temporary write protection */
-  vu8  FileFormat;           /* File Format */
-  vu8  ECC;                  /* ECC code */
-  vu8  msd_CRC;                  /* CRC */
-  vu8  Reserved4;            /* always 1*/
-}
-sMSD_CSD;
-
-typedef struct _MSD_CID      /*Card Identification Data*/
-{
-  vu8  ManufacturerID;       /* ManufacturerID */
-  vu16 OEM_AppliID;          /* OEM/Application ID */
-  vu32 ProdName1;            /* Product Name part1 */
-  vu8  ProdName2;            /* Product Name part2*/
-  vu8  ProdRev;              /* Product Revision */
-  vu32 ProdSN;               /* Product Serial Number */
-  vu8  Reserved1;            /* Reserved1 */
-  vu16 ManufactDate;         /* Manufacturing Date */
-  vu8  msd_CRC;                  /* CRC */
-  vu8  Reserved2;            /* always 1*/
-}
-sMSD_CID;
-
-/* Exported constants --------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-
-/*----- High layer function -----*/
-u8 MSD_Init(void);
-u8 MSD_WriteBlock(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite);
-u8 MSD_ReadBlock(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead);
-u8 MSD_WriteBuffer(u8* pBuffer, u32 WriteAddr, u32 NumByteToWrite);
-u8 MSD_ReadBuffer(u8* pBuffer, u32 ReadAddr, u32 NumByteToRead);
-u8 MSD_GetCSDRegister(sMSD_CSD* MSD_csd);
-u8 MSD_GetCIDRegister(sMSD_CID* MSD_cid);
-
-/*----- Medium layer function -----*/
-void MSD_SendCmd(u8 Cmd, u32 Arg, u8 Crc);
-u8 MSD_GetResponse(u8 Response);
-u8 MSD_GetDataResponse(void);
-u8 MSD_GoIdleState(void);
-u16 MSD_GetStatus(void);
-
-/*----- Low layer function -----*/
-void MSD_WriteByte(u8 byte);
-u8 MSD_ReadByte(void);
-
-#endif /* __MSD_H */
-
-/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
@@ -3,75 +3,86 @@

 Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'

-Group (Startup)
+Group (Applications)
+Group (Drivers)
+Group (STM32_StdPeriph)
 Group (Kernel)
 Group (CORTEX-M3)
+Group (DeviceDrivers)
 Group (finsh)
-Group (STM32_StdPeriph)
+Group (Components)
+
+File 1,1,<applications\application.c><application.c>
+File 1,1,<applications\startup.c><startup.c>
+File 2,1,<drivers\board.c><board.c>
+File 2,1,<drivers\stm32f10x_it.c><stm32f10x_it.c>
+File 2,1,<drivers\led.c><led.c>
+File 2,1,<drivers\usart.c><usart.c>
+File 3,1,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c><system_stm32f10x.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c><stm32f10x_cec.c>
+File 3,1,<Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
+File 3,2,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_hd.s><startup_stm32f10x_hd.s>
+File 4,1,<..\..\src\clock.c><clock.c>
+File 4,1,<..\..\src\device.c><device.c>
+File 4,1,<..\..\src\idle.c><idle.c>
+File 4,1,<..\..\src\ipc.c><ipc.c>
+File 4,1,<..\..\src\irq.c><irq.c>
+File 4,1,<..\..\src\kservice.c><kservice.c>
+File 4,1,<..\..\src\mem.c><mem.c>
+File 4,1,<..\..\src\mempool.c><mempool.c>
+File 4,1,<..\..\src\object.c><object.c>
+File 4,1,<..\..\src\scheduler.c><scheduler.c>
+File 4,1,<..\..\src\thread.c><thread.c>
+File 4,1,<..\..\src\timer.c><timer.c>
+File 5,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
+File 5,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
+File 5,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
+File 5,1,<..\..\libcpu\arm\common\div0.c><div0.c>
+File 5,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
+File 6,1,<..\..\components\drivers\serial\serial.c><serial.c>
+File 6,1,<..\..\components\drivers\src\completion.c><completion.c>
+File 6,1,<..\..\components\drivers\src\dataqueue.c><dataqueue.c>
+File 6,1,<..\..\components\drivers\src\pipe.c><pipe.c>
+File 6,1,<..\..\components\drivers\src\ringbuffer.c><ringbuffer.c>
+File 7,1,<..\..\components\finsh\cmd.c><cmd.c>
+File 7,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
+File 7,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
+File 7,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
+File 7,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
+File 7,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
+File 7,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
+File 7,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
+File 7,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
+File 7,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
+File 7,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
+File 7,1,<..\..\components\finsh\msh.c><msh.c>
+File 7,1,<..\..\components\finsh\msh_cmd.c><msh_cmd.c>
+File 7,1,<..\..\components\finsh\shell.c><shell.c>
+File 7,1,<..\..\components\finsh\symbol.c><symbol.c>
+File 8,1,<..\..\components\init\components.c><components.c>
+

-File 1,1,<.\application.c><application.c>
-File 1,1,<.\startup.c><startup.c>
-File 1,1,<.\board.c><board.c>
-File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
-File 1,1,<.\rtc.c><rtc.c>
-File 1,1,<.\usart.c><usart.c>
-File 1,1,<.\serial.c><serial.c>
-File 1,1,<.\led.c><led.c>
-File 2,1,<..\..\src\clock.c><clock.c>
-File 2,1,<..\..\src\device.c><device.c>
-File 2,1,<..\..\src\idle.c><idle.c>
-File 2,1,<..\..\src\ipc.c><ipc.c>
-File 2,1,<..\..\src\irq.c><irq.c>
-File 2,1,<..\..\src\kservice.c><kservice.c>
-File 2,1,<..\..\src\mem.c><mem.c>
-File 2,1,<..\..\src\mempool.c><mempool.c>
-File 2,1,<..\..\src\object.c><object.c>
-File 2,1,<..\..\src\scheduler.c><scheduler.c>
-File 2,1,<..\..\src\thread.c><thread.c>
-File 2,1,<..\..\src\timer.c><timer.c>
-File 3,1,<..\..\libcpu\arm\cortex-m3\cpuport.c><cpuport.c>
-File 3,2,<..\..\libcpu\arm\cortex-m3\context_rvds.S><context_rvds.S>
-File 3,1,<..\..\libcpu\arm\common\backtrace.c><backtrace.c>
-File 3,1,<..\..\libcpu\arm\common\div0.c><div0.c>
-File 3,1,<..\..\libcpu\arm\common\showmem.c><showmem.c>
-File 4,1,<..\..\components\finsh\cmd.c><cmd.c>
-File 4,1,<..\..\components\finsh\finsh_compiler.c><finsh_compiler.c>
-File 4,1,<..\..\components\finsh\finsh_error.c><finsh_error.c>
-File 4,1,<..\..\components\finsh\finsh_heap.c><finsh_heap.c>
-File 4,1,<..\..\components\finsh\finsh_init.c><finsh_init.c>
-File 4,1,<..\..\components\finsh\finsh_node.c><finsh_node.c>
-File 4,1,<..\..\components\finsh\finsh_ops.c><finsh_ops.c>
-File 4,1,<..\..\components\finsh\finsh_parser.c><finsh_parser.c>
-File 4,1,<..\..\components\finsh\finsh_token.c><finsh_token.c>
-File 4,1,<..\..\components\finsh\finsh_var.c><finsh_var.c>
-File 4,1,<..\..\components\finsh\finsh_vm.c><finsh_vm.c>
-File 4,1,<..\..\components\finsh\shell.c><shell.c>
-File 4,1,<..\..\components\finsh\symbol.c><symbol.c>
-File 5,1,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c><system_stm32f10x.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_cec.c><stm32f10x_cec.c>
-File 5,1,<Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
-File 5,2,<Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x\startup\arm\startup_stm32f10x_hd.s><startup_stm32f10x_hd.s>


 Options 1,0,0  // Target 'RT-Thread STM32'
@@ -132,7 +143,7 @@ Options 1,0,0  // Target 'RT-Thread STM32'
 ADSCMISC ()
 ADSCDEFN (STM32F10X_HD, USE_STDPERIPH_DRIVER)
 ADSCUDEF ()
- ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\components\CMSIS\Include;.;..\..\include;..\..\libcpu\arm\cortex-m3;..\..\libcpu\arm\common;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x)
+ ADSCINCD (Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\include;drivers;..\..\components\CMSIS\Include;.;applications;..\..\libcpu\arm\cortex-m3;..\..\components\drivers\include;..\..\libcpu\arm\common;..\..\components\init;..\..\components\finsh;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x)
 ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
 ADSAMISC ()
 ADSADEFN ()
@@ -153,7 +164,7 @@ Options 1,0,0  // Target 'RT-Thread STM32'
 ADSLDSC ()
 ADSLDIB ()
 ADSLDIC ()
- ADSLDMC ( --keep __fsym_* --keep __vsym_* )
+ ADSLDMC ( --keep __fsym_* --keep __vsym_*   --keep __rt_init* )
 ADSLDIF ()
 ADSLDDW ()
  OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
@@ -1,10 +1,10 @@
-<?xml version="1.0" encoding="iso-8859-1"?>
-
-<workspace>
-  <project>
-    <path>$WS_DIR$\project.ewp</path>
-  </project>
-  <batchBuild/>
-</workspace>
-
-
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\project.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+
@@ -56,15 +56,23 @@
 /* Using Small MM */
 #define RT_USING_SMALL_MEM

+// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
+#define RT_USING_COMPONENTS_INIT
+
 /* SECTION: Device System */
 /* Using Device System */
 #define RT_USING_DEVICE
-#define RT_USING_UART1
+// <bool name="RT_USING_DEVICE_IPC" description="Using device communication" default="true" />
+#define RT_USING_DEVICE_IPC
+// <bool name="RT_USING_SERIAL" description="Using Serial" default="true" />
+#define RT_USING_SERIAL

 /* SECTION: Console options */
 #define RT_USING_CONSOLE
 /* the buffer size of console*/
-#define RT_CONSOLEBUF_SIZE	128
+#define RT_CONSOLEBUF_SIZE	        128
+// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart1" />
+#define RT_CONSOLE_DEVICE_NAME	    "uart1"

 /* SECTION: finsh, a C-Express shell */
 #define RT_USING_FINSH
@@ -76,12 +84,12 @@
 /* #define RT_USING_DFS */

 #define RT_USING_DFS_ELMFAT
-#define RT_DFS_ELM_WORD_ACCESS
 /* Reentrancy (thread safe) of the FatFs module.  */
 #define RT_DFS_ELM_REENTRANT
 /* Number of volumes (logical drives) to be used. */
 #define RT_DFS_ELM_DRIVES			2
 /* #define RT_DFS_ELM_USE_LFN			1 */
+/* #define RT_DFS_ELM_CODE_PAGE			936 */
 #define RT_DFS_ELM_MAX_LFN			255
 /* Maximum sector size to be handled. */
 #define RT_DFS_ELM_MAX_SECTOR_SIZE  512
@@ -1,418 +0,0 @@
-/*
- * File      : serial.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-02-05     Bernard      first version
- * 2009-10-25     Bernard      fix rt_serial_read bug when there is no data
- *                             in the buffer.
- * 2010-03-29     Bernard      cleanup code.
- */
-
-#include "serial.h"
-#include <stm32f10x_dma.h>
-#include <stm32f10x_usart.h>
-
-static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
-	rt_uint32_t address, rt_uint32_t size);
-
-/**
- * @addtogroup STM32
- */
-/*@{*/
-
-/* RT-Thread Device Interface */
-static rt_err_t rt_serial_init (rt_device_t dev)
-{
-	struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data;
-
-	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
-	{
-		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-		{
-			rt_memset(uart->int_rx->rx_buffer, 0,
-				sizeof(uart->int_rx->rx_buffer));
-			uart->int_rx->read_index = 0;
-			uart->int_rx->save_index = 0;
-		}
-
-		if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
-		{
-			RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL);
-			uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
-
-			/* init data node memory pool */
-			rt_mp_init(&(uart->dma_tx->data_node_mp), "dn",
-				uart->dma_tx->data_node_mem_pool,
-				sizeof(uart->dma_tx->data_node_mem_pool),
-				sizeof(struct stm32_serial_data_node));
-		}
-
-		/* Enable USART */
-		USART_Cmd(uart->uart_device, ENABLE);
-
-		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
-	}
-
-	return RT_EOK;
-}
-
-static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
-{
-	return RT_EOK;
-}
-
-static rt_err_t rt_serial_close(rt_device_t dev)
-{
-	return RT_EOK;
-}
-
-static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
-{
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct stm32_serial_device* uart;
-
-	ptr = buffer;
-	err_code = RT_EOK;
-	uart = (struct stm32_serial_device*)dev->user_data;
-
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* interrupt mode Rx */
-		while (size)
-		{
-			rt_base_t level;
-
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
-
-			if (uart->int_rx->read_index != uart->int_rx->save_index)
-			{
-				/* read a character */
-				*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
-				size--;
-
-				/* move to next position */
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
-			}
-			else
-			{
-				/* set error code */
-				err_code = -RT_EEMPTY;
-
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
-
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
-	}
-	else
-	{
-		/* polling mode */
-		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
-		{
-			while (uart->uart_device->SR & USART_FLAG_RXNE)
-			{
-				*ptr = uart->uart_device->DR & 0xff;
-				ptr ++;
-			}
-		}
-	}
-
-	/* set error code */
-	rt_set_errno(err_code);
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-}
-
-static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
-	rt_uint32_t address, rt_uint32_t size)
-{
-	RT_ASSERT(dma_channel != RT_NULL);
-
-	/* disable DMA */
-	DMA_Cmd(dma_channel, DISABLE);
-
-	/* set buffer address */
-	dma_channel->CMAR = address;
-	/* set size */
-	dma_channel->CNDTR = size;
-
-	/* enable DMA */
-	DMA_Cmd(dma_channel, ENABLE);
-}
-
-static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
-{
-	rt_uint8_t* ptr;
-	rt_err_t err_code;
-	struct stm32_serial_device* uart;
-
-	err_code = RT_EOK;
-	ptr = (rt_uint8_t*)buffer;
-	uart = (struct stm32_serial_device*)dev->user_data;
-
-	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
-	{
-		/* interrupt mode Tx, does not support */
-		RT_ASSERT(0);
-	}
-	else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
-	{
-		/* DMA mode Tx */
-
-		/* allocate a data node */
-		struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*)
-			rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER);
-		if (data_node == RT_NULL)
-		{
-			/* set error code */
-			err_code = -RT_ENOMEM;
-		}
-		else
-		{
-			rt_uint32_t level;
-
-			/* fill data node */
-			data_node->data_ptr 	= ptr;
-			data_node->data_size 	= size;
-
-			/* insert to data link */
-			data_node->next = RT_NULL;
-
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
-
-			data_node->prev = uart->dma_tx->list_tail;
-			if (uart->dma_tx->list_tail != RT_NULL)
-				uart->dma_tx->list_tail->next = data_node;
-			uart->dma_tx->list_tail = data_node;
-
-			if (uart->dma_tx->list_head == RT_NULL)
-			{
-				/* start DMA to transmit data */
-				uart->dma_tx->list_head = data_node;
-
-				/* Enable DMA Channel */
-				rt_serial_enable_dma(uart->dma_tx->dma_channel,
-					(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
-					uart->dma_tx->list_head->data_size);
-			}
-
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
-	}
-	else
-	{
-		/* polling mode */
-		if (dev->flag & RT_DEVICE_FLAG_STREAM)
-		{
-			/* stream mode */
-			while (size)
-			{
-				if (*ptr == '\n')
-				{
-					while (!(uart->uart_device->SR & USART_FLAG_TXE));
-					uart->uart_device->DR = '\r';
-				}
-
-				while (!(uart->uart_device->SR & USART_FLAG_TXE));
-				uart->uart_device->DR = (*ptr & 0x1FF);
-
-				++ptr; --size;
-			}
-		}
-		else
-		{
-			/* write data directly */
-			while (size)
-			{
-				while (!(uart->uart_device->SR & USART_FLAG_TXE));
-				uart->uart_device->DR = (*ptr & 0x1FF);
-
-				++ptr; --size;
-			}
-		}
-	}
-
-	/* set error code */
-	rt_set_errno(err_code);
-
-	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-}
-
-static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
-{
-	struct stm32_serial_device* uart;
-
-	RT_ASSERT(dev != RT_NULL);
-
-	uart = (struct stm32_serial_device*)dev->user_data;
-	switch (cmd)
-	{
-	case RT_DEVICE_CTRL_SUSPEND:
-		/* suspend device */
-		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
-		USART_Cmd(uart->uart_device, DISABLE);
-		break;
-
-	case RT_DEVICE_CTRL_RESUME:
-		/* resume device */
-		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
-		USART_Cmd(uart->uart_device, ENABLE);
-		break;
-	}
-
-	return RT_EOK;
-}
-
-/*
- * serial register for STM32
- * support STM32F103VB and STM32F103ZE
- */
-rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
-{
-	RT_ASSERT(device != RT_NULL);
-
-	if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
-		(flag & RT_DEVICE_FLAG_INT_TX))
-	{
-		RT_ASSERT(0);
-	}
-
-	device->type 		= RT_Device_Class_Char;
-	device->rx_indicate = RT_NULL;
-	device->tx_complete = RT_NULL;
-	device->init 		= rt_serial_init;
-	device->open		= rt_serial_open;
-	device->close		= rt_serial_close;
-	device->read 		= rt_serial_read;
-	device->write 		= rt_serial_write;
-	device->control 	= rt_serial_control;
-	device->user_data	= serial;
-
-	/* register a character device */
-	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
-}
-
-/* ISR for serial interrupt */
-void rt_hw_serial_isr(rt_device_t device)
-{
-	struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
-
-	if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
-	{
-		/* interrupt mode receive */
-		RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
-
-		/* save on rx buffer */
-		while (uart->uart_device->SR & USART_FLAG_RXNE)
-		{
-			rt_base_t level;
-
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
-
-			/* save character */
-			uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff;
-			uart->int_rx->save_index ++;
-			if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
-				uart->int_rx->save_index = 0;
-
-			/* if the next position is read index, discard this 'read char' */
-			if (uart->int_rx->save_index == uart->int_rx->read_index)
-			{
-				uart->int_rx->read_index ++;
-				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
-					uart->int_rx->read_index = 0;
-			}
-
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-		}
-
-		/* clear interrupt */
-		USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
-
-		/* invoke callback */
-		if (device->rx_indicate != RT_NULL)
-		{
-			rt_size_t rx_length;
-
-			/* get rx length */
-			rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
-				UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
-				uart->int_rx->save_index - uart->int_rx->read_index;
-
-			device->rx_indicate(device, rx_length);
-		}
-	}
-
-	if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
-	{
-		/* clear interrupt */
-		USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
-	}
-}
-
-/*
- * ISR for DMA mode Tx
- */
-void rt_hw_serial_dma_tx_isr(rt_device_t device)
-{
-	rt_uint32_t level;
-	struct stm32_serial_data_node* data_node;
-	struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
-
-	/* DMA mode receive */
-	RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
-
-	/* get the first data node */
-	data_node = uart->dma_tx->list_head;
-	RT_ASSERT(data_node != RT_NULL);
-
-	/* invoke call to notify tx complete */
-	if (device->tx_complete != RT_NULL)
-		device->tx_complete(device, data_node->data_ptr);
-
-	/* disable interrupt */
-	level = rt_hw_interrupt_disable();
-
-	/* remove list head */
-	uart->dma_tx->list_head = data_node->next;
-	if (uart->dma_tx->list_head == RT_NULL) /* data link empty */
-		uart->dma_tx->list_tail = RT_NULL;
-
-	/* enable interrupt */
-	rt_hw_interrupt_enable(level);
-
-	/* release data node memory */
-	rt_mp_free(data_node);
-
-	if (uart->dma_tx->list_head != RT_NULL)
-	{
-		/* transmit next data node */
-		rt_serial_enable_dma(uart->dma_tx->dma_channel,
-			(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
-			uart->dma_tx->list_head->data_size);
-	}
-	else
-	{
-		/* no data to be transmitted, disable DMA */
-		DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
-	}
-}
-
-/*@}*/
@@ -1,70 +0,0 @@
-/*
- * File      : serial.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-01-05     Bernard      first version
- * 2010-03-29     Bernard      remove interrupt tx and DMA rx mode.
- */
-#ifndef __RT_HW_SERIAL_H__
-#define __RT_HW_SERIAL_H__
-
-#include <rthw.h>
-#include <rtthread.h>
-
-/* STM32F10x library definitions */
-#include <stm32f10x.h>
-
-#define UART_RX_BUFFER_SIZE		64
-#define UART_TX_DMA_NODE_SIZE	4
-
-/* data node for Tx Mode */
-struct stm32_serial_data_node
-{
-	rt_uint8_t *data_ptr;
-	rt_size_t  data_size;
-	struct stm32_serial_data_node *next, *prev;
-};
-struct stm32_serial_dma_tx
-{
-	/* DMA Channel */
-	DMA_Channel_TypeDef* dma_channel;
-
-	/* data list head and tail */
-	struct stm32_serial_data_node *list_head, *list_tail;
-
-	/* data node memory pool */
-	struct rt_mempool data_node_mp;
-	rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE *
-		(sizeof(struct stm32_serial_data_node) + sizeof(void*))];
-};
-
-struct stm32_serial_int_rx
-{
-	rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
-	rt_uint32_t read_index, save_index;
-};
-
-struct stm32_serial_device
-{
-	USART_TypeDef* uart_device;
-
-	/* rx structure */
-	struct stm32_serial_int_rx* int_rx;
-
-	/* tx structure */
-	struct stm32_serial_dma_tx* dma_tx;
-};
-
-rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial);
-
-void rt_hw_serial_isr(rt_device_t device);
-void rt_hw_serial_dma_tx_isr(rt_device_t device);
-
-#endif
@@ -1,145 +0,0 @@
-/*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://openlab.rt-thread.com/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2006-08-31     Bernard      first implementation
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include "stm32f10x.h"
-#include "board.h"
-#include "rtc.h"
-
-/**
- * @addtogroup STM32
- */
-
-/*@{*/
-
-extern int  rt_application_init(void);
-#ifdef RT_USING_FINSH
-extern void finsh_system_init(void);
-extern void finsh_set_device(const char* device);
-#endif
-
-#ifdef __CC_ARM
-extern int Image$$RW_IRAM1$$ZI$$Limit;
-#elif __ICCARM__
-#pragma section="HEAP"
-#else
-extern int __bss_end;
-#endif
-
-/*******************************************************************************
-* Function Name  : assert_failed
-* Description    : Reports the name of the source file and the source line number
-*                  where the assert error has occurred.
-* Input          : - file: pointer to the source file name
-*                  - line: assert error line source number
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void assert_failed(u8* file, u32 line)
-{
-	rt_kprintf("\n\r Wrong parameter value detected on\r\n");
-	rt_kprintf("       file  %s\r\n", file);
-	rt_kprintf("       line  %d\r\n", line);
-
-	while (1) ;
-}
-
-/**
- * This function will startup RT-Thread RTOS.
- */
-void rtthread_startup(void)
-{
-	/* init board */
-	rt_hw_board_init();
-
-	/* show version */
-	rt_show_version();
-
-	/* init tick */
-	rt_system_tick_init();
-
-	/* init kernel object */
-	rt_system_object_init();
-
-	/* init timer system */
-	rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-#if STM32_EXT_SRAM
-	rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
-#else
-	#ifdef __CC_ARM
-		rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
-	#elif __ICCARM__
-	    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
-	#else
-		/* init memory system */
-		rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
-	#endif
-#endif
-#endif
-
-	/* init scheduler system */
-	rt_system_scheduler_init();
-
-#ifdef RT_USING_DFS
-	/* init sdcard driver */
-#if STM32_USE_SDIO
-	rt_hw_sdcard_init();
-#else
-	rt_hw_msd_init();
-#endif
-#endif
-
-    rt_hw_rtc_init();
-
-	/* init all device */
-	rt_device_init_all();
-
-	/* init application */
-	rt_application_init();
-
-#ifdef RT_USING_FINSH
-	/* init finsh */
-	finsh_system_init();
-	finsh_set_device("uart1");
-#endif
-
-    /* init timer thread */
-    rt_system_timer_thread_init();
-
-	/* init idle thread */
-	rt_thread_idle_init();
-
-	/* start scheduler */
-	rt_system_scheduler_start();
-
-	/* never reach here */
-	return ;
-}
-
-int main(void)
-{
-	/* disable interrupt first */
-	rt_hw_interrupt_disable();
-
-	/* startup RT-Thread RTOS */
-	rtthread_startup();
-
-	return 0;
-}
-
-/*@}*/
@@ -1,149 +0,0 @@
-/*
- * File      : stm3210c_eval_lcd.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-11-01     Bernard      the first version
- */
-
-#ifndef __STM3210C_EVAL_LCD_H__
-#define __STM3210C_EVAL_LCD_H__
-
-
-/**
-  * @brief  LCD Control pins
-  */
-#define LCD_NCS_PIN             GPIO_Pin_2
-#define LCD_NCS_GPIO_PORT       GPIOB
-#define LCD_NCS_GPIO_CLK        RCC_APB2Periph_GPIOB
-
-/**
-  * @brief  LCD SPI Interface pins
-  */
-#define LCD_SPI_SCK_PIN         GPIO_Pin_10
-#define LCD_SPI_MISO_PIN        GPIO_Pin_11
-#define LCD_SPI_MOSI_PIN        GPIO_Pin_12
-#define LCD_SPI_GPIO_PORT       GPIOC
-#define LCD_SPI_GPIO_CLK        RCC_APB2Periph_GPIOC
-#define LCD_SPI                 SPI3
-#define LCD_SPI_CLK             RCC_APB1Periph_SPI3
-
-/**
-  * @brief  LCD Registers
-  */
-#define R0             0x00
-#define R1             0x01
-#define R2             0x02
-#define R3             0x03
-#define R4             0x04
-#define R5             0x05
-#define R6             0x06
-#define R7             0x07
-#define R8             0x08
-#define R9             0x09
-#define R10            0x0A
-#define R12            0x0C
-#define R13            0x0D
-#define R14            0x0E
-#define R15            0x0F
-#define R16            0x10
-#define R17            0x11
-#define R18            0x12
-#define R19            0x13
-#define R20            0x14
-#define R21            0x15
-#define R22            0x16
-#define R23            0x17
-#define R24            0x18
-#define R25            0x19
-#define R26            0x1A
-#define R27            0x1B
-#define R28            0x1C
-#define R29            0x1D
-#define R30            0x1E
-#define R31            0x1F
-#define R32            0x20
-#define R33            0x21
-#define R34            0x22
-#define R36            0x24
-#define R37            0x25
-#define R40            0x28
-#define R41            0x29
-#define R43            0x2B
-#define R45            0x2D
-#define R48            0x30
-#define R49            0x31
-#define R50            0x32
-#define R51            0x33
-#define R52            0x34
-#define R53            0x35
-#define R54            0x36
-#define R55            0x37
-#define R56            0x38
-#define R57            0x39
-#define R59            0x3B
-#define R60            0x3C
-#define R61            0x3D
-#define R62            0x3E
-#define R63            0x3F
-#define R64            0x40
-#define R65            0x41
-#define R66            0x42
-#define R67            0x43
-#define R68            0x44
-#define R69            0x45
-#define R70            0x46
-#define R71            0x47
-#define R72            0x48
-#define R73            0x49
-#define R74            0x4A
-#define R75            0x4B
-#define R76            0x4C
-#define R77            0x4D
-#define R78            0x4E
-#define R79            0x4F
-#define R80            0x50
-#define R81            0x51
-#define R82            0x52
-#define R83            0x53
-#define R96            0x60
-#define R97            0x61
-#define R106           0x6A
-#define R118           0x76
-#define R128           0x80
-#define R129           0x81
-#define R130           0x82
-#define R131           0x83
-#define R132           0x84
-#define R133           0x85
-#define R134           0x86
-#define R135           0x87
-#define R136           0x88
-#define R137           0x89
-#define R139           0x8B
-#define R140           0x8C
-#define R141           0x8D
-#define R143           0x8F
-#define R144           0x90
-#define R145           0x91
-#define R146           0x92
-#define R147           0x93
-#define R148           0x94
-#define R149           0x95
-#define R150           0x96
-#define R151           0x97
-#define R152           0x98
-#define R153           0x99
-#define R154           0x9A
-#define R157           0x9D
-#define R192           0xC0
-#define R193           0xC1
-#define R229           0xE5
-
-#endif
@@ -1,162 +0,0 @@
-/*
- * File      : stm3210e_eval_lcd.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-11-01     Bernard      the first version
- */
-
-#ifndef __LCD_H__
-#define __LCD_H__
-
-#include <rthw.h>
-#include <rtthread.h>
-
-/* LCD Registers */
-#define R0             0x00
-#define R1             0x01
-#define R2             0x02
-#define R3             0x03
-#define R4             0x04
-#define R5             0x05
-#define R6             0x06
-#define R7             0x07
-#define R8             0x08
-#define R9             0x09
-#define R10            0x0A
-#define R12            0x0C
-#define R13            0x0D
-#define R14            0x0E
-#define R15            0x0F
-#define R16            0x10
-#define R17            0x11
-#define R18            0x12
-#define R19            0x13
-#define R20            0x14
-#define R21            0x15
-#define R22            0x16
-#define R23            0x17
-#define R24            0x18
-#define R25            0x19
-#define R26            0x1A
-#define R27            0x1B
-#define R28            0x1C
-#define R29            0x1D
-#define R30            0x1E
-#define R31            0x1F
-#define R32            0x20
-#define R33            0x21
-#define R34            0x22
-#define R36            0x24
-#define R37            0x25
-#define R40            0x28
-#define R41            0x29
-#define R43            0x2B
-#define R45            0x2D
-#define R48            0x30
-#define R49            0x31
-#define R50            0x32
-#define R51            0x33
-#define R52            0x34
-#define R53            0x35
-#define R54            0x36
-#define R55            0x37
-#define R56            0x38
-#define R57            0x39
-#define R59            0x3B
-#define R60            0x3C
-#define R61            0x3D
-#define R62            0x3E
-#define R63            0x3F
-#define R64            0x40
-#define R65            0x41
-#define R66            0x42
-#define R67            0x43
-#define R68            0x44
-#define R69            0x45
-#define R70            0x46
-#define R71            0x47
-#define R72            0x48
-#define R73            0x49
-#define R74            0x4A
-#define R75            0x4B
-#define R76            0x4C
-#define R77            0x4D
-#define R78            0x4E
-#define R79            0x4F
-#define R80            0x50
-#define R81            0x51
-#define R82            0x52
-#define R83            0x53
-#define R96            0x60
-#define R97            0x61
-#define R106           0x6A
-#define R118           0x76
-#define R128           0x80
-#define R129           0x81
-#define R130           0x82
-#define R131           0x83
-#define R132           0x84
-#define R133           0x85
-#define R134           0x86
-#define R135           0x87
-#define R136           0x88
-#define R137           0x89
-#define R139           0x8B
-#define R140           0x8C
-#define R141           0x8D
-#define R143           0x8F
-#define R144           0x90
-#define R145           0x91
-#define R146           0x92
-#define R147           0x93
-#define R148           0x94
-#define R149           0x95
-#define R150           0x96
-#define R151           0x97
-#define R152           0x98
-#define R153           0x99
-#define R154           0x9A
-#define R157           0x9D
-#define R192           0xC0
-#define R193           0xC1
-#define R229           0xE5
-
-/* LCD Control pins */
-#define CtrlPin_NCS    GPIO_Pin_2   /* PB.02 */
-#define CtrlPin_RS     GPIO_Pin_7   /* PD.07 */
-#define CtrlPin_NWR    GPIO_Pin_15  /* PD.15 */
-
-/* LCD color */
-#define White          0xFFFF
-#define Black          0x0000
-#define Grey           0xF7DE
-#define Blue           0x001F
-#define Blue2          0x051F
-#define Red            0xF800
-#define Magenta        0xF81F
-#define Green          0x07E0
-#define Cyan           0x7FFF
-#define Yellow         0xFFE0
-
-#define Line0          0
-#define Line1          24
-#define Line2          48
-#define Line3          72
-#define Line4          96
-#define Line5          120
-#define Line6          144
-#define Line7          168
-#define Line8          192
-#define Line9          216
-
-#define Horizontal     0x00
-#define Vertical       0x01
-
-#endif
@@ -26,6 +26,7 @@ do not initialize  { section .noinit };

 keep { section FSymTab };
 keep { section VSymTab };
+keep { section .rti_fn* };
 place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

 place in ROM_region   { readonly };
@@ -1,324 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Main Interrupt Service Routines.
-  *          This file provides template for all exceptions handler and
-  *          peripherals interrupt service routine.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x_it.h"
-#include <board.h>
-#include <rtthread.h>
-
-/** @addtogroup Template_Project
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/******************************************************************************/
-/*            Cortex-M3 Processor Exceptions Handlers                         */
-/******************************************************************************/
-
-/**
-  * @brief   This function handles NMI exception.
-  * @param  None
-  * @retval None
-  */
-void NMI_Handler(void)
-{
-}
-
-/**
-  * @brief  This function handles Memory Manage exception.
-  * @param  None
-  * @retval None
-  */
-void MemManage_Handler(void)
-{
-  /* Go to infinite loop when Memory Manage exception occurs */
-  while (1)
-  {
-  }
-}
-
-/**
-  * @brief  This function handles Bus Fault exception.
-  * @param  None
-  * @retval None
-  */
-void BusFault_Handler(void)
-{
-  /* Go to infinite loop when Bus Fault exception occurs */
-  while (1)
-  {
-  }
-}
-
-/**
-  * @brief  This function handles Usage Fault exception.
-  * @param  None
-  * @retval None
-  */
-void UsageFault_Handler(void)
-{
-  /* Go to infinite loop when Usage Fault exception occurs */
-  while (1)
-  {
-  }
-}
-
-/**
-  * @brief  This function handles SVCall exception.
-  * @param  None
-  * @retval None
-  */
-void SVC_Handler(void)
-{
-}
-
-/**
-  * @brief  This function handles Debug Monitor exception.
-  * @param  None
-  * @retval None
-  */
-void DebugMon_Handler(void)
-{
-}
-
-void SysTick_Handler(void)
-{
-    extern void rt_hw_timer_handler(void);
-    rt_hw_timer_handler();
-}
-
-/******************************************************************************/
-/*                 STM32F10x Peripherals Interrupt Handlers                   */
-/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
-/*  available peripheral interrupt handler's name please refer to the startup */
-/*  file (startup_stm32f10x_xx.s).                                            */
-/******************************************************************************/
-
-/*******************************************************************************
-* Function Name  : DMA1_Channel2_IRQHandler
-* Description    : This function handles DMA1 Channel 2 interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void DMA1_Channel2_IRQHandler(void)
-{
-#ifdef RT_USING_UART3
-    extern struct rt_device uart3_device;
-	extern void rt_hw_serial_dma_tx_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    if (DMA_GetITStatus(DMA1_IT_TC2))
-    {
-        /* transmission complete, invoke serial dma tx isr */
-        rt_hw_serial_dma_tx_isr(&uart3_device);
-    }
-
-    /* clear DMA flag */
-    DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-/*******************************************************************************
-* Function Name  : USART1_IRQHandler
-* Description    : This function handles USART1 global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void USART1_IRQHandler(void)
-{
-#ifdef RT_USING_UART1
-    extern struct rt_device uart1_device;
-	extern void rt_hw_serial_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_hw_serial_isr(&uart1_device);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-/*******************************************************************************
-* Function Name  : USART2_IRQHandler
-* Description    : This function handles USART2 global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void USART2_IRQHandler(void)
-{
-#ifdef RT_USING_UART2
-    extern struct rt_device uart2_device;
-	extern void rt_hw_serial_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_hw_serial_isr(&uart2_device);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-/*******************************************************************************
-* Function Name  : USART3_IRQHandler
-* Description    : This function handles USART3 global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void USART3_IRQHandler(void)
-{
-#ifdef RT_USING_UART3
-    extern struct rt_device uart3_device;
-	extern void rt_hw_serial_isr(struct rt_device *device);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_hw_serial_isr(&uart3_device);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-#endif
-}
-
-#if defined(RT_USING_DFS) && STM32_USE_SDIO
-/*******************************************************************************
-* Function Name  : SDIO_IRQHandler
-* Description    : This function handles SDIO global interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void SDIO_IRQHandler(void)
-{
-    extern int SD_ProcessIRQSrc(void);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    /* Process All SDIO Interrupt Sources */
-    SD_ProcessIRQSrc();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#ifdef RT_USING_LWIP
-#ifdef STM32F10X_CL
-/*******************************************************************************
-* Function Name  : ETH_IRQHandler
-* Description    : This function handles ETH interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void ETH_IRQHandler(void)
-{
-	extern void rt_hw_stm32_eth_isr(void);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-	rt_hw_stm32_eth_isr();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#else
-#if (STM32_ETH_IF == 0)
-/*******************************************************************************
-* Function Name  : EXTI0_IRQHandler
-* Description    : This function handles External interrupt Line 0 request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void EXTI2_IRQHandler(void)
-{
-    extern void enc28j60_isr(void);
-
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    enc28j60_isr();
-
-    /* Clear the Key Button EXTI line pending bit */
-    EXTI_ClearITPendingBit(EXTI_Line2);
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-#endif
-
-#if (STM32_ETH_IF == 1)
-/*******************************************************************************
-* Function Name  : EXTI4_IRQHandler
-* Description    : This function handles External lines 9 to 5 interrupt request.
-* Input          : None
-* Output         : None
-* Return         : None
-*******************************************************************************/
-void EXTI4_IRQHandler(void)
-{
-	extern void rt_dm9000_isr(void);
-
-	/* enter interrupt */
-	rt_interrupt_enter();
-
-	/* Clear the DM9000A EXTI line pending bit */
-	EXTI_ClearITPendingBit(EXTI_Line4);
-
-	rt_dm9000_isr();
-
-	/* leave interrupt */
-	rt_interrupt_leave();
-}
-#endif
-#endif
-#endif /* end of RT_USING_LWIP */
-
-/**
-  * @}
-  */
-
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
@@ -49,7 +49,7 @@
          <CreateLib>0</CreateLib>
          <CreateHexFile>0</CreateHexFile>
          <DebugInformation>1</DebugInformation>
-          <BrowseInformation>1</BrowseInformation>
+          <BrowseInformation>0</BrowseInformation>
          <ListingPath>.\build\</ListingPath>
          <HexFormatSelection>1</HexFormatSelection>
          <Merge32K>0</Merge32K>
@@ -61,6 +61,8 @@
            <UserProg2Name></UserProg2Name>
            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
          </BeforeCompile>
          <BeforeMake>
            <RunUserProg1>0</RunUserProg1>
@@ -134,6 +136,7 @@
            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
            <RestoreFunctions>0</RestoreFunctions>
            <RestoreToolbox>1</RestoreToolbox>
+            <RestoreTracepoints>0</RestoreTracepoints>
          </Target>
          <RunDebugAfterBuild>0</RunDebugAfterBuild>
          <TargetSelection>0</TargetSelection>
@@ -162,6 +165,7 @@
            <Capability>1</Capability>
            <DriverSelection>4096</DriverSelection>
          </Flash1>
+          <bUseTDR>0</bUseTDR>
          <Flash2>BIN\UL2CM3.DLL</Flash2>
          <Flash3>"" ()</Flash3>
          <Flash4></Flash4>
@@ -342,6 +346,7 @@
            <Rwpi>0</Rwpi>
            <wLevel>0</wLevel>
            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
            <VariousControls>
              <MiscControls></MiscControls>
              <Define></Define>
@@ -357,6 +362,7 @@
            <SplitLS>0</SplitLS>
            <SwStkChk>0</SwStkChk>
            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
            <VariousControls>
              <MiscControls></MiscControls>
              <Define></Define>
@@ -382,8 +388,6 @@
          </LDads>
        </TargetArmAds>
      </TargetOption>
-      <Groups>
-      </Groups>
    </Target>
  </Targets>

@@ -1,345 +0,0 @@
-/*
- * File      : usart.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2009-01-05     Bernard      the first version
- * 2010-03-29     Bernard      remove interrupt Tx and DMA Rx mode
- */
-
-#include "usart.h"
-#include <serial.h>
-#include <stm32f10x_dma.h>
-
-/*
- * Use UART1 as console output and finsh input
- * interrupt Rx and poll Tx (stream mode)
- *
- * Use UART2 with interrupt Rx and poll Tx
- * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
- *
- * USART DMA setting on STM32
- * USART1 Tx --> DMA Channel 4
- * USART1 Rx --> DMA Channel 5
- * USART2 Tx --> DMA Channel 7
- * USART2 Rx --> DMA Channel 6
- * USART3 Tx --> DMA Channel 2
- * USART3 Rx --> DMA Channel 3
- */
-
-#ifdef RT_USING_UART1
-struct stm32_serial_int_rx uart1_int_rx;
-struct stm32_serial_device uart1 =
-{
-	USART1,
-	&uart1_int_rx,
-	RT_NULL
-};
-struct rt_device uart1_device;
-#endif
-
-#ifdef RT_USING_UART2
-struct stm32_serial_int_rx uart2_int_rx;
-struct stm32_serial_device uart2 =
-{
-	USART2,
-	&uart2_int_rx,
-	RT_NULL
-};
-struct rt_device uart2_device;
-#endif
-
-#ifdef RT_USING_UART3
-struct stm32_serial_int_rx uart3_int_rx;
-struct stm32_serial_dma_tx uart3_dma_tx;
-struct stm32_serial_device uart3 =
-{
-	USART3,
-	&uart3_int_rx,
-	&uart3_dma_tx
-};
-struct rt_device uart3_device;
-#endif
-
-#define USART1_DR_Base  0x40013804
-#define USART2_DR_Base  0x40004404
-#define USART3_DR_Base  0x40004804
-
-/* USART1_REMAP = 0 */
-#define UART1_GPIO_TX		GPIO_Pin_9
-#define UART1_GPIO_RX		GPIO_Pin_10
-#define UART1_GPIO			GPIOA
-#define RCC_APBPeriph_UART1	RCC_APB2Periph_USART1
-#define UART1_TX_DMA		DMA1_Channel4
-#define UART1_RX_DMA		DMA1_Channel5
-
-#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
-#define UART2_GPIO_TX	    GPIO_Pin_5
-#define UART2_GPIO_RX	    GPIO_Pin_6
-#define UART2_GPIO	    	GPIOD
-#define RCC_APBPeriph_UART2	RCC_APB1Periph_USART2
-#else /* for STM32F10X_HD */
-/* USART2_REMAP = 0 */
-#define UART2_GPIO_TX		GPIO_Pin_2
-#define UART2_GPIO_RX		GPIO_Pin_3
-#define UART2_GPIO			GPIOA
-#define RCC_APBPeriph_UART2	RCC_APB1Periph_USART2
-#define UART2_TX_DMA		DMA1_Channel7
-#define UART2_RX_DMA		DMA1_Channel6
-#endif
-
-/* USART3_REMAP[1:0] = 00 */
-#define UART3_GPIO_RX		GPIO_Pin_11
-#define UART3_GPIO_TX		GPIO_Pin_10
-#define UART3_GPIO			GPIOB
-#define RCC_APBPeriph_UART3	RCC_APB1Periph_USART3
-#define UART3_TX_DMA		DMA1_Channel2
-#define UART3_RX_DMA		DMA1_Channel3
-
-static void RCC_Configuration(void)
-{
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
-
-#ifdef RT_USING_UART1
-	/* Enable USART1 and GPIOA clocks */
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
-#endif
-
-#ifdef RT_USING_UART2
-
-#if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
-    /* Enable AFIO and GPIOD clock */
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
-
-    /* Enable the USART2 Pins Software Remapping */
-    GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
-#else
-    /* Enable AFIO and GPIOA clock */
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
-#endif
-
-	/* Enable USART2 clock */
-	RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
-#endif
-
-#ifdef RT_USING_UART3
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
-	/* Enable USART3 clock */
-	RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
-
-	/* DMA clock enable */
-	RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
-#endif
-}
-
-static void GPIO_Configuration(void)
-{
-	GPIO_InitTypeDef GPIO_InitStructure;
-
-#ifdef RT_USING_UART1
-	/* Configure USART1 Rx (PA.10) as input floating */
-	GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
-	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-	GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
-
-	/* Configure USART1 Tx (PA.09) as alternate function push-pull */
-	GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
-	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
-	GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
-#endif
-
-#ifdef RT_USING_UART2
-	/* Configure USART2 Rx as input floating */
-	GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
-	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-	GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
-
-	/* Configure USART2 Tx as alternate function push-pull */
-	GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
-	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
-	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-	GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
-#endif
-
-#ifdef RT_USING_UART3
-	/* Configure USART3 Rx as input floating */
-	GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
-	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-	GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
-
-	/* Configure USART3 Tx as alternate function push-pull */
-	GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
-	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
-	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-	GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
-#endif
-}
-
-static void NVIC_Configuration(void)
-{
-	NVIC_InitTypeDef NVIC_InitStructure;
-
-#ifdef RT_USING_UART1
-	/* Enable the USART1 Interrupt */
-	NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);
-#endif
-
-#ifdef RT_USING_UART2
-	/* Enable the USART2 Interrupt */
-	NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);
-#endif
-
-#ifdef RT_USING_UART3
-	/* Enable the USART3 Interrupt */
-	NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);
-
-	/* Enable the DMA1 Channel2 Interrupt */
-	NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
-	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
-	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-	NVIC_Init(&NVIC_InitStructure);
-#endif
-}
-
-static void DMA_Configuration(void)
-{
-#if defined (RT_USING_UART3)
-	DMA_InitTypeDef DMA_InitStructure;
-
-	/* fill init structure */
-	DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
-	DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
-	DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
-	DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
-	DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
-	DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
-	DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
-
-	/* DMA1 Channel5 (triggered by USART3 Tx event) Config */
-	DMA_DeInit(UART3_TX_DMA);
-	DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
-	DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
-	/* As we will set them before DMA actually enabled, the DMA_MemoryBaseAddr
-	 * and DMA_BufferSize are meaningless. So just set them to proper values
-	 * which could make DMA_Init happy.
-	 */
-	DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
-	DMA_InitStructure.DMA_BufferSize = 1;
-	DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
-	DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
-	DMA_ClearFlag(DMA1_FLAG_TC2);
-#endif
-}
-
-/*
- * Init all related hardware in here
- * rt_hw_serial_init() will register all supported USART device
- */
-void rt_hw_usart_init()
-{
-	USART_InitTypeDef USART_InitStructure;
-	USART_ClockInitTypeDef USART_ClockInitStructure;
-
-	RCC_Configuration();
-
-	GPIO_Configuration();
-
-	NVIC_Configuration();
-
-	DMA_Configuration();
-
-	/* uart init */
-#ifdef RT_USING_UART1
-	USART_InitStructure.USART_BaudRate = 115200;
-	USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-	USART_InitStructure.USART_StopBits = USART_StopBits_1;
-	USART_InitStructure.USART_Parity = USART_Parity_No;
-	USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-	USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
-	USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
-	USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
-	USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
-	USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
-	USART_Init(USART1, &USART_InitStructure);
-	USART_ClockInit(USART1, &USART_ClockInitStructure);
-
-	/* register uart1 */
-	rt_hw_serial_register(&uart1_device, "uart1",
-		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-		&uart1);
-
-	/* enable interrupt */
-	USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
-#endif
-
-#ifdef RT_USING_UART2
-	USART_InitStructure.USART_BaudRate = 115200;
-	USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-	USART_InitStructure.USART_StopBits = USART_StopBits_1;
-	USART_InitStructure.USART_Parity = USART_Parity_No;
-	USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-	USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
-	USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
-	USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
-	USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
-	USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
-	USART_Init(USART2, &USART_InitStructure);
-	USART_ClockInit(USART2, &USART_ClockInitStructure);
-
-	/* register uart2 */
-	rt_hw_serial_register(&uart2_device, "uart2",
-		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-		&uart2);
-
-	/* Enable USART2 DMA Rx request */
-	USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
-#endif
-
-#ifdef RT_USING_UART3
-	USART_InitStructure.USART_BaudRate = 115200;
-	USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-	USART_InitStructure.USART_StopBits = USART_StopBits_1;
-	USART_InitStructure.USART_Parity = USART_Parity_No;
-	USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-	USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
-	USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
-	USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
-	USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
-	USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
-	USART_Init(USART3, &USART_InitStructure);
-	USART_ClockInit(USART3, &USART_ClockInitStructure);
-
-	uart3_dma_tx.dma_channel= UART3_TX_DMA;
-
-	/* register uart3 */
-	rt_hw_serial_register(&uart3_device, "uart3",
-		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
-		&uart3);
-
-	/* Enable USART3 DMA Tx request */
-	USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
-
-	/* enable interrupt */
-	USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
-#endif
-}