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[bsp/renesas/ra2l1-cpk] 添加RA2L1-CPK开发板BSP
[bsp/renesas] 更新flash、gpio驱动和配置头文件。更新FSP配置文档
This commit is contained in:
Sherman
guo
@@ -5,9 +5,11 @@ RA 系列 BSP 目前支持情况如下表所示：
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| **BSP 文件夹名称** | **开发板名称** |
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|:------------------------- |:-------------------------- |
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| **RA6 系列** | |
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| **RA6 系列** | |
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| [ra6m4-cpk](ra6m4-cpk) | Renesas 官方 CPK-RA6M4 开发板 |
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| [ra6m4-iot](ra6m4-iot) | Renesas 官方 IOT-RA6M4 开发板 |
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| **RA2 系列** | |
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| [ra2l1-cpk](ra2l1-cpk) | Renesas 官方 CPK-RA2L1 开发板 |
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可以通过阅读相应 BSP 下的 README 来快速上手，如果想要使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档，如下表所示：
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@@ -63,7 +63,7 @@ How to add an IO interrupt?
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3. Create stack and enter configuration. Because it needs to adapt to the naming used in the RT-Thread driver, it is necessary to modify the naming and set **name** , **channel** , **callback** to be the same label. Select the trigger method you want, and finally save the configuration to generate the configuration code.
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3. Create stack and enter configuration. Because it needs to adapt to the naming used in the RT-Thread driver, it is necessary to modify the naming and set **name** , **channel** to be the same label. Select the trigger method you want, and finally save the configuration to generate the configuration code.
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@@ -63,7 +63,7 @@ RA系列已更新 **FSP 3.5.0** 版本的支持，请使用 **FSP 3.5.0** 版本
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3. 创建 stack 并进入配置。因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置 **name** 、**channel** 、**callback** 为一致的标号。选择你希望的触发方式，最后保存配置，生成配置代码。
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3. 创建 stack 并进入配置。因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置 **name** 、**channel** 为一致的标号，**callback**统一命名为`irq_callback`。选择你希望的触发方式，最后保存配置，生成配置代码。
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41
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/adc_config.h
Normal file
41
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/adc_config.h
Normal file
@@ -0,0 +1,41 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-19 Mr.Tiger first version
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*/
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#ifndef __ADC_CONFIG_H__
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#define __ADC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct ra_adc_map
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{
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char name;
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const adc_cfg_t *g_cfg;
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const adc_instance_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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struct ra_dev
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{
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rt_adc_device_t ra_adc_device_t;
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struct ra_adc_map *ra_adc_dev;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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48
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/can_config.h
Normal file
48
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/can_config.h
Normal file
@@ -0,0 +1,48 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-29 mazhiyuan first version
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*/
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#ifndef __CAN_CONFIG_H__
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#define __CAN_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_CAN0)
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#ifndef CAN0_CONFIG
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#define CAN0_CONFIG \
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{ \
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.name = "can0", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \
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.p_api_ctrl = &g_can0_ctrl, \
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.p_cfg = &g_can0_cfg, \
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}
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#endif /* CAN0_CONFIG */
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#endif /* BSP_USING_CAN0 */
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#if defined(BSP_USING_CAN1)
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#ifndef CAN1_CONFIG
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#define CAN1_CONFIG \
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{ \
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.name = "can1", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \
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.p_api_ctrl = &g_can1_ctrl, \
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.p_cfg = &g_can1_cfg, \
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}
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#endif /* CAN1_CONFIG */
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#endif /* BSP_USING_CAN1 */
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#ifdef __cplusplus
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}
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#endif
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#endif
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41
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/dac_config.h
Normal file
41
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/dac_config.h
Normal file
@@ -0,0 +1,41 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-19 Mr.Tiger first version
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*/
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#ifndef __DAC_CONFIG_H__
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#define __DAC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_DAC
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struct ra_dac_map
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{
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char name;
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const struct st_dac_cfg *g_cfg;
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const struct st_dac_instance_ctrl *g_ctrl;
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};
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struct ra_dac_dev
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{
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rt_dac_device_t ra_dac_device_t;
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struct ra_dac_map *ra_dac_map_dev;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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68
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/pwm_config.h
Normal file
68
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/pwm_config.h
Normal file
@@ -0,0 +1,68 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-26 KevinXu first version
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*/
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#ifndef __PWM_CONFIG_H__
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#define __PWM_CONFIG_H__
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#include <rtthread.h>
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#include <drv_config.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum
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{
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#ifdef BSP_USING_PWM0
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BSP_PWM0_INDEX,
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#endif
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#ifdef BSP_USING_PWM1
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BSP_PWM1_INDEX,
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#endif
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#ifdef BSP_USING_PWM2
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BSP_PWM2_INDEX,
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#endif
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#ifdef BSP_USING_PWM3
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BSP_PWM3_INDEX,
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#endif
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#ifdef BSP_USING_PWM4
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BSP_PWM4_INDEX,
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#endif
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#ifdef BSP_USING_PWM5
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BSP_PWM5_INDEX,
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#endif
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#ifdef BSP_USING_PWM6
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BSP_PWM6_INDEX,
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#endif
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#ifdef BSP_USING_PWM7
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BSP_PWM7_INDEX,
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#endif
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#ifdef BSP_USING_PWM8
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BSP_PWM8_INDEX,
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#endif
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#ifdef BSP_USING_PWM9
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BSP_PWM9_INDEX,
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#endif
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BSP_PWMS_NUM
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};
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#define PWM_DRV_INITIALIZER(num) \
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{ \
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.name = "pwm"#num , \
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.g_cfg = &g_timer##num##_cfg, \
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.g_ctrl = &g_timer##num##_ctrl, \
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.g_timer = &g_timer##num, \
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PWM_CONFIG_H__ */
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80
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/uart_config.h
Normal file
80
bsp/renesas/libraries/HAL_Drivers/config/ra2l1/uart_config.h
Normal file
@@ -0,0 +1,80 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-07-29 KyleChan first version
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*/
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#ifndef __UART_CONFIG_H__
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#define __UART_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_UART0)
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#ifndef UART0_CONFIG
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#define UART0_CONFIG \
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{ \
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.name = "uart0", \
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.p_api_ctrl = &g_uart0_ctrl, \
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.p_cfg = &g_uart0_cfg, \
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}
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#endif /* UART0_CONFIG */
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#endif /* BSP_USING_UART0 */
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#if defined(BSP_USING_UART1)
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#ifndef UART1_CONFIG
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#define UART1_CONFIG \
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{ \
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.name = "uart1", \
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.p_api_ctrl = &g_uart1_ctrl, \
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.p_cfg = &g_uart1_cfg, \
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}
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#endif /* UART1_CONFIG */
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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#ifndef UART2_CONFIG
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#define UART2_CONFIG \
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{ \
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.name = "uart2", \
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.p_api_ctrl = &g_uart2_ctrl, \
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.p_cfg = &g_uart2_cfg, \
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}
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#endif /* UART2_CONFIG */
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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#ifndef UART3_CONFIG
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#define UART3_CONFIG \
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{ \
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.name = "uart3", \
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.p_api_ctrl = &g_uart3_ctrl, \
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.p_cfg = &g_uart3_cfg, \
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}
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#endif /* UART3_CONFIG */
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#endif /* BSP_USING_UART3 */
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#if defined(BSP_USING_UART9)
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#ifndef UART9_CONFIG
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#define UART9_CONFIG \
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{ \
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.name = "uart9", \
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.p_api_ctrl = &g_uart9_ctrl, \
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.p_cfg = &g_uart9_cfg, \
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}
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#endif /* UART9_CONFIG */
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#endif /* BSP_USING_UART9 */
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -14,9 +14,8 @@
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#include "board.h"
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#include "hal_data.h"
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#include "drv_flash.h"
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#include <rtthread.h>
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#include "drv_common.h"
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#if defined(RT_USING_FAL)
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#include "fal.h"
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@@ -31,18 +30,40 @@
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#endif /* DRV_DEBUG */
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#include <rtdbg.h>
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#if BSP_FEATURE_FLASH_HP_VERSION
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/* FLASH API */
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#define R_FLASH_Open R_FLASH_HP_Open
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#define R_FLASH_Reset R_FLASH_HP_Reset
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#define R_FLASH_Write R_FLASH_HP_Write
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#define R_FLASH_Erase R_FLASH_HP_Erase
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#define R_FLASH_StartUpAreaSelect R_FLASH_HP_StartUpAreaSelect
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/* BSP_FEATURE_FLASH */
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#define FLASH_CF_WRITE_SIZE BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE
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#else /* FLASH LP */
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/* FLASH API */
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#define R_FLASH_Open R_FLASH_LP_Open
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#define R_FLASH_Reset R_FLASH_LP_Reset
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#define R_FLASH_Write R_FLASH_LP_Write
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#define R_FLASH_Erase R_FLASH_LP_Erase
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#define R_FLASH_StartUpAreaSelect R_FLASH_LP_StartUpAreaSelect
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/* BSP_FEATURE_FLASH */
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#define FLASH_CF_WRITE_SIZE BSP_FEATURE_FLASH_LP_CF_WRITE_SIZE
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#endif
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int _flash_init(void)
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{
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fsp_err_t err = FSP_SUCCESS;
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/* Open Flash_HP */
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err = R_FLASH_HP_Open(&g_flash_ctrl, &g_flash_cfg);
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err = R_FLASH_Open(&g_flash_ctrl, &g_flash_cfg);
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/* Handle Error */
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if (FSP_SUCCESS != err)
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{
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LOG_E("\r\n Flah_HP_Open API failed");
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}
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/* Setup Default Block 0 as Startup Setup Block */
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err = R_FLASH_HP_StartUpAreaSelect(&g_flash_ctrl, FLASH_STARTUP_AREA_BLOCK0, true);
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err = R_FLASH_StartUpAreaSelect(&g_flash_ctrl, FLASH_STARTUP_AREA_BLOCK0, true);
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if (err != FSP_SUCCESS)
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{
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LOG_E("\r\n Flah_HP_StartUpAreaSelect API failed");
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@@ -90,18 +111,18 @@ int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
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fsp_err_t err = FSP_SUCCESS;
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size_t written_size = 0;
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if (size % BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE)
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if (size % FLASH_CF_WRITE_SIZE)
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{
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LOG_E("Flash Write size must be an integer multiple of %d", BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE);
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LOG_E("Flash Write size must be an integer multiple of %d", FLASH_CF_WRITE_SIZE);
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return -RT_EINVAL;
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}
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while (written_size < size)
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{
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level = rt_hw_interrupt_disable();
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R_FLASH_HP_Reset(&g_flash_ctrl);
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R_FLASH_Reset(&g_flash_ctrl);
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/* Write code flash data*/
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err = R_FLASH_HP_Write(&g_flash_ctrl, (uint32_t)(buf + written_size), addr + written_size, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE);
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err = R_FLASH_Write(&g_flash_ctrl, (uint32_t)(buf + written_size), addr + written_size, FLASH_CF_WRITE_SIZE);
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rt_hw_interrupt_enable(level);
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/* Error Handle */
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@@ -111,7 +132,7 @@ int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
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return -RT_EIO;
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}
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written_size += BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE;
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written_size += FLASH_CF_WRITE_SIZE;
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}
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if (result != RT_EOK)
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@@ -132,12 +153,20 @@ int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
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*
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* @return result
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*/
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int _flash_erase_8k(rt_uint32_t addr, size_t size)
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#if BSP_FEATURE_FLASH_HP_VERSION
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int _flash_hp0_erase(rt_uint32_t addr, size_t size)
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#else
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int _flash_lp_erase(rt_uint32_t addr, size_t size)
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#endif
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{
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fsp_err_t err = FSP_SUCCESS;
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rt_base_t level;
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#if BSP_FEATURE_FLASH_HP_VERSION
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if ((addr + size) > BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE)
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#else
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if ((addr + size) > BSP_ROM_SIZE_BYTES)
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#endif
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{
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LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
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return -RT_EINVAL;
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@@ -149,14 +178,22 @@ int _flash_erase_8k(rt_uint32_t addr, size_t size)
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}
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level = rt_hw_interrupt_disable();
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R_FLASH_HP_Reset(&g_flash_ctrl);
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R_FLASH_Reset(&g_flash_ctrl);
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/* Erase Block */
|
||||
err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_8KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE + 1);
|
||||
#if BSP_FEATURE_FLASH_HP_VERSION
|
||||
err = R_FLASH_Erase(&g_flash_ctrl,
|
||||
RT_ALIGN_DOWN(addr, BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE),
|
||||
((size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE + 1));
|
||||
#else
|
||||
err = R_FLASH_Erase(&g_flash_ctrl,
|
||||
RT_ALIGN_DOWN(addr, BSP_FEATURE_FLASH_LP_CF_BLOCK_SIZE),
|
||||
((size - 1) / BSP_FEATURE_FLASH_LP_CF_BLOCK_SIZE + 1));
|
||||
#endif
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
if (err != FSP_SUCCESS)
|
||||
{
|
||||
LOG_E("Erase API failed");
|
||||
LOG_E("Erase failed:addr (0x%p), size %d", (void *)addr, size);
|
||||
return -RT_EIO;
|
||||
}
|
||||
|
||||
@@ -164,7 +201,8 @@ int _flash_erase_8k(rt_uint32_t addr, size_t size)
|
||||
return size;
|
||||
}
|
||||
|
||||
int _flash_erase_32k(rt_uint32_t addr, size_t size)
|
||||
#if BSP_FEATURE_FLASH_HP_VERSION
|
||||
int _flash_hp1_erase(rt_uint32_t addr, size_t size)
|
||||
{
|
||||
fsp_err_t err = FSP_SUCCESS;
|
||||
rt_base_t level;
|
||||
@@ -175,9 +213,9 @@ int _flash_erase_32k(rt_uint32_t addr, size_t size)
|
||||
}
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
R_FLASH_HP_Reset(&g_flash_ctrl);
|
||||
R_FLASH_Reset(&g_flash_ctrl);
|
||||
/* Erase Block */
|
||||
err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_32KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE + 1);
|
||||
err = R_FLASH_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE + 1);
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
if (err != FSP_SUCCESS)
|
||||
@@ -189,84 +227,164 @@ int _flash_erase_32k(rt_uint32_t addr, size_t size)
|
||||
LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size);
|
||||
return size;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(RT_USING_FAL)
|
||||
|
||||
static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size);
|
||||
#define FLASH_START_ADDRESS 0x00000000
|
||||
|
||||
static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size);
|
||||
#if BSP_FEATURE_FLASH_HP_VERSION
|
||||
|
||||
static int fal_flash_erase_8k(long offset, size_t size);
|
||||
static int fal_flash_erase_32k(long offset, size_t size);
|
||||
static int fal_flash_hp0_read(long offset, rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_hp0_write(long offset, const rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_hp0_erase(long offset, size_t size);
|
||||
|
||||
const struct fal_flash_dev _onchip_flash_8k = { "onchip_flash_8k", FLASH_HP_CF_BLCOK_0, FLASH_HP_CF_BLOCK_8, (8 * 1024), {_flash_init, fal_flash_read_8k, fal_flash_write_8k, fal_flash_erase_8k} };
|
||||
const struct fal_flash_dev _onchip_flash_32k = { "onchip_flash_32k", FLASH_HP_CF_BLOCK_8, 32 * 30 * 1024, (32 * 1024), {_flash_init, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} };
|
||||
static int fal_flash_hp1_read(long offset, rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_hp1_write(long offset, const rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_hp1_erase(long offset, size_t size);
|
||||
|
||||
static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size)
|
||||
const struct fal_flash_dev _onchip_flash_hp0 =
|
||||
{
|
||||
return _flash_read(_onchip_flash_8k.addr + offset, buf, size);
|
||||
"onchip_flash_hp0",
|
||||
FLASH_START_ADDRESS,
|
||||
BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE,
|
||||
BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE,
|
||||
{
|
||||
_flash_init,
|
||||
fal_flash_hp0_read,
|
||||
fal_flash_hp0_write,
|
||||
fal_flash_hp0_erase
|
||||
},
|
||||
(BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE * 8)
|
||||
};
|
||||
const struct fal_flash_dev _onchip_flash_hp1 =
|
||||
{
|
||||
"onchip_flash_hp1",
|
||||
BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE,
|
||||
(BSP_ROM_SIZE_BYTES - BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE),
|
||||
BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE,
|
||||
{
|
||||
_flash_init,
|
||||
fal_flash_hp1_read,
|
||||
fal_flash_hp1_write,
|
||||
fal_flash_hp1_erase
|
||||
},
|
||||
(BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE * 8)
|
||||
};
|
||||
|
||||
/* code flash region0 */
|
||||
static int fal_flash_hp0_read(long offset, rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_read(_onchip_flash_hp0.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size)
|
||||
static int fal_flash_hp0_write(long offset, const rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_read(_onchip_flash_32k.addr + offset, buf, size);
|
||||
return _flash_write(_onchip_flash_hp0.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size)
|
||||
static int fal_flash_hp0_erase(long offset, size_t size)
|
||||
{
|
||||
return _flash_write(_onchip_flash_8k.addr + offset, buf, size);
|
||||
return _flash_hp0_erase(_onchip_flash_hp0.addr + offset, size);
|
||||
}
|
||||
/* code flash region1 */
|
||||
static int fal_flash_hp1_read(long offset, rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_read(_onchip_flash_hp1.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size)
|
||||
static int fal_flash_hp1_write(long offset, const rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_write(_onchip_flash_32k.addr + offset, buf, size);
|
||||
return _flash_write(_onchip_flash_hp1.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_erase_8k(long offset, size_t size)
|
||||
static int fal_flash_hp1_erase(long offset, size_t size)
|
||||
{
|
||||
return _flash_erase_8k(_onchip_flash_8k.addr + offset, size);
|
||||
return _flash_hp1_erase(_onchip_flash_hp1.addr + offset, size);
|
||||
}
|
||||
|
||||
static int fal_flash_erase_32k(long offset, size_t size)
|
||||
#else /* flash lp code flash */
|
||||
|
||||
static int fal_flash_lp_read(long offset, rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_lp_write(long offset, const rt_uint8_t *buf, size_t size);
|
||||
static int fal_flash_lp_erase(long offset, size_t size);
|
||||
|
||||
const struct fal_flash_dev _onchip_flash_lp =
|
||||
{
|
||||
return _flash_erase_32k(_onchip_flash_32k.addr + offset, size);
|
||||
"onchip_flash_lp",
|
||||
FLASH_START_ADDRESS,
|
||||
BSP_ROM_SIZE_BYTES,
|
||||
BSP_FEATURE_FLASH_LP_CF_BLOCK_SIZE,
|
||||
{
|
||||
_flash_init,
|
||||
fal_flash_lp_read,
|
||||
fal_flash_lp_write,
|
||||
fal_flash_lp_erase
|
||||
},
|
||||
(BSP_FEATURE_FLASH_LP_CF_WRITE_SIZE * 8)
|
||||
};
|
||||
|
||||
static int fal_flash_lp_read(long offset, rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_read(_onchip_flash_lp.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_lp_write(long offset, const rt_uint8_t *buf, size_t size)
|
||||
{
|
||||
return _flash_write(_onchip_flash_lp.addr + offset, buf, size);
|
||||
}
|
||||
|
||||
static int fal_flash_lp_erase(long offset, size_t size)
|
||||
{
|
||||
return _flash_lp_erase(_onchip_flash_lp.addr + offset, size);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
int flash_test(void)
|
||||
{
|
||||
#define TEST_OFF (_onchip_flash_32k.len - BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
|
||||
#if BSP_FEATURE_FLASH_HP_VERSION
|
||||
#define TEST_OFF (_onchip_flash_hp1.len - BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE)
|
||||
#else
|
||||
#define TEST_OFF (_onchip_flash_lp.len - BSP_FEATURE_FLASH_LP_CF_BLOCK_SIZE)
|
||||
#endif
|
||||
const struct fal_partition *param;
|
||||
uint8_t write_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0};
|
||||
uint8_t read_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0};
|
||||
uint8_t write_buffer[FLASH_CF_WRITE_SIZE] = {0};
|
||||
uint8_t read_buffer[FLASH_CF_WRITE_SIZE] = {0};
|
||||
|
||||
/* Set write buffer, clear read buffer */
|
||||
for (uint8_t index = 0; index < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; index++)
|
||||
for (uint8_t index = 0; index < FLASH_CF_WRITE_SIZE; index++)
|
||||
{
|
||||
write_buffer[index] = index;
|
||||
read_buffer[index] = 0;
|
||||
}
|
||||
|
||||
fal_init();
|
||||
|
||||
#if BSP_FEATURE_FLASH_HP_VERSION
|
||||
param = fal_partition_find("param");
|
||||
#else
|
||||
param = fal_partition_find("app");
|
||||
#endif
|
||||
if (param == RT_NULL)
|
||||
{
|
||||
LOG_E("not find partition param!");
|
||||
return -1;
|
||||
}
|
||||
LOG_I("Erase Start...");
|
||||
#if BSP_FEATURE_FLASH_HP_VERSION
|
||||
fal_partition_erase(param, TEST_OFF, BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE);
|
||||
#else
|
||||
fal_partition_erase(param, TEST_OFF, BSP_FEATURE_FLASH_LP_CF_BLOCK_SIZE);
|
||||
#endif
|
||||
LOG_I("Erase succeeded!");
|
||||
LOG_I("Write Start...");
|
||||
fal_partition_write(param, TEST_OFF, write_buffer, sizeof(write_buffer));
|
||||
LOG_I("Write succeeded!");
|
||||
LOG_I("Read Start...");
|
||||
fal_partition_read(param, TEST_OFF, read_buffer, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE);
|
||||
fal_partition_read(param, TEST_OFF, read_buffer, FLASH_CF_WRITE_SIZE);
|
||||
LOG_I("Read succeeded!");
|
||||
|
||||
for (int i = 0; i < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; i++)
|
||||
for (int i = 0; i < FLASH_CF_WRITE_SIZE; i++)
|
||||
{
|
||||
if (read_buffer[i] != write_buffer[i])
|
||||
{
|
||||
|
||||
@@ -1,64 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-11-30 flybreak first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_FLASH_H__
|
||||
#define __DRV_FLASH_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "rtdevice.h"
|
||||
#include <rthw.h>
|
||||
#include <drv_common.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Code Flash */
|
||||
#define FLASH_HP_CF_BLOCK_SIZE_32KB (32*1024) /* Block Size 32 KB */
|
||||
#define FLASH_HP_CF_BLOCK_SIZE_8KB (8*1024) /* Block Size 8KB */
|
||||
|
||||
#define FLASH_HP_CF_BLCOK_0 0x00000000U /* 8 KB: 0x00000000 - 0x00001FFF */
|
||||
#define FLASH_HP_CF_BLOCK_1 0x00002000U /* 8 KB: 0x00002000 - 0x00003FFF */
|
||||
#define FLASH_HP_CF_BLOCK_2 0x00004000U /* 8 KB: 0x00004000 - 0x00005FFF */
|
||||
#define FLASH_HP_CF_BLOCK_3 0x00006000U /* 8 KB: 0x00006000 - 0x00007FFF */
|
||||
#define FLASH_HP_CF_BLOCK_4 0x00008000U /* 8 KB: 0x00008000 - 0x00009FFF */
|
||||
#define FLASH_HP_CF_BLOCK_5 0x0000A000U /* 8 KB: 0x0000A000 - 0x0000BFFF */
|
||||
#define FLASH_HP_CF_BLOCK_6 0x0000C000U /* 8 KB: 0x0000C000 - 0x0000DFFF */
|
||||
#define FLASH_HP_CF_BLOCK_7 0x0000E000U /* 8 KB: 0x0000E000 - 0x0000FFFF */
|
||||
#define FLASH_HP_CF_BLOCK_8 0x00010000U /* 32 KB: 0x00010000 - 0x00017FFF */
|
||||
#define FLASH_HP_CF_BLOCK_9 0x00018000U /* 32 KB: 0x00018000 - 0x0001FFFF */
|
||||
#define FLASH_HP_CF_BLCOK_10 0x00020000U /* 32 KB: 0x00020000 - 0x0004FFFF */
|
||||
|
||||
#define FLASH_HP_DF_BLOCK_SIZE (64)
|
||||
/* Data Flash */
|
||||
#if (defined (BOARD_RA6M4_EK) || defined (BOARD_RA6M5_EK) || defined (BOARD_RA4M3_EK)||defined(BOARD_RA4M2_EK))
|
||||
|
||||
#define FLASH_HP_DF_BLOCK_0 0x08000000U /* 64 B: 0x40100000 - 0x4010003F */
|
||||
#define FLASH_HP_DF_BLOCK_1 0x08000040U /* 64 B: 0x40100040 - 0x4010007F */
|
||||
#define FLASH_HP_DF_BLOCK_2 0x08000080U /* 64 B: 0x40100080 - 0x401000BF */
|
||||
#define FLASH_HP_DF_BLOCK_3 0x080000C0U /* 64 B: 0x401000C0 - 0x401000FF */
|
||||
|
||||
#else
|
||||
|
||||
#define FLASH_HP_DF_BLOCK_0 0x40100000U /* 64 B: 0x40100000 - 0x4010003F */
|
||||
#define FLASH_HP_DF_BLOCK_1 0x40100040U /* 64 B: 0x40100040 - 0x4010007F */
|
||||
#define FLASH_HP_DF_BLOCK_2 0x40100080U /* 64 B: 0x40100080 - 0x401000BF */
|
||||
#define FLASH_HP_DF_BLOCK_3 0x401000C0U /* 64 B: 0x401000C0 - 0x401000FF */
|
||||
|
||||
#endif
|
||||
|
||||
#define BLOCK_SIZE (128)
|
||||
#define BLOCK_NUM (2)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __DRV_FLASH_H__ */
|
||||
@@ -340,162 +340,12 @@ int rt_hw_pin_init(void)
|
||||
}
|
||||
|
||||
#ifdef R_ICU_H
|
||||
void irq0_callback(external_irq_callback_args_t *p_args)
|
||||
void irq_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (0 == pin_irq_hdr_tab[0].pin)
|
||||
if (p_args->channel == pin_irq_hdr_tab[p_args->channel].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[0].hdr(pin_irq_hdr_tab[0].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq1_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (1 == pin_irq_hdr_tab[1].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[1].hdr(pin_irq_hdr_tab[1].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq2_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (2 == pin_irq_hdr_tab[2].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[2].hdr(pin_irq_hdr_tab[2].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq3_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (3 == pin_irq_hdr_tab[3].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[3].hdr(pin_irq_hdr_tab[3].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq4_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (4 == pin_irq_hdr_tab[4].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[4].hdr(pin_irq_hdr_tab[4].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq5_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (5 == pin_irq_hdr_tab[5].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[5].hdr(pin_irq_hdr_tab[5].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq6_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (6 == pin_irq_hdr_tab[6].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[6].hdr(pin_irq_hdr_tab[6].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq7_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (7 == pin_irq_hdr_tab[7].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[7].hdr(pin_irq_hdr_tab[7].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq8_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (8 == pin_irq_hdr_tab[8].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[8].hdr(pin_irq_hdr_tab[8].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq9_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (9 == pin_irq_hdr_tab[9].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[9].hdr(pin_irq_hdr_tab[9].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq10_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (10 == pin_irq_hdr_tab[10].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[10].hdr(pin_irq_hdr_tab[10].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq11_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (11 == pin_irq_hdr_tab[11].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[11].hdr(pin_irq_hdr_tab[11].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq12_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (12 == pin_irq_hdr_tab[12].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[12].hdr(pin_irq_hdr_tab[12].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq13_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (13 == pin_irq_hdr_tab[13].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[13].hdr(pin_irq_hdr_tab[13].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq14_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (14 == pin_irq_hdr_tab[14].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[14].hdr(pin_irq_hdr_tab[14].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
void irq15_callback(external_irq_callback_args_t *p_args)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
if (15 == pin_irq_hdr_tab[15].pin)
|
||||
{
|
||||
pin_irq_hdr_tab[15].hdr(pin_irq_hdr_tab[15].args);
|
||||
pin_irq_hdr_tab[p_args->channel].hdr(pin_irq_hdr_tab[p_args->channel].args);
|
||||
}
|
||||
rt_interrupt_leave();
|
||||
};
|
||||
|
||||
5
bsp/renesas/ra2l1-cpk/.gitignore
vendored
Normal file
5
bsp/renesas/ra2l1-cpk/.gitignore
vendored
Normal file
@@ -0,0 +1,5 @@
|
||||
/RTE
|
||||
/Listings
|
||||
/Objects
|
||||
ra_cfg.txt
|
||||
|
||||
9
bsp/renesas/ra2l1-cpk/.ignore_format.yml
Normal file
9
bsp/renesas/ra2l1-cpk/.ignore_format.yml
Normal file
@@ -0,0 +1,9 @@
|
||||
# files format check exclude path, please follow the instructions below to modify;
|
||||
# If you need to exclude an entire folder, add the folder path in dir_path;
|
||||
# If you need to exclude a file, add the path to the file in file_path.
|
||||
|
||||
dir_path:
|
||||
- ra
|
||||
- ra_gen
|
||||
- ra_cfg
|
||||
- RTE
|
||||
21
bsp/renesas/ra2l1-cpk/.settings/standalone.prefs
Normal file
21
bsp/renesas/ra2l1-cpk/.settings/standalone.prefs
Normal file
@@ -0,0 +1,21 @@
|
||||
#Fri Jul 22 15:41:36 CST 2022
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra2l1_cpk\#\#\#\#3.5.0/all=2985489297,ra/board/ra2l1_cpk/board_init.h|383876238,ra/board/ra2l1_cpk/board_leds.h|2918861270,ra/board/ra2l1_cpk/board_leds.c|586415029,ra/board/ra2l1_cpk/board.h|1521504391,ra/board/ra2l1_cpk/board_init.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|2425160085,ra/fsp/inc/api/bsp_api.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|2208590403,ra/fsp/inc/instances/r_ioport.h|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3297195641,ra/fsp/inc/fsp_version.h|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|546480625,ra/fsp/inc/fsp_common_api.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|1728953905,ra/fsp/inc/fsp_features.h|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra2l1\#\#device\#\#R7FA2L1AB2DFM\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra2l1\#\#fsp\#\#\#\#3.5.0/all=3828286676,ra/fsp/src/bsp/mcu/ra2l1/bsp_power.h|3050420323,ra/fsp/src/bsp/mcu/ra2l1/bsp_icu.h|4018024988,ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h|4234922905,ra/fsp/src/bsp/mcu/ra2l1/bsp_mcu_info.h|286820788,ra/fsp/src/bsp/mcu/ra2l1/bsp_power.c|3229315956,ra/fsp/src/bsp/mcu/ra2l1/bsp_elc.h
|
||||
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra2l1\#\#device\#\#\#\#3.5.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#ra2l1_cpk\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra2l1\#\#device\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=1939984091,ra/fsp/inc/api/r_ioport_api.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c|2208590403,ra/fsp/inc/instances/r_ioport.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra2l1\#\#fsp\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_icu\#\#\#\#3.5.0/all=2545672180,ra/fsp/inc/instances/r_icu.h|1906465970,ra/fsp/inc/api/r_external_irq_api.h|3018483678,ra/fsp/src/r_icu/r_icu.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=1889256766,ra/fsp/inc/instances/r_sci_uart.h|3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c|3916852077,ra/fsp/inc/api/r_uart_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.629312687=false
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/libraries=
|
||||
29
bsp/renesas/ra2l1-cpk/Kconfig
Normal file
29
bsp/renesas/ra2l1-cpk/Kconfig
Normal file
@@ -0,0 +1,29 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../../.."
|
||||
|
||||
# you can change the RTT_ROOT default "../.." to your rtthread_root,
|
||||
# example : default "F:/git_repositories/rt-thread"
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
config ENV_DIR
|
||||
string
|
||||
option env="ENV_ROOT"
|
||||
default "/"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "../libraries/Kconfig"
|
||||
source "$BSP_DIR/board/Kconfig"
|
||||
22
bsp/renesas/ra2l1-cpk/R7FA2L1AB2DFM.pincfg
Normal file
22
bsp/renesas/ra2l1-cpk/R7FA2L1AB2DFM.pincfg
Normal file
@@ -0,0 +1,22 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<v1:pinSettings xmlns:v1="http://www.tasking.com/schema/pinsettings/v1.1">
|
||||
<v1:pinMappingsRef version="2.05" file="" />
|
||||
<v1:deviceSetting id="renesas.ra2l1_fm" pattern="R7FA2L1****FM">
|
||||
<v1:packageSetting id="renesas.64lqfp" />
|
||||
</v1:deviceSetting>
|
||||
<v1:configSetting configurationId="debug0.mode" altId="debug0.mode.swd" />
|
||||
<v1:configSetting configurationId="p108.gpio_mode" altId="p108.gpio_mode.gpio_mode_peripheral" />
|
||||
<v1:configSetting configurationId="p108" altId="p108.debug0.swdio">
|
||||
<v1:connectionSetting altId="debug0.swdio.p108" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="debug0.swdio" altId="debug0.swdio.p108">
|
||||
<v1:connectionSetting altId="p108.debug0.swdio" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="p300.gpio_mode" altId="p300.gpio_mode.gpio_mode_peripheral" />
|
||||
<v1:configSetting configurationId="p300" altId="p300.debug0.swclk">
|
||||
<v1:connectionSetting altId="debug0.swclk.p300" />
|
||||
</v1:configSetting>
|
||||
<v1:configSetting configurationId="debug0.swclk" altId="debug0.swclk.p300">
|
||||
<v1:connectionSetting altId="p300.debug0.swclk" />
|
||||
</v1:configSetting>
|
||||
</v1:pinSettings>
|
||||
168
bsp/renesas/ra2l1-cpk/README.md
Normal file
168
bsp/renesas/ra2l1-cpk/README.md
Normal file
@@ -0,0 +1,168 @@
|
||||
# 瑞萨 CPK-RA2L1 开发板
|
||||
|
||||
## 简介
|
||||
|
||||
本文档为瑞萨 CPK-RA2L1 开发板提供的 BSP (板级支持包) 说明。通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。
|
||||
|
||||
主要内容如下：
|
||||
|
||||
- 开发板介绍
|
||||
- BSP 快速上手指南
|
||||
|
||||
## 开发板介绍
|
||||
|
||||
CPK-RA2L1 评估板可通过灵活配置软件包和 IDE，可帮助用户对[RA2L1 MCU 群组](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ra2l1-48mhz-arm-cortex-m23-ultra-low-power-general-purpose-microcontroller)的特性轻松进行评估，并对嵌入系统应用程序进行开发。
|
||||
|
||||
开发板正面外观如下图：
|
||||
|
||||
|
||||
|
||||
该开发板常用 **板载资源** 如下：
|
||||
|
||||
- MCU：R7FA2L1AB2DFM，48MHz，Arm Cortex®-M23 内核，256kB 代码闪存, 32kB SRAM
|
||||
- 调试接口：板载 J-Link 接口
|
||||
- 扩展接口：两个 PMOD 连接器
|
||||
|
||||
**更多详细资料及工具**
|
||||
|
||||
|
||||
## 使用说明
|
||||
|
||||
使用说明分为如下两个章节：
|
||||
|
||||
- 快速上手
|
||||
|
||||
本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
|
||||
- 进阶使用
|
||||
|
||||
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
|
||||
|
||||
### 快速上手
|
||||
|
||||
本 BSP 目前仅提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
|
||||
|
||||
**硬件连接**
|
||||
|
||||
使用 USB 数据线连接开发板到 PC，使用 J-link 接口下载和 DEBUG 程序。使用 USB 转串口工具连接 UART9：P109(TXD)、P110(RXD)。
|
||||
|
||||
|
||||
|
||||
**编译下载**
|
||||
|
||||
- 编译：双击 project.uvprojx 文件，打开 MDK5 工程，编译程序。
|
||||
|
||||
> 注意：此工程需要使用 J-Flash Lite 工具烧录程序。建议使用 V7.50 及以上版本烧录工程。[J-Link 下载链接](https://www.segger.com/downloads/jlink/)
|
||||
|
||||
- 下载：打开 J-Flash lite 工具，选择芯片型号 R7FA6M4AF，点击 OK 进入工具。选择 BSP 目录下 MDK 编译出的 /object/ra6m4.hex 文件，点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤：
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
**查看运行结果**
|
||||
|
||||
下载程序成功之后，系统会自动运行并打印系统信息。
|
||||
|
||||
连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息。输入 help 命令可查看系统中支持的命令。
|
||||
|
||||
```bash
|
||||
\ | /
|
||||
- RT - Thread Operating System
|
||||
/ | \ 4.1.0 build Jul 7 2022 14:44:40
|
||||
2006 - 2022 Copyright by RT-Thread team
|
||||
|
||||
Hello RT-Thread!
|
||||
msh >
|
||||
msh >
|
||||
RT-Thread shell commands:
|
||||
reboot - Reboot System
|
||||
help - RT - Thread shell help.
|
||||
ps - List threads in the system.
|
||||
free - Show the memory usage in the system.
|
||||
hello - say hello world
|
||||
clear - clear the terminal screen
|
||||
version - show RT - Thread version information
|
||||
list_thread - list thread
|
||||
list_sem - list semaphore in system
|
||||
list_event - list event in system
|
||||
list_mutex - list mutex in system
|
||||
list_mailbox - list mail box in system
|
||||
list_msgqueue - list message queue in system
|
||||
list_timer - list timer in system
|
||||
list_device - list device in system
|
||||
list - list all commands in system
|
||||
icu_sample - icu sample
|
||||
|
||||
msh >
|
||||
```
|
||||
|
||||
**应用入口函数**
|
||||
|
||||
应用层的入口函数在 **bsp\ra6m4-cpk\src\hal_emtry.c** 中 的 `void hal_entry(void)` 。用户编写的源文件可直接放在 src 目录下。
|
||||
|
||||
```c
|
||||
void hal_entry(void)
|
||||
{
|
||||
rt_kprintf("\nHello RT-Thread!\n");
|
||||
|
||||
while (1)
|
||||
{
|
||||
rt_pin_write(LED3_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
rt_pin_write(LED3_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
}
|
||||
```
|
||||
|
||||
### 进阶使用
|
||||
|
||||
**资料及文档**
|
||||
|
||||
- [开发板官网主页](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra2l1-evaluation-board#overview)
|
||||
- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091)
|
||||
- [datasheet](https://www2.renesas.cn/cn/zh/document/dst/ra2l1-group-datasheet?language=en&r=1596841)
|
||||
- [User’s Manual: Hardware](https://www2.renesas.cn/jp/zh/document/mah/ra2l1-group-users-manual-hardware?language=en&r=1398061)
|
||||
|
||||
**FSP 配置**
|
||||
|
||||
需要修改瑞萨的 BSP 外设配置或添加新的外设端口，需要用到瑞萨的 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document) 配置工具。请务必按照如下步骤完成配置。配置中有任何问题可到[RT-Thread 社区论坛](https://club.rt-thread.org/)中提问。
|
||||
|
||||
1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)，请使用 FSP 3.5.0 版本
|
||||
2. 下载安装完成后，需要添加 CPK-RA6M4 开发板的官方板级支持包
|
||||
> 打开[ 开发板详情页](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra2l1-evaluation-board#overview)，在**“软件下载”**列表中找到 **CPK-RA2L1板级支持包**，点击链接即可下载
|
||||
3. 如何将 **板级支持包**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/cn/zh/document/gde/1596896?language=zh&r=1596841)
|
||||
4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
|
||||
|
||||
**ENV 配置**
|
||||
|
||||
- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
|
||||
|
||||
此 BSP 默认只开启了UART和IRQ3外设功能，如果需使用更多高级功能例如组件、软件包等，需要利用 ENV 工具进行配置。
|
||||
|
||||
步骤如下：
|
||||
1. 在 bsp 下打开 env 工具。
|
||||
2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
|
||||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
|
||||
## FAQ
|
||||
|
||||
### 使用 MDK 的 DEBUG 时如果遇到提示 “Error: Flash Download failed Cortex-M23” 怎么办？
|
||||
|
||||
可按照下图操作，修改 Utilities 中的选项：
|
||||
|
||||
|
||||
|
||||
## 联系人信息
|
||||
|
||||
在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
|
||||
|
||||
## 贡献代码
|
||||
|
||||
如果您对此BSP感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [如何向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github)。
|
||||
30
bsp/renesas/ra2l1-cpk/SConscript
Normal file
30
bsp/renesas/ra2l1-cpk/SConscript
Normal file
@@ -0,0 +1,30 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
CPPPATH = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
print("\nThe current project does not support iar build\n")
|
||||
Return('group')
|
||||
elif rtconfig.PLATFORM == 'gcc':
|
||||
CPPPATH = [cwd + './src']
|
||||
src = Glob('./src/*.c')
|
||||
elif rtconfig.PLATFORM == 'armclang':
|
||||
if GetOption('target') != 'mdk5':
|
||||
CPPPATH = [cwd + './src']
|
||||
src = Glob('./src/*.c')
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
group = group + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('group')
|
||||
54
bsp/renesas/ra2l1-cpk/SConstruct
Normal file
54
bsp/renesas/ra2l1-cpk/SConstruct
Normal file
@@ -0,0 +1,54 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(ARFLAGS = [''])
|
||||
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
SDK_ROOT = os.path.abspath('./')
|
||||
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||
else:
|
||||
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||
|
||||
SDK_LIB = libraries_path_prefix
|
||||
Export('SDK_LIB')
|
||||
|
||||
rtconfig.BSP_LIBRARY_TYPE = None
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# include drivers
|
||||
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
303
bsp/renesas/ra2l1-cpk/board/Kconfig
Normal file
303
bsp/renesas/ra2l1-cpk/board/Kconfig
Normal file
@@ -0,0 +1,303 @@
|
||||
menu "Hardware Drivers Config"
|
||||
config CPK_R7FA2L1AB
|
||||
bool
|
||||
default y
|
||||
|
||||
config SOC_R7FA2L1AB
|
||||
bool
|
||||
select SOC_SERIES_R7FA2L1
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
source "../libraries/HAL_Drivers/Kconfig"
|
||||
|
||||
menuconfig BSP_USING_UART
|
||||
bool "Enable UART"
|
||||
default y
|
||||
select RT_USING_SERIAL
|
||||
select RT_USING_SERIAL_V2
|
||||
if BSP_USING_UART
|
||||
|
||||
menuconfig BSP_USING_UART0
|
||||
bool "Enable UART0"
|
||||
default n
|
||||
if BSP_USING_UART0
|
||||
config BSP_UART0_RX_USING_DMA
|
||||
bool "Enable UART0 RX DMA"
|
||||
depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART0_TX_USING_DMA
|
||||
bool "Enable UART0 TX DMA"
|
||||
depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART0_RX_BUFSIZE
|
||||
int "Set UART0 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART0_TX_BUFSIZE
|
||||
int "Set UART0 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART1
|
||||
bool "Enable UART1"
|
||||
default n
|
||||
if BSP_USING_UART1
|
||||
config BSP_UART1_RX_USING_DMA
|
||||
bool "Enable UART1 RX DMA"
|
||||
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART1_TX_USING_DMA
|
||||
bool "Enable UART1 TX DMA"
|
||||
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART1_RX_BUFSIZE
|
||||
int "Set UART1 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART1_TX_BUFSIZE
|
||||
int "Set UART1 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART2
|
||||
bool "Enable UART2"
|
||||
default n
|
||||
if BSP_USING_UART2
|
||||
config BSP_UART2_RX_USING_DMA
|
||||
bool "Enable UART2 RX DMA"
|
||||
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART2_TX_USING_DMA
|
||||
bool "Enable UART2 TX DMA"
|
||||
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART2_RX_BUFSIZE
|
||||
int "Set UART2 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART2_TX_BUFSIZE
|
||||
int "Set UART2 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART3
|
||||
bool "Enable UART3"
|
||||
default n
|
||||
if BSP_USING_UART3
|
||||
config BSP_UART3_RX_USING_DMA
|
||||
bool "Enable UART3 RX DMA"
|
||||
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART3_TX_USING_DMA
|
||||
bool "Enable UART3 TX DMA"
|
||||
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART3_RX_BUFSIZE
|
||||
int "Set UART3 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART3_TX_BUFSIZE
|
||||
int "Set UART3 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_UART9
|
||||
bool "Enable UART9"
|
||||
default n
|
||||
if BSP_USING_UART9
|
||||
config BSP_UART9_RX_USING_DMA
|
||||
bool "Enable UART9 RX DMA"
|
||||
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART9_TX_USING_DMA
|
||||
bool "Enable UART9 TX DMA"
|
||||
depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA
|
||||
default n
|
||||
|
||||
config BSP_UART9_RX_BUFSIZE
|
||||
int "Set UART9 RX buffer size"
|
||||
range 64 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 256
|
||||
|
||||
config BSP_UART9_TX_BUFSIZE
|
||||
int "Set UART9 TX buffer size"
|
||||
range 0 65535
|
||||
depends on RT_USING_SERIAL_V2
|
||||
default 0
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C BUS"
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
select RT_USING_I2C_BITOPS
|
||||
select RT_USING_PIN
|
||||
if BSP_USING_I2C
|
||||
menuconfig BSP_USING_I2C1
|
||||
bool "Enable I2C1 BUS (software simulation)"
|
||||
default y
|
||||
if BSP_USING_I2C1
|
||||
config BSP_I2C1_SCL_PIN
|
||||
hex "i2c1 scl pin number"
|
||||
range 0x0000 0x0B0F
|
||||
default 0x0512
|
||||
config BSP_I2C1_SDA_PIN
|
||||
hex "I2C1 sda pin number"
|
||||
range 0x0000 0x0B0F
|
||||
default 0x0511
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI BUS"
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
config BSP_SPI_USING_DTC_DMA
|
||||
bool "Enable SPI DTC transfers data without using the CPU."
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI0
|
||||
bool "Enable SPI0 BUS"
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI1
|
||||
bool "Enable SPI1 BUS"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC0
|
||||
bool "Enable ADC0"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_DAC
|
||||
bool "Enable DAC"
|
||||
default n
|
||||
select RT_USING_DAC
|
||||
if BSP_USING_DAC
|
||||
config BSP_USING_DAC0
|
||||
bool "Enable DAC0"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
config BSP_USING_PWM0
|
||||
bool "Enable GPT0 (32-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM1
|
||||
bool "Enable GPT1 (32-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM2
|
||||
bool "Enable GPT2 (32-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM3
|
||||
bool "Enable GPT3 (32-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM4
|
||||
bool "Enable GPT4 (16-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM5
|
||||
bool "Enable GPT5 (16-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM6
|
||||
bool "Enable GPT6 (16-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM7
|
||||
bool "Enable GPT7 (16-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM8
|
||||
bool "Enable GPT8 (16-Bits) output PWM"
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM9
|
||||
bool "Enable GPT9 (16-Bits) output PWM"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
default n
|
||||
select RT_USING_CAN
|
||||
if BSP_USING_CAN
|
||||
config BSP_USING_CAN0
|
||||
bool "Enable CAN0"
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_LPM
|
||||
bool "Enable LPM"
|
||||
select RT_USING_PM
|
||||
default n
|
||||
if BSP_USING_LPM
|
||||
config BSP_LPM_SLEEP
|
||||
bool "Enable LPM sleep mode"
|
||||
default n
|
||||
|
||||
config BSP_LPM_SNOOZE
|
||||
bool "Enable LPM snooze mode"
|
||||
default n
|
||||
|
||||
config BSP_LPM_STANDBY
|
||||
bool "Enable LPM standby mode"
|
||||
default n
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
endmenu
|
||||
19
bsp/renesas/ra2l1-cpk/board/SConscript
Normal file
19
bsp/renesas/ra2l1-cpk/board/SConscript
Normal file
@@ -0,0 +1,19 @@
|
||||
import os
|
||||
from building import *
|
||||
|
||||
objs = []
|
||||
cwd = GetCurrentDir()
|
||||
list = os.listdir(cwd)
|
||||
CPPPATH = [cwd]
|
||||
src = []
|
||||
|
||||
if GetDepend(['BSP_USING_LPM']):
|
||||
src += ['drv_pm.c']
|
||||
|
||||
objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
for item in list:
|
||||
if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(item, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
38
bsp/renesas/ra2l1-cpk/board/board.h
Normal file
38
bsp/renesas/ra2l1-cpk/board/board.h
Normal file
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-10-10 Sherman first version
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define RA_SRAM_SIZE 32
|
||||
#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024)
|
||||
|
||||
#ifdef __ARMCC_VERSION
|
||||
extern int Image$$RAM_END$$ZI$$Base;
|
||||
#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base)
|
||||
#elif __ICCARM__
|
||||
#pragma section="CSTACK"
|
||||
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||
#else
|
||||
extern int __RAM_segment_used_end__;
|
||||
#define HEAP_BEGIN (&__RAM_segment_used_end__)
|
||||
#endif
|
||||
|
||||
#define HEAP_END RA_SRAM_END
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
761
bsp/renesas/ra2l1-cpk/board/drv_pm.c
Normal file
761
bsp/renesas/ra2l1-cpk/board/drv_pm.c
Normal file
File diff suppressed because it is too large
Load Diff
24
bsp/renesas/ra2l1-cpk/board/ports/SConscript
Normal file
24
bsp/renesas/ra2l1-cpk/board/ports/SConscript
Normal file
@@ -0,0 +1,24 @@
|
||||
|
||||
from building import *
|
||||
import rtconfig
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = []
|
||||
|
||||
if GetDepend(['BSP_USING_RW007']):
|
||||
src += Glob('drv_rw007.c')
|
||||
|
||||
CPPPATH = [cwd]
|
||||
LOCAL_CCFLAGS = ''
|
||||
|
||||
if rtconfig.PLATFORM == 'gcc':
|
||||
LOCAL_CCFLAGS += ' -std=c99'
|
||||
elif rtconfig.PLATFORM == 'armcc':
|
||||
LOCAL_CCFLAGS += ' --c99'
|
||||
elif rtconfig.PLATFORM == 'armclang':
|
||||
LOCAL_CCFLAGS += ' -std=c99'
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS)
|
||||
|
||||
Return('group')
|
||||
54
bsp/renesas/ra2l1-cpk/board/ports/gpio_cfg.h
Normal file
54
bsp/renesas/ra2l1-cpk/board/ports/gpio_cfg.h
Normal file
@@ -0,0 +1,54 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-01-19 Sherman first version
|
||||
*/
|
||||
|
||||
/* Number of IRQ channels on the device */
|
||||
#define RA_IRQ_MAX 8
|
||||
|
||||
/* PIN to IRQx table */
|
||||
#define PIN2IRQX_TABLE(pin) \
|
||||
{ \
|
||||
switch (pin) \
|
||||
{ \
|
||||
case BSP_IO_PORT_04_PIN_00: \
|
||||
case BSP_IO_PORT_02_PIN_06: \
|
||||
case BSP_IO_PORT_01_PIN_05: \
|
||||
return 0; \
|
||||
case BSP_IO_PORT_02_PIN_05: \
|
||||
case BSP_IO_PORT_01_PIN_01: \
|
||||
case BSP_IO_PORT_01_PIN_04: \
|
||||
return 1; \
|
||||
case BSP_IO_PORT_01_PIN_00: \
|
||||
case BSP_IO_PORT_00_PIN_02: \
|
||||
case BSP_IO_PORT_02_PIN_13: \
|
||||
return 2; \
|
||||
case BSP_IO_PORT_00_PIN_04: \
|
||||
case BSP_IO_PORT_01_PIN_10: \
|
||||
case BSP_IO_PORT_02_PIN_12: \
|
||||
return 3; \
|
||||
case BSP_IO_PORT_04_PIN_02: \
|
||||
case BSP_IO_PORT_01_PIN_11: \
|
||||
case BSP_IO_PORT_04_PIN_11: \
|
||||
return 4; \
|
||||
case BSP_IO_PORT_04_PIN_01: \
|
||||
case BSP_IO_PORT_03_PIN_02: \
|
||||
case BSP_IO_PORT_04_PIN_10: \
|
||||
return 5; \
|
||||
case BSP_IO_PORT_03_PIN_01: \
|
||||
case BSP_IO_PORT_00_PIN_00: \
|
||||
case BSP_IO_PORT_04_PIN_09: \
|
||||
return 6; \
|
||||
case BSP_IO_PORT_00_PIN_15: \
|
||||
case BSP_IO_PORT_00_PIN_01: \
|
||||
case BSP_IO_PORT_04_PIN_08: \
|
||||
return 7; \
|
||||
default : \
|
||||
return -1; \
|
||||
} \
|
||||
}
|
||||
149
bsp/renesas/ra2l1-cpk/buildinfo.gpdsc
Normal file
149
bsp/renesas/ra2l1-cpk/buildinfo.gpdsc
Normal file
@@ -0,0 +1,149 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<package xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<vendor>Renesas</vendor>
|
||||
<name>Project Content</name>
|
||||
<description>Project content managed by the Renesas Smart Configurator</description>
|
||||
<url/>
|
||||
<releases>
|
||||
<release version="1.0.0"/>
|
||||
</releases>
|
||||
<generators>
|
||||
<generator id="Renesas RA Smart Configurator">
|
||||
<project_files>
|
||||
<file category="include" name="src/"/>
|
||||
<file category="source" name="src/hal_entry.c"/>
|
||||
</project_files>
|
||||
</generator>
|
||||
</generators>
|
||||
<components generator="Renesas RA Smart Configurator">
|
||||
<component Cclass="Flex Software" Cgroup="Components" Csub="ra">
|
||||
<files>
|
||||
<file category="include" name="ra/arm/CMSIS_5/CMSIS/Core/Include/"/>
|
||||
<file category="include" name="ra/fsp/inc/"/>
|
||||
<file category="include" name="ra/fsp/inc/api/"/>
|
||||
<file category="include" name="ra/fsp/inc/instances/"/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h" path=""/>
|
||||
<file category="other" name="ra/arm/CMSIS_5/LICENSE.txt"/>
|
||||
<file category="header" name="ra/board/ra2l1_cpk/board.h" path=""/>
|
||||
<file category="source" name="ra/board/ra2l1_cpk/board_init.c"/>
|
||||
<file category="header" name="ra/board/ra2l1_cpk/board_init.h" path=""/>
|
||||
<file category="source" name="ra/board/ra2l1_cpk/board_leds.c"/>
|
||||
<file category="header" name="ra/board/ra2l1_cpk/board_leds.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_external_irq_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_common_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_icu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_sci_uart.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_tfu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra2l1/bsp_elc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra2l1/bsp_feature.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra2l1/bsp_icu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra2l1/bsp_mcu_info.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/ra2l1/bsp_power.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra2l1/bsp_power.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/r_icu/r_icu.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
|
||||
<file category="other" name="ra/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Build Configuration">
|
||||
<files>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/"/>
|
||||
<file category="include" name="ra_cfg/fsp_cfg/bsp/"/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/board_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_icu_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_sci_uart_cfg.h" path=""/>
|
||||
<file category="other" name="ra_cfg/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Generated Data">
|
||||
<files>
|
||||
<file category="include" name="ra_gen/"/>
|
||||
<file category="header" name="ra_gen/bsp_clock_cfg.h" path=""/>
|
||||
<file category="source" name="ra_gen/common_data.c"/>
|
||||
<file category="header" name="ra_gen/common_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/hal_data.c"/>
|
||||
<file category="header" name="ra_gen/hal_data.h" path=""/>
|
||||
<file category="source" name="ra_gen/main.c"/>
|
||||
<file category="source" name="ra_gen/pin_data.c"/>
|
||||
<file category="other" name="ra_gen/SConscript"/>
|
||||
<file category="source" name="ra_gen/vector_data.c"/>
|
||||
<file category="header" name="ra_gen/vector_data.h" path=""/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Linker Script">
|
||||
<files>
|
||||
<file category="linkerScript" name="script/fsp.scat"/>
|
||||
<file category="other" name="script/ac6/fsp_keep.via"/>
|
||||
</files>
|
||||
</component>
|
||||
</components>
|
||||
</package>
|
||||
403
bsp/renesas/ra2l1-cpk/configuration.xml
Normal file
403
bsp/renesas/ra2l1-cpk/configuration.xml
Normal file
@@ -0,0 +1,403 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<raConfiguration version="7">
|
||||
<generalSettings>
|
||||
<option key="#Board#" value="board.ra2l1cpk"/>
|
||||
<option key="CPU" value="RA2L1"/>
|
||||
<option key="#TargetName#" value="R7FA2L1AB2DFM"/>
|
||||
<option key="#TargetARCHITECTURE#" value="cortex-m23"/>
|
||||
<option key="#DeviceCommand#" value="R7FA2L1AB"/>
|
||||
<option key="#RTOS#" value="_none"/>
|
||||
<option key="#pinconfiguration#" value="R7FA2L1AB2DFM.pincfg"/>
|
||||
<option key="#FSPVersion#" value="3.5.0"/>
|
||||
<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra2l1_cpk##"/>
|
||||
<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
|
||||
</generalSettings>
|
||||
<raBspConfiguration>
|
||||
<config id="config.bsp.ra2l1.R7FA2L1AB2DFM">
|
||||
<property id="config.bsp.part_number" value="config.bsp.part_number.value"/>
|
||||
<property id="config.bsp.rom_size_bytes" value="config.bsp.rom_size_bytes.value"/>
|
||||
<property id="config.bsp.rom_size_bytes_hidden" value="262144"/>
|
||||
<property id="config.bsp.ram_size_bytes" value="config.bsp.ram_size_bytes.value"/>
|
||||
<property id="config.bsp.data_flash_size_bytes" value="config.bsp.data_flash_size_bytes.value"/>
|
||||
<property id="config.bsp.package_style" value="config.bsp.package_style.value"/>
|
||||
<property id="config.bsp.package_pins" value="config.bsp.package_pins.value"/>
|
||||
</config>
|
||||
<config id="config.bsp.ra2l1">
|
||||
<property id="config.bsp.series" value="config.bsp.series.value"/>
|
||||
</config>
|
||||
<config id="config.bsp.ra2l1.fsp">
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_start_mode" value="config.bsp.fsp.OFS0.iwdt_start_mode.disabled"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_timeout" value="config.bsp.fsp.OFS0.iwdt_timeout.2048"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_divisor" value="config.bsp.fsp.OFS0.iwdt_divisor.128"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_window_end" value="config.bsp.fsp.OFS0.iwdt_window_end.0"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_window_start" value="config.bsp.fsp.OFS0.iwdt_window_start.100"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_reset_interrupt" value="config.bsp.fsp.OFS0.iwdt_reset_interrupt.Reset"/>
|
||||
<property id="config.bsp.fsp.OFS0.iwdt_stop_control" value="config.bsp.fsp.OFS0.iwdt_stop_control.stops"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_start_mode" value="config.bsp.fsp.OFS0.wdt_start_mode.register"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_timeout" value="config.bsp.fsp.OFS0.wdt_timeout.16384"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_divisor" value="config.bsp.fsp.OFS0.wdt_divisor.128"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_window_end" value="config.bsp.fsp.OFS0.wdt_window_end.0"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_window_start" value="config.bsp.fsp.OFS0.wdt_window_start.100"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_reset_interrupt" value="config.bsp.fsp.OFS0.wdt_reset_interrupt.Reset"/>
|
||||
<property id="config.bsp.fsp.OFS0.wdt_stop_control" value="config.bsp.fsp.OFS0.wdt_stop_control.stops"/>
|
||||
<property id="config.bsp.fsp.OFS1.internal_clock_supply" value="config.bsp.fsp.OFS1.internal_clock_supply.type_a"/>
|
||||
<property id="config.bsp.fsp.OFS1.voltage_detection0.start" value="config.bsp.fsp.OFS1.voltage_detection0.start.disabled"/>
|
||||
<property id="config.bsp.fsp.OFS1.voltage_detection0_level" value="config.bsp.fsp.OFS1.voltage_detection0_level.190"/>
|
||||
<property id="config.bsp.fsp.OFS1.hoco_osc" value="config.bsp.fsp.OFS1.hoco_osc.enabled"/>
|
||||
<property id="config.bsp.low_voltage_mode" value="config.bsp.low_voltage_mode.disabled"/>
|
||||
<property id="config.bsp.fsp.mpu_pc0_enable" value="config.bsp.fsp.mpu_pc0_enable.disabled"/>
|
||||
<property id="config.bsp.fsp.mpu_pc0_start" value="0x000FFFFC"/>
|
||||
<property id="config.bsp.fsp.mpu_pc0_end" value="0x000FFFFF"/>
|
||||
<property id="config.bsp.fsp.mpu_pc1_enable" value="config.bsp.fsp.mpu_pc1_enable.disabled"/>
|
||||
<property id="config.bsp.fsp.mpu_pc1_start" value="0x000FFFFC"/>
|
||||
<property id="config.bsp.fsp.mpu_pc1_end" value="0x000FFFFF"/>
|
||||
<property id="config.bsp.fsp.mpu_reg0_enable" value="config.bsp.fsp.mpu_reg0_enable.disabled"/>
|
||||
<property id="config.bsp.fsp.mpu_reg0_start" value="0x000FFFFC"/>
|
||||
<property id="config.bsp.fsp.mpu_reg0_end" value="0x000FFFFF"/>
|
||||
<property id="config.bsp.fsp.mpu_reg1_enable" value="config.bsp.fsp.mpu_reg1_enable.disabled"/>
|
||||
<property id="config.bsp.fsp.mpu_reg1_start" value="0x200FFFFC"/>
|
||||
<property id="config.bsp.fsp.mpu_reg1_end" value="0x200FFFFF"/>
|
||||
<property id="config.bsp.fsp.mpu_reg2_enable" value="config.bsp.fsp.mpu_reg2_enable.disabled"/>
|
||||
<property id="config.bsp.fsp.mpu_reg2_start" value="0x407FFFFC"/>
|
||||
<property id="config.bsp.fsp.mpu_reg2_end" value="0x407FFFFF"/>
|
||||
<property id="config.bsp.fsp.mpu_reg3_enable" value="config.bsp.fsp.mpu_reg3_enable.disabled"/>
|
||||
<property id="config.bsp.fsp.mpu_reg3_start" value="0x400DFFFC"/>
|
||||
<property id="config.bsp.fsp.mpu_reg3_end" value="0x400DFFFF"/>
|
||||
<property id="config.bsp.fsp.dcdc" value="config.bsp.fsp.dcdc.disabled"/>
|
||||
<property id="config.bsp.fsp.dcdc_range" value="config.bsp.fsp.dcdc_range.2v7_3v6"/>
|
||||
<property id="config.bsp.common.main_osc_wait" value="config.bsp.common.main_osc_wait.wait_8163"/>
|
||||
<property id="config.bsp.fsp.mcu.adc.max_freq_hz" value="64000000"/>
|
||||
<property id="config.bsp.fsp.mcu.sci_uart.max_baud" value="3333333"/>
|
||||
<property id="config.bsp.fsp.mcu.adc.sample_and_hold" value="0"/>
|
||||
<property id="config.bsp.fsp.mcu.sci_spi.max_bitrate" value="8000000"/>
|
||||
<property id="config.bsp.fsp.mcu.spi.max_bitrate" value="16000000"/>
|
||||
<property id="config.bsp.fsp.mcu.iic_master.rate.rate_fastplus" value="0"/>
|
||||
<property id="config.bsp.fsp.mcu.sci_uart.cstpen_channels" value="0x0"/>
|
||||
<property id="config.bsp.fsp.mcu.gpt.pin_count_source_channels" value="0xFFFF"/>
|
||||
<property id="config.bsp.common.id_mode" value="config.bsp.common.id_mode.unlocked"/>
|
||||
<property id="config.bsp.common.id_code" value="FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"/>
|
||||
<property id="config.bsp.common.id1" value=""/>
|
||||
<property id="config.bsp.common.id2" value=""/>
|
||||
<property id="config.bsp.common.id3" value=""/>
|
||||
<property id="config.bsp.common.id4" value=""/>
|
||||
<property id="config.bsp.common.id_fixed" value=""/>
|
||||
</config>
|
||||
<config id="config.bsp.ra">
|
||||
<property id="config.bsp.common.main" value="0x400"/>
|
||||
<property id="config.bsp.common.heap" value="0"/>
|
||||
<property id="config.bsp.common.vcc" value="3300"/>
|
||||
<property id="config.bsp.common.checking" value="config.bsp.common.checking.disabled"/>
|
||||
<property id="config.bsp.common.assert" value="config.bsp.common.assert.none"/>
|
||||
<property id="config.bsp.common.error_log" value="config.bsp.common.error_log.none"/>
|
||||
<property id="config.bsp.common.soft_reset" value="config.bsp.common.soft_reset.disabled"/>
|
||||
<property id="config.bsp.common.main_osc_populated" value="config.bsp.common.main_osc_populated.disabled"/>
|
||||
<property id="config.bsp.common.pfs_protect" value="config.bsp.common.pfs_protect.enabled"/>
|
||||
<property id="config.bsp.common.c_runtime_init" value="config.bsp.common.c_runtime_init.enabled"/>
|
||||
<property id="config.bsp.common.early_init" value="config.bsp.common.early_init.disabled"/>
|
||||
<property id="config.bsp.common.main_osc_clock_source" value="config.bsp.common.main_osc_clock_source.crystal"/>
|
||||
<property id="config.bsp.common.subclock_populated" value="config.bsp.common.subclock_populated.disabled"/>
|
||||
<property id="config.bsp.common.subclock_drive" value="config.bsp.common.subclock_drive.standard"/>
|
||||
<property id="config.bsp.common.subclock_stabilization_ms" value="1000"/>
|
||||
</config>
|
||||
</raBspConfiguration>
|
||||
<raClockConfiguration>
|
||||
<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
|
||||
<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
|
||||
<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
|
||||
<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
|
||||
<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
|
||||
<node id="board.clock.clock.source" option="board.clock.clock.source.hoco"/>
|
||||
<node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
|
||||
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
|
||||
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.2"/>
|
||||
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
|
||||
<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.1"/>
|
||||
<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
|
||||
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
|
||||
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
|
||||
<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
|
||||
</raClockConfiguration>
|
||||
<raComponentSelection>
|
||||
<component apiversion="" class="Common" condition="" group="all" subgroup="fsp_common" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>Board Support Package Common Files</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ioport" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>I/O Port</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="CMSIS" condition="" group="CMSIS5" subgroup="CoreM" variant="" vendor="Arm" version="5.8.0+renesas.0.fsp.3.5.0">
|
||||
<description>Arm CMSIS Version 5 - Core (M)</description>
|
||||
<originalPack>Arm.CMSIS5.5.8.0+renesas.0.fsp.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="ra2l1" subgroup="device" variant="R7FA2L1AB2DFM" vendor="Renesas" version="3.5.0">
|
||||
<description>Board support package for R7FA2L1AB2DFM</description>
|
||||
<originalPack>Renesas.RA_mcu_ra2l1.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="ra2l1" subgroup="device" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>Board support package for RA2L1</description>
|
||||
<originalPack>Renesas.RA_mcu_ra2l1.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="ra2l1" subgroup="fsp" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>Board support package for RA2L1 - FSP Data</description>
|
||||
<originalPack>Renesas.RA_mcu_ra2l1.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="BSP" condition="" group="Board" subgroup="ra2l1_cpk" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>RA2L1-CPK Board Support Files</description>
|
||||
<originalPack>Renesas.RA_board_ra2l1_cpk.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_sci_uart" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>SCI UART</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_icu" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>External Interrupt</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
</raComponentSelection>
|
||||
<raElcConfiguration/>
|
||||
<raIcuConfiguration/>
|
||||
<raModuleConfiguration>
|
||||
<module id="module.driver.ioport_on_ioport.0">
|
||||
<property id="module.driver.ioport.name" value="g_ioport"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport1" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport2" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport3" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioport4" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioportb" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioportc" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioportd" value="_disabled"/>
|
||||
<property id="module.driver.ioport.elc_trigger_ioporte" value="_disabled"/>
|
||||
<property id="module.driver.ioport.pincfg" value="g_bsp_pin_cfg"/>
|
||||
</module>
|
||||
<module id="module.driver.uart_on_sci_uart.629312687">
|
||||
<property id="module.driver.uart.name" value="g_uart9"/>
|
||||
<property id="module.driver.uart.channel" value="9"/>
|
||||
<property id="module.driver.uart.data_bits" value="module.driver.uart.data_bits.data_bits_8"/>
|
||||
<property id="module.driver.uart.parity" value="module.driver.uart.parity.parity_off"/>
|
||||
<property id="module.driver.uart.stop_bits" value="module.driver.uart.stop_bits.stop_bits_1"/>
|
||||
<property id="module.driver.uart.baud" value="115200"/>
|
||||
<property id="module.driver.uart.baudrate_modulation" value="module.driver.uart.baudrate_modulation.disabled"/>
|
||||
<property id="module.driver.uart.baudrate_max_err" value="5"/>
|
||||
<property id="module.driver.uart.flow_control" value="module.driver.uart.flow_control.rts"/>
|
||||
<property id="module.driver.uart.pin_control_port" value="module.driver.uart.pin_control_port.PORT_DISABLE"/>
|
||||
<property id="module.driver.uart.pin_control_pin" value="module.driver.uart.pin_control_pin.PIN_DISABLE"/>
|
||||
<property id="module.driver.uart.clk_src" value="module.driver.uart.clk_src.int_clk"/>
|
||||
<property id="module.driver.uart.rx_edge_start" value="module.driver.uart.rx_edge_start.falling_edge"/>
|
||||
<property id="module.driver.uart.noisecancel_en" value="module.driver.uart.noisecancel_en.disabled"/>
|
||||
<property id="module.driver.uart.rx_fifo_trigger" value="module.driver.uart.rx_fifo_trigger.max"/>
|
||||
<property id="module.driver.uart.callback" value="user_uart9_callback"/>
|
||||
<property id="module.driver.uart.rxi_ipl" value="board.icu.common.irq.priority2"/>
|
||||
<property id="module.driver.uart.txi_ipl" value="board.icu.common.irq.priority2"/>
|
||||
<property id="module.driver.uart.tei_ipl" value="board.icu.common.irq.priority2"/>
|
||||
<property id="module.driver.uart.eri_ipl" value="board.icu.common.irq.priority2"/>
|
||||
</module>
|
||||
<module id="module.driver.external_irq_on_icu.832378872">
|
||||
<property id="module.driver.external_irq.name" value="g_external_irq3"/>
|
||||
<property id="module.driver.external_irq.channel" value="3"/>
|
||||
<property id="module.driver.external_irq.trigger" value="module.driver.external_irq.trigger.trig_rising"/>
|
||||
<property id="module.driver.external_irq.filter_enable" value="module.driver.external_irq.filter_enable.false"/>
|
||||
<property id="module.driver.external_irq.pclk_div" value="module.driver.external_irq.pclk_div.pclk_div_by_64"/>
|
||||
<property id="module.driver.external_irq.p_callback" value="irq_callback"/>
|
||||
<property id="module.driver.external_irq.ipl" value="board.icu.common.irq.priority2"/>
|
||||
</module>
|
||||
<context id="_hal.0">
|
||||
<stack module="module.driver.ioport_on_ioport.0"/>
|
||||
<stack module="module.driver.uart_on_sci_uart.629312687"/>
|
||||
<stack module="module.driver.external_irq_on_icu.832378872"/>
|
||||
</context>
|
||||
<config id="config.driver.ioport">
|
||||
<property id="config.driver.ioport.checking" value="config.driver.ioport.checking.system"/>
|
||||
</config>
|
||||
<config id="config.driver.icu">
|
||||
<property id="config.driver.icu.param_checking_enable" value="config.driver.icu.param_checking_enable.bsp"/>
|
||||
</config>
|
||||
<config id="config.driver.sci_uart">
|
||||
<property id="config.driver.sci_uart.param_checking_enable" value="config.driver.sci_uart.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.sci_uart.fifo_support" value="config.driver.sci_uart.fifo_support.disabled"/>
|
||||
<property id="config.driver.sci_uart.dtc_support" value="config.driver.sci_uart.dtc_support.disabled"/>
|
||||
<property id="config.driver.sci_uart.flow_control" value="config.driver.sci_uart.flow_control.disabled"/>
|
||||
</config>
|
||||
</raModuleConfiguration>
|
||||
<raPinConfiguration>
|
||||
<symbolicName propertyId="p000.symbolic_name" value="ARDUINO_AN00"/>
|
||||
<symbolicName propertyId="p004.symbolic_name" value="SW1"/>
|
||||
<symbolicName propertyId="p012.symbolic_name" value="CTSU_TS1"/>
|
||||
<symbolicName propertyId="p013.symbolic_name" value="CTSU_TS2"/>
|
||||
<symbolicName propertyId="p015.symbolic_name" value="CTSU_TS3"/>
|
||||
<symbolicName propertyId="p100.symbolic_name" value="PMODA_MISOA_RXD0"/>
|
||||
<symbolicName propertyId="p101.symbolic_name" value="PMODA_MOSIA_TXD0"/>
|
||||
<symbolicName propertyId="p102.symbolic_name" value="PMODA_RSPCKA_SCK0"/>
|
||||
<symbolicName propertyId="p103.symbolic_name" value="PMODA_SSLA0_CTS0"/>
|
||||
<symbolicName propertyId="p104.symbolic_name" value="ARDUINO_GPIO_IRQ01"/>
|
||||
<symbolicName propertyId="p105.symbolic_name" value="PMODA_IO2"/>
|
||||
<symbolicName propertyId="p106.symbolic_name" value="PMODA_IO3"/>
|
||||
<symbolicName propertyId="p107.symbolic_name" value="ARDUINO_GPIO_KRM07"/>
|
||||
<symbolicName propertyId="p108.symbolic_name" value="DEBUG_SWDIO_TMS"/>
|
||||
<symbolicName propertyId="p109.symbolic_name" value="DEBUG_TDO"/>
|
||||
<symbolicName propertyId="p110.symbolic_name" value="DEBUG_TDI"/>
|
||||
<symbolicName propertyId="p111.symbolic_name" value="ARDUINO_GPIO_GTIOC6"/>
|
||||
<symbolicName propertyId="p112.symbolic_name" value="ARDUINO_GPIO_CLK"/>
|
||||
<symbolicName propertyId="p113.symbolic_name" value="ARDUINO_GPIO"/>
|
||||
<symbolicName propertyId="p201.symbolic_name" value="MD"/>
|
||||
<symbolicName propertyId="p205.symbolic_name" value="ARDUINO_TXD"/>
|
||||
<symbolicName propertyId="p207.symbolic_name" value="ARDUINO_RST"/>
|
||||
<symbolicName propertyId="p208.symbolic_name" value="PMODA_IO1"/>
|
||||
<symbolicName propertyId="p212.symbolic_name" value="EXTAL"/>
|
||||
<symbolicName propertyId="p213.symbolic_name" value="XTAL"/>
|
||||
<symbolicName propertyId="p214.symbolic_name" value="XCOUT"/>
|
||||
<symbolicName propertyId="p215.symbolic_name" value="XCIN"/>
|
||||
<symbolicName propertyId="p300.symbolic_name" value="DEBUG_SWDCLK_TCK"/>
|
||||
<symbolicName propertyId="p301.symbolic_name" value="GROVE_SCL"/>
|
||||
<symbolicName propertyId="p302.symbolic_name" value="GROVE_SDA"/>
|
||||
<symbolicName propertyId="p303.symbolic_name" value="PMODB_IO1"/>
|
||||
<symbolicName propertyId="p304.symbolic_name" value="PMODB_IO3"/>
|
||||
<symbolicName propertyId="p400.symbolic_name" value="PMODB_SCK1"/>
|
||||
<symbolicName propertyId="p401.symbolic_name" value="PMODB_MOSI_TXD1"/>
|
||||
<symbolicName propertyId="p402.symbolic_name" value="PMODB_MISO_RXD1"/>
|
||||
<symbolicName propertyId="p403.symbolic_name" value="PMODB_SSL_CTS1"/>
|
||||
<symbolicName propertyId="p407.symbolic_name" value="ARDUINO_SDA"/>
|
||||
<symbolicName propertyId="p408.symbolic_name" value="ARDUINO_SCL"/>
|
||||
<symbolicName propertyId="p409.symbolic_name" value="PMODB_IRQ06"/>
|
||||
<symbolicName propertyId="p410.symbolic_name" value="PMODB_IO2"/>
|
||||
<symbolicName propertyId="p411.symbolic_name" value="PMODA_IRQ04"/>
|
||||
<symbolicName propertyId="p500.symbolic_name" value="ARDUINO_GPIO_GTIOC5"/>
|
||||
<symbolicName propertyId="p501.symbolic_name" value="LED2"/>
|
||||
<symbolicName propertyId="p502.symbolic_name" value="LED1"/>
|
||||
<pincfg active="true" name="RA2L1 CPK" selected="true" symbol="g_bsp_pin_cfg">
|
||||
<configSetting altId="adc0.an00.p000" configurationId="adc0.an00"/>
|
||||
<configSetting altId="adc0.an01.p001" configurationId="adc0.an01"/>
|
||||
<configSetting altId="adc0.an02.p002" configurationId="adc0.an02"/>
|
||||
<configSetting altId="adc0.an03.p003" configurationId="adc0.an03"/>
|
||||
<configSetting altId="adc0.mode.custom" configurationId="adc0.mode"/>
|
||||
<configSetting altId="ctsu0.cfcts28.p015" configurationId="ctsu0.cfcts28"/>
|
||||
<configSetting altId="ctsu0.cfcts32.p012" configurationId="ctsu0.cfcts32"/>
|
||||
<configSetting altId="ctsu0.cfcts33.p013" configurationId="ctsu0.cfcts33"/>
|
||||
<configSetting altId="ctsu0.mode.enabled" configurationId="ctsu0.mode"/>
|
||||
<configSetting altId="ctsu0.tscap.p112" configurationId="ctsu0.tscap"/>
|
||||
<configSetting altId="debug0.mode.swd" configurationId="debug0.mode"/>
|
||||
<configSetting altId="debug0.swclk.p300" configurationId="debug0.swclk"/>
|
||||
<configSetting altId="debug0.swdio.p108" configurationId="debug0.swdio"/>
|
||||
<configSetting altId="iic0.mode.enabled.free" configurationId="iic0.mode"/>
|
||||
<configSetting altId="iic0.pairing.free" configurationId="iic0.pairing"/>
|
||||
<configSetting altId="iic0.scl.p408" configurationId="iic0.scl"/>
|
||||
<configSetting altId="iic0.sda.p407" configurationId="iic0.sda"/>
|
||||
<configSetting altId="irq0.irq01.p104" configurationId="irq0.irq01"/>
|
||||
<configSetting altId="irq0.irq03.p004" configurationId="irq0.irq03"/>
|
||||
<configSetting altId="irq0.irq04.p411" configurationId="irq0.irq04"/>
|
||||
<configSetting altId="irq0.irq06.p409" configurationId="irq0.irq06"/>
|
||||
<configSetting altId="irq0.mode.enabled" configurationId="irq0.mode"/>
|
||||
<configSetting altId="p000.adc0.an00" configurationId="p000"/>
|
||||
<configSetting altId="p000.gpio_mode.gpio_mode_an" configurationId="p000.gpio_mode"/>
|
||||
<configSetting altId="p001.adc0.an01" configurationId="p001"/>
|
||||
<configSetting altId="p001.gpio_mode.gpio_mode_an" configurationId="p001.gpio_mode"/>
|
||||
<configSetting altId="p002.adc0.an02" configurationId="p002"/>
|
||||
<configSetting altId="p002.gpio_mode.gpio_mode_an" configurationId="p002.gpio_mode"/>
|
||||
<configSetting altId="p003.adc0.an03" configurationId="p003"/>
|
||||
<configSetting altId="p003.gpio_mode.gpio_mode_an" configurationId="p003.gpio_mode"/>
|
||||
<configSetting altId="p004.irq0.irq03" configurationId="p004"/>
|
||||
<configSetting altId="p004.gpio_irq.gpio_irq_enabled" configurationId="p004.gpio_irq"/>
|
||||
<configSetting altId="p004.gpio_mode.gpio_mode_irq" configurationId="p004.gpio_mode"/>
|
||||
<configSetting altId="p012.ctsu0.cfcts32" configurationId="p012"/>
|
||||
<configSetting altId="p012.gpio_mode.gpio_mode_peripheral" configurationId="p012.gpio_mode"/>
|
||||
<configSetting altId="p013.ctsu0.cfcts33" configurationId="p013"/>
|
||||
<configSetting altId="p013.gpio_mode.gpio_mode_peripheral" configurationId="p013.gpio_mode"/>
|
||||
<configSetting altId="p015.ctsu0.cfcts28" configurationId="p015"/>
|
||||
<configSetting altId="p015.gpio_mode.gpio_mode_peripheral" configurationId="p015.gpio_mode"/>
|
||||
<configSetting altId="p100.sci0.rxd" configurationId="p100"/>
|
||||
<configSetting altId="p100.gpio_mode.gpio_mode_peripheral" configurationId="p100.gpio_mode"/>
|
||||
<configSetting altId="p101.sci0.txd" configurationId="p101"/>
|
||||
<configSetting altId="p101.gpio_mode.gpio_mode_peripheral" configurationId="p101.gpio_mode"/>
|
||||
<configSetting altId="p102.sci0.sck" configurationId="p102"/>
|
||||
<configSetting altId="p102.gpio_mode.gpio_mode_peripheral" configurationId="p102.gpio_mode"/>
|
||||
<configSetting altId="p103.sci0.cts" configurationId="p103"/>
|
||||
<configSetting altId="p103.gpio_mode.gpio_mode_peripheral" configurationId="p103.gpio_mode"/>
|
||||
<configSetting altId="p104.irq0.irq01" configurationId="p104"/>
|
||||
<configSetting altId="p104.gpio_irq.gpio_irq_enabled" configurationId="p104.gpio_irq"/>
|
||||
<configSetting altId="p104.gpio_mode.gpio_mode_irq" configurationId="p104.gpio_mode"/>
|
||||
<configSetting altId="p105.output.low" configurationId="p105"/>
|
||||
<configSetting altId="p105.gpio_mode.gpio_mode_out.low" configurationId="p105.gpio_mode"/>
|
||||
<configSetting altId="p106.output.low" configurationId="p106"/>
|
||||
<configSetting altId="p106.gpio_mode.gpio_mode_out.low" configurationId="p106.gpio_mode"/>
|
||||
<configSetting altId="p107.output.low" configurationId="p107"/>
|
||||
<configSetting altId="p107.gpio_mode.gpio_mode_out.low" configurationId="p107.gpio_mode"/>
|
||||
<configSetting altId="p108.debug0.swdio" configurationId="p108"/>
|
||||
<configSetting altId="p108.gpio_mode.gpio_mode_peripheral" configurationId="p108.gpio_mode"/>
|
||||
<configSetting altId="p109.sci9.txd" configurationId="p109"/>
|
||||
<configSetting altId="p109.gpio_mode.gpio_mode_peripheral" configurationId="p109.gpio_mode"/>
|
||||
<configSetting altId="p110.sci9.rxd" configurationId="p110"/>
|
||||
<configSetting altId="p110.gpio_mode.gpio_mode_peripheral" configurationId="p110.gpio_mode"/>
|
||||
<configSetting altId="p111.output.low" configurationId="p111"/>
|
||||
<configSetting altId="p111.gpio_mode.gpio_mode_out.low" configurationId="p111.gpio_mode"/>
|
||||
<configSetting altId="p112.ctsu0.tscap" configurationId="p112"/>
|
||||
<configSetting altId="p112.gpio_mode.gpio_mode_peripheral" configurationId="p112.gpio_mode"/>
|
||||
<configSetting altId="p113.output.low" configurationId="p113"/>
|
||||
<configSetting altId="p113.gpio_mode.gpio_mode_out.low" configurationId="p113.gpio_mode"/>
|
||||
<configSetting altId="p207.output.low" configurationId="p207"/>
|
||||
<configSetting altId="p207.gpio_mode.gpio_mode_out.low" configurationId="p207.gpio_mode"/>
|
||||
<configSetting altId="p208.output.low" configurationId="p208"/>
|
||||
<configSetting altId="p208.gpio_mode.gpio_mode_out.low" configurationId="p208.gpio_mode"/>
|
||||
<configSetting altId="p300.debug0.swclk" configurationId="p300"/>
|
||||
<configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
|
||||
<configSetting altId="p301.sci2.scl" configurationId="p301"/>
|
||||
<configSetting altId="p301.gpio_mode.gpio_mode_peripheral" configurationId="p301.gpio_mode"/>
|
||||
<configSetting altId="p301.gpio_otype.gpio_otype_n_ch_od" configurationId="p301.gpio_otype"/>
|
||||
<configSetting altId="p302.sci2.sda" configurationId="p302"/>
|
||||
<configSetting altId="p302.gpio_mode.gpio_mode_peripheral" configurationId="p302.gpio_mode"/>
|
||||
<configSetting altId="p302.gpio_otype.gpio_otype_n_ch_od" configurationId="p302.gpio_otype"/>
|
||||
<configSetting altId="p303.output.low" configurationId="p303"/>
|
||||
<configSetting altId="p303.gpio_mode.gpio_mode_out.low" configurationId="p303.gpio_mode"/>
|
||||
<configSetting altId="p304.output.low" configurationId="p304"/>
|
||||
<configSetting altId="p304.gpio_mode.gpio_mode_out.low" configurationId="p304.gpio_mode"/>
|
||||
<configSetting altId="p400.sci1.sck" configurationId="p400"/>
|
||||
<configSetting altId="p400.gpio_mode.gpio_mode_peripheral" configurationId="p400.gpio_mode"/>
|
||||
<configSetting altId="p401.sci1.txd" configurationId="p401"/>
|
||||
<configSetting altId="p401.gpio_mode.gpio_mode_peripheral" configurationId="p401.gpio_mode"/>
|
||||
<configSetting altId="p402.sci1.rxd" configurationId="p402"/>
|
||||
<configSetting altId="p402.gpio_mode.gpio_mode_peripheral" configurationId="p402.gpio_mode"/>
|
||||
<configSetting altId="p403.sci1.cts" configurationId="p403"/>
|
||||
<configSetting altId="p403.gpio_mode.gpio_mode_peripheral" configurationId="p403.gpio_mode"/>
|
||||
<configSetting altId="p407.iic0.sda" configurationId="p407"/>
|
||||
<configSetting altId="p407.gpio_mode.gpio_mode_peripheral" configurationId="p407.gpio_mode"/>
|
||||
<configSetting altId="p408.iic0.scl" configurationId="p408"/>
|
||||
<configSetting altId="p408.gpio_mode.gpio_mode_peripheral" configurationId="p408.gpio_mode"/>
|
||||
<configSetting altId="p409.irq0.irq06" configurationId="p409"/>
|
||||
<configSetting altId="p409.gpio_irq.gpio_irq_enabled" configurationId="p409.gpio_irq"/>
|
||||
<configSetting altId="p409.gpio_mode.gpio_mode_irq" configurationId="p409.gpio_mode"/>
|
||||
<configSetting altId="p410.output.low" configurationId="p410"/>
|
||||
<configSetting altId="p410.gpio_mode.gpio_mode_out.low" configurationId="p410.gpio_mode"/>
|
||||
<configSetting altId="p411.irq0.irq04" configurationId="p411"/>
|
||||
<configSetting altId="p411.gpio_irq.gpio_irq_enabled" configurationId="p411.gpio_irq"/>
|
||||
<configSetting altId="p411.gpio_mode.gpio_mode_irq" configurationId="p411.gpio_mode"/>
|
||||
<configSetting altId="p501.output.low" configurationId="p501"/>
|
||||
<configSetting altId="p501.gpio_mode.gpio_mode_out.low" configurationId="p501.gpio_mode"/>
|
||||
<configSetting altId="p502.output.low" configurationId="p502"/>
|
||||
<configSetting altId="p502.gpio_mode.gpio_mode_out.low" configurationId="p502.gpio_mode"/>
|
||||
<configSetting altId="sci0.cts.p103" configurationId="sci0.cts"/>
|
||||
<configSetting altId="sci0.mode.spi.free" configurationId="sci0.mode"/>
|
||||
<configSetting altId="sci0.rxd.p100" configurationId="sci0.rxd"/>
|
||||
<configSetting altId="sci0.sck.p102" configurationId="sci0.sck"/>
|
||||
<configSetting altId="sci0.txd.p101" configurationId="sci0.txd"/>
|
||||
<configSetting altId="sci1.cts.p403" configurationId="sci1.cts"/>
|
||||
<configSetting altId="sci1.mode.spi.free" configurationId="sci1.mode"/>
|
||||
<configSetting altId="sci1.rxd.p402" configurationId="sci1.rxd"/>
|
||||
<configSetting altId="sci1.sck.p400" configurationId="sci1.sck"/>
|
||||
<configSetting altId="sci1.txd.p401" configurationId="sci1.txd"/>
|
||||
<configSetting altId="sci2.mode.iic.free" configurationId="sci2.mode"/>
|
||||
<configSetting altId="sci2.scl.p301" configurationId="sci2.scl"/>
|
||||
<configSetting altId="sci2.sda.p302" configurationId="sci2.sda"/>
|
||||
<configSetting altId="sci9.mode.asynchronous.free" configurationId="sci9.mode"/>
|
||||
<configSetting altId="sci9.rxd.p110" configurationId="sci9.rxd"/>
|
||||
<configSetting altId="sci9.txd.p109" configurationId="sci9.txd"/>
|
||||
</pincfg>
|
||||
<pincfg active="false" name="R7FA2L1AB2DFM.pincfg" selected="false" symbol="">
|
||||
<configSetting altId="debug0.mode.swd" configurationId="debug0.mode"/>
|
||||
<configSetting altId="debug0.swclk.p300" configurationId="debug0.swclk"/>
|
||||
<configSetting altId="debug0.swdio.p108" configurationId="debug0.swdio"/>
|
||||
<configSetting altId="p108.debug0.swdio" configurationId="p108"/>
|
||||
<configSetting altId="p108.gpio_mode.gpio_mode_peripheral" configurationId="p108.gpio_mode"/>
|
||||
<configSetting altId="p300.debug0.swclk" configurationId="p300"/>
|
||||
<configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
|
||||
</pincfg>
|
||||
</raPinConfiguration>
|
||||
</raConfiguration>
|
||||
324
bsp/renesas/ra2l1-cpk/docs/LPM低功耗配置说明.md
Normal file
324
bsp/renesas/ra2l1-cpk/docs/LPM低功耗配置说明.md
Normal file
@@ -0,0 +1,324 @@
|
||||
# LPM低功耗配置说明
|
||||
|
||||
## 基础知识
|
||||
|
||||
低功耗的本质是系统空闲时 CPU 停止工作，中断或事件唤醒后继续工作。在 RTOS 中，通常包含一个 IDLE 任务，该任务的优先级最低且一直保持就绪状态，当高优先级任务未就绪时，OS 执行 IDLE 任务。一般地，未进行低功耗处理时，CPU 在 IDLE 任务中循环执行空指令。RT-Thread 的电源管理组件在 IDLE 任务中，通过对 CPU 、时钟和设备等进行管理，从而有效降低系统的功耗。
|
||||
|
||||
|
||||
|
||||
在上图所示，当高优先级任务运行结束或被挂起时，系统将进入 IDLE 任务中。在 IDLE 任务执行后，它将判断系统是否可以进入到休眠状态（以节省功耗）。如果可以进入休眠， 将根据芯片情况关闭部分硬件模块，OS Tick 也非常有可能进入暂停状态。此时电源管理框架会根据系统定时器情况，计算出下一个超时时间点，并设置低功耗定时器，让设备能够在这个时刻点唤醒，并进行后续的工作。当系统被（低功耗定时器中断或其他唤醒中断源）唤醒后，系统也需要知道睡眠时间长度是多少，并对OS Tick 进行补偿，让系统的OS tick值调整为一个正确的值。
|
||||
|
||||
### [PM组件](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/pm/pm)
|
||||
|
||||
PM组件是RT-Thread系统中针对电源管理而设计的基础功能组件， 组件采用分层设计思想，分离架构和芯片相关的部分，提取公共部分作为核心。支持多种运行模式和休眠模式的管理切换，以及低功耗定时器的管理。
|
||||
|
||||
PM 组件有以下特点：
|
||||
|
||||
- PM 组件是基于模式来管理功耗
|
||||
- PM 组件可以根据模式自动更新设备的频率配置，确保在不同的运行模式都可以正常工作
|
||||
- PM 组件可以根据模式自动管理设备的挂起和恢复，确保在不同的休眠模式下可以正确的挂起和恢复
|
||||
- PM 组件支持可选的休眠时间补偿，让依赖 OS Tick 的应用可以透明使用
|
||||
- PM 组件向上层提供设备接口，如果使用了设备文件系统组件，那么也可以用文件系统接口来访问
|
||||
|
||||
PM组件支持的休眠模式有：
|
||||
|
||||
| 模式 | 描述 |
|
||||
| -------------------- | ---------------------------------- |
|
||||
| PM_SLEEP_MODE_NONE | 系统处于活跃状态，未采取任何的降低功耗状态 |
|
||||
| PM_SLEEP_MODE_IDLE | **空闲模式**，该模式在系统空闲时停止 CPU 和部分时钟，任意事件或中断均可以唤醒 |
|
||||
| PM_SLEEP_MODE_LIGHT | **轻度睡眠模式**，CPU 停止，多数时钟和外设停止，唤醒后需要进行时间补偿 |
|
||||
| PM_SLEEP_MODE_DEEP | **深度睡眠模式**，CPU 停止，仅少数低功耗外设工作，可被特殊中断唤醒 |
|
||||
| PM_SLEEP_MODE_STANDBY | **待机模式**，CPU 停止，设备上下文丢失(可保存至特殊外设)，唤醒后通常复位 |
|
||||
| PM_SLEEP_MODE_SHUTDOWN | **关断模式**，比 Standby 模式功耗更低， 上下文通常不可恢复， 唤醒后复位 |
|
||||
|
||||
### RA系列LPM功能
|
||||
|
||||
RA2 MCU支持的LPM类型有:
|
||||
|
||||
- Sleep mode
|
||||
- Software Standby mode
|
||||
- Snooze mode
|
||||
|
||||
| 休眠模式 | 描述 |
|
||||
| ----------------------- | ------------------------------------------------------------ |
|
||||
| LPM_MODE_SLEEP | **睡眠模式**，CPU停止工作，但其内部寄存器的内容被保留。其他外围功能在单片机中不停止。休眠模式下可用的复位或中断会导致MCU取消休眠模式。在这种模式下，所有的中断源都可用来取消Sleep模式。 |
|
||||
| LPM_MODE_STANDBY | **软件待机模式**，CPU、大部分片上外设功能和振荡器停止运行。但是，CPU内部寄存器的内容和SRAM数据、芯片上外围功能的状态和I/O端口状态都被保留。软件待机模式可以显著降低功耗，因为大多数振荡器在这种模式下停止。 |
|
||||
| LPM_MODE_STANDBY_SNOOZE | **小睡模式**，是软件待机模式的扩展，在这种模式下，有限的外设模块可以在不唤醒CPU的情况下运行。通过配置中断源，可以通过软件待机模式进入小睡模式。类似地，系统可以通过snooze模式支持的中断从snooze模式中唤醒。 |
|
||||
|
||||
低功耗模式转换和触发源如图所示。
|
||||
|
||||
|
||||
|
||||
不同模式间的切换如图所示，从图中也可以看出三种模式的功耗关系是Sleep>Snooze>Standby。
|
||||
|
||||
RA2芯片的休眠模式对应PM组件的模式关系：
|
||||
|
||||
| RA2芯片 | PM组件 |
|
||||
| ----------------------- | --------------------- |
|
||||
| LPM_MODE_SLEEP | PM_SLEEP_MODE_IDLE |
|
||||
| LPM_MODE_STANDBY | PM_SLEEP_MODE_DEEP |
|
||||
| LPM_MODE_STANDBY_SNOOZE | PM_SLEEP_MODE_STANDBY |
|
||||
|
||||
|
||||
## 配置LPM功能
|
||||
|
||||
要使用RA2系列芯片的LPM功能，需要进入bsp\renesas\ra2l1-cpk目录。
|
||||
|
||||
- 在menuconfig中使能LPM驱动，并勾选要开启的休眠模式，然后保存配置，生成MDK5工程。
|
||||
|
||||
|
||||
|
||||
- 打开PM组件和驱动后，需要增加idle的线程栈大小，可改为1024。
|
||||
|
||||
|
||||
|
||||
- 打开生成的MDK5工程project.uvprojx，然后打开FSP配置工具添加LPM相关配置。下图是需要添加的stack，包括三种LPM模式的配置以及低功耗定时器AGT1。
|
||||
|
||||
|
||||
|
||||
- 创建LPM如下图所示新建r_lpm，**需要根据使用的模式进行配置且不同模式要创建不同的r_lpm**。下面将分别介绍三种不同模式的配置，创建步骤就不再赘述。
|
||||
|
||||
|
||||
|
||||
### Sleep mode休眠模式
|
||||
|
||||
创建出r_lpm后需要修改Name和Low Power Mode这两个配置项。Name需要改为g_lpm_sleep，因为在驱动文件中已经定义了sleep模式对应的stack名称。Low Power Mode选择Sleep mode即可。
|
||||
|
||||
|
||||
|
||||
### Standby mode软件待机模式
|
||||
|
||||
Name需要改为g_lpm_sw_standby。Low Power Mode选择Software Standby mode即可。
|
||||
|
||||
另外在此模式下还需要配置唤醒MCU的中断源，因为会使用到AGT1做为低功耗定时器所以AGT1的中断需要勾选。如果在应用中还需要其他中断源在此模式下唤醒MCU，则勾选对应选项即可。
|
||||
|
||||
|
||||
|
||||
### Snooze mode小睡模式
|
||||
|
||||
Name需要改为g_lpm_sw_standby_with_snooze。Low Power Mode选择Snooze mode即可。
|
||||
|
||||
另外在此模式下同样要配置唤醒MCU的中断源，因为会使用到AGT1做为低功耗定时器所以AGT1的中断需要勾选。如果在应用中还需要其他中断源在此模式下唤醒MCU，则勾选对应选项即可。
|
||||
|
||||
|
||||
|
||||
### AGT1低功耗定时器
|
||||
|
||||
在驱动中使用了MCU的AGT1做为PM组件的低功耗定时器，用于在休眠状态下的系统时钟补偿。
|
||||
|
||||
|
||||
|
||||
完成上述配置步骤就已经把LPM低功耗模式的相关配置做完了。然后再根据应用要实现的功能配置其他外设。
|
||||
|
||||
|
||||
## 低功耗DEMO
|
||||
|
||||
上文介绍了在RT-Thread的RA2L1上怎么配置LPM的不同模式，接下来就用一个小DEMO来验证下MCU在各种模式下的工作情况。
|
||||
|
||||
低功耗DEMO要实现的功能是，在CPK-RA2L1开发板上用S1按钮切换不同的低功耗模式，并在msh中打印出模式切换的提示信息。要实现这个功能需要在刚才的基础上添加一个低功耗的唤醒源。
|
||||
|
||||
### 添加配置
|
||||
|
||||
- 创建IRQ中断，IRQ中断选择通道3，详细配置如下。
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
- 在刚才的Snooze和Standby模式的配置里添加IRQ3的唤醒源
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
- 然后保存并生成配置代码。
|
||||
|
||||
### 添加测试代码
|
||||
|
||||
```c
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef BSP_USING_LPM
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#include <drivers/pm.h>
|
||||
|
||||
#define WAKEUP_APP_THREAD_STACK_SIZE 512
|
||||
#define WAKEUP_APP__THREAD_PRIORITY RT_THREAD_PRIORITY_MAX / 3
|
||||
#define WAKEUP_EVENT_BUTTON (1 << 0)
|
||||
|
||||
static rt_event_t wakeup_event;
|
||||
|
||||
#define USER_INPUT "P004"
|
||||
#define LED2_PIN "P501" /* Onboard LED pins */
|
||||
|
||||
void rt_lptimer_init(rt_lptimer_t timer,
|
||||
const char *name,
|
||||
void (*timeout)(void *parameter),
|
||||
void *parameter,
|
||||
rt_tick_t time,
|
||||
rt_uint8_t flag);
|
||||
|
||||
rt_err_t rt_lptimer_detach(rt_lptimer_t timer);
|
||||
rt_err_t rt_lptimer_start(rt_lptimer_t timer);
|
||||
rt_err_t rt_lptimer_stop(rt_lptimer_t timer);
|
||||
|
||||
rt_err_t rt_lptimer_control(rt_lptimer_t timer, int cmd, void *arg);
|
||||
|
||||
static struct rt_lptimer lptimer;
|
||||
|
||||
static void timeout_cb(void *parameter)
|
||||
{
|
||||
rt_interrupt_enter();
|
||||
rt_kprintf("\n lptimer callback \n");
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
static void lptimer_init(void)
|
||||
{
|
||||
rt_lptimer_init(&lptimer,
|
||||
"lpm",
|
||||
timeout_cb,
|
||||
(void*)&wakeup_event,
|
||||
1000,
|
||||
RT_TIMER_FLAG_PERIODIC);
|
||||
}
|
||||
|
||||
static void lptimer_stop(void)
|
||||
{
|
||||
rt_lptimer_stop(&lptimer);
|
||||
}
|
||||
|
||||
static void lptimer_start(void)
|
||||
{
|
||||
rt_lptimer_start(&lptimer);
|
||||
}
|
||||
|
||||
static void led_app(void)
|
||||
{
|
||||
static uint8_t key_status = 0x00;
|
||||
rt_uint32_t led2_pin = rt_pin_get(LED2_PIN);
|
||||
|
||||
rt_pin_write(led2_pin, PIN_HIGH);
|
||||
switch(key_status%4)
|
||||
{
|
||||
case 0:/* IDLE */
|
||||
lptimer_stop();
|
||||
rt_pm_release(PM_SLEEP_MODE_NONE);
|
||||
rt_kprintf("\trequest:IDLE\n");
|
||||
rt_pm_request(PM_SLEEP_MODE_IDLE);
|
||||
break;
|
||||
case 1:/* DEEP */
|
||||
lptimer_stop();
|
||||
lptimer_start();
|
||||
rt_pm_release(PM_SLEEP_MODE_IDLE);
|
||||
rt_kprintf("\trequest:DEEP\n");
|
||||
rt_pm_request(PM_SLEEP_MODE_DEEP);
|
||||
break;
|
||||
case 2:/* STANDBY */
|
||||
lptimer_stop();
|
||||
lptimer_start();
|
||||
rt_pm_release(PM_SLEEP_MODE_DEEP);
|
||||
rt_kprintf("\trequest:STANDBY\n");
|
||||
rt_pm_request(PM_SLEEP_MODE_STANDBY);
|
||||
break;
|
||||
case 3:/* NONE */
|
||||
lptimer_stop();
|
||||
rt_pm_release(PM_SLEEP_MODE_STANDBY);
|
||||
rt_kprintf("\trequest:NONE\n");
|
||||
rt_pm_request(PM_SLEEP_MODE_NONE);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
key_status++;
|
||||
rt_pin_write(led2_pin, PIN_LOW);
|
||||
}
|
||||
|
||||
static void wakeup_callback(void* p)
|
||||
{
|
||||
rt_event_send(wakeup_event, WAKEUP_EVENT_BUTTON);
|
||||
}
|
||||
|
||||
void wakeup_sample(void)
|
||||
{
|
||||
/* init */
|
||||
rt_uint32_t pin = rt_pin_get(USER_INPUT);
|
||||
rt_kprintf("\n pin number : 0x%04X \n", pin);
|
||||
rt_err_t err = rt_pin_attach_irq(pin, PIN_IRQ_MODE_RISING, wakeup_callback, RT_NULL);
|
||||
if (RT_EOK != err)
|
||||
{
|
||||
rt_kprintf("\n attach irq failed. \n");
|
||||
}
|
||||
err = rt_pin_irq_enable(pin, PIN_IRQ_ENABLE);
|
||||
if (RT_EOK != err)
|
||||
{
|
||||
rt_kprintf("\n enable irq failed. \n");
|
||||
}
|
||||
}
|
||||
|
||||
static void wakeup_init(void)
|
||||
{
|
||||
wakeup_event = rt_event_create("wakup", RT_IPC_FLAG_FIFO);
|
||||
RT_ASSERT(wakeup_event != RT_NULL);
|
||||
wakeup_sample();
|
||||
}
|
||||
|
||||
static void pm_mode_init(void)
|
||||
{
|
||||
rt_pm_release_all(RT_PM_DEFAULT_SLEEP_MODE);
|
||||
rt_pm_request(PM_SLEEP_MODE_NONE);
|
||||
}
|
||||
|
||||
void pm_test_entry(void* para)
|
||||
{
|
||||
/* 唤醒回调函数初始化 */
|
||||
wakeup_init();
|
||||
|
||||
/* 电源管理初始化 */
|
||||
pm_mode_init();
|
||||
|
||||
lptimer_init();
|
||||
|
||||
while (1)
|
||||
{
|
||||
/* 等待唤醒事件 */
|
||||
if (rt_event_recv(wakeup_event,
|
||||
WAKEUP_EVENT_BUTTON,
|
||||
RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR,
|
||||
RT_WAITING_FOREVER, RT_NULL) == RT_EOK)
|
||||
{
|
||||
led_app();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int pm_test(void)
|
||||
{
|
||||
|
||||
rt_thread_t tid = rt_thread_create(
|
||||
"pmtest",pm_test_entry,RT_NULL,512,10,10);
|
||||
if(tid)
|
||||
rt_thread_startup(tid);
|
||||
|
||||
return 0;
|
||||
}
|
||||
MSH_CMD_EXPORT(pm_test, pm_test);
|
||||
// INIT_APP_EXPORT(pm_test);
|
||||
#endif
|
||||
```
|
||||
|
||||
将DEMO代码加入到工程中，可以直接添加到hal_entry.c或新建一个源文件。
|
||||
|
||||
|
||||
### 测试验证
|
||||
|
||||
然后编译下载。开发板连接串口工具，输入`pm_test`命令启动测试DEMO。
|
||||
|
||||
按下S1按钮切换工作模式，在DEEP、STANDBY模式下会启动低功耗定时器，当定时唤醒后会打印出回调接口的提示信息。
|
||||
|
||||
|
||||
|
||||
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 4.8 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash1.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash1.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 9.7 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash2.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash2.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 3.9 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash3.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/jflash3.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 21 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 24 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config1.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config1.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 32 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config2.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config2.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 36 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config3.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config3.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 28 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config4.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config4.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 51 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config5.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config5.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 45 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config6.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_config6.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 42 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo1.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo1.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 31 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo2.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo2.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 15 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo3.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo3.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 25 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo4.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo4.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 38 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo5.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo5.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 34 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo6.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_demo6.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 18 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_mode.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/lpm_mode.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 221 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/pm_ostick.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/pm_ostick.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 11 KiB |
BIN
bsp/renesas/ra2l1-cpk/docs/picture/ra2l1-cpk.png
Normal file
BIN
bsp/renesas/ra2l1-cpk/docs/picture/ra2l1-cpk.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 77 KiB |
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user