mirror of
https://github.com/RT-Thread/rt-thread.git
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format link scripts
This commit is contained in:
Meco Man
committed by
Man, Jianting (Meco)
Man, Jianting (Meco)
parent
9bc68d26a4
commit
592284c66c
@@ -1,22 +1,22 @@
|
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; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
; load region size_region
|
||||
LR_IROM1 (0) (1024 * 128)
|
||||
{
|
||||
; load address = execution address
|
||||
ER_IROM1 (0) (1024 * 128)
|
||||
{
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; RW data
|
||||
RW_IRAM1 0x20000000 (1024 * 48)
|
||||
{
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
; load region size_region
|
||||
LR_IROM1 (0) (1024 * 128)
|
||||
{
|
||||
; load address = execution address
|
||||
ER_IROM1 (0) (1024 * 128)
|
||||
{
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; RW data
|
||||
RW_IRAM1 0x20000000 (1024 * 48)
|
||||
{
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,247 +1,247 @@
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||||
/*******************************************************************************
|
||||
* \file cy8c6xxa_cm4_dual.icf
|
||||
* \version 2.91
|
||||
*
|
||||
* Linker file for the IAR compiler.
|
||||
*
|
||||
* The main purpose of the linker script is to describe how the sections in the
|
||||
* input files should be mapped into the output file, and to control the memory
|
||||
* layout of the output file.
|
||||
*
|
||||
* \note The entry point is fixed and starts at 0x10000000. The valid application
|
||||
* image should be placed there.
|
||||
*
|
||||
* \note The linker files included with the PDL template projects must be generic
|
||||
* and handle all common use cases. Your project may not use every section
|
||||
* defined in the linker files. In that case you may see warnings during the
|
||||
* build process. In your project, you can simply comment out or remove the
|
||||
* relevant code in the linker file.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2021 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
|
||||
/* The symbols below define the location and size of blocks of memory in the target.
|
||||
* Use these symbols to specify the memory regions available for allocation.
|
||||
*/
|
||||
|
||||
/* The following symbols control RAM and flash memory allocation for the CM4 core.
|
||||
* You can change the memory allocation by editing RAM and Flash symbols.
|
||||
* Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
|
||||
* Using this memory region for other purposes will lead to unexpected behavior.
|
||||
* Your changes must be aligned with the corresponding symbols for CM0+ core in 'xx_cm0plus.icf',
|
||||
* where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'.
|
||||
*/
|
||||
/* RAM */
|
||||
define symbol __ICFEDIT_region_IRAM1_start__ = 0x08002000;
|
||||
define symbol __ICFEDIT_region_IRAM1_end__ = 0x080FF7FF;
|
||||
|
||||
/* Flash */
|
||||
define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_IROM1_end__ = 0x101FFFFF;
|
||||
|
||||
/* The following symbols define a 32K flash region used for EEPROM emulation.
|
||||
* This region can also be used as the general purpose flash.
|
||||
* You can assign sections to this memory region for only one of the cores.
|
||||
* Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
|
||||
* Therefore, repurposing this memory region will prevent such middleware from operation.
|
||||
*/
|
||||
define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000;
|
||||
define symbol __ICFEDIT_region_IROM2_end__ = 0x14007FFF;
|
||||
|
||||
/* The following symbols define device specific memory regions and must not be changed. */
|
||||
/* Supervisory FLASH - User Data */
|
||||
define symbol __ICFEDIT_region_IROM3_start__ = 0x16000800;
|
||||
define symbol __ICFEDIT_region_IROM3_end__ = 0x16000FFF;
|
||||
|
||||
/* Supervisory FLASH - Normal Access Restrictions (NAR) */
|
||||
define symbol __ICFEDIT_region_IROM4_start__ = 0x16001A00;
|
||||
define symbol __ICFEDIT_region_IROM4_end__ = 0x16001BFF;
|
||||
|
||||
/* Supervisory FLASH - Public Key */
|
||||
define symbol __ICFEDIT_region_IROM5_start__ = 0x16005A00;
|
||||
define symbol __ICFEDIT_region_IROM5_end__ = 0x160065FF;
|
||||
|
||||
/* Supervisory FLASH - Table of Content # 2 */
|
||||
define symbol __ICFEDIT_region_IROM6_start__ = 0x16007C00;
|
||||
define symbol __ICFEDIT_region_IROM6_end__ = 0x16007DFF;
|
||||
|
||||
/* Supervisory FLASH - Table of Content # 2 Copy */
|
||||
define symbol __ICFEDIT_region_IROM7_start__ = 0x16007E00;
|
||||
define symbol __ICFEDIT_region_IROM7_end__ = 0x16007FFF;
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||||
|
||||
/* eFuse */
|
||||
define symbol __ICFEDIT_region_IROM8_start__ = 0x90700000;
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||||
define symbol __ICFEDIT_region_IROM8_end__ = 0x907FFFFF;
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||||
|
||||
/* XIP */
|
||||
define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000;
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||||
define symbol __ICFEDIT_region_EROM1_end__ = 0x1FFFFFFF;
|
||||
|
||||
define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_EROM3_end__ = 0x0;
|
||||
|
||||
|
||||
define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
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||||
define symbol __ICFEDIT_region_IRAM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
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||||
define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
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||||
define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
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||||
define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
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||||
/*-Sizes-*/
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||||
if (!isdefinedsymbol(__STACK_SIZE)) {
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define symbol __ICFEDIT_size_cstack__ = 0x1000;
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||||
} else {
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define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
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||||
}
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||||
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
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||||
|
||||
/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
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||||
if (!isdefinedsymbol(__HEAP_SIZE)) {
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||||
define symbol __ICFEDIT_size_heap__ = 0x0400;
|
||||
} else {
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||||
define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
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||||
}
|
||||
/**** End of ICF editor section. ###ICF###*/
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||||
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||||
/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
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||||
* More about CM0+ prebuilt images, see here:
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* https://github.com/cypresssemiconductorco/psoc6cm0p
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||||
*/
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/* The size of the Cortex-M0+ application image */
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||||
define symbol FLASH_CM0P_SIZE = 0x2000;
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define memory mem with size = 4G;
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||||
define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__];
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define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
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define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__];
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define region IROM4_region = mem:[from __ICFEDIT_region_IROM4_start__ to __ICFEDIT_region_IROM4_end__];
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define region IROM5_region = mem:[from __ICFEDIT_region_IROM5_start__ to __ICFEDIT_region_IROM5_end__];
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define region IROM6_region = mem:[from __ICFEDIT_region_IROM6_start__ to __ICFEDIT_region_IROM6_end__];
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||||
define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFEDIT_region_IROM7_end__];
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define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__];
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define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
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define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
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||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
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define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
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define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
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define block CM0P_RO with size = FLASH_CM0P_SIZE { readonly section .cy_m0p_image };
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define block RO {first section .intvec, readonly};
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define block cy_xip { section .cy_xip };
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/*-Initializations-*/
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initialize by copy { readwrite };
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do not initialize { section .noinit, section .intvec_ram };
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/*-Placement-*/
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/* Flash - Cortex-M0+ application image */
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place at start of IROM1_region { block CM0P_RO };
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/* Flash - Cortex-M4 application */
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place in IROM1_region { block RO };
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||||
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||||
/* Used for the digital signature of the secure application and the Bootloader SDK application. */
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||||
".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature };
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||||
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||||
/* Emulated EEPROM Flash area */
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".cy_em_eeprom" : place at start of IROM2_region { section .cy_em_eeprom };
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/* Supervisory Flash - User Data */
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".cy_sflash_user_data" : place at start of IROM3_region { section .cy_sflash_user_data };
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/* Supervisory Flash - NAR */
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".cy_sflash_nar" : place at start of IROM4_region { section .cy_sflash_nar };
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/* Supervisory Flash - Public Key */
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".cy_sflash_public_key" : place at start of IROM5_region { section .cy_sflash_public_key };
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||||
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||||
/* Supervisory Flash - TOC2 */
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".cy_toc_part2" : place at start of IROM6_region { section .cy_toc_part2 };
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||||
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/* Supervisory Flash - RTOC2 */
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||||
".cy_rtoc_part2" : place at start of IROM7_region { section .cy_rtoc_part2 };
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/* eFuse */
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".cy_efuse" : place at start of IROM8_region { section .cy_efuse };
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||||
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/* Execute in Place (XIP). See the smif driver documentation for details. */
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"cy_xip" : place at start of EROM1_region { block cy_xip };
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/* RAM */
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place at start of IRAM1_region { readwrite section .intvec_ram};
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place in IRAM1_region { readwrite };
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place at end of IRAM1_region { block HSTACK };
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/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
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".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
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keep { section .cy_m0p_image,
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section .cy_app_signature,
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section .cy_em_eeprom,
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section .cy_sflash_user_data,
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section .cy_sflash_nar,
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section .cy_sflash_public_key,
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section .cy_toc_part2,
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section .cy_rtoc_part2,
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section .cy_efuse,
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section .cy_xip,
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section .cymeta,
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};
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/* The following symbols used by the cymcuelftool. */
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/* Flash */
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define exported symbol __cy_memory_0_start = 0x10000000;
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||||
define exported symbol __cy_memory_0_length = 0x00200000;
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define exported symbol __cy_memory_0_row_size = 0x200;
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||||
|
||||
/* Emulated EEPROM Flash area */
|
||||
define exported symbol __cy_memory_1_start = 0x14000000;
|
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define exported symbol __cy_memory_1_length = 0x8000;
|
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define exported symbol __cy_memory_1_row_size = 0x200;
|
||||
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/* Supervisory Flash */
|
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define exported symbol __cy_memory_2_start = 0x16000000;
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define exported symbol __cy_memory_2_length = 0x8000;
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define exported symbol __cy_memory_2_row_size = 0x200;
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/* XIP */
|
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define exported symbol __cy_memory_3_start = 0x18000000;
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define exported symbol __cy_memory_3_length = 0x08000000;
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define exported symbol __cy_memory_3_row_size = 0x200;
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/* eFuse */
|
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define exported symbol __cy_memory_4_start = 0x90700000;
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define exported symbol __cy_memory_4_length = 0x100000;
|
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define exported symbol __cy_memory_4_row_size = 1;
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||||
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/* EOF */
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||||
/*******************************************************************************
|
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* \file cy8c6xxa_cm4_dual.icf
|
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* \version 2.91
|
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*
|
||||
* Linker file for the IAR compiler.
|
||||
*
|
||||
* The main purpose of the linker script is to describe how the sections in the
|
||||
* input files should be mapped into the output file, and to control the memory
|
||||
* layout of the output file.
|
||||
*
|
||||
* \note The entry point is fixed and starts at 0x10000000. The valid application
|
||||
* image should be placed there.
|
||||
*
|
||||
* \note The linker files included with the PDL template projects must be generic
|
||||
* and handle all common use cases. Your project may not use every section
|
||||
* defined in the linker files. In that case you may see warnings during the
|
||||
* build process. In your project, you can simply comment out or remove the
|
||||
* relevant code in the linker file.
|
||||
*
|
||||
********************************************************************************
|
||||
* \copyright
|
||||
* Copyright 2016-2021 Cypress Semiconductor Corporation
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*******************************************************************************/
|
||||
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
|
||||
|
||||
/* The symbols below define the location and size of blocks of memory in the target.
|
||||
* Use these symbols to specify the memory regions available for allocation.
|
||||
*/
|
||||
|
||||
/* The following symbols control RAM and flash memory allocation for the CM4 core.
|
||||
* You can change the memory allocation by editing RAM and Flash symbols.
|
||||
* Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
|
||||
* Using this memory region for other purposes will lead to unexpected behavior.
|
||||
* Your changes must be aligned with the corresponding symbols for CM0+ core in 'xx_cm0plus.icf',
|
||||
* where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'.
|
||||
*/
|
||||
/* RAM */
|
||||
define symbol __ICFEDIT_region_IRAM1_start__ = 0x08002000;
|
||||
define symbol __ICFEDIT_region_IRAM1_end__ = 0x080FF7FF;
|
||||
|
||||
/* Flash */
|
||||
define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_IROM1_end__ = 0x101FFFFF;
|
||||
|
||||
/* The following symbols define a 32K flash region used for EEPROM emulation.
|
||||
* This region can also be used as the general purpose flash.
|
||||
* You can assign sections to this memory region for only one of the cores.
|
||||
* Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
|
||||
* Therefore, repurposing this memory region will prevent such middleware from operation.
|
||||
*/
|
||||
define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000;
|
||||
define symbol __ICFEDIT_region_IROM2_end__ = 0x14007FFF;
|
||||
|
||||
/* The following symbols define device specific memory regions and must not be changed. */
|
||||
/* Supervisory FLASH - User Data */
|
||||
define symbol __ICFEDIT_region_IROM3_start__ = 0x16000800;
|
||||
define symbol __ICFEDIT_region_IROM3_end__ = 0x16000FFF;
|
||||
|
||||
/* Supervisory FLASH - Normal Access Restrictions (NAR) */
|
||||
define symbol __ICFEDIT_region_IROM4_start__ = 0x16001A00;
|
||||
define symbol __ICFEDIT_region_IROM4_end__ = 0x16001BFF;
|
||||
|
||||
/* Supervisory FLASH - Public Key */
|
||||
define symbol __ICFEDIT_region_IROM5_start__ = 0x16005A00;
|
||||
define symbol __ICFEDIT_region_IROM5_end__ = 0x160065FF;
|
||||
|
||||
/* Supervisory FLASH - Table of Content # 2 */
|
||||
define symbol __ICFEDIT_region_IROM6_start__ = 0x16007C00;
|
||||
define symbol __ICFEDIT_region_IROM6_end__ = 0x16007DFF;
|
||||
|
||||
/* Supervisory FLASH - Table of Content # 2 Copy */
|
||||
define symbol __ICFEDIT_region_IROM7_start__ = 0x16007E00;
|
||||
define symbol __ICFEDIT_region_IROM7_end__ = 0x16007FFF;
|
||||
|
||||
/* eFuse */
|
||||
define symbol __ICFEDIT_region_IROM8_start__ = 0x90700000;
|
||||
define symbol __ICFEDIT_region_IROM8_end__ = 0x907FFFFF;
|
||||
|
||||
/* XIP */
|
||||
define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000;
|
||||
define symbol __ICFEDIT_region_EROM1_end__ = 0x1FFFFFFF;
|
||||
|
||||
define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_EROM3_end__ = 0x0;
|
||||
|
||||
|
||||
define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_IRAM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
|
||||
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
|
||||
/*-Sizes-*/
|
||||
if (!isdefinedsymbol(__STACK_SIZE)) {
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x1000;
|
||||
} else {
|
||||
define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
|
||||
}
|
||||
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
|
||||
|
||||
/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
|
||||
if (!isdefinedsymbol(__HEAP_SIZE)) {
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0400;
|
||||
} else {
|
||||
define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
|
||||
}
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
|
||||
* More about CM0+ prebuilt images, see here:
|
||||
* https://github.com/cypresssemiconductorco/psoc6cm0p
|
||||
*/
|
||||
/* The size of the Cortex-M0+ application image */
|
||||
define symbol FLASH_CM0P_SIZE = 0x2000;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__];
|
||||
define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
|
||||
define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__];
|
||||
define region IROM4_region = mem:[from __ICFEDIT_region_IROM4_start__ to __ICFEDIT_region_IROM4_end__];
|
||||
define region IROM5_region = mem:[from __ICFEDIT_region_IROM5_start__ to __ICFEDIT_region_IROM5_end__];
|
||||
define region IROM6_region = mem:[from __ICFEDIT_region_IROM6_start__ to __ICFEDIT_region_IROM6_end__];
|
||||
define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFEDIT_region_IROM7_end__];
|
||||
define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__];
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
|
||||
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
|
||||
define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
|
||||
define block CM0P_RO with size = FLASH_CM0P_SIZE { readonly section .cy_m0p_image };
|
||||
define block RO {first section .intvec, readonly};
|
||||
|
||||
define block cy_xip { section .cy_xip };
|
||||
|
||||
/*-Initializations-*/
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit, section .intvec_ram };
|
||||
|
||||
/*-Placement-*/
|
||||
|
||||
/* Flash - Cortex-M0+ application image */
|
||||
place at start of IROM1_region { block CM0P_RO };
|
||||
|
||||
/* Flash - Cortex-M4 application */
|
||||
place in IROM1_region { block RO };
|
||||
|
||||
/* Used for the digital signature of the secure application and the Bootloader SDK application. */
|
||||
".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature };
|
||||
|
||||
/* Emulated EEPROM Flash area */
|
||||
".cy_em_eeprom" : place at start of IROM2_region { section .cy_em_eeprom };
|
||||
|
||||
/* Supervisory Flash - User Data */
|
||||
".cy_sflash_user_data" : place at start of IROM3_region { section .cy_sflash_user_data };
|
||||
|
||||
/* Supervisory Flash - NAR */
|
||||
".cy_sflash_nar" : place at start of IROM4_region { section .cy_sflash_nar };
|
||||
|
||||
/* Supervisory Flash - Public Key */
|
||||
".cy_sflash_public_key" : place at start of IROM5_region { section .cy_sflash_public_key };
|
||||
|
||||
/* Supervisory Flash - TOC2 */
|
||||
".cy_toc_part2" : place at start of IROM6_region { section .cy_toc_part2 };
|
||||
|
||||
/* Supervisory Flash - RTOC2 */
|
||||
".cy_rtoc_part2" : place at start of IROM7_region { section .cy_rtoc_part2 };
|
||||
|
||||
/* eFuse */
|
||||
".cy_efuse" : place at start of IROM8_region { section .cy_efuse };
|
||||
|
||||
/* Execute in Place (XIP). See the smif driver documentation for details. */
|
||||
"cy_xip" : place at start of EROM1_region { block cy_xip };
|
||||
|
||||
/* RAM */
|
||||
place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
|
||||
".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
|
||||
|
||||
|
||||
keep { section .cy_m0p_image,
|
||||
section .cy_app_signature,
|
||||
section .cy_em_eeprom,
|
||||
section .cy_sflash_user_data,
|
||||
section .cy_sflash_nar,
|
||||
section .cy_sflash_public_key,
|
||||
section .cy_toc_part2,
|
||||
section .cy_rtoc_part2,
|
||||
section .cy_efuse,
|
||||
section .cy_xip,
|
||||
section .cymeta,
|
||||
};
|
||||
|
||||
|
||||
/* The following symbols used by the cymcuelftool. */
|
||||
/* Flash */
|
||||
define exported symbol __cy_memory_0_start = 0x10000000;
|
||||
define exported symbol __cy_memory_0_length = 0x00200000;
|
||||
define exported symbol __cy_memory_0_row_size = 0x200;
|
||||
|
||||
/* Emulated EEPROM Flash area */
|
||||
define exported symbol __cy_memory_1_start = 0x14000000;
|
||||
define exported symbol __cy_memory_1_length = 0x8000;
|
||||
define exported symbol __cy_memory_1_row_size = 0x200;
|
||||
|
||||
/* Supervisory Flash */
|
||||
define exported symbol __cy_memory_2_start = 0x16000000;
|
||||
define exported symbol __cy_memory_2_length = 0x8000;
|
||||
define exported symbol __cy_memory_2_row_size = 0x200;
|
||||
|
||||
/* XIP */
|
||||
define exported symbol __cy_memory_3_start = 0x18000000;
|
||||
define exported symbol __cy_memory_3_length = 0x08000000;
|
||||
define exported symbol __cy_memory_3_row_size = 0x200;
|
||||
|
||||
/* eFuse */
|
||||
define exported symbol __cy_memory_4_start = 0x90700000;
|
||||
define exported symbol __cy_memory_4_length = 0x100000;
|
||||
define exported symbol __cy_memory_4_row_size = 1;
|
||||
|
||||
/* EOF */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,244 +1,244 @@
|
||||
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m0
|
||||
; The first line specifies a preprocessor command that the linker invokes
|
||||
; to pass a scatter file through a C preprocessor.
|
||||
|
||||
;*******************************************************************************
|
||||
;* \file cyb06xx5_cm0plus.sct
|
||||
;* \version 2.91
|
||||
;*
|
||||
;* Linker file for the ARMCC.
|
||||
;*
|
||||
;* The main purpose of the linker script is to describe how the sections in the
|
||||
;* input files should be mapped into the output file, and to control the memory
|
||||
;* layout of the output file.
|
||||
;*
|
||||
;* \note The entry point location is fixed and starts at 0x10000000. The valid
|
||||
;* application image should be placed there.
|
||||
;*
|
||||
;* \note The linker files included with the PDL template projects must be
|
||||
;* generic and handle all common use cases. Your project may not use every
|
||||
;* section defined in the linker files. In that case you may see the warnings
|
||||
;* during the build process: L6314W (no section matches pattern) and/or L6329W
|
||||
;* (pattern only matches removed unused sections). In your project, you can
|
||||
;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
|
||||
;* the linker, simply comment out or remove the relevant code in the linker
|
||||
;* file.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;* \copyright
|
||||
;* Copyright 2016-2021 Cypress Semiconductor Corporation
|
||||
;* SPDX-License-Identifier: Apache-2.0
|
||||
;*
|
||||
;* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
;* you may not use this file except in compliance with the License.
|
||||
;* You may obtain a copy of the License at
|
||||
;*
|
||||
;* http://www.apache.org/licenses/LICENSE-2.0
|
||||
;*
|
||||
;* Unless required by applicable law or agreed to in writing, software
|
||||
;* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
;* See the License for the specific language governing permissions and
|
||||
;* limitations under the License.
|
||||
;******************************************************************************/
|
||||
|
||||
; The defines below describe the location and size of blocks of memory in the target.
|
||||
; Use these defines to specify the memory regions available for allocation.
|
||||
|
||||
; The following defines control RAM and flash memory allocation for the CM0+ core.
|
||||
; You can change the memory allocation by editing the RAM and Flash defines.
|
||||
; Your changes must be aligned with the corresponding defines for the CM4 core in 'xx_cm4_dual.scat',
|
||||
; where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.scat'.
|
||||
; RAM
|
||||
#define RAM_START 0x08020000
|
||||
#define RAM_SIZE 0x0000C000
|
||||
; Flash
|
||||
#define FLASH_START 0x10000000
|
||||
#define FLASH_SIZE 0x00010000
|
||||
|
||||
; The size of the stack section at the end of CM0+ SRAM
|
||||
#define STACK_SIZE 0x00001000
|
||||
|
||||
; The size of the MCU boot header area at the start of FLASH
|
||||
#define BOOT_HEADER_SIZE 0x00000400
|
||||
|
||||
|
||||
; The following defines describe device specific memory regions and must not be changed.
|
||||
; Supervisory flash: User data
|
||||
#define SFLASH_USER_DATA_START 0x16000800
|
||||
#define SFLASH_USER_DATA_SIZE 0x00000800
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
#define SFLASH_NAR_START 0x16001A00
|
||||
#define SFLASH_NAR_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
#define SFLASH_PUBLIC_KEY_START 0x16005A00
|
||||
#define SFLASH_PUBLIC_KEY_SIZE 0x00000C00
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
#define SFLASH_TOC_2_START 0x16007C00
|
||||
#define SFLASH_TOC_2_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
#define SFLASH_RTOC_2_START 0x16007E00
|
||||
#define SFLASH_RTOC_2_SIZE 0x00000200
|
||||
|
||||
; External memory
|
||||
#define XIP_START 0x18000000
|
||||
#define XIP_SIZE 0x08000000
|
||||
|
||||
; eFuse
|
||||
#define EFUSE_START 0x90700000
|
||||
#define EFUSE_SIZE 0x100000
|
||||
|
||||
; Public RAM
|
||||
#define PUBLIC_RAM_SIZE 0x800
|
||||
#define PUBLIC_RAM_START (RAM_START + RAM_SIZE - STACK_SIZE - PUBLIC_RAM_SIZE)
|
||||
|
||||
; Cortex-M0+ application flash area
|
||||
LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE)
|
||||
{
|
||||
ER_FLASH_VECTORS +0
|
||||
{
|
||||
* (RESET, +FIRST)
|
||||
}
|
||||
|
||||
ER_FLASH_CODE +0 FIXED
|
||||
{
|
||||
* (InRoot$$Sections)
|
||||
* (+RO)
|
||||
}
|
||||
|
||||
ER_RAM_VECTORS RAM_START UNINIT
|
||||
{
|
||||
* (RESET_RAM, +FIRST)
|
||||
}
|
||||
|
||||
RW_RAM_DATA +0
|
||||
{
|
||||
* (.cy_ramfunc)
|
||||
* (+RW, +ZI)
|
||||
}
|
||||
|
||||
; Place variables in the section that should not be initialized during the
|
||||
; device startup.
|
||||
RW_IRAM1 +0 UNINIT
|
||||
{
|
||||
* (.noinit)
|
||||
}
|
||||
|
||||
RW_IRAM2 PUBLIC_RAM_START UNINIT
|
||||
{
|
||||
* (.cy_sharedmem)
|
||||
}
|
||||
|
||||
; Application heap area (HEAP)
|
||||
ARM_LIB_HEAP +0 EMPTY RAM_START+RAM_SIZE-STACK_SIZE-AlignExpr(ImageLimit(RW_IRAM2), 8)
|
||||
{
|
||||
}
|
||||
|
||||
; Stack region growing down
|
||||
ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
; Supervisory flash: User data
|
||||
LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE
|
||||
{
|
||||
.cy_sflash_user_data +0
|
||||
{
|
||||
* (.cy_sflash_user_data)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE
|
||||
{
|
||||
.cy_sflash_nar +0
|
||||
{
|
||||
* (.cy_sflash_nar)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE
|
||||
{
|
||||
.cy_sflash_public_key +0
|
||||
{
|
||||
* (.cy_sflash_public_key)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE
|
||||
{
|
||||
.cy_toc_part2 +0
|
||||
{
|
||||
* (.cy_toc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
LR_SFLASH_RTOC_2 SFLASH_RTOC_2_START SFLASH_RTOC_2_SIZE
|
||||
{
|
||||
.cy_rtoc_part2 +0
|
||||
{
|
||||
* (.cy_rtoc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details.
|
||||
LR_EROM XIP_START XIP_SIZE
|
||||
{
|
||||
cy_xip +0
|
||||
{
|
||||
* (.cy_xip)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; eFuse
|
||||
LR_EFUSE EFUSE_START EFUSE_SIZE
|
||||
{
|
||||
.cy_efuse +0
|
||||
{
|
||||
* (.cy_efuse)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage.
|
||||
CYMETA 0x90500000
|
||||
{
|
||||
.cymeta +0 { * (.cymeta) }
|
||||
}
|
||||
|
||||
/* The following symbols used by the cymcuelftool. */
|
||||
/* Flash */
|
||||
#define __cy_memory_0_start 0x10000000
|
||||
#define __cy_memory_0_length 0x00070000
|
||||
#define __cy_memory_0_row_size 0x200
|
||||
|
||||
|
||||
/* Supervisory Flash */
|
||||
#define __cy_memory_2_start 0x16000000
|
||||
#define __cy_memory_2_length 0x8000
|
||||
#define __cy_memory_2_row_size 0x200
|
||||
|
||||
/* XIP */
|
||||
#define __cy_memory_3_start 0x18000000
|
||||
#define __cy_memory_3_length 0x08000000
|
||||
#define __cy_memory_3_row_size 0x200
|
||||
|
||||
/* eFuse */
|
||||
#define __cy_memory_4_start 0x90700000
|
||||
#define __cy_memory_4_length 0x100000
|
||||
#define __cy_memory_4_row_size 1
|
||||
|
||||
|
||||
/* [] END OF FILE */
|
||||
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m0
|
||||
; The first line specifies a preprocessor command that the linker invokes
|
||||
; to pass a scatter file through a C preprocessor.
|
||||
|
||||
;*******************************************************************************
|
||||
;* \file cyb06xx5_cm0plus.sct
|
||||
;* \version 2.91
|
||||
;*
|
||||
;* Linker file for the ARMCC.
|
||||
;*
|
||||
;* The main purpose of the linker script is to describe how the sections in the
|
||||
;* input files should be mapped into the output file, and to control the memory
|
||||
;* layout of the output file.
|
||||
;*
|
||||
;* \note The entry point location is fixed and starts at 0x10000000. The valid
|
||||
;* application image should be placed there.
|
||||
;*
|
||||
;* \note The linker files included with the PDL template projects must be
|
||||
;* generic and handle all common use cases. Your project may not use every
|
||||
;* section defined in the linker files. In that case you may see the warnings
|
||||
;* during the build process: L6314W (no section matches pattern) and/or L6329W
|
||||
;* (pattern only matches removed unused sections). In your project, you can
|
||||
;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
|
||||
;* the linker, simply comment out or remove the relevant code in the linker
|
||||
;* file.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;* \copyright
|
||||
;* Copyright 2016-2021 Cypress Semiconductor Corporation
|
||||
;* SPDX-License-Identifier: Apache-2.0
|
||||
;*
|
||||
;* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
;* you may not use this file except in compliance with the License.
|
||||
;* You may obtain a copy of the License at
|
||||
;*
|
||||
;* http://www.apache.org/licenses/LICENSE-2.0
|
||||
;*
|
||||
;* Unless required by applicable law or agreed to in writing, software
|
||||
;* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
;* See the License for the specific language governing permissions and
|
||||
;* limitations under the License.
|
||||
;******************************************************************************/
|
||||
|
||||
; The defines below describe the location and size of blocks of memory in the target.
|
||||
; Use these defines to specify the memory regions available for allocation.
|
||||
|
||||
; The following defines control RAM and flash memory allocation for the CM0+ core.
|
||||
; You can change the memory allocation by editing the RAM and Flash defines.
|
||||
; Your changes must be aligned with the corresponding defines for the CM4 core in 'xx_cm4_dual.scat',
|
||||
; where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.scat'.
|
||||
; RAM
|
||||
#define RAM_START 0x08020000
|
||||
#define RAM_SIZE 0x0000C000
|
||||
; Flash
|
||||
#define FLASH_START 0x10000000
|
||||
#define FLASH_SIZE 0x00010000
|
||||
|
||||
; The size of the stack section at the end of CM0+ SRAM
|
||||
#define STACK_SIZE 0x00001000
|
||||
|
||||
; The size of the MCU boot header area at the start of FLASH
|
||||
#define BOOT_HEADER_SIZE 0x00000400
|
||||
|
||||
|
||||
; The following defines describe device specific memory regions and must not be changed.
|
||||
; Supervisory flash: User data
|
||||
#define SFLASH_USER_DATA_START 0x16000800
|
||||
#define SFLASH_USER_DATA_SIZE 0x00000800
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
#define SFLASH_NAR_START 0x16001A00
|
||||
#define SFLASH_NAR_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
#define SFLASH_PUBLIC_KEY_START 0x16005A00
|
||||
#define SFLASH_PUBLIC_KEY_SIZE 0x00000C00
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
#define SFLASH_TOC_2_START 0x16007C00
|
||||
#define SFLASH_TOC_2_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
#define SFLASH_RTOC_2_START 0x16007E00
|
||||
#define SFLASH_RTOC_2_SIZE 0x00000200
|
||||
|
||||
; External memory
|
||||
#define XIP_START 0x18000000
|
||||
#define XIP_SIZE 0x08000000
|
||||
|
||||
; eFuse
|
||||
#define EFUSE_START 0x90700000
|
||||
#define EFUSE_SIZE 0x100000
|
||||
|
||||
; Public RAM
|
||||
#define PUBLIC_RAM_SIZE 0x800
|
||||
#define PUBLIC_RAM_START (RAM_START + RAM_SIZE - STACK_SIZE - PUBLIC_RAM_SIZE)
|
||||
|
||||
; Cortex-M0+ application flash area
|
||||
LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE)
|
||||
{
|
||||
ER_FLASH_VECTORS +0
|
||||
{
|
||||
* (RESET, +FIRST)
|
||||
}
|
||||
|
||||
ER_FLASH_CODE +0 FIXED
|
||||
{
|
||||
* (InRoot$$Sections)
|
||||
* (+RO)
|
||||
}
|
||||
|
||||
ER_RAM_VECTORS RAM_START UNINIT
|
||||
{
|
||||
* (RESET_RAM, +FIRST)
|
||||
}
|
||||
|
||||
RW_RAM_DATA +0
|
||||
{
|
||||
* (.cy_ramfunc)
|
||||
* (+RW, +ZI)
|
||||
}
|
||||
|
||||
; Place variables in the section that should not be initialized during the
|
||||
; device startup.
|
||||
RW_IRAM1 +0 UNINIT
|
||||
{
|
||||
* (.noinit)
|
||||
}
|
||||
|
||||
RW_IRAM2 PUBLIC_RAM_START UNINIT
|
||||
{
|
||||
* (.cy_sharedmem)
|
||||
}
|
||||
|
||||
; Application heap area (HEAP)
|
||||
ARM_LIB_HEAP +0 EMPTY RAM_START+RAM_SIZE-STACK_SIZE-AlignExpr(ImageLimit(RW_IRAM2), 8)
|
||||
{
|
||||
}
|
||||
|
||||
; Stack region growing down
|
||||
ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
; Supervisory flash: User data
|
||||
LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE
|
||||
{
|
||||
.cy_sflash_user_data +0
|
||||
{
|
||||
* (.cy_sflash_user_data)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE
|
||||
{
|
||||
.cy_sflash_nar +0
|
||||
{
|
||||
* (.cy_sflash_nar)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE
|
||||
{
|
||||
.cy_sflash_public_key +0
|
||||
{
|
||||
* (.cy_sflash_public_key)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE
|
||||
{
|
||||
.cy_toc_part2 +0
|
||||
{
|
||||
* (.cy_toc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
LR_SFLASH_RTOC_2 SFLASH_RTOC_2_START SFLASH_RTOC_2_SIZE
|
||||
{
|
||||
.cy_rtoc_part2 +0
|
||||
{
|
||||
* (.cy_rtoc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details.
|
||||
LR_EROM XIP_START XIP_SIZE
|
||||
{
|
||||
cy_xip +0
|
||||
{
|
||||
* (.cy_xip)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; eFuse
|
||||
LR_EFUSE EFUSE_START EFUSE_SIZE
|
||||
{
|
||||
.cy_efuse +0
|
||||
{
|
||||
* (.cy_efuse)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage.
|
||||
CYMETA 0x90500000
|
||||
{
|
||||
.cymeta +0 { * (.cymeta) }
|
||||
}
|
||||
|
||||
/* The following symbols used by the cymcuelftool. */
|
||||
/* Flash */
|
||||
#define __cy_memory_0_start 0x10000000
|
||||
#define __cy_memory_0_length 0x00070000
|
||||
#define __cy_memory_0_row_size 0x200
|
||||
|
||||
|
||||
/* Supervisory Flash */
|
||||
#define __cy_memory_2_start 0x16000000
|
||||
#define __cy_memory_2_length 0x8000
|
||||
#define __cy_memory_2_row_size 0x200
|
||||
|
||||
/* XIP */
|
||||
#define __cy_memory_3_start 0x18000000
|
||||
#define __cy_memory_3_length 0x08000000
|
||||
#define __cy_memory_3_row_size 0x200
|
||||
|
||||
/* eFuse */
|
||||
#define __cy_memory_4_start 0x90700000
|
||||
#define __cy_memory_4_length 0x100000
|
||||
#define __cy_memory_4_row_size 1
|
||||
|
||||
|
||||
/* [] END OF FILE */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -142,7 +142,7 @@ define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFED
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
* This is an unprotected public RAM region, with the placed .cy_sharedmem section.
|
||||
* This region is used to place objects that require full access from both cores.
|
||||
* Uncomment the following lines, define region size, and uncomment the placement of
|
||||
@@ -198,7 +198,7 @@ place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
*To use unprotected public RAM, uncomment the following .cy_sharedmem section placement.
|
||||
*/
|
||||
/*
|
||||
|
||||
@@ -142,7 +142,7 @@ define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFED
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
* This is an unprotected public RAM region, with the placed .cy_sharedmem section.
|
||||
* This region is used to place objects that require full access from both cores.
|
||||
* Uncomment the following lines, define region size, and uncomment the placement of
|
||||
@@ -200,7 +200,7 @@ place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
*To use unprotected public RAM, uncomment the following .cy_sharedmem section placement.
|
||||
*/
|
||||
/*
|
||||
|
||||
@@ -142,7 +142,7 @@ define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFED
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
* This is an unprotected public RAM region, with the placed .cy_sharedmem section.
|
||||
* This region is used to place objects that require full access from both cores.
|
||||
* Uncomment the following lines, define region size, and uncomment the placement of
|
||||
@@ -200,7 +200,7 @@ place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
*To use unprotected public RAM, uncomment the following .cy_sharedmem section placement.
|
||||
*/
|
||||
/*
|
||||
|
||||
@@ -142,7 +142,7 @@ define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFED
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
* This is an unprotected public RAM region, with the placed .cy_sharedmem section.
|
||||
* This region is used to place objects that require full access from both cores.
|
||||
* Uncomment the following lines, define region size, and uncomment the placement of
|
||||
@@ -200,7 +200,7 @@ place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
*To use unprotected public RAM, uncomment the following .cy_sharedmem section placement.
|
||||
*/
|
||||
/*
|
||||
|
||||
@@ -142,7 +142,7 @@ define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFED
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
* This is an unprotected public RAM region, with the placed .cy_sharedmem section.
|
||||
* This region is used to place objects that require full access from both cores.
|
||||
* Uncomment the following lines, define region size, and uncomment the placement of
|
||||
@@ -200,7 +200,7 @@ place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
*To use unprotected public RAM, uncomment the following .cy_sharedmem section placement.
|
||||
*/
|
||||
/*
|
||||
|
||||
@@ -142,7 +142,7 @@ define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFED
|
||||
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
|
||||
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
* This is an unprotected public RAM region, with the placed .cy_sharedmem section.
|
||||
* This region is used to place objects that require full access from both cores.
|
||||
* Uncomment the following lines, define region size, and uncomment the placement of
|
||||
@@ -200,7 +200,7 @@ place at start of IRAM1_region { readwrite section .intvec_ram};
|
||||
place in IRAM1_region { readwrite };
|
||||
place at end of IRAM1_region { block HSTACK };
|
||||
|
||||
/* Public RAM
|
||||
/* Public RAM
|
||||
*To use unprotected public RAM, uncomment the following .cy_sharedmem section placement.
|
||||
*/
|
||||
/*
|
||||
|
||||
@@ -1,240 +1,240 @@
|
||||
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
|
||||
; The first line specifies a preprocessor command that the linker invokes
|
||||
; to pass a scatter file through a C preprocessor.
|
||||
|
||||
;*******************************************************************************
|
||||
;* \file cy8c6xx4_cm4.sct
|
||||
;* \version 2.91
|
||||
;*
|
||||
;* Linker file for the ARMCC.
|
||||
;*
|
||||
;* The main purpose of the linker script is to describe how the sections in the
|
||||
;* input files should be mapped into the output file, and to control the memory
|
||||
;* layout of the output file.
|
||||
;*
|
||||
;* \note The entry point location is fixed and starts at 0x10000000. The valid
|
||||
;* application image should be placed there.
|
||||
;*
|
||||
;* \note The linker files included with the PDL template projects must be
|
||||
;* generic and handle all common use cases. Your project may not use every
|
||||
;* section defined in the linker files. In that case you may see the warnings
|
||||
;* during the build process: L6314W (no section matches pattern) and/or L6329W
|
||||
;* (pattern only matches removed unused sections). In your project, you can
|
||||
;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
|
||||
;* the linker, simply comment out or remove the relevant code in the linker
|
||||
;* file.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;* \copyright
|
||||
;* Copyright 2016-2021 Cypress Semiconductor Corporation
|
||||
;* SPDX-License-Identifier: Apache-2.0
|
||||
;*
|
||||
;* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
;* you may not use this file except in compliance with the License.
|
||||
;* You may obtain a copy of the License at
|
||||
;*
|
||||
;* http://www.apache.org/licenses/LICENSE-2.0
|
||||
;*
|
||||
;* Unless required by applicable law or agreed to in writing, software
|
||||
;* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
;* See the License for the specific language governing permissions and
|
||||
;* limitations under the License.
|
||||
;******************************************************************************/
|
||||
|
||||
; The defines below describe the location and size of blocks of memory in the target.
|
||||
; Use these defines to specify the memory regions available for allocation.
|
||||
|
||||
; The following defines control RAM and flash memory allocation for the CM4 core.
|
||||
; Note that 2176 bytes of RAM (at the end of the SRAM) are reserved for system use.
|
||||
; Using this memory region for other purposes will lead to unexpected behavior.
|
||||
; RAM
|
||||
#define RAM_START 0x08000000
|
||||
#define RAM_SIZE 0x0001F780
|
||||
; Flash
|
||||
#define FLASH_START 0x10000000
|
||||
#define FLASH_SIZE 0x00040000
|
||||
|
||||
; The size of the stack section at the end of CM4 SRAM
|
||||
#define STACK_SIZE 0x00001000
|
||||
|
||||
|
||||
; The following defines describe device specific memory regions and must not be changed.
|
||||
; Supervisory flash: User data
|
||||
#define SFLASH_USER_DATA_START 0x16000800
|
||||
#define SFLASH_USER_DATA_SIZE 0x00000800
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
#define SFLASH_NAR_START 0x16001A00
|
||||
#define SFLASH_NAR_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
#define SFLASH_PUBLIC_KEY_START 0x16005A00
|
||||
#define SFLASH_PUBLIC_KEY_SIZE 0x00000C00
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
#define SFLASH_TOC_2_START 0x16007C00
|
||||
#define SFLASH_TOC_2_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
#define SFLASH_RTOC_2_START 0x16007E00
|
||||
#define SFLASH_RTOC_2_SIZE 0x00000200
|
||||
|
||||
; External memory
|
||||
#define XIP_START 0x18000000
|
||||
#define XIP_SIZE 0x08000000
|
||||
|
||||
; eFuse
|
||||
#define EFUSE_START 0x90700000
|
||||
#define EFUSE_SIZE 0x100000
|
||||
|
||||
|
||||
; Cortex-M4 application flash area
|
||||
LR_IROM1 FLASH_START FLASH_SIZE
|
||||
{
|
||||
ER_FLASH_VECTORS +0
|
||||
{
|
||||
* (RESET, +FIRST)
|
||||
}
|
||||
|
||||
ER_FLASH_CODE +0 FIXED
|
||||
{
|
||||
* (InRoot$$Sections)
|
||||
* (+RO)
|
||||
}
|
||||
|
||||
ER_RAM_VECTORS RAM_START UNINIT
|
||||
{
|
||||
* (RESET_RAM, +FIRST)
|
||||
}
|
||||
|
||||
RW_RAM_DATA +0
|
||||
{
|
||||
* (.cy_ramfunc)
|
||||
* (+RW, +ZI)
|
||||
}
|
||||
|
||||
; Place variables in the section that should not be initialized during the
|
||||
; device startup.
|
||||
RW_IRAM1 +0 UNINIT
|
||||
{
|
||||
* (.noinit)
|
||||
}
|
||||
|
||||
; Application heap area (HEAP)
|
||||
ARM_LIB_HEAP +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
|
||||
{
|
||||
}
|
||||
|
||||
; Stack region growing down
|
||||
ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
|
||||
{
|
||||
}
|
||||
|
||||
; Used for the digital signature of the secure application and the
|
||||
; Bootloader SDK application. The size of the section depends on the required
|
||||
; data size.
|
||||
.cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256
|
||||
{
|
||||
* (.cy_app_signature)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
; Supervisory flash: User data
|
||||
LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE
|
||||
{
|
||||
.cy_sflash_user_data +0
|
||||
{
|
||||
* (.cy_sflash_user_data)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE
|
||||
{
|
||||
.cy_sflash_nar +0
|
||||
{
|
||||
* (.cy_sflash_nar)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE
|
||||
{
|
||||
.cy_sflash_public_key +0
|
||||
{
|
||||
* (.cy_sflash_public_key)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE
|
||||
{
|
||||
.cy_toc_part2 +0
|
||||
{
|
||||
* (.cy_toc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
LR_SFLASH_RTOC_2 SFLASH_RTOC_2_START SFLASH_RTOC_2_SIZE
|
||||
{
|
||||
.cy_rtoc_part2 +0
|
||||
{
|
||||
* (.cy_rtoc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details.
|
||||
LR_EROM XIP_START XIP_SIZE
|
||||
{
|
||||
cy_xip +0
|
||||
{
|
||||
* (.cy_xip)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; eFuse
|
||||
LR_EFUSE EFUSE_START EFUSE_SIZE
|
||||
{
|
||||
.cy_efuse +0
|
||||
{
|
||||
* (.cy_efuse)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage.
|
||||
CYMETA 0x90500000
|
||||
{
|
||||
.cymeta +0 { * (.cymeta) }
|
||||
}
|
||||
|
||||
/* The following symbols used by the cymcuelftool. */
|
||||
/* Flash */
|
||||
#define __cy_memory_0_start 0x10000000
|
||||
#define __cy_memory_0_length 0x00040000
|
||||
#define __cy_memory_0_row_size 0x200
|
||||
|
||||
|
||||
/* Supervisory Flash */
|
||||
#define __cy_memory_2_start 0x16000000
|
||||
#define __cy_memory_2_length 0x8000
|
||||
#define __cy_memory_2_row_size 0x200
|
||||
|
||||
/* XIP */
|
||||
#define __cy_memory_3_start 0x18000000
|
||||
#define __cy_memory_3_length 0x08000000
|
||||
#define __cy_memory_3_row_size 0x200
|
||||
|
||||
/* eFuse */
|
||||
#define __cy_memory_4_start 0x90700000
|
||||
#define __cy_memory_4_length 0x100000
|
||||
#define __cy_memory_4_row_size 1
|
||||
|
||||
|
||||
/* [] END OF FILE */
|
||||
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
|
||||
; The first line specifies a preprocessor command that the linker invokes
|
||||
; to pass a scatter file through a C preprocessor.
|
||||
|
||||
;*******************************************************************************
|
||||
;* \file cy8c6xx4_cm4.sct
|
||||
;* \version 2.91
|
||||
;*
|
||||
;* Linker file for the ARMCC.
|
||||
;*
|
||||
;* The main purpose of the linker script is to describe how the sections in the
|
||||
;* input files should be mapped into the output file, and to control the memory
|
||||
;* layout of the output file.
|
||||
;*
|
||||
;* \note The entry point location is fixed and starts at 0x10000000. The valid
|
||||
;* application image should be placed there.
|
||||
;*
|
||||
;* \note The linker files included with the PDL template projects must be
|
||||
;* generic and handle all common use cases. Your project may not use every
|
||||
;* section defined in the linker files. In that case you may see the warnings
|
||||
;* during the build process: L6314W (no section matches pattern) and/or L6329W
|
||||
;* (pattern only matches removed unused sections). In your project, you can
|
||||
;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
|
||||
;* the linker, simply comment out or remove the relevant code in the linker
|
||||
;* file.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;* \copyright
|
||||
;* Copyright 2016-2021 Cypress Semiconductor Corporation
|
||||
;* SPDX-License-Identifier: Apache-2.0
|
||||
;*
|
||||
;* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
;* you may not use this file except in compliance with the License.
|
||||
;* You may obtain a copy of the License at
|
||||
;*
|
||||
;* http://www.apache.org/licenses/LICENSE-2.0
|
||||
;*
|
||||
;* Unless required by applicable law or agreed to in writing, software
|
||||
;* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
;* See the License for the specific language governing permissions and
|
||||
;* limitations under the License.
|
||||
;******************************************************************************/
|
||||
|
||||
; The defines below describe the location and size of blocks of memory in the target.
|
||||
; Use these defines to specify the memory regions available for allocation.
|
||||
|
||||
; The following defines control RAM and flash memory allocation for the CM4 core.
|
||||
; Note that 2176 bytes of RAM (at the end of the SRAM) are reserved for system use.
|
||||
; Using this memory region for other purposes will lead to unexpected behavior.
|
||||
; RAM
|
||||
#define RAM_START 0x08000000
|
||||
#define RAM_SIZE 0x0001F780
|
||||
; Flash
|
||||
#define FLASH_START 0x10000000
|
||||
#define FLASH_SIZE 0x00040000
|
||||
|
||||
; The size of the stack section at the end of CM4 SRAM
|
||||
#define STACK_SIZE 0x00001000
|
||||
|
||||
|
||||
; The following defines describe device specific memory regions and must not be changed.
|
||||
; Supervisory flash: User data
|
||||
#define SFLASH_USER_DATA_START 0x16000800
|
||||
#define SFLASH_USER_DATA_SIZE 0x00000800
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
#define SFLASH_NAR_START 0x16001A00
|
||||
#define SFLASH_NAR_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
#define SFLASH_PUBLIC_KEY_START 0x16005A00
|
||||
#define SFLASH_PUBLIC_KEY_SIZE 0x00000C00
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
#define SFLASH_TOC_2_START 0x16007C00
|
||||
#define SFLASH_TOC_2_SIZE 0x00000200
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
#define SFLASH_RTOC_2_START 0x16007E00
|
||||
#define SFLASH_RTOC_2_SIZE 0x00000200
|
||||
|
||||
; External memory
|
||||
#define XIP_START 0x18000000
|
||||
#define XIP_SIZE 0x08000000
|
||||
|
||||
; eFuse
|
||||
#define EFUSE_START 0x90700000
|
||||
#define EFUSE_SIZE 0x100000
|
||||
|
||||
|
||||
; Cortex-M4 application flash area
|
||||
LR_IROM1 FLASH_START FLASH_SIZE
|
||||
{
|
||||
ER_FLASH_VECTORS +0
|
||||
{
|
||||
* (RESET, +FIRST)
|
||||
}
|
||||
|
||||
ER_FLASH_CODE +0 FIXED
|
||||
{
|
||||
* (InRoot$$Sections)
|
||||
* (+RO)
|
||||
}
|
||||
|
||||
ER_RAM_VECTORS RAM_START UNINIT
|
||||
{
|
||||
* (RESET_RAM, +FIRST)
|
||||
}
|
||||
|
||||
RW_RAM_DATA +0
|
||||
{
|
||||
* (.cy_ramfunc)
|
||||
* (+RW, +ZI)
|
||||
}
|
||||
|
||||
; Place variables in the section that should not be initialized during the
|
||||
; device startup.
|
||||
RW_IRAM1 +0 UNINIT
|
||||
{
|
||||
* (.noinit)
|
||||
}
|
||||
|
||||
; Application heap area (HEAP)
|
||||
ARM_LIB_HEAP +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
|
||||
{
|
||||
}
|
||||
|
||||
; Stack region growing down
|
||||
ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
|
||||
{
|
||||
}
|
||||
|
||||
; Used for the digital signature of the secure application and the
|
||||
; Bootloader SDK application. The size of the section depends on the required
|
||||
; data size.
|
||||
.cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256
|
||||
{
|
||||
* (.cy_app_signature)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
; Supervisory flash: User data
|
||||
LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE
|
||||
{
|
||||
.cy_sflash_user_data +0
|
||||
{
|
||||
* (.cy_sflash_user_data)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Normal Access Restrictions (NAR)
|
||||
LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE
|
||||
{
|
||||
.cy_sflash_nar +0
|
||||
{
|
||||
* (.cy_sflash_nar)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Public Key
|
||||
LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE
|
||||
{
|
||||
.cy_sflash_public_key +0
|
||||
{
|
||||
* (.cy_sflash_public_key)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2
|
||||
LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE
|
||||
{
|
||||
.cy_toc_part2 +0
|
||||
{
|
||||
* (.cy_toc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
; Supervisory flash: Table of Content # 2 Copy
|
||||
LR_SFLASH_RTOC_2 SFLASH_RTOC_2_START SFLASH_RTOC_2_SIZE
|
||||
{
|
||||
.cy_rtoc_part2 +0
|
||||
{
|
||||
* (.cy_rtoc_part2)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details.
|
||||
LR_EROM XIP_START XIP_SIZE
|
||||
{
|
||||
cy_xip +0
|
||||
{
|
||||
* (.cy_xip)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; eFuse
|
||||
LR_EFUSE EFUSE_START EFUSE_SIZE
|
||||
{
|
||||
.cy_efuse +0
|
||||
{
|
||||
* (.cy_efuse)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage.
|
||||
CYMETA 0x90500000
|
||||
{
|
||||
.cymeta +0 { * (.cymeta) }
|
||||
}
|
||||
|
||||
/* The following symbols used by the cymcuelftool. */
|
||||
/* Flash */
|
||||
#define __cy_memory_0_start 0x10000000
|
||||
#define __cy_memory_0_length 0x00040000
|
||||
#define __cy_memory_0_row_size 0x200
|
||||
|
||||
|
||||
/* Supervisory Flash */
|
||||
#define __cy_memory_2_start 0x16000000
|
||||
#define __cy_memory_2_length 0x8000
|
||||
#define __cy_memory_2_row_size 0x200
|
||||
|
||||
/* XIP */
|
||||
#define __cy_memory_3_start 0x18000000
|
||||
#define __cy_memory_3_length 0x08000000
|
||||
#define __cy_memory_3_row_size 0x200
|
||||
|
||||
/* eFuse */
|
||||
#define __cy_memory_4_start 0x90700000
|
||||
#define __cy_memory_4_length 0x100000
|
||||
#define __cy_memory_4_row_size 1
|
||||
|
||||
|
||||
/* [] END OF FILE */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user