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!327 增加bsp工程hc32l136

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Merge pull request !327 from ching/pjq_hc32l13x
This commit is contained in:
bernard
2021-09-23 10:54:09 +00:00
committed by Gitee
parent 1e663b72ce d0c0e4e674
commit 554d5bd807
134 changed files with 88578 additions and 0 deletions
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bsp/hc32l136/.config
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bsp/hc32l136/.ignore_format.yml
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# files format check exclude path, please follow the instructions below to modify;
# If you need to exclude an entire folder, add the folder path in dir_path;
# If you need to exclude a file, add the path to the file in file_path.
file_path:
dir_path:
- libraries
bsp/hc32l136/Kconfig
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mainmenu "RT-Thread Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "board/Kconfig"
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Include/base_types.h
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/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file base_types.h
**
** base type common define.
** @link SampleGroup Some description @endlink
**
** - 2018-03-09 1.0 Lux First version.
**
******************************************************************************/
#ifndef __BASE_TYPES_H__
#define __BASE_TYPES_H__
/*****************************************************************************/
/* Include files */
/*****************************************************************************/
#include <stdio.h>
#include <string.h>
#include <stddef.h>
#include <stdint.h>
#include <assert.h>
/*****************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/*****************************************************************************/
#ifndef TRUE
/** Value is true (boolean_t type) */
#define TRUE ((boolean_t) 1u)
#endif
#ifndef FALSE
/** Value is false (boolean_t type) */
#define FALSE ((boolean_t) 0u)
#endif
#if defined (__ICCARM__)
#define __WEAKDEF __WEAK __ATTRIBUTES
#elif defined (__CC_ARM)
#define __WEAKDEF __weak
#else
#error "unsupported compiler!!"
#endif
/** Returns the minimum value out of two values */
#define MINIMUM( X, Y ) ((X) < (Y) ? (X) : (Y))
/** Returns the maximum value out of two values */
#define MAXIMUM( X, Y ) ((X) > (Y) ? (X) : (Y))
/** Returns the dimension of an array */
#define ARRAY_SZ( X ) (sizeof(X) / sizeof((X)[0]))
#ifdef __DEBUG_ASSERT
#define ASSERT(x) do{ assert((x)> 0u) ; }while(0);
#else
#define ASSERT(x) {}
#endif
/******************************************************************************
* Global type definitions
******************************************************************************/
/** logical datatype (only values are TRUE and FALSE) */
typedef uint8_t boolean_t;
/** single precision floating point number (4 byte) */
typedef float float32_t;
/** double precision floating point number (8 byte) */
typedef double float64_t;
/** ASCII character for string generation (8 bit) */
typedef char char_t;
/** function pointer type to void/void function */
typedef void (*func_ptr_t)(void);
/** function pointer type to void/uint8_t function */
typedef void (*func_ptr_arg1_t)(uint8_t u8Param);
/** generic error codes */
typedef enum en_result
{
Ok = 0u, ///< No error
Error = 1u, ///< Non-specific error code
ErrorAddressAlignment = 2u, ///< Address alignment does not match
ErrorAccessRights = 3u, ///< Wrong mode (e.g. user/system) mode is set
ErrorInvalidParameter = 4u, ///< Provided parameter is not valid
ErrorOperationInProgress = 5u, ///< A conflicting or requested operation is still in progress
ErrorInvalidMode = 6u, ///< Operation not allowed in current mode
ErrorUninitialized = 7u, ///< Module (or part of it) was not initialized properly
ErrorBufferFull = 8u, ///< Circular buffer can not be written because the buffer is full
ErrorTimeout = 9u, ///< Time Out error occurred (e.g. I2C arbitration lost, Flash time-out, etc.)
ErrorNotReady = 10u, ///< A requested final state is not reached
OperationInProgress = 11u ///< Indicator for operation in progress
} en_result_t;
/*****************************************************************************/
/* Global variable declarations ('extern', definition in C source) */
/*****************************************************************************/
/*****************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/*****************************************************************************/
#endif /* __BASE_TYPES_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Include/board_stkhc32l13x.h
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/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file stkhc32l13x.h
**
** stk board common define.
** @link SampleGroup Some description @endlink
**
** - 2018-03-09 1.0 Lux First version.
**
******************************************************************************/
#ifndef __BOARD_STKHC32L13X_H__
#define __BOARD_STKHC32L13X_H__
///< STK GPIO DEFINE
///< USER KEY
#define STK_USER_PORT GpioPortD
#define STK_USER_PIN GpioPin4
///< LED
#define STK_LED_PORT GpioPortD
#define STK_LED_PIN GpioPin5
///< XTH
#define SYSTEM_XTH (32*1000*1000u) ///< 32MHz
#define STK_XTHI_PORT GpioPortD
#define STK_XTHI_PIN GpioPin0
#define STK_XTHO_PORT GpioPortD
#define STK_XTHO_PIN GpioPin1
///< XTL
#define SYSTEM_XTL (32768u) ///< 32768Hz
#define STK_XTLI_PORT GpioPortC
#define STK_XTLI_PIN GpioPin14
#define STK_XTLO_PORT GpioPortC
#define STK_XTLO_PIN GpioPin15
///< LCD
#define STK_LCD_COM0_PORT GpioPortA
#define STK_LCD_COM0_PIN GpioPin9
#define STK_LCD_COM1_PORT GpioPortA
#define STK_LCD_COM1_PIN GpioPin10
#define STK_LCD_COM2_PORT GpioPortA
#define STK_LCD_COM2_PIN GpioPin11
#define STK_LCD_COM3_PORT GpioPortA
#define STK_LCD_COM3_PIN GpioPin12
#define STK_LCD_SEG0_PORT GpioPortA
#define STK_LCD_SEG0_PIN GpioPin8
#define STK_LCD_SEG1_PORT GpioPortC
#define STK_LCD_SEG1_PIN GpioPin9
#define STK_LCD_SEG2_PORT GpioPortC
#define STK_LCD_SEG2_PIN GpioPin8
#define STK_LCD_SEG3_PORT GpioPortC
#define STK_LCD_SEG3_PIN GpioPin7
#define STK_LCD_SEG4_PORT GpioPortC
#define STK_LCD_SEG4_PIN GpioPin6
#define STK_LCD_SEG5_PORT GpioPortB
#define STK_LCD_SEG5_PIN GpioPin15
#define STK_LCD_SEG6_PORT GpioPortB
#define STK_LCD_SEG6_PIN GpioPin14
#define STK_LCD_SEG7_PORT GpioPortB
#define STK_LCD_SEG7_PIN GpioPin13
///< I2C EEPROM
#define EVB_I2C0_EEPROM_SCL_PORT GpioPortB
#define EVB_I2C0_EEPROM_SCL_PIN GpioPin6
#define EVB_I2C0_EEPROM_SDA_PORT GpioPortB
#define EVB_I2C0_EEPROM_SDA_PIN GpioPin7
///< SPI0
#define EVB_SPI0_FLASH_CS_PORT GpioPortE
#define EVB_SPI0_FLASH_CS_PIN GpioPin12
#define EVB_SPI0_FLASH_SCK_PORT GpioPortE
#define EVB_SPI0_FLASH_SCK_PIN GpioPin13
#define EVB_SPI0_FLASH_MISO_PORT GpioPortE
#define EVB_SPI0_FLASH_MISO_PIN GpioPin14
#define EVB_SPI0_FLASH_MOSI_PORT GpioPortE
#define EVB_SPI0_FLASH_MOSI_PIN GpioPin15
#endif
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Include/ddl_device.h
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/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file ddl_device.h
**
** Device define
** @link SampleGroup Some description @endlink
**
** - 2018-04-15
**
*****************************************************************************/
#ifndef __DDL_DEVICE_H__
#define __DDL_DEVICE_H__
/**
*******************************************************************************
** \brief Global device series definition
**
** \note
******************************************************************************/
#define DDL_MCU_SERIES DDL_DEVICE_SERIES_HC32L13X
/**
*******************************************************************************
** \brief Global package definition
**
** \note This definition is used for device package settings
******************************************************************************/
#define DDL_MCU_PACKAGE DDL_DEVICE_PACKAGE_HC_K
#endif /* __DDL_DEVICE_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Include/hc32l136.h
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bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Include/system_hc32l136.h
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/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file system_hc32l136.h
**
** A detailed description is available at
** @link SampleGroup Some description @endlink
**
** - 2018-03-09 1.0 Lux First version.
**
******************************************************************************/
#ifndef __SYSTEM_HC32L136_H__
#define __SYSTEM_HC32L136_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************/
/* Global pre-processor symbols/macros ('define') */
/******************************************************************************/
#define HWWD_DISABLE (1)
/**
******************************************************************************
** \brief Clock Setup macro definition
**
** - 0: CLOCK_SETTING_NONE - User provides own clock setting in application
** - 1: CLOCK_SETTING_CMSIS -
******************************************************************************/
#define CLOCK_SETTING_NONE 0u
#define CLOCK_SETTING_CMSIS 1u
/******************************************************************************/
/* */
/* START OF USER SETTINGS HERE */
/* =========================== */
/* */
/* All lines with '<<<' can be set by user. */
/* */
/******************************************************************************/
/******************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/******************************************************************************/
extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
extern void SystemInit (void); // Initialize the system
extern void SystemCoreClockUpdate (void); // Update SystemCoreClock variable
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_HC32L136_H__ */
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Include/system_hc32l13x.h
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/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file system_hc32l13x.h
**
** A detailed description is available at
** @link SampleGroup Some description @endlink
**
** - 2019-03-01 1.0 Lux First version.
**
******************************************************************************/
#ifndef __SYSTEM_HC32L13X_H__
#define __SYSTEM_HC32L13X_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************/
/* Global pre-processor symbols/macros ('define') */
/******************************************************************************/
#define HWWD_DISABLE (1)
/**
******************************************************************************
** \brief Clock Setup macro definition
**
** - 0: CLOCK_SETTING_NONE - User provides own clock setting in application
** - 1: CLOCK_SETTING_CMSIS -
******************************************************************************/
#define CLOCK_SETTING_NONE 0u
#define CLOCK_SETTING_CMSIS 1u
/******************************************************************************/
/* */
/* START OF USER SETTINGS HERE */
/* =========================== */
/* */
/* All lines with '<<<' can be set by user. */
/* */
/******************************************************************************/
/******************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/******************************************************************************/
extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
extern void SystemInit (void); // Initialize the system
extern void SystemCoreClockUpdate (void); // Update SystemCoreClock variable
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_HC32L13X_H__ */
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Source/ARM/startup_hc32l136.s
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;/******************************************************************************
;* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
;*
;* This software is owned and published by:
;* Huada Semiconductor Co.,Ltd ("HDSC").
;*
;* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
;* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
;*
;* This software contains source code for use with HDSC
;* components. This software is licensed by HDSC to be adapted only
;* for use in systems utilizing HDSC components. HDSC shall not be
;* responsible for misuse or illegal use of this software for devices not
;* supported herein. HDSC is providing this software "AS IS" and will
;* not be responsible for issues arising from incorrect user implementation
;* of the software.
;*
;* Disclaimer:
;* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
;* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
;* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
;* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
;* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
;* WARRANTY OF NONINFRINGEMENT.
;* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
;* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
;* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
;* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
;* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
;* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
;* SAVINGS OR PROFITS,
;* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
;* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
;* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
;* FROM, THE SOFTWARE.
;*
;* This software may be replicated in part or whole for the licensed use,
;* with the restriction that this Disclaimer and Copyright notice must be
;* included with each copy of this software, whether used in part or whole,
;* at all times.
;*/
;/*****************************************************************************/
;/*****************************************************************************/
;/* Startup for ARM */
;/* Version V1.0 */
;/* Date 2018-04-15 */
;/* Target-mcu {HC32L136} */
;/*****************************************************************************/
; Stack Configuration
; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
Stack_Size EQU 0x00000200
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; Heap Configuration
; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset
DCD NMI_Handler ; NMI
DCD HardFault_Handler ; Hard Fault
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV
DCD SysTick_Handler ; SysTick
DCD IRQ000_Handler ;
DCD IRQ001_Handler ;
DCD IRQ002_Handler ;
DCD IRQ003_Handler ;
DCD IRQ004_Handler ;
DCD IRQ005_Handler ;
DCD IRQ006_Handler ;
DCD IRQ007_Handler ;
DCD IRQ008_Handler ;
DCD IRQ009_Handler ;
DCD IRQ010_Handler ;
DCD IRQ011_Handler ;
DCD IRQ012_Handler ;
DCD IRQ013_Handler ;
DCD IRQ014_Handler ;
DCD IRQ015_Handler ;
DCD IRQ016_Handler ;
DCD IRQ017_Handler ;
DCD IRQ018_Handler ;
DCD IRQ019_Handler ;
DCD IRQ020_Handler ;
DCD IRQ021_Handler ;
DCD IRQ022_Handler ;
DCD IRQ023_Handler ;
DCD IRQ024_Handler ;
DCD IRQ025_Handler ;
DCD IRQ026_Handler ;
DCD IRQ027_Handler ;
DCD IRQ028_Handler ;
DCD IRQ029_Handler ;
DCD IRQ030_Handler ;
DCD IRQ031_Handler ;
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
;reset NVIC if in rom debug
LDR R0, =0x20000000
LDR R2, =0x0
MOVS R1, #0 ; for warning,
ADD R1, PC,#0 ; for A1609W,
CMP R1, R0
BLS RAMCODE
; ram code base address.
ADD R2, R0,R2
RAMCODE
; reset Vector table address.
LDR R0, =0xE000ED08
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT IRQ000_Handler [WEAK]
EXPORT IRQ001_Handler [WEAK]
EXPORT IRQ002_Handler [WEAK]
EXPORT IRQ003_Handler [WEAK]
EXPORT IRQ004_Handler [WEAK]
EXPORT IRQ005_Handler [WEAK]
EXPORT IRQ006_Handler [WEAK]
EXPORT IRQ007_Handler [WEAK]
EXPORT IRQ008_Handler [WEAK]
EXPORT IRQ009_Handler [WEAK]
EXPORT IRQ010_Handler [WEAK]
EXPORT IRQ011_Handler [WEAK]
EXPORT IRQ012_Handler [WEAK]
EXPORT IRQ013_Handler [WEAK]
EXPORT IRQ014_Handler [WEAK]
EXPORT IRQ015_Handler [WEAK]
EXPORT IRQ016_Handler [WEAK]
EXPORT IRQ017_Handler [WEAK]
EXPORT IRQ018_Handler [WEAK]
EXPORT IRQ019_Handler [WEAK]
EXPORT IRQ020_Handler [WEAK]
EXPORT IRQ021_Handler [WEAK]
EXPORT IRQ022_Handler [WEAK]
EXPORT IRQ023_Handler [WEAK]
EXPORT IRQ024_Handler [WEAK]
EXPORT IRQ025_Handler [WEAK]
EXPORT IRQ026_Handler [WEAK]
EXPORT IRQ027_Handler [WEAK]
EXPORT IRQ028_Handler [WEAK]
EXPORT IRQ029_Handler [WEAK]
EXPORT IRQ030_Handler [WEAK]
EXPORT IRQ031_Handler [WEAK]
IRQ000_Handler
IRQ001_Handler
IRQ002_Handler
IRQ003_Handler
IRQ004_Handler
IRQ005_Handler
IRQ006_Handler
IRQ007_Handler
IRQ008_Handler
IRQ009_Handler
IRQ010_Handler
IRQ011_Handler
IRQ012_Handler
IRQ013_Handler
IRQ014_Handler
IRQ015_Handler
IRQ016_Handler
IRQ017_Handler
IRQ018_Handler
IRQ019_Handler
IRQ020_Handler
IRQ021_Handler
IRQ022_Handler
IRQ023_Handler
IRQ024_Handler
IRQ025_Handler
IRQ026_Handler
IRQ027_Handler
IRQ028_Handler
IRQ029_Handler
IRQ030_Handler
IRQ031_Handler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Source/IAR/startup_hc32l136.s
+353
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@@ -0,0 +1,353 @@
;*******************************************************************************
; Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
;
; This software is owned and published by:
; Huada Semiconductor Co.,Ltd ("HDSC").
;
; BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
; BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
;
; This software contains source code for use with HDSC
; components. This software is licensed by HDSC to be adapted only
; for use in systems utilizing HDSC components. HDSC shall not be
; responsible for misuse or illegal use of this software for devices not
; supported herein. HDSC is providing this software "AS IS" and will
; not be responsible for issues arising from incorrect user implementation
; of the software.
;
; Disclaimer:
; HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
; REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
; ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
; WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
; WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
; WARRANTY OF NONINFRINGEMENT.
; HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
; NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
; LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
; LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
; INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
; INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
; SAVINGS OR PROFITS,
; EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
; YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
; INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
; FROM, THE SOFTWARE.
;
; This software may be replicated in part or whole for the licensed use,
; with the restriction that this Disclaimer and Copyright notice must be
; included with each copy of this software, whether used in part or whole,
; at all times.
;/
;/*****************************************************************************/
;/* Startup for IAR */
;/* Version V1.0 */
;/* Date 2018-04-15 */
;/* Target-mcu M0+ Device */
;/*****************************************************************************/
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
SECTION .intvec:CODE:ROOT(8)
DATA
__vector_table DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler ; NMI
DCD HardFault_Handler ; Hard Fault
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall
DCD 0 ; Debug Monitor
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV
DCD SysTick_Handler ; SysTick
; Numbered IRQ handler vectors
; Note: renaming to device dependent ISR function names are done in
DCD IRQ000_Handler
DCD IRQ001_Handler
DCD IRQ002_Handler
DCD IRQ003_Handler
DCD IRQ004_Handler
DCD IRQ005_Handler
DCD IRQ006_Handler
DCD IRQ007_Handler
DCD IRQ008_Handler
DCD IRQ009_Handler
DCD IRQ010_Handler
DCD IRQ011_Handler
DCD IRQ012_Handler
DCD IRQ013_Handler
DCD IRQ014_Handler
DCD IRQ015_Handler
DCD IRQ016_Handler
DCD IRQ017_Handler
DCD IRQ018_Handler
DCD IRQ019_Handler
DCD IRQ020_Handler
DCD IRQ021_Handler
DCD IRQ022_Handler
DCD IRQ023_Handler
DCD IRQ024_Handler
DCD IRQ025_Handler
DCD IRQ026_Handler
DCD IRQ027_Handler
DCD IRQ028_Handler
DCD IRQ029_Handler
DCD IRQ030_Handler
DCD IRQ031_Handler
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:NOROOT:REORDER(2)
Reset_Handler
;reset NVIC if in rom debug
LDR R0, =0x20000000
LDR R2, =0x0 ; vector offset
cmp PC, R0
bls ROMCODE
; ram code base address.
ADD R2, R0,R2
ROMCODE
; reset Vector table address.
LDR R0, =0xE000ED08
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK SVC_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SVC_Handler
B SVC_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
SysTick_Handler
B SysTick_Handler
PUBWEAK IRQ000_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ000_Handler
B IRQ000_Handler
PUBWEAK IRQ001_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ001_Handler
B IRQ001_Handler
PUBWEAK IRQ002_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ002_Handler
B IRQ002_Handler
PUBWEAK IRQ003_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ003_Handler
B IRQ003_Handler
PUBWEAK IRQ004_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ004_Handler
B IRQ004_Handler
PUBWEAK IRQ005_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ005_Handler
B IRQ005_Handler
PUBWEAK IRQ006_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ006_Handler
B IRQ006_Handler
PUBWEAK IRQ007_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ007_Handler
B IRQ007_Handler
PUBWEAK IRQ008_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ008_Handler
B IRQ008_Handler
PUBWEAK IRQ009_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ009_Handler
B IRQ009_Handler
PUBWEAK IRQ010_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ010_Handler
B IRQ010_Handler
PUBWEAK IRQ011_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ011_Handler
B IRQ011_Handler
PUBWEAK IRQ012_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ012_Handler
B IRQ012_Handler
PUBWEAK IRQ013_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ013_Handler
B IRQ013_Handler
PUBWEAK IRQ014_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ014_Handler
B IRQ014_Handler
PUBWEAK IRQ015_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ015_Handler
B IRQ015_Handler
PUBWEAK IRQ016_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ016_Handler
B IRQ016_Handler
PUBWEAK IRQ017_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ017_Handler
B IRQ017_Handler
PUBWEAK IRQ018_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ018_Handler
B IRQ018_Handler
PUBWEAK IRQ019_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ019_Handler
B IRQ019_Handler
PUBWEAK IRQ020_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ020_Handler
B IRQ020_Handler
PUBWEAK IRQ021_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ021_Handler
B IRQ021_Handler
PUBWEAK IRQ022_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ022_Handler
B IRQ022_Handler
PUBWEAK IRQ023_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ023_Handler
B IRQ023_Handler
PUBWEAK IRQ024_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ024_Handler
B IRQ024_Handler
PUBWEAK IRQ025_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ025_Handler
B IRQ025_Handler
PUBWEAK IRQ026_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ026_Handler
B IRQ026_Handler
PUBWEAK IRQ027_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ027_Handler
B IRQ027_Handler
PUBWEAK IRQ028_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ028_Handler
B IRQ028_Handler
PUBWEAK IRQ029_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ029_Handler
B IRQ029_Handler
PUBWEAK IRQ030_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ030_Handler
B IRQ030_Handler
PUBWEAK IRQ031_Handler
SECTION .text:CODE:NOROOT:REORDER(1)
IRQ031_Handler
B IRQ031_Handler
END
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Source/interrupts_hc32l136.c
+477
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@@ -0,0 +1,477 @@
/******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file interrupts_hc32l136.c
**
** Interrupt management
** @link Driver Group Some description @endlink
**
** - 2018-04-15 1.0 Lux First version.
**
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#include "interrupts_hc32l136.h"
void Gpio_IRQHandler(uint8_t u8Param);
__WEAKDEF void Dma_IRQHandler(uint8_t u8Param);
void Uart_IRQHandler(uint8_t u8Param);
__WEAKDEF void LpUart_IRQHandler(uint8_t u8Param);
__WEAKDEF void Spi_IRQHandler(uint8_t u8Param);
__WEAKDEF void I2c_IRQHandler(uint8_t u8Param);
__WEAKDEF void Tim_IRQHandler(uint8_t u8Param);
__WEAKDEF void Tim3_IRQHandler(uint8_t u8Param);
__WEAKDEF void Adt_IRQHandler(uint8_t u8Param);
__WEAKDEF void LpTim_IRQHandler(uint8_t u8Param);
__WEAKDEF void Pca_IRQHandler(uint8_t u8Param);
__WEAKDEF void Wdt_IRQHandler(uint8_t u8Param);
__WEAKDEF void Vc_IRQHandler(uint8_t u8Param);
__WEAKDEF void Rtc_IRQHandler(uint8_t u8Param);
__WEAKDEF void Adc_IRQHandler(uint8_t u8Param);
__WEAKDEF void Pcnt_IRQHandler(uint8_t u8Param);
__WEAKDEF void Lvd_IRQHandler(uint8_t u8Param);
__WEAKDEF void Lcd_IRQHandler(uint8_t u8Param);
__WEAKDEF void EfRam_IRQHandler(uint8_t u8Param);
__WEAKDEF void ClkTrim_IRQHandler(uint8_t u8Param);
/**
*******************************************************************************
** \brief NVIC 中断使能
**
** \param [in] enIrq 中断号枚举类型
** \param [in] enLevel 中断优先级枚举类型
** \param [in] bEn 中断开关
** \retval Ok 设置成功
** 其他值 设置失败
******************************************************************************/
void EnableNvic(IRQn_Type enIrq, en_irq_level_t enLevel, boolean_t bEn)
{
NVIC_ClearPendingIRQ(enIrq);
NVIC_SetPriority(enIrq, enLevel);
if (TRUE == bEn)
{
NVIC_EnableIRQ(enIrq);
}
else
{
NVIC_DisableIRQ(enIrq);
}
}
/**
*******************************************************************************
** \brief NVIC hardware fault 中断实现
** 用于单步调试功能
**
** \retval
******************************************************************************/
//void HardFault_Handler(void)
//{
// volatile int a = 0;
// while( 0 == a)
// {
// ;
// }
//}
/**
*******************************************************************************
** \brief GPIO PortA 中断处理函数
**
** \retval
******************************************************************************/
void PORTA_IRQHandler(void)
{
Gpio_IRQHandler(0);
}
/**
*******************************************************************************
** \brief GPIO PortB 中断处理函数
**
** \retval
******************************************************************************/
void PORTB_IRQHandler(void)
{
Gpio_IRQHandler(1);
}
/**
*******************************************************************************
** \brief GPIO PortC 中断处理函数
**
** \retval
******************************************************************************/
void PORTC_IRQHandler(void)
{
Gpio_IRQHandler(2);
}
/**
*******************************************************************************
** \brief GPIO PortD 中断处理函数
**
** \retval
******************************************************************************/
void PORTD_IRQHandler(void)
{
Gpio_IRQHandler(3);
}
/**
*******************************************************************************
** \brief DMAC 中断处理函数
**
** \retval
******************************************************************************/
void DMAC_IRQHandler(void)
{
Dma_IRQHandler(0);
}
/**
*******************************************************************************
** \brief UART0 串口0 中断处理函数
**
** \retval
******************************************************************************/
void UART0_IRQHandler(void)
{
Uart_IRQHandler(0);
}
/**
*******************************************************************************
** \brief UART1 串口1 中断处理函数
**
** \retval
******************************************************************************/
void UART1_IRQHandler(void)
{
Uart_IRQHandler(1);
}
/**
*******************************************************************************
** \brief LPUART0 低功耗串口0 中断处理函数
**
** \retval
******************************************************************************/
void LPUART0_IRQHandler(void)
{
LpUart_IRQHandler(0);
}
/**
*******************************************************************************
** \brief LPUART1 低功耗串口1 中断处理函数
**
** \retval
******************************************************************************/
void LPUART1_IRQHandler(void)
{
LpUart_IRQHandler(1);
}
/**
*******************************************************************************
** \brief SPI0 中断处理函数
**
** \retval
******************************************************************************/
void SPI0_IRQHandler(void)
{
Spi_IRQHandler(0);
}
/**
*******************************************************************************
** \brief SPI1 中断处理函数
**
** \retval
******************************************************************************/
void SPI1_IRQHandler(void)
{
Spi_IRQHandler(1);
}
/**
*******************************************************************************
** \brief I2C0 中断处理函数
**
** \retval
******************************************************************************/
void I2C0_IRQHandler(void)
{
I2c_IRQHandler(0);
}
/**
*******************************************************************************
** \brief I2C1 中断处理函数
**
** \retval
******************************************************************************/
void I2C1_IRQHandler(void)
{
I2c_IRQHandler(1);
}
/**
*******************************************************************************
** \brief TIM0 基础时钟0 中断处理函数
**
** \retval
******************************************************************************/
void TIM0_IRQHandler(void)
{
Tim_IRQHandler(0);
}
/**
*******************************************************************************
** \brief TIM1 基础时钟1 中断处理函数
**
** \retval
******************************************************************************/
void TIM1_IRQHandler(void)
{
Tim_IRQHandler(1);
}
/**
*******************************************************************************
** \brief TIM2 基础时钟2 中断处理函数
**
** \retval
******************************************************************************/
void TIM2_IRQHandler(void)
{
Tim_IRQHandler(2);
}
/**
*******************************************************************************
** \brief TIM3 基础时钟3 中断处理函数
**
** \retval
******************************************************************************/
void TIM3_IRQHandler(void)
{
Tim3_IRQHandler(0);
}
/**
*******************************************************************************
** \brief LPTIM 低功耗时钟 中断处理函数
**
** \retval
******************************************************************************/
void LPTIM_IRQHandler(void)
{
LpTim_IRQHandler(0);
}
/**
*******************************************************************************
** \brief TIM4 高级时钟4 中断处理函数
**
** \retval
******************************************************************************/
void TIM4_IRQHandler(void)
{
Adt_IRQHandler(4);
}
/**
*******************************************************************************
** \brief TIM5 高级时钟5 中断处理函数
**
** \retval
******************************************************************************/
void TIM5_IRQHandler(void)
{
Adt_IRQHandler(5);
}
/**
*******************************************************************************
** \brief TIM6 高级时钟6 中断处理函数
**
** \retval
******************************************************************************/
void TIM6_IRQHandler(void)
{
Adt_IRQHandler(6);
}
/**
*******************************************************************************
** \brief PCA 中断处理函数
**
** \retval
******************************************************************************/
void PCA_IRQHandler(void)
{
Pca_IRQHandler(0);
}
/**
*******************************************************************************
** \brief WDT 中断处理函数
**
** \retval
******************************************************************************/
void WDT_IRQHandler(void)
{
Wdt_IRQHandler(0);
}
/**
*******************************************************************************
** \brief RTC 中断处理函数
**
** \retval
******************************************************************************/
void RTC_IRQHandler(void)
{
Rtc_IRQHandler(0);
}
/**
*******************************************************************************
** \brief ADC 中断处理函数
**
** \retval
******************************************************************************/
void ADC_IRQHandler(void)
{
Adc_IRQHandler(0);
}
/**
*******************************************************************************
** \brief PCNT 中断处理函数
**
** \retval
******************************************************************************/
void PCNT_IRQHandler(void)
{
Pcnt_IRQHandler(0);
}
/**
*******************************************************************************
** \brief 电压比较0 中断处理函数
**
** \retval
******************************************************************************/
void VC0_IRQHandler(void)
{
Vc_IRQHandler(0);
}
/**
*******************************************************************************
** \brief 电压比较1 中断处理函数
**
** \retval
******************************************************************************/
void VC1_IRQHandler(void)
{
Vc_IRQHandler(1);
}
/**
*******************************************************************************
** \brief 低电压检测 中断处理函数
**
** \retval
******************************************************************************/
void LVD_IRQHandler(void)
{
Lvd_IRQHandler(0);
}
/**
*******************************************************************************
** \brief LCD 中断处理函数
**
** \retval
******************************************************************************/
void LCD_IRQHandler(void)
{
Lcd_IRQHandler(0);
}
/**
*******************************************************************************
** \brief RAM 中断处理函数
**
** \retval
******************************************************************************/
void EF_RAM_IRQHandler(void)
{
EfRam_IRQHandler(0);
}
/**
*******************************************************************************
** \brief 时钟校准 中断处理函数
**
** \retval
******************************************************************************/
void CLKTRIM_IRQHandler(void)
{
ClkTrim_IRQHandler(0);
}
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Source/system_hc32l136.h
+107
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/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file system_hc32l136.h
**
** A detailed description is available at
** @link SampleGroup Some description @endlink
**
** - 2018-03-09 1.0 Lux First version.
**
******************************************************************************/
#ifndef __SYSTEM_HC32L136_H__
#define __SYSTEM_HC32L136_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************/
/* Global pre-processor symbols/macros ('define') */
/******************************************************************************/
#define HWWD_DISABLE (1)
/**
******************************************************************************
** \brief Clock Setup macro definition
**
** - 0: CLOCK_SETTING_NONE - User provides own clock setting in application
** - 1: CLOCK_SETTING_CMSIS -
******************************************************************************/
#define CLOCK_SETTING_NONE 0u
#define CLOCK_SETTING_CMSIS 1u
/******************************************************************************/
/* */
/* START OF USER SETTINGS HERE */
/* =========================== */
/* */
/* All lines with '<<<' can be set by user. */
/* */
/******************************************************************************/
/******************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/******************************************************************************/
extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
extern void SystemInit (void); // Initialize the system
extern void SystemCoreClockUpdate (void); // Update SystemCoreClock variable
#ifdef __cplusplus
}
#endif
#endif /* __SYSTEM_HC32L136_H__ */
bsp/hc32l136/Libraries/CMSIS/Device/HDSC/HC32L136/Source/system_hc32l13x.c
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/*******************************************************************************
* Copyright (C) 2019, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file system_hc32l13x.c
**
** System clock initialization.
** @link SampleGroup Some description @endlink
**
** - 2019-03-01 1.0 Lux First version.
**
******************************************************************************/
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "base_types.h"
#include "hc32l136.h"
#include "system_hc32l13x.h"
#include "sysctrl.h"
/**
******************************************************************************
** System Clock Frequency (Core Clock) Variable according CMSIS
******************************************************************************/
uint32_t SystemCoreClock = 4000000;
//add clock source.
void SystemCoreClockUpdate (void) // Update SystemCoreClock variable
{
SystemCoreClock = Sysctrl_GetHClkFreq();
}
/**
******************************************************************************
** \brief Setup the microcontroller system. Initialize the System and update
** the SystemCoreClock variable.
**
** \param none
** \return none
******************************************************************************/
void SystemInit(void)
{
SystemCoreClockUpdate();
}
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/**************************************************************************//**
* @file cmsis_compiler.h
* @brief CMSIS compiler generic header file
* @version V5.1.0
* @date 09. October 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_COMPILER_H
#define __CMSIS_COMPILER_H
#include <stdint.h>
/*
* Arm Compiler 4/5
*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*
* Arm Compiler 6.6 LTM (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
#include "cmsis_armclang_ltm.h"
/*
* Arm Compiler above 6.10.1 (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
#include "cmsis_armclang.h"
/*
* GNU Compiler
*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*
* IAR Compiler
*/
#elif defined ( __ICCARM__ )
#include <cmsis_iccarm.h>
/*
* TI Arm Compiler
*/
#elif defined ( __TI_ARM__ )
#include <cmsis_ccs.h>
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* TASKING Compiler
*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __packed__
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __packed__
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __packed__
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __packed__ T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __align(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* COSMIC Compiler
*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#ifndef __ASM
#define __ASM _asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
// NO RETURN is automatically detected hence no warning here
#define __NO_RETURN
#endif
#ifndef __USED
#warning No compiler specific solution for __USED. __USED is ignored.
#define __USED
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __PACKED
#define __PACKED @packed
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT @packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION @packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
@packed struct T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#else
#error Unknown compiler.
#endif
#endif /* __CMSIS_COMPILER_H */
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/**************************************************************************//**
* @file cmsis_version.h
* @brief CMSIS Core(M) Version definitions
* @version V5.0.3
* @date 24. June 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CMSIS_VERSION_H
#define __CMSIS_VERSION_H
/* CMSIS Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
#endif
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/******************************************************************************
* @file mpu_armv7.h
* @brief CMSIS MPU API for Armv7-M MPU
* @version V5.1.0
* @date 08. March 2019
******************************************************************************/
/*
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV7_H
#define ARM_MPU_ARMV7_H
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
/** MPU Region Base Address Register Value
*
* \param Region The region to be configured, number 0 to 15.
* \param BaseAddress The base address for the region.
*/
#define ARM_MPU_RBAR(Region, BaseAddress) \
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
((Region) & MPU_RBAR_REGION_Msk) | \
(MPU_RBAR_VALID_Msk))
/**
* MPU Memory Access Attributes
*
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
*/
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
/**
* MPU Region Attribute and Size Register Value
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
(((MPU_RASR_ENABLE_Msk))))
/**
* MPU Region Attribute and Size Register Value
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
/**
* MPU Memory Access Attribute for strongly ordered memory.
* - TEX: 000b
* - Shareable
* - Non-cacheable
* - Non-bufferable
*/
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
/**
* MPU Memory Access Attribute for device memory.
* - TEX: 000b (if shareable) or 010b (if non-shareable)
* - Shareable or non-shareable
* - Non-cacheable
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
*
* \param IsShareable Configures the device memory as shareable or non-shareable.
*/
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
/**
* MPU Memory Access Attribute for normal memory.
* - TEX: 1BBb (reflecting outer cacheability rules)
* - Shareable or non-shareable
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
*
* \param OuterCp Configures the outer cache policy.
* \param InnerCp Configures the inner cache policy.
* \param IsShareable Configures the memory as shareable or non-shareable.
*/
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
/**
* MPU Memory Access Attribute non-cacheable policy.
*/
#define ARM_MPU_CACHEP_NOCACHE 0U
/**
* MPU Memory Access Attribute write-back, write and read allocate policy.
*/
#define ARM_MPU_CACHEP_WB_WRA 1U
/**
* MPU Memory Access Attribute write-through, no write allocate policy.
*/
#define ARM_MPU_CACHEP_WT_NWA 2U
/**
* MPU Memory Access Attribute write-back, no write allocate policy.
*/
#define ARM_MPU_CACHEP_WB_NWA 3U
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; //!< The region base address register value (RBAR)
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
MPU->RNR = rnr;
MPU->RASR = 0U;
}
/** Configure an MPU region.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
{
MPU->RBAR = rbar;
MPU->RASR = rasr;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
{
MPU->RNR = rnr;
MPU->RBAR = rbar;
MPU->RASR = rasr;
}
/** Memcopy with strictly ordered memory access, e.g. for register targets.
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
while (cnt > MPU_TYPE_RALIASES) {
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
table += MPU_TYPE_RALIASES;
cnt -= MPU_TYPE_RALIASES;
}
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
}
#endif
bsp/hc32l136/Libraries/CMSIS/Include/mpu_armv8.h
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/******************************************************************************
* @file mpu_armv8.h
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
* @version V5.1.0
* @date 08. March 2019
******************************************************************************/
/*
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV8_H
#define ARM_MPU_ARMV8_H
/** \brief Attribute for device memory (outer only) */
#define ARM_MPU_ATTR_DEVICE ( 0U )
/** \brief Attribute for non-cacheable, normal memory */
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
/** \brief Attribute for normal memory (outer and inner)
* \param NT Non-Transient: Set to 1 for non-transient data.
* \param WB Write-Back: Set to 1 to use write-back update policy.
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
*/
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
(((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
/** \brief Memory Attribute
* \param O Outer memory attributes
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
*/
#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
/** \brief Normal memory non-shareable */
#define ARM_MPU_SH_NON (0U)
/** \brief Normal memory outer shareable */
#define ARM_MPU_SH_OUTER (2U)
/** \brief Normal memory inner shareable */
#define ARM_MPU_SH_INNER (3U)
/** \brief Memory access permissions
* \param RO Read-Only: Set to 1 for read-only memory.
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
*/
#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
((BASE & MPU_RBAR_BASE_Msk) | \
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Limit Address Register value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR(LIMIT, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
/** \brief Region Limit Address Register with PXN value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
#ifdef MPU_NS
/** Enable the Non-secure MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
{
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the Non-secure MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
#endif
/** Set the memory attribute encoding to the given MPU.
* \param mpu Pointer to the MPU to be configured.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
{
const uint8_t reg = idx / 4U;
const uint32_t pos = ((idx % 4U) * 8U);
const uint32_t mask = 0xFFU << pos;
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
return; // invalid index
}
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
}
/** Set the memory attribute encoding.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
}
#ifdef MPU_NS
/** Set the memory attribute encoding to the Non-secure MPU.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
}
#endif
/** Clear and disable the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
{
mpu->RNR = rnr;
mpu->RLAR = 0U;
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU, rnr);
}
#ifdef MPU_NS
/** Clear and disable the given Non-secure MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
}
#endif
/** Configure the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
mpu->RNR = rnr;
mpu->RBAR = rbar;
mpu->RLAR = rlar;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
}
#ifdef MPU_NS
/** Configure the given Non-secure MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
}
#endif
/** Memcopy with strictly ordered memory access, e.g. for register targets.
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table to the given MPU.
* \param mpu Pointer to the MPU registers to be used.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
if (cnt == 1U) {
mpu->RNR = rnr;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
} else {
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
table += c;
cnt -= c;
rnrOffset = 0U;
rnrBase += MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
}
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
}
}
/** Load the given number of MPU regions from a table.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
}
#ifdef MPU_NS
/** Load the given number of MPU regions from a table to the Non-secure MPU.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
}
#endif
#endif
bsp/hc32l136/Libraries/CMSIS/Include/tz_context.h
+70
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/******************************************************************************
* @file tz_context.h
* @brief Context Management for Armv8-M TrustZone
* @version V1.0.1
* @date 10. January 2018
******************************************************************************/
/*
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H
#include <stdint.h>
#ifndef TZ_MODULEID_T
#define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process.
typedef uint32_t TZ_ModuleId_t;
#endif
/// \details TZ Memory ID identifies an allocated memory slot.
typedef uint32_t TZ_MemoryId_t;
/// Initialize secure context memory system
/// \return execution status (1: success, 0: error)
uint32_t TZ_InitContextSystem_S (void);
/// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
/// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
/// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
#endif // TZ_CONTEXT_H
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/adc.h
+486
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/******************************************************************************
* Copyright (C) 2017, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file adc.h
**
** Header file for AD Converter functions
** @link ADC Group Some description @endlink
**
** - 2017-06-28 Alex First Version
**
******************************************************************************/
#ifndef __ADC_H__
#define __ADC_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
#include "interrupts_hc32l136.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup AdcGroup AD Converter (ADC)
**
******************************************************************************/
//@{
/******************************************************************************
* Global definitions
******************************************************************************/
#define ADC_SCAN_CH0_EN (0x1u) /*!< SCAN模式使用ADC CH0 */
#define ADC_SCAN_CH1_EN (0x1u<<1) /*!< SCAN模式使用ADC CH1 */
#define ADC_SCAN_CH2_EN (0x1u<<2) /*!< SCAN模式使用ADC CH2 */
#define ADC_SCAN_CH3_EN (0x1u<<3) /*!< SCAN模式使用ADC CH3 */
#define ADC_SCAN_CH4_EN (0x1u<<4) /*!< SCAN模式使用ADC CH4 */
#define ADC_SCAN_CH5_EN (0x1u<<5) /*!< SCAN模式使用ADC CH5 */
#define ADC_SCAN_CH6_EN (0x1u<<6) /*!< SCAN模式使用ADC CH6 */
#define ADC_SCAN_CH7_EN (0x1u<<7) /*!< SCAN模式使用ADC CH7 */
/******************************************************************************
** Global type definitions
*****************************************************************************/
/**
******************************************************************************
** \brief ADC采样模式
*****************************************************************************/
typedef enum en_adc_op_mode
{
AdcSglMode = 0u, /*!< 单输入通道单次采样模式 */
AdcSCanMode = 1u, /*!< 多输入通道顺序扫描采样模式,多输入通道插队扫描采样模式*/
} en_adc_op_mode_t;
/**
******************************************************************************
** \brief ADC时钟选择
*****************************************************************************/
typedef enum en_adc_clk_sel
{
AdcClkSysTDiv1 = 0u, /*!< PCLK */
AdcClkSysTDiv2 = 1u, /*!< 1/2 PCLK */
AdcClkSysTDiv4 = 2u, /*!< 1/4 PCLK */
AdcClkSysTDiv8 = 3u, /*!< 1/8 PCLK */
} en_adc_clk_div_t;
/**
******************************************************************************
** \brief ADC参考电压
*****************************************************************************/
typedef enum en_adc_ref_vol_sel
{
RefVolSelInBgr1p5 = 0u, /*!<内部参考电压1.5V(SPS<=200kHz)*/
RefVolSelInBgr2p5 = 1u, /*!<内部参考电压2.5V(avdd>3V,SPS<=200kHz)*/
RefVolSelExtern1 = 2u, /*!<外部输入(max avdd) PB01*/
RefVolSelAVDD = 3u, /*!<AVDD*/
}en_adc_ref_vol_sel_t;
/**
******************************************************************************
** \brief ADC采样通道选择
*****************************************************************************/
typedef enum en_adc_samp_ch_sel
{
AdcExInputCH0 = 0u, /*!<使用通道0输入PA00*/
AdcExInputCH1 = 1u, /*!<使用通道1输入PA01*/
AdcExInputCH2 = 2u, /*!<使用通道2输入PA02*/
AdcExInputCH3 = 3u, /*!<使用通道3输入PA03*/
AdcExInputCH4 = 4u, /*!<使用通道4输入PA04*/
AdcExInputCH5 = 5u, /*!<使用通道5输入PA05*/
AdcExInputCH6 = 6u, /*!<使用通道6输入PA06*/
AdcExInputCH7 = 7u, /*!<使用通道7输入PA07*/
AdcExInputCH8 = 8u, /*!<使用通道8输入PB00*/
AdcExInputCH9 = 9u, /*!<使用通道8输入PB01*/
AdcExInputCH10 = 10u, /*!<使用通道8输入PC00*/
AdcExInputCH11 = 11u, /*!<使用通道1输入PC01*/
AdcExInputCH12 = 12u, /*!<使用通道2输入PC02*/
AdcExInputCH13 = 13u, /*!<使用通道3输入PC03*/
AdcExInputCH14 = 14u, /*!<使用通道4输入PC04*/
AdcExInputCH15 = 15u, /*!<使用通道5输入PC05*/
AdcExInputCH16 = 16u, /*!<使用通道6输入PB02*/
AdcExInputCH17 = 17u, /*!<使用通道7输入PB10*/
AdcExInputCH18 = 18u, /*!<使用通道8输入PB11*/
AdcExInputCH19 = 19u, /*!<使用通道8输入PB12*/
AdcExInputCH20 = 20u, /*!<使用通道7输入PB13*/
AdcExInputCH21 = 21u, /*!<使用通道8输入PB14*/
AdcExInputCH22 = 22u, /*!<使用通道8输入PB15*/
AdcExInputCH23 = 23u, /*!<使用通道8输入PC06*/
AdcOPA0Input = 24u, /*!<使用通道8输入OPA0*/
AdcOPA1Input = 25u, /*!<使用通道8输入OPA1*/
AdcOPA2Input = 26u, /*!<使用通道8输入OPA2*/
AdcAVccDiV3Input = 27u, /*!<使用1/3 AVCC(必须使用输入增益)*/
AdcAiTsInput = 28u, /*!<使用BGR_TS(必须使用输入增益)*/
AdcVref1P2Input = 29u, /*!<使用Vref1P2(必须使用输入增益)*/
}en_adc_samp_ch_sel_t;
/**
******************************************************************************
** \brief ADC采样周期数选择
*****************************************************************************/
typedef enum en_adc_samp_time_sel
{
AdcSampTime4Clk = 0u, /*!<4个采样时钟*/
AdcSampTime6Clk = 1u, /*!<6个采样时钟*/
AdcSampTime8Clk = 2u, /*!<8个采样时钟*/
AdcSampTime12Clk = 3u, /*!<12个采样时钟*/
}en_adc_samp_time_sel_t;
/**
******************************************************************************
** \brief ADC周边模块反射源选择
*****************************************************************************/
typedef enum en_adc_trig_sel
{
AdcTrigTimer0 = 0u, /*!<选择timer0中断源，自动触发ADC采样*/
AdcTrigTimer1 = 1u, /*!<选择timer1中断源，自动触发ADC采样*/
AdcTrigTimer2 = 2u, /*!<选择timer2中断源，自动触发ADC采样*/
AdcTrigTimer3 = 3u, /*!<选择timer3中断源，自动触发ADC采样*/
AdcTrigTimer4 = 4u, /*!<选择timer4中断源，自动触发ADC采样*/
AdcTrigTimer5 = 5u, /*!<选择timer5中断源，自动触发ADC采样*/
AdcTrigTimer6 = 6u, /*!<选择timer6中断源，自动触发ADC采样*/
AdcTrigUart0 = 7u, /*!<选择uart0中断源，自动触发ADC采样*/
AdcTrigUart1 = 8u, /*!<选择uart1中断源，自动触发ADC采样*/
AdcTrigLpuart0 = 9u, /*!<选择lpuart0中断源，自动触发ADC采样*/
AdcTrigLpuart1 = 10u, /*!<选择lpuart1中断源，自动触发ADC采样*/
AdcTrigVC0 = 11u, /*!<选择VC0中断源，自动触发ADC采样*/
AdcTrigVC1 = 12u, /*!<选择VC1中断源，自动触发ADC采样*/
AdcTrigRTC = 13u, /*!<选择RTC中断源，自动触发ADC采样*/
AdcTrigPCA = 14u, /*!<选择PCA中断源，自动触发ADC采样*/
AdcTrigSPI0 = 15u, /*!<选择SPI0中断源，自动触发ADC采样*/
AdcTrigSPI1 = 16u, /*!<选择SPI1中断源，自动触发ADC采样*/
AdcTrigDMA = 17u, /*!<选择DMA中断源，自动触发ADC采样*/
AdcTrigPA03 = 18u, /*!<选择PA03中断源，自动触发ADC采样*/
AdcTrigPB03 = 19u, /*!<选择PB03中断源，自动触发ADC采样*/
AdcTrigPC03 = 20u, /*!<选择PC03中断源，自动触发ADC采样*/
AdcTrigPD03 = 21u, /*!<选择PD03中断源，自动触发ADC采样*/
AdcTrigPA07 = 22u, /*!<选择PA07中断源，自动触发ADC采样*/
AdcTrigPB07 = 23u, /*!<选择PB07中断源，自动触发ADC采样*/
AdcTrigPC07 = 24u, /*!<选择PC07中断源，自动触发ADC采样*/
AdcTrigPD07 = 25u, /*!<选择PD07中断源，自动触发ADC采样*/
AdcTrigPA11 = 26u, /*!<选择PA11中断源，自动触发ADC采样*/
AdcTrigPB11 = 27u, /*!<选择PB11中断源，自动触发ADC采样*/
AdcTrigPC11 = 28u, /*!<选择PC11中断源，自动触发ADC采样*/
AdcTrigPA15 = 29u, /*!<选择PA15中断源，自动触发ADC采样*/
AdcTrigPB15 = 30u, /*!<选择PB15中断源，自动触发ADC采样*/
AdcTrigPC15 = 31u, /*!<选择PC15中断源，自动触发ADC采样*/
}en_adc_trig_sel_t;
/**
******************************************************************************
** \brief ADC外部触发源寄存器选择
*****************************************************************************/
typedef enum en_adc_ext_trig_sel
{
AdcExtTrig0 = 0u, /*!<单次及顺序扫描转换 外部触发源选择寄存器*/
AdcExtTrig1 = 1u, /*!<插队扫描转换 外部触发源选择寄存器*/
}en_adc_ext_trig_sel_t;
/**
******************************************************************************
** \brief ADC顺序转换通道
*****************************************************************************/
typedef enum en_adc_sqr_chmux
{
CH0MUX = 0u, /*!<转换通道0*/
CH1MUX = 1u, /*!<转换通道1*/
CH2MUX = 2u, /*!<转换通道2*/
CH3MUX = 3u, /*!<转换通道3*/
CH4MUX = 4u, /*!<转换通道4*/
CH5MUX = 5u, /*!<转换通道5*/
CH6MUX = 6u, /*!<转换通道6*/
CH7MUX = 7u, /*!<转换通道7*/
CH8MUX = 8u, /*!<转换通道8*/
CH9MUX = 9u, /*!<转换通道9*/
CH10MUX = 10u, /*!<转换通道10*/
CH11MUX = 11u, /*!<转换通道11*/
CH12MUX = 12u, /*!<转换通道12*/
CH13MUX = 13u, /*!<转换通道13*/
CH14MUX = 14u, /*!<转换通道14*/
CH15MUX = 15u, /*!<转换通道15*/
}en_adc_sqr_chmux_t;
/**
******************************************************************************
** \brief ADC插队转换通道
*****************************************************************************/
typedef enum en_adc_jqr_chmux
{
JQRCH0MUX = 0u, /*!<转换通道0*/
JQRCH1MUX = 1u, /*!<转换通道1*/
JQRCH2MUX = 2u, /*!<转换通道2*/
JQRCH3MUX = 3u, /*!<转换通道3*/
}en_adc_jqr_chmux_t;
/**
******************************************************************************
** \brief ADC结果对齐方式
*****************************************************************************/
typedef enum en_adc_align
{
AlignRight = 0u,
AlignLeft = 1u,
}en_adc_align_t;
/******************************************************************************
* Extern type definitions ('typedef') *
******************************************************************************/
/**
******************************************************************************
** \brief ADC配置
*****************************************************************************/
typedef struct stc_adc_cfg
{
/*! ADC操作模式*/
en_adc_op_mode_t enAdcOpMode;
/*! ADC时钟选择*/
en_adc_clk_div_t enAdcClkDiv;
/*! ADC采样时间*/
en_adc_samp_time_sel_t enAdcSampTimeSel;
/*! ADC参考电压*/
en_adc_ref_vol_sel_t enAdcRefVolSel;
/*! ADC输入增益使能*/
boolean_t bAdcInBufEn;
}stc_adc_cfg_t;
/**
******************************************************************************
** \brief ADC DMA触发源寄存器配置
*****************************************************************************/
typedef enum en_adc_dmatrig
{
/*!插队扫描触发DMA读取控制*/
DmaJqr = 0,
/*!顺序扫描触发DMA读取控制*/
DmaSqr = 1
}en_adc_dmatrig_t;
/**
******************************************************************************
** \brief ADC外部触发源寄存器配置
*****************************************************************************/
typedef struct stc_adc_ext_trig_cfg
{
/*! 外部触发源寄存器选择*/
en_adc_ext_trig_sel_t enAdcExtTrigRegSel;
/*! ADC单次及顺序转换触发选择*/
en_adc_trig_sel_t enAdcTrig0Sel;
/*! ADC插队转换触发选择*/
en_adc_trig_sel_t enAdcTrig1Sel;
}stc_adc_ext_trig_cfg_t;
/**
******************************************************************************
** \brief ADC中断配置
*****************************************************************************/
typedef struct stc_adc_irq
{
/*!<ADC插队扫描完成中断*/
boolean_t bAdcJQRIrq;
/*!<ADC顺序扫描完成中断*/
boolean_t bAdcSQRIrq;
/*! ADC区间中断*/
boolean_t bAdcRegCmp;
/*! ADC上超出区间中断*/
boolean_t bAdcHhtCmp;
/*! ADC下超出区间中断*/
boolean_t bAdcLltCmp;
/*!<ADC单次转换完成中断*/
boolean_t bAdcIrq;
}stc_adc_irq_t;
typedef struct stc_adc_threshold_cfg
{
boolean_t bAdcRegCmp ; /*!ADC区间使能*/
boolean_t bAdcHhtCmp ; /*!ADC上超出区间使能*/
boolean_t bAdcLltCmp ; /*!ADC下超出区间使能*/
uint32_t u32AdcRegHighThd; /*!ADC下超出区间*/
uint32_t u32AdcRegLowThd; /*!ADC下超出区间*/
en_adc_samp_ch_sel_t enThCh; /*!阈值比较通道选择*/
}stc_adc_threshold_cfg_t;
/**
******************************************************************************
** \brief ADC中断回调函数
*****************************************************************************/
typedef struct stc_adc_irq_calbakfn_pt
{
/*! ADC插队扫描中断回调函数指针*/
func_ptr_t pfnAdcJQRIrq;
/*! ADC顺序扫描中断回调函数指针*/
func_ptr_t pfnAdcSQRIrq;
/*! ADC区间中断回调函数指针*/
func_ptr_t pfnAdcRegIrq;
/*! ADC上超出区间中断回调函数指针*/
func_ptr_t pfnAdcHhtIrq;
/*! ADC下超出区间中断回调函数指针*/
func_ptr_t pfnAdcLltIrq;
/*! ADC单次转换中断回调函数指针*/
func_ptr_t pfnAdcIrq;
}stc_adc_irq_calbakfn_pt_t;
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//ADC initialization
en_result_t Adc_Init(stc_adc_cfg_t* pstcAdcConfig);
//ADC ExtTrig Register config
en_result_t Adc_ExtTrigCfg(stc_adc_ext_trig_cfg_t* pstcExtTrigConfig);
//ADC de-init
void Adc_DeInit(void);
//ADC conversion start
void Adc_SGL_Start(void);
//ADC conversion stop
void Adc_SGL_Stop(void);
//ADC SQR conversion start
void Adc_SQR_Start(void);
//ADC SQR conversion stop
void Adc_SQR_Stop(void);
//ADC JQR conversion start
void Adc_JQR_Start(void);
//ADC JQR conversion stop
void Adc_JQR_Stop(void);
//ADC conversion enable
void Adc_Enable(void);
//ADC conversion disable
void Adc_Disable(void);
//ADC single covert mode configuration
en_result_t Adc_ConfigSglMode(stc_adc_cfg_t* pstcAdcConfig);
//ADC SQR mode configuration
en_result_t Adc_ConfigSqrMode(stc_adc_cfg_t* pstcAdcConfig, uint8_t u8AdcSampCnt,boolean_t bAdcResultAccEn);
//ADC JQR mode configuration
en_result_t Adc_ConfigJqrMode(stc_adc_cfg_t* pstcAdcConfig, uint8_t u8AdcSampCnt,boolean_t bAdcResultAccEn);
//ADC single covert mode channel configuraion
en_result_t Adc_ConfigSglChannel( en_adc_samp_ch_sel_t enstcAdcSampCh);
//ADC SQR mode channel configuraion
en_result_t Adc_ConfigSqrChannel(en_adc_sqr_chmux_t enstcAdcSqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh);
//ADC JQR mode channel configuraion
en_result_t Adc_ConfigJqrChannel(en_adc_jqr_chmux_t enstcAdcJqrChMux, en_adc_samp_ch_sel_t enstcAdcSampCh);
//ADC DMA Trigger
en_result_t Adc_ConfigDmaTrig(en_adc_dmatrig_t enAdcDmaTrig);
//ADC IRQ configuration
void Adc_ConfigIrq(stc_adc_irq_t* pstcAdcIrqCfg,
stc_adc_irq_calbakfn_pt_t* pstcAdcIrqCalbaks);
//ADC enable IRQ
void Adc_EnableIrq(void);
//ADC disable IRQ
void Adc_DisableIrq(void);
//ADC enable threshold compare
void Adc_ThresholdCfg(stc_adc_threshold_cfg_t* stcAdcThrCfg);
//ADC get IRQ state
void Adc_GetIrqState(stc_adc_irq_t* pstcAdcIrqState);
//ADC clear IRQ states
void Adc_ClrSglIrqState(void);
void Adc_ClrJqrIrqState(void);
void Adc_ClrSqrIrqState(void);
void Adc_ClrRegIrqState(void);
void Adc_ClrHtIrqState(void);
void Adc_ClrLtIrqState(void);
//查询ADC单次转换状态
boolean_t Adc_PollSglBusyState(void);
//查询ADC顺序扫描转换转换状态
boolean_t Adc_PollSqrBusyState(void);
//查询ADC插队扫描转换状态
boolean_t Adc_PollJqrBusyState(void);
//查询ADC结果比较区间状态
boolean_t Adc_PollRegBusyState(void);
//查询ADC结果比较上阈值状态
boolean_t Adc_PollHTBusyState(void);
//查询ADC结果比较下阈值状态
boolean_t Adc_PollLtBusyState(void);
//获取单次转换采样值
en_result_t Adc_GetSglResult(uint16_t* pu16AdcResult);
//获取顺序扫描采样值
en_result_t Adc_GetSqrResult(uint16_t* pu16AdcResult,uint8_t SQRChannelIndex);
//获取插队扫描采样值
en_result_t Adc_GetJqrResult(uint16_t* pu16AdcResult,uint8_t JQRChannelIndex);
//获取累加采样值
en_result_t Adc_GetAccResult(uint32_t* pu32AdcAccResult);
//clear ADC accumulated result
void Adc_ClrAccResult(void);
//设置参考电压
en_result_t Adc_SetVref(en_adc_ref_vol_sel_t enAdcRefVolSel);
//设置结果对齐方式
en_result_t Adc_SetAlign(en_adc_align_t enAlign);
//@}
#ifdef __cplusplus
}
#endif
#endif /* __ADC_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/adt.h
+819
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File diff suppressed because it is too large Load Diff
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/aes.h
+108
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@@ -0,0 +1,108 @@
/******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file crc.h
**
** CRC 数据结构及API声明.
**
** - 2016-05-04 LuX V1.0.
**
******************************************************************************/
#ifndef __CRC_H__
#define __CRC_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#include "interrupts_hc32l136.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup CrcGroup Cyclic Redundancy Check (CRC)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//AES 加密
en_result_t AES_Encrypt(uint32_t* pu32Data, uint32_t *pu32Key, uint32_t *pu32Cipher);
//AES 解密
en_result_t AES_Decrypt(uint32_t *pu32Cipher, uint32_t *pu32Key, uint32_t* pu32Plaintext);
//@} // CRC Group
#ifdef __cplusplus
}
#endif
#endif /* __CRC_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/bgr.h
+109
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@@ -0,0 +1,109 @@
/******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file bgr.h
**
** BGR 数据结构及API声明.
**
** - 2018-04-21 LuX V1.0.
**
******************************************************************************/
#ifndef __CRC_H__
#define __CRC_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup BGR
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///<内部温度传感器使能/关闭
en_result_t Bgr_TempSensorEnable(void);
en_result_t Bgr_TempSensorDisable(void);
///<BGR使能/关闭
en_result_t Bgr_BgrEnable(void);
en_result_t Bgr_BgrDisable(void);
//@} // BGR Group
#ifdef __cplusplus
}
#endif
#endif /* __BGR_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/bt.h
+770
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bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/crc.h
+120
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@@ -0,0 +1,120 @@
/******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file crc.h
**
** CRC 数据结构及API声明.
**
** - 2016-05-04 LuX V1.0.
**
******************************************************************************/
#ifndef __CRC_H__
#define __CRC_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "sysctrl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup CrcGroup Cyclic Redundancy Check (CRC)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//CRC16 编码值获取
uint16_t CRC16_Get8(uint8_t* pu8Data, uint32_t u32Len);
uint16_t CRC16_Get16(uint16_t* pu16Data, uint32_t u32Len);
uint16_t CRC16_Get32(uint32_t* pu32Data, uint32_t u32Len);
//CRC16 校验
en_result_t CRC16_Check8(uint8_t* pu8Data, uint32_t u32Len, uint16_t u16CRC);
en_result_t CRC16_Check16(uint16_t* pu16Data, uint32_t u32Len, uint16_t u16CRC);
en_result_t CRC16_Check32(uint32_t* pu32Data, uint32_t u32Len, uint16_t u16CRC);
//CRC32 编码值获取
uint32_t CRC32_Get8(uint8_t* pu8Data, uint32_t u32Len);
uint32_t CRC32_Get16(uint16_t* pu16Data, uint32_t u32Len);
uint32_t CRC32_Get32(uint32_t* pu32Data, uint32_t u32Len);
//CRC32 校验
en_result_t CRC32_Check8(uint8_t* pu8Data, uint32_t u32Len, uint32_t u32CRC);
en_result_t CRC32_Check16(uint16_t* pu16Data, uint32_t u32Len, uint32_t u32CRC);
en_result_t CRC32_Check32(uint32_t* pu32Data, uint32_t u32Len, uint32_t u32CRC);
//@} // CRC Group
#ifdef __cplusplus
}
#endif
#endif /* __CRC_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/ddl.h
+207
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@@ -0,0 +1,207 @@
/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file ddl.h
**
** DDL common define.
** @link SampleGroup Some description @endlink
**
** - 2018-04-15 1.0 Lux First version.
**
******************************************************************************/
#ifndef __DDL_H__
#define __DDL_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "base_types.h"
#include "hc32l136.h"
#include "system_hc32l136.h"
#include "sysctrl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/******************************************************************************/
/* Global pre-processor symbols/macros ('#define') */
/* Macro for initializing local structures to zero */
/******************************************************************************/
#define DDL_ZERO_STRUCT(x) ddl_memclr((uint8_t*)&(x), (uint32_t)(sizeof(x)))
#define DEC2BCD(x) ((((x)/10)<<4) + ((x)%10))
#define BCD2DEC(x) ((((x)>>4)*10) + ((x)&0x0F))
#define setBit(addr,offset,flag) { if( (flag) > 0u){\
*((volatile uint32_t *)(addr)) |= ((1UL)<<(offset));\
}else{\
*((volatile uint32_t *)(addr)) &= (~(1UL<<(offset)));\
}\
}
#define getBit(addr,offset) ((((*((volatile uint32_t *)(addr))) >> (offset)) & 1u)>0?1u:0)
/**
******************************************************************************
** Global Device Series List
******************************************************************************/
#define DDL_DEVICE_SERIES_HC32L136 (0u)
/**
******************************************************************************
** Global Device Package List
******************************************************************************/
// package definitions of HC device.
#define DDL_DEVICE_PACKAGE_HC_C (0x00u)
#define DDL_DEVICE_PACKAGE_HC_F (0x10u)
#define DDL_DEVICE_PACKAGE_HC_J (0x20u)
#define DDL_DEVICE_PACKAGE_HC_K (0x30u)
/******************************************************************************/
/* User Device Setting Include file */
/******************************************************************************/
#include "ddl_device.h" // MUST be included here!
/**
******************************************************************************
** \brief IRQ name definition for all type MCUs
******************************************************************************/
#define PORTA_IRQHandler(void) IRQ000_Handler(void)
#define PORTB_IRQHandler(void) IRQ001_Handler(void)
#define PORTC_IRQHandler(void) IRQ002_Handler(void)
#define PORTD_IRQHandler(void) IRQ003_Handler(void)
#define DMAC_IRQHandler(void) IRQ004_Handler(void)
#define TIM3_IRQHandler(void) IRQ005_Handler(void)
#define UART0_IRQHandler(void) IRQ006_Handler(void)
#define UART1_IRQHandler(void) IRQ007_Handler(void)
#define LPUART0_IRQHandler(void) IRQ008_Handler(void)
#define LPUART1_IRQHandler(void) IRQ009_Handler(void)
#define SPI0_IRQHandler(void) IRQ010_Handler(void)
#define SPI1_IRQHandler(void) IRQ011_Handler(void)
#define I2C0_IRQHandler(void) IRQ012_Handler(void)
#define I2C1_IRQHandler(void) IRQ013_Handler(void)
#define TIM0_IRQHandler(void) IRQ014_Handler(void)
#define TIM1_IRQHandler(void) IRQ015_Handler(void)
#define TIM2_IRQHandler(void) IRQ016_Handler(void)
#define LPTIM_IRQHandler(void) IRQ017_Handler(void)
#define TIM4_IRQHandler(void) IRQ018_Handler(void)
#define TIM5_IRQHandler(void) IRQ019_Handler(void)
#define TIM6_IRQHandler(void) IRQ020_Handler(void)
#define PCA_IRQHandler(void) IRQ021_Handler(void)
#define WDT_IRQHandler(void) IRQ022_Handler(void)
#define RTC_IRQHandler(void) IRQ023_Handler(void)
#define ADC_IRQHandler(void) IRQ024_Handler(void)
#define PCNT_IRQHandler(void) IRQ025_Handler(void)
#define VC0_IRQHandler(void) IRQ026_Handler(void)
#define VC1_IRQHandler(void) IRQ027_Handler(void)
#define LVD_IRQHandler(void) IRQ028_Handler(void)
#define LCD_IRQHandler(void) IRQ029_Handler(void)
#define EF_RAM_IRQHandler(void) IRQ030_Handler(void)
#define CLKTRIM_IRQHandler(void) IRQ031_Handler(void)
/******************************************************************************/
/* Global type definitions ('typedef') */
/******************************************************************************/
/**
******************************************************************************
** \brief Level
**
** Specifies levels.
**
******************************************************************************/
typedef enum en_level
{
DdlLow = 0u, ///< Low level '0'
DdlHigh = 1u ///< High level '1'
} en_level_t;
/**
******************************************************************************
** \brief Generic Flag Code
**
** Specifies flags.
**
******************************************************************************/
typedef enum en_flag
{
DdlClr = 0u, ///< Flag clr '0'
DdlSet = 1u ///< Flag set '1'
} en_stat_flag_t, en_irq_flag_t;
/******************************************************************************/
/* Global variable declarations ('extern', definition in C source) */
/******************************************************************************/
/******************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/******************************************************************************/
/*******************************************************************************
* Global function prototypes
******************************************************************************/
extern void ddl_memclr(void* pu8Address, uint32_t u32Count);
uint32_t Log2(uint32_t u32Val);
/**
*******************************************************************************
** This hook is part of wait loops.
******************************************************************************/
extern void DDL_WAIT_LOOP_HOOK(void);
void Debug_UartInit(void);
void delay1ms(uint32_t u32Cnt);
void delay100us(uint32_t u32Cnt);
void delay10us(uint32_t u32Cnt);
#ifdef __cplusplus
}
#endif
#endif /* __DDL_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/debug.h
+129
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@@ -0,0 +1,129 @@
/*******************************************************************************
* Copyright (C) 2018, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file debug.h
**
** Headerfile for DEBUG functions
** @link Debug Group Some description @endlink
**
** History:
** - 2018-04-15 Lux First Version
**
******************************************************************************/
#ifndef __DEBUG_H__
#define __DEBUG_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#include "interrupts_hc32l136.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup DebugGroup (DEBUG)
**
******************************************************************************/
//@{
/**
*******************************************************************************
** function prototypes.
******************************************************************************/
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
*******************************************************************************
** \brief 调试模式下各模块工作状态类型定义
** \note
******************************************************************************/
typedef enum en_debug_module_active
{
DebugTim0 = 0x001u, ///< TIM0
DebugTim1 = 0x002u, ///< TIM1
DebugTim2 = 0x004u, ///< TIM2
DebugLpTim = 0x008u, ///< LPTIM
DebugTim4 = 0x010u, ///< TIM4
DebugTim5 = 0x020u, ///< TIM5
DebugTim6 = 0x040u, ///< TIM6
DebugPca = 0x080u, ///< PCA
DebugWdt = 0x100u, ///< WDT
DebugRtc = 0x200u, ///< RTC
DebugTick = 0x400u, ///< TICK
DebugTim3 = 0x800u, ///< TIM3
}en_debug_module_active_t;
/*******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Global variable declarations ('extern', definition in C source)
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///< 在SWD调试界面下，使能模块功能
en_result_t Debug_ActiveEnable(en_debug_module_active_t enModule);
///< 在SWD调试界面下，暂停模块功能
en_result_t Debug_ActiveDisable(en_debug_module_active_t enModule);
//@} // Debug Group
#ifdef __cplusplus
#endif
#endif /* __DEBUG_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/dmac.h
+327
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@@ -0,0 +1,327 @@
/*****************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file dma.h
**
** A detailed description is available at
** @link DmacGroup Dmac description @endlink
**
** - 2018-03-09 1.0 Hongjh First version for Device Driver Library of Dmac.
**
******************************************************************************/
#ifndef __DMAC_H__
#define __DMAC_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup DmacGroup Direct Memory Access Control(DMAC)
**
******************************************************************************/
//@{
/*******************************************************************************
* Global type definitions ('typedef')
******************************************************************************/
/**
*******************************************************************************
** \brief DMA Channel
**
******************************************************************************/
typedef enum en_dma_channel
{
DmaCh0 = 0U, ///< DMA channel 0
DmaCh1 = 1U, ///< DMA channel 1
DmaChMax = 2U ///< DMA channel max
} en_dma_channel_t;
/**
*******************************************************************************
** \brief DMA priority
**
******************************************************************************/
typedef enum en_dma_priority
{
DmaPriorityFix = 0U, ///< DMA channel priority fix (CH0>CH1)
DmaPriorityLoop = 1U, ///< DMA channel priority loop
} en_dma_priority_t;
/**
*******************************************************************************
** \brief DMA transfer data width
**
******************************************************************************/
typedef enum en_dma_transfer_width
{
Dma8Bit = 0U, ///< 8 bit transfer via DMA
Dma16Bit = 1U, ///< 16 bit transfer via DMA
Dma32Bit = 2U ///< 32 bit transfer via DMA
} en_dma_transfer_width_t;
/**
*******************************************************************************
** \brief DMA transfer mode
**
******************************************************************************/
typedef enum en_dma_transfer_mode
{
DmaBlock = 0U, ///< block transfer via DMA
DmaBurst = 1U, ///< burst transfer via DMA
} en_dma_transfer_mode_t;
/**
*******************************************************************************
** \brief DMA flag
**
******************************************************************************/
typedef enum en_dma_stat
{
DEFAULT = 0U, ///< Reserve
DmaAddOverflow = 1U, ///< DMA address overflow
DmaHALT = 2U, ///< DMA HALT
DmaAccSCRErr = 3U, ///< DMA access source address error
DmaAccDestErr = 4U, ///< DMA access dest address error
DmaTransferComplete = 5U, ///< DMA transfer complete
DmaTransferPause = 7U, ///< DMA transfer pause
} en_dma_stat_t;
/**
*******************************************************************************
** \brief DMA address mode
**
******************************************************************************/
typedef enum en_address_mode
{
AddressIncrease = 0U, ///< Address increased
AddressFix = 1U, ///< Address fixed
} en_address_mode_t;
/**
*******************************************************************************
** \brief DMA repeat tranfer
**
******************************************************************************/
typedef enum en_dma_msk
{
OneTranfer = 0U, ///< One Tranfer
ContinuousTranfer = 1U, ///< Continuous Tranfer
} en_dma_msk_t;
/**
*******************************************************************************
** \brief DMA trigger selection
**
******************************************************************************/
typedef enum stc_dma_trig_sel
{
SWTrig = 0U, ///< Select DMA software trig
SPI0RXTrig = 32U, ///< Select DMA hardware trig 0
SPI0TXTrig = 33U, ///< Select DMA hardware trig 1
SPI1RXTrig = 34U, ///< Select DMA hardware trig 2
SPI1TXTrig = 35U, ///< Select DMA hardware trig 3
ADCJQRTrig = 36U, ///< Select DMA hardware trig 4
ADCSQRTrig = 37U, ///< Select DMA hardware trig 5
LCDTxTrig = 38U, ///< Select DMA hardware trig 6
Uart0RxTrig = 40U, ///< Select DMA hardware trig 8
Uart0TxTrig = 41U, ///< Select DMA hardware trig 9
Uart1RxTrig = 42U, ///< Select DMA hardware trig 10
Uart1TxTrig = 43U, ///< Select DMA hardware trig 11
LpUart0RxTrig = 44U, ///< Select DMA hardware trig 12
LpUart0TxTrig = 45U, ///< Select DMA hardware trig 13
LpUart1RxTrig = 46U, ///< Select DMA hardware trig 14
LpUart1TxTrig = 47U, ///< Select DMA hardware trig 15
TIM0ATrig = 50U, ///< Select DMA hardware trig 18
TIM0BTrig = 51U, ///< Select DMA hardware trig 19
TIM1ATrig = 52U, ///< Select DMA hardware trig 20
TIM1BTrig = 53U, ///< Select DMA hardware trig 21
TIM2ATrig = 54U, ///< Select DMA hardware trig 22
TIM2BTrig = 55U, ///< Select DMA hardware trig 23
TIM3ATrig = 56U, ///< Select DMA hardware trig 24
TIM3BTrig = 57U, ///< Select DMA hardware trig 25
TIM4ATrig = 58U, ///< Select DMA hardware trig 26
TIM4BTrig = 59U, ///< Select DMA hardware trig 27
TIM5ATrig = 60U, ///< Select DMA hardware trig 28
TIM5BTrig = 61U, ///< Select DMA hardware trig 29
TIM6ATrig = 62U, ///< Select DMA hardware trig 30
TIM6BTrig = 63U, ///< Select DMA hardware trig 31
}en_dma_trig_sel_t;
/**
*******************************************************************************
** \brief DMA interrupt selection
**
******************************************************************************/
typedef struct stc_dma_irq
{
boolean_t TrnErrIrq; ///< Select DMA transfer error interrupt
boolean_t TrnCpltIrq; ///< Select DMA transfer completion interrupt
}stc_dma_irq_sel_t;
/**
*******************************************************************************
** \brief DMA configuration
**
******************************************************************************/
typedef struct stc_dma_config
{
en_dma_transfer_mode_t enMode;
uint16_t u16BlockSize; ///< Transfer Block counter
uint16_t u16TransferCnt; ///< Transfer counter
en_dma_transfer_width_t enTransferWidth; ///< DMA transfer width (see #en_dma_transfer_width_t for details)
en_address_mode_t enSrcAddrMode; ///< Source address mode(see #en_source_address_mode_t for details)
en_address_mode_t enDstAddrMode; ///< Destination address mode(see #en_dest_address_mode_t for details)
boolean_t bSrcAddrReloadCtl; ///< Source address reload(TRUE: reload;FALSE: reload forbidden)
boolean_t bDestAddrReloadCtl; ///< Dest address reload(TRUE: reload;FALSE: reload forbidden)
boolean_t bSrcBcTcReloadCtl; ///< Bc/Tc address reload(TRUE: reload;FALSE: reload forbidden)
uint32_t u32SrcAddress; ///< Source address>
uint32_t u32DstAddress; ///< Dest address>
boolean_t bMsk; ///0: clear the bit (CONFA:ENS) after tarnfer;1: remain the bit (CONFA:ENS) after tarnfer
en_dma_trig_sel_t enRequestNum; ///< DMA trigger request number
} stc_dma_config_t;
/**
******************************************************************************
** \brief DMA中断回调函数
*****************************************************************************/
typedef struct stc_dma_irq_calbakfn_pt
{
/*! Dma传输完成中断回调函数指针*/
func_ptr_t pfnDma0TranferCompleteIrq;
/*! Dma传输完成中断回调函数指针*/
func_ptr_t pfnDma1TranferCompleteIrq;
/*! Dma传输错误中断回调函数指针*/
func_ptr_t pfnDma0TranferErrIrq;
/*! Dma传输错误中断回调函数指针*/
func_ptr_t pfnDma1TranferErrIrq;
}stc_dma_irq_calbakfn_pt_t;
/*******************************************************************************
* Global pre-processor symbols/macros ('#define')
******************************************************************************/
/*******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
en_result_t Dma_InitChannel(en_dma_channel_t enCh, stc_dma_config_t* pstcConfig);
void Dma_SwTrigger(en_dma_channel_t enCh);
void Dma_Enable(void);
void Dma_Disable(void);
void Dma_Start(en_dma_channel_t enCh);
void Dma_Stop(en_dma_channel_t enCh);
en_result_t Dma_EnableChannel(en_dma_channel_t enCh);
en_result_t Dma_DisableChannel(en_dma_channel_t enCh);
en_result_t Dma_SetTriggerSel(en_dma_channel_t enCh, en_dma_trig_sel_t enTrgSel);
en_result_t Dma_SetSourceAddress(en_dma_channel_t enCh, uint32_t u32Address);
en_result_t Dma_SetDestinationAddress(en_dma_channel_t enCh, uint32_t u32Address);
en_result_t Dma_SetBlockSize(en_dma_channel_t enCh, uint16_t u16BlkSize);
en_result_t Dma_SetTransferCnt(en_dma_channel_t enCh, uint16_t u16TrnCnt);
en_result_t Dma_SetSourceIncMode(en_dma_channel_t enCh, en_address_mode_t enMode);
en_result_t Dma_SetDestinationIncMode(en_dma_channel_t enCh, en_address_mode_t enMode);
en_result_t Dma_EnableSourceRload(en_dma_channel_t enCh);
en_result_t Dma_DisableSourceRload(en_dma_channel_t enCh);
en_result_t Dma_EnableDestinationRload(en_dma_channel_t enCh);
en_result_t Dma_DisableDestinationRload(en_dma_channel_t enCh);
en_result_t Dma_EnableContinusTranfer(en_dma_channel_t enCh);
en_result_t Dma_DisableContinusTranfer(en_dma_channel_t enCh);
en_result_t Dma_EnableBcTcReload(en_dma_channel_t enCh);
en_result_t Dma_DisableBcTcReload(en_dma_channel_t enCh);
void Dma_HaltTranfer(void);
void Dma_RecoverTranfer(void);
en_result_t Dma_PauseChannelTranfer(en_dma_channel_t enCh);
en_result_t Dma_RecoverChannelTranfer(en_dma_channel_t enCh);
en_result_t Dma_SetTransferWidth(en_dma_channel_t enCh, en_dma_transfer_width_t enWidth);
en_result_t Dma_SetChPriority(en_dma_priority_t enPrio);
en_result_t Dma_EnableChannelIrq(en_dma_channel_t enCh);
en_result_t Dma_DisableChannelIrq(en_dma_channel_t enCh);
en_result_t Dma_EnableChannelErrIrq(en_dma_channel_t enCh);
en_result_t Dma_DisableChannelErrIrq(en_dma_channel_t enCh);
en_result_t Dma_ConfigIrq(en_dma_channel_t enCh,stc_dma_irq_sel_t* stcDmaIrqCfg,stc_dma_irq_calbakfn_pt_t* pstcDmaIrqCalbaks);
en_dma_stat_t Dma_GetStat(en_dma_channel_t enCh);
void Dma_ClrStat(en_dma_channel_t enCh);
//@} // DmacGroup
#ifdef __cplusplus
}
#endif
#endif /* __DMAC_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/flash.h
+196
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@@ -0,0 +1,196 @@
/*************************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file flash.h
**
** FLASH 数据结构及API声明.
**
** - 2017-05-02 LuX V1.0
**
******************************************************************************/
#ifndef __FLASH_H__
#define __FLASH_H__
/******************************************************************************/
/* Include files */
/******************************************************************************/
#include "ddl.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup FlashGroup Flash Controller (Flash)
**
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/**
******************************************************************************
** \brief Flash中断类型重定义
*****************************************************************************/
typedef enum en_flash_int_type
{
FlashPCInt = 1u, ///<擦写PC地址报警中断
FlashSlockInt = 0u, ///<擦写保护报警中断
} en_flash_int_type_t;
/**
******************************************************************************
** \brief Flash读等待周期类型重定义
*****************************************************************************/
typedef enum en_flash_waitcycle
{
FlashWaitCycle0 = 0u, ///< 读等待周期设置为0（当HCLK小于等于24MHz时）
FlashWaitCycle1 = 1u, ///< 读等待周期设置为1（当HCLK大于24MHz时必须至少为1）
FlashWaitCycle2 = 2u, ///< 读等待周期设置为2（当HCK大于48MHz时必须至少为2）
} en_flash_waitcycle_t;
/**
******************************************************************************
** \brief Flash擦写保护范围重定义
*****************************************************************************/
typedef enum en_flash_sector_lock
{
FlashSector0_3 = 0x00000001u, ///<Sector0_3
FlashSector4_7 = 0x00000002u, ///<Sector4_7
FlashSector8_11 = 0x00000004u, ///<Sector8_11
FlashSector12_15 = 0x00000008u, ///<Sector12_15
FlashSector16_19 = 0x00000010u, ///<Sector16_19
FlashSector20_23 = 0x00000020u, ///<Sector20_23
FlashSector24_27 = 0x00000040u, ///<Sector24_27
FlashSector28_31 = 0x00000080u, ///<Sector28_31
FlashSector32_35 = 0x00000100u, ///<Sector32_35
FlashSector36_39 = 0x00000200u, ///<Sector36_39
FlashSector40_43 = 0x00000400u, ///<Sector40_43
FlashSector44_47 = 0x00000800u, ///<Sector44_47
FlashSector48_51 = 0x00001000u, ///<Sector48_51
FlashSector52_55 = 0x00002000u, ///<Sector52_55
FlashSector56_59 = 0x00004000u, ///<Sector56_59
FlashSector60_63 = 0x00008000u, ///<Sector60_63
FlashSector64_67 = 0x00010000u, ///<Sector64_67
FlashSector68_71 = 0x00020000u, ///<Sector68_71
FlashSector72_75 = 0x00040000u, ///<Sector72_75
FlashSector76_79 = 0x00080000u, ///<Sector76_79
FlashSector80_83 = 0x00100000u, ///<Sector80_83
FlashSector84_87 = 0x00200000u, ///<Sector84_87
FlashSector88_91 = 0x00400000u, ///<Sector88_91
FlashSector92_95 = 0x00800000u, ///<Sector92_95
FlashSector96_99 = 0x01000000u, ///<Sector96_99
FlashSector100_103 = 0x02000000u, ///<Sector100_103
FlashSector104_107 = 0x04000000u, ///<Sector104_107
FlashSector108_111 = 0x08000000u, ///<Sector108_111
FlashSector112_115 = 0x10000000u, ///<Sector112_115
FlashSector116_119 = 0x20000000u, ///<Sector116_119
FlashSector120_123 = 0x40000000u, ///<Sector120_123
FlashSector124_127 = (int)0x80000000u, ///<Sector124_127
FlashSectorAll = (int)0xFFFFFFFFu, ///<SectorAll
} en_flash_sector_lock_t;
/**
******************************************************************************
** \brief Redefinition of FLASH register structure
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
///<Flash 初始化配置(中断函数、编程时间参数及休眠模式配置）
en_result_t Flash_Init(func_ptr_t pfnFlashCb, uint8_t u8FreqCfg, boolean_t bDpstbEn);
///<Flash 页/全片擦除
en_result_t Flash_SectorErase(uint32_t u32SectorAddr);
en_result_t Flash_ChipErase(void);
///<Flash 字节/半字/字写
en_result_t Flash_WriteByte(uint32_t u32Addr, uint8_t u8Data);
en_result_t Flash_WriteHalfWord(uint32_t u32Addr, uint16_t u16Data);
en_result_t Flash_WriteWord(uint32_t u32Addr, uint32_t u32Data);
///<Flash 编程保护加锁/解锁
en_result_t Flash_Lock(en_flash_sector_lock_t enFlashSector);
en_result_t Flash_Unlock(en_flash_sector_lock_t enFlashSector);
///<Flash 读等待周期设定
en_result_t Flash_WaitCycle(en_flash_waitcycle_t enWaitCycle);
///<中断相关函数
///<中断使能/禁止
en_result_t Flash_EnableIrq(en_flash_int_type_t enFlashIntType);
en_result_t Flash_DisableIrq(en_flash_int_type_t enFlashIntType);
///<中断标志获取
boolean_t Flash_GetIntFlag(en_flash_int_type_t enFlashIntType);
///<中断标志清除
en_result_t Flash_ClearIntFlag(en_flash_int_type_t enFlashIntType);
//@} // FlashGroup
#ifdef __cplusplus
}
#endif
#endif /* __FLASH_H__ */
/******************************************************************************/
/* EOF (not truncated) */
/******************************************************************************/
bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/gpio.h
+506
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bsp/hc32l136/Libraries/HC32L136_StdPeriph_Driver/inc/hdiv.h
+119
View File
@@ -0,0 +1,119 @@
/******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file crc.h
**
** CRC 数据结构及API声明.
**
** - 2016-05-04 LuX V1.0.
**
******************************************************************************/
#ifndef __CRC_H__
#define __HDIV_H__
/******************************************************************************
* Include files
******************************************************************************/
#include "ddl.h"
#include "interrupts_hc32l136.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
******************************************************************************
** \defgroup CrcGroup Cyclic Redundancy Check (CRC)
**
******************************************************************************/
//@{
/******************************************************************************
* Global type definitions
******************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
typedef struct stc_div_unsigned_result
{
uint32_t Quotient;
uint32_t Remainder;
}stc_div_unsigned_result_t;
typedef struct stc_div_signed_result
{
int32_t Quotient;
int32_t Remainder;
}stc_div_signed_result_t;
/******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
//HDIV
en_result_t Hdiv_Unsigned(uint32_t Dividend,uint16_t Divisor,stc_div_unsigned_result_t* stcDivResult);
en_result_t Hdiv_Signed(int32_t Dividend,int16_t Divisor,stc_div_signed_result_t* stcDivResult);
boolean_t Hdiv_GetEndState(void);
boolean_t Hdiv_GetZeroState(void);
//@} // CRC Group
#ifdef __cplusplus
}
#endif
#endif /* __CRC_H__ */
/******************************************************************************
* EOF (not truncated)
******************************************************************************/

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