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[libcpu][cortex-a] Improve FPU stack initialization implementation
Co-authored-by: BernardXiong <1241087+BernardXiong@users.noreply.github.com>
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@@ -72,6 +72,11 @@ struct rt_hw_stack
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#define E_Bit (1<<9)
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#define J_Bit (1<<24)
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/* VFP/NEON register count for FPU context */
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#ifndef VFP_DATA_NR
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#define VFP_DATA_NR 64 /* 32 double-precision registers = 64 words */
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#endif
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#ifdef RT_USING_SMP
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typedef union {
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unsigned long slock;
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@@ -31,6 +31,9 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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rt_uint8_t *stack_addr, void *texit)
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{
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rt_uint32_t *stk;
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#ifdef RT_USING_FPU
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rt_uint32_t i;
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#endif
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stack_addr += sizeof(rt_uint32_t);
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stack_addr = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
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@@ -61,7 +64,15 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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*(--stk) = 0; /* user sp*/
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#endif
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#ifdef RT_USING_FPU
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*(--stk) = 0; /* not use fpu*/
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/* FPU context initialization matches context_gcc.S restore order:
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* Stack layout (high to low): FPEXC -> FPSCR -> D16-D31 -> D0-D15
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*/
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for (i = 0; i < VFP_DATA_NR; i++)
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{
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*(--stk) = 0; /* Initialize D0-D31 (64 words for 32 double regs) */
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}
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*(--stk) = 0; /* FPSCR: Floating-Point Status and Control Register */
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*(--stk) = 0x40000000; /* FPEXC: Enable FPU (bit 30 = EN) */
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#endif
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/* return task's current stack address */
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